1 /* 2 * AGPGART 3 * Copyright (C) 2004 Silicon Graphics, Inc. 4 * Copyright (C) 2002-2004 Dave Jones 5 * Copyright (C) 1999 Jeff Hartmann 6 * Copyright (C) 1999 Precision Insight, Inc. 7 * Copyright (C) 1999 Xi Graphics, Inc. 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a 10 * copy of this software and associated documentation files (the "Software"), 11 * to deal in the Software without restriction, including without limitation 12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 13 * and/or sell copies of the Software, and to permit persons to whom the 14 * Software is furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included 17 * in all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, 23 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 24 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE 25 * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 26 * 27 */ 28 29 #ifndef _AGP_BACKEND_PRIV_H 30 #define _AGP_BACKEND_PRIV_H 1 31 32 #include <asm/agp.h> /* for flush_agp_cache() */ 33 34 #define PFX "agpgart: " 35 36 //#define AGP_DEBUG 1 37 #ifdef AGP_DEBUG 38 #define DBG(x,y...) printk (KERN_DEBUG PFX "%s: " x "\n", __FUNCTION__ , ## y) 39 #else 40 #define DBG(x,y...) do { } while (0) 41 #endif 42 43 extern struct agp_bridge_data *agp_bridge; 44 45 enum aper_size_type { 46 U8_APER_SIZE, 47 U16_APER_SIZE, 48 U32_APER_SIZE, 49 LVL2_APER_SIZE, 50 FIXED_APER_SIZE 51 }; 52 53 struct gatt_mask { 54 unsigned long mask; 55 u32 type; 56 /* totally device specific, for integrated chipsets that 57 * might have different types of memory masks. For other 58 * devices this will probably be ignored */ 59 }; 60 61 struct aper_size_info_8 { 62 int size; 63 int num_entries; 64 int page_order; 65 u8 size_value; 66 }; 67 68 struct aper_size_info_16 { 69 int size; 70 int num_entries; 71 int page_order; 72 u16 size_value; 73 }; 74 75 struct aper_size_info_32 { 76 int size; 77 int num_entries; 78 int page_order; 79 u32 size_value; 80 }; 81 82 struct aper_size_info_lvl2 { 83 int size; 84 int num_entries; 85 u32 size_value; 86 }; 87 88 struct aper_size_info_fixed { 89 int size; 90 int num_entries; 91 int page_order; 92 }; 93 94 struct agp_bridge_driver { 95 struct module *owner; 96 void *aperture_sizes; 97 int num_aperture_sizes; 98 enum aper_size_type size_type; 99 int cant_use_aperture; 100 int needs_scratch_page; 101 struct gatt_mask *masks; 102 int (*fetch_size)(void); 103 int (*configure)(void); 104 void (*agp_enable)(struct agp_bridge_data *, u32); 105 void (*cleanup)(void); 106 void (*tlb_flush)(struct agp_memory *); 107 unsigned long (*mask_memory)(struct agp_bridge_data *, unsigned long, int); 108 void (*cache_flush)(void); 109 int (*create_gatt_table)(struct agp_bridge_data *); 110 int (*free_gatt_table)(struct agp_bridge_data *); 111 int (*insert_memory)(struct agp_memory *, off_t, int); 112 int (*remove_memory)(struct agp_memory *, off_t, int); 113 struct agp_memory *(*alloc_by_type) (size_t, int); 114 void (*free_by_type)(struct agp_memory *); 115 void *(*agp_alloc_page)(struct agp_bridge_data *); 116 void (*agp_destroy_page)(void *); 117 }; 118 119 struct agp_bridge_data { 120 struct agp_version *version; 121 struct agp_bridge_driver *driver; 122 struct vm_operations_struct *vm_ops; 123 void *previous_size; 124 void *current_size; 125 void *dev_private_data; 126 struct pci_dev *dev; 127 u32 __iomem *gatt_table; 128 u32 *gatt_table_real; 129 unsigned long scratch_page; 130 unsigned long scratch_page_real; 131 unsigned long gart_bus_addr; 132 unsigned long gatt_bus_addr; 133 u32 mode; 134 enum chipset_type type; 135 unsigned long *key_list; 136 atomic_t current_memory_agp; 137 atomic_t agp_in_use; 138 int max_memory_agp; /* in number of pages */ 139 int aperture_size_idx; 140 int capndx; 141 int flags; 142 char major_version; 143 char minor_version; 144 struct list_head list; 145 u32 apbase_config; 146 }; 147 148 #define KB(x) ((x) * 1024) 149 #define MB(x) (KB (KB (x))) 150 #define GB(x) (MB (KB (x))) 151 152 #define A_SIZE_8(x) ((struct aper_size_info_8 *) x) 153 #define A_SIZE_16(x) ((struct aper_size_info_16 *) x) 154 #define A_SIZE_32(x) ((struct aper_size_info_32 *) x) 155 #define A_SIZE_LVL2(x) ((struct aper_size_info_lvl2 *) x) 156 #define A_SIZE_FIX(x) ((struct aper_size_info_fixed *) x) 157 #define A_IDX8(bridge) (A_SIZE_8((bridge)->driver->aperture_sizes) + i) 158 #define A_IDX16(bridge) (A_SIZE_16((bridge)->driver->aperture_sizes) + i) 159 #define A_IDX32(bridge) (A_SIZE_32((bridge)->driver->aperture_sizes) + i) 160 #define MAXKEY (4096 * 32) 161 162 #define PGE_EMPTY(b, p) (!(p) || (p) == (unsigned long) (b)->scratch_page) 163 164 165 /* Intel registers */ 166 #define INTEL_APSIZE 0xb4 167 #define INTEL_ATTBASE 0xb8 168 #define INTEL_AGPCTRL 0xb0 169 #define INTEL_NBXCFG 0x50 170 #define INTEL_ERRSTS 0x91 171 172 /* Intel i830 registers */ 173 #define I830_GMCH_CTRL 0x52 174 #define I830_GMCH_ENABLED 0x4 175 #define I830_GMCH_MEM_MASK 0x1 176 #define I830_GMCH_MEM_64M 0x1 177 #define I830_GMCH_MEM_128M 0 178 #define I830_GMCH_GMS_MASK 0x70 179 #define I830_GMCH_GMS_DISABLED 0x00 180 #define I830_GMCH_GMS_LOCAL 0x10 181 #define I830_GMCH_GMS_STOLEN_512 0x20 182 #define I830_GMCH_GMS_STOLEN_1024 0x30 183 #define I830_GMCH_GMS_STOLEN_8192 0x40 184 #define I830_RDRAM_CHANNEL_TYPE 0x03010 185 #define I830_RDRAM_ND(x) (((x) & 0x20) >> 5) 186 #define I830_RDRAM_DDT(x) (((x) & 0x18) >> 3) 187 188 /* This one is for I830MP w. an external graphic card */ 189 #define INTEL_I830_ERRSTS 0x92 190 191 /* Intel 855GM/852GM registers */ 192 #define I855_GMCH_GMS_STOLEN_0M 0x0 193 #define I855_GMCH_GMS_STOLEN_1M (0x1 << 4) 194 #define I855_GMCH_GMS_STOLEN_4M (0x2 << 4) 195 #define I855_GMCH_GMS_STOLEN_8M (0x3 << 4) 196 #define I855_GMCH_GMS_STOLEN_16M (0x4 << 4) 197 #define I855_GMCH_GMS_STOLEN_32M (0x5 << 4) 198 #define I85X_CAPID 0x44 199 #define I85X_VARIANT_MASK 0x7 200 #define I85X_VARIANT_SHIFT 5 201 #define I855_GME 0x0 202 #define I855_GM 0x4 203 #define I852_GME 0x2 204 #define I852_GM 0x5 205 206 /* Intel i845 registers */ 207 #define INTEL_I845_AGPM 0x51 208 #define INTEL_I845_ERRSTS 0xc8 209 210 /* Intel i860 registers */ 211 #define INTEL_I860_MCHCFG 0x50 212 #define INTEL_I860_ERRSTS 0xc8 213 214 /* Intel i810 registers */ 215 #define I810_GMADDR 0x10 216 #define I810_MMADDR 0x14 217 #define I810_PTE_BASE 0x10000 218 #define I810_PTE_MAIN_UNCACHED 0x00000000 219 #define I810_PTE_LOCAL 0x00000002 220 #define I810_PTE_VALID 0x00000001 221 #define I810_SMRAM_MISCC 0x70 222 #define I810_GFX_MEM_WIN_SIZE 0x00010000 223 #define I810_GFX_MEM_WIN_32M 0x00010000 224 #define I810_GMS 0x000000c0 225 #define I810_GMS_DISABLE 0x00000000 226 #define I810_PGETBL_CTL 0x2020 227 #define I810_PGETBL_ENABLED 0x00000001 228 #define I810_DRAM_CTL 0x3000 229 #define I810_DRAM_ROW_0 0x00000001 230 #define I810_DRAM_ROW_0_SDRAM 0x00000001 231 232 struct agp_device_ids { 233 unsigned short device_id; /* first, to make table easier to read */ 234 enum chipset_type chipset; 235 const char *chipset_name; 236 int (*chipset_setup) (struct pci_dev *pdev); /* used to override generic */ 237 }; 238 239 /* Driver registration */ 240 struct agp_bridge_data *agp_alloc_bridge(void); 241 void agp_put_bridge(struct agp_bridge_data *bridge); 242 int agp_add_bridge(struct agp_bridge_data *bridge); 243 void agp_remove_bridge(struct agp_bridge_data *bridge); 244 245 /* Frontend routines. */ 246 int agp_frontend_initialize(void); 247 void agp_frontend_cleanup(void); 248 249 /* Generic routines. */ 250 void agp_generic_enable(struct agp_bridge_data *bridge, u32 mode); 251 int agp_generic_create_gatt_table(struct agp_bridge_data *bridge); 252 int agp_generic_free_gatt_table(struct agp_bridge_data *bridge); 253 struct agp_memory *agp_create_memory(int scratch_pages); 254 int agp_generic_insert_memory(struct agp_memory *mem, off_t pg_start, int type); 255 int agp_generic_remove_memory(struct agp_memory *mem, off_t pg_start, int type); 256 struct agp_memory *agp_generic_alloc_by_type(size_t page_count, int type); 257 void agp_generic_free_by_type(struct agp_memory *curr); 258 void *agp_generic_alloc_page(struct agp_bridge_data *bridge); 259 void agp_generic_destroy_page(void *addr); 260 void agp_free_key(int key); 261 int agp_num_entries(void); 262 u32 agp_collect_device_status(struct agp_bridge_data *bridge, u32 mode, u32 command); 263 void agp_device_command(u32 command, int agp_v3); 264 int agp_3_5_enable(struct agp_bridge_data *bridge); 265 void global_cache_flush(void); 266 void get_agp_version(struct agp_bridge_data *bridge); 267 unsigned long agp_generic_mask_memory(struct agp_bridge_data *bridge, 268 unsigned long addr, int type); 269 struct agp_bridge_data *agp_generic_find_bridge(struct pci_dev *pdev); 270 271 /* generic routines for agp>=3 */ 272 int agp3_generic_fetch_size(void); 273 void agp3_generic_tlbflush(struct agp_memory *mem); 274 int agp3_generic_configure(void); 275 void agp3_generic_cleanup(void); 276 277 /* aperture sizes have been standardised since v3 */ 278 #define AGP_GENERIC_SIZES_ENTRIES 11 279 extern struct aper_size_info_16 agp3_generic_sizes[]; 280 281 #define virt_to_gart(x) (phys_to_gart(virt_to_phys(x))) 282 #define gart_to_virt(x) (phys_to_virt(gart_to_phys(x))) 283 284 extern int agp_off; 285 extern int agp_try_unsupported_boot; 286 287 /* Chipset independant registers (from AGP Spec) */ 288 #define AGP_APBASE 0x10 289 290 #define AGPSTAT 0x4 291 #define AGPCMD 0x8 292 #define AGPNISTAT 0xc 293 #define AGPCTRL 0x10 294 #define AGPAPSIZE 0x14 295 #define AGPNEPG 0x16 296 #define AGPGARTLO 0x18 297 #define AGPGARTHI 0x1c 298 #define AGPNICMD 0x20 299 300 #define AGP_MAJOR_VERSION_SHIFT (20) 301 #define AGP_MINOR_VERSION_SHIFT (16) 302 303 #define AGPSTAT_RQ_DEPTH (0xff000000) 304 #define AGPSTAT_RQ_DEPTH_SHIFT 24 305 306 #define AGPSTAT_CAL_MASK (1<<12|1<<11|1<<10) 307 #define AGPSTAT_ARQSZ (1<<15|1<<14|1<<13) 308 #define AGPSTAT_ARQSZ_SHIFT 13 309 310 #define AGPSTAT_SBA (1<<9) 311 #define AGPSTAT_AGP_ENABLE (1<<8) 312 #define AGPSTAT_FW (1<<4) 313 #define AGPSTAT_MODE_3_0 (1<<3) 314 315 #define AGPSTAT2_1X (1<<0) 316 #define AGPSTAT2_2X (1<<1) 317 #define AGPSTAT2_4X (1<<2) 318 319 #define AGPSTAT3_RSVD (1<<2) 320 #define AGPSTAT3_8X (1<<1) 321 #define AGPSTAT3_4X (1) 322 323 #define AGPCTRL_APERENB (1<<8) 324 #define AGPCTRL_GTLBEN (1<<7) 325 326 #define AGP2_RESERVED_MASK 0x00fffcc8 327 #define AGP3_RESERVED_MASK 0x00ff00c4 328 329 #define AGP_ERRATA_FASTWRITES 1<<0 330 #define AGP_ERRATA_SBA 1<<1 331 #define AGP_ERRATA_1X 1<<2 332 333 #endif /* _AGP_BACKEND_PRIV_H */ 334