1d34599bcSLad Prabhakar# SPDX-License-Identifier: GPL-2.0 24d1608d0SJonathan Cameron 34d1608d0SJonathan Cameronmenuconfig CACHEMAINT_FOR_DMA 44d1608d0SJonathan Cameron bool "Cache management for noncoherent DMA" 54d1608d0SJonathan Cameron depends on RISCV 64d1608d0SJonathan Cameron default y 74d1608d0SJonathan Cameron help 84d1608d0SJonathan Cameron These drivers implement support for noncoherent DMA master devices 94d1608d0SJonathan Cameron on platforms that lack the standard CPU interfaces for this. 104d1608d0SJonathan Cameron 114d1608d0SJonathan Cameronif CACHEMAINT_FOR_DMA 12d34599bcSLad Prabhakar 13d34599bcSLad Prabhakarconfig AX45MP_L2_CACHE 14d34599bcSLad Prabhakar bool "Andes Technology AX45MP L2 Cache controller" 15d34599bcSLad Prabhakar select RISCV_NONSTANDARD_CACHE_OPS 16d34599bcSLad Prabhakar help 17d34599bcSLad Prabhakar Support for the L2 cache controller on Andes Technology AX45MP platforms. 18d34599bcSLad Prabhakar 19971f128bSConor Dooleyconfig SIFIVE_CCACHE 20971f128bSConor Dooley bool "Sifive Composable Cache controller" 21971f128bSConor Dooley depends on ARCH_SIFIVE || ARCH_STARFIVE 22971f128bSConor Dooley help 23971f128bSConor Dooley Support for the composable cache controller on SiFive platforms. 24971f128bSConor Dooley 25cabff60cSJoshua Yeongconfig STARFIVE_STARLINK_CACHE 26cabff60cSJoshua Yeong bool "StarFive StarLink Cache controller" 27cabff60cSJoshua Yeong depends on ARCH_STARFIVE 2857e5c814SPalmer Dabbelt depends on 64BIT 29cabff60cSJoshua Yeong select RISCV_DMA_NONCOHERENT 30cabff60cSJoshua Yeong select RISCV_NONSTANDARD_CACHE_OPS 31cabff60cSJoshua Yeong help 32cabff60cSJoshua Yeong Support for the StarLink cache controller IP from StarFive. 33cabff60cSJoshua Yeong 344d1608d0SJonathan Cameronendif #CACHEMAINT_FOR_DMA 35*2ec3b54aSYushan Wang 36*2ec3b54aSYushan Wangmenuconfig CACHEMAINT_FOR_HOTPLUG 37*2ec3b54aSYushan Wang bool "Cache management for memory hot plug like operations" 38*2ec3b54aSYushan Wang depends on GENERIC_CPU_CACHE_MAINTENANCE 39*2ec3b54aSYushan Wang help 40*2ec3b54aSYushan Wang These drivers implement cache management for flows where it is necessary 41*2ec3b54aSYushan Wang to flush data from all host caches. 42*2ec3b54aSYushan Wang 43*2ec3b54aSYushan Wangif CACHEMAINT_FOR_HOTPLUG 44*2ec3b54aSYushan Wang 45*2ec3b54aSYushan Wangconfig HISI_SOC_HHA 46*2ec3b54aSYushan Wang tristate "HiSilicon Hydra Home Agent (HHA) device driver" 47*2ec3b54aSYushan Wang depends on (ARM64 && ACPI) || COMPILE_TEST 48*2ec3b54aSYushan Wang help 49*2ec3b54aSYushan Wang The Hydra Home Agent (HHA) is responsible for cache coherency 50*2ec3b54aSYushan Wang on the SoC. This drivers enables the cache maintenance functions of 51*2ec3b54aSYushan Wang the HHA. 52*2ec3b54aSYushan Wang 53*2ec3b54aSYushan Wang This driver can be built as a module. If so, the module will be 54*2ec3b54aSYushan Wang called hisi_soc_hha. 55*2ec3b54aSYushan Wang 56*2ec3b54aSYushan Wangendif #CACHEMAINT_FOR_HOTPLUG 57