1 /* 2 * ti-sysc.c - Texas Instruments sysc interconnect target driver 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 * 8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any 9 * kind, whether express or implied; without even the implied warranty 10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 */ 13 14 #include <linux/io.h> 15 #include <linux/clk.h> 16 #include <linux/module.h> 17 #include <linux/platform_device.h> 18 #include <linux/pm_runtime.h> 19 #include <linux/of_address.h> 20 #include <linux/of_platform.h> 21 #include <linux/platform_data/ti-sysc.h> 22 23 #include <dt-bindings/bus/ti-sysc.h> 24 25 enum sysc_registers { 26 SYSC_REVISION, 27 SYSC_SYSCONFIG, 28 SYSC_SYSSTATUS, 29 SYSC_MAX_REGS, 30 }; 31 32 static const char * const reg_names[] = { "rev", "sysc", "syss", }; 33 34 enum sysc_clocks { 35 SYSC_FCK, 36 SYSC_ICK, 37 SYSC_MAX_CLOCKS, 38 }; 39 40 static const char * const clock_names[] = { "fck", "ick", }; 41 42 #define SYSC_IDLEMODE_MASK 3 43 #define SYSC_CLOCKACTIVITY_MASK 3 44 45 /** 46 * struct sysc - TI sysc interconnect target module registers and capabilities 47 * @dev: struct device pointer 48 * @module_pa: physical address of the interconnect target module 49 * @module_size: size of the interconnect target module 50 * @module_va: virtual address of the interconnect target module 51 * @offsets: register offsets from module base 52 * @clocks: clocks used by the interconnect target module 53 * @legacy_mode: configured for legacy mode if set 54 * @cap: interconnect target module capabilities 55 * @cfg: interconnect target module configuration 56 * @name: name if available 57 * @revision: interconnect target module revision 58 */ 59 struct sysc { 60 struct device *dev; 61 u64 module_pa; 62 u32 module_size; 63 void __iomem *module_va; 64 int offsets[SYSC_MAX_REGS]; 65 struct clk *clocks[SYSC_MAX_CLOCKS]; 66 const char *legacy_mode; 67 const struct sysc_capabilities *cap; 68 struct sysc_config cfg; 69 const char *name; 70 u32 revision; 71 }; 72 73 static u32 sysc_read(struct sysc *ddata, int offset) 74 { 75 if (ddata->cfg.quirks & SYSC_QUIRK_16BIT) { 76 u32 val; 77 78 val = readw_relaxed(ddata->module_va + offset); 79 val |= (readw_relaxed(ddata->module_va + offset + 4) << 16); 80 81 return val; 82 } 83 84 return readl_relaxed(ddata->module_va + offset); 85 } 86 87 static u32 sysc_read_revision(struct sysc *ddata) 88 { 89 int offset = ddata->offsets[SYSC_REVISION]; 90 91 if (offset < 0) 92 return 0; 93 94 return sysc_read(ddata, offset); 95 } 96 97 static int sysc_get_one_clock(struct sysc *ddata, 98 enum sysc_clocks index) 99 { 100 const char *name; 101 int error; 102 103 switch (index) { 104 case SYSC_FCK: 105 break; 106 case SYSC_ICK: 107 break; 108 default: 109 return -EINVAL; 110 } 111 name = clock_names[index]; 112 113 ddata->clocks[index] = devm_clk_get(ddata->dev, name); 114 if (IS_ERR(ddata->clocks[index])) { 115 if (PTR_ERR(ddata->clocks[index]) == -ENOENT) 116 return 0; 117 118 dev_err(ddata->dev, "clock get error for %s: %li\n", 119 name, PTR_ERR(ddata->clocks[index])); 120 121 return PTR_ERR(ddata->clocks[index]); 122 } 123 124 error = clk_prepare(ddata->clocks[index]); 125 if (error) { 126 dev_err(ddata->dev, "clock prepare error for %s: %i\n", 127 name, error); 128 129 return error; 130 } 131 132 return 0; 133 } 134 135 static int sysc_get_clocks(struct sysc *ddata) 136 { 137 int i, error; 138 139 if (ddata->legacy_mode) 140 return 0; 141 142 for (i = 0; i < SYSC_MAX_CLOCKS; i++) { 143 error = sysc_get_one_clock(ddata, i); 144 if (error && error != -ENOENT) 145 return error; 146 } 147 148 return 0; 149 } 150 151 /** 152 * sysc_parse_and_check_child_range - parses module IO region from ranges 153 * @ddata: device driver data 154 * 155 * In general we only need rev, syss, and sysc registers and not the whole 156 * module range. But we do want the offsets for these registers from the 157 * module base. This allows us to check them against the legacy hwmod 158 * platform data. Let's also check the ranges are configured properly. 159 */ 160 static int sysc_parse_and_check_child_range(struct sysc *ddata) 161 { 162 struct device_node *np = ddata->dev->of_node; 163 const __be32 *ranges; 164 u32 nr_addr, nr_size; 165 int len, error; 166 167 ranges = of_get_property(np, "ranges", &len); 168 if (!ranges) { 169 dev_err(ddata->dev, "missing ranges for %pOF\n", np); 170 171 return -ENOENT; 172 } 173 174 len /= sizeof(*ranges); 175 176 if (len < 3) { 177 dev_err(ddata->dev, "incomplete ranges for %pOF\n", np); 178 179 return -EINVAL; 180 } 181 182 error = of_property_read_u32(np, "#address-cells", &nr_addr); 183 if (error) 184 return -ENOENT; 185 186 error = of_property_read_u32(np, "#size-cells", &nr_size); 187 if (error) 188 return -ENOENT; 189 190 if (nr_addr != 1 || nr_size != 1) { 191 dev_err(ddata->dev, "invalid ranges for %pOF\n", np); 192 193 return -EINVAL; 194 } 195 196 ranges++; 197 ddata->module_pa = of_translate_address(np, ranges++); 198 ddata->module_size = be32_to_cpup(ranges); 199 200 dev_dbg(ddata->dev, "interconnect target 0x%llx size 0x%x for %pOF\n", 201 ddata->module_pa, ddata->module_size, np); 202 203 return 0; 204 } 205 206 /** 207 * sysc_check_one_child - check child configuration 208 * @ddata: device driver data 209 * @np: child device node 210 * 211 * Let's avoid messy situations where we have new interconnect target 212 * node but children have "ti,hwmods". These belong to the interconnect 213 * target node and are managed by this driver. 214 */ 215 static int sysc_check_one_child(struct sysc *ddata, 216 struct device_node *np) 217 { 218 const char *name; 219 220 name = of_get_property(np, "ti,hwmods", NULL); 221 if (name) 222 dev_warn(ddata->dev, "really a child ti,hwmods property?"); 223 224 return 0; 225 } 226 227 static int sysc_check_children(struct sysc *ddata) 228 { 229 struct device_node *child; 230 int error; 231 232 for_each_child_of_node(ddata->dev->of_node, child) { 233 error = sysc_check_one_child(ddata, child); 234 if (error) 235 return error; 236 } 237 238 return 0; 239 } 240 241 /* 242 * So far only I2C uses 16-bit read access with clockactivity with revision 243 * in two registers with stride of 4. We can detect this based on the rev 244 * register size to configure things far enough to be able to properly read 245 * the revision register. 246 */ 247 static void sysc_check_quirk_16bit(struct sysc *ddata, struct resource *res) 248 { 249 if (resource_size(res) == 8) { 250 dev_dbg(ddata->dev, 251 "enabling 16-bit and clockactivity quirks\n"); 252 ddata->cfg.quirks |= SYSC_QUIRK_16BIT | SYSC_QUIRK_USE_CLOCKACT; 253 } 254 } 255 256 /** 257 * sysc_parse_one - parses the interconnect target module registers 258 * @ddata: device driver data 259 * @reg: register to parse 260 */ 261 static int sysc_parse_one(struct sysc *ddata, enum sysc_registers reg) 262 { 263 struct resource *res; 264 const char *name; 265 266 switch (reg) { 267 case SYSC_REVISION: 268 case SYSC_SYSCONFIG: 269 case SYSC_SYSSTATUS: 270 name = reg_names[reg]; 271 break; 272 default: 273 return -EINVAL; 274 } 275 276 res = platform_get_resource_byname(to_platform_device(ddata->dev), 277 IORESOURCE_MEM, name); 278 if (!res) { 279 dev_dbg(ddata->dev, "has no %s register\n", name); 280 ddata->offsets[reg] = -ENODEV; 281 282 return 0; 283 } 284 285 ddata->offsets[reg] = res->start - ddata->module_pa; 286 if (reg == SYSC_REVISION) 287 sysc_check_quirk_16bit(ddata, res); 288 289 return 0; 290 } 291 292 static int sysc_parse_registers(struct sysc *ddata) 293 { 294 int i, error; 295 296 for (i = 0; i < SYSC_MAX_REGS; i++) { 297 error = sysc_parse_one(ddata, i); 298 if (error) 299 return error; 300 } 301 302 return 0; 303 } 304 305 /** 306 * sysc_check_registers - check for misconfigured register overlaps 307 * @ddata: device driver data 308 */ 309 static int sysc_check_registers(struct sysc *ddata) 310 { 311 int i, j, nr_regs = 0, nr_matches = 0; 312 313 for (i = 0; i < SYSC_MAX_REGS; i++) { 314 if (ddata->offsets[i] < 0) 315 continue; 316 317 if (ddata->offsets[i] > (ddata->module_size - 4)) { 318 dev_err(ddata->dev, "register outside module range"); 319 320 return -EINVAL; 321 } 322 323 for (j = 0; j < SYSC_MAX_REGS; j++) { 324 if (ddata->offsets[j] < 0) 325 continue; 326 327 if (ddata->offsets[i] == ddata->offsets[j]) 328 nr_matches++; 329 } 330 nr_regs++; 331 } 332 333 if (nr_regs < 1) { 334 dev_err(ddata->dev, "missing registers\n"); 335 336 return -EINVAL; 337 } 338 339 if (nr_matches > nr_regs) { 340 dev_err(ddata->dev, "overlapping registers: (%i/%i)", 341 nr_regs, nr_matches); 342 343 return -EINVAL; 344 } 345 346 return 0; 347 } 348 349 /** 350 * syc_ioremap - ioremap register space for the interconnect target module 351 * @ddata: deviec driver data 352 * 353 * Note that the interconnect target module registers can be anywhere 354 * within the first child device address space. For example, SGX has 355 * them at offset 0x1fc00 in the 32MB module address space. We just 356 * what we need around the interconnect target module registers. 357 */ 358 static int sysc_ioremap(struct sysc *ddata) 359 { 360 u32 size = 0; 361 362 if (ddata->offsets[SYSC_SYSSTATUS] >= 0) 363 size = ddata->offsets[SYSC_SYSSTATUS]; 364 else if (ddata->offsets[SYSC_SYSCONFIG] >= 0) 365 size = ddata->offsets[SYSC_SYSCONFIG]; 366 else if (ddata->offsets[SYSC_REVISION] >= 0) 367 size = ddata->offsets[SYSC_REVISION]; 368 else 369 return -EINVAL; 370 371 size &= 0xfff00; 372 size += SZ_256; 373 374 ddata->module_va = devm_ioremap(ddata->dev, 375 ddata->module_pa, 376 size); 377 if (!ddata->module_va) 378 return -EIO; 379 380 return 0; 381 } 382 383 /** 384 * sysc_map_and_check_registers - ioremap and check device registers 385 * @ddata: device driver data 386 */ 387 static int sysc_map_and_check_registers(struct sysc *ddata) 388 { 389 int error; 390 391 error = sysc_parse_and_check_child_range(ddata); 392 if (error) 393 return error; 394 395 error = sysc_check_children(ddata); 396 if (error) 397 return error; 398 399 error = sysc_parse_registers(ddata); 400 if (error) 401 return error; 402 403 error = sysc_ioremap(ddata); 404 if (error) 405 return error; 406 407 error = sysc_check_registers(ddata); 408 if (error) 409 return error; 410 411 return 0; 412 } 413 414 /** 415 * sysc_show_rev - read and show interconnect target module revision 416 * @bufp: buffer to print the information to 417 * @ddata: device driver data 418 */ 419 static int sysc_show_rev(char *bufp, struct sysc *ddata) 420 { 421 int len; 422 423 if (ddata->offsets[SYSC_REVISION] < 0) 424 return sprintf(bufp, ":NA"); 425 426 len = sprintf(bufp, ":%08x", ddata->revision); 427 428 return len; 429 } 430 431 static int sysc_show_reg(struct sysc *ddata, 432 char *bufp, enum sysc_registers reg) 433 { 434 if (ddata->offsets[reg] < 0) 435 return sprintf(bufp, ":NA"); 436 437 return sprintf(bufp, ":%x", ddata->offsets[reg]); 438 } 439 440 /** 441 * sysc_show_registers - show information about interconnect target module 442 * @ddata: device driver data 443 */ 444 static void sysc_show_registers(struct sysc *ddata) 445 { 446 char buf[128]; 447 char *bufp = buf; 448 int i; 449 450 for (i = 0; i < SYSC_MAX_REGS; i++) 451 bufp += sysc_show_reg(ddata, bufp, i); 452 453 bufp += sysc_show_rev(bufp, ddata); 454 455 dev_dbg(ddata->dev, "%llx:%x%s\n", 456 ddata->module_pa, ddata->module_size, 457 buf); 458 } 459 460 static int __maybe_unused sysc_runtime_suspend(struct device *dev) 461 { 462 struct sysc *ddata; 463 int i; 464 465 ddata = dev_get_drvdata(dev); 466 467 if (ddata->legacy_mode) 468 return 0; 469 470 for (i = 0; i < SYSC_MAX_CLOCKS; i++) { 471 if (IS_ERR_OR_NULL(ddata->clocks[i])) 472 continue; 473 clk_disable(ddata->clocks[i]); 474 } 475 476 return 0; 477 } 478 479 static int __maybe_unused sysc_runtime_resume(struct device *dev) 480 { 481 struct sysc *ddata; 482 int i, error; 483 484 ddata = dev_get_drvdata(dev); 485 486 if (ddata->legacy_mode) 487 return 0; 488 489 for (i = 0; i < SYSC_MAX_CLOCKS; i++) { 490 if (IS_ERR_OR_NULL(ddata->clocks[i])) 491 continue; 492 error = clk_enable(ddata->clocks[i]); 493 if (error) 494 return error; 495 } 496 497 return 0; 498 } 499 500 static const struct dev_pm_ops sysc_pm_ops = { 501 SET_RUNTIME_PM_OPS(sysc_runtime_suspend, 502 sysc_runtime_resume, 503 NULL) 504 }; 505 506 /* At this point the module is configured enough to read the revision */ 507 static int sysc_init_module(struct sysc *ddata) 508 { 509 int error; 510 511 error = pm_runtime_get_sync(ddata->dev); 512 if (error < 0) { 513 pm_runtime_put_noidle(ddata->dev); 514 515 return 0; 516 } 517 ddata->revision = sysc_read_revision(ddata); 518 pm_runtime_put_sync(ddata->dev); 519 520 return 0; 521 } 522 523 static int sysc_init_sysc_mask(struct sysc *ddata) 524 { 525 struct device_node *np = ddata->dev->of_node; 526 int error; 527 u32 val; 528 529 error = of_property_read_u32(np, "ti,sysc-mask", &val); 530 if (error) 531 return 0; 532 533 if (val) 534 ddata->cfg.sysc_val = val & ddata->cap->sysc_mask; 535 else 536 ddata->cfg.sysc_val = ddata->cap->sysc_mask; 537 538 return 0; 539 } 540 541 static int sysc_init_idlemode(struct sysc *ddata, u8 *idlemodes, 542 const char *name) 543 { 544 struct device_node *np = ddata->dev->of_node; 545 struct property *prop; 546 const __be32 *p; 547 u32 val; 548 549 of_property_for_each_u32(np, name, prop, p, val) { 550 if (val >= SYSC_NR_IDLEMODES) { 551 dev_err(ddata->dev, "invalid idlemode: %i\n", val); 552 return -EINVAL; 553 } 554 *idlemodes |= (1 << val); 555 } 556 557 return 0; 558 } 559 560 static int sysc_init_idlemodes(struct sysc *ddata) 561 { 562 int error; 563 564 error = sysc_init_idlemode(ddata, &ddata->cfg.midlemodes, 565 "ti,sysc-midle"); 566 if (error) 567 return error; 568 569 error = sysc_init_idlemode(ddata, &ddata->cfg.sidlemodes, 570 "ti,sysc-sidle"); 571 if (error) 572 return error; 573 574 return 0; 575 } 576 577 /* 578 * Only some devices on omap4 and later have SYSCONFIG reset done 579 * bit. We can detect this if there is no SYSSTATUS at all, or the 580 * SYSTATUS bit 0 is not used. Note that some SYSSTATUS registers 581 * have multiple bits for the child devices like OHCI and EHCI. 582 * Depends on SYSC being parsed first. 583 */ 584 static int sysc_init_syss_mask(struct sysc *ddata) 585 { 586 struct device_node *np = ddata->dev->of_node; 587 int error; 588 u32 val; 589 590 error = of_property_read_u32(np, "ti,syss-mask", &val); 591 if (error) { 592 if ((ddata->cap->type == TI_SYSC_OMAP4 || 593 ddata->cap->type == TI_SYSC_OMAP4_TIMER) && 594 (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET)) 595 ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS; 596 597 return 0; 598 } 599 600 if (!(val & 1) && (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET)) 601 ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS; 602 603 ddata->cfg.syss_mask = val; 604 605 return 0; 606 } 607 608 /* Device tree configured quirks */ 609 struct sysc_dts_quirk { 610 const char *name; 611 u32 mask; 612 }; 613 614 static const struct sysc_dts_quirk sysc_dts_quirks[] = { 615 { .name = "ti,no-idle-on-init", 616 .mask = SYSC_QUIRK_NO_IDLE_ON_INIT, }, 617 { .name = "ti,no-reset-on-init", 618 .mask = SYSC_QUIRK_NO_RESET_ON_INIT, }, 619 }; 620 621 static int sysc_init_dts_quirks(struct sysc *ddata) 622 { 623 struct device_node *np = ddata->dev->of_node; 624 const struct property *prop; 625 int i, len, error; 626 u32 val; 627 628 ddata->legacy_mode = of_get_property(np, "ti,hwmods", NULL); 629 630 for (i = 0; i < ARRAY_SIZE(sysc_dts_quirks); i++) { 631 prop = of_get_property(np, sysc_dts_quirks[i].name, &len); 632 if (!prop) 633 break; 634 635 ddata->cfg.quirks |= sysc_dts_quirks[i].mask; 636 } 637 638 error = of_property_read_u32(np, "ti,sysc-delay-us", &val); 639 if (!error) { 640 if (val > 255) { 641 dev_warn(ddata->dev, "bad ti,sysc-delay-us: %i\n", 642 val); 643 } 644 645 ddata->cfg.srst_udelay = (u8)val; 646 } 647 648 return 0; 649 } 650 651 static void sysc_unprepare(struct sysc *ddata) 652 { 653 int i; 654 655 for (i = 0; i < SYSC_MAX_CLOCKS; i++) { 656 if (!IS_ERR_OR_NULL(ddata->clocks[i])) 657 clk_unprepare(ddata->clocks[i]); 658 } 659 } 660 661 /* 662 * Common sysc register bits found on omap2, also known as type1 663 */ 664 static const struct sysc_regbits sysc_regbits_omap2 = { 665 .dmadisable_shift = -ENODEV, 666 .midle_shift = 12, 667 .sidle_shift = 3, 668 .clkact_shift = 8, 669 .emufree_shift = 5, 670 .enwkup_shift = 2, 671 .srst_shift = 1, 672 .autoidle_shift = 0, 673 }; 674 675 static const struct sysc_capabilities sysc_omap2 = { 676 .type = TI_SYSC_OMAP2, 677 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY | SYSC_OMAP2_EMUFREE | 678 SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_SOFTRESET | 679 SYSC_OMAP2_AUTOIDLE, 680 .regbits = &sysc_regbits_omap2, 681 }; 682 683 /* All omap2 and 3 timers, and timers 1, 2 & 10 on omap 4 and 5 */ 684 static const struct sysc_capabilities sysc_omap2_timer = { 685 .type = TI_SYSC_OMAP2_TIMER, 686 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY | SYSC_OMAP2_EMUFREE | 687 SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_SOFTRESET | 688 SYSC_OMAP2_AUTOIDLE, 689 .regbits = &sysc_regbits_omap2, 690 .mod_quirks = SYSC_QUIRK_USE_CLOCKACT, 691 }; 692 693 /* 694 * SHAM2 (SHA1/MD5) sysc found on omap3, a variant of sysc_regbits_omap2 695 * with different sidle position 696 */ 697 static const struct sysc_regbits sysc_regbits_omap3_sham = { 698 .dmadisable_shift = -ENODEV, 699 .midle_shift = -ENODEV, 700 .sidle_shift = 4, 701 .clkact_shift = -ENODEV, 702 .enwkup_shift = -ENODEV, 703 .srst_shift = 1, 704 .autoidle_shift = 0, 705 .emufree_shift = -ENODEV, 706 }; 707 708 static const struct sysc_capabilities sysc_omap3_sham = { 709 .type = TI_SYSC_OMAP3_SHAM, 710 .sysc_mask = SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE, 711 .regbits = &sysc_regbits_omap3_sham, 712 }; 713 714 /* 715 * AES register bits found on omap3 and later, a variant of 716 * sysc_regbits_omap2 with different sidle position 717 */ 718 static const struct sysc_regbits sysc_regbits_omap3_aes = { 719 .dmadisable_shift = -ENODEV, 720 .midle_shift = -ENODEV, 721 .sidle_shift = 6, 722 .clkact_shift = -ENODEV, 723 .enwkup_shift = -ENODEV, 724 .srst_shift = 1, 725 .autoidle_shift = 0, 726 .emufree_shift = -ENODEV, 727 }; 728 729 static const struct sysc_capabilities sysc_omap3_aes = { 730 .type = TI_SYSC_OMAP3_AES, 731 .sysc_mask = SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE, 732 .regbits = &sysc_regbits_omap3_aes, 733 }; 734 735 /* 736 * Common sysc register bits found on omap4, also known as type2 737 */ 738 static const struct sysc_regbits sysc_regbits_omap4 = { 739 .dmadisable_shift = 16, 740 .midle_shift = 4, 741 .sidle_shift = 2, 742 .clkact_shift = -ENODEV, 743 .enwkup_shift = -ENODEV, 744 .emufree_shift = 1, 745 .srst_shift = 0, 746 .autoidle_shift = -ENODEV, 747 }; 748 749 static const struct sysc_capabilities sysc_omap4 = { 750 .type = TI_SYSC_OMAP4, 751 .sysc_mask = SYSC_OMAP4_DMADISABLE | SYSC_OMAP4_FREEEMU | 752 SYSC_OMAP4_SOFTRESET, 753 .regbits = &sysc_regbits_omap4, 754 }; 755 756 static const struct sysc_capabilities sysc_omap4_timer = { 757 .type = TI_SYSC_OMAP4_TIMER, 758 .sysc_mask = SYSC_OMAP4_DMADISABLE | SYSC_OMAP4_FREEEMU | 759 SYSC_OMAP4_SOFTRESET, 760 .regbits = &sysc_regbits_omap4, 761 }; 762 763 /* 764 * Common sysc register bits found on omap4, also known as type3 765 */ 766 static const struct sysc_regbits sysc_regbits_omap4_simple = { 767 .dmadisable_shift = -ENODEV, 768 .midle_shift = 2, 769 .sidle_shift = 0, 770 .clkact_shift = -ENODEV, 771 .enwkup_shift = -ENODEV, 772 .srst_shift = -ENODEV, 773 .emufree_shift = -ENODEV, 774 .autoidle_shift = -ENODEV, 775 }; 776 777 static const struct sysc_capabilities sysc_omap4_simple = { 778 .type = TI_SYSC_OMAP4_SIMPLE, 779 .regbits = &sysc_regbits_omap4_simple, 780 }; 781 782 /* 783 * SmartReflex sysc found on omap34xx 784 */ 785 static const struct sysc_regbits sysc_regbits_omap34xx_sr = { 786 .dmadisable_shift = -ENODEV, 787 .midle_shift = -ENODEV, 788 .sidle_shift = -ENODEV, 789 .clkact_shift = 20, 790 .enwkup_shift = -ENODEV, 791 .srst_shift = -ENODEV, 792 .emufree_shift = -ENODEV, 793 .autoidle_shift = -ENODEV, 794 }; 795 796 static const struct sysc_capabilities sysc_34xx_sr = { 797 .type = TI_SYSC_OMAP34XX_SR, 798 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY, 799 .regbits = &sysc_regbits_omap34xx_sr, 800 .mod_quirks = SYSC_QUIRK_USE_CLOCKACT | SYSC_QUIRK_UNCACHED, 801 }; 802 803 /* 804 * SmartReflex sysc found on omap36xx and later 805 */ 806 static const struct sysc_regbits sysc_regbits_omap36xx_sr = { 807 .dmadisable_shift = -ENODEV, 808 .midle_shift = -ENODEV, 809 .sidle_shift = 24, 810 .clkact_shift = -ENODEV, 811 .enwkup_shift = 26, 812 .srst_shift = -ENODEV, 813 .emufree_shift = -ENODEV, 814 .autoidle_shift = -ENODEV, 815 }; 816 817 static const struct sysc_capabilities sysc_36xx_sr = { 818 .type = TI_SYSC_OMAP36XX_SR, 819 .sysc_mask = SYSC_OMAP3_SR_ENAWAKEUP, 820 .regbits = &sysc_regbits_omap36xx_sr, 821 .mod_quirks = SYSC_QUIRK_UNCACHED, 822 }; 823 824 static const struct sysc_capabilities sysc_omap4_sr = { 825 .type = TI_SYSC_OMAP4_SR, 826 .regbits = &sysc_regbits_omap36xx_sr, 827 }; 828 829 /* 830 * McASP register bits found on omap4 and later 831 */ 832 static const struct sysc_regbits sysc_regbits_omap4_mcasp = { 833 .dmadisable_shift = -ENODEV, 834 .midle_shift = -ENODEV, 835 .sidle_shift = 0, 836 .clkact_shift = -ENODEV, 837 .enwkup_shift = -ENODEV, 838 .srst_shift = -ENODEV, 839 .emufree_shift = -ENODEV, 840 .autoidle_shift = -ENODEV, 841 }; 842 843 static const struct sysc_capabilities sysc_omap4_mcasp = { 844 .type = TI_SYSC_OMAP4_MCASP, 845 .regbits = &sysc_regbits_omap4_mcasp, 846 }; 847 848 /* 849 * FS USB host found on omap4 and later 850 */ 851 static const struct sysc_regbits sysc_regbits_omap4_usb_host_fs = { 852 .dmadisable_shift = -ENODEV, 853 .midle_shift = -ENODEV, 854 .sidle_shift = 24, 855 .clkact_shift = -ENODEV, 856 .enwkup_shift = 26, 857 .srst_shift = -ENODEV, 858 .emufree_shift = -ENODEV, 859 .autoidle_shift = -ENODEV, 860 }; 861 862 static const struct sysc_capabilities sysc_omap4_usb_host_fs = { 863 .type = TI_SYSC_OMAP4_USB_HOST_FS, 864 .sysc_mask = SYSC_OMAP2_ENAWAKEUP, 865 .regbits = &sysc_regbits_omap4_usb_host_fs, 866 }; 867 868 static int sysc_init_match(struct sysc *ddata) 869 { 870 const struct sysc_capabilities *cap; 871 872 cap = of_device_get_match_data(ddata->dev); 873 if (!cap) 874 return -EINVAL; 875 876 ddata->cap = cap; 877 if (ddata->cap) 878 ddata->cfg.quirks |= ddata->cap->mod_quirks; 879 880 return 0; 881 } 882 883 static int sysc_probe(struct platform_device *pdev) 884 { 885 struct sysc *ddata; 886 int error; 887 888 ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL); 889 if (!ddata) 890 return -ENOMEM; 891 892 ddata->dev = &pdev->dev; 893 platform_set_drvdata(pdev, ddata); 894 895 error = sysc_init_match(ddata); 896 if (error) 897 return error; 898 899 error = sysc_init_dts_quirks(ddata); 900 if (error) 901 goto unprepare; 902 903 error = sysc_get_clocks(ddata); 904 if (error) 905 return error; 906 907 error = sysc_map_and_check_registers(ddata); 908 if (error) 909 goto unprepare; 910 911 error = sysc_init_sysc_mask(ddata); 912 if (error) 913 goto unprepare; 914 915 error = sysc_init_idlemodes(ddata); 916 if (error) 917 goto unprepare; 918 919 error = sysc_init_syss_mask(ddata); 920 if (error) 921 goto unprepare; 922 923 pm_runtime_enable(ddata->dev); 924 925 error = sysc_init_module(ddata); 926 if (error) 927 goto unprepare; 928 929 error = pm_runtime_get_sync(ddata->dev); 930 if (error < 0) { 931 pm_runtime_put_noidle(ddata->dev); 932 pm_runtime_disable(ddata->dev); 933 goto unprepare; 934 } 935 936 pm_runtime_use_autosuspend(ddata->dev); 937 938 sysc_show_registers(ddata); 939 940 error = of_platform_populate(ddata->dev->of_node, 941 NULL, NULL, ddata->dev); 942 if (error) 943 goto err; 944 945 pm_runtime_mark_last_busy(ddata->dev); 946 pm_runtime_put_autosuspend(ddata->dev); 947 948 return 0; 949 950 err: 951 pm_runtime_dont_use_autosuspend(&pdev->dev); 952 pm_runtime_put_sync(&pdev->dev); 953 pm_runtime_disable(&pdev->dev); 954 unprepare: 955 sysc_unprepare(ddata); 956 957 return error; 958 } 959 960 static int sysc_remove(struct platform_device *pdev) 961 { 962 struct sysc *ddata = platform_get_drvdata(pdev); 963 int error; 964 965 error = pm_runtime_get_sync(ddata->dev); 966 if (error < 0) { 967 pm_runtime_put_noidle(ddata->dev); 968 pm_runtime_disable(ddata->dev); 969 goto unprepare; 970 } 971 972 of_platform_depopulate(&pdev->dev); 973 974 pm_runtime_dont_use_autosuspend(&pdev->dev); 975 pm_runtime_put_sync(&pdev->dev); 976 pm_runtime_disable(&pdev->dev); 977 978 unprepare: 979 sysc_unprepare(ddata); 980 981 return 0; 982 } 983 984 static const struct of_device_id sysc_match[] = { 985 { .compatible = "ti,sysc-omap2", .data = &sysc_omap2, }, 986 { .compatible = "ti,sysc-omap2-timer", .data = &sysc_omap2_timer, }, 987 { .compatible = "ti,sysc-omap4", .data = &sysc_omap4, }, 988 { .compatible = "ti,sysc-omap4-timer", .data = &sysc_omap4_timer, }, 989 { .compatible = "ti,sysc-omap4-simple", .data = &sysc_omap4_simple, }, 990 { .compatible = "ti,sysc-omap3430-sr", .data = &sysc_34xx_sr, }, 991 { .compatible = "ti,sysc-omap3630-sr", .data = &sysc_36xx_sr, }, 992 { .compatible = "ti,sysc-omap4-sr", .data = &sysc_omap4_sr, }, 993 { .compatible = "ti,sysc-omap3-sham", .data = &sysc_omap3_sham, }, 994 { .compatible = "ti,sysc-omap-aes", .data = &sysc_omap3_aes, }, 995 { .compatible = "ti,sysc-mcasp", .data = &sysc_omap4_mcasp, }, 996 { .compatible = "ti,sysc-usb-host-fs", 997 .data = &sysc_omap4_usb_host_fs, }, 998 { }, 999 }; 1000 MODULE_DEVICE_TABLE(of, sysc_match); 1001 1002 static struct platform_driver sysc_driver = { 1003 .probe = sysc_probe, 1004 .remove = sysc_remove, 1005 .driver = { 1006 .name = "ti-sysc", 1007 .of_match_table = sysc_match, 1008 .pm = &sysc_pm_ops, 1009 }, 1010 }; 1011 module_platform_driver(sysc_driver); 1012 1013 MODULE_DESCRIPTION("TI sysc interconnect target driver"); 1014 MODULE_LICENSE("GPL v2"); 1015