1# SPDX-License-Identifier: GPL-2.0 2# 3# Bus Devices 4# 5 6menu "Bus devices" 7 8config ARM_CCI 9 bool 10 11config ARM_CCI400_COMMON 12 bool 13 select ARM_CCI 14 15config ARM_CCI400_PORT_CTRL 16 bool 17 depends on ARM && OF && CPU_V7 18 select ARM_CCI400_COMMON 19 help 20 Low level power management driver for CCI400 cache coherent 21 interconnect for ARM platforms. 22 23config ARM_INTEGRATOR_LM 24 bool "ARM Integrator Logic Module bus" 25 depends on HAS_IOMEM 26 depends on ARCH_INTEGRATOR || COMPILE_TEST 27 default ARCH_INTEGRATOR 28 help 29 Say y here to enable support for the ARM Logic Module bus 30 found on the ARM Integrator AP (Application Platform) 31 32config BRCMSTB_GISB_ARB 33 tristate "Broadcom STB GISB bus arbiter" 34 depends on ARCH_BRCMSTB || BMIPS_GENERIC 35 default ARCH_BRCMSTB || BMIPS_GENERIC 36 help 37 Driver for the Broadcom Set Top Box System-on-a-chip internal bus 38 arbiter. This driver provides timeout and target abort error handling 39 and internal bus master decoding. 40 41config MOXTET 42 tristate "CZ.NIC Turris Mox module configuration bus" 43 depends on SPI_MASTER && OF 44 help 45 Say yes here to add support for the module configuration bus found 46 on CZ.NIC's Turris Mox. This is needed for the ability to discover 47 the order in which the modules are connected and to get/set some of 48 their settings. For example the GPIOs on Mox SFP module are 49 configured through this bus. 50 51config HISILICON_LPC 52 bool "Support for ISA I/O space on HiSilicon Hip06/7" 53 depends on (ARM64 && ARCH_HISI) || (COMPILE_TEST && !ALPHA && !HEXAGON && !PARISC) 54 depends on HAS_IOPORT 55 select INDIRECT_PIO if ARM64 56 help 57 Driver to enable I/O access to devices attached to the Low Pin 58 Count bus on the HiSilicon Hip06/7 SoC. 59 60config IMX_AIPSTZ 61 tristate "Support for IMX Secure AHB to IP Slave bus (AIPSTZ) bridge" 62 depends on ARCH_MXC 63 help 64 Enable support for IMX AIPSTZ bridge. 65 66config IMX_WEIM 67 bool "Freescale EIM DRIVER" 68 depends on ARCH_MXC || COMPILE_TEST 69 help 70 Driver for i.MX WEIM controller. 71 The WEIM(Wireless External Interface Module) works like a bus. 72 You can attach many different devices on it, such as NOR, onenand. 73 74config INTEL_IXP4XX_EB 75 bool "Intel IXP4xx expansion bus interface driver" 76 depends on HAS_IOMEM 77 depends on ARCH_IXP4XX || COMPILE_TEST 78 default ARCH_IXP4XX 79 select MFD_SYSCON 80 help 81 Driver for the Intel IXP4xx expansion bus interface. The driver is 82 needed to set up various chip select configuration parameters before 83 devices on the expansion bus can be discovered. 84 85config MIPS_CDMM 86 bool "MIPS Common Device Memory Map (CDMM) Driver" 87 depends on CPU_MIPSR2 || CPU_MIPSR5 88 help 89 Driver needed for the MIPS Common Device Memory Map bus in MIPS 90 cores. This bus is for per-CPU tightly coupled devices such as the 91 Fast Debug Channel (FDC). 92 93 For this to work, either your bootloader needs to enable the CDMM 94 region at an unused physical address on the boot CPU, or else your 95 platform code needs to implement mips_cdmm_phys_base() (see 96 asm/cdmm.h). 97 98config MVEBU_MBUS 99 bool 100 depends on PLAT_ORION 101 help 102 Driver needed for the MBus configuration on Marvell EBU SoCs 103 (Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP). 104 105config OMAP_INTERCONNECT 106 tristate "OMAP INTERCONNECT DRIVER" 107 depends on ARCH_OMAP2PLUS 108 109 help 110 Driver to enable OMAP interconnect error handling driver. 111 112config OMAP_OCP2SCP 113 tristate "OMAP OCP2SCP DRIVER" 114 depends on ARCH_OMAP2PLUS || COMPILE_TEST 115 help 116 Driver to enable ocp2scp module which transforms ocp interface 117 protocol to scp protocol. In OMAP4, USB PHY is connected via 118 OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via 119 OCP2SCP. 120 121config QCOM_EBI2 122 bool "Qualcomm External Bus Interface 2 (EBI2)" 123 depends on HAS_IOMEM 124 depends on ARCH_QCOM || COMPILE_TEST 125 default ARCH_QCOM 126 help 127 Say y here to enable support for the Qualcomm External Bus 128 Interface 2, which can be used to connect things like NAND Flash, 129 SRAM, ethernet adapters, FPGAs and LCD displays. 130 131config QCOM_SSC_BLOCK_BUS 132 bool "Qualcomm SSC Block Bus Init Driver" 133 depends on ARCH_QCOM 134 help 135 Say y here to enable support for initializing the bus that connects 136 the SSC block's internal bus to the cNoC (configurantion NoC) on 137 (some) qcom SoCs. 138 The SSC (Snapdragon Sensor Core) block contains a gpio controller, 139 i2c/spi/uart controllers, a hexagon core, and a clock controller 140 which provides clocks for the above. 141 142config STM32_FIREWALL 143 bool "STM32 Firewall framework" 144 depends on (ARCH_STM32 || COMPILE_TEST) && OF 145 select OF_DYNAMIC 146 help 147 Say y to enable STM32 firewall framework and its services. Firewall 148 controllers will be able to register to the framework. Access for 149 hardware resources linked to a firewall controller can be requested 150 through this STM32 framework. 151 152config SUN50I_DE2_BUS 153 bool "Allwinner A64 DE2 Bus Driver" 154 default ARM64 155 depends on ARCH_SUNXI 156 select SUNXI_SRAM 157 help 158 Say y here to enable support for Allwinner A64 DE2 bus driver. It's 159 mostly transparent, but a SRAM region needs to be claimed in the SRAM 160 controller to make the all blocks in the DE2 part accessible. 161 162config SUNXI_RSB 163 tristate "Allwinner sunXi Reduced Serial Bus Driver" 164 default MACH_SUN8I || MACH_SUN9I || ARM64 165 depends on ARCH_SUNXI 166 select REGMAP 167 help 168 Say y here to enable support for Allwinner's Reduced Serial Bus 169 (RSB) support. This controller is responsible for communicating 170 with various RSB based devices, such as AXP223, AXP8XX PMICs, 171 and AC100/AC200 ICs. 172 173config TEGRA_ACONNECT 174 tristate "Tegra ACONNECT Bus Driver" 175 depends on ARCH_TEGRA 176 depends on OF && PM 177 help 178 Driver for the Tegra ACONNECT bus which is used to interface with 179 the devices inside the Audio Processing Engine (APE) for 180 Tegra210 and later. 181 182config TEGRA_GMI 183 tristate "Tegra Generic Memory Interface bus driver" 184 depends on ARCH_TEGRA 185 help 186 Driver for the Tegra Generic Memory Interface bus which can be used 187 to attach devices such as NOR, UART, FPGA and more. 188 189config TI_PWMSS 190 bool 191 default y if (ARCH_OMAP2PLUS) && (PWM_TIECAP || PWM_TIEHRPWM || TI_EQEP) 192 help 193 PWM Subsystem driver support for AM33xx SOC. 194 195 PWM submodules require PWM config space access from submodule 196 drivers and require common parent driver support. 197 198config TI_SYSC 199 bool "TI sysc interconnect target module driver" 200 depends on ARCH_OMAP2PLUS || ARCH_K3 201 default y 202 help 203 Generic driver for Texas Instruments interconnect target module 204 found on many TI SoCs. 205 206config TS_NBUS 207 tristate "Technologic Systems NBUS Driver" 208 depends on SOC_IMX28 209 depends on OF_GPIO && PWM 210 help 211 Driver for the Technologic Systems NBUS which is used to interface 212 with the peripherals in the FPGA of the TS-4600 SoM. 213 214config UNIPHIER_SYSTEM_BUS 215 tristate "UniPhier System Bus driver" 216 depends on ARCH_UNIPHIER && OF 217 default y 218 help 219 Support for UniPhier System Bus, a simple external bus. This is 220 needed to use on-board devices connected to UniPhier SoCs. 221 222config VEXPRESS_CONFIG 223 tristate "Versatile Express configuration bus" 224 default y if ARCH_VEXPRESS 225 depends on ARM || ARM64 226 depends on OF 227 select REGMAP 228 help 229 Platform configuration infrastructure for the ARM Ltd. 230 Versatile Express. 231 232config DA8XX_MSTPRI 233 bool "TI da8xx master peripheral priority driver" 234 depends on ARCH_DAVINCI_DA8XX 235 help 236 Driver for Texas Instruments da8xx master peripheral priority 237 configuration. Allows to adjust the priorities of all master 238 peripherals. 239 240source "drivers/bus/fsl-mc/Kconfig" 241source "drivers/bus/mhi/Kconfig" 242 243endmenu 244