1# SPDX-License-Identifier: GPL-2.0 2# 3# Bus Devices 4# 5 6menu "Bus devices" 7 8config ARM_CCI 9 bool 10 11config ARM_CCI_PMU 12 bool 13 select ARM_CCI 14 15config ARM_CCI400_COMMON 16 bool 17 select ARM_CCI 18 19config ARM_CCI400_PMU 20 bool "ARM CCI400 PMU support" 21 depends on (ARM && CPU_V7) || ARM64 22 depends on PERF_EVENTS 23 select ARM_CCI400_COMMON 24 select ARM_CCI_PMU 25 help 26 Support for PMU events monitoring on the ARM CCI-400 (cache coherent 27 interconnect). CCI-400 supports counting events related to the 28 connected slave/master interfaces. 29 30config ARM_CCI400_PORT_CTRL 31 bool 32 depends on ARM && OF && CPU_V7 33 select ARM_CCI400_COMMON 34 help 35 Low level power management driver for CCI400 cache coherent 36 interconnect for ARM platforms. 37 38config ARM_CCI5xx_PMU 39 bool "ARM CCI-500/CCI-550 PMU support" 40 depends on (ARM && CPU_V7) || ARM64 41 depends on PERF_EVENTS 42 select ARM_CCI_PMU 43 help 44 Support for PMU events monitoring on the ARM CCI-500/CCI-550 cache 45 coherent interconnects. Both of them provide 8 independent event counters, 46 which can count events pertaining to the slave/master interfaces as well 47 as the internal events to the CCI. 48 49 If unsure, say Y 50 51config BRCMSTB_GISB_ARB 52 bool "Broadcom STB GISB bus arbiter" 53 depends on ARM || ARM64 || MIPS 54 default ARCH_BRCMSTB || BMIPS_GENERIC 55 help 56 Driver for the Broadcom Set Top Box System-on-a-chip internal bus 57 arbiter. This driver provides timeout and target abort error handling 58 and internal bus master decoding. 59 60config IMX_WEIM 61 bool "Freescale EIM DRIVER" 62 depends on ARCH_MXC 63 help 64 Driver for i.MX WEIM controller. 65 The WEIM(Wireless External Interface Module) works like a bus. 66 You can attach many different devices on it, such as NOR, onenand. 67 68config MIPS_CDMM 69 bool "MIPS Common Device Memory Map (CDMM) Driver" 70 depends on CPU_MIPSR2 71 help 72 Driver needed for the MIPS Common Device Memory Map bus in MIPS 73 cores. This bus is for per-CPU tightly coupled devices such as the 74 Fast Debug Channel (FDC). 75 76 For this to work, either your bootloader needs to enable the CDMM 77 region at an unused physical address on the boot CPU, or else your 78 platform code needs to implement mips_cdmm_phys_base() (see 79 asm/cdmm.h). 80 81config MVEBU_MBUS 82 bool 83 depends on PLAT_ORION 84 help 85 Driver needed for the MBus configuration on Marvell EBU SoCs 86 (Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP). 87 88config OMAP_INTERCONNECT 89 tristate "OMAP INTERCONNECT DRIVER" 90 depends on ARCH_OMAP2PLUS 91 92 help 93 Driver to enable OMAP interconnect error handling driver. 94 95config OMAP_OCP2SCP 96 tristate "OMAP OCP2SCP DRIVER" 97 depends on ARCH_OMAP2PLUS 98 help 99 Driver to enable ocp2scp module which transforms ocp interface 100 protocol to scp protocol. In OMAP4, USB PHY is connected via 101 OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via 102 OCP2SCP. 103 104config QCOM_EBI2 105 bool "Qualcomm External Bus Interface 2 (EBI2)" 106 depends on HAS_IOMEM 107 depends on ARCH_QCOM || COMPILE_TEST 108 default ARCH_QCOM 109 help 110 Say y here to enable support for the Qualcomm External Bus 111 Interface 2, which can be used to connect things like NAND Flash, 112 SRAM, ethernet adapters, FPGAs and LCD displays. 113 114config SIMPLE_PM_BUS 115 tristate "Simple Power-Managed Bus Driver" 116 depends on OF && PM 117 help 118 Driver for transparent busses that don't need a real driver, but 119 where the bus controller is part of a PM domain, or under the control 120 of a functional clock, and thus relies on runtime PM for managing 121 this PM domain and/or clock. 122 An example of such a bus controller is the Renesas Bus State 123 Controller (BSC, sometimes called "LBSC within Bus Bridge", or 124 "External Bus Interface") as found on several Renesas ARM SoCs. 125 126config SUNXI_RSB 127 tristate "Allwinner sunXi Reduced Serial Bus Driver" 128 default MACH_SUN8I || MACH_SUN9I || ARM64 129 depends on ARCH_SUNXI 130 select REGMAP 131 help 132 Say y here to enable support for Allwinner's Reduced Serial Bus 133 (RSB) support. This controller is responsible for communicating 134 with various RSB based devices, such as AXP223, AXP8XX PMICs, 135 and AC100/AC200 ICs. 136 137config TEGRA_ACONNECT 138 tristate "Tegra ACONNECT Bus Driver" 139 depends on ARCH_TEGRA_210_SOC 140 depends on OF && PM 141 select PM_CLK 142 help 143 Driver for the Tegra ACONNECT bus which is used to interface with 144 the devices inside the Audio Processing Engine (APE) for Tegra210. 145 146config TEGRA_GMI 147 tristate "Tegra Generic Memory Interface bus driver" 148 depends on ARCH_TEGRA 149 help 150 Driver for the Tegra Generic Memory Interface bus which can be used 151 to attach devices such as NOR, UART, FPGA and more. 152 153config TI_SYSC 154 bool "TI sysc interconnect target module driver" 155 depends on ARCH_OMAP2PLUS 156 help 157 Generic driver for Texas Instruments interconnect target module 158 found on many TI SoCs. 159 160config TS_NBUS 161 tristate "Technologic Systems NBUS Driver" 162 depends on SOC_IMX28 163 depends on OF_GPIO && PWM 164 help 165 Driver for the Technologic Systems NBUS which is used to interface 166 with the peripherals in the FPGA of the TS-4600 SoM. 167 168config UNIPHIER_SYSTEM_BUS 169 tristate "UniPhier System Bus driver" 170 depends on ARCH_UNIPHIER && OF 171 default y 172 help 173 Support for UniPhier System Bus, a simple external bus. This is 174 needed to use on-board devices connected to UniPhier SoCs. 175 176config VEXPRESS_CONFIG 177 bool "Versatile Express configuration bus" 178 default y if ARCH_VEXPRESS 179 depends on ARM || ARM64 180 depends on OF 181 select REGMAP 182 help 183 Platform configuration infrastructure for the ARM Ltd. 184 Versatile Express. 185 186config DA8XX_MSTPRI 187 bool "TI da8xx master peripheral priority driver" 188 depends on ARCH_DAVINCI_DA8XX 189 help 190 Driver for Texas Instruments da8xx master peripheral priority 191 configuration. Allows to adjust the priorities of all master 192 peripherals. 193 194endmenu 195