1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Bluetooth Software UART Qualcomm protocol 4 * 5 * HCI_IBS (HCI In-Band Sleep) is Qualcomm's power management 6 * protocol extension to H4. 7 * 8 * Copyright (C) 2007 Texas Instruments, Inc. 9 * Copyright (c) 2010, 2012, 2018 The Linux Foundation. All rights reserved. 10 * 11 * Acknowledgements: 12 * This file is based on hci_ll.c, which was... 13 * Written by Ohad Ben-Cohen <ohad@bencohen.org> 14 * which was in turn based on hci_h4.c, which was written 15 * by Maxim Krasnyansky and Marcel Holtmann. 16 */ 17 18 #include <linux/kernel.h> 19 #include <linux/clk.h> 20 #include <linux/completion.h> 21 #include <linux/debugfs.h> 22 #include <linux/delay.h> 23 #include <linux/devcoredump.h> 24 #include <linux/device.h> 25 #include <linux/gpio/consumer.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/module.h> 28 #include <linux/of.h> 29 #include <linux/acpi.h> 30 #include <linux/platform_device.h> 31 #include <linux/pwrseq/consumer.h> 32 #include <linux/regulator/consumer.h> 33 #include <linux/serdev.h> 34 #include <linux/string_choices.h> 35 #include <linux/mutex.h> 36 #include <linux/unaligned.h> 37 38 #include <net/bluetooth/bluetooth.h> 39 #include <net/bluetooth/hci_core.h> 40 41 #include "hci_uart.h" 42 #include "btqca.h" 43 44 /* HCI_IBS protocol messages */ 45 #define HCI_IBS_SLEEP_IND 0xFE 46 #define HCI_IBS_WAKE_IND 0xFD 47 #define HCI_IBS_WAKE_ACK 0xFC 48 #define HCI_MAX_IBS_SIZE 10 49 50 #define IBS_WAKE_RETRANS_TIMEOUT_MS 100 51 #define IBS_BTSOC_TX_IDLE_TIMEOUT_MS 200 52 #define IBS_HOST_TX_IDLE_TIMEOUT_MS 2000 53 #define CMD_TRANS_TIMEOUT_MS 100 54 #define MEMDUMP_TIMEOUT_MS 8000 55 #define IBS_DISABLE_SSR_TIMEOUT_MS \ 56 (MEMDUMP_TIMEOUT_MS + FW_DOWNLOAD_TIMEOUT_MS) 57 #define FW_DOWNLOAD_TIMEOUT_MS 3000 58 59 /* susclk rate */ 60 #define SUSCLK_RATE_32KHZ 32768 61 62 /* Controller debug log header */ 63 #define QCA_DEBUG_HANDLE 0x2EDC 64 65 /* max retry count when init fails */ 66 #define MAX_INIT_RETRIES 3 67 68 /* Controller dump header */ 69 #define QCA_SSR_DUMP_HANDLE 0x0108 70 #define QCA_DUMP_PACKET_SIZE 255 71 #define QCA_LAST_SEQUENCE_NUM 0xFFFF 72 #define QCA_CRASHBYTE_PACKET_LEN 1096 73 #define QCA_MEMDUMP_BYTE 0xFB 74 75 enum qca_flags { 76 QCA_IBS_DISABLED, 77 QCA_DROP_VENDOR_EVENT, 78 QCA_SUSPENDING, 79 QCA_MEMDUMP_COLLECTION, 80 QCA_HW_ERROR_EVENT, 81 QCA_SSR_TRIGGERED, 82 QCA_BT_OFF, 83 QCA_ROM_FW, 84 QCA_DEBUGFS_CREATED, 85 }; 86 87 enum qca_capabilities { 88 QCA_CAP_WIDEBAND_SPEECH = BIT(0), 89 QCA_CAP_VALID_LE_STATES = BIT(1), 90 }; 91 92 /* HCI_IBS transmit side sleep protocol states */ 93 enum tx_ibs_states { 94 HCI_IBS_TX_ASLEEP, 95 HCI_IBS_TX_WAKING, 96 HCI_IBS_TX_AWAKE, 97 }; 98 99 /* HCI_IBS receive side sleep protocol states */ 100 enum rx_states { 101 HCI_IBS_RX_ASLEEP, 102 HCI_IBS_RX_AWAKE, 103 }; 104 105 /* HCI_IBS transmit and receive side clock state vote */ 106 enum hci_ibs_clock_state_vote { 107 HCI_IBS_VOTE_STATS_UPDATE, 108 HCI_IBS_TX_VOTE_CLOCK_ON, 109 HCI_IBS_TX_VOTE_CLOCK_OFF, 110 HCI_IBS_RX_VOTE_CLOCK_ON, 111 HCI_IBS_RX_VOTE_CLOCK_OFF, 112 }; 113 114 /* Controller memory dump states */ 115 enum qca_memdump_states { 116 QCA_MEMDUMP_IDLE, 117 QCA_MEMDUMP_COLLECTING, 118 QCA_MEMDUMP_COLLECTED, 119 QCA_MEMDUMP_TIMEOUT, 120 }; 121 122 struct qca_memdump_info { 123 u32 current_seq_no; 124 u32 received_dump; 125 u32 ram_dump_size; 126 }; 127 128 struct qca_memdump_event_hdr { 129 __u8 evt; 130 __u8 plen; 131 __u16 opcode; 132 __le16 seq_no; 133 __u8 reserved; 134 } __packed; 135 136 137 struct qca_dump_size { 138 __le32 dump_size; 139 } __packed; 140 141 struct qca_data { 142 struct hci_uart *hu; 143 struct sk_buff *rx_skb; 144 struct sk_buff_head txq; 145 struct sk_buff_head tx_wait_q; /* HCI_IBS wait queue */ 146 struct sk_buff_head rx_memdump_q; /* Memdump wait queue */ 147 spinlock_t hci_ibs_lock; /* HCI_IBS state lock */ 148 u8 tx_ibs_state; /* HCI_IBS transmit side power state*/ 149 u8 rx_ibs_state; /* HCI_IBS receive side power state */ 150 bool tx_vote; /* Clock must be on for TX */ 151 bool rx_vote; /* Clock must be on for RX */ 152 struct timer_list tx_idle_timer; 153 u32 tx_idle_delay; 154 struct timer_list wake_retrans_timer; 155 u32 wake_retrans; 156 struct workqueue_struct *workqueue; 157 struct work_struct ws_awake_rx; 158 struct work_struct ws_awake_device; 159 struct work_struct ws_rx_vote_off; 160 struct work_struct ws_tx_vote_off; 161 struct work_struct ctrl_memdump_evt; 162 struct delayed_work ctrl_memdump_timeout; 163 struct qca_memdump_info *qca_memdump; 164 unsigned long flags; 165 struct completion drop_ev_comp; 166 wait_queue_head_t suspend_wait_q; 167 enum qca_memdump_states memdump_state; 168 struct mutex hci_memdump_lock; 169 170 u16 fw_version; 171 u16 controller_id; 172 /* For debugging purpose */ 173 u64 ibs_sent_wacks; 174 u64 ibs_sent_slps; 175 u64 ibs_sent_wakes; 176 u64 ibs_recv_wacks; 177 u64 ibs_recv_slps; 178 u64 ibs_recv_wakes; 179 u64 vote_last_jif; 180 u32 vote_on_ms; 181 u32 vote_off_ms; 182 u64 tx_votes_on; 183 u64 rx_votes_on; 184 u64 tx_votes_off; 185 u64 rx_votes_off; 186 u64 votes_on; 187 u64 votes_off; 188 }; 189 190 enum qca_speed_type { 191 QCA_INIT_SPEED = 1, 192 QCA_OPER_SPEED 193 }; 194 195 /* 196 * Voltage regulator information required for configuring the 197 * QCA Bluetooth chipset 198 */ 199 struct qca_vreg { 200 const char *name; 201 unsigned int load_uA; 202 }; 203 204 struct qca_device_data { 205 enum qca_btsoc_type soc_type; 206 struct qca_vreg *vregs; 207 size_t num_vregs; 208 uint32_t capabilities; 209 }; 210 211 /* 212 * Platform data for the QCA Bluetooth power driver. 213 */ 214 struct qca_power { 215 struct device *dev; 216 struct regulator_bulk_data *vreg_bulk; 217 int num_vregs; 218 bool vregs_on; 219 struct pwrseq_desc *pwrseq; 220 }; 221 222 struct qca_serdev { 223 struct hci_uart serdev_hu; 224 struct gpio_desc *bt_en; 225 struct gpio_desc *sw_ctrl; 226 struct clk *susclk; 227 enum qca_btsoc_type btsoc_type; 228 struct qca_power *bt_power; 229 u32 init_speed; 230 u32 oper_speed; 231 bool bdaddr_property_broken; 232 const char *firmware_name[2]; 233 }; 234 235 static int qca_regulator_enable(struct qca_serdev *qcadev); 236 static void qca_regulator_disable(struct qca_serdev *qcadev); 237 static void qca_power_shutdown(struct hci_uart *hu); 238 static int qca_power_off(struct hci_dev *hdev); 239 static void qca_controller_memdump(struct work_struct *work); 240 static void qca_dmp_hdr(struct hci_dev *hdev, struct sk_buff *skb); 241 242 static enum qca_btsoc_type qca_soc_type(struct hci_uart *hu) 243 { 244 enum qca_btsoc_type soc_type; 245 246 if (hu->serdev) { 247 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); 248 249 soc_type = qsd->btsoc_type; 250 } else { 251 soc_type = QCA_ROME; 252 } 253 254 return soc_type; 255 } 256 257 static const char *qca_get_firmware_name(struct hci_uart *hu) 258 { 259 if (hu->serdev) { 260 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); 261 262 return qsd->firmware_name[0]; 263 } else { 264 return NULL; 265 } 266 } 267 268 static const char *qca_get_rampatch_name(struct hci_uart *hu) 269 { 270 if (hu->serdev) { 271 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); 272 273 return qsd->firmware_name[1]; 274 } else { 275 return NULL; 276 } 277 } 278 279 static void __serial_clock_on(struct tty_struct *tty) 280 { 281 /* TODO: Some chipset requires to enable UART clock on client 282 * side to save power consumption or manual work is required. 283 * Please put your code to control UART clock here if needed 284 */ 285 } 286 287 static void __serial_clock_off(struct tty_struct *tty) 288 { 289 /* TODO: Some chipset requires to disable UART clock on client 290 * side to save power consumption or manual work is required. 291 * Please put your code to control UART clock off here if needed 292 */ 293 } 294 295 /* serial_clock_vote needs to be called with the ibs lock held */ 296 static void serial_clock_vote(unsigned long vote, struct hci_uart *hu) 297 { 298 struct qca_data *qca = hu->priv; 299 unsigned int diff; 300 301 bool old_vote = (qca->tx_vote | qca->rx_vote); 302 bool new_vote; 303 304 switch (vote) { 305 case HCI_IBS_VOTE_STATS_UPDATE: 306 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif); 307 308 if (old_vote) 309 qca->vote_off_ms += diff; 310 else 311 qca->vote_on_ms += diff; 312 return; 313 314 case HCI_IBS_TX_VOTE_CLOCK_ON: 315 qca->tx_vote = true; 316 qca->tx_votes_on++; 317 break; 318 319 case HCI_IBS_RX_VOTE_CLOCK_ON: 320 qca->rx_vote = true; 321 qca->rx_votes_on++; 322 break; 323 324 case HCI_IBS_TX_VOTE_CLOCK_OFF: 325 qca->tx_vote = false; 326 qca->tx_votes_off++; 327 break; 328 329 case HCI_IBS_RX_VOTE_CLOCK_OFF: 330 qca->rx_vote = false; 331 qca->rx_votes_off++; 332 break; 333 334 default: 335 BT_ERR("Voting irregularity"); 336 return; 337 } 338 339 new_vote = qca->rx_vote | qca->tx_vote; 340 341 if (new_vote != old_vote) { 342 if (new_vote) 343 __serial_clock_on(hu->tty); 344 else 345 __serial_clock_off(hu->tty); 346 347 BT_DBG("Vote serial clock %s(%s)", str_true_false(new_vote), 348 str_true_false(vote)); 349 350 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif); 351 352 if (new_vote) { 353 qca->votes_on++; 354 qca->vote_off_ms += diff; 355 } else { 356 qca->votes_off++; 357 qca->vote_on_ms += diff; 358 } 359 qca->vote_last_jif = jiffies; 360 } 361 } 362 363 /* Builds and sends an HCI_IBS command packet. 364 * These are very simple packets with only 1 cmd byte. 365 */ 366 static int send_hci_ibs_cmd(u8 cmd, struct hci_uart *hu) 367 { 368 int err = 0; 369 struct sk_buff *skb = NULL; 370 struct qca_data *qca = hu->priv; 371 372 BT_DBG("hu %p send hci ibs cmd 0x%x", hu, cmd); 373 374 skb = bt_skb_alloc(1, GFP_ATOMIC); 375 if (!skb) { 376 BT_ERR("Failed to allocate memory for HCI_IBS packet"); 377 return -ENOMEM; 378 } 379 380 /* Assign HCI_IBS type */ 381 skb_put_u8(skb, cmd); 382 383 skb_queue_tail(&qca->txq, skb); 384 385 return err; 386 } 387 388 static void qca_wq_awake_device(struct work_struct *work) 389 { 390 struct qca_data *qca = container_of(work, struct qca_data, 391 ws_awake_device); 392 struct hci_uart *hu = qca->hu; 393 unsigned long retrans_delay; 394 unsigned long flags; 395 396 BT_DBG("hu %p wq awake device", hu); 397 398 /* Vote for serial clock */ 399 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_ON, hu); 400 401 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 402 403 /* Send wake indication to device */ 404 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) 405 BT_ERR("Failed to send WAKE to device"); 406 407 qca->ibs_sent_wakes++; 408 409 /* Start retransmit timer */ 410 retrans_delay = msecs_to_jiffies(qca->wake_retrans); 411 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay); 412 413 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 414 415 /* Actually send the packets */ 416 hci_uart_tx_wakeup(hu); 417 } 418 419 static void qca_wq_awake_rx(struct work_struct *work) 420 { 421 struct qca_data *qca = container_of(work, struct qca_data, 422 ws_awake_rx); 423 struct hci_uart *hu = qca->hu; 424 unsigned long flags; 425 426 BT_DBG("hu %p wq awake rx", hu); 427 428 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_ON, hu); 429 430 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 431 qca->rx_ibs_state = HCI_IBS_RX_AWAKE; 432 433 /* Always acknowledge device wake up, 434 * sending IBS message doesn't count as TX ON. 435 */ 436 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) 437 BT_ERR("Failed to acknowledge device wake up"); 438 439 qca->ibs_sent_wacks++; 440 441 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 442 443 /* Actually send the packets */ 444 hci_uart_tx_wakeup(hu); 445 } 446 447 static void qca_wq_serial_rx_clock_vote_off(struct work_struct *work) 448 { 449 struct qca_data *qca = container_of(work, struct qca_data, 450 ws_rx_vote_off); 451 struct hci_uart *hu = qca->hu; 452 453 BT_DBG("hu %p rx clock vote off", hu); 454 455 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_OFF, hu); 456 } 457 458 static void qca_wq_serial_tx_clock_vote_off(struct work_struct *work) 459 { 460 struct qca_data *qca = container_of(work, struct qca_data, 461 ws_tx_vote_off); 462 struct hci_uart *hu = qca->hu; 463 464 BT_DBG("hu %p tx clock vote off", hu); 465 466 /* Run HCI tx handling unlocked */ 467 hci_uart_tx_wakeup(hu); 468 469 /* Now that message queued to tty driver, vote for tty clocks off. 470 * It is up to the tty driver to pend the clocks off until tx done. 471 */ 472 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu); 473 } 474 475 static void hci_ibs_tx_idle_timeout(struct timer_list *t) 476 { 477 struct qca_data *qca = from_timer(qca, t, tx_idle_timer); 478 struct hci_uart *hu = qca->hu; 479 unsigned long flags; 480 481 BT_DBG("hu %p idle timeout in %d state", hu, qca->tx_ibs_state); 482 483 spin_lock_irqsave_nested(&qca->hci_ibs_lock, 484 flags, SINGLE_DEPTH_NESTING); 485 486 switch (qca->tx_ibs_state) { 487 case HCI_IBS_TX_AWAKE: 488 /* TX_IDLE, go to SLEEP */ 489 if (send_hci_ibs_cmd(HCI_IBS_SLEEP_IND, hu) < 0) { 490 BT_ERR("Failed to send SLEEP to device"); 491 break; 492 } 493 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; 494 qca->ibs_sent_slps++; 495 queue_work(qca->workqueue, &qca->ws_tx_vote_off); 496 break; 497 498 case HCI_IBS_TX_ASLEEP: 499 case HCI_IBS_TX_WAKING: 500 default: 501 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state); 502 break; 503 } 504 505 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 506 } 507 508 static void hci_ibs_wake_retrans_timeout(struct timer_list *t) 509 { 510 struct qca_data *qca = from_timer(qca, t, wake_retrans_timer); 511 struct hci_uart *hu = qca->hu; 512 unsigned long flags, retrans_delay; 513 bool retransmit = false; 514 515 BT_DBG("hu %p wake retransmit timeout in %d state", 516 hu, qca->tx_ibs_state); 517 518 spin_lock_irqsave_nested(&qca->hci_ibs_lock, 519 flags, SINGLE_DEPTH_NESTING); 520 521 /* Don't retransmit the HCI_IBS_WAKE_IND when suspending. */ 522 if (test_bit(QCA_SUSPENDING, &qca->flags)) { 523 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 524 return; 525 } 526 527 switch (qca->tx_ibs_state) { 528 case HCI_IBS_TX_WAKING: 529 /* No WAKE_ACK, retransmit WAKE */ 530 retransmit = true; 531 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) { 532 BT_ERR("Failed to acknowledge device wake up"); 533 break; 534 } 535 qca->ibs_sent_wakes++; 536 retrans_delay = msecs_to_jiffies(qca->wake_retrans); 537 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay); 538 break; 539 540 case HCI_IBS_TX_ASLEEP: 541 case HCI_IBS_TX_AWAKE: 542 default: 543 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state); 544 break; 545 } 546 547 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 548 549 if (retransmit) 550 hci_uart_tx_wakeup(hu); 551 } 552 553 554 static void qca_controller_memdump_timeout(struct work_struct *work) 555 { 556 struct qca_data *qca = container_of(work, struct qca_data, 557 ctrl_memdump_timeout.work); 558 struct hci_uart *hu = qca->hu; 559 560 mutex_lock(&qca->hci_memdump_lock); 561 if (test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) { 562 qca->memdump_state = QCA_MEMDUMP_TIMEOUT; 563 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) { 564 /* Inject hw error event to reset the device 565 * and driver. 566 */ 567 hci_reset_dev(hu->hdev); 568 } 569 } 570 571 mutex_unlock(&qca->hci_memdump_lock); 572 } 573 574 575 /* Initialize protocol */ 576 static int qca_open(struct hci_uart *hu) 577 { 578 struct qca_serdev *qcadev; 579 struct qca_data *qca; 580 581 BT_DBG("hu %p qca_open", hu); 582 583 if (!hci_uart_has_flow_control(hu)) 584 return -EOPNOTSUPP; 585 586 qca = kzalloc(sizeof(*qca), GFP_KERNEL); 587 if (!qca) 588 return -ENOMEM; 589 590 skb_queue_head_init(&qca->txq); 591 skb_queue_head_init(&qca->tx_wait_q); 592 skb_queue_head_init(&qca->rx_memdump_q); 593 spin_lock_init(&qca->hci_ibs_lock); 594 mutex_init(&qca->hci_memdump_lock); 595 qca->workqueue = alloc_ordered_workqueue("qca_wq", 0); 596 if (!qca->workqueue) { 597 BT_ERR("QCA Workqueue not initialized properly"); 598 kfree(qca); 599 return -ENOMEM; 600 } 601 602 INIT_WORK(&qca->ws_awake_rx, qca_wq_awake_rx); 603 INIT_WORK(&qca->ws_awake_device, qca_wq_awake_device); 604 INIT_WORK(&qca->ws_rx_vote_off, qca_wq_serial_rx_clock_vote_off); 605 INIT_WORK(&qca->ws_tx_vote_off, qca_wq_serial_tx_clock_vote_off); 606 INIT_WORK(&qca->ctrl_memdump_evt, qca_controller_memdump); 607 INIT_DELAYED_WORK(&qca->ctrl_memdump_timeout, 608 qca_controller_memdump_timeout); 609 init_waitqueue_head(&qca->suspend_wait_q); 610 611 qca->hu = hu; 612 init_completion(&qca->drop_ev_comp); 613 614 /* Assume we start with both sides asleep -- extra wakes OK */ 615 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; 616 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP; 617 618 qca->vote_last_jif = jiffies; 619 620 hu->priv = qca; 621 622 if (hu->serdev) { 623 qcadev = serdev_device_get_drvdata(hu->serdev); 624 625 switch (qcadev->btsoc_type) { 626 case QCA_WCN3988: 627 case QCA_WCN3990: 628 case QCA_WCN3991: 629 case QCA_WCN3998: 630 case QCA_WCN6750: 631 hu->init_speed = qcadev->init_speed; 632 break; 633 634 default: 635 break; 636 } 637 638 if (qcadev->oper_speed) 639 hu->oper_speed = qcadev->oper_speed; 640 } 641 642 timer_setup(&qca->wake_retrans_timer, hci_ibs_wake_retrans_timeout, 0); 643 qca->wake_retrans = IBS_WAKE_RETRANS_TIMEOUT_MS; 644 645 timer_setup(&qca->tx_idle_timer, hci_ibs_tx_idle_timeout, 0); 646 qca->tx_idle_delay = IBS_HOST_TX_IDLE_TIMEOUT_MS; 647 648 BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u", 649 qca->tx_idle_delay, qca->wake_retrans); 650 651 return 0; 652 } 653 654 static void qca_debugfs_init(struct hci_dev *hdev) 655 { 656 struct hci_uart *hu = hci_get_drvdata(hdev); 657 struct qca_data *qca = hu->priv; 658 struct dentry *ibs_dir; 659 umode_t mode; 660 661 if (!hdev->debugfs) 662 return; 663 664 if (test_and_set_bit(QCA_DEBUGFS_CREATED, &qca->flags)) 665 return; 666 667 ibs_dir = debugfs_create_dir("ibs", hdev->debugfs); 668 669 /* read only */ 670 mode = 0444; 671 debugfs_create_u8("tx_ibs_state", mode, ibs_dir, &qca->tx_ibs_state); 672 debugfs_create_u8("rx_ibs_state", mode, ibs_dir, &qca->rx_ibs_state); 673 debugfs_create_u64("ibs_sent_sleeps", mode, ibs_dir, 674 &qca->ibs_sent_slps); 675 debugfs_create_u64("ibs_sent_wakes", mode, ibs_dir, 676 &qca->ibs_sent_wakes); 677 debugfs_create_u64("ibs_sent_wake_acks", mode, ibs_dir, 678 &qca->ibs_sent_wacks); 679 debugfs_create_u64("ibs_recv_sleeps", mode, ibs_dir, 680 &qca->ibs_recv_slps); 681 debugfs_create_u64("ibs_recv_wakes", mode, ibs_dir, 682 &qca->ibs_recv_wakes); 683 debugfs_create_u64("ibs_recv_wake_acks", mode, ibs_dir, 684 &qca->ibs_recv_wacks); 685 debugfs_create_bool("tx_vote", mode, ibs_dir, &qca->tx_vote); 686 debugfs_create_u64("tx_votes_on", mode, ibs_dir, &qca->tx_votes_on); 687 debugfs_create_u64("tx_votes_off", mode, ibs_dir, &qca->tx_votes_off); 688 debugfs_create_bool("rx_vote", mode, ibs_dir, &qca->rx_vote); 689 debugfs_create_u64("rx_votes_on", mode, ibs_dir, &qca->rx_votes_on); 690 debugfs_create_u64("rx_votes_off", mode, ibs_dir, &qca->rx_votes_off); 691 debugfs_create_u64("votes_on", mode, ibs_dir, &qca->votes_on); 692 debugfs_create_u64("votes_off", mode, ibs_dir, &qca->votes_off); 693 debugfs_create_u32("vote_on_ms", mode, ibs_dir, &qca->vote_on_ms); 694 debugfs_create_u32("vote_off_ms", mode, ibs_dir, &qca->vote_off_ms); 695 696 /* read/write */ 697 mode = 0644; 698 debugfs_create_u32("wake_retrans", mode, ibs_dir, &qca->wake_retrans); 699 debugfs_create_u32("tx_idle_delay", mode, ibs_dir, 700 &qca->tx_idle_delay); 701 } 702 703 /* Flush protocol data */ 704 static int qca_flush(struct hci_uart *hu) 705 { 706 struct qca_data *qca = hu->priv; 707 708 BT_DBG("hu %p qca flush", hu); 709 710 skb_queue_purge(&qca->tx_wait_q); 711 skb_queue_purge(&qca->txq); 712 713 return 0; 714 } 715 716 /* Close protocol */ 717 static int qca_close(struct hci_uart *hu) 718 { 719 struct qca_data *qca = hu->priv; 720 721 BT_DBG("hu %p qca close", hu); 722 723 serial_clock_vote(HCI_IBS_VOTE_STATS_UPDATE, hu); 724 725 skb_queue_purge(&qca->tx_wait_q); 726 skb_queue_purge(&qca->txq); 727 skb_queue_purge(&qca->rx_memdump_q); 728 /* 729 * Shut the timers down so they can't be rearmed when 730 * destroy_workqueue() drains pending work which in turn might try 731 * to arm a timer. After shutdown rearm attempts are silently 732 * ignored by the timer core code. 733 */ 734 timer_shutdown_sync(&qca->tx_idle_timer); 735 timer_shutdown_sync(&qca->wake_retrans_timer); 736 destroy_workqueue(qca->workqueue); 737 qca->hu = NULL; 738 739 kfree_skb(qca->rx_skb); 740 741 hu->priv = NULL; 742 743 kfree(qca); 744 745 return 0; 746 } 747 748 /* Called upon a wake-up-indication from the device. 749 */ 750 static void device_want_to_wakeup(struct hci_uart *hu) 751 { 752 unsigned long flags; 753 struct qca_data *qca = hu->priv; 754 755 BT_DBG("hu %p want to wake up", hu); 756 757 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 758 759 qca->ibs_recv_wakes++; 760 761 /* Don't wake the rx up when suspending. */ 762 if (test_bit(QCA_SUSPENDING, &qca->flags)) { 763 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 764 return; 765 } 766 767 switch (qca->rx_ibs_state) { 768 case HCI_IBS_RX_ASLEEP: 769 /* Make sure clock is on - we may have turned clock off since 770 * receiving the wake up indicator awake rx clock. 771 */ 772 queue_work(qca->workqueue, &qca->ws_awake_rx); 773 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 774 return; 775 776 case HCI_IBS_RX_AWAKE: 777 /* Always acknowledge device wake up, 778 * sending IBS message doesn't count as TX ON. 779 */ 780 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) { 781 BT_ERR("Failed to acknowledge device wake up"); 782 break; 783 } 784 qca->ibs_sent_wacks++; 785 break; 786 787 default: 788 /* Any other state is illegal */ 789 BT_ERR("Received HCI_IBS_WAKE_IND in rx state %d", 790 qca->rx_ibs_state); 791 break; 792 } 793 794 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 795 796 /* Actually send the packets */ 797 hci_uart_tx_wakeup(hu); 798 } 799 800 /* Called upon a sleep-indication from the device. 801 */ 802 static void device_want_to_sleep(struct hci_uart *hu) 803 { 804 unsigned long flags; 805 struct qca_data *qca = hu->priv; 806 807 BT_DBG("hu %p want to sleep in %d state", hu, qca->rx_ibs_state); 808 809 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 810 811 qca->ibs_recv_slps++; 812 813 switch (qca->rx_ibs_state) { 814 case HCI_IBS_RX_AWAKE: 815 /* Update state */ 816 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP; 817 /* Vote off rx clock under workqueue */ 818 queue_work(qca->workqueue, &qca->ws_rx_vote_off); 819 break; 820 821 case HCI_IBS_RX_ASLEEP: 822 break; 823 824 default: 825 /* Any other state is illegal */ 826 BT_ERR("Received HCI_IBS_SLEEP_IND in rx state %d", 827 qca->rx_ibs_state); 828 break; 829 } 830 831 wake_up_interruptible(&qca->suspend_wait_q); 832 833 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 834 } 835 836 /* Called upon wake-up-acknowledgement from the device 837 */ 838 static void device_woke_up(struct hci_uart *hu) 839 { 840 unsigned long flags, idle_delay; 841 struct qca_data *qca = hu->priv; 842 struct sk_buff *skb = NULL; 843 844 BT_DBG("hu %p woke up", hu); 845 846 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 847 848 qca->ibs_recv_wacks++; 849 850 /* Don't react to the wake-up-acknowledgment when suspending. */ 851 if (test_bit(QCA_SUSPENDING, &qca->flags)) { 852 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 853 return; 854 } 855 856 switch (qca->tx_ibs_state) { 857 case HCI_IBS_TX_AWAKE: 858 /* Expect one if we send 2 WAKEs */ 859 BT_DBG("Received HCI_IBS_WAKE_ACK in tx state %d", 860 qca->tx_ibs_state); 861 break; 862 863 case HCI_IBS_TX_WAKING: 864 /* Send pending packets */ 865 while ((skb = skb_dequeue(&qca->tx_wait_q))) 866 skb_queue_tail(&qca->txq, skb); 867 868 /* Switch timers and change state to HCI_IBS_TX_AWAKE */ 869 del_timer(&qca->wake_retrans_timer); 870 idle_delay = msecs_to_jiffies(qca->tx_idle_delay); 871 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay); 872 qca->tx_ibs_state = HCI_IBS_TX_AWAKE; 873 break; 874 875 case HCI_IBS_TX_ASLEEP: 876 default: 877 BT_ERR("Received HCI_IBS_WAKE_ACK in tx state %d", 878 qca->tx_ibs_state); 879 break; 880 } 881 882 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 883 884 /* Actually send the packets */ 885 hci_uart_tx_wakeup(hu); 886 } 887 888 /* Enqueue frame for transmission (padding, crc, etc) may be called from 889 * two simultaneous tasklets. 890 */ 891 static int qca_enqueue(struct hci_uart *hu, struct sk_buff *skb) 892 { 893 unsigned long flags = 0, idle_delay; 894 struct qca_data *qca = hu->priv; 895 896 BT_DBG("hu %p qca enq skb %p tx_ibs_state %d", hu, skb, 897 qca->tx_ibs_state); 898 899 if (test_bit(QCA_SSR_TRIGGERED, &qca->flags)) { 900 /* As SSR is in progress, ignore the packets */ 901 bt_dev_dbg(hu->hdev, "SSR is in progress"); 902 kfree_skb(skb); 903 return 0; 904 } 905 906 /* Prepend skb with frame type */ 907 memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1); 908 909 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 910 911 /* Don't go to sleep in middle of patch download or 912 * Out-Of-Band(GPIOs control) sleep is selected. 913 * Don't wake the device up when suspending. 914 */ 915 if (test_bit(QCA_IBS_DISABLED, &qca->flags) || 916 test_bit(QCA_SUSPENDING, &qca->flags)) { 917 skb_queue_tail(&qca->txq, skb); 918 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 919 return 0; 920 } 921 922 /* Act according to current state */ 923 switch (qca->tx_ibs_state) { 924 case HCI_IBS_TX_AWAKE: 925 BT_DBG("Device awake, sending normally"); 926 skb_queue_tail(&qca->txq, skb); 927 idle_delay = msecs_to_jiffies(qca->tx_idle_delay); 928 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay); 929 break; 930 931 case HCI_IBS_TX_ASLEEP: 932 BT_DBG("Device asleep, waking up and queueing packet"); 933 /* Save packet for later */ 934 skb_queue_tail(&qca->tx_wait_q, skb); 935 936 qca->tx_ibs_state = HCI_IBS_TX_WAKING; 937 /* Schedule a work queue to wake up device */ 938 queue_work(qca->workqueue, &qca->ws_awake_device); 939 break; 940 941 case HCI_IBS_TX_WAKING: 942 BT_DBG("Device waking up, queueing packet"); 943 /* Transient state; just keep packet for later */ 944 skb_queue_tail(&qca->tx_wait_q, skb); 945 break; 946 947 default: 948 BT_ERR("Illegal tx state: %d (losing packet)", 949 qca->tx_ibs_state); 950 dev_kfree_skb_irq(skb); 951 break; 952 } 953 954 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 955 956 return 0; 957 } 958 959 static int qca_ibs_sleep_ind(struct hci_dev *hdev, struct sk_buff *skb) 960 { 961 struct hci_uart *hu = hci_get_drvdata(hdev); 962 963 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_SLEEP_IND); 964 965 device_want_to_sleep(hu); 966 967 kfree_skb(skb); 968 return 0; 969 } 970 971 static int qca_ibs_wake_ind(struct hci_dev *hdev, struct sk_buff *skb) 972 { 973 struct hci_uart *hu = hci_get_drvdata(hdev); 974 975 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_IND); 976 977 device_want_to_wakeup(hu); 978 979 kfree_skb(skb); 980 return 0; 981 } 982 983 static int qca_ibs_wake_ack(struct hci_dev *hdev, struct sk_buff *skb) 984 { 985 struct hci_uart *hu = hci_get_drvdata(hdev); 986 987 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_ACK); 988 989 device_woke_up(hu); 990 991 kfree_skb(skb); 992 return 0; 993 } 994 995 static int qca_recv_acl_data(struct hci_dev *hdev, struct sk_buff *skb) 996 { 997 /* We receive debug logs from chip as an ACL packets. 998 * Instead of sending the data to ACL to decode the 999 * received data, we are pushing them to the above layers 1000 * as a diagnostic packet. 1001 */ 1002 if (get_unaligned_le16(skb->data) == QCA_DEBUG_HANDLE) 1003 return hci_recv_diag(hdev, skb); 1004 1005 return hci_recv_frame(hdev, skb); 1006 } 1007 1008 static void qca_dmp_hdr(struct hci_dev *hdev, struct sk_buff *skb) 1009 { 1010 struct hci_uart *hu = hci_get_drvdata(hdev); 1011 struct qca_data *qca = hu->priv; 1012 char buf[80]; 1013 1014 snprintf(buf, sizeof(buf), "Controller Name: 0x%x\n", 1015 qca->controller_id); 1016 skb_put_data(skb, buf, strlen(buf)); 1017 1018 snprintf(buf, sizeof(buf), "Firmware Version: 0x%x\n", 1019 qca->fw_version); 1020 skb_put_data(skb, buf, strlen(buf)); 1021 1022 snprintf(buf, sizeof(buf), "Vendor:Qualcomm\n"); 1023 skb_put_data(skb, buf, strlen(buf)); 1024 1025 snprintf(buf, sizeof(buf), "Driver: %s\n", 1026 hu->serdev->dev.driver->name); 1027 skb_put_data(skb, buf, strlen(buf)); 1028 } 1029 1030 static void qca_controller_memdump(struct work_struct *work) 1031 { 1032 struct qca_data *qca = container_of(work, struct qca_data, 1033 ctrl_memdump_evt); 1034 struct hci_uart *hu = qca->hu; 1035 struct sk_buff *skb; 1036 struct qca_memdump_event_hdr *cmd_hdr; 1037 struct qca_memdump_info *qca_memdump = qca->qca_memdump; 1038 struct qca_dump_size *dump; 1039 u16 seq_no; 1040 u32 rx_size; 1041 int ret = 0; 1042 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1043 1044 while ((skb = skb_dequeue(&qca->rx_memdump_q))) { 1045 1046 mutex_lock(&qca->hci_memdump_lock); 1047 /* Skip processing the received packets if timeout detected 1048 * or memdump collection completed. 1049 */ 1050 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT || 1051 qca->memdump_state == QCA_MEMDUMP_COLLECTED) { 1052 mutex_unlock(&qca->hci_memdump_lock); 1053 return; 1054 } 1055 1056 if (!qca_memdump) { 1057 qca_memdump = kzalloc(sizeof(*qca_memdump), GFP_ATOMIC); 1058 if (!qca_memdump) { 1059 mutex_unlock(&qca->hci_memdump_lock); 1060 return; 1061 } 1062 1063 qca->qca_memdump = qca_memdump; 1064 } 1065 1066 qca->memdump_state = QCA_MEMDUMP_COLLECTING; 1067 cmd_hdr = (void *) skb->data; 1068 seq_no = __le16_to_cpu(cmd_hdr->seq_no); 1069 skb_pull(skb, sizeof(struct qca_memdump_event_hdr)); 1070 1071 if (!seq_no) { 1072 1073 /* This is the first frame of memdump packet from 1074 * the controller, Disable IBS to receive dump 1075 * with out any interruption, ideally time required for 1076 * the controller to send the dump is 8 seconds. let us 1077 * start timer to handle this asynchronous activity. 1078 */ 1079 set_bit(QCA_IBS_DISABLED, &qca->flags); 1080 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1081 dump = (void *) skb->data; 1082 qca_memdump->ram_dump_size = __le32_to_cpu(dump->dump_size); 1083 if (!(qca_memdump->ram_dump_size)) { 1084 bt_dev_err(hu->hdev, "Rx invalid memdump size"); 1085 kfree(qca_memdump); 1086 kfree_skb(skb); 1087 mutex_unlock(&qca->hci_memdump_lock); 1088 return; 1089 } 1090 1091 queue_delayed_work(qca->workqueue, 1092 &qca->ctrl_memdump_timeout, 1093 msecs_to_jiffies(MEMDUMP_TIMEOUT_MS)); 1094 skb_pull(skb, sizeof(qca_memdump->ram_dump_size)); 1095 qca_memdump->current_seq_no = 0; 1096 qca_memdump->received_dump = 0; 1097 ret = hci_devcd_init(hu->hdev, qca_memdump->ram_dump_size); 1098 bt_dev_info(hu->hdev, "hci_devcd_init Return:%d", 1099 ret); 1100 if (ret < 0) { 1101 kfree(qca->qca_memdump); 1102 qca->qca_memdump = NULL; 1103 qca->memdump_state = QCA_MEMDUMP_COLLECTED; 1104 cancel_delayed_work(&qca->ctrl_memdump_timeout); 1105 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1106 clear_bit(QCA_IBS_DISABLED, &qca->flags); 1107 mutex_unlock(&qca->hci_memdump_lock); 1108 return; 1109 } 1110 1111 bt_dev_info(hu->hdev, "QCA collecting dump of size:%u", 1112 qca_memdump->ram_dump_size); 1113 1114 } 1115 1116 /* If sequence no 0 is missed then there is no point in 1117 * accepting the other sequences. 1118 */ 1119 if (!test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) { 1120 bt_dev_err(hu->hdev, "QCA: Discarding other packets"); 1121 kfree(qca_memdump); 1122 kfree_skb(skb); 1123 mutex_unlock(&qca->hci_memdump_lock); 1124 return; 1125 } 1126 /* There could be chance of missing some packets from 1127 * the controller. In such cases let us store the dummy 1128 * packets in the buffer. 1129 */ 1130 /* For QCA6390, controller does not lost packets but 1131 * sequence number field of packet sometimes has error 1132 * bits, so skip this checking for missing packet. 1133 */ 1134 while ((seq_no > qca_memdump->current_seq_no + 1) && 1135 (soc_type != QCA_QCA6390) && 1136 seq_no != QCA_LAST_SEQUENCE_NUM) { 1137 bt_dev_err(hu->hdev, "QCA controller missed packet:%d", 1138 qca_memdump->current_seq_no); 1139 rx_size = qca_memdump->received_dump; 1140 rx_size += QCA_DUMP_PACKET_SIZE; 1141 if (rx_size > qca_memdump->ram_dump_size) { 1142 bt_dev_err(hu->hdev, 1143 "QCA memdump received %d, no space for missed packet", 1144 qca_memdump->received_dump); 1145 break; 1146 } 1147 hci_devcd_append_pattern(hu->hdev, 0x00, 1148 QCA_DUMP_PACKET_SIZE); 1149 qca_memdump->received_dump += QCA_DUMP_PACKET_SIZE; 1150 qca_memdump->current_seq_no++; 1151 } 1152 1153 rx_size = qca_memdump->received_dump + skb->len; 1154 if (rx_size <= qca_memdump->ram_dump_size) { 1155 if ((seq_no != QCA_LAST_SEQUENCE_NUM) && 1156 (seq_no != qca_memdump->current_seq_no)) { 1157 bt_dev_err(hu->hdev, 1158 "QCA memdump unexpected packet %d", 1159 seq_no); 1160 } 1161 bt_dev_dbg(hu->hdev, 1162 "QCA memdump packet %d with length %d", 1163 seq_no, skb->len); 1164 hci_devcd_append(hu->hdev, skb); 1165 qca_memdump->current_seq_no += 1; 1166 qca_memdump->received_dump = rx_size; 1167 } else { 1168 bt_dev_err(hu->hdev, 1169 "QCA memdump received no space for packet %d", 1170 qca_memdump->current_seq_no); 1171 } 1172 1173 if (seq_no == QCA_LAST_SEQUENCE_NUM) { 1174 bt_dev_info(hu->hdev, 1175 "QCA memdump Done, received %d, total %d", 1176 qca_memdump->received_dump, 1177 qca_memdump->ram_dump_size); 1178 hci_devcd_complete(hu->hdev); 1179 cancel_delayed_work(&qca->ctrl_memdump_timeout); 1180 kfree(qca->qca_memdump); 1181 qca->qca_memdump = NULL; 1182 qca->memdump_state = QCA_MEMDUMP_COLLECTED; 1183 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1184 } 1185 1186 mutex_unlock(&qca->hci_memdump_lock); 1187 } 1188 1189 } 1190 1191 static int qca_controller_memdump_event(struct hci_dev *hdev, 1192 struct sk_buff *skb) 1193 { 1194 struct hci_uart *hu = hci_get_drvdata(hdev); 1195 struct qca_data *qca = hu->priv; 1196 1197 set_bit(QCA_SSR_TRIGGERED, &qca->flags); 1198 skb_queue_tail(&qca->rx_memdump_q, skb); 1199 queue_work(qca->workqueue, &qca->ctrl_memdump_evt); 1200 1201 return 0; 1202 } 1203 1204 static int qca_recv_event(struct hci_dev *hdev, struct sk_buff *skb) 1205 { 1206 struct hci_uart *hu = hci_get_drvdata(hdev); 1207 struct qca_data *qca = hu->priv; 1208 1209 if (test_bit(QCA_DROP_VENDOR_EVENT, &qca->flags)) { 1210 struct hci_event_hdr *hdr = (void *)skb->data; 1211 1212 /* For the WCN3990 the vendor command for a baudrate change 1213 * isn't sent as synchronous HCI command, because the 1214 * controller sends the corresponding vendor event with the 1215 * new baudrate. The event is received and properly decoded 1216 * after changing the baudrate of the host port. It needs to 1217 * be dropped, otherwise it can be misinterpreted as 1218 * response to a later firmware download command (also a 1219 * vendor command). 1220 */ 1221 1222 if (hdr->evt == HCI_EV_VENDOR) 1223 complete(&qca->drop_ev_comp); 1224 1225 kfree_skb(skb); 1226 1227 return 0; 1228 } 1229 /* We receive chip memory dump as an event packet, With a dedicated 1230 * handler followed by a hardware error event. When this event is 1231 * received we store dump into a file before closing hci. This 1232 * dump will help in triaging the issues. 1233 */ 1234 if ((skb->data[0] == HCI_VENDOR_PKT) && 1235 (get_unaligned_be16(skb->data + 2) == QCA_SSR_DUMP_HANDLE)) 1236 return qca_controller_memdump_event(hdev, skb); 1237 1238 return hci_recv_frame(hdev, skb); 1239 } 1240 1241 #define QCA_IBS_SLEEP_IND_EVENT \ 1242 .type = HCI_IBS_SLEEP_IND, \ 1243 .hlen = 0, \ 1244 .loff = 0, \ 1245 .lsize = 0, \ 1246 .maxlen = HCI_MAX_IBS_SIZE 1247 1248 #define QCA_IBS_WAKE_IND_EVENT \ 1249 .type = HCI_IBS_WAKE_IND, \ 1250 .hlen = 0, \ 1251 .loff = 0, \ 1252 .lsize = 0, \ 1253 .maxlen = HCI_MAX_IBS_SIZE 1254 1255 #define QCA_IBS_WAKE_ACK_EVENT \ 1256 .type = HCI_IBS_WAKE_ACK, \ 1257 .hlen = 0, \ 1258 .loff = 0, \ 1259 .lsize = 0, \ 1260 .maxlen = HCI_MAX_IBS_SIZE 1261 1262 static const struct h4_recv_pkt qca_recv_pkts[] = { 1263 { H4_RECV_ACL, .recv = qca_recv_acl_data }, 1264 { H4_RECV_SCO, .recv = hci_recv_frame }, 1265 { H4_RECV_EVENT, .recv = qca_recv_event }, 1266 { QCA_IBS_WAKE_IND_EVENT, .recv = qca_ibs_wake_ind }, 1267 { QCA_IBS_WAKE_ACK_EVENT, .recv = qca_ibs_wake_ack }, 1268 { QCA_IBS_SLEEP_IND_EVENT, .recv = qca_ibs_sleep_ind }, 1269 }; 1270 1271 static int qca_recv(struct hci_uart *hu, const void *data, int count) 1272 { 1273 struct qca_data *qca = hu->priv; 1274 1275 if (!test_bit(HCI_UART_REGISTERED, &hu->flags)) 1276 return -EUNATCH; 1277 1278 qca->rx_skb = h4_recv_buf(hu->hdev, qca->rx_skb, data, count, 1279 qca_recv_pkts, ARRAY_SIZE(qca_recv_pkts)); 1280 if (IS_ERR(qca->rx_skb)) { 1281 int err = PTR_ERR(qca->rx_skb); 1282 bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err); 1283 qca->rx_skb = NULL; 1284 return err; 1285 } 1286 1287 return count; 1288 } 1289 1290 static struct sk_buff *qca_dequeue(struct hci_uart *hu) 1291 { 1292 struct qca_data *qca = hu->priv; 1293 1294 return skb_dequeue(&qca->txq); 1295 } 1296 1297 static uint8_t qca_get_baudrate_value(int speed) 1298 { 1299 switch (speed) { 1300 case 9600: 1301 return QCA_BAUDRATE_9600; 1302 case 19200: 1303 return QCA_BAUDRATE_19200; 1304 case 38400: 1305 return QCA_BAUDRATE_38400; 1306 case 57600: 1307 return QCA_BAUDRATE_57600; 1308 case 115200: 1309 return QCA_BAUDRATE_115200; 1310 case 230400: 1311 return QCA_BAUDRATE_230400; 1312 case 460800: 1313 return QCA_BAUDRATE_460800; 1314 case 500000: 1315 return QCA_BAUDRATE_500000; 1316 case 921600: 1317 return QCA_BAUDRATE_921600; 1318 case 1000000: 1319 return QCA_BAUDRATE_1000000; 1320 case 2000000: 1321 return QCA_BAUDRATE_2000000; 1322 case 3000000: 1323 return QCA_BAUDRATE_3000000; 1324 case 3200000: 1325 return QCA_BAUDRATE_3200000; 1326 case 3500000: 1327 return QCA_BAUDRATE_3500000; 1328 default: 1329 return QCA_BAUDRATE_115200; 1330 } 1331 } 1332 1333 static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate) 1334 { 1335 struct hci_uart *hu = hci_get_drvdata(hdev); 1336 struct qca_data *qca = hu->priv; 1337 struct sk_buff *skb; 1338 u8 cmd[] = { 0x01, 0x48, 0xFC, 0x01, 0x00 }; 1339 1340 if (baudrate > QCA_BAUDRATE_3200000) 1341 return -EINVAL; 1342 1343 cmd[4] = baudrate; 1344 1345 skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL); 1346 if (!skb) { 1347 bt_dev_err(hdev, "Failed to allocate baudrate packet"); 1348 return -ENOMEM; 1349 } 1350 1351 /* Assign commands to change baudrate and packet type. */ 1352 skb_put_data(skb, cmd, sizeof(cmd)); 1353 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT; 1354 1355 skb_queue_tail(&qca->txq, skb); 1356 hci_uart_tx_wakeup(hu); 1357 1358 /* Wait for the baudrate change request to be sent */ 1359 1360 while (!skb_queue_empty(&qca->txq)) 1361 usleep_range(100, 200); 1362 1363 if (hu->serdev) 1364 serdev_device_wait_until_sent(hu->serdev, 1365 msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS)); 1366 1367 /* Give the controller time to process the request */ 1368 switch (qca_soc_type(hu)) { 1369 case QCA_WCN3988: 1370 case QCA_WCN3990: 1371 case QCA_WCN3991: 1372 case QCA_WCN3998: 1373 case QCA_WCN6750: 1374 case QCA_WCN6855: 1375 case QCA_WCN7850: 1376 usleep_range(1000, 10000); 1377 break; 1378 1379 default: 1380 msleep(300); 1381 } 1382 1383 return 0; 1384 } 1385 1386 static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed) 1387 { 1388 if (hu->serdev) 1389 serdev_device_set_baudrate(hu->serdev, speed); 1390 else 1391 hci_uart_set_baudrate(hu, speed); 1392 } 1393 1394 static int qca_send_power_pulse(struct hci_uart *hu, bool on) 1395 { 1396 int ret; 1397 int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS); 1398 u8 cmd = on ? QCA_WCN3990_POWERON_PULSE : QCA_WCN3990_POWEROFF_PULSE; 1399 1400 /* These power pulses are single byte command which are sent 1401 * at required baudrate to wcn3990. On wcn3990, we have an external 1402 * circuit at Tx pin which decodes the pulse sent at specific baudrate. 1403 * For example, wcn3990 supports RF COEX antenna for both Wi-Fi/BT 1404 * and also we use the same power inputs to turn on and off for 1405 * Wi-Fi/BT. Powering up the power sources will not enable BT, until 1406 * we send a power on pulse at 115200 bps. This algorithm will help to 1407 * save power. Disabling hardware flow control is mandatory while 1408 * sending power pulses to SoC. 1409 */ 1410 bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd); 1411 1412 serdev_device_write_flush(hu->serdev); 1413 hci_uart_set_flow_control(hu, true); 1414 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd)); 1415 if (ret < 0) { 1416 bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd); 1417 return ret; 1418 } 1419 1420 serdev_device_wait_until_sent(hu->serdev, timeout); 1421 hci_uart_set_flow_control(hu, false); 1422 1423 /* Give to controller time to boot/shutdown */ 1424 if (on) 1425 msleep(100); 1426 else 1427 usleep_range(1000, 10000); 1428 1429 return 0; 1430 } 1431 1432 static unsigned int qca_get_speed(struct hci_uart *hu, 1433 enum qca_speed_type speed_type) 1434 { 1435 unsigned int speed = 0; 1436 1437 if (speed_type == QCA_INIT_SPEED) { 1438 if (hu->init_speed) 1439 speed = hu->init_speed; 1440 else if (hu->proto->init_speed) 1441 speed = hu->proto->init_speed; 1442 } else { 1443 if (hu->oper_speed) 1444 speed = hu->oper_speed; 1445 else if (hu->proto->oper_speed) 1446 speed = hu->proto->oper_speed; 1447 } 1448 1449 return speed; 1450 } 1451 1452 static int qca_check_speeds(struct hci_uart *hu) 1453 { 1454 switch (qca_soc_type(hu)) { 1455 case QCA_WCN3988: 1456 case QCA_WCN3990: 1457 case QCA_WCN3991: 1458 case QCA_WCN3998: 1459 case QCA_WCN6750: 1460 case QCA_WCN6855: 1461 case QCA_WCN7850: 1462 if (!qca_get_speed(hu, QCA_INIT_SPEED) && 1463 !qca_get_speed(hu, QCA_OPER_SPEED)) 1464 return -EINVAL; 1465 break; 1466 1467 default: 1468 if (!qca_get_speed(hu, QCA_INIT_SPEED) || 1469 !qca_get_speed(hu, QCA_OPER_SPEED)) 1470 return -EINVAL; 1471 } 1472 1473 return 0; 1474 } 1475 1476 static int qca_set_speed(struct hci_uart *hu, enum qca_speed_type speed_type) 1477 { 1478 unsigned int speed, qca_baudrate; 1479 struct qca_data *qca = hu->priv; 1480 int ret = 0; 1481 1482 if (speed_type == QCA_INIT_SPEED) { 1483 speed = qca_get_speed(hu, QCA_INIT_SPEED); 1484 if (speed) 1485 host_set_baudrate(hu, speed); 1486 } else { 1487 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1488 1489 speed = qca_get_speed(hu, QCA_OPER_SPEED); 1490 if (!speed) 1491 return 0; 1492 1493 /* Disable flow control for wcn3990 to deassert RTS while 1494 * changing the baudrate of chip and host. 1495 */ 1496 switch (soc_type) { 1497 case QCA_WCN3988: 1498 case QCA_WCN3990: 1499 case QCA_WCN3991: 1500 case QCA_WCN3998: 1501 case QCA_WCN6750: 1502 case QCA_WCN6855: 1503 case QCA_WCN7850: 1504 hci_uart_set_flow_control(hu, true); 1505 break; 1506 1507 default: 1508 break; 1509 } 1510 1511 switch (soc_type) { 1512 case QCA_WCN3990: 1513 reinit_completion(&qca->drop_ev_comp); 1514 set_bit(QCA_DROP_VENDOR_EVENT, &qca->flags); 1515 break; 1516 1517 default: 1518 break; 1519 } 1520 1521 qca_baudrate = qca_get_baudrate_value(speed); 1522 bt_dev_dbg(hu->hdev, "Set UART speed to %d", speed); 1523 ret = qca_set_baudrate(hu->hdev, qca_baudrate); 1524 if (ret) 1525 goto error; 1526 1527 host_set_baudrate(hu, speed); 1528 1529 error: 1530 switch (soc_type) { 1531 case QCA_WCN3988: 1532 case QCA_WCN3990: 1533 case QCA_WCN3991: 1534 case QCA_WCN3998: 1535 case QCA_WCN6750: 1536 case QCA_WCN6855: 1537 case QCA_WCN7850: 1538 hci_uart_set_flow_control(hu, false); 1539 break; 1540 1541 default: 1542 break; 1543 } 1544 1545 switch (soc_type) { 1546 case QCA_WCN3990: 1547 /* Wait for the controller to send the vendor event 1548 * for the baudrate change command. 1549 */ 1550 if (!wait_for_completion_timeout(&qca->drop_ev_comp, 1551 msecs_to_jiffies(100))) { 1552 bt_dev_err(hu->hdev, 1553 "Failed to change controller baudrate\n"); 1554 ret = -ETIMEDOUT; 1555 } 1556 1557 clear_bit(QCA_DROP_VENDOR_EVENT, &qca->flags); 1558 break; 1559 1560 default: 1561 break; 1562 } 1563 } 1564 1565 return ret; 1566 } 1567 1568 static int qca_send_crashbuffer(struct hci_uart *hu) 1569 { 1570 struct qca_data *qca = hu->priv; 1571 struct sk_buff *skb; 1572 1573 skb = bt_skb_alloc(QCA_CRASHBYTE_PACKET_LEN, GFP_KERNEL); 1574 if (!skb) { 1575 bt_dev_err(hu->hdev, "Failed to allocate memory for skb packet"); 1576 return -ENOMEM; 1577 } 1578 1579 /* We forcefully crash the controller, by sending 0xfb byte for 1580 * 1024 times. We also might have chance of losing data, To be 1581 * on safer side we send 1096 bytes to the SoC. 1582 */ 1583 memset(skb_put(skb, QCA_CRASHBYTE_PACKET_LEN), QCA_MEMDUMP_BYTE, 1584 QCA_CRASHBYTE_PACKET_LEN); 1585 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT; 1586 bt_dev_info(hu->hdev, "crash the soc to collect controller dump"); 1587 skb_queue_tail(&qca->txq, skb); 1588 hci_uart_tx_wakeup(hu); 1589 1590 return 0; 1591 } 1592 1593 static void qca_wait_for_dump_collection(struct hci_dev *hdev) 1594 { 1595 struct hci_uart *hu = hci_get_drvdata(hdev); 1596 struct qca_data *qca = hu->priv; 1597 1598 wait_on_bit_timeout(&qca->flags, QCA_MEMDUMP_COLLECTION, 1599 TASK_UNINTERRUPTIBLE, MEMDUMP_TIMEOUT_MS); 1600 1601 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1602 } 1603 1604 static void qca_hw_error(struct hci_dev *hdev, u8 code) 1605 { 1606 struct hci_uart *hu = hci_get_drvdata(hdev); 1607 struct qca_data *qca = hu->priv; 1608 1609 set_bit(QCA_SSR_TRIGGERED, &qca->flags); 1610 set_bit(QCA_HW_ERROR_EVENT, &qca->flags); 1611 bt_dev_info(hdev, "mem_dump_status: %d", qca->memdump_state); 1612 1613 if (qca->memdump_state == QCA_MEMDUMP_IDLE) { 1614 /* If hardware error event received for other than QCA 1615 * soc memory dump event, then we need to crash the SOC 1616 * and wait here for 8 seconds to get the dump packets. 1617 * This will block main thread to be on hold until we 1618 * collect dump. 1619 */ 1620 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1621 qca_send_crashbuffer(hu); 1622 qca_wait_for_dump_collection(hdev); 1623 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) { 1624 /* Let us wait here until memory dump collected or 1625 * memory dump timer expired. 1626 */ 1627 bt_dev_info(hdev, "waiting for dump to complete"); 1628 qca_wait_for_dump_collection(hdev); 1629 } 1630 1631 mutex_lock(&qca->hci_memdump_lock); 1632 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) { 1633 bt_dev_err(hu->hdev, "clearing allocated memory due to memdump timeout"); 1634 hci_devcd_abort(hu->hdev); 1635 if (qca->qca_memdump) { 1636 kfree(qca->qca_memdump); 1637 qca->qca_memdump = NULL; 1638 } 1639 qca->memdump_state = QCA_MEMDUMP_TIMEOUT; 1640 cancel_delayed_work(&qca->ctrl_memdump_timeout); 1641 } 1642 mutex_unlock(&qca->hci_memdump_lock); 1643 1644 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT || 1645 qca->memdump_state == QCA_MEMDUMP_COLLECTED) { 1646 cancel_work_sync(&qca->ctrl_memdump_evt); 1647 skb_queue_purge(&qca->rx_memdump_q); 1648 } 1649 1650 clear_bit(QCA_HW_ERROR_EVENT, &qca->flags); 1651 } 1652 1653 static void qca_reset(struct hci_dev *hdev) 1654 { 1655 struct hci_uart *hu = hci_get_drvdata(hdev); 1656 struct qca_data *qca = hu->priv; 1657 1658 set_bit(QCA_SSR_TRIGGERED, &qca->flags); 1659 if (qca->memdump_state == QCA_MEMDUMP_IDLE) { 1660 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1661 qca_send_crashbuffer(hu); 1662 qca_wait_for_dump_collection(hdev); 1663 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) { 1664 /* Let us wait here until memory dump collected or 1665 * memory dump timer expired. 1666 */ 1667 bt_dev_info(hdev, "waiting for dump to complete"); 1668 qca_wait_for_dump_collection(hdev); 1669 } 1670 1671 mutex_lock(&qca->hci_memdump_lock); 1672 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) { 1673 qca->memdump_state = QCA_MEMDUMP_TIMEOUT; 1674 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) { 1675 /* Inject hw error event to reset the device 1676 * and driver. 1677 */ 1678 hci_reset_dev(hu->hdev); 1679 } 1680 } 1681 mutex_unlock(&qca->hci_memdump_lock); 1682 } 1683 1684 static bool qca_wakeup(struct hci_dev *hdev) 1685 { 1686 struct hci_uart *hu = hci_get_drvdata(hdev); 1687 bool wakeup; 1688 1689 if (!hu->serdev) 1690 return true; 1691 1692 /* BT SoC attached through the serial bus is handled by the serdev driver. 1693 * So we need to use the device handle of the serdev driver to get the 1694 * status of device may wakeup. 1695 */ 1696 wakeup = device_may_wakeup(&hu->serdev->ctrl->dev); 1697 bt_dev_dbg(hu->hdev, "wakeup status : %d", wakeup); 1698 1699 return wakeup; 1700 } 1701 1702 static int qca_port_reopen(struct hci_uart *hu) 1703 { 1704 int ret; 1705 1706 /* Now the device is in ready state to communicate with host. 1707 * To sync host with device we need to reopen port. 1708 * Without this, we will have RTS and CTS synchronization 1709 * issues. 1710 */ 1711 serdev_device_close(hu->serdev); 1712 ret = serdev_device_open(hu->serdev); 1713 if (ret) { 1714 bt_dev_err(hu->hdev, "failed to open port"); 1715 return ret; 1716 } 1717 1718 hci_uart_set_flow_control(hu, false); 1719 1720 return 0; 1721 } 1722 1723 static int qca_regulator_init(struct hci_uart *hu) 1724 { 1725 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1726 struct qca_serdev *qcadev; 1727 int ret; 1728 bool sw_ctrl_state; 1729 1730 /* Check for vregs status, may be hci down has turned 1731 * off the voltage regulator. 1732 */ 1733 qcadev = serdev_device_get_drvdata(hu->serdev); 1734 1735 if (!qcadev->bt_power->vregs_on) { 1736 serdev_device_close(hu->serdev); 1737 ret = qca_regulator_enable(qcadev); 1738 if (ret) 1739 return ret; 1740 1741 ret = serdev_device_open(hu->serdev); 1742 if (ret) { 1743 bt_dev_err(hu->hdev, "failed to open port"); 1744 return ret; 1745 } 1746 } 1747 1748 switch (soc_type) { 1749 case QCA_WCN3988: 1750 case QCA_WCN3990: 1751 case QCA_WCN3991: 1752 case QCA_WCN3998: 1753 /* Forcefully enable wcn399x to enter in to boot mode. */ 1754 host_set_baudrate(hu, 2400); 1755 ret = qca_send_power_pulse(hu, false); 1756 if (ret) 1757 return ret; 1758 break; 1759 1760 default: 1761 break; 1762 } 1763 1764 /* For wcn6750 need to enable gpio bt_en */ 1765 if (qcadev->bt_en) { 1766 gpiod_set_value_cansleep(qcadev->bt_en, 0); 1767 msleep(50); 1768 gpiod_set_value_cansleep(qcadev->bt_en, 1); 1769 msleep(50); 1770 if (qcadev->sw_ctrl) { 1771 sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl); 1772 bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state); 1773 } 1774 } 1775 1776 qca_set_speed(hu, QCA_INIT_SPEED); 1777 1778 switch (soc_type) { 1779 case QCA_WCN3988: 1780 case QCA_WCN3990: 1781 case QCA_WCN3991: 1782 case QCA_WCN3998: 1783 ret = qca_send_power_pulse(hu, true); 1784 if (ret) 1785 return ret; 1786 break; 1787 1788 default: 1789 break; 1790 } 1791 1792 return qca_port_reopen(hu); 1793 } 1794 1795 static int qca_power_on(struct hci_dev *hdev) 1796 { 1797 struct hci_uart *hu = hci_get_drvdata(hdev); 1798 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1799 struct qca_serdev *qcadev; 1800 struct qca_data *qca = hu->priv; 1801 int ret = 0; 1802 1803 /* Non-serdev device usually is powered by external power 1804 * and don't need additional action in driver for power on 1805 */ 1806 if (!hu->serdev) 1807 return 0; 1808 1809 switch (soc_type) { 1810 case QCA_WCN3988: 1811 case QCA_WCN3990: 1812 case QCA_WCN3991: 1813 case QCA_WCN3998: 1814 case QCA_WCN6750: 1815 case QCA_WCN6855: 1816 case QCA_WCN7850: 1817 case QCA_QCA6390: 1818 ret = qca_regulator_init(hu); 1819 break; 1820 1821 default: 1822 qcadev = serdev_device_get_drvdata(hu->serdev); 1823 if (qcadev->bt_en) { 1824 gpiod_set_value_cansleep(qcadev->bt_en, 1); 1825 /* Controller needs time to bootup. */ 1826 msleep(150); 1827 } 1828 } 1829 1830 clear_bit(QCA_BT_OFF, &qca->flags); 1831 return ret; 1832 } 1833 1834 static void hci_coredump_qca(struct hci_dev *hdev) 1835 { 1836 int err; 1837 static const u8 param[] = { 0x26 }; 1838 1839 err = __hci_cmd_send(hdev, 0xfc0c, 1, param); 1840 if (err < 0) 1841 bt_dev_err(hdev, "%s: trigger crash failed (%d)", __func__, err); 1842 } 1843 1844 static int qca_get_data_path_id(struct hci_dev *hdev, __u8 *data_path_id) 1845 { 1846 /* QCA uses 1 as non-HCI data path id for HFP */ 1847 *data_path_id = 1; 1848 return 0; 1849 } 1850 1851 static int qca_configure_hfp_offload(struct hci_dev *hdev) 1852 { 1853 bt_dev_info(hdev, "HFP non-HCI data transport is supported"); 1854 hdev->get_data_path_id = qca_get_data_path_id; 1855 /* Do not need to send HCI_Configure_Data_Path to configure non-HCI 1856 * data transport path for QCA controllers, so set below field as NULL. 1857 */ 1858 hdev->get_codec_config_data = NULL; 1859 return 0; 1860 } 1861 1862 static int qca_setup(struct hci_uart *hu) 1863 { 1864 struct hci_dev *hdev = hu->hdev; 1865 struct qca_data *qca = hu->priv; 1866 unsigned int speed, qca_baudrate = QCA_BAUDRATE_115200; 1867 unsigned int retries = 0; 1868 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1869 const char *firmware_name = qca_get_firmware_name(hu); 1870 const char *rampatch_name = qca_get_rampatch_name(hu); 1871 int ret; 1872 struct qca_btsoc_version ver; 1873 struct qca_serdev *qcadev; 1874 const char *soc_name; 1875 1876 ret = qca_check_speeds(hu); 1877 if (ret) 1878 return ret; 1879 1880 clear_bit(QCA_ROM_FW, &qca->flags); 1881 /* Patch downloading has to be done without IBS mode */ 1882 set_bit(QCA_IBS_DISABLED, &qca->flags); 1883 1884 /* Enable controller to do both LE scan and BR/EDR inquiry 1885 * simultaneously. 1886 */ 1887 set_bit(HCI_QUIRK_SIMULTANEOUS_DISCOVERY, &hdev->quirks); 1888 1889 switch (soc_type) { 1890 case QCA_QCA2066: 1891 soc_name = "qca2066"; 1892 break; 1893 1894 case QCA_WCN3988: 1895 case QCA_WCN3990: 1896 case QCA_WCN3991: 1897 case QCA_WCN3998: 1898 soc_name = "wcn399x"; 1899 break; 1900 1901 case QCA_WCN6750: 1902 soc_name = "wcn6750"; 1903 break; 1904 1905 case QCA_WCN6855: 1906 soc_name = "wcn6855"; 1907 break; 1908 1909 case QCA_WCN7850: 1910 soc_name = "wcn7850"; 1911 break; 1912 1913 default: 1914 soc_name = "ROME/QCA6390"; 1915 } 1916 bt_dev_info(hdev, "setting up %s", soc_name); 1917 1918 qca->memdump_state = QCA_MEMDUMP_IDLE; 1919 1920 retry: 1921 ret = qca_power_on(hdev); 1922 if (ret) 1923 goto out; 1924 1925 clear_bit(QCA_SSR_TRIGGERED, &qca->flags); 1926 1927 switch (soc_type) { 1928 case QCA_WCN3988: 1929 case QCA_WCN3990: 1930 case QCA_WCN3991: 1931 case QCA_WCN3998: 1932 case QCA_WCN6750: 1933 case QCA_WCN6855: 1934 case QCA_WCN7850: 1935 qcadev = serdev_device_get_drvdata(hu->serdev); 1936 if (qcadev->bdaddr_property_broken) 1937 set_bit(HCI_QUIRK_BDADDR_PROPERTY_BROKEN, &hdev->quirks); 1938 1939 hci_set_aosp_capable(hdev); 1940 1941 ret = qca_read_soc_version(hdev, &ver, soc_type); 1942 if (ret) 1943 goto out; 1944 break; 1945 1946 default: 1947 qca_set_speed(hu, QCA_INIT_SPEED); 1948 } 1949 1950 /* Setup user speed if needed */ 1951 speed = qca_get_speed(hu, QCA_OPER_SPEED); 1952 if (speed) { 1953 ret = qca_set_speed(hu, QCA_OPER_SPEED); 1954 if (ret) 1955 goto out; 1956 1957 qca_baudrate = qca_get_baudrate_value(speed); 1958 } 1959 1960 switch (soc_type) { 1961 case QCA_WCN3988: 1962 case QCA_WCN3990: 1963 case QCA_WCN3991: 1964 case QCA_WCN3998: 1965 case QCA_WCN6750: 1966 case QCA_WCN6855: 1967 case QCA_WCN7850: 1968 break; 1969 1970 default: 1971 /* Get QCA version information */ 1972 ret = qca_read_soc_version(hdev, &ver, soc_type); 1973 if (ret) 1974 goto out; 1975 } 1976 1977 /* Setup patch / NVM configurations */ 1978 ret = qca_uart_setup(hdev, qca_baudrate, soc_type, ver, 1979 firmware_name, rampatch_name); 1980 if (!ret) { 1981 clear_bit(QCA_IBS_DISABLED, &qca->flags); 1982 qca_debugfs_init(hdev); 1983 hu->hdev->hw_error = qca_hw_error; 1984 hu->hdev->reset = qca_reset; 1985 if (hu->serdev) { 1986 if (device_can_wakeup(hu->serdev->ctrl->dev.parent)) 1987 hu->hdev->wakeup = qca_wakeup; 1988 } 1989 } else if (ret == -ENOENT) { 1990 /* No patch/nvm-config found, run with original fw/config */ 1991 set_bit(QCA_ROM_FW, &qca->flags); 1992 ret = 0; 1993 } else if (ret == -EAGAIN) { 1994 /* 1995 * Userspace firmware loader will return -EAGAIN in case no 1996 * patch/nvm-config is found, so run with original fw/config. 1997 */ 1998 set_bit(QCA_ROM_FW, &qca->flags); 1999 ret = 0; 2000 } 2001 2002 out: 2003 if (ret && retries < MAX_INIT_RETRIES) { 2004 bt_dev_warn(hdev, "Retry BT power ON:%d", retries); 2005 qca_power_shutdown(hu); 2006 if (hu->serdev) { 2007 serdev_device_close(hu->serdev); 2008 ret = serdev_device_open(hu->serdev); 2009 if (ret) { 2010 bt_dev_err(hdev, "failed to open port"); 2011 return ret; 2012 } 2013 } 2014 retries++; 2015 goto retry; 2016 } 2017 2018 /* Setup bdaddr */ 2019 if (soc_type == QCA_ROME) 2020 hu->hdev->set_bdaddr = qca_set_bdaddr_rome; 2021 else 2022 hu->hdev->set_bdaddr = qca_set_bdaddr; 2023 2024 if (soc_type == QCA_QCA2066) 2025 qca_configure_hfp_offload(hdev); 2026 2027 qca->fw_version = le16_to_cpu(ver.patch_ver); 2028 qca->controller_id = le16_to_cpu(ver.rom_ver); 2029 hci_devcd_register(hdev, hci_coredump_qca, qca_dmp_hdr, NULL); 2030 2031 return ret; 2032 } 2033 2034 static const struct hci_uart_proto qca_proto = { 2035 .id = HCI_UART_QCA, 2036 .name = "QCA", 2037 .manufacturer = 29, 2038 .init_speed = 115200, 2039 .oper_speed = 3000000, 2040 .open = qca_open, 2041 .close = qca_close, 2042 .flush = qca_flush, 2043 .setup = qca_setup, 2044 .recv = qca_recv, 2045 .enqueue = qca_enqueue, 2046 .dequeue = qca_dequeue, 2047 }; 2048 2049 static const struct qca_device_data qca_soc_data_wcn3988 __maybe_unused = { 2050 .soc_type = QCA_WCN3988, 2051 .vregs = (struct qca_vreg []) { 2052 { "vddio", 15000 }, 2053 { "vddxo", 80000 }, 2054 { "vddrf", 300000 }, 2055 { "vddch0", 450000 }, 2056 }, 2057 .num_vregs = 4, 2058 }; 2059 2060 static const struct qca_device_data qca_soc_data_wcn3990 __maybe_unused = { 2061 .soc_type = QCA_WCN3990, 2062 .vregs = (struct qca_vreg []) { 2063 { "vddio", 15000 }, 2064 { "vddxo", 80000 }, 2065 { "vddrf", 300000 }, 2066 { "vddch0", 450000 }, 2067 }, 2068 .num_vregs = 4, 2069 }; 2070 2071 static const struct qca_device_data qca_soc_data_wcn3991 __maybe_unused = { 2072 .soc_type = QCA_WCN3991, 2073 .vregs = (struct qca_vreg []) { 2074 { "vddio", 15000 }, 2075 { "vddxo", 80000 }, 2076 { "vddrf", 300000 }, 2077 { "vddch0", 450000 }, 2078 }, 2079 .num_vregs = 4, 2080 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2081 }; 2082 2083 static const struct qca_device_data qca_soc_data_wcn3998 __maybe_unused = { 2084 .soc_type = QCA_WCN3998, 2085 .vregs = (struct qca_vreg []) { 2086 { "vddio", 10000 }, 2087 { "vddxo", 80000 }, 2088 { "vddrf", 300000 }, 2089 { "vddch0", 450000 }, 2090 }, 2091 .num_vregs = 4, 2092 }; 2093 2094 static const struct qca_device_data qca_soc_data_qca2066 __maybe_unused = { 2095 .soc_type = QCA_QCA2066, 2096 .num_vregs = 0, 2097 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2098 }; 2099 2100 static const struct qca_device_data qca_soc_data_qca6390 __maybe_unused = { 2101 .soc_type = QCA_QCA6390, 2102 .num_vregs = 0, 2103 }; 2104 2105 static const struct qca_device_data qca_soc_data_wcn6750 __maybe_unused = { 2106 .soc_type = QCA_WCN6750, 2107 .vregs = (struct qca_vreg []) { 2108 { "vddio", 5000 }, 2109 { "vddaon", 26000 }, 2110 { "vddbtcxmx", 126000 }, 2111 { "vddrfacmn", 12500 }, 2112 { "vddrfa0p8", 102000 }, 2113 { "vddrfa1p7", 302000 }, 2114 { "vddrfa1p2", 257000 }, 2115 { "vddrfa2p2", 1700000 }, 2116 { "vddasd", 200 }, 2117 }, 2118 .num_vregs = 9, 2119 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2120 }; 2121 2122 static const struct qca_device_data qca_soc_data_wcn6855 __maybe_unused = { 2123 .soc_type = QCA_WCN6855, 2124 .vregs = (struct qca_vreg []) { 2125 { "vddio", 5000 }, 2126 { "vddbtcxmx", 126000 }, 2127 { "vddrfacmn", 12500 }, 2128 { "vddrfa0p8", 102000 }, 2129 { "vddrfa1p7", 302000 }, 2130 { "vddrfa1p2", 257000 }, 2131 }, 2132 .num_vregs = 6, 2133 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2134 }; 2135 2136 static const struct qca_device_data qca_soc_data_wcn7850 __maybe_unused = { 2137 .soc_type = QCA_WCN7850, 2138 .vregs = (struct qca_vreg []) { 2139 { "vddio", 5000 }, 2140 { "vddaon", 26000 }, 2141 { "vdddig", 126000 }, 2142 { "vddrfa0p8", 102000 }, 2143 { "vddrfa1p2", 257000 }, 2144 { "vddrfa1p9", 302000 }, 2145 }, 2146 .num_vregs = 6, 2147 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2148 }; 2149 2150 static void qca_power_shutdown(struct hci_uart *hu) 2151 { 2152 struct qca_serdev *qcadev; 2153 struct qca_data *qca = hu->priv; 2154 unsigned long flags; 2155 enum qca_btsoc_type soc_type = qca_soc_type(hu); 2156 bool sw_ctrl_state; 2157 struct qca_power *power; 2158 2159 /* From this point we go into power off state. But serial port is 2160 * still open, stop queueing the IBS data and flush all the buffered 2161 * data in skb's. 2162 */ 2163 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 2164 set_bit(QCA_IBS_DISABLED, &qca->flags); 2165 qca_flush(hu); 2166 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 2167 2168 /* Non-serdev device usually is powered by external power 2169 * and don't need additional action in driver for power down 2170 */ 2171 if (!hu->serdev) 2172 return; 2173 2174 qcadev = serdev_device_get_drvdata(hu->serdev); 2175 power = qcadev->bt_power; 2176 2177 if (power && power->pwrseq) { 2178 pwrseq_power_off(power->pwrseq); 2179 set_bit(QCA_BT_OFF, &qca->flags); 2180 return; 2181 } 2182 2183 switch (soc_type) { 2184 case QCA_WCN3988: 2185 case QCA_WCN3990: 2186 case QCA_WCN3991: 2187 case QCA_WCN3998: 2188 host_set_baudrate(hu, 2400); 2189 qca_send_power_pulse(hu, false); 2190 qca_regulator_disable(qcadev); 2191 break; 2192 2193 case QCA_WCN6750: 2194 case QCA_WCN6855: 2195 gpiod_set_value_cansleep(qcadev->bt_en, 0); 2196 msleep(100); 2197 qca_regulator_disable(qcadev); 2198 if (qcadev->sw_ctrl) { 2199 sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl); 2200 bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state); 2201 } 2202 break; 2203 2204 default: 2205 gpiod_set_value_cansleep(qcadev->bt_en, 0); 2206 } 2207 2208 set_bit(QCA_BT_OFF, &qca->flags); 2209 } 2210 2211 static int qca_power_off(struct hci_dev *hdev) 2212 { 2213 struct hci_uart *hu = hci_get_drvdata(hdev); 2214 struct qca_data *qca = hu->priv; 2215 enum qca_btsoc_type soc_type = qca_soc_type(hu); 2216 2217 hu->hdev->hw_error = NULL; 2218 hu->hdev->reset = NULL; 2219 2220 del_timer_sync(&qca->wake_retrans_timer); 2221 del_timer_sync(&qca->tx_idle_timer); 2222 2223 /* Stop sending shutdown command if soc crashes. */ 2224 if (soc_type != QCA_ROME 2225 && qca->memdump_state == QCA_MEMDUMP_IDLE) { 2226 qca_send_pre_shutdown_cmd(hdev); 2227 usleep_range(8000, 10000); 2228 } 2229 2230 qca_power_shutdown(hu); 2231 return 0; 2232 } 2233 2234 static int qca_regulator_enable(struct qca_serdev *qcadev) 2235 { 2236 struct qca_power *power = qcadev->bt_power; 2237 int ret; 2238 2239 if (power->pwrseq) 2240 return pwrseq_power_on(power->pwrseq); 2241 2242 /* Already enabled */ 2243 if (power->vregs_on) 2244 return 0; 2245 2246 BT_DBG("enabling %d regulators)", power->num_vregs); 2247 2248 ret = regulator_bulk_enable(power->num_vregs, power->vreg_bulk); 2249 if (ret) 2250 return ret; 2251 2252 power->vregs_on = true; 2253 2254 ret = clk_prepare_enable(qcadev->susclk); 2255 if (ret) 2256 qca_regulator_disable(qcadev); 2257 2258 return ret; 2259 } 2260 2261 static void qca_regulator_disable(struct qca_serdev *qcadev) 2262 { 2263 struct qca_power *power; 2264 2265 if (!qcadev) 2266 return; 2267 2268 power = qcadev->bt_power; 2269 2270 /* Already disabled? */ 2271 if (!power->vregs_on) 2272 return; 2273 2274 regulator_bulk_disable(power->num_vregs, power->vreg_bulk); 2275 power->vregs_on = false; 2276 2277 clk_disable_unprepare(qcadev->susclk); 2278 } 2279 2280 static int qca_init_regulators(struct qca_power *qca, 2281 const struct qca_vreg *vregs, size_t num_vregs) 2282 { 2283 struct regulator_bulk_data *bulk; 2284 int ret; 2285 int i; 2286 2287 bulk = devm_kcalloc(qca->dev, num_vregs, sizeof(*bulk), GFP_KERNEL); 2288 if (!bulk) 2289 return -ENOMEM; 2290 2291 for (i = 0; i < num_vregs; i++) 2292 bulk[i].supply = vregs[i].name; 2293 2294 ret = devm_regulator_bulk_get(qca->dev, num_vregs, bulk); 2295 if (ret < 0) 2296 return ret; 2297 2298 for (i = 0; i < num_vregs; i++) { 2299 ret = regulator_set_load(bulk[i].consumer, vregs[i].load_uA); 2300 if (ret) 2301 return ret; 2302 } 2303 2304 qca->vreg_bulk = bulk; 2305 qca->num_vregs = num_vregs; 2306 2307 return 0; 2308 } 2309 2310 static int qca_serdev_probe(struct serdev_device *serdev) 2311 { 2312 struct qca_serdev *qcadev; 2313 struct hci_dev *hdev; 2314 const struct qca_device_data *data; 2315 int err; 2316 bool power_ctrl_enabled = true; 2317 2318 qcadev = devm_kzalloc(&serdev->dev, sizeof(*qcadev), GFP_KERNEL); 2319 if (!qcadev) 2320 return -ENOMEM; 2321 2322 qcadev->serdev_hu.serdev = serdev; 2323 data = device_get_match_data(&serdev->dev); 2324 serdev_device_set_drvdata(serdev, qcadev); 2325 device_property_read_string_array(&serdev->dev, "firmware-name", 2326 qcadev->firmware_name, ARRAY_SIZE(qcadev->firmware_name)); 2327 device_property_read_u32(&serdev->dev, "max-speed", 2328 &qcadev->oper_speed); 2329 if (!qcadev->oper_speed) 2330 BT_DBG("UART will pick default operating speed"); 2331 2332 qcadev->bdaddr_property_broken = device_property_read_bool(&serdev->dev, 2333 "qcom,local-bd-address-broken"); 2334 2335 if (data) 2336 qcadev->btsoc_type = data->soc_type; 2337 else 2338 qcadev->btsoc_type = QCA_ROME; 2339 2340 switch (qcadev->btsoc_type) { 2341 case QCA_WCN3988: 2342 case QCA_WCN3990: 2343 case QCA_WCN3991: 2344 case QCA_WCN3998: 2345 case QCA_WCN6750: 2346 case QCA_WCN6855: 2347 case QCA_WCN7850: 2348 case QCA_QCA6390: 2349 qcadev->bt_power = devm_kzalloc(&serdev->dev, 2350 sizeof(struct qca_power), 2351 GFP_KERNEL); 2352 if (!qcadev->bt_power) 2353 return -ENOMEM; 2354 break; 2355 default: 2356 break; 2357 } 2358 2359 switch (qcadev->btsoc_type) { 2360 case QCA_WCN6855: 2361 case QCA_WCN7850: 2362 if (!device_property_present(&serdev->dev, "enable-gpios")) { 2363 /* 2364 * Backward compatibility with old DT sources. If the 2365 * node doesn't have the 'enable-gpios' property then 2366 * let's use the power sequencer. Otherwise, let's 2367 * drive everything ourselves. 2368 */ 2369 qcadev->bt_power->pwrseq = devm_pwrseq_get(&serdev->dev, 2370 "bluetooth"); 2371 if (IS_ERR(qcadev->bt_power->pwrseq)) 2372 return PTR_ERR(qcadev->bt_power->pwrseq); 2373 2374 break; 2375 } 2376 fallthrough; 2377 case QCA_WCN3988: 2378 case QCA_WCN3990: 2379 case QCA_WCN3991: 2380 case QCA_WCN3998: 2381 case QCA_WCN6750: 2382 qcadev->bt_power->dev = &serdev->dev; 2383 err = qca_init_regulators(qcadev->bt_power, data->vregs, 2384 data->num_vregs); 2385 if (err) { 2386 BT_ERR("Failed to init regulators:%d", err); 2387 return err; 2388 } 2389 2390 qcadev->bt_power->vregs_on = false; 2391 2392 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable", 2393 GPIOD_OUT_LOW); 2394 if (IS_ERR(qcadev->bt_en) && 2395 (data->soc_type == QCA_WCN6750 || 2396 data->soc_type == QCA_WCN6855)) { 2397 dev_err(&serdev->dev, "failed to acquire BT_EN gpio\n"); 2398 return PTR_ERR(qcadev->bt_en); 2399 } 2400 2401 if (!qcadev->bt_en) 2402 power_ctrl_enabled = false; 2403 2404 qcadev->sw_ctrl = devm_gpiod_get_optional(&serdev->dev, "swctrl", 2405 GPIOD_IN); 2406 if (IS_ERR(qcadev->sw_ctrl) && 2407 (data->soc_type == QCA_WCN6750 || 2408 data->soc_type == QCA_WCN6855 || 2409 data->soc_type == QCA_WCN7850)) { 2410 dev_err(&serdev->dev, "failed to acquire SW_CTRL gpio\n"); 2411 return PTR_ERR(qcadev->sw_ctrl); 2412 } 2413 2414 qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL); 2415 if (IS_ERR(qcadev->susclk)) { 2416 dev_err(&serdev->dev, "failed to acquire clk\n"); 2417 return PTR_ERR(qcadev->susclk); 2418 } 2419 break; 2420 2421 case QCA_QCA6390: 2422 if (dev_of_node(&serdev->dev)) { 2423 qcadev->bt_power->pwrseq = devm_pwrseq_get(&serdev->dev, 2424 "bluetooth"); 2425 if (IS_ERR(qcadev->bt_power->pwrseq)) 2426 return PTR_ERR(qcadev->bt_power->pwrseq); 2427 break; 2428 } 2429 fallthrough; 2430 2431 default: 2432 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable", 2433 GPIOD_OUT_LOW); 2434 if (IS_ERR(qcadev->bt_en)) { 2435 dev_err(&serdev->dev, "failed to acquire enable gpio\n"); 2436 return PTR_ERR(qcadev->bt_en); 2437 } 2438 2439 if (!qcadev->bt_en) 2440 power_ctrl_enabled = false; 2441 2442 qcadev->susclk = devm_clk_get_optional_enabled_with_rate( 2443 &serdev->dev, NULL, SUSCLK_RATE_32KHZ); 2444 if (IS_ERR(qcadev->susclk)) { 2445 dev_warn(&serdev->dev, "failed to acquire clk\n"); 2446 return PTR_ERR(qcadev->susclk); 2447 } 2448 } 2449 2450 err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto); 2451 if (err) { 2452 BT_ERR("serdev registration failed"); 2453 return err; 2454 } 2455 2456 hdev = qcadev->serdev_hu.hdev; 2457 2458 if (power_ctrl_enabled) { 2459 set_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks); 2460 hdev->shutdown = qca_power_off; 2461 } 2462 2463 if (data) { 2464 /* Wideband speech support must be set per driver since it can't 2465 * be queried via hci. Same with the valid le states quirk. 2466 */ 2467 if (data->capabilities & QCA_CAP_WIDEBAND_SPEECH) 2468 set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED, 2469 &hdev->quirks); 2470 2471 if (!(data->capabilities & QCA_CAP_VALID_LE_STATES)) 2472 set_bit(HCI_QUIRK_BROKEN_LE_STATES, &hdev->quirks); 2473 } 2474 2475 return 0; 2476 } 2477 2478 static void qca_serdev_remove(struct serdev_device *serdev) 2479 { 2480 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2481 struct qca_power *power = qcadev->bt_power; 2482 2483 switch (qcadev->btsoc_type) { 2484 case QCA_WCN3988: 2485 case QCA_WCN3990: 2486 case QCA_WCN3991: 2487 case QCA_WCN3998: 2488 case QCA_WCN6750: 2489 case QCA_WCN6855: 2490 case QCA_WCN7850: 2491 if (power->vregs_on) 2492 qca_power_shutdown(&qcadev->serdev_hu); 2493 break; 2494 default: 2495 break; 2496 } 2497 2498 hci_uart_unregister_device(&qcadev->serdev_hu); 2499 } 2500 2501 static void qca_serdev_shutdown(struct device *dev) 2502 { 2503 int ret; 2504 int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS); 2505 struct serdev_device *serdev = to_serdev_device(dev); 2506 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2507 struct hci_uart *hu = &qcadev->serdev_hu; 2508 struct hci_dev *hdev = hu->hdev; 2509 const u8 ibs_wake_cmd[] = { 0xFD }; 2510 const u8 edl_reset_soc_cmd[] = { 0x01, 0x00, 0xFC, 0x01, 0x05 }; 2511 2512 if (qcadev->btsoc_type == QCA_QCA6390) { 2513 /* The purpose of sending the VSC is to reset SOC into a initial 2514 * state and the state will ensure next hdev->setup() success. 2515 * if HCI_QUIRK_NON_PERSISTENT_SETUP is set, it means that 2516 * hdev->setup() can do its job regardless of SoC state, so 2517 * don't need to send the VSC. 2518 * if HCI_SETUP is set, it means that hdev->setup() was never 2519 * invoked and the SOC is already in the initial state, so 2520 * don't also need to send the VSC. 2521 */ 2522 if (test_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks) || 2523 hci_dev_test_flag(hdev, HCI_SETUP)) 2524 return; 2525 2526 /* The serdev must be in open state when control logic arrives 2527 * here, so also fix the use-after-free issue caused by that 2528 * the serdev is flushed or wrote after it is closed. 2529 */ 2530 serdev_device_write_flush(serdev); 2531 ret = serdev_device_write_buf(serdev, ibs_wake_cmd, 2532 sizeof(ibs_wake_cmd)); 2533 if (ret < 0) { 2534 BT_ERR("QCA send IBS_WAKE_IND error: %d", ret); 2535 return; 2536 } 2537 serdev_device_wait_until_sent(serdev, timeout); 2538 usleep_range(8000, 10000); 2539 2540 serdev_device_write_flush(serdev); 2541 ret = serdev_device_write_buf(serdev, edl_reset_soc_cmd, 2542 sizeof(edl_reset_soc_cmd)); 2543 if (ret < 0) { 2544 BT_ERR("QCA send EDL_RESET_REQ error: %d", ret); 2545 return; 2546 } 2547 serdev_device_wait_until_sent(serdev, timeout); 2548 usleep_range(8000, 10000); 2549 } 2550 } 2551 2552 static int __maybe_unused qca_suspend(struct device *dev) 2553 { 2554 struct serdev_device *serdev = to_serdev_device(dev); 2555 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2556 struct hci_uart *hu = &qcadev->serdev_hu; 2557 struct qca_data *qca = hu->priv; 2558 unsigned long flags; 2559 bool tx_pending = false; 2560 int ret = 0; 2561 u8 cmd; 2562 u32 wait_timeout = 0; 2563 2564 set_bit(QCA_SUSPENDING, &qca->flags); 2565 2566 /* if BT SoC is running with default firmware then it does not 2567 * support in-band sleep 2568 */ 2569 if (test_bit(QCA_ROM_FW, &qca->flags)) 2570 return 0; 2571 2572 /* During SSR after memory dump collection, controller will be 2573 * powered off and then powered on.If controller is powered off 2574 * during SSR then we should wait until SSR is completed. 2575 */ 2576 if (test_bit(QCA_BT_OFF, &qca->flags) && 2577 !test_bit(QCA_SSR_TRIGGERED, &qca->flags)) 2578 return 0; 2579 2580 if (test_bit(QCA_IBS_DISABLED, &qca->flags) || 2581 test_bit(QCA_SSR_TRIGGERED, &qca->flags)) { 2582 wait_timeout = test_bit(QCA_SSR_TRIGGERED, &qca->flags) ? 2583 IBS_DISABLE_SSR_TIMEOUT_MS : 2584 FW_DOWNLOAD_TIMEOUT_MS; 2585 2586 /* QCA_IBS_DISABLED flag is set to true, During FW download 2587 * and during memory dump collection. It is reset to false, 2588 * After FW download complete. 2589 */ 2590 wait_on_bit_timeout(&qca->flags, QCA_IBS_DISABLED, 2591 TASK_UNINTERRUPTIBLE, msecs_to_jiffies(wait_timeout)); 2592 2593 if (test_bit(QCA_IBS_DISABLED, &qca->flags)) { 2594 bt_dev_err(hu->hdev, "SSR or FW download time out"); 2595 ret = -ETIMEDOUT; 2596 goto error; 2597 } 2598 } 2599 2600 cancel_work_sync(&qca->ws_awake_device); 2601 cancel_work_sync(&qca->ws_awake_rx); 2602 2603 spin_lock_irqsave_nested(&qca->hci_ibs_lock, 2604 flags, SINGLE_DEPTH_NESTING); 2605 2606 switch (qca->tx_ibs_state) { 2607 case HCI_IBS_TX_WAKING: 2608 del_timer(&qca->wake_retrans_timer); 2609 fallthrough; 2610 case HCI_IBS_TX_AWAKE: 2611 del_timer(&qca->tx_idle_timer); 2612 2613 serdev_device_write_flush(hu->serdev); 2614 cmd = HCI_IBS_SLEEP_IND; 2615 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd)); 2616 2617 if (ret < 0) { 2618 BT_ERR("Failed to send SLEEP to device"); 2619 break; 2620 } 2621 2622 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; 2623 qca->ibs_sent_slps++; 2624 tx_pending = true; 2625 break; 2626 2627 case HCI_IBS_TX_ASLEEP: 2628 break; 2629 2630 default: 2631 BT_ERR("Spurious tx state %d", qca->tx_ibs_state); 2632 ret = -EINVAL; 2633 break; 2634 } 2635 2636 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 2637 2638 if (ret < 0) 2639 goto error; 2640 2641 if (tx_pending) { 2642 serdev_device_wait_until_sent(hu->serdev, 2643 msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS)); 2644 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu); 2645 } 2646 2647 /* Wait for HCI_IBS_SLEEP_IND sent by device to indicate its Tx is going 2648 * to sleep, so that the packet does not wake the system later. 2649 */ 2650 ret = wait_event_interruptible_timeout(qca->suspend_wait_q, 2651 qca->rx_ibs_state == HCI_IBS_RX_ASLEEP, 2652 msecs_to_jiffies(IBS_BTSOC_TX_IDLE_TIMEOUT_MS)); 2653 if (ret == 0) { 2654 ret = -ETIMEDOUT; 2655 goto error; 2656 } 2657 2658 return 0; 2659 2660 error: 2661 clear_bit(QCA_SUSPENDING, &qca->flags); 2662 2663 return ret; 2664 } 2665 2666 static int __maybe_unused qca_resume(struct device *dev) 2667 { 2668 struct serdev_device *serdev = to_serdev_device(dev); 2669 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2670 struct hci_uart *hu = &qcadev->serdev_hu; 2671 struct qca_data *qca = hu->priv; 2672 2673 clear_bit(QCA_SUSPENDING, &qca->flags); 2674 2675 return 0; 2676 } 2677 2678 static SIMPLE_DEV_PM_OPS(qca_pm_ops, qca_suspend, qca_resume); 2679 2680 #ifdef CONFIG_OF 2681 static const struct of_device_id qca_bluetooth_of_match[] = { 2682 { .compatible = "qcom,qca2066-bt", .data = &qca_soc_data_qca2066}, 2683 { .compatible = "qcom,qca6174-bt" }, 2684 { .compatible = "qcom,qca6390-bt", .data = &qca_soc_data_qca6390}, 2685 { .compatible = "qcom,qca9377-bt" }, 2686 { .compatible = "qcom,wcn3988-bt", .data = &qca_soc_data_wcn3988}, 2687 { .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data_wcn3990}, 2688 { .compatible = "qcom,wcn3991-bt", .data = &qca_soc_data_wcn3991}, 2689 { .compatible = "qcom,wcn3998-bt", .data = &qca_soc_data_wcn3998}, 2690 { .compatible = "qcom,wcn6750-bt", .data = &qca_soc_data_wcn6750}, 2691 { .compatible = "qcom,wcn6855-bt", .data = &qca_soc_data_wcn6855}, 2692 { .compatible = "qcom,wcn7850-bt", .data = &qca_soc_data_wcn7850}, 2693 { /* sentinel */ } 2694 }; 2695 MODULE_DEVICE_TABLE(of, qca_bluetooth_of_match); 2696 #endif 2697 2698 #ifdef CONFIG_ACPI 2699 static const struct acpi_device_id qca_bluetooth_acpi_match[] = { 2700 { "QCOM2066", (kernel_ulong_t)&qca_soc_data_qca2066 }, 2701 { "QCOM6390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2702 { "DLA16390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2703 { "DLB16390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2704 { "DLB26390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2705 { }, 2706 }; 2707 MODULE_DEVICE_TABLE(acpi, qca_bluetooth_acpi_match); 2708 #endif 2709 2710 #ifdef CONFIG_DEV_COREDUMP 2711 static void hciqca_coredump(struct device *dev) 2712 { 2713 struct serdev_device *serdev = to_serdev_device(dev); 2714 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2715 struct hci_uart *hu = &qcadev->serdev_hu; 2716 struct hci_dev *hdev = hu->hdev; 2717 2718 if (hdev->dump.coredump) 2719 hdev->dump.coredump(hdev); 2720 } 2721 #endif 2722 2723 static struct serdev_device_driver qca_serdev_driver = { 2724 .probe = qca_serdev_probe, 2725 .remove = qca_serdev_remove, 2726 .driver = { 2727 .name = "hci_uart_qca", 2728 .of_match_table = of_match_ptr(qca_bluetooth_of_match), 2729 .acpi_match_table = ACPI_PTR(qca_bluetooth_acpi_match), 2730 .shutdown = qca_serdev_shutdown, 2731 .pm = &qca_pm_ops, 2732 #ifdef CONFIG_DEV_COREDUMP 2733 .coredump = hciqca_coredump, 2734 #endif 2735 }, 2736 }; 2737 2738 int __init qca_init(void) 2739 { 2740 serdev_device_driver_register(&qca_serdev_driver); 2741 2742 return hci_uart_register_proto(&qca_proto); 2743 } 2744 2745 int __exit qca_deinit(void) 2746 { 2747 serdev_device_driver_unregister(&qca_serdev_driver); 2748 2749 return hci_uart_unregister_proto(&qca_proto); 2750 } 2751