1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Bluetooth Software UART Qualcomm protocol 4 * 5 * HCI_IBS (HCI In-Band Sleep) is Qualcomm's power management 6 * protocol extension to H4. 7 * 8 * Copyright (C) 2007 Texas Instruments, Inc. 9 * Copyright (c) 2010, 2012, 2018 The Linux Foundation. All rights reserved. 10 * 11 * Acknowledgements: 12 * This file is based on hci_ll.c, which was... 13 * Written by Ohad Ben-Cohen <ohad@bencohen.org> 14 * which was in turn based on hci_h4.c, which was written 15 * by Maxim Krasnyansky and Marcel Holtmann. 16 */ 17 18 #include <linux/kernel.h> 19 #include <linux/clk.h> 20 #include <linux/completion.h> 21 #include <linux/debugfs.h> 22 #include <linux/delay.h> 23 #include <linux/devcoredump.h> 24 #include <linux/device.h> 25 #include <linux/gpio/consumer.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/module.h> 28 #include <linux/of.h> 29 #include <linux/acpi.h> 30 #include <linux/platform_device.h> 31 #include <linux/regulator/consumer.h> 32 #include <linux/serdev.h> 33 #include <linux/mutex.h> 34 #include <asm/unaligned.h> 35 36 #include <net/bluetooth/bluetooth.h> 37 #include <net/bluetooth/hci_core.h> 38 39 #include "hci_uart.h" 40 #include "btqca.h" 41 42 /* HCI_IBS protocol messages */ 43 #define HCI_IBS_SLEEP_IND 0xFE 44 #define HCI_IBS_WAKE_IND 0xFD 45 #define HCI_IBS_WAKE_ACK 0xFC 46 #define HCI_MAX_IBS_SIZE 10 47 48 #define IBS_WAKE_RETRANS_TIMEOUT_MS 100 49 #define IBS_BTSOC_TX_IDLE_TIMEOUT_MS 200 50 #define IBS_HOST_TX_IDLE_TIMEOUT_MS 2000 51 #define CMD_TRANS_TIMEOUT_MS 100 52 #define MEMDUMP_TIMEOUT_MS 8000 53 #define IBS_DISABLE_SSR_TIMEOUT_MS \ 54 (MEMDUMP_TIMEOUT_MS + FW_DOWNLOAD_TIMEOUT_MS) 55 #define FW_DOWNLOAD_TIMEOUT_MS 3000 56 57 /* susclk rate */ 58 #define SUSCLK_RATE_32KHZ 32768 59 60 /* Controller debug log header */ 61 #define QCA_DEBUG_HANDLE 0x2EDC 62 63 /* max retry count when init fails */ 64 #define MAX_INIT_RETRIES 3 65 66 /* Controller dump header */ 67 #define QCA_SSR_DUMP_HANDLE 0x0108 68 #define QCA_DUMP_PACKET_SIZE 255 69 #define QCA_LAST_SEQUENCE_NUM 0xFFFF 70 #define QCA_CRASHBYTE_PACKET_LEN 1096 71 #define QCA_MEMDUMP_BYTE 0xFB 72 73 enum qca_flags { 74 QCA_IBS_DISABLED, 75 QCA_DROP_VENDOR_EVENT, 76 QCA_SUSPENDING, 77 QCA_MEMDUMP_COLLECTION, 78 QCA_HW_ERROR_EVENT, 79 QCA_SSR_TRIGGERED, 80 QCA_BT_OFF, 81 QCA_ROM_FW, 82 QCA_DEBUGFS_CREATED, 83 }; 84 85 enum qca_capabilities { 86 QCA_CAP_WIDEBAND_SPEECH = BIT(0), 87 QCA_CAP_VALID_LE_STATES = BIT(1), 88 }; 89 90 /* HCI_IBS transmit side sleep protocol states */ 91 enum tx_ibs_states { 92 HCI_IBS_TX_ASLEEP, 93 HCI_IBS_TX_WAKING, 94 HCI_IBS_TX_AWAKE, 95 }; 96 97 /* HCI_IBS receive side sleep protocol states */ 98 enum rx_states { 99 HCI_IBS_RX_ASLEEP, 100 HCI_IBS_RX_AWAKE, 101 }; 102 103 /* HCI_IBS transmit and receive side clock state vote */ 104 enum hci_ibs_clock_state_vote { 105 HCI_IBS_VOTE_STATS_UPDATE, 106 HCI_IBS_TX_VOTE_CLOCK_ON, 107 HCI_IBS_TX_VOTE_CLOCK_OFF, 108 HCI_IBS_RX_VOTE_CLOCK_ON, 109 HCI_IBS_RX_VOTE_CLOCK_OFF, 110 }; 111 112 /* Controller memory dump states */ 113 enum qca_memdump_states { 114 QCA_MEMDUMP_IDLE, 115 QCA_MEMDUMP_COLLECTING, 116 QCA_MEMDUMP_COLLECTED, 117 QCA_MEMDUMP_TIMEOUT, 118 }; 119 120 struct qca_memdump_info { 121 u32 current_seq_no; 122 u32 received_dump; 123 u32 ram_dump_size; 124 }; 125 126 struct qca_memdump_event_hdr { 127 __u8 evt; 128 __u8 plen; 129 __u16 opcode; 130 __le16 seq_no; 131 __u8 reserved; 132 } __packed; 133 134 135 struct qca_dump_size { 136 __le32 dump_size; 137 } __packed; 138 139 struct qca_data { 140 struct hci_uart *hu; 141 struct sk_buff *rx_skb; 142 struct sk_buff_head txq; 143 struct sk_buff_head tx_wait_q; /* HCI_IBS wait queue */ 144 struct sk_buff_head rx_memdump_q; /* Memdump wait queue */ 145 spinlock_t hci_ibs_lock; /* HCI_IBS state lock */ 146 u8 tx_ibs_state; /* HCI_IBS transmit side power state*/ 147 u8 rx_ibs_state; /* HCI_IBS receive side power state */ 148 bool tx_vote; /* Clock must be on for TX */ 149 bool rx_vote; /* Clock must be on for RX */ 150 struct timer_list tx_idle_timer; 151 u32 tx_idle_delay; 152 struct timer_list wake_retrans_timer; 153 u32 wake_retrans; 154 struct workqueue_struct *workqueue; 155 struct work_struct ws_awake_rx; 156 struct work_struct ws_awake_device; 157 struct work_struct ws_rx_vote_off; 158 struct work_struct ws_tx_vote_off; 159 struct work_struct ctrl_memdump_evt; 160 struct delayed_work ctrl_memdump_timeout; 161 struct qca_memdump_info *qca_memdump; 162 unsigned long flags; 163 struct completion drop_ev_comp; 164 wait_queue_head_t suspend_wait_q; 165 enum qca_memdump_states memdump_state; 166 struct mutex hci_memdump_lock; 167 168 u16 fw_version; 169 u16 controller_id; 170 /* For debugging purpose */ 171 u64 ibs_sent_wacks; 172 u64 ibs_sent_slps; 173 u64 ibs_sent_wakes; 174 u64 ibs_recv_wacks; 175 u64 ibs_recv_slps; 176 u64 ibs_recv_wakes; 177 u64 vote_last_jif; 178 u32 vote_on_ms; 179 u32 vote_off_ms; 180 u64 tx_votes_on; 181 u64 rx_votes_on; 182 u64 tx_votes_off; 183 u64 rx_votes_off; 184 u64 votes_on; 185 u64 votes_off; 186 }; 187 188 enum qca_speed_type { 189 QCA_INIT_SPEED = 1, 190 QCA_OPER_SPEED 191 }; 192 193 /* 194 * Voltage regulator information required for configuring the 195 * QCA Bluetooth chipset 196 */ 197 struct qca_vreg { 198 const char *name; 199 unsigned int load_uA; 200 }; 201 202 struct qca_device_data { 203 enum qca_btsoc_type soc_type; 204 struct qca_vreg *vregs; 205 size_t num_vregs; 206 uint32_t capabilities; 207 }; 208 209 /* 210 * Platform data for the QCA Bluetooth power driver. 211 */ 212 struct qca_power { 213 struct device *dev; 214 struct regulator_bulk_data *vreg_bulk; 215 int num_vregs; 216 bool vregs_on; 217 }; 218 219 struct qca_serdev { 220 struct hci_uart serdev_hu; 221 struct gpio_desc *bt_en; 222 struct gpio_desc *sw_ctrl; 223 struct clk *susclk; 224 enum qca_btsoc_type btsoc_type; 225 struct qca_power *bt_power; 226 u32 init_speed; 227 u32 oper_speed; 228 const char *firmware_name; 229 }; 230 231 static int qca_regulator_enable(struct qca_serdev *qcadev); 232 static void qca_regulator_disable(struct qca_serdev *qcadev); 233 static void qca_power_shutdown(struct hci_uart *hu); 234 static int qca_power_off(struct hci_dev *hdev); 235 static void qca_controller_memdump(struct work_struct *work); 236 static void qca_dmp_hdr(struct hci_dev *hdev, struct sk_buff *skb); 237 238 static enum qca_btsoc_type qca_soc_type(struct hci_uart *hu) 239 { 240 enum qca_btsoc_type soc_type; 241 242 if (hu->serdev) { 243 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); 244 245 soc_type = qsd->btsoc_type; 246 } else { 247 soc_type = QCA_ROME; 248 } 249 250 return soc_type; 251 } 252 253 static const char *qca_get_firmware_name(struct hci_uart *hu) 254 { 255 if (hu->serdev) { 256 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); 257 258 return qsd->firmware_name; 259 } else { 260 return NULL; 261 } 262 } 263 264 static void __serial_clock_on(struct tty_struct *tty) 265 { 266 /* TODO: Some chipset requires to enable UART clock on client 267 * side to save power consumption or manual work is required. 268 * Please put your code to control UART clock here if needed 269 */ 270 } 271 272 static void __serial_clock_off(struct tty_struct *tty) 273 { 274 /* TODO: Some chipset requires to disable UART clock on client 275 * side to save power consumption or manual work is required. 276 * Please put your code to control UART clock off here if needed 277 */ 278 } 279 280 /* serial_clock_vote needs to be called with the ibs lock held */ 281 static void serial_clock_vote(unsigned long vote, struct hci_uart *hu) 282 { 283 struct qca_data *qca = hu->priv; 284 unsigned int diff; 285 286 bool old_vote = (qca->tx_vote | qca->rx_vote); 287 bool new_vote; 288 289 switch (vote) { 290 case HCI_IBS_VOTE_STATS_UPDATE: 291 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif); 292 293 if (old_vote) 294 qca->vote_off_ms += diff; 295 else 296 qca->vote_on_ms += diff; 297 return; 298 299 case HCI_IBS_TX_VOTE_CLOCK_ON: 300 qca->tx_vote = true; 301 qca->tx_votes_on++; 302 break; 303 304 case HCI_IBS_RX_VOTE_CLOCK_ON: 305 qca->rx_vote = true; 306 qca->rx_votes_on++; 307 break; 308 309 case HCI_IBS_TX_VOTE_CLOCK_OFF: 310 qca->tx_vote = false; 311 qca->tx_votes_off++; 312 break; 313 314 case HCI_IBS_RX_VOTE_CLOCK_OFF: 315 qca->rx_vote = false; 316 qca->rx_votes_off++; 317 break; 318 319 default: 320 BT_ERR("Voting irregularity"); 321 return; 322 } 323 324 new_vote = qca->rx_vote | qca->tx_vote; 325 326 if (new_vote != old_vote) { 327 if (new_vote) 328 __serial_clock_on(hu->tty); 329 else 330 __serial_clock_off(hu->tty); 331 332 BT_DBG("Vote serial clock %s(%s)", new_vote ? "true" : "false", 333 vote ? "true" : "false"); 334 335 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif); 336 337 if (new_vote) { 338 qca->votes_on++; 339 qca->vote_off_ms += diff; 340 } else { 341 qca->votes_off++; 342 qca->vote_on_ms += diff; 343 } 344 qca->vote_last_jif = jiffies; 345 } 346 } 347 348 /* Builds and sends an HCI_IBS command packet. 349 * These are very simple packets with only 1 cmd byte. 350 */ 351 static int send_hci_ibs_cmd(u8 cmd, struct hci_uart *hu) 352 { 353 int err = 0; 354 struct sk_buff *skb = NULL; 355 struct qca_data *qca = hu->priv; 356 357 BT_DBG("hu %p send hci ibs cmd 0x%x", hu, cmd); 358 359 skb = bt_skb_alloc(1, GFP_ATOMIC); 360 if (!skb) { 361 BT_ERR("Failed to allocate memory for HCI_IBS packet"); 362 return -ENOMEM; 363 } 364 365 /* Assign HCI_IBS type */ 366 skb_put_u8(skb, cmd); 367 368 skb_queue_tail(&qca->txq, skb); 369 370 return err; 371 } 372 373 static void qca_wq_awake_device(struct work_struct *work) 374 { 375 struct qca_data *qca = container_of(work, struct qca_data, 376 ws_awake_device); 377 struct hci_uart *hu = qca->hu; 378 unsigned long retrans_delay; 379 unsigned long flags; 380 381 BT_DBG("hu %p wq awake device", hu); 382 383 /* Vote for serial clock */ 384 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_ON, hu); 385 386 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 387 388 /* Send wake indication to device */ 389 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) 390 BT_ERR("Failed to send WAKE to device"); 391 392 qca->ibs_sent_wakes++; 393 394 /* Start retransmit timer */ 395 retrans_delay = msecs_to_jiffies(qca->wake_retrans); 396 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay); 397 398 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 399 400 /* Actually send the packets */ 401 hci_uart_tx_wakeup(hu); 402 } 403 404 static void qca_wq_awake_rx(struct work_struct *work) 405 { 406 struct qca_data *qca = container_of(work, struct qca_data, 407 ws_awake_rx); 408 struct hci_uart *hu = qca->hu; 409 unsigned long flags; 410 411 BT_DBG("hu %p wq awake rx", hu); 412 413 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_ON, hu); 414 415 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 416 qca->rx_ibs_state = HCI_IBS_RX_AWAKE; 417 418 /* Always acknowledge device wake up, 419 * sending IBS message doesn't count as TX ON. 420 */ 421 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) 422 BT_ERR("Failed to acknowledge device wake up"); 423 424 qca->ibs_sent_wacks++; 425 426 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 427 428 /* Actually send the packets */ 429 hci_uart_tx_wakeup(hu); 430 } 431 432 static void qca_wq_serial_rx_clock_vote_off(struct work_struct *work) 433 { 434 struct qca_data *qca = container_of(work, struct qca_data, 435 ws_rx_vote_off); 436 struct hci_uart *hu = qca->hu; 437 438 BT_DBG("hu %p rx clock vote off", hu); 439 440 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_OFF, hu); 441 } 442 443 static void qca_wq_serial_tx_clock_vote_off(struct work_struct *work) 444 { 445 struct qca_data *qca = container_of(work, struct qca_data, 446 ws_tx_vote_off); 447 struct hci_uart *hu = qca->hu; 448 449 BT_DBG("hu %p tx clock vote off", hu); 450 451 /* Run HCI tx handling unlocked */ 452 hci_uart_tx_wakeup(hu); 453 454 /* Now that message queued to tty driver, vote for tty clocks off. 455 * It is up to the tty driver to pend the clocks off until tx done. 456 */ 457 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu); 458 } 459 460 static void hci_ibs_tx_idle_timeout(struct timer_list *t) 461 { 462 struct qca_data *qca = from_timer(qca, t, tx_idle_timer); 463 struct hci_uart *hu = qca->hu; 464 unsigned long flags; 465 466 BT_DBG("hu %p idle timeout in %d state", hu, qca->tx_ibs_state); 467 468 spin_lock_irqsave_nested(&qca->hci_ibs_lock, 469 flags, SINGLE_DEPTH_NESTING); 470 471 switch (qca->tx_ibs_state) { 472 case HCI_IBS_TX_AWAKE: 473 /* TX_IDLE, go to SLEEP */ 474 if (send_hci_ibs_cmd(HCI_IBS_SLEEP_IND, hu) < 0) { 475 BT_ERR("Failed to send SLEEP to device"); 476 break; 477 } 478 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; 479 qca->ibs_sent_slps++; 480 queue_work(qca->workqueue, &qca->ws_tx_vote_off); 481 break; 482 483 case HCI_IBS_TX_ASLEEP: 484 case HCI_IBS_TX_WAKING: 485 default: 486 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state); 487 break; 488 } 489 490 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 491 } 492 493 static void hci_ibs_wake_retrans_timeout(struct timer_list *t) 494 { 495 struct qca_data *qca = from_timer(qca, t, wake_retrans_timer); 496 struct hci_uart *hu = qca->hu; 497 unsigned long flags, retrans_delay; 498 bool retransmit = false; 499 500 BT_DBG("hu %p wake retransmit timeout in %d state", 501 hu, qca->tx_ibs_state); 502 503 spin_lock_irqsave_nested(&qca->hci_ibs_lock, 504 flags, SINGLE_DEPTH_NESTING); 505 506 /* Don't retransmit the HCI_IBS_WAKE_IND when suspending. */ 507 if (test_bit(QCA_SUSPENDING, &qca->flags)) { 508 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 509 return; 510 } 511 512 switch (qca->tx_ibs_state) { 513 case HCI_IBS_TX_WAKING: 514 /* No WAKE_ACK, retransmit WAKE */ 515 retransmit = true; 516 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) { 517 BT_ERR("Failed to acknowledge device wake up"); 518 break; 519 } 520 qca->ibs_sent_wakes++; 521 retrans_delay = msecs_to_jiffies(qca->wake_retrans); 522 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay); 523 break; 524 525 case HCI_IBS_TX_ASLEEP: 526 case HCI_IBS_TX_AWAKE: 527 default: 528 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state); 529 break; 530 } 531 532 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 533 534 if (retransmit) 535 hci_uart_tx_wakeup(hu); 536 } 537 538 539 static void qca_controller_memdump_timeout(struct work_struct *work) 540 { 541 struct qca_data *qca = container_of(work, struct qca_data, 542 ctrl_memdump_timeout.work); 543 struct hci_uart *hu = qca->hu; 544 545 mutex_lock(&qca->hci_memdump_lock); 546 if (test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) { 547 qca->memdump_state = QCA_MEMDUMP_TIMEOUT; 548 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) { 549 /* Inject hw error event to reset the device 550 * and driver. 551 */ 552 hci_reset_dev(hu->hdev); 553 } 554 } 555 556 mutex_unlock(&qca->hci_memdump_lock); 557 } 558 559 560 /* Initialize protocol */ 561 static int qca_open(struct hci_uart *hu) 562 { 563 struct qca_serdev *qcadev; 564 struct qca_data *qca; 565 566 BT_DBG("hu %p qca_open", hu); 567 568 if (!hci_uart_has_flow_control(hu)) 569 return -EOPNOTSUPP; 570 571 qca = kzalloc(sizeof(struct qca_data), GFP_KERNEL); 572 if (!qca) 573 return -ENOMEM; 574 575 skb_queue_head_init(&qca->txq); 576 skb_queue_head_init(&qca->tx_wait_q); 577 skb_queue_head_init(&qca->rx_memdump_q); 578 spin_lock_init(&qca->hci_ibs_lock); 579 mutex_init(&qca->hci_memdump_lock); 580 qca->workqueue = alloc_ordered_workqueue("qca_wq", 0); 581 if (!qca->workqueue) { 582 BT_ERR("QCA Workqueue not initialized properly"); 583 kfree(qca); 584 return -ENOMEM; 585 } 586 587 INIT_WORK(&qca->ws_awake_rx, qca_wq_awake_rx); 588 INIT_WORK(&qca->ws_awake_device, qca_wq_awake_device); 589 INIT_WORK(&qca->ws_rx_vote_off, qca_wq_serial_rx_clock_vote_off); 590 INIT_WORK(&qca->ws_tx_vote_off, qca_wq_serial_tx_clock_vote_off); 591 INIT_WORK(&qca->ctrl_memdump_evt, qca_controller_memdump); 592 INIT_DELAYED_WORK(&qca->ctrl_memdump_timeout, 593 qca_controller_memdump_timeout); 594 init_waitqueue_head(&qca->suspend_wait_q); 595 596 qca->hu = hu; 597 init_completion(&qca->drop_ev_comp); 598 599 /* Assume we start with both sides asleep -- extra wakes OK */ 600 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; 601 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP; 602 603 qca->vote_last_jif = jiffies; 604 605 hu->priv = qca; 606 607 if (hu->serdev) { 608 qcadev = serdev_device_get_drvdata(hu->serdev); 609 610 switch (qcadev->btsoc_type) { 611 case QCA_WCN3988: 612 case QCA_WCN3990: 613 case QCA_WCN3991: 614 case QCA_WCN3998: 615 case QCA_WCN6750: 616 hu->init_speed = qcadev->init_speed; 617 break; 618 619 default: 620 break; 621 } 622 623 if (qcadev->oper_speed) 624 hu->oper_speed = qcadev->oper_speed; 625 } 626 627 timer_setup(&qca->wake_retrans_timer, hci_ibs_wake_retrans_timeout, 0); 628 qca->wake_retrans = IBS_WAKE_RETRANS_TIMEOUT_MS; 629 630 timer_setup(&qca->tx_idle_timer, hci_ibs_tx_idle_timeout, 0); 631 qca->tx_idle_delay = IBS_HOST_TX_IDLE_TIMEOUT_MS; 632 633 BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u", 634 qca->tx_idle_delay, qca->wake_retrans); 635 636 return 0; 637 } 638 639 static void qca_debugfs_init(struct hci_dev *hdev) 640 { 641 struct hci_uart *hu = hci_get_drvdata(hdev); 642 struct qca_data *qca = hu->priv; 643 struct dentry *ibs_dir; 644 umode_t mode; 645 646 if (!hdev->debugfs) 647 return; 648 649 if (test_and_set_bit(QCA_DEBUGFS_CREATED, &qca->flags)) 650 return; 651 652 ibs_dir = debugfs_create_dir("ibs", hdev->debugfs); 653 654 /* read only */ 655 mode = 0444; 656 debugfs_create_u8("tx_ibs_state", mode, ibs_dir, &qca->tx_ibs_state); 657 debugfs_create_u8("rx_ibs_state", mode, ibs_dir, &qca->rx_ibs_state); 658 debugfs_create_u64("ibs_sent_sleeps", mode, ibs_dir, 659 &qca->ibs_sent_slps); 660 debugfs_create_u64("ibs_sent_wakes", mode, ibs_dir, 661 &qca->ibs_sent_wakes); 662 debugfs_create_u64("ibs_sent_wake_acks", mode, ibs_dir, 663 &qca->ibs_sent_wacks); 664 debugfs_create_u64("ibs_recv_sleeps", mode, ibs_dir, 665 &qca->ibs_recv_slps); 666 debugfs_create_u64("ibs_recv_wakes", mode, ibs_dir, 667 &qca->ibs_recv_wakes); 668 debugfs_create_u64("ibs_recv_wake_acks", mode, ibs_dir, 669 &qca->ibs_recv_wacks); 670 debugfs_create_bool("tx_vote", mode, ibs_dir, &qca->tx_vote); 671 debugfs_create_u64("tx_votes_on", mode, ibs_dir, &qca->tx_votes_on); 672 debugfs_create_u64("tx_votes_off", mode, ibs_dir, &qca->tx_votes_off); 673 debugfs_create_bool("rx_vote", mode, ibs_dir, &qca->rx_vote); 674 debugfs_create_u64("rx_votes_on", mode, ibs_dir, &qca->rx_votes_on); 675 debugfs_create_u64("rx_votes_off", mode, ibs_dir, &qca->rx_votes_off); 676 debugfs_create_u64("votes_on", mode, ibs_dir, &qca->votes_on); 677 debugfs_create_u64("votes_off", mode, ibs_dir, &qca->votes_off); 678 debugfs_create_u32("vote_on_ms", mode, ibs_dir, &qca->vote_on_ms); 679 debugfs_create_u32("vote_off_ms", mode, ibs_dir, &qca->vote_off_ms); 680 681 /* read/write */ 682 mode = 0644; 683 debugfs_create_u32("wake_retrans", mode, ibs_dir, &qca->wake_retrans); 684 debugfs_create_u32("tx_idle_delay", mode, ibs_dir, 685 &qca->tx_idle_delay); 686 } 687 688 /* Flush protocol data */ 689 static int qca_flush(struct hci_uart *hu) 690 { 691 struct qca_data *qca = hu->priv; 692 693 BT_DBG("hu %p qca flush", hu); 694 695 skb_queue_purge(&qca->tx_wait_q); 696 skb_queue_purge(&qca->txq); 697 698 return 0; 699 } 700 701 /* Close protocol */ 702 static int qca_close(struct hci_uart *hu) 703 { 704 struct qca_data *qca = hu->priv; 705 706 BT_DBG("hu %p qca close", hu); 707 708 serial_clock_vote(HCI_IBS_VOTE_STATS_UPDATE, hu); 709 710 skb_queue_purge(&qca->tx_wait_q); 711 skb_queue_purge(&qca->txq); 712 skb_queue_purge(&qca->rx_memdump_q); 713 /* 714 * Shut the timers down so they can't be rearmed when 715 * destroy_workqueue() drains pending work which in turn might try 716 * to arm a timer. After shutdown rearm attempts are silently 717 * ignored by the timer core code. 718 */ 719 timer_shutdown_sync(&qca->tx_idle_timer); 720 timer_shutdown_sync(&qca->wake_retrans_timer); 721 destroy_workqueue(qca->workqueue); 722 qca->hu = NULL; 723 724 kfree_skb(qca->rx_skb); 725 726 hu->priv = NULL; 727 728 kfree(qca); 729 730 return 0; 731 } 732 733 /* Called upon a wake-up-indication from the device. 734 */ 735 static void device_want_to_wakeup(struct hci_uart *hu) 736 { 737 unsigned long flags; 738 struct qca_data *qca = hu->priv; 739 740 BT_DBG("hu %p want to wake up", hu); 741 742 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 743 744 qca->ibs_recv_wakes++; 745 746 /* Don't wake the rx up when suspending. */ 747 if (test_bit(QCA_SUSPENDING, &qca->flags)) { 748 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 749 return; 750 } 751 752 switch (qca->rx_ibs_state) { 753 case HCI_IBS_RX_ASLEEP: 754 /* Make sure clock is on - we may have turned clock off since 755 * receiving the wake up indicator awake rx clock. 756 */ 757 queue_work(qca->workqueue, &qca->ws_awake_rx); 758 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 759 return; 760 761 case HCI_IBS_RX_AWAKE: 762 /* Always acknowledge device wake up, 763 * sending IBS message doesn't count as TX ON. 764 */ 765 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) { 766 BT_ERR("Failed to acknowledge device wake up"); 767 break; 768 } 769 qca->ibs_sent_wacks++; 770 break; 771 772 default: 773 /* Any other state is illegal */ 774 BT_ERR("Received HCI_IBS_WAKE_IND in rx state %d", 775 qca->rx_ibs_state); 776 break; 777 } 778 779 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 780 781 /* Actually send the packets */ 782 hci_uart_tx_wakeup(hu); 783 } 784 785 /* Called upon a sleep-indication from the device. 786 */ 787 static void device_want_to_sleep(struct hci_uart *hu) 788 { 789 unsigned long flags; 790 struct qca_data *qca = hu->priv; 791 792 BT_DBG("hu %p want to sleep in %d state", hu, qca->rx_ibs_state); 793 794 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 795 796 qca->ibs_recv_slps++; 797 798 switch (qca->rx_ibs_state) { 799 case HCI_IBS_RX_AWAKE: 800 /* Update state */ 801 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP; 802 /* Vote off rx clock under workqueue */ 803 queue_work(qca->workqueue, &qca->ws_rx_vote_off); 804 break; 805 806 case HCI_IBS_RX_ASLEEP: 807 break; 808 809 default: 810 /* Any other state is illegal */ 811 BT_ERR("Received HCI_IBS_SLEEP_IND in rx state %d", 812 qca->rx_ibs_state); 813 break; 814 } 815 816 wake_up_interruptible(&qca->suspend_wait_q); 817 818 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 819 } 820 821 /* Called upon wake-up-acknowledgement from the device 822 */ 823 static void device_woke_up(struct hci_uart *hu) 824 { 825 unsigned long flags, idle_delay; 826 struct qca_data *qca = hu->priv; 827 struct sk_buff *skb = NULL; 828 829 BT_DBG("hu %p woke up", hu); 830 831 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 832 833 qca->ibs_recv_wacks++; 834 835 /* Don't react to the wake-up-acknowledgment when suspending. */ 836 if (test_bit(QCA_SUSPENDING, &qca->flags)) { 837 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 838 return; 839 } 840 841 switch (qca->tx_ibs_state) { 842 case HCI_IBS_TX_AWAKE: 843 /* Expect one if we send 2 WAKEs */ 844 BT_DBG("Received HCI_IBS_WAKE_ACK in tx state %d", 845 qca->tx_ibs_state); 846 break; 847 848 case HCI_IBS_TX_WAKING: 849 /* Send pending packets */ 850 while ((skb = skb_dequeue(&qca->tx_wait_q))) 851 skb_queue_tail(&qca->txq, skb); 852 853 /* Switch timers and change state to HCI_IBS_TX_AWAKE */ 854 del_timer(&qca->wake_retrans_timer); 855 idle_delay = msecs_to_jiffies(qca->tx_idle_delay); 856 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay); 857 qca->tx_ibs_state = HCI_IBS_TX_AWAKE; 858 break; 859 860 case HCI_IBS_TX_ASLEEP: 861 default: 862 BT_ERR("Received HCI_IBS_WAKE_ACK in tx state %d", 863 qca->tx_ibs_state); 864 break; 865 } 866 867 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 868 869 /* Actually send the packets */ 870 hci_uart_tx_wakeup(hu); 871 } 872 873 /* Enqueue frame for transmittion (padding, crc, etc) may be called from 874 * two simultaneous tasklets. 875 */ 876 static int qca_enqueue(struct hci_uart *hu, struct sk_buff *skb) 877 { 878 unsigned long flags = 0, idle_delay; 879 struct qca_data *qca = hu->priv; 880 881 BT_DBG("hu %p qca enq skb %p tx_ibs_state %d", hu, skb, 882 qca->tx_ibs_state); 883 884 if (test_bit(QCA_SSR_TRIGGERED, &qca->flags)) { 885 /* As SSR is in progress, ignore the packets */ 886 bt_dev_dbg(hu->hdev, "SSR is in progress"); 887 kfree_skb(skb); 888 return 0; 889 } 890 891 /* Prepend skb with frame type */ 892 memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1); 893 894 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 895 896 /* Don't go to sleep in middle of patch download or 897 * Out-Of-Band(GPIOs control) sleep is selected. 898 * Don't wake the device up when suspending. 899 */ 900 if (test_bit(QCA_IBS_DISABLED, &qca->flags) || 901 test_bit(QCA_SUSPENDING, &qca->flags)) { 902 skb_queue_tail(&qca->txq, skb); 903 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 904 return 0; 905 } 906 907 /* Act according to current state */ 908 switch (qca->tx_ibs_state) { 909 case HCI_IBS_TX_AWAKE: 910 BT_DBG("Device awake, sending normally"); 911 skb_queue_tail(&qca->txq, skb); 912 idle_delay = msecs_to_jiffies(qca->tx_idle_delay); 913 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay); 914 break; 915 916 case HCI_IBS_TX_ASLEEP: 917 BT_DBG("Device asleep, waking up and queueing packet"); 918 /* Save packet for later */ 919 skb_queue_tail(&qca->tx_wait_q, skb); 920 921 qca->tx_ibs_state = HCI_IBS_TX_WAKING; 922 /* Schedule a work queue to wake up device */ 923 queue_work(qca->workqueue, &qca->ws_awake_device); 924 break; 925 926 case HCI_IBS_TX_WAKING: 927 BT_DBG("Device waking up, queueing packet"); 928 /* Transient state; just keep packet for later */ 929 skb_queue_tail(&qca->tx_wait_q, skb); 930 break; 931 932 default: 933 BT_ERR("Illegal tx state: %d (losing packet)", 934 qca->tx_ibs_state); 935 dev_kfree_skb_irq(skb); 936 break; 937 } 938 939 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 940 941 return 0; 942 } 943 944 static int qca_ibs_sleep_ind(struct hci_dev *hdev, struct sk_buff *skb) 945 { 946 struct hci_uart *hu = hci_get_drvdata(hdev); 947 948 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_SLEEP_IND); 949 950 device_want_to_sleep(hu); 951 952 kfree_skb(skb); 953 return 0; 954 } 955 956 static int qca_ibs_wake_ind(struct hci_dev *hdev, struct sk_buff *skb) 957 { 958 struct hci_uart *hu = hci_get_drvdata(hdev); 959 960 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_IND); 961 962 device_want_to_wakeup(hu); 963 964 kfree_skb(skb); 965 return 0; 966 } 967 968 static int qca_ibs_wake_ack(struct hci_dev *hdev, struct sk_buff *skb) 969 { 970 struct hci_uart *hu = hci_get_drvdata(hdev); 971 972 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_ACK); 973 974 device_woke_up(hu); 975 976 kfree_skb(skb); 977 return 0; 978 } 979 980 static int qca_recv_acl_data(struct hci_dev *hdev, struct sk_buff *skb) 981 { 982 /* We receive debug logs from chip as an ACL packets. 983 * Instead of sending the data to ACL to decode the 984 * received data, we are pushing them to the above layers 985 * as a diagnostic packet. 986 */ 987 if (get_unaligned_le16(skb->data) == QCA_DEBUG_HANDLE) 988 return hci_recv_diag(hdev, skb); 989 990 return hci_recv_frame(hdev, skb); 991 } 992 993 static void qca_dmp_hdr(struct hci_dev *hdev, struct sk_buff *skb) 994 { 995 struct hci_uart *hu = hci_get_drvdata(hdev); 996 struct qca_data *qca = hu->priv; 997 char buf[80]; 998 999 snprintf(buf, sizeof(buf), "Controller Name: 0x%x\n", 1000 qca->controller_id); 1001 skb_put_data(skb, buf, strlen(buf)); 1002 1003 snprintf(buf, sizeof(buf), "Firmware Version: 0x%x\n", 1004 qca->fw_version); 1005 skb_put_data(skb, buf, strlen(buf)); 1006 1007 snprintf(buf, sizeof(buf), "Vendor:Qualcomm\n"); 1008 skb_put_data(skb, buf, strlen(buf)); 1009 1010 snprintf(buf, sizeof(buf), "Driver: %s\n", 1011 hu->serdev->dev.driver->name); 1012 skb_put_data(skb, buf, strlen(buf)); 1013 } 1014 1015 static void qca_controller_memdump(struct work_struct *work) 1016 { 1017 struct qca_data *qca = container_of(work, struct qca_data, 1018 ctrl_memdump_evt); 1019 struct hci_uart *hu = qca->hu; 1020 struct sk_buff *skb; 1021 struct qca_memdump_event_hdr *cmd_hdr; 1022 struct qca_memdump_info *qca_memdump = qca->qca_memdump; 1023 struct qca_dump_size *dump; 1024 u16 seq_no; 1025 u32 rx_size; 1026 int ret = 0; 1027 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1028 1029 while ((skb = skb_dequeue(&qca->rx_memdump_q))) { 1030 1031 mutex_lock(&qca->hci_memdump_lock); 1032 /* Skip processing the received packets if timeout detected 1033 * or memdump collection completed. 1034 */ 1035 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT || 1036 qca->memdump_state == QCA_MEMDUMP_COLLECTED) { 1037 mutex_unlock(&qca->hci_memdump_lock); 1038 return; 1039 } 1040 1041 if (!qca_memdump) { 1042 qca_memdump = kzalloc(sizeof(struct qca_memdump_info), 1043 GFP_ATOMIC); 1044 if (!qca_memdump) { 1045 mutex_unlock(&qca->hci_memdump_lock); 1046 return; 1047 } 1048 1049 qca->qca_memdump = qca_memdump; 1050 } 1051 1052 qca->memdump_state = QCA_MEMDUMP_COLLECTING; 1053 cmd_hdr = (void *) skb->data; 1054 seq_no = __le16_to_cpu(cmd_hdr->seq_no); 1055 skb_pull(skb, sizeof(struct qca_memdump_event_hdr)); 1056 1057 if (!seq_no) { 1058 1059 /* This is the first frame of memdump packet from 1060 * the controller, Disable IBS to recevie dump 1061 * with out any interruption, ideally time required for 1062 * the controller to send the dump is 8 seconds. let us 1063 * start timer to handle this asynchronous activity. 1064 */ 1065 set_bit(QCA_IBS_DISABLED, &qca->flags); 1066 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1067 dump = (void *) skb->data; 1068 qca_memdump->ram_dump_size = __le32_to_cpu(dump->dump_size); 1069 if (!(qca_memdump->ram_dump_size)) { 1070 bt_dev_err(hu->hdev, "Rx invalid memdump size"); 1071 kfree(qca_memdump); 1072 kfree_skb(skb); 1073 mutex_unlock(&qca->hci_memdump_lock); 1074 return; 1075 } 1076 1077 queue_delayed_work(qca->workqueue, 1078 &qca->ctrl_memdump_timeout, 1079 msecs_to_jiffies(MEMDUMP_TIMEOUT_MS)); 1080 skb_pull(skb, sizeof(qca_memdump->ram_dump_size)); 1081 qca_memdump->current_seq_no = 0; 1082 qca_memdump->received_dump = 0; 1083 ret = hci_devcd_init(hu->hdev, qca_memdump->ram_dump_size); 1084 bt_dev_info(hu->hdev, "hci_devcd_init Return:%d", 1085 ret); 1086 if (ret < 0) { 1087 kfree(qca->qca_memdump); 1088 qca->qca_memdump = NULL; 1089 qca->memdump_state = QCA_MEMDUMP_COLLECTED; 1090 cancel_delayed_work(&qca->ctrl_memdump_timeout); 1091 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1092 mutex_unlock(&qca->hci_memdump_lock); 1093 return; 1094 } 1095 1096 bt_dev_info(hu->hdev, "QCA collecting dump of size:%u", 1097 qca_memdump->ram_dump_size); 1098 1099 } 1100 1101 /* If sequence no 0 is missed then there is no point in 1102 * accepting the other sequences. 1103 */ 1104 if (!test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) { 1105 bt_dev_err(hu->hdev, "QCA: Discarding other packets"); 1106 kfree(qca_memdump); 1107 kfree_skb(skb); 1108 mutex_unlock(&qca->hci_memdump_lock); 1109 return; 1110 } 1111 /* There could be chance of missing some packets from 1112 * the controller. In such cases let us store the dummy 1113 * packets in the buffer. 1114 */ 1115 /* For QCA6390, controller does not lost packets but 1116 * sequence number field of packet sometimes has error 1117 * bits, so skip this checking for missing packet. 1118 */ 1119 while ((seq_no > qca_memdump->current_seq_no + 1) && 1120 (soc_type != QCA_QCA6390) && 1121 seq_no != QCA_LAST_SEQUENCE_NUM) { 1122 bt_dev_err(hu->hdev, "QCA controller missed packet:%d", 1123 qca_memdump->current_seq_no); 1124 rx_size = qca_memdump->received_dump; 1125 rx_size += QCA_DUMP_PACKET_SIZE; 1126 if (rx_size > qca_memdump->ram_dump_size) { 1127 bt_dev_err(hu->hdev, 1128 "QCA memdump received %d, no space for missed packet", 1129 qca_memdump->received_dump); 1130 break; 1131 } 1132 hci_devcd_append_pattern(hu->hdev, 0x00, 1133 QCA_DUMP_PACKET_SIZE); 1134 qca_memdump->received_dump += QCA_DUMP_PACKET_SIZE; 1135 qca_memdump->current_seq_no++; 1136 } 1137 1138 rx_size = qca_memdump->received_dump + skb->len; 1139 if (rx_size <= qca_memdump->ram_dump_size) { 1140 if ((seq_no != QCA_LAST_SEQUENCE_NUM) && 1141 (seq_no != qca_memdump->current_seq_no)) { 1142 bt_dev_err(hu->hdev, 1143 "QCA memdump unexpected packet %d", 1144 seq_no); 1145 } 1146 bt_dev_dbg(hu->hdev, 1147 "QCA memdump packet %d with length %d", 1148 seq_no, skb->len); 1149 hci_devcd_append(hu->hdev, skb); 1150 qca_memdump->current_seq_no += 1; 1151 qca_memdump->received_dump = rx_size; 1152 } else { 1153 bt_dev_err(hu->hdev, 1154 "QCA memdump received no space for packet %d", 1155 qca_memdump->current_seq_no); 1156 } 1157 1158 if (seq_no == QCA_LAST_SEQUENCE_NUM) { 1159 bt_dev_info(hu->hdev, 1160 "QCA memdump Done, received %d, total %d", 1161 qca_memdump->received_dump, 1162 qca_memdump->ram_dump_size); 1163 hci_devcd_complete(hu->hdev); 1164 cancel_delayed_work(&qca->ctrl_memdump_timeout); 1165 kfree(qca->qca_memdump); 1166 qca->qca_memdump = NULL; 1167 qca->memdump_state = QCA_MEMDUMP_COLLECTED; 1168 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1169 } 1170 1171 mutex_unlock(&qca->hci_memdump_lock); 1172 } 1173 1174 } 1175 1176 static int qca_controller_memdump_event(struct hci_dev *hdev, 1177 struct sk_buff *skb) 1178 { 1179 struct hci_uart *hu = hci_get_drvdata(hdev); 1180 struct qca_data *qca = hu->priv; 1181 1182 set_bit(QCA_SSR_TRIGGERED, &qca->flags); 1183 skb_queue_tail(&qca->rx_memdump_q, skb); 1184 queue_work(qca->workqueue, &qca->ctrl_memdump_evt); 1185 1186 return 0; 1187 } 1188 1189 static int qca_recv_event(struct hci_dev *hdev, struct sk_buff *skb) 1190 { 1191 struct hci_uart *hu = hci_get_drvdata(hdev); 1192 struct qca_data *qca = hu->priv; 1193 1194 if (test_bit(QCA_DROP_VENDOR_EVENT, &qca->flags)) { 1195 struct hci_event_hdr *hdr = (void *)skb->data; 1196 1197 /* For the WCN3990 the vendor command for a baudrate change 1198 * isn't sent as synchronous HCI command, because the 1199 * controller sends the corresponding vendor event with the 1200 * new baudrate. The event is received and properly decoded 1201 * after changing the baudrate of the host port. It needs to 1202 * be dropped, otherwise it can be misinterpreted as 1203 * response to a later firmware download command (also a 1204 * vendor command). 1205 */ 1206 1207 if (hdr->evt == HCI_EV_VENDOR) 1208 complete(&qca->drop_ev_comp); 1209 1210 kfree_skb(skb); 1211 1212 return 0; 1213 } 1214 /* We receive chip memory dump as an event packet, With a dedicated 1215 * handler followed by a hardware error event. When this event is 1216 * received we store dump into a file before closing hci. This 1217 * dump will help in triaging the issues. 1218 */ 1219 if ((skb->data[0] == HCI_VENDOR_PKT) && 1220 (get_unaligned_be16(skb->data + 2) == QCA_SSR_DUMP_HANDLE)) 1221 return qca_controller_memdump_event(hdev, skb); 1222 1223 return hci_recv_frame(hdev, skb); 1224 } 1225 1226 #define QCA_IBS_SLEEP_IND_EVENT \ 1227 .type = HCI_IBS_SLEEP_IND, \ 1228 .hlen = 0, \ 1229 .loff = 0, \ 1230 .lsize = 0, \ 1231 .maxlen = HCI_MAX_IBS_SIZE 1232 1233 #define QCA_IBS_WAKE_IND_EVENT \ 1234 .type = HCI_IBS_WAKE_IND, \ 1235 .hlen = 0, \ 1236 .loff = 0, \ 1237 .lsize = 0, \ 1238 .maxlen = HCI_MAX_IBS_SIZE 1239 1240 #define QCA_IBS_WAKE_ACK_EVENT \ 1241 .type = HCI_IBS_WAKE_ACK, \ 1242 .hlen = 0, \ 1243 .loff = 0, \ 1244 .lsize = 0, \ 1245 .maxlen = HCI_MAX_IBS_SIZE 1246 1247 static const struct h4_recv_pkt qca_recv_pkts[] = { 1248 { H4_RECV_ACL, .recv = qca_recv_acl_data }, 1249 { H4_RECV_SCO, .recv = hci_recv_frame }, 1250 { H4_RECV_EVENT, .recv = qca_recv_event }, 1251 { QCA_IBS_WAKE_IND_EVENT, .recv = qca_ibs_wake_ind }, 1252 { QCA_IBS_WAKE_ACK_EVENT, .recv = qca_ibs_wake_ack }, 1253 { QCA_IBS_SLEEP_IND_EVENT, .recv = qca_ibs_sleep_ind }, 1254 }; 1255 1256 static int qca_recv(struct hci_uart *hu, const void *data, int count) 1257 { 1258 struct qca_data *qca = hu->priv; 1259 1260 if (!test_bit(HCI_UART_REGISTERED, &hu->flags)) 1261 return -EUNATCH; 1262 1263 qca->rx_skb = h4_recv_buf(hu->hdev, qca->rx_skb, data, count, 1264 qca_recv_pkts, ARRAY_SIZE(qca_recv_pkts)); 1265 if (IS_ERR(qca->rx_skb)) { 1266 int err = PTR_ERR(qca->rx_skb); 1267 bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err); 1268 qca->rx_skb = NULL; 1269 return err; 1270 } 1271 1272 return count; 1273 } 1274 1275 static struct sk_buff *qca_dequeue(struct hci_uart *hu) 1276 { 1277 struct qca_data *qca = hu->priv; 1278 1279 return skb_dequeue(&qca->txq); 1280 } 1281 1282 static uint8_t qca_get_baudrate_value(int speed) 1283 { 1284 switch (speed) { 1285 case 9600: 1286 return QCA_BAUDRATE_9600; 1287 case 19200: 1288 return QCA_BAUDRATE_19200; 1289 case 38400: 1290 return QCA_BAUDRATE_38400; 1291 case 57600: 1292 return QCA_BAUDRATE_57600; 1293 case 115200: 1294 return QCA_BAUDRATE_115200; 1295 case 230400: 1296 return QCA_BAUDRATE_230400; 1297 case 460800: 1298 return QCA_BAUDRATE_460800; 1299 case 500000: 1300 return QCA_BAUDRATE_500000; 1301 case 921600: 1302 return QCA_BAUDRATE_921600; 1303 case 1000000: 1304 return QCA_BAUDRATE_1000000; 1305 case 2000000: 1306 return QCA_BAUDRATE_2000000; 1307 case 3000000: 1308 return QCA_BAUDRATE_3000000; 1309 case 3200000: 1310 return QCA_BAUDRATE_3200000; 1311 case 3500000: 1312 return QCA_BAUDRATE_3500000; 1313 default: 1314 return QCA_BAUDRATE_115200; 1315 } 1316 } 1317 1318 static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate) 1319 { 1320 struct hci_uart *hu = hci_get_drvdata(hdev); 1321 struct qca_data *qca = hu->priv; 1322 struct sk_buff *skb; 1323 u8 cmd[] = { 0x01, 0x48, 0xFC, 0x01, 0x00 }; 1324 1325 if (baudrate > QCA_BAUDRATE_3200000) 1326 return -EINVAL; 1327 1328 cmd[4] = baudrate; 1329 1330 skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL); 1331 if (!skb) { 1332 bt_dev_err(hdev, "Failed to allocate baudrate packet"); 1333 return -ENOMEM; 1334 } 1335 1336 /* Assign commands to change baudrate and packet type. */ 1337 skb_put_data(skb, cmd, sizeof(cmd)); 1338 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT; 1339 1340 skb_queue_tail(&qca->txq, skb); 1341 hci_uart_tx_wakeup(hu); 1342 1343 /* Wait for the baudrate change request to be sent */ 1344 1345 while (!skb_queue_empty(&qca->txq)) 1346 usleep_range(100, 200); 1347 1348 if (hu->serdev) 1349 serdev_device_wait_until_sent(hu->serdev, 1350 msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS)); 1351 1352 /* Give the controller time to process the request */ 1353 switch (qca_soc_type(hu)) { 1354 case QCA_WCN3988: 1355 case QCA_WCN3990: 1356 case QCA_WCN3991: 1357 case QCA_WCN3998: 1358 case QCA_WCN6750: 1359 case QCA_WCN6855: 1360 case QCA_WCN7850: 1361 usleep_range(1000, 10000); 1362 break; 1363 1364 default: 1365 msleep(300); 1366 } 1367 1368 return 0; 1369 } 1370 1371 static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed) 1372 { 1373 if (hu->serdev) 1374 serdev_device_set_baudrate(hu->serdev, speed); 1375 else 1376 hci_uart_set_baudrate(hu, speed); 1377 } 1378 1379 static int qca_send_power_pulse(struct hci_uart *hu, bool on) 1380 { 1381 int ret; 1382 int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS); 1383 u8 cmd = on ? QCA_WCN3990_POWERON_PULSE : QCA_WCN3990_POWEROFF_PULSE; 1384 1385 /* These power pulses are single byte command which are sent 1386 * at required baudrate to wcn3990. On wcn3990, we have an external 1387 * circuit at Tx pin which decodes the pulse sent at specific baudrate. 1388 * For example, wcn3990 supports RF COEX antenna for both Wi-Fi/BT 1389 * and also we use the same power inputs to turn on and off for 1390 * Wi-Fi/BT. Powering up the power sources will not enable BT, until 1391 * we send a power on pulse at 115200 bps. This algorithm will help to 1392 * save power. Disabling hardware flow control is mandatory while 1393 * sending power pulses to SoC. 1394 */ 1395 bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd); 1396 1397 serdev_device_write_flush(hu->serdev); 1398 hci_uart_set_flow_control(hu, true); 1399 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd)); 1400 if (ret < 0) { 1401 bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd); 1402 return ret; 1403 } 1404 1405 serdev_device_wait_until_sent(hu->serdev, timeout); 1406 hci_uart_set_flow_control(hu, false); 1407 1408 /* Give to controller time to boot/shutdown */ 1409 if (on) 1410 msleep(100); 1411 else 1412 usleep_range(1000, 10000); 1413 1414 return 0; 1415 } 1416 1417 static unsigned int qca_get_speed(struct hci_uart *hu, 1418 enum qca_speed_type speed_type) 1419 { 1420 unsigned int speed = 0; 1421 1422 if (speed_type == QCA_INIT_SPEED) { 1423 if (hu->init_speed) 1424 speed = hu->init_speed; 1425 else if (hu->proto->init_speed) 1426 speed = hu->proto->init_speed; 1427 } else { 1428 if (hu->oper_speed) 1429 speed = hu->oper_speed; 1430 else if (hu->proto->oper_speed) 1431 speed = hu->proto->oper_speed; 1432 } 1433 1434 return speed; 1435 } 1436 1437 static int qca_check_speeds(struct hci_uart *hu) 1438 { 1439 switch (qca_soc_type(hu)) { 1440 case QCA_WCN3988: 1441 case QCA_WCN3990: 1442 case QCA_WCN3991: 1443 case QCA_WCN3998: 1444 case QCA_WCN6750: 1445 case QCA_WCN6855: 1446 case QCA_WCN7850: 1447 if (!qca_get_speed(hu, QCA_INIT_SPEED) && 1448 !qca_get_speed(hu, QCA_OPER_SPEED)) 1449 return -EINVAL; 1450 break; 1451 1452 default: 1453 if (!qca_get_speed(hu, QCA_INIT_SPEED) || 1454 !qca_get_speed(hu, QCA_OPER_SPEED)) 1455 return -EINVAL; 1456 } 1457 1458 return 0; 1459 } 1460 1461 static int qca_set_speed(struct hci_uart *hu, enum qca_speed_type speed_type) 1462 { 1463 unsigned int speed, qca_baudrate; 1464 struct qca_data *qca = hu->priv; 1465 int ret = 0; 1466 1467 if (speed_type == QCA_INIT_SPEED) { 1468 speed = qca_get_speed(hu, QCA_INIT_SPEED); 1469 if (speed) 1470 host_set_baudrate(hu, speed); 1471 } else { 1472 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1473 1474 speed = qca_get_speed(hu, QCA_OPER_SPEED); 1475 if (!speed) 1476 return 0; 1477 1478 /* Disable flow control for wcn3990 to deassert RTS while 1479 * changing the baudrate of chip and host. 1480 */ 1481 switch (soc_type) { 1482 case QCA_WCN3988: 1483 case QCA_WCN3990: 1484 case QCA_WCN3991: 1485 case QCA_WCN3998: 1486 case QCA_WCN6750: 1487 case QCA_WCN6855: 1488 case QCA_WCN7850: 1489 hci_uart_set_flow_control(hu, true); 1490 break; 1491 1492 default: 1493 break; 1494 } 1495 1496 switch (soc_type) { 1497 case QCA_WCN3990: 1498 reinit_completion(&qca->drop_ev_comp); 1499 set_bit(QCA_DROP_VENDOR_EVENT, &qca->flags); 1500 break; 1501 1502 default: 1503 break; 1504 } 1505 1506 qca_baudrate = qca_get_baudrate_value(speed); 1507 bt_dev_dbg(hu->hdev, "Set UART speed to %d", speed); 1508 ret = qca_set_baudrate(hu->hdev, qca_baudrate); 1509 if (ret) 1510 goto error; 1511 1512 host_set_baudrate(hu, speed); 1513 1514 error: 1515 switch (soc_type) { 1516 case QCA_WCN3988: 1517 case QCA_WCN3990: 1518 case QCA_WCN3991: 1519 case QCA_WCN3998: 1520 case QCA_WCN6750: 1521 case QCA_WCN6855: 1522 case QCA_WCN7850: 1523 hci_uart_set_flow_control(hu, false); 1524 break; 1525 1526 default: 1527 break; 1528 } 1529 1530 switch (soc_type) { 1531 case QCA_WCN3990: 1532 /* Wait for the controller to send the vendor event 1533 * for the baudrate change command. 1534 */ 1535 if (!wait_for_completion_timeout(&qca->drop_ev_comp, 1536 msecs_to_jiffies(100))) { 1537 bt_dev_err(hu->hdev, 1538 "Failed to change controller baudrate\n"); 1539 ret = -ETIMEDOUT; 1540 } 1541 1542 clear_bit(QCA_DROP_VENDOR_EVENT, &qca->flags); 1543 break; 1544 1545 default: 1546 break; 1547 } 1548 } 1549 1550 return ret; 1551 } 1552 1553 static int qca_send_crashbuffer(struct hci_uart *hu) 1554 { 1555 struct qca_data *qca = hu->priv; 1556 struct sk_buff *skb; 1557 1558 skb = bt_skb_alloc(QCA_CRASHBYTE_PACKET_LEN, GFP_KERNEL); 1559 if (!skb) { 1560 bt_dev_err(hu->hdev, "Failed to allocate memory for skb packet"); 1561 return -ENOMEM; 1562 } 1563 1564 /* We forcefully crash the controller, by sending 0xfb byte for 1565 * 1024 times. We also might have chance of losing data, To be 1566 * on safer side we send 1096 bytes to the SoC. 1567 */ 1568 memset(skb_put(skb, QCA_CRASHBYTE_PACKET_LEN), QCA_MEMDUMP_BYTE, 1569 QCA_CRASHBYTE_PACKET_LEN); 1570 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT; 1571 bt_dev_info(hu->hdev, "crash the soc to collect controller dump"); 1572 skb_queue_tail(&qca->txq, skb); 1573 hci_uart_tx_wakeup(hu); 1574 1575 return 0; 1576 } 1577 1578 static void qca_wait_for_dump_collection(struct hci_dev *hdev) 1579 { 1580 struct hci_uart *hu = hci_get_drvdata(hdev); 1581 struct qca_data *qca = hu->priv; 1582 1583 wait_on_bit_timeout(&qca->flags, QCA_MEMDUMP_COLLECTION, 1584 TASK_UNINTERRUPTIBLE, MEMDUMP_TIMEOUT_MS); 1585 1586 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1587 } 1588 1589 static void qca_hw_error(struct hci_dev *hdev, u8 code) 1590 { 1591 struct hci_uart *hu = hci_get_drvdata(hdev); 1592 struct qca_data *qca = hu->priv; 1593 1594 set_bit(QCA_SSR_TRIGGERED, &qca->flags); 1595 set_bit(QCA_HW_ERROR_EVENT, &qca->flags); 1596 bt_dev_info(hdev, "mem_dump_status: %d", qca->memdump_state); 1597 1598 if (qca->memdump_state == QCA_MEMDUMP_IDLE) { 1599 /* If hardware error event received for other than QCA 1600 * soc memory dump event, then we need to crash the SOC 1601 * and wait here for 8 seconds to get the dump packets. 1602 * This will block main thread to be on hold until we 1603 * collect dump. 1604 */ 1605 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1606 qca_send_crashbuffer(hu); 1607 qca_wait_for_dump_collection(hdev); 1608 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) { 1609 /* Let us wait here until memory dump collected or 1610 * memory dump timer expired. 1611 */ 1612 bt_dev_info(hdev, "waiting for dump to complete"); 1613 qca_wait_for_dump_collection(hdev); 1614 } 1615 1616 mutex_lock(&qca->hci_memdump_lock); 1617 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) { 1618 bt_dev_err(hu->hdev, "clearing allocated memory due to memdump timeout"); 1619 hci_devcd_abort(hu->hdev); 1620 if (qca->qca_memdump) { 1621 kfree(qca->qca_memdump); 1622 qca->qca_memdump = NULL; 1623 } 1624 qca->memdump_state = QCA_MEMDUMP_TIMEOUT; 1625 cancel_delayed_work(&qca->ctrl_memdump_timeout); 1626 } 1627 mutex_unlock(&qca->hci_memdump_lock); 1628 1629 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT || 1630 qca->memdump_state == QCA_MEMDUMP_COLLECTED) { 1631 cancel_work_sync(&qca->ctrl_memdump_evt); 1632 skb_queue_purge(&qca->rx_memdump_q); 1633 } 1634 1635 clear_bit(QCA_HW_ERROR_EVENT, &qca->flags); 1636 } 1637 1638 static void qca_cmd_timeout(struct hci_dev *hdev) 1639 { 1640 struct hci_uart *hu = hci_get_drvdata(hdev); 1641 struct qca_data *qca = hu->priv; 1642 1643 set_bit(QCA_SSR_TRIGGERED, &qca->flags); 1644 if (qca->memdump_state == QCA_MEMDUMP_IDLE) { 1645 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1646 qca_send_crashbuffer(hu); 1647 qca_wait_for_dump_collection(hdev); 1648 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) { 1649 /* Let us wait here until memory dump collected or 1650 * memory dump timer expired. 1651 */ 1652 bt_dev_info(hdev, "waiting for dump to complete"); 1653 qca_wait_for_dump_collection(hdev); 1654 } 1655 1656 mutex_lock(&qca->hci_memdump_lock); 1657 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) { 1658 qca->memdump_state = QCA_MEMDUMP_TIMEOUT; 1659 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) { 1660 /* Inject hw error event to reset the device 1661 * and driver. 1662 */ 1663 hci_reset_dev(hu->hdev); 1664 } 1665 } 1666 mutex_unlock(&qca->hci_memdump_lock); 1667 } 1668 1669 static bool qca_wakeup(struct hci_dev *hdev) 1670 { 1671 struct hci_uart *hu = hci_get_drvdata(hdev); 1672 bool wakeup; 1673 1674 /* BT SoC attached through the serial bus is handled by the serdev driver. 1675 * So we need to use the device handle of the serdev driver to get the 1676 * status of device may wakeup. 1677 */ 1678 wakeup = device_may_wakeup(&hu->serdev->ctrl->dev); 1679 bt_dev_dbg(hu->hdev, "wakeup status : %d", wakeup); 1680 1681 return wakeup; 1682 } 1683 1684 static int qca_regulator_init(struct hci_uart *hu) 1685 { 1686 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1687 struct qca_serdev *qcadev; 1688 int ret; 1689 bool sw_ctrl_state; 1690 1691 /* Check for vregs status, may be hci down has turned 1692 * off the voltage regulator. 1693 */ 1694 qcadev = serdev_device_get_drvdata(hu->serdev); 1695 if (!qcadev->bt_power->vregs_on) { 1696 serdev_device_close(hu->serdev); 1697 ret = qca_regulator_enable(qcadev); 1698 if (ret) 1699 return ret; 1700 1701 ret = serdev_device_open(hu->serdev); 1702 if (ret) { 1703 bt_dev_err(hu->hdev, "failed to open port"); 1704 return ret; 1705 } 1706 } 1707 1708 switch (soc_type) { 1709 case QCA_WCN3988: 1710 case QCA_WCN3990: 1711 case QCA_WCN3991: 1712 case QCA_WCN3998: 1713 /* Forcefully enable wcn399x to enter in to boot mode. */ 1714 host_set_baudrate(hu, 2400); 1715 ret = qca_send_power_pulse(hu, false); 1716 if (ret) 1717 return ret; 1718 break; 1719 1720 default: 1721 break; 1722 } 1723 1724 /* For wcn6750 need to enable gpio bt_en */ 1725 if (qcadev->bt_en) { 1726 gpiod_set_value_cansleep(qcadev->bt_en, 0); 1727 msleep(50); 1728 gpiod_set_value_cansleep(qcadev->bt_en, 1); 1729 msleep(50); 1730 if (qcadev->sw_ctrl) { 1731 sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl); 1732 bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state); 1733 } 1734 } 1735 1736 qca_set_speed(hu, QCA_INIT_SPEED); 1737 1738 switch (soc_type) { 1739 case QCA_WCN3988: 1740 case QCA_WCN3990: 1741 case QCA_WCN3991: 1742 case QCA_WCN3998: 1743 ret = qca_send_power_pulse(hu, true); 1744 if (ret) 1745 return ret; 1746 break; 1747 1748 default: 1749 break; 1750 } 1751 1752 /* Now the device is in ready state to communicate with host. 1753 * To sync host with device we need to reopen port. 1754 * Without this, we will have RTS and CTS synchronization 1755 * issues. 1756 */ 1757 serdev_device_close(hu->serdev); 1758 ret = serdev_device_open(hu->serdev); 1759 if (ret) { 1760 bt_dev_err(hu->hdev, "failed to open port"); 1761 return ret; 1762 } 1763 1764 hci_uart_set_flow_control(hu, false); 1765 1766 return 0; 1767 } 1768 1769 static int qca_power_on(struct hci_dev *hdev) 1770 { 1771 struct hci_uart *hu = hci_get_drvdata(hdev); 1772 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1773 struct qca_serdev *qcadev; 1774 struct qca_data *qca = hu->priv; 1775 int ret = 0; 1776 1777 /* Non-serdev device usually is powered by external power 1778 * and don't need additional action in driver for power on 1779 */ 1780 if (!hu->serdev) 1781 return 0; 1782 1783 switch (soc_type) { 1784 case QCA_WCN3988: 1785 case QCA_WCN3990: 1786 case QCA_WCN3991: 1787 case QCA_WCN3998: 1788 case QCA_WCN6750: 1789 case QCA_WCN6855: 1790 case QCA_WCN7850: 1791 ret = qca_regulator_init(hu); 1792 break; 1793 1794 default: 1795 qcadev = serdev_device_get_drvdata(hu->serdev); 1796 if (qcadev->bt_en) { 1797 gpiod_set_value_cansleep(qcadev->bt_en, 1); 1798 /* Controller needs time to bootup. */ 1799 msleep(150); 1800 } 1801 } 1802 1803 clear_bit(QCA_BT_OFF, &qca->flags); 1804 return ret; 1805 } 1806 1807 static void hci_coredump_qca(struct hci_dev *hdev) 1808 { 1809 static const u8 param[] = { 0x26 }; 1810 struct sk_buff *skb; 1811 1812 skb = __hci_cmd_sync(hdev, 0xfc0c, 1, param, HCI_CMD_TIMEOUT); 1813 if (IS_ERR(skb)) 1814 bt_dev_err(hdev, "%s: trigger crash failed (%ld)", __func__, PTR_ERR(skb)); 1815 kfree_skb(skb); 1816 } 1817 1818 static int qca_setup(struct hci_uart *hu) 1819 { 1820 struct hci_dev *hdev = hu->hdev; 1821 struct qca_data *qca = hu->priv; 1822 unsigned int speed, qca_baudrate = QCA_BAUDRATE_115200; 1823 unsigned int retries = 0; 1824 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1825 const char *firmware_name = qca_get_firmware_name(hu); 1826 int ret; 1827 struct qca_btsoc_version ver; 1828 const char *soc_name; 1829 1830 ret = qca_check_speeds(hu); 1831 if (ret) 1832 return ret; 1833 1834 clear_bit(QCA_ROM_FW, &qca->flags); 1835 /* Patch downloading has to be done without IBS mode */ 1836 set_bit(QCA_IBS_DISABLED, &qca->flags); 1837 1838 /* Enable controller to do both LE scan and BR/EDR inquiry 1839 * simultaneously. 1840 */ 1841 set_bit(HCI_QUIRK_SIMULTANEOUS_DISCOVERY, &hdev->quirks); 1842 1843 switch (soc_type) { 1844 case QCA_QCA2066: 1845 soc_name = "qca2066"; 1846 break; 1847 1848 case QCA_WCN3988: 1849 case QCA_WCN3990: 1850 case QCA_WCN3991: 1851 case QCA_WCN3998: 1852 soc_name = "wcn399x"; 1853 break; 1854 1855 case QCA_WCN6750: 1856 soc_name = "wcn6750"; 1857 break; 1858 1859 case QCA_WCN6855: 1860 soc_name = "wcn6855"; 1861 break; 1862 1863 case QCA_WCN7850: 1864 soc_name = "wcn7850"; 1865 break; 1866 1867 default: 1868 soc_name = "ROME/QCA6390"; 1869 } 1870 bt_dev_info(hdev, "setting up %s", soc_name); 1871 1872 qca->memdump_state = QCA_MEMDUMP_IDLE; 1873 1874 retry: 1875 ret = qca_power_on(hdev); 1876 if (ret) 1877 goto out; 1878 1879 clear_bit(QCA_SSR_TRIGGERED, &qca->flags); 1880 1881 switch (soc_type) { 1882 case QCA_WCN3988: 1883 case QCA_WCN3990: 1884 case QCA_WCN3991: 1885 case QCA_WCN3998: 1886 case QCA_WCN6750: 1887 case QCA_WCN6855: 1888 case QCA_WCN7850: 1889 set_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks); 1890 hci_set_aosp_capable(hdev); 1891 1892 ret = qca_read_soc_version(hdev, &ver, soc_type); 1893 if (ret) 1894 goto out; 1895 break; 1896 1897 default: 1898 qca_set_speed(hu, QCA_INIT_SPEED); 1899 } 1900 1901 /* Setup user speed if needed */ 1902 speed = qca_get_speed(hu, QCA_OPER_SPEED); 1903 if (speed) { 1904 ret = qca_set_speed(hu, QCA_OPER_SPEED); 1905 if (ret) 1906 goto out; 1907 1908 qca_baudrate = qca_get_baudrate_value(speed); 1909 } 1910 1911 switch (soc_type) { 1912 case QCA_WCN3988: 1913 case QCA_WCN3990: 1914 case QCA_WCN3991: 1915 case QCA_WCN3998: 1916 case QCA_WCN6750: 1917 case QCA_WCN6855: 1918 case QCA_WCN7850: 1919 break; 1920 1921 default: 1922 /* Get QCA version information */ 1923 ret = qca_read_soc_version(hdev, &ver, soc_type); 1924 if (ret) 1925 goto out; 1926 } 1927 1928 /* Setup patch / NVM configurations */ 1929 ret = qca_uart_setup(hdev, qca_baudrate, soc_type, ver, 1930 firmware_name); 1931 if (!ret) { 1932 clear_bit(QCA_IBS_DISABLED, &qca->flags); 1933 qca_debugfs_init(hdev); 1934 hu->hdev->hw_error = qca_hw_error; 1935 hu->hdev->cmd_timeout = qca_cmd_timeout; 1936 if (device_can_wakeup(hu->serdev->ctrl->dev.parent)) 1937 hu->hdev->wakeup = qca_wakeup; 1938 } else if (ret == -ENOENT) { 1939 /* No patch/nvm-config found, run with original fw/config */ 1940 set_bit(QCA_ROM_FW, &qca->flags); 1941 ret = 0; 1942 } else if (ret == -EAGAIN) { 1943 /* 1944 * Userspace firmware loader will return -EAGAIN in case no 1945 * patch/nvm-config is found, so run with original fw/config. 1946 */ 1947 set_bit(QCA_ROM_FW, &qca->flags); 1948 ret = 0; 1949 } 1950 1951 out: 1952 if (ret && retries < MAX_INIT_RETRIES) { 1953 bt_dev_warn(hdev, "Retry BT power ON:%d", retries); 1954 qca_power_shutdown(hu); 1955 if (hu->serdev) { 1956 serdev_device_close(hu->serdev); 1957 ret = serdev_device_open(hu->serdev); 1958 if (ret) { 1959 bt_dev_err(hdev, "failed to open port"); 1960 return ret; 1961 } 1962 } 1963 retries++; 1964 goto retry; 1965 } 1966 1967 /* Setup bdaddr */ 1968 if (soc_type == QCA_ROME) 1969 hu->hdev->set_bdaddr = qca_set_bdaddr_rome; 1970 else 1971 hu->hdev->set_bdaddr = qca_set_bdaddr; 1972 qca->fw_version = le16_to_cpu(ver.patch_ver); 1973 qca->controller_id = le16_to_cpu(ver.rom_ver); 1974 hci_devcd_register(hdev, hci_coredump_qca, qca_dmp_hdr, NULL); 1975 1976 return ret; 1977 } 1978 1979 static const struct hci_uart_proto qca_proto = { 1980 .id = HCI_UART_QCA, 1981 .name = "QCA", 1982 .manufacturer = 29, 1983 .init_speed = 115200, 1984 .oper_speed = 3000000, 1985 .open = qca_open, 1986 .close = qca_close, 1987 .flush = qca_flush, 1988 .setup = qca_setup, 1989 .recv = qca_recv, 1990 .enqueue = qca_enqueue, 1991 .dequeue = qca_dequeue, 1992 }; 1993 1994 static const struct qca_device_data qca_soc_data_wcn3988 __maybe_unused = { 1995 .soc_type = QCA_WCN3988, 1996 .vregs = (struct qca_vreg []) { 1997 { "vddio", 15000 }, 1998 { "vddxo", 80000 }, 1999 { "vddrf", 300000 }, 2000 { "vddch0", 450000 }, 2001 }, 2002 .num_vregs = 4, 2003 }; 2004 2005 static const struct qca_device_data qca_soc_data_wcn3990 __maybe_unused = { 2006 .soc_type = QCA_WCN3990, 2007 .vregs = (struct qca_vreg []) { 2008 { "vddio", 15000 }, 2009 { "vddxo", 80000 }, 2010 { "vddrf", 300000 }, 2011 { "vddch0", 450000 }, 2012 }, 2013 .num_vregs = 4, 2014 }; 2015 2016 static const struct qca_device_data qca_soc_data_wcn3991 __maybe_unused = { 2017 .soc_type = QCA_WCN3991, 2018 .vregs = (struct qca_vreg []) { 2019 { "vddio", 15000 }, 2020 { "vddxo", 80000 }, 2021 { "vddrf", 300000 }, 2022 { "vddch0", 450000 }, 2023 }, 2024 .num_vregs = 4, 2025 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2026 }; 2027 2028 static const struct qca_device_data qca_soc_data_wcn3998 __maybe_unused = { 2029 .soc_type = QCA_WCN3998, 2030 .vregs = (struct qca_vreg []) { 2031 { "vddio", 10000 }, 2032 { "vddxo", 80000 }, 2033 { "vddrf", 300000 }, 2034 { "vddch0", 450000 }, 2035 }, 2036 .num_vregs = 4, 2037 }; 2038 2039 static const struct qca_device_data qca_soc_data_qca2066 __maybe_unused = { 2040 .soc_type = QCA_QCA2066, 2041 .num_vregs = 0, 2042 }; 2043 2044 static const struct qca_device_data qca_soc_data_qca6390 __maybe_unused = { 2045 .soc_type = QCA_QCA6390, 2046 .num_vregs = 0, 2047 }; 2048 2049 static const struct qca_device_data qca_soc_data_wcn6750 __maybe_unused = { 2050 .soc_type = QCA_WCN6750, 2051 .vregs = (struct qca_vreg []) { 2052 { "vddio", 5000 }, 2053 { "vddaon", 26000 }, 2054 { "vddbtcxmx", 126000 }, 2055 { "vddrfacmn", 12500 }, 2056 { "vddrfa0p8", 102000 }, 2057 { "vddrfa1p7", 302000 }, 2058 { "vddrfa1p2", 257000 }, 2059 { "vddrfa2p2", 1700000 }, 2060 { "vddasd", 200 }, 2061 }, 2062 .num_vregs = 9, 2063 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2064 }; 2065 2066 static const struct qca_device_data qca_soc_data_wcn6855 __maybe_unused = { 2067 .soc_type = QCA_WCN6855, 2068 .vregs = (struct qca_vreg []) { 2069 { "vddio", 5000 }, 2070 { "vddbtcxmx", 126000 }, 2071 { "vddrfacmn", 12500 }, 2072 { "vddrfa0p8", 102000 }, 2073 { "vddrfa1p7", 302000 }, 2074 { "vddrfa1p2", 257000 }, 2075 }, 2076 .num_vregs = 6, 2077 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2078 }; 2079 2080 static const struct qca_device_data qca_soc_data_wcn7850 __maybe_unused = { 2081 .soc_type = QCA_WCN7850, 2082 .vregs = (struct qca_vreg []) { 2083 { "vddio", 5000 }, 2084 { "vddaon", 26000 }, 2085 { "vdddig", 126000 }, 2086 { "vddrfa0p8", 102000 }, 2087 { "vddrfa1p2", 257000 }, 2088 { "vddrfa1p9", 302000 }, 2089 }, 2090 .num_vregs = 6, 2091 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2092 }; 2093 2094 static void qca_power_shutdown(struct hci_uart *hu) 2095 { 2096 struct qca_serdev *qcadev; 2097 struct qca_data *qca = hu->priv; 2098 unsigned long flags; 2099 enum qca_btsoc_type soc_type = qca_soc_type(hu); 2100 bool sw_ctrl_state; 2101 2102 /* From this point we go into power off state. But serial port is 2103 * still open, stop queueing the IBS data and flush all the buffered 2104 * data in skb's. 2105 */ 2106 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 2107 set_bit(QCA_IBS_DISABLED, &qca->flags); 2108 qca_flush(hu); 2109 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 2110 2111 /* Non-serdev device usually is powered by external power 2112 * and don't need additional action in driver for power down 2113 */ 2114 if (!hu->serdev) 2115 return; 2116 2117 qcadev = serdev_device_get_drvdata(hu->serdev); 2118 2119 switch (soc_type) { 2120 case QCA_WCN3988: 2121 case QCA_WCN3990: 2122 case QCA_WCN3991: 2123 case QCA_WCN3998: 2124 host_set_baudrate(hu, 2400); 2125 qca_send_power_pulse(hu, false); 2126 qca_regulator_disable(qcadev); 2127 break; 2128 2129 case QCA_WCN6750: 2130 case QCA_WCN6855: 2131 gpiod_set_value_cansleep(qcadev->bt_en, 0); 2132 msleep(100); 2133 qca_regulator_disable(qcadev); 2134 if (qcadev->sw_ctrl) { 2135 sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl); 2136 bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state); 2137 } 2138 break; 2139 2140 default: 2141 gpiod_set_value_cansleep(qcadev->bt_en, 0); 2142 } 2143 2144 set_bit(QCA_BT_OFF, &qca->flags); 2145 } 2146 2147 static int qca_power_off(struct hci_dev *hdev) 2148 { 2149 struct hci_uart *hu = hci_get_drvdata(hdev); 2150 struct qca_data *qca = hu->priv; 2151 enum qca_btsoc_type soc_type = qca_soc_type(hu); 2152 2153 hu->hdev->hw_error = NULL; 2154 hu->hdev->cmd_timeout = NULL; 2155 2156 del_timer_sync(&qca->wake_retrans_timer); 2157 del_timer_sync(&qca->tx_idle_timer); 2158 2159 /* Stop sending shutdown command if soc crashes. */ 2160 if (soc_type != QCA_ROME 2161 && qca->memdump_state == QCA_MEMDUMP_IDLE) { 2162 qca_send_pre_shutdown_cmd(hdev); 2163 usleep_range(8000, 10000); 2164 } 2165 2166 qca_power_shutdown(hu); 2167 return 0; 2168 } 2169 2170 static int qca_regulator_enable(struct qca_serdev *qcadev) 2171 { 2172 struct qca_power *power = qcadev->bt_power; 2173 int ret; 2174 2175 /* Already enabled */ 2176 if (power->vregs_on) 2177 return 0; 2178 2179 BT_DBG("enabling %d regulators)", power->num_vregs); 2180 2181 ret = regulator_bulk_enable(power->num_vregs, power->vreg_bulk); 2182 if (ret) 2183 return ret; 2184 2185 power->vregs_on = true; 2186 2187 ret = clk_prepare_enable(qcadev->susclk); 2188 if (ret) 2189 qca_regulator_disable(qcadev); 2190 2191 return ret; 2192 } 2193 2194 static void qca_regulator_disable(struct qca_serdev *qcadev) 2195 { 2196 struct qca_power *power; 2197 2198 if (!qcadev) 2199 return; 2200 2201 power = qcadev->bt_power; 2202 2203 /* Already disabled? */ 2204 if (!power->vregs_on) 2205 return; 2206 2207 regulator_bulk_disable(power->num_vregs, power->vreg_bulk); 2208 power->vregs_on = false; 2209 2210 clk_disable_unprepare(qcadev->susclk); 2211 } 2212 2213 static int qca_init_regulators(struct qca_power *qca, 2214 const struct qca_vreg *vregs, size_t num_vregs) 2215 { 2216 struct regulator_bulk_data *bulk; 2217 int ret; 2218 int i; 2219 2220 bulk = devm_kcalloc(qca->dev, num_vregs, sizeof(*bulk), GFP_KERNEL); 2221 if (!bulk) 2222 return -ENOMEM; 2223 2224 for (i = 0; i < num_vregs; i++) 2225 bulk[i].supply = vregs[i].name; 2226 2227 ret = devm_regulator_bulk_get(qca->dev, num_vregs, bulk); 2228 if (ret < 0) 2229 return ret; 2230 2231 for (i = 0; i < num_vregs; i++) { 2232 ret = regulator_set_load(bulk[i].consumer, vregs[i].load_uA); 2233 if (ret) 2234 return ret; 2235 } 2236 2237 qca->vreg_bulk = bulk; 2238 qca->num_vregs = num_vregs; 2239 2240 return 0; 2241 } 2242 2243 static int qca_serdev_probe(struct serdev_device *serdev) 2244 { 2245 struct qca_serdev *qcadev; 2246 struct hci_dev *hdev; 2247 const struct qca_device_data *data; 2248 int err; 2249 bool power_ctrl_enabled = true; 2250 2251 qcadev = devm_kzalloc(&serdev->dev, sizeof(*qcadev), GFP_KERNEL); 2252 if (!qcadev) 2253 return -ENOMEM; 2254 2255 qcadev->serdev_hu.serdev = serdev; 2256 data = device_get_match_data(&serdev->dev); 2257 serdev_device_set_drvdata(serdev, qcadev); 2258 device_property_read_string(&serdev->dev, "firmware-name", 2259 &qcadev->firmware_name); 2260 device_property_read_u32(&serdev->dev, "max-speed", 2261 &qcadev->oper_speed); 2262 if (!qcadev->oper_speed) 2263 BT_DBG("UART will pick default operating speed"); 2264 2265 if (data) 2266 qcadev->btsoc_type = data->soc_type; 2267 else 2268 qcadev->btsoc_type = QCA_ROME; 2269 2270 switch (qcadev->btsoc_type) { 2271 case QCA_WCN3988: 2272 case QCA_WCN3990: 2273 case QCA_WCN3991: 2274 case QCA_WCN3998: 2275 case QCA_WCN6750: 2276 case QCA_WCN6855: 2277 case QCA_WCN7850: 2278 qcadev->bt_power = devm_kzalloc(&serdev->dev, 2279 sizeof(struct qca_power), 2280 GFP_KERNEL); 2281 if (!qcadev->bt_power) 2282 return -ENOMEM; 2283 2284 qcadev->bt_power->dev = &serdev->dev; 2285 err = qca_init_regulators(qcadev->bt_power, data->vregs, 2286 data->num_vregs); 2287 if (err) { 2288 BT_ERR("Failed to init regulators:%d", err); 2289 return err; 2290 } 2291 2292 qcadev->bt_power->vregs_on = false; 2293 2294 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable", 2295 GPIOD_OUT_LOW); 2296 if (IS_ERR_OR_NULL(qcadev->bt_en) && 2297 (data->soc_type == QCA_WCN6750 || 2298 data->soc_type == QCA_WCN6855)) { 2299 dev_err(&serdev->dev, "failed to acquire BT_EN gpio\n"); 2300 power_ctrl_enabled = false; 2301 } 2302 2303 qcadev->sw_ctrl = devm_gpiod_get_optional(&serdev->dev, "swctrl", 2304 GPIOD_IN); 2305 if (IS_ERR_OR_NULL(qcadev->sw_ctrl) && 2306 (data->soc_type == QCA_WCN6750 || 2307 data->soc_type == QCA_WCN6855 || 2308 data->soc_type == QCA_WCN7850)) 2309 dev_warn(&serdev->dev, "failed to acquire SW_CTRL gpio\n"); 2310 2311 qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL); 2312 if (IS_ERR(qcadev->susclk)) { 2313 dev_err(&serdev->dev, "failed to acquire clk\n"); 2314 return PTR_ERR(qcadev->susclk); 2315 } 2316 2317 err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto); 2318 if (err) { 2319 BT_ERR("wcn3990 serdev registration failed"); 2320 return err; 2321 } 2322 break; 2323 2324 default: 2325 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable", 2326 GPIOD_OUT_LOW); 2327 if (IS_ERR_OR_NULL(qcadev->bt_en)) { 2328 dev_warn(&serdev->dev, "failed to acquire enable gpio\n"); 2329 power_ctrl_enabled = false; 2330 } 2331 2332 qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL); 2333 if (IS_ERR(qcadev->susclk)) { 2334 dev_warn(&serdev->dev, "failed to acquire clk\n"); 2335 return PTR_ERR(qcadev->susclk); 2336 } 2337 err = clk_set_rate(qcadev->susclk, SUSCLK_RATE_32KHZ); 2338 if (err) 2339 return err; 2340 2341 err = clk_prepare_enable(qcadev->susclk); 2342 if (err) 2343 return err; 2344 2345 err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto); 2346 if (err) { 2347 BT_ERR("Rome serdev registration failed"); 2348 clk_disable_unprepare(qcadev->susclk); 2349 return err; 2350 } 2351 } 2352 2353 hdev = qcadev->serdev_hu.hdev; 2354 2355 if (power_ctrl_enabled) { 2356 set_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks); 2357 hdev->shutdown = qca_power_off; 2358 } 2359 2360 if (data) { 2361 /* Wideband speech support must be set per driver since it can't 2362 * be queried via hci. Same with the valid le states quirk. 2363 */ 2364 if (data->capabilities & QCA_CAP_WIDEBAND_SPEECH) 2365 set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED, 2366 &hdev->quirks); 2367 2368 if (data->capabilities & QCA_CAP_VALID_LE_STATES) 2369 set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks); 2370 } 2371 2372 return 0; 2373 } 2374 2375 static void qca_serdev_remove(struct serdev_device *serdev) 2376 { 2377 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2378 struct qca_power *power = qcadev->bt_power; 2379 2380 switch (qcadev->btsoc_type) { 2381 case QCA_WCN3988: 2382 case QCA_WCN3990: 2383 case QCA_WCN3991: 2384 case QCA_WCN3998: 2385 case QCA_WCN6750: 2386 case QCA_WCN6855: 2387 case QCA_WCN7850: 2388 if (power->vregs_on) { 2389 qca_power_shutdown(&qcadev->serdev_hu); 2390 break; 2391 } 2392 fallthrough; 2393 2394 default: 2395 if (qcadev->susclk) 2396 clk_disable_unprepare(qcadev->susclk); 2397 } 2398 2399 hci_uart_unregister_device(&qcadev->serdev_hu); 2400 } 2401 2402 static void qca_serdev_shutdown(struct device *dev) 2403 { 2404 int ret; 2405 int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS); 2406 struct serdev_device *serdev = to_serdev_device(dev); 2407 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2408 struct hci_uart *hu = &qcadev->serdev_hu; 2409 struct hci_dev *hdev = hu->hdev; 2410 struct qca_data *qca = hu->priv; 2411 const u8 ibs_wake_cmd[] = { 0xFD }; 2412 const u8 edl_reset_soc_cmd[] = { 0x01, 0x00, 0xFC, 0x01, 0x05 }; 2413 2414 if (qcadev->btsoc_type == QCA_QCA6390) { 2415 if (test_bit(QCA_BT_OFF, &qca->flags) || 2416 !test_bit(HCI_RUNNING, &hdev->flags)) 2417 return; 2418 2419 serdev_device_write_flush(serdev); 2420 ret = serdev_device_write_buf(serdev, ibs_wake_cmd, 2421 sizeof(ibs_wake_cmd)); 2422 if (ret < 0) { 2423 BT_ERR("QCA send IBS_WAKE_IND error: %d", ret); 2424 return; 2425 } 2426 serdev_device_wait_until_sent(serdev, timeout); 2427 usleep_range(8000, 10000); 2428 2429 serdev_device_write_flush(serdev); 2430 ret = serdev_device_write_buf(serdev, edl_reset_soc_cmd, 2431 sizeof(edl_reset_soc_cmd)); 2432 if (ret < 0) { 2433 BT_ERR("QCA send EDL_RESET_REQ error: %d", ret); 2434 return; 2435 } 2436 serdev_device_wait_until_sent(serdev, timeout); 2437 usleep_range(8000, 10000); 2438 } 2439 } 2440 2441 static int __maybe_unused qca_suspend(struct device *dev) 2442 { 2443 struct serdev_device *serdev = to_serdev_device(dev); 2444 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2445 struct hci_uart *hu = &qcadev->serdev_hu; 2446 struct qca_data *qca = hu->priv; 2447 unsigned long flags; 2448 bool tx_pending = false; 2449 int ret = 0; 2450 u8 cmd; 2451 u32 wait_timeout = 0; 2452 2453 set_bit(QCA_SUSPENDING, &qca->flags); 2454 2455 /* if BT SoC is running with default firmware then it does not 2456 * support in-band sleep 2457 */ 2458 if (test_bit(QCA_ROM_FW, &qca->flags)) 2459 return 0; 2460 2461 /* During SSR after memory dump collection, controller will be 2462 * powered off and then powered on.If controller is powered off 2463 * during SSR then we should wait until SSR is completed. 2464 */ 2465 if (test_bit(QCA_BT_OFF, &qca->flags) && 2466 !test_bit(QCA_SSR_TRIGGERED, &qca->flags)) 2467 return 0; 2468 2469 if (test_bit(QCA_IBS_DISABLED, &qca->flags) || 2470 test_bit(QCA_SSR_TRIGGERED, &qca->flags)) { 2471 wait_timeout = test_bit(QCA_SSR_TRIGGERED, &qca->flags) ? 2472 IBS_DISABLE_SSR_TIMEOUT_MS : 2473 FW_DOWNLOAD_TIMEOUT_MS; 2474 2475 /* QCA_IBS_DISABLED flag is set to true, During FW download 2476 * and during memory dump collection. It is reset to false, 2477 * After FW download complete. 2478 */ 2479 wait_on_bit_timeout(&qca->flags, QCA_IBS_DISABLED, 2480 TASK_UNINTERRUPTIBLE, msecs_to_jiffies(wait_timeout)); 2481 2482 if (test_bit(QCA_IBS_DISABLED, &qca->flags)) { 2483 bt_dev_err(hu->hdev, "SSR or FW download time out"); 2484 ret = -ETIMEDOUT; 2485 goto error; 2486 } 2487 } 2488 2489 cancel_work_sync(&qca->ws_awake_device); 2490 cancel_work_sync(&qca->ws_awake_rx); 2491 2492 spin_lock_irqsave_nested(&qca->hci_ibs_lock, 2493 flags, SINGLE_DEPTH_NESTING); 2494 2495 switch (qca->tx_ibs_state) { 2496 case HCI_IBS_TX_WAKING: 2497 del_timer(&qca->wake_retrans_timer); 2498 fallthrough; 2499 case HCI_IBS_TX_AWAKE: 2500 del_timer(&qca->tx_idle_timer); 2501 2502 serdev_device_write_flush(hu->serdev); 2503 cmd = HCI_IBS_SLEEP_IND; 2504 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd)); 2505 2506 if (ret < 0) { 2507 BT_ERR("Failed to send SLEEP to device"); 2508 break; 2509 } 2510 2511 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; 2512 qca->ibs_sent_slps++; 2513 tx_pending = true; 2514 break; 2515 2516 case HCI_IBS_TX_ASLEEP: 2517 break; 2518 2519 default: 2520 BT_ERR("Spurious tx state %d", qca->tx_ibs_state); 2521 ret = -EINVAL; 2522 break; 2523 } 2524 2525 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 2526 2527 if (ret < 0) 2528 goto error; 2529 2530 if (tx_pending) { 2531 serdev_device_wait_until_sent(hu->serdev, 2532 msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS)); 2533 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu); 2534 } 2535 2536 /* Wait for HCI_IBS_SLEEP_IND sent by device to indicate its Tx is going 2537 * to sleep, so that the packet does not wake the system later. 2538 */ 2539 ret = wait_event_interruptible_timeout(qca->suspend_wait_q, 2540 qca->rx_ibs_state == HCI_IBS_RX_ASLEEP, 2541 msecs_to_jiffies(IBS_BTSOC_TX_IDLE_TIMEOUT_MS)); 2542 if (ret == 0) { 2543 ret = -ETIMEDOUT; 2544 goto error; 2545 } 2546 2547 return 0; 2548 2549 error: 2550 clear_bit(QCA_SUSPENDING, &qca->flags); 2551 2552 return ret; 2553 } 2554 2555 static int __maybe_unused qca_resume(struct device *dev) 2556 { 2557 struct serdev_device *serdev = to_serdev_device(dev); 2558 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2559 struct hci_uart *hu = &qcadev->serdev_hu; 2560 struct qca_data *qca = hu->priv; 2561 2562 clear_bit(QCA_SUSPENDING, &qca->flags); 2563 2564 return 0; 2565 } 2566 2567 static SIMPLE_DEV_PM_OPS(qca_pm_ops, qca_suspend, qca_resume); 2568 2569 #ifdef CONFIG_OF 2570 static const struct of_device_id qca_bluetooth_of_match[] = { 2571 { .compatible = "qcom,qca2066-bt", .data = &qca_soc_data_qca2066}, 2572 { .compatible = "qcom,qca6174-bt" }, 2573 { .compatible = "qcom,qca6390-bt", .data = &qca_soc_data_qca6390}, 2574 { .compatible = "qcom,qca9377-bt" }, 2575 { .compatible = "qcom,wcn3988-bt", .data = &qca_soc_data_wcn3988}, 2576 { .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data_wcn3990}, 2577 { .compatible = "qcom,wcn3991-bt", .data = &qca_soc_data_wcn3991}, 2578 { .compatible = "qcom,wcn3998-bt", .data = &qca_soc_data_wcn3998}, 2579 { .compatible = "qcom,wcn6750-bt", .data = &qca_soc_data_wcn6750}, 2580 { .compatible = "qcom,wcn6855-bt", .data = &qca_soc_data_wcn6855}, 2581 { .compatible = "qcom,wcn7850-bt", .data = &qca_soc_data_wcn7850}, 2582 { /* sentinel */ } 2583 }; 2584 MODULE_DEVICE_TABLE(of, qca_bluetooth_of_match); 2585 #endif 2586 2587 #ifdef CONFIG_ACPI 2588 static const struct acpi_device_id qca_bluetooth_acpi_match[] = { 2589 { "QCOM2066", (kernel_ulong_t)&qca_soc_data_qca2066 }, 2590 { "QCOM6390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2591 { "DLA16390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2592 { "DLB16390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2593 { "DLB26390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2594 { }, 2595 }; 2596 MODULE_DEVICE_TABLE(acpi, qca_bluetooth_acpi_match); 2597 #endif 2598 2599 #ifdef CONFIG_DEV_COREDUMP 2600 static void hciqca_coredump(struct device *dev) 2601 { 2602 struct serdev_device *serdev = to_serdev_device(dev); 2603 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2604 struct hci_uart *hu = &qcadev->serdev_hu; 2605 struct hci_dev *hdev = hu->hdev; 2606 2607 if (hdev->dump.coredump) 2608 hdev->dump.coredump(hdev); 2609 } 2610 #endif 2611 2612 static struct serdev_device_driver qca_serdev_driver = { 2613 .probe = qca_serdev_probe, 2614 .remove = qca_serdev_remove, 2615 .driver = { 2616 .name = "hci_uart_qca", 2617 .of_match_table = of_match_ptr(qca_bluetooth_of_match), 2618 .acpi_match_table = ACPI_PTR(qca_bluetooth_acpi_match), 2619 .shutdown = qca_serdev_shutdown, 2620 .pm = &qca_pm_ops, 2621 #ifdef CONFIG_DEV_COREDUMP 2622 .coredump = hciqca_coredump, 2623 #endif 2624 }, 2625 }; 2626 2627 int __init qca_init(void) 2628 { 2629 serdev_device_driver_register(&qca_serdev_driver); 2630 2631 return hci_uart_register_proto(&qca_proto); 2632 } 2633 2634 int __exit qca_deinit(void) 2635 { 2636 serdev_device_driver_unregister(&qca_serdev_driver); 2637 2638 return hci_uart_unregister_proto(&qca_proto); 2639 } 2640