1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Bluetooth Software UART Qualcomm protocol 4 * 5 * HCI_IBS (HCI In-Band Sleep) is Qualcomm's power management 6 * protocol extension to H4. 7 * 8 * Copyright (C) 2007 Texas Instruments, Inc. 9 * Copyright (c) 2010, 2012, 2018 The Linux Foundation. All rights reserved. 10 * 11 * Acknowledgements: 12 * This file is based on hci_ll.c, which was... 13 * Written by Ohad Ben-Cohen <ohad@bencohen.org> 14 * which was in turn based on hci_h4.c, which was written 15 * by Maxim Krasnyansky and Marcel Holtmann. 16 */ 17 18 #include <linux/kernel.h> 19 #include <linux/clk.h> 20 #include <linux/completion.h> 21 #include <linux/debugfs.h> 22 #include <linux/delay.h> 23 #include <linux/devcoredump.h> 24 #include <linux/device.h> 25 #include <linux/gpio/consumer.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/module.h> 28 #include <linux/of.h> 29 #include <linux/acpi.h> 30 #include <linux/platform_device.h> 31 #include <linux/pwrseq/consumer.h> 32 #include <linux/regulator/consumer.h> 33 #include <linux/serdev.h> 34 #include <linux/mutex.h> 35 #include <linux/unaligned.h> 36 37 #include <net/bluetooth/bluetooth.h> 38 #include <net/bluetooth/hci_core.h> 39 40 #include "hci_uart.h" 41 #include "btqca.h" 42 43 /* HCI_IBS protocol messages */ 44 #define HCI_IBS_SLEEP_IND 0xFE 45 #define HCI_IBS_WAKE_IND 0xFD 46 #define HCI_IBS_WAKE_ACK 0xFC 47 #define HCI_MAX_IBS_SIZE 10 48 49 #define IBS_WAKE_RETRANS_TIMEOUT_MS 100 50 #define IBS_BTSOC_TX_IDLE_TIMEOUT_MS 200 51 #define IBS_HOST_TX_IDLE_TIMEOUT_MS 2000 52 #define CMD_TRANS_TIMEOUT_MS 100 53 #define MEMDUMP_TIMEOUT_MS 8000 54 #define IBS_DISABLE_SSR_TIMEOUT_MS \ 55 (MEMDUMP_TIMEOUT_MS + FW_DOWNLOAD_TIMEOUT_MS) 56 #define FW_DOWNLOAD_TIMEOUT_MS 3000 57 58 /* susclk rate */ 59 #define SUSCLK_RATE_32KHZ 32768 60 61 /* Controller debug log header */ 62 #define QCA_DEBUG_HANDLE 0x2EDC 63 64 /* max retry count when init fails */ 65 #define MAX_INIT_RETRIES 3 66 67 /* Controller dump header */ 68 #define QCA_SSR_DUMP_HANDLE 0x0108 69 #define QCA_DUMP_PACKET_SIZE 255 70 #define QCA_LAST_SEQUENCE_NUM 0xFFFF 71 #define QCA_CRASHBYTE_PACKET_LEN 1096 72 #define QCA_MEMDUMP_BYTE 0xFB 73 74 enum qca_flags { 75 QCA_IBS_DISABLED, 76 QCA_DROP_VENDOR_EVENT, 77 QCA_SUSPENDING, 78 QCA_MEMDUMP_COLLECTION, 79 QCA_HW_ERROR_EVENT, 80 QCA_SSR_TRIGGERED, 81 QCA_BT_OFF, 82 QCA_ROM_FW, 83 QCA_DEBUGFS_CREATED, 84 }; 85 86 enum qca_capabilities { 87 QCA_CAP_WIDEBAND_SPEECH = BIT(0), 88 QCA_CAP_VALID_LE_STATES = BIT(1), 89 }; 90 91 /* HCI_IBS transmit side sleep protocol states */ 92 enum tx_ibs_states { 93 HCI_IBS_TX_ASLEEP, 94 HCI_IBS_TX_WAKING, 95 HCI_IBS_TX_AWAKE, 96 }; 97 98 /* HCI_IBS receive side sleep protocol states */ 99 enum rx_states { 100 HCI_IBS_RX_ASLEEP, 101 HCI_IBS_RX_AWAKE, 102 }; 103 104 /* HCI_IBS transmit and receive side clock state vote */ 105 enum hci_ibs_clock_state_vote { 106 HCI_IBS_VOTE_STATS_UPDATE, 107 HCI_IBS_TX_VOTE_CLOCK_ON, 108 HCI_IBS_TX_VOTE_CLOCK_OFF, 109 HCI_IBS_RX_VOTE_CLOCK_ON, 110 HCI_IBS_RX_VOTE_CLOCK_OFF, 111 }; 112 113 /* Controller memory dump states */ 114 enum qca_memdump_states { 115 QCA_MEMDUMP_IDLE, 116 QCA_MEMDUMP_COLLECTING, 117 QCA_MEMDUMP_COLLECTED, 118 QCA_MEMDUMP_TIMEOUT, 119 }; 120 121 struct qca_memdump_info { 122 u32 current_seq_no; 123 u32 received_dump; 124 u32 ram_dump_size; 125 }; 126 127 struct qca_memdump_event_hdr { 128 __u8 evt; 129 __u8 plen; 130 __u16 opcode; 131 __le16 seq_no; 132 __u8 reserved; 133 } __packed; 134 135 136 struct qca_dump_size { 137 __le32 dump_size; 138 } __packed; 139 140 struct qca_data { 141 struct hci_uart *hu; 142 struct sk_buff *rx_skb; 143 struct sk_buff_head txq; 144 struct sk_buff_head tx_wait_q; /* HCI_IBS wait queue */ 145 struct sk_buff_head rx_memdump_q; /* Memdump wait queue */ 146 spinlock_t hci_ibs_lock; /* HCI_IBS state lock */ 147 u8 tx_ibs_state; /* HCI_IBS transmit side power state*/ 148 u8 rx_ibs_state; /* HCI_IBS receive side power state */ 149 bool tx_vote; /* Clock must be on for TX */ 150 bool rx_vote; /* Clock must be on for RX */ 151 struct timer_list tx_idle_timer; 152 u32 tx_idle_delay; 153 struct timer_list wake_retrans_timer; 154 u32 wake_retrans; 155 struct workqueue_struct *workqueue; 156 struct work_struct ws_awake_rx; 157 struct work_struct ws_awake_device; 158 struct work_struct ws_rx_vote_off; 159 struct work_struct ws_tx_vote_off; 160 struct work_struct ctrl_memdump_evt; 161 struct delayed_work ctrl_memdump_timeout; 162 struct qca_memdump_info *qca_memdump; 163 unsigned long flags; 164 struct completion drop_ev_comp; 165 wait_queue_head_t suspend_wait_q; 166 enum qca_memdump_states memdump_state; 167 struct mutex hci_memdump_lock; 168 169 u16 fw_version; 170 u16 controller_id; 171 /* For debugging purpose */ 172 u64 ibs_sent_wacks; 173 u64 ibs_sent_slps; 174 u64 ibs_sent_wakes; 175 u64 ibs_recv_wacks; 176 u64 ibs_recv_slps; 177 u64 ibs_recv_wakes; 178 u64 vote_last_jif; 179 u32 vote_on_ms; 180 u32 vote_off_ms; 181 u64 tx_votes_on; 182 u64 rx_votes_on; 183 u64 tx_votes_off; 184 u64 rx_votes_off; 185 u64 votes_on; 186 u64 votes_off; 187 }; 188 189 enum qca_speed_type { 190 QCA_INIT_SPEED = 1, 191 QCA_OPER_SPEED 192 }; 193 194 /* 195 * Voltage regulator information required for configuring the 196 * QCA Bluetooth chipset 197 */ 198 struct qca_vreg { 199 const char *name; 200 unsigned int load_uA; 201 }; 202 203 struct qca_device_data { 204 enum qca_btsoc_type soc_type; 205 struct qca_vreg *vregs; 206 size_t num_vregs; 207 uint32_t capabilities; 208 }; 209 210 /* 211 * Platform data for the QCA Bluetooth power driver. 212 */ 213 struct qca_power { 214 struct device *dev; 215 struct regulator_bulk_data *vreg_bulk; 216 int num_vregs; 217 bool vregs_on; 218 struct pwrseq_desc *pwrseq; 219 }; 220 221 struct qca_serdev { 222 struct hci_uart serdev_hu; 223 struct gpio_desc *bt_en; 224 struct gpio_desc *sw_ctrl; 225 struct clk *susclk; 226 enum qca_btsoc_type btsoc_type; 227 struct qca_power *bt_power; 228 u32 init_speed; 229 u32 oper_speed; 230 bool bdaddr_property_broken; 231 const char *firmware_name; 232 }; 233 234 static int qca_regulator_enable(struct qca_serdev *qcadev); 235 static void qca_regulator_disable(struct qca_serdev *qcadev); 236 static void qca_power_shutdown(struct hci_uart *hu); 237 static int qca_power_off(struct hci_dev *hdev); 238 static void qca_controller_memdump(struct work_struct *work); 239 static void qca_dmp_hdr(struct hci_dev *hdev, struct sk_buff *skb); 240 241 static enum qca_btsoc_type qca_soc_type(struct hci_uart *hu) 242 { 243 enum qca_btsoc_type soc_type; 244 245 if (hu->serdev) { 246 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); 247 248 soc_type = qsd->btsoc_type; 249 } else { 250 soc_type = QCA_ROME; 251 } 252 253 return soc_type; 254 } 255 256 static const char *qca_get_firmware_name(struct hci_uart *hu) 257 { 258 if (hu->serdev) { 259 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); 260 261 return qsd->firmware_name; 262 } else { 263 return NULL; 264 } 265 } 266 267 static void __serial_clock_on(struct tty_struct *tty) 268 { 269 /* TODO: Some chipset requires to enable UART clock on client 270 * side to save power consumption or manual work is required. 271 * Please put your code to control UART clock here if needed 272 */ 273 } 274 275 static void __serial_clock_off(struct tty_struct *tty) 276 { 277 /* TODO: Some chipset requires to disable UART clock on client 278 * side to save power consumption or manual work is required. 279 * Please put your code to control UART clock off here if needed 280 */ 281 } 282 283 /* serial_clock_vote needs to be called with the ibs lock held */ 284 static void serial_clock_vote(unsigned long vote, struct hci_uart *hu) 285 { 286 struct qca_data *qca = hu->priv; 287 unsigned int diff; 288 289 bool old_vote = (qca->tx_vote | qca->rx_vote); 290 bool new_vote; 291 292 switch (vote) { 293 case HCI_IBS_VOTE_STATS_UPDATE: 294 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif); 295 296 if (old_vote) 297 qca->vote_off_ms += diff; 298 else 299 qca->vote_on_ms += diff; 300 return; 301 302 case HCI_IBS_TX_VOTE_CLOCK_ON: 303 qca->tx_vote = true; 304 qca->tx_votes_on++; 305 break; 306 307 case HCI_IBS_RX_VOTE_CLOCK_ON: 308 qca->rx_vote = true; 309 qca->rx_votes_on++; 310 break; 311 312 case HCI_IBS_TX_VOTE_CLOCK_OFF: 313 qca->tx_vote = false; 314 qca->tx_votes_off++; 315 break; 316 317 case HCI_IBS_RX_VOTE_CLOCK_OFF: 318 qca->rx_vote = false; 319 qca->rx_votes_off++; 320 break; 321 322 default: 323 BT_ERR("Voting irregularity"); 324 return; 325 } 326 327 new_vote = qca->rx_vote | qca->tx_vote; 328 329 if (new_vote != old_vote) { 330 if (new_vote) 331 __serial_clock_on(hu->tty); 332 else 333 __serial_clock_off(hu->tty); 334 335 BT_DBG("Vote serial clock %s(%s)", new_vote ? "true" : "false", 336 vote ? "true" : "false"); 337 338 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif); 339 340 if (new_vote) { 341 qca->votes_on++; 342 qca->vote_off_ms += diff; 343 } else { 344 qca->votes_off++; 345 qca->vote_on_ms += diff; 346 } 347 qca->vote_last_jif = jiffies; 348 } 349 } 350 351 /* Builds and sends an HCI_IBS command packet. 352 * These are very simple packets with only 1 cmd byte. 353 */ 354 static int send_hci_ibs_cmd(u8 cmd, struct hci_uart *hu) 355 { 356 int err = 0; 357 struct sk_buff *skb = NULL; 358 struct qca_data *qca = hu->priv; 359 360 BT_DBG("hu %p send hci ibs cmd 0x%x", hu, cmd); 361 362 skb = bt_skb_alloc(1, GFP_ATOMIC); 363 if (!skb) { 364 BT_ERR("Failed to allocate memory for HCI_IBS packet"); 365 return -ENOMEM; 366 } 367 368 /* Assign HCI_IBS type */ 369 skb_put_u8(skb, cmd); 370 371 skb_queue_tail(&qca->txq, skb); 372 373 return err; 374 } 375 376 static void qca_wq_awake_device(struct work_struct *work) 377 { 378 struct qca_data *qca = container_of(work, struct qca_data, 379 ws_awake_device); 380 struct hci_uart *hu = qca->hu; 381 unsigned long retrans_delay; 382 unsigned long flags; 383 384 BT_DBG("hu %p wq awake device", hu); 385 386 /* Vote for serial clock */ 387 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_ON, hu); 388 389 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 390 391 /* Send wake indication to device */ 392 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) 393 BT_ERR("Failed to send WAKE to device"); 394 395 qca->ibs_sent_wakes++; 396 397 /* Start retransmit timer */ 398 retrans_delay = msecs_to_jiffies(qca->wake_retrans); 399 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay); 400 401 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 402 403 /* Actually send the packets */ 404 hci_uart_tx_wakeup(hu); 405 } 406 407 static void qca_wq_awake_rx(struct work_struct *work) 408 { 409 struct qca_data *qca = container_of(work, struct qca_data, 410 ws_awake_rx); 411 struct hci_uart *hu = qca->hu; 412 unsigned long flags; 413 414 BT_DBG("hu %p wq awake rx", hu); 415 416 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_ON, hu); 417 418 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 419 qca->rx_ibs_state = HCI_IBS_RX_AWAKE; 420 421 /* Always acknowledge device wake up, 422 * sending IBS message doesn't count as TX ON. 423 */ 424 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) 425 BT_ERR("Failed to acknowledge device wake up"); 426 427 qca->ibs_sent_wacks++; 428 429 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 430 431 /* Actually send the packets */ 432 hci_uart_tx_wakeup(hu); 433 } 434 435 static void qca_wq_serial_rx_clock_vote_off(struct work_struct *work) 436 { 437 struct qca_data *qca = container_of(work, struct qca_data, 438 ws_rx_vote_off); 439 struct hci_uart *hu = qca->hu; 440 441 BT_DBG("hu %p rx clock vote off", hu); 442 443 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_OFF, hu); 444 } 445 446 static void qca_wq_serial_tx_clock_vote_off(struct work_struct *work) 447 { 448 struct qca_data *qca = container_of(work, struct qca_data, 449 ws_tx_vote_off); 450 struct hci_uart *hu = qca->hu; 451 452 BT_DBG("hu %p tx clock vote off", hu); 453 454 /* Run HCI tx handling unlocked */ 455 hci_uart_tx_wakeup(hu); 456 457 /* Now that message queued to tty driver, vote for tty clocks off. 458 * It is up to the tty driver to pend the clocks off until tx done. 459 */ 460 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu); 461 } 462 463 static void hci_ibs_tx_idle_timeout(struct timer_list *t) 464 { 465 struct qca_data *qca = from_timer(qca, t, tx_idle_timer); 466 struct hci_uart *hu = qca->hu; 467 unsigned long flags; 468 469 BT_DBG("hu %p idle timeout in %d state", hu, qca->tx_ibs_state); 470 471 spin_lock_irqsave_nested(&qca->hci_ibs_lock, 472 flags, SINGLE_DEPTH_NESTING); 473 474 switch (qca->tx_ibs_state) { 475 case HCI_IBS_TX_AWAKE: 476 /* TX_IDLE, go to SLEEP */ 477 if (send_hci_ibs_cmd(HCI_IBS_SLEEP_IND, hu) < 0) { 478 BT_ERR("Failed to send SLEEP to device"); 479 break; 480 } 481 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; 482 qca->ibs_sent_slps++; 483 queue_work(qca->workqueue, &qca->ws_tx_vote_off); 484 break; 485 486 case HCI_IBS_TX_ASLEEP: 487 case HCI_IBS_TX_WAKING: 488 default: 489 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state); 490 break; 491 } 492 493 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 494 } 495 496 static void hci_ibs_wake_retrans_timeout(struct timer_list *t) 497 { 498 struct qca_data *qca = from_timer(qca, t, wake_retrans_timer); 499 struct hci_uart *hu = qca->hu; 500 unsigned long flags, retrans_delay; 501 bool retransmit = false; 502 503 BT_DBG("hu %p wake retransmit timeout in %d state", 504 hu, qca->tx_ibs_state); 505 506 spin_lock_irqsave_nested(&qca->hci_ibs_lock, 507 flags, SINGLE_DEPTH_NESTING); 508 509 /* Don't retransmit the HCI_IBS_WAKE_IND when suspending. */ 510 if (test_bit(QCA_SUSPENDING, &qca->flags)) { 511 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 512 return; 513 } 514 515 switch (qca->tx_ibs_state) { 516 case HCI_IBS_TX_WAKING: 517 /* No WAKE_ACK, retransmit WAKE */ 518 retransmit = true; 519 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) { 520 BT_ERR("Failed to acknowledge device wake up"); 521 break; 522 } 523 qca->ibs_sent_wakes++; 524 retrans_delay = msecs_to_jiffies(qca->wake_retrans); 525 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay); 526 break; 527 528 case HCI_IBS_TX_ASLEEP: 529 case HCI_IBS_TX_AWAKE: 530 default: 531 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state); 532 break; 533 } 534 535 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 536 537 if (retransmit) 538 hci_uart_tx_wakeup(hu); 539 } 540 541 542 static void qca_controller_memdump_timeout(struct work_struct *work) 543 { 544 struct qca_data *qca = container_of(work, struct qca_data, 545 ctrl_memdump_timeout.work); 546 struct hci_uart *hu = qca->hu; 547 548 mutex_lock(&qca->hci_memdump_lock); 549 if (test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) { 550 qca->memdump_state = QCA_MEMDUMP_TIMEOUT; 551 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) { 552 /* Inject hw error event to reset the device 553 * and driver. 554 */ 555 hci_reset_dev(hu->hdev); 556 } 557 } 558 559 mutex_unlock(&qca->hci_memdump_lock); 560 } 561 562 563 /* Initialize protocol */ 564 static int qca_open(struct hci_uart *hu) 565 { 566 struct qca_serdev *qcadev; 567 struct qca_data *qca; 568 569 BT_DBG("hu %p qca_open", hu); 570 571 if (!hci_uart_has_flow_control(hu)) 572 return -EOPNOTSUPP; 573 574 qca = kzalloc(sizeof(*qca), GFP_KERNEL); 575 if (!qca) 576 return -ENOMEM; 577 578 skb_queue_head_init(&qca->txq); 579 skb_queue_head_init(&qca->tx_wait_q); 580 skb_queue_head_init(&qca->rx_memdump_q); 581 spin_lock_init(&qca->hci_ibs_lock); 582 mutex_init(&qca->hci_memdump_lock); 583 qca->workqueue = alloc_ordered_workqueue("qca_wq", 0); 584 if (!qca->workqueue) { 585 BT_ERR("QCA Workqueue not initialized properly"); 586 kfree(qca); 587 return -ENOMEM; 588 } 589 590 INIT_WORK(&qca->ws_awake_rx, qca_wq_awake_rx); 591 INIT_WORK(&qca->ws_awake_device, qca_wq_awake_device); 592 INIT_WORK(&qca->ws_rx_vote_off, qca_wq_serial_rx_clock_vote_off); 593 INIT_WORK(&qca->ws_tx_vote_off, qca_wq_serial_tx_clock_vote_off); 594 INIT_WORK(&qca->ctrl_memdump_evt, qca_controller_memdump); 595 INIT_DELAYED_WORK(&qca->ctrl_memdump_timeout, 596 qca_controller_memdump_timeout); 597 init_waitqueue_head(&qca->suspend_wait_q); 598 599 qca->hu = hu; 600 init_completion(&qca->drop_ev_comp); 601 602 /* Assume we start with both sides asleep -- extra wakes OK */ 603 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; 604 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP; 605 606 qca->vote_last_jif = jiffies; 607 608 hu->priv = qca; 609 610 if (hu->serdev) { 611 qcadev = serdev_device_get_drvdata(hu->serdev); 612 613 switch (qcadev->btsoc_type) { 614 case QCA_WCN3988: 615 case QCA_WCN3990: 616 case QCA_WCN3991: 617 case QCA_WCN3998: 618 case QCA_WCN6750: 619 hu->init_speed = qcadev->init_speed; 620 break; 621 622 default: 623 break; 624 } 625 626 if (qcadev->oper_speed) 627 hu->oper_speed = qcadev->oper_speed; 628 } 629 630 timer_setup(&qca->wake_retrans_timer, hci_ibs_wake_retrans_timeout, 0); 631 qca->wake_retrans = IBS_WAKE_RETRANS_TIMEOUT_MS; 632 633 timer_setup(&qca->tx_idle_timer, hci_ibs_tx_idle_timeout, 0); 634 qca->tx_idle_delay = IBS_HOST_TX_IDLE_TIMEOUT_MS; 635 636 BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u", 637 qca->tx_idle_delay, qca->wake_retrans); 638 639 return 0; 640 } 641 642 static void qca_debugfs_init(struct hci_dev *hdev) 643 { 644 struct hci_uart *hu = hci_get_drvdata(hdev); 645 struct qca_data *qca = hu->priv; 646 struct dentry *ibs_dir; 647 umode_t mode; 648 649 if (!hdev->debugfs) 650 return; 651 652 if (test_and_set_bit(QCA_DEBUGFS_CREATED, &qca->flags)) 653 return; 654 655 ibs_dir = debugfs_create_dir("ibs", hdev->debugfs); 656 657 /* read only */ 658 mode = 0444; 659 debugfs_create_u8("tx_ibs_state", mode, ibs_dir, &qca->tx_ibs_state); 660 debugfs_create_u8("rx_ibs_state", mode, ibs_dir, &qca->rx_ibs_state); 661 debugfs_create_u64("ibs_sent_sleeps", mode, ibs_dir, 662 &qca->ibs_sent_slps); 663 debugfs_create_u64("ibs_sent_wakes", mode, ibs_dir, 664 &qca->ibs_sent_wakes); 665 debugfs_create_u64("ibs_sent_wake_acks", mode, ibs_dir, 666 &qca->ibs_sent_wacks); 667 debugfs_create_u64("ibs_recv_sleeps", mode, ibs_dir, 668 &qca->ibs_recv_slps); 669 debugfs_create_u64("ibs_recv_wakes", mode, ibs_dir, 670 &qca->ibs_recv_wakes); 671 debugfs_create_u64("ibs_recv_wake_acks", mode, ibs_dir, 672 &qca->ibs_recv_wacks); 673 debugfs_create_bool("tx_vote", mode, ibs_dir, &qca->tx_vote); 674 debugfs_create_u64("tx_votes_on", mode, ibs_dir, &qca->tx_votes_on); 675 debugfs_create_u64("tx_votes_off", mode, ibs_dir, &qca->tx_votes_off); 676 debugfs_create_bool("rx_vote", mode, ibs_dir, &qca->rx_vote); 677 debugfs_create_u64("rx_votes_on", mode, ibs_dir, &qca->rx_votes_on); 678 debugfs_create_u64("rx_votes_off", mode, ibs_dir, &qca->rx_votes_off); 679 debugfs_create_u64("votes_on", mode, ibs_dir, &qca->votes_on); 680 debugfs_create_u64("votes_off", mode, ibs_dir, &qca->votes_off); 681 debugfs_create_u32("vote_on_ms", mode, ibs_dir, &qca->vote_on_ms); 682 debugfs_create_u32("vote_off_ms", mode, ibs_dir, &qca->vote_off_ms); 683 684 /* read/write */ 685 mode = 0644; 686 debugfs_create_u32("wake_retrans", mode, ibs_dir, &qca->wake_retrans); 687 debugfs_create_u32("tx_idle_delay", mode, ibs_dir, 688 &qca->tx_idle_delay); 689 } 690 691 /* Flush protocol data */ 692 static int qca_flush(struct hci_uart *hu) 693 { 694 struct qca_data *qca = hu->priv; 695 696 BT_DBG("hu %p qca flush", hu); 697 698 skb_queue_purge(&qca->tx_wait_q); 699 skb_queue_purge(&qca->txq); 700 701 return 0; 702 } 703 704 /* Close protocol */ 705 static int qca_close(struct hci_uart *hu) 706 { 707 struct qca_data *qca = hu->priv; 708 709 BT_DBG("hu %p qca close", hu); 710 711 serial_clock_vote(HCI_IBS_VOTE_STATS_UPDATE, hu); 712 713 skb_queue_purge(&qca->tx_wait_q); 714 skb_queue_purge(&qca->txq); 715 skb_queue_purge(&qca->rx_memdump_q); 716 /* 717 * Shut the timers down so they can't be rearmed when 718 * destroy_workqueue() drains pending work which in turn might try 719 * to arm a timer. After shutdown rearm attempts are silently 720 * ignored by the timer core code. 721 */ 722 timer_shutdown_sync(&qca->tx_idle_timer); 723 timer_shutdown_sync(&qca->wake_retrans_timer); 724 destroy_workqueue(qca->workqueue); 725 qca->hu = NULL; 726 727 kfree_skb(qca->rx_skb); 728 729 hu->priv = NULL; 730 731 kfree(qca); 732 733 return 0; 734 } 735 736 /* Called upon a wake-up-indication from the device. 737 */ 738 static void device_want_to_wakeup(struct hci_uart *hu) 739 { 740 unsigned long flags; 741 struct qca_data *qca = hu->priv; 742 743 BT_DBG("hu %p want to wake up", hu); 744 745 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 746 747 qca->ibs_recv_wakes++; 748 749 /* Don't wake the rx up when suspending. */ 750 if (test_bit(QCA_SUSPENDING, &qca->flags)) { 751 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 752 return; 753 } 754 755 switch (qca->rx_ibs_state) { 756 case HCI_IBS_RX_ASLEEP: 757 /* Make sure clock is on - we may have turned clock off since 758 * receiving the wake up indicator awake rx clock. 759 */ 760 queue_work(qca->workqueue, &qca->ws_awake_rx); 761 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 762 return; 763 764 case HCI_IBS_RX_AWAKE: 765 /* Always acknowledge device wake up, 766 * sending IBS message doesn't count as TX ON. 767 */ 768 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) { 769 BT_ERR("Failed to acknowledge device wake up"); 770 break; 771 } 772 qca->ibs_sent_wacks++; 773 break; 774 775 default: 776 /* Any other state is illegal */ 777 BT_ERR("Received HCI_IBS_WAKE_IND in rx state %d", 778 qca->rx_ibs_state); 779 break; 780 } 781 782 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 783 784 /* Actually send the packets */ 785 hci_uart_tx_wakeup(hu); 786 } 787 788 /* Called upon a sleep-indication from the device. 789 */ 790 static void device_want_to_sleep(struct hci_uart *hu) 791 { 792 unsigned long flags; 793 struct qca_data *qca = hu->priv; 794 795 BT_DBG("hu %p want to sleep in %d state", hu, qca->rx_ibs_state); 796 797 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 798 799 qca->ibs_recv_slps++; 800 801 switch (qca->rx_ibs_state) { 802 case HCI_IBS_RX_AWAKE: 803 /* Update state */ 804 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP; 805 /* Vote off rx clock under workqueue */ 806 queue_work(qca->workqueue, &qca->ws_rx_vote_off); 807 break; 808 809 case HCI_IBS_RX_ASLEEP: 810 break; 811 812 default: 813 /* Any other state is illegal */ 814 BT_ERR("Received HCI_IBS_SLEEP_IND in rx state %d", 815 qca->rx_ibs_state); 816 break; 817 } 818 819 wake_up_interruptible(&qca->suspend_wait_q); 820 821 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 822 } 823 824 /* Called upon wake-up-acknowledgement from the device 825 */ 826 static void device_woke_up(struct hci_uart *hu) 827 { 828 unsigned long flags, idle_delay; 829 struct qca_data *qca = hu->priv; 830 struct sk_buff *skb = NULL; 831 832 BT_DBG("hu %p woke up", hu); 833 834 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 835 836 qca->ibs_recv_wacks++; 837 838 /* Don't react to the wake-up-acknowledgment when suspending. */ 839 if (test_bit(QCA_SUSPENDING, &qca->flags)) { 840 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 841 return; 842 } 843 844 switch (qca->tx_ibs_state) { 845 case HCI_IBS_TX_AWAKE: 846 /* Expect one if we send 2 WAKEs */ 847 BT_DBG("Received HCI_IBS_WAKE_ACK in tx state %d", 848 qca->tx_ibs_state); 849 break; 850 851 case HCI_IBS_TX_WAKING: 852 /* Send pending packets */ 853 while ((skb = skb_dequeue(&qca->tx_wait_q))) 854 skb_queue_tail(&qca->txq, skb); 855 856 /* Switch timers and change state to HCI_IBS_TX_AWAKE */ 857 del_timer(&qca->wake_retrans_timer); 858 idle_delay = msecs_to_jiffies(qca->tx_idle_delay); 859 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay); 860 qca->tx_ibs_state = HCI_IBS_TX_AWAKE; 861 break; 862 863 case HCI_IBS_TX_ASLEEP: 864 default: 865 BT_ERR("Received HCI_IBS_WAKE_ACK in tx state %d", 866 qca->tx_ibs_state); 867 break; 868 } 869 870 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 871 872 /* Actually send the packets */ 873 hci_uart_tx_wakeup(hu); 874 } 875 876 /* Enqueue frame for transmittion (padding, crc, etc) may be called from 877 * two simultaneous tasklets. 878 */ 879 static int qca_enqueue(struct hci_uart *hu, struct sk_buff *skb) 880 { 881 unsigned long flags = 0, idle_delay; 882 struct qca_data *qca = hu->priv; 883 884 BT_DBG("hu %p qca enq skb %p tx_ibs_state %d", hu, skb, 885 qca->tx_ibs_state); 886 887 if (test_bit(QCA_SSR_TRIGGERED, &qca->flags)) { 888 /* As SSR is in progress, ignore the packets */ 889 bt_dev_dbg(hu->hdev, "SSR is in progress"); 890 kfree_skb(skb); 891 return 0; 892 } 893 894 /* Prepend skb with frame type */ 895 memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1); 896 897 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 898 899 /* Don't go to sleep in middle of patch download or 900 * Out-Of-Band(GPIOs control) sleep is selected. 901 * Don't wake the device up when suspending. 902 */ 903 if (test_bit(QCA_IBS_DISABLED, &qca->flags) || 904 test_bit(QCA_SUSPENDING, &qca->flags)) { 905 skb_queue_tail(&qca->txq, skb); 906 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 907 return 0; 908 } 909 910 /* Act according to current state */ 911 switch (qca->tx_ibs_state) { 912 case HCI_IBS_TX_AWAKE: 913 BT_DBG("Device awake, sending normally"); 914 skb_queue_tail(&qca->txq, skb); 915 idle_delay = msecs_to_jiffies(qca->tx_idle_delay); 916 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay); 917 break; 918 919 case HCI_IBS_TX_ASLEEP: 920 BT_DBG("Device asleep, waking up and queueing packet"); 921 /* Save packet for later */ 922 skb_queue_tail(&qca->tx_wait_q, skb); 923 924 qca->tx_ibs_state = HCI_IBS_TX_WAKING; 925 /* Schedule a work queue to wake up device */ 926 queue_work(qca->workqueue, &qca->ws_awake_device); 927 break; 928 929 case HCI_IBS_TX_WAKING: 930 BT_DBG("Device waking up, queueing packet"); 931 /* Transient state; just keep packet for later */ 932 skb_queue_tail(&qca->tx_wait_q, skb); 933 break; 934 935 default: 936 BT_ERR("Illegal tx state: %d (losing packet)", 937 qca->tx_ibs_state); 938 dev_kfree_skb_irq(skb); 939 break; 940 } 941 942 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 943 944 return 0; 945 } 946 947 static int qca_ibs_sleep_ind(struct hci_dev *hdev, struct sk_buff *skb) 948 { 949 struct hci_uart *hu = hci_get_drvdata(hdev); 950 951 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_SLEEP_IND); 952 953 device_want_to_sleep(hu); 954 955 kfree_skb(skb); 956 return 0; 957 } 958 959 static int qca_ibs_wake_ind(struct hci_dev *hdev, struct sk_buff *skb) 960 { 961 struct hci_uart *hu = hci_get_drvdata(hdev); 962 963 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_IND); 964 965 device_want_to_wakeup(hu); 966 967 kfree_skb(skb); 968 return 0; 969 } 970 971 static int qca_ibs_wake_ack(struct hci_dev *hdev, struct sk_buff *skb) 972 { 973 struct hci_uart *hu = hci_get_drvdata(hdev); 974 975 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_ACK); 976 977 device_woke_up(hu); 978 979 kfree_skb(skb); 980 return 0; 981 } 982 983 static int qca_recv_acl_data(struct hci_dev *hdev, struct sk_buff *skb) 984 { 985 /* We receive debug logs from chip as an ACL packets. 986 * Instead of sending the data to ACL to decode the 987 * received data, we are pushing them to the above layers 988 * as a diagnostic packet. 989 */ 990 if (get_unaligned_le16(skb->data) == QCA_DEBUG_HANDLE) 991 return hci_recv_diag(hdev, skb); 992 993 return hci_recv_frame(hdev, skb); 994 } 995 996 static void qca_dmp_hdr(struct hci_dev *hdev, struct sk_buff *skb) 997 { 998 struct hci_uart *hu = hci_get_drvdata(hdev); 999 struct qca_data *qca = hu->priv; 1000 char buf[80]; 1001 1002 snprintf(buf, sizeof(buf), "Controller Name: 0x%x\n", 1003 qca->controller_id); 1004 skb_put_data(skb, buf, strlen(buf)); 1005 1006 snprintf(buf, sizeof(buf), "Firmware Version: 0x%x\n", 1007 qca->fw_version); 1008 skb_put_data(skb, buf, strlen(buf)); 1009 1010 snprintf(buf, sizeof(buf), "Vendor:Qualcomm\n"); 1011 skb_put_data(skb, buf, strlen(buf)); 1012 1013 snprintf(buf, sizeof(buf), "Driver: %s\n", 1014 hu->serdev->dev.driver->name); 1015 skb_put_data(skb, buf, strlen(buf)); 1016 } 1017 1018 static void qca_controller_memdump(struct work_struct *work) 1019 { 1020 struct qca_data *qca = container_of(work, struct qca_data, 1021 ctrl_memdump_evt); 1022 struct hci_uart *hu = qca->hu; 1023 struct sk_buff *skb; 1024 struct qca_memdump_event_hdr *cmd_hdr; 1025 struct qca_memdump_info *qca_memdump = qca->qca_memdump; 1026 struct qca_dump_size *dump; 1027 u16 seq_no; 1028 u32 rx_size; 1029 int ret = 0; 1030 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1031 1032 while ((skb = skb_dequeue(&qca->rx_memdump_q))) { 1033 1034 mutex_lock(&qca->hci_memdump_lock); 1035 /* Skip processing the received packets if timeout detected 1036 * or memdump collection completed. 1037 */ 1038 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT || 1039 qca->memdump_state == QCA_MEMDUMP_COLLECTED) { 1040 mutex_unlock(&qca->hci_memdump_lock); 1041 return; 1042 } 1043 1044 if (!qca_memdump) { 1045 qca_memdump = kzalloc(sizeof(*qca_memdump), GFP_ATOMIC); 1046 if (!qca_memdump) { 1047 mutex_unlock(&qca->hci_memdump_lock); 1048 return; 1049 } 1050 1051 qca->qca_memdump = qca_memdump; 1052 } 1053 1054 qca->memdump_state = QCA_MEMDUMP_COLLECTING; 1055 cmd_hdr = (void *) skb->data; 1056 seq_no = __le16_to_cpu(cmd_hdr->seq_no); 1057 skb_pull(skb, sizeof(struct qca_memdump_event_hdr)); 1058 1059 if (!seq_no) { 1060 1061 /* This is the first frame of memdump packet from 1062 * the controller, Disable IBS to recevie dump 1063 * with out any interruption, ideally time required for 1064 * the controller to send the dump is 8 seconds. let us 1065 * start timer to handle this asynchronous activity. 1066 */ 1067 set_bit(QCA_IBS_DISABLED, &qca->flags); 1068 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1069 dump = (void *) skb->data; 1070 qca_memdump->ram_dump_size = __le32_to_cpu(dump->dump_size); 1071 if (!(qca_memdump->ram_dump_size)) { 1072 bt_dev_err(hu->hdev, "Rx invalid memdump size"); 1073 kfree(qca_memdump); 1074 kfree_skb(skb); 1075 mutex_unlock(&qca->hci_memdump_lock); 1076 return; 1077 } 1078 1079 queue_delayed_work(qca->workqueue, 1080 &qca->ctrl_memdump_timeout, 1081 msecs_to_jiffies(MEMDUMP_TIMEOUT_MS)); 1082 skb_pull(skb, sizeof(qca_memdump->ram_dump_size)); 1083 qca_memdump->current_seq_no = 0; 1084 qca_memdump->received_dump = 0; 1085 ret = hci_devcd_init(hu->hdev, qca_memdump->ram_dump_size); 1086 bt_dev_info(hu->hdev, "hci_devcd_init Return:%d", 1087 ret); 1088 if (ret < 0) { 1089 kfree(qca->qca_memdump); 1090 qca->qca_memdump = NULL; 1091 qca->memdump_state = QCA_MEMDUMP_COLLECTED; 1092 cancel_delayed_work(&qca->ctrl_memdump_timeout); 1093 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1094 clear_bit(QCA_IBS_DISABLED, &qca->flags); 1095 mutex_unlock(&qca->hci_memdump_lock); 1096 return; 1097 } 1098 1099 bt_dev_info(hu->hdev, "QCA collecting dump of size:%u", 1100 qca_memdump->ram_dump_size); 1101 1102 } 1103 1104 /* If sequence no 0 is missed then there is no point in 1105 * accepting the other sequences. 1106 */ 1107 if (!test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) { 1108 bt_dev_err(hu->hdev, "QCA: Discarding other packets"); 1109 kfree(qca_memdump); 1110 kfree_skb(skb); 1111 mutex_unlock(&qca->hci_memdump_lock); 1112 return; 1113 } 1114 /* There could be chance of missing some packets from 1115 * the controller. In such cases let us store the dummy 1116 * packets in the buffer. 1117 */ 1118 /* For QCA6390, controller does not lost packets but 1119 * sequence number field of packet sometimes has error 1120 * bits, so skip this checking for missing packet. 1121 */ 1122 while ((seq_no > qca_memdump->current_seq_no + 1) && 1123 (soc_type != QCA_QCA6390) && 1124 seq_no != QCA_LAST_SEQUENCE_NUM) { 1125 bt_dev_err(hu->hdev, "QCA controller missed packet:%d", 1126 qca_memdump->current_seq_no); 1127 rx_size = qca_memdump->received_dump; 1128 rx_size += QCA_DUMP_PACKET_SIZE; 1129 if (rx_size > qca_memdump->ram_dump_size) { 1130 bt_dev_err(hu->hdev, 1131 "QCA memdump received %d, no space for missed packet", 1132 qca_memdump->received_dump); 1133 break; 1134 } 1135 hci_devcd_append_pattern(hu->hdev, 0x00, 1136 QCA_DUMP_PACKET_SIZE); 1137 qca_memdump->received_dump += QCA_DUMP_PACKET_SIZE; 1138 qca_memdump->current_seq_no++; 1139 } 1140 1141 rx_size = qca_memdump->received_dump + skb->len; 1142 if (rx_size <= qca_memdump->ram_dump_size) { 1143 if ((seq_no != QCA_LAST_SEQUENCE_NUM) && 1144 (seq_no != qca_memdump->current_seq_no)) { 1145 bt_dev_err(hu->hdev, 1146 "QCA memdump unexpected packet %d", 1147 seq_no); 1148 } 1149 bt_dev_dbg(hu->hdev, 1150 "QCA memdump packet %d with length %d", 1151 seq_no, skb->len); 1152 hci_devcd_append(hu->hdev, skb); 1153 qca_memdump->current_seq_no += 1; 1154 qca_memdump->received_dump = rx_size; 1155 } else { 1156 bt_dev_err(hu->hdev, 1157 "QCA memdump received no space for packet %d", 1158 qca_memdump->current_seq_no); 1159 } 1160 1161 if (seq_no == QCA_LAST_SEQUENCE_NUM) { 1162 bt_dev_info(hu->hdev, 1163 "QCA memdump Done, received %d, total %d", 1164 qca_memdump->received_dump, 1165 qca_memdump->ram_dump_size); 1166 hci_devcd_complete(hu->hdev); 1167 cancel_delayed_work(&qca->ctrl_memdump_timeout); 1168 kfree(qca->qca_memdump); 1169 qca->qca_memdump = NULL; 1170 qca->memdump_state = QCA_MEMDUMP_COLLECTED; 1171 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1172 } 1173 1174 mutex_unlock(&qca->hci_memdump_lock); 1175 } 1176 1177 } 1178 1179 static int qca_controller_memdump_event(struct hci_dev *hdev, 1180 struct sk_buff *skb) 1181 { 1182 struct hci_uart *hu = hci_get_drvdata(hdev); 1183 struct qca_data *qca = hu->priv; 1184 1185 set_bit(QCA_SSR_TRIGGERED, &qca->flags); 1186 skb_queue_tail(&qca->rx_memdump_q, skb); 1187 queue_work(qca->workqueue, &qca->ctrl_memdump_evt); 1188 1189 return 0; 1190 } 1191 1192 static int qca_recv_event(struct hci_dev *hdev, struct sk_buff *skb) 1193 { 1194 struct hci_uart *hu = hci_get_drvdata(hdev); 1195 struct qca_data *qca = hu->priv; 1196 1197 if (test_bit(QCA_DROP_VENDOR_EVENT, &qca->flags)) { 1198 struct hci_event_hdr *hdr = (void *)skb->data; 1199 1200 /* For the WCN3990 the vendor command for a baudrate change 1201 * isn't sent as synchronous HCI command, because the 1202 * controller sends the corresponding vendor event with the 1203 * new baudrate. The event is received and properly decoded 1204 * after changing the baudrate of the host port. It needs to 1205 * be dropped, otherwise it can be misinterpreted as 1206 * response to a later firmware download command (also a 1207 * vendor command). 1208 */ 1209 1210 if (hdr->evt == HCI_EV_VENDOR) 1211 complete(&qca->drop_ev_comp); 1212 1213 kfree_skb(skb); 1214 1215 return 0; 1216 } 1217 /* We receive chip memory dump as an event packet, With a dedicated 1218 * handler followed by a hardware error event. When this event is 1219 * received we store dump into a file before closing hci. This 1220 * dump will help in triaging the issues. 1221 */ 1222 if ((skb->data[0] == HCI_VENDOR_PKT) && 1223 (get_unaligned_be16(skb->data + 2) == QCA_SSR_DUMP_HANDLE)) 1224 return qca_controller_memdump_event(hdev, skb); 1225 1226 return hci_recv_frame(hdev, skb); 1227 } 1228 1229 #define QCA_IBS_SLEEP_IND_EVENT \ 1230 .type = HCI_IBS_SLEEP_IND, \ 1231 .hlen = 0, \ 1232 .loff = 0, \ 1233 .lsize = 0, \ 1234 .maxlen = HCI_MAX_IBS_SIZE 1235 1236 #define QCA_IBS_WAKE_IND_EVENT \ 1237 .type = HCI_IBS_WAKE_IND, \ 1238 .hlen = 0, \ 1239 .loff = 0, \ 1240 .lsize = 0, \ 1241 .maxlen = HCI_MAX_IBS_SIZE 1242 1243 #define QCA_IBS_WAKE_ACK_EVENT \ 1244 .type = HCI_IBS_WAKE_ACK, \ 1245 .hlen = 0, \ 1246 .loff = 0, \ 1247 .lsize = 0, \ 1248 .maxlen = HCI_MAX_IBS_SIZE 1249 1250 static const struct h4_recv_pkt qca_recv_pkts[] = { 1251 { H4_RECV_ACL, .recv = qca_recv_acl_data }, 1252 { H4_RECV_SCO, .recv = hci_recv_frame }, 1253 { H4_RECV_EVENT, .recv = qca_recv_event }, 1254 { QCA_IBS_WAKE_IND_EVENT, .recv = qca_ibs_wake_ind }, 1255 { QCA_IBS_WAKE_ACK_EVENT, .recv = qca_ibs_wake_ack }, 1256 { QCA_IBS_SLEEP_IND_EVENT, .recv = qca_ibs_sleep_ind }, 1257 }; 1258 1259 static int qca_recv(struct hci_uart *hu, const void *data, int count) 1260 { 1261 struct qca_data *qca = hu->priv; 1262 1263 if (!test_bit(HCI_UART_REGISTERED, &hu->flags)) 1264 return -EUNATCH; 1265 1266 qca->rx_skb = h4_recv_buf(hu->hdev, qca->rx_skb, data, count, 1267 qca_recv_pkts, ARRAY_SIZE(qca_recv_pkts)); 1268 if (IS_ERR(qca->rx_skb)) { 1269 int err = PTR_ERR(qca->rx_skb); 1270 bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err); 1271 qca->rx_skb = NULL; 1272 return err; 1273 } 1274 1275 return count; 1276 } 1277 1278 static struct sk_buff *qca_dequeue(struct hci_uart *hu) 1279 { 1280 struct qca_data *qca = hu->priv; 1281 1282 return skb_dequeue(&qca->txq); 1283 } 1284 1285 static uint8_t qca_get_baudrate_value(int speed) 1286 { 1287 switch (speed) { 1288 case 9600: 1289 return QCA_BAUDRATE_9600; 1290 case 19200: 1291 return QCA_BAUDRATE_19200; 1292 case 38400: 1293 return QCA_BAUDRATE_38400; 1294 case 57600: 1295 return QCA_BAUDRATE_57600; 1296 case 115200: 1297 return QCA_BAUDRATE_115200; 1298 case 230400: 1299 return QCA_BAUDRATE_230400; 1300 case 460800: 1301 return QCA_BAUDRATE_460800; 1302 case 500000: 1303 return QCA_BAUDRATE_500000; 1304 case 921600: 1305 return QCA_BAUDRATE_921600; 1306 case 1000000: 1307 return QCA_BAUDRATE_1000000; 1308 case 2000000: 1309 return QCA_BAUDRATE_2000000; 1310 case 3000000: 1311 return QCA_BAUDRATE_3000000; 1312 case 3200000: 1313 return QCA_BAUDRATE_3200000; 1314 case 3500000: 1315 return QCA_BAUDRATE_3500000; 1316 default: 1317 return QCA_BAUDRATE_115200; 1318 } 1319 } 1320 1321 static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate) 1322 { 1323 struct hci_uart *hu = hci_get_drvdata(hdev); 1324 struct qca_data *qca = hu->priv; 1325 struct sk_buff *skb; 1326 u8 cmd[] = { 0x01, 0x48, 0xFC, 0x01, 0x00 }; 1327 1328 if (baudrate > QCA_BAUDRATE_3200000) 1329 return -EINVAL; 1330 1331 cmd[4] = baudrate; 1332 1333 skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL); 1334 if (!skb) { 1335 bt_dev_err(hdev, "Failed to allocate baudrate packet"); 1336 return -ENOMEM; 1337 } 1338 1339 /* Assign commands to change baudrate and packet type. */ 1340 skb_put_data(skb, cmd, sizeof(cmd)); 1341 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT; 1342 1343 skb_queue_tail(&qca->txq, skb); 1344 hci_uart_tx_wakeup(hu); 1345 1346 /* Wait for the baudrate change request to be sent */ 1347 1348 while (!skb_queue_empty(&qca->txq)) 1349 usleep_range(100, 200); 1350 1351 if (hu->serdev) 1352 serdev_device_wait_until_sent(hu->serdev, 1353 msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS)); 1354 1355 /* Give the controller time to process the request */ 1356 switch (qca_soc_type(hu)) { 1357 case QCA_WCN3988: 1358 case QCA_WCN3990: 1359 case QCA_WCN3991: 1360 case QCA_WCN3998: 1361 case QCA_WCN6750: 1362 case QCA_WCN6855: 1363 case QCA_WCN7850: 1364 usleep_range(1000, 10000); 1365 break; 1366 1367 default: 1368 msleep(300); 1369 } 1370 1371 return 0; 1372 } 1373 1374 static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed) 1375 { 1376 if (hu->serdev) 1377 serdev_device_set_baudrate(hu->serdev, speed); 1378 else 1379 hci_uart_set_baudrate(hu, speed); 1380 } 1381 1382 static int qca_send_power_pulse(struct hci_uart *hu, bool on) 1383 { 1384 int ret; 1385 int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS); 1386 u8 cmd = on ? QCA_WCN3990_POWERON_PULSE : QCA_WCN3990_POWEROFF_PULSE; 1387 1388 /* These power pulses are single byte command which are sent 1389 * at required baudrate to wcn3990. On wcn3990, we have an external 1390 * circuit at Tx pin which decodes the pulse sent at specific baudrate. 1391 * For example, wcn3990 supports RF COEX antenna for both Wi-Fi/BT 1392 * and also we use the same power inputs to turn on and off for 1393 * Wi-Fi/BT. Powering up the power sources will not enable BT, until 1394 * we send a power on pulse at 115200 bps. This algorithm will help to 1395 * save power. Disabling hardware flow control is mandatory while 1396 * sending power pulses to SoC. 1397 */ 1398 bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd); 1399 1400 serdev_device_write_flush(hu->serdev); 1401 hci_uart_set_flow_control(hu, true); 1402 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd)); 1403 if (ret < 0) { 1404 bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd); 1405 return ret; 1406 } 1407 1408 serdev_device_wait_until_sent(hu->serdev, timeout); 1409 hci_uart_set_flow_control(hu, false); 1410 1411 /* Give to controller time to boot/shutdown */ 1412 if (on) 1413 msleep(100); 1414 else 1415 usleep_range(1000, 10000); 1416 1417 return 0; 1418 } 1419 1420 static unsigned int qca_get_speed(struct hci_uart *hu, 1421 enum qca_speed_type speed_type) 1422 { 1423 unsigned int speed = 0; 1424 1425 if (speed_type == QCA_INIT_SPEED) { 1426 if (hu->init_speed) 1427 speed = hu->init_speed; 1428 else if (hu->proto->init_speed) 1429 speed = hu->proto->init_speed; 1430 } else { 1431 if (hu->oper_speed) 1432 speed = hu->oper_speed; 1433 else if (hu->proto->oper_speed) 1434 speed = hu->proto->oper_speed; 1435 } 1436 1437 return speed; 1438 } 1439 1440 static int qca_check_speeds(struct hci_uart *hu) 1441 { 1442 switch (qca_soc_type(hu)) { 1443 case QCA_WCN3988: 1444 case QCA_WCN3990: 1445 case QCA_WCN3991: 1446 case QCA_WCN3998: 1447 case QCA_WCN6750: 1448 case QCA_WCN6855: 1449 case QCA_WCN7850: 1450 if (!qca_get_speed(hu, QCA_INIT_SPEED) && 1451 !qca_get_speed(hu, QCA_OPER_SPEED)) 1452 return -EINVAL; 1453 break; 1454 1455 default: 1456 if (!qca_get_speed(hu, QCA_INIT_SPEED) || 1457 !qca_get_speed(hu, QCA_OPER_SPEED)) 1458 return -EINVAL; 1459 } 1460 1461 return 0; 1462 } 1463 1464 static int qca_set_speed(struct hci_uart *hu, enum qca_speed_type speed_type) 1465 { 1466 unsigned int speed, qca_baudrate; 1467 struct qca_data *qca = hu->priv; 1468 int ret = 0; 1469 1470 if (speed_type == QCA_INIT_SPEED) { 1471 speed = qca_get_speed(hu, QCA_INIT_SPEED); 1472 if (speed) 1473 host_set_baudrate(hu, speed); 1474 } else { 1475 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1476 1477 speed = qca_get_speed(hu, QCA_OPER_SPEED); 1478 if (!speed) 1479 return 0; 1480 1481 /* Disable flow control for wcn3990 to deassert RTS while 1482 * changing the baudrate of chip and host. 1483 */ 1484 switch (soc_type) { 1485 case QCA_WCN3988: 1486 case QCA_WCN3990: 1487 case QCA_WCN3991: 1488 case QCA_WCN3998: 1489 case QCA_WCN6750: 1490 case QCA_WCN6855: 1491 case QCA_WCN7850: 1492 hci_uart_set_flow_control(hu, true); 1493 break; 1494 1495 default: 1496 break; 1497 } 1498 1499 switch (soc_type) { 1500 case QCA_WCN3990: 1501 reinit_completion(&qca->drop_ev_comp); 1502 set_bit(QCA_DROP_VENDOR_EVENT, &qca->flags); 1503 break; 1504 1505 default: 1506 break; 1507 } 1508 1509 qca_baudrate = qca_get_baudrate_value(speed); 1510 bt_dev_dbg(hu->hdev, "Set UART speed to %d", speed); 1511 ret = qca_set_baudrate(hu->hdev, qca_baudrate); 1512 if (ret) 1513 goto error; 1514 1515 host_set_baudrate(hu, speed); 1516 1517 error: 1518 switch (soc_type) { 1519 case QCA_WCN3988: 1520 case QCA_WCN3990: 1521 case QCA_WCN3991: 1522 case QCA_WCN3998: 1523 case QCA_WCN6750: 1524 case QCA_WCN6855: 1525 case QCA_WCN7850: 1526 hci_uart_set_flow_control(hu, false); 1527 break; 1528 1529 default: 1530 break; 1531 } 1532 1533 switch (soc_type) { 1534 case QCA_WCN3990: 1535 /* Wait for the controller to send the vendor event 1536 * for the baudrate change command. 1537 */ 1538 if (!wait_for_completion_timeout(&qca->drop_ev_comp, 1539 msecs_to_jiffies(100))) { 1540 bt_dev_err(hu->hdev, 1541 "Failed to change controller baudrate\n"); 1542 ret = -ETIMEDOUT; 1543 } 1544 1545 clear_bit(QCA_DROP_VENDOR_EVENT, &qca->flags); 1546 break; 1547 1548 default: 1549 break; 1550 } 1551 } 1552 1553 return ret; 1554 } 1555 1556 static int qca_send_crashbuffer(struct hci_uart *hu) 1557 { 1558 struct qca_data *qca = hu->priv; 1559 struct sk_buff *skb; 1560 1561 skb = bt_skb_alloc(QCA_CRASHBYTE_PACKET_LEN, GFP_KERNEL); 1562 if (!skb) { 1563 bt_dev_err(hu->hdev, "Failed to allocate memory for skb packet"); 1564 return -ENOMEM; 1565 } 1566 1567 /* We forcefully crash the controller, by sending 0xfb byte for 1568 * 1024 times. We also might have chance of losing data, To be 1569 * on safer side we send 1096 bytes to the SoC. 1570 */ 1571 memset(skb_put(skb, QCA_CRASHBYTE_PACKET_LEN), QCA_MEMDUMP_BYTE, 1572 QCA_CRASHBYTE_PACKET_LEN); 1573 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT; 1574 bt_dev_info(hu->hdev, "crash the soc to collect controller dump"); 1575 skb_queue_tail(&qca->txq, skb); 1576 hci_uart_tx_wakeup(hu); 1577 1578 return 0; 1579 } 1580 1581 static void qca_wait_for_dump_collection(struct hci_dev *hdev) 1582 { 1583 struct hci_uart *hu = hci_get_drvdata(hdev); 1584 struct qca_data *qca = hu->priv; 1585 1586 wait_on_bit_timeout(&qca->flags, QCA_MEMDUMP_COLLECTION, 1587 TASK_UNINTERRUPTIBLE, MEMDUMP_TIMEOUT_MS); 1588 1589 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1590 } 1591 1592 static void qca_hw_error(struct hci_dev *hdev, u8 code) 1593 { 1594 struct hci_uart *hu = hci_get_drvdata(hdev); 1595 struct qca_data *qca = hu->priv; 1596 1597 set_bit(QCA_SSR_TRIGGERED, &qca->flags); 1598 set_bit(QCA_HW_ERROR_EVENT, &qca->flags); 1599 bt_dev_info(hdev, "mem_dump_status: %d", qca->memdump_state); 1600 1601 if (qca->memdump_state == QCA_MEMDUMP_IDLE) { 1602 /* If hardware error event received for other than QCA 1603 * soc memory dump event, then we need to crash the SOC 1604 * and wait here for 8 seconds to get the dump packets. 1605 * This will block main thread to be on hold until we 1606 * collect dump. 1607 */ 1608 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1609 qca_send_crashbuffer(hu); 1610 qca_wait_for_dump_collection(hdev); 1611 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) { 1612 /* Let us wait here until memory dump collected or 1613 * memory dump timer expired. 1614 */ 1615 bt_dev_info(hdev, "waiting for dump to complete"); 1616 qca_wait_for_dump_collection(hdev); 1617 } 1618 1619 mutex_lock(&qca->hci_memdump_lock); 1620 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) { 1621 bt_dev_err(hu->hdev, "clearing allocated memory due to memdump timeout"); 1622 hci_devcd_abort(hu->hdev); 1623 if (qca->qca_memdump) { 1624 kfree(qca->qca_memdump); 1625 qca->qca_memdump = NULL; 1626 } 1627 qca->memdump_state = QCA_MEMDUMP_TIMEOUT; 1628 cancel_delayed_work(&qca->ctrl_memdump_timeout); 1629 } 1630 mutex_unlock(&qca->hci_memdump_lock); 1631 1632 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT || 1633 qca->memdump_state == QCA_MEMDUMP_COLLECTED) { 1634 cancel_work_sync(&qca->ctrl_memdump_evt); 1635 skb_queue_purge(&qca->rx_memdump_q); 1636 } 1637 1638 clear_bit(QCA_HW_ERROR_EVENT, &qca->flags); 1639 } 1640 1641 static void qca_cmd_timeout(struct hci_dev *hdev) 1642 { 1643 struct hci_uart *hu = hci_get_drvdata(hdev); 1644 struct qca_data *qca = hu->priv; 1645 1646 set_bit(QCA_SSR_TRIGGERED, &qca->flags); 1647 if (qca->memdump_state == QCA_MEMDUMP_IDLE) { 1648 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); 1649 qca_send_crashbuffer(hu); 1650 qca_wait_for_dump_collection(hdev); 1651 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) { 1652 /* Let us wait here until memory dump collected or 1653 * memory dump timer expired. 1654 */ 1655 bt_dev_info(hdev, "waiting for dump to complete"); 1656 qca_wait_for_dump_collection(hdev); 1657 } 1658 1659 mutex_lock(&qca->hci_memdump_lock); 1660 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) { 1661 qca->memdump_state = QCA_MEMDUMP_TIMEOUT; 1662 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) { 1663 /* Inject hw error event to reset the device 1664 * and driver. 1665 */ 1666 hci_reset_dev(hu->hdev); 1667 } 1668 } 1669 mutex_unlock(&qca->hci_memdump_lock); 1670 } 1671 1672 static bool qca_wakeup(struct hci_dev *hdev) 1673 { 1674 struct hci_uart *hu = hci_get_drvdata(hdev); 1675 bool wakeup; 1676 1677 if (!hu->serdev) 1678 return true; 1679 1680 /* BT SoC attached through the serial bus is handled by the serdev driver. 1681 * So we need to use the device handle of the serdev driver to get the 1682 * status of device may wakeup. 1683 */ 1684 wakeup = device_may_wakeup(&hu->serdev->ctrl->dev); 1685 bt_dev_dbg(hu->hdev, "wakeup status : %d", wakeup); 1686 1687 return wakeup; 1688 } 1689 1690 static int qca_port_reopen(struct hci_uart *hu) 1691 { 1692 int ret; 1693 1694 /* Now the device is in ready state to communicate with host. 1695 * To sync host with device we need to reopen port. 1696 * Without this, we will have RTS and CTS synchronization 1697 * issues. 1698 */ 1699 serdev_device_close(hu->serdev); 1700 ret = serdev_device_open(hu->serdev); 1701 if (ret) { 1702 bt_dev_err(hu->hdev, "failed to open port"); 1703 return ret; 1704 } 1705 1706 hci_uart_set_flow_control(hu, false); 1707 1708 return 0; 1709 } 1710 1711 static int qca_regulator_init(struct hci_uart *hu) 1712 { 1713 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1714 struct qca_serdev *qcadev; 1715 int ret; 1716 bool sw_ctrl_state; 1717 1718 /* Check for vregs status, may be hci down has turned 1719 * off the voltage regulator. 1720 */ 1721 qcadev = serdev_device_get_drvdata(hu->serdev); 1722 1723 if (!qcadev->bt_power->vregs_on) { 1724 serdev_device_close(hu->serdev); 1725 ret = qca_regulator_enable(qcadev); 1726 if (ret) 1727 return ret; 1728 1729 ret = serdev_device_open(hu->serdev); 1730 if (ret) { 1731 bt_dev_err(hu->hdev, "failed to open port"); 1732 return ret; 1733 } 1734 } 1735 1736 switch (soc_type) { 1737 case QCA_WCN3988: 1738 case QCA_WCN3990: 1739 case QCA_WCN3991: 1740 case QCA_WCN3998: 1741 /* Forcefully enable wcn399x to enter in to boot mode. */ 1742 host_set_baudrate(hu, 2400); 1743 ret = qca_send_power_pulse(hu, false); 1744 if (ret) 1745 return ret; 1746 break; 1747 1748 default: 1749 break; 1750 } 1751 1752 /* For wcn6750 need to enable gpio bt_en */ 1753 if (qcadev->bt_en) { 1754 gpiod_set_value_cansleep(qcadev->bt_en, 0); 1755 msleep(50); 1756 gpiod_set_value_cansleep(qcadev->bt_en, 1); 1757 msleep(50); 1758 if (qcadev->sw_ctrl) { 1759 sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl); 1760 bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state); 1761 } 1762 } 1763 1764 qca_set_speed(hu, QCA_INIT_SPEED); 1765 1766 switch (soc_type) { 1767 case QCA_WCN3988: 1768 case QCA_WCN3990: 1769 case QCA_WCN3991: 1770 case QCA_WCN3998: 1771 ret = qca_send_power_pulse(hu, true); 1772 if (ret) 1773 return ret; 1774 break; 1775 1776 default: 1777 break; 1778 } 1779 1780 return qca_port_reopen(hu); 1781 } 1782 1783 static int qca_power_on(struct hci_dev *hdev) 1784 { 1785 struct hci_uart *hu = hci_get_drvdata(hdev); 1786 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1787 struct qca_serdev *qcadev; 1788 struct qca_data *qca = hu->priv; 1789 int ret = 0; 1790 1791 /* Non-serdev device usually is powered by external power 1792 * and don't need additional action in driver for power on 1793 */ 1794 if (!hu->serdev) 1795 return 0; 1796 1797 switch (soc_type) { 1798 case QCA_WCN3988: 1799 case QCA_WCN3990: 1800 case QCA_WCN3991: 1801 case QCA_WCN3998: 1802 case QCA_WCN6750: 1803 case QCA_WCN6855: 1804 case QCA_WCN7850: 1805 case QCA_QCA6390: 1806 ret = qca_regulator_init(hu); 1807 break; 1808 1809 default: 1810 qcadev = serdev_device_get_drvdata(hu->serdev); 1811 if (qcadev->bt_en) { 1812 gpiod_set_value_cansleep(qcadev->bt_en, 1); 1813 /* Controller needs time to bootup. */ 1814 msleep(150); 1815 } 1816 } 1817 1818 clear_bit(QCA_BT_OFF, &qca->flags); 1819 return ret; 1820 } 1821 1822 static void hci_coredump_qca(struct hci_dev *hdev) 1823 { 1824 int err; 1825 static const u8 param[] = { 0x26 }; 1826 1827 err = __hci_cmd_send(hdev, 0xfc0c, 1, param); 1828 if (err < 0) 1829 bt_dev_err(hdev, "%s: trigger crash failed (%d)", __func__, err); 1830 } 1831 1832 static int qca_get_data_path_id(struct hci_dev *hdev, __u8 *data_path_id) 1833 { 1834 /* QCA uses 1 as non-HCI data path id for HFP */ 1835 *data_path_id = 1; 1836 return 0; 1837 } 1838 1839 static int qca_configure_hfp_offload(struct hci_dev *hdev) 1840 { 1841 bt_dev_info(hdev, "HFP non-HCI data transport is supported"); 1842 hdev->get_data_path_id = qca_get_data_path_id; 1843 /* Do not need to send HCI_Configure_Data_Path to configure non-HCI 1844 * data transport path for QCA controllers, so set below field as NULL. 1845 */ 1846 hdev->get_codec_config_data = NULL; 1847 return 0; 1848 } 1849 1850 static int qca_setup(struct hci_uart *hu) 1851 { 1852 struct hci_dev *hdev = hu->hdev; 1853 struct qca_data *qca = hu->priv; 1854 unsigned int speed, qca_baudrate = QCA_BAUDRATE_115200; 1855 unsigned int retries = 0; 1856 enum qca_btsoc_type soc_type = qca_soc_type(hu); 1857 const char *firmware_name = qca_get_firmware_name(hu); 1858 int ret; 1859 struct qca_btsoc_version ver; 1860 struct qca_serdev *qcadev; 1861 const char *soc_name; 1862 1863 ret = qca_check_speeds(hu); 1864 if (ret) 1865 return ret; 1866 1867 clear_bit(QCA_ROM_FW, &qca->flags); 1868 /* Patch downloading has to be done without IBS mode */ 1869 set_bit(QCA_IBS_DISABLED, &qca->flags); 1870 1871 /* Enable controller to do both LE scan and BR/EDR inquiry 1872 * simultaneously. 1873 */ 1874 set_bit(HCI_QUIRK_SIMULTANEOUS_DISCOVERY, &hdev->quirks); 1875 1876 switch (soc_type) { 1877 case QCA_QCA2066: 1878 soc_name = "qca2066"; 1879 break; 1880 1881 case QCA_WCN3988: 1882 case QCA_WCN3990: 1883 case QCA_WCN3991: 1884 case QCA_WCN3998: 1885 soc_name = "wcn399x"; 1886 break; 1887 1888 case QCA_WCN6750: 1889 soc_name = "wcn6750"; 1890 break; 1891 1892 case QCA_WCN6855: 1893 soc_name = "wcn6855"; 1894 break; 1895 1896 case QCA_WCN7850: 1897 soc_name = "wcn7850"; 1898 break; 1899 1900 default: 1901 soc_name = "ROME/QCA6390"; 1902 } 1903 bt_dev_info(hdev, "setting up %s", soc_name); 1904 1905 qca->memdump_state = QCA_MEMDUMP_IDLE; 1906 1907 retry: 1908 ret = qca_power_on(hdev); 1909 if (ret) 1910 goto out; 1911 1912 clear_bit(QCA_SSR_TRIGGERED, &qca->flags); 1913 1914 switch (soc_type) { 1915 case QCA_WCN3988: 1916 case QCA_WCN3990: 1917 case QCA_WCN3991: 1918 case QCA_WCN3998: 1919 case QCA_WCN6750: 1920 case QCA_WCN6855: 1921 case QCA_WCN7850: 1922 qcadev = serdev_device_get_drvdata(hu->serdev); 1923 if (qcadev->bdaddr_property_broken) 1924 set_bit(HCI_QUIRK_BDADDR_PROPERTY_BROKEN, &hdev->quirks); 1925 1926 hci_set_aosp_capable(hdev); 1927 1928 ret = qca_read_soc_version(hdev, &ver, soc_type); 1929 if (ret) 1930 goto out; 1931 break; 1932 1933 default: 1934 qca_set_speed(hu, QCA_INIT_SPEED); 1935 } 1936 1937 /* Setup user speed if needed */ 1938 speed = qca_get_speed(hu, QCA_OPER_SPEED); 1939 if (speed) { 1940 ret = qca_set_speed(hu, QCA_OPER_SPEED); 1941 if (ret) 1942 goto out; 1943 1944 qca_baudrate = qca_get_baudrate_value(speed); 1945 } 1946 1947 switch (soc_type) { 1948 case QCA_WCN3988: 1949 case QCA_WCN3990: 1950 case QCA_WCN3991: 1951 case QCA_WCN3998: 1952 case QCA_WCN6750: 1953 case QCA_WCN6855: 1954 case QCA_WCN7850: 1955 break; 1956 1957 default: 1958 /* Get QCA version information */ 1959 ret = qca_read_soc_version(hdev, &ver, soc_type); 1960 if (ret) 1961 goto out; 1962 } 1963 1964 /* Setup patch / NVM configurations */ 1965 ret = qca_uart_setup(hdev, qca_baudrate, soc_type, ver, 1966 firmware_name); 1967 if (!ret) { 1968 clear_bit(QCA_IBS_DISABLED, &qca->flags); 1969 qca_debugfs_init(hdev); 1970 hu->hdev->hw_error = qca_hw_error; 1971 hu->hdev->cmd_timeout = qca_cmd_timeout; 1972 if (hu->serdev) { 1973 if (device_can_wakeup(hu->serdev->ctrl->dev.parent)) 1974 hu->hdev->wakeup = qca_wakeup; 1975 } 1976 } else if (ret == -ENOENT) { 1977 /* No patch/nvm-config found, run with original fw/config */ 1978 set_bit(QCA_ROM_FW, &qca->flags); 1979 ret = 0; 1980 } else if (ret == -EAGAIN) { 1981 /* 1982 * Userspace firmware loader will return -EAGAIN in case no 1983 * patch/nvm-config is found, so run with original fw/config. 1984 */ 1985 set_bit(QCA_ROM_FW, &qca->flags); 1986 ret = 0; 1987 } 1988 1989 out: 1990 if (ret && retries < MAX_INIT_RETRIES) { 1991 bt_dev_warn(hdev, "Retry BT power ON:%d", retries); 1992 qca_power_shutdown(hu); 1993 if (hu->serdev) { 1994 serdev_device_close(hu->serdev); 1995 ret = serdev_device_open(hu->serdev); 1996 if (ret) { 1997 bt_dev_err(hdev, "failed to open port"); 1998 return ret; 1999 } 2000 } 2001 retries++; 2002 goto retry; 2003 } 2004 2005 /* Setup bdaddr */ 2006 if (soc_type == QCA_ROME) 2007 hu->hdev->set_bdaddr = qca_set_bdaddr_rome; 2008 else 2009 hu->hdev->set_bdaddr = qca_set_bdaddr; 2010 2011 if (soc_type == QCA_QCA2066) 2012 qca_configure_hfp_offload(hdev); 2013 2014 qca->fw_version = le16_to_cpu(ver.patch_ver); 2015 qca->controller_id = le16_to_cpu(ver.rom_ver); 2016 hci_devcd_register(hdev, hci_coredump_qca, qca_dmp_hdr, NULL); 2017 2018 return ret; 2019 } 2020 2021 static const struct hci_uart_proto qca_proto = { 2022 .id = HCI_UART_QCA, 2023 .name = "QCA", 2024 .manufacturer = 29, 2025 .init_speed = 115200, 2026 .oper_speed = 3000000, 2027 .open = qca_open, 2028 .close = qca_close, 2029 .flush = qca_flush, 2030 .setup = qca_setup, 2031 .recv = qca_recv, 2032 .enqueue = qca_enqueue, 2033 .dequeue = qca_dequeue, 2034 }; 2035 2036 static const struct qca_device_data qca_soc_data_wcn3988 __maybe_unused = { 2037 .soc_type = QCA_WCN3988, 2038 .vregs = (struct qca_vreg []) { 2039 { "vddio", 15000 }, 2040 { "vddxo", 80000 }, 2041 { "vddrf", 300000 }, 2042 { "vddch0", 450000 }, 2043 }, 2044 .num_vregs = 4, 2045 }; 2046 2047 static const struct qca_device_data qca_soc_data_wcn3990 __maybe_unused = { 2048 .soc_type = QCA_WCN3990, 2049 .vregs = (struct qca_vreg []) { 2050 { "vddio", 15000 }, 2051 { "vddxo", 80000 }, 2052 { "vddrf", 300000 }, 2053 { "vddch0", 450000 }, 2054 }, 2055 .num_vregs = 4, 2056 }; 2057 2058 static const struct qca_device_data qca_soc_data_wcn3991 __maybe_unused = { 2059 .soc_type = QCA_WCN3991, 2060 .vregs = (struct qca_vreg []) { 2061 { "vddio", 15000 }, 2062 { "vddxo", 80000 }, 2063 { "vddrf", 300000 }, 2064 { "vddch0", 450000 }, 2065 }, 2066 .num_vregs = 4, 2067 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2068 }; 2069 2070 static const struct qca_device_data qca_soc_data_wcn3998 __maybe_unused = { 2071 .soc_type = QCA_WCN3998, 2072 .vregs = (struct qca_vreg []) { 2073 { "vddio", 10000 }, 2074 { "vddxo", 80000 }, 2075 { "vddrf", 300000 }, 2076 { "vddch0", 450000 }, 2077 }, 2078 .num_vregs = 4, 2079 }; 2080 2081 static const struct qca_device_data qca_soc_data_qca2066 __maybe_unused = { 2082 .soc_type = QCA_QCA2066, 2083 .num_vregs = 0, 2084 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2085 }; 2086 2087 static const struct qca_device_data qca_soc_data_qca6390 __maybe_unused = { 2088 .soc_type = QCA_QCA6390, 2089 .num_vregs = 0, 2090 }; 2091 2092 static const struct qca_device_data qca_soc_data_wcn6750 __maybe_unused = { 2093 .soc_type = QCA_WCN6750, 2094 .vregs = (struct qca_vreg []) { 2095 { "vddio", 5000 }, 2096 { "vddaon", 26000 }, 2097 { "vddbtcxmx", 126000 }, 2098 { "vddrfacmn", 12500 }, 2099 { "vddrfa0p8", 102000 }, 2100 { "vddrfa1p7", 302000 }, 2101 { "vddrfa1p2", 257000 }, 2102 { "vddrfa2p2", 1700000 }, 2103 { "vddasd", 200 }, 2104 }, 2105 .num_vregs = 9, 2106 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2107 }; 2108 2109 static const struct qca_device_data qca_soc_data_wcn6855 __maybe_unused = { 2110 .soc_type = QCA_WCN6855, 2111 .vregs = (struct qca_vreg []) { 2112 { "vddio", 5000 }, 2113 { "vddbtcxmx", 126000 }, 2114 { "vddrfacmn", 12500 }, 2115 { "vddrfa0p8", 102000 }, 2116 { "vddrfa1p7", 302000 }, 2117 { "vddrfa1p2", 257000 }, 2118 }, 2119 .num_vregs = 6, 2120 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2121 }; 2122 2123 static const struct qca_device_data qca_soc_data_wcn7850 __maybe_unused = { 2124 .soc_type = QCA_WCN7850, 2125 .vregs = (struct qca_vreg []) { 2126 { "vddio", 5000 }, 2127 { "vddaon", 26000 }, 2128 { "vdddig", 126000 }, 2129 { "vddrfa0p8", 102000 }, 2130 { "vddrfa1p2", 257000 }, 2131 { "vddrfa1p9", 302000 }, 2132 }, 2133 .num_vregs = 6, 2134 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES, 2135 }; 2136 2137 static void qca_power_shutdown(struct hci_uart *hu) 2138 { 2139 struct qca_serdev *qcadev; 2140 struct qca_data *qca = hu->priv; 2141 unsigned long flags; 2142 enum qca_btsoc_type soc_type = qca_soc_type(hu); 2143 bool sw_ctrl_state; 2144 struct qca_power *power; 2145 2146 /* From this point we go into power off state. But serial port is 2147 * still open, stop queueing the IBS data and flush all the buffered 2148 * data in skb's. 2149 */ 2150 spin_lock_irqsave(&qca->hci_ibs_lock, flags); 2151 set_bit(QCA_IBS_DISABLED, &qca->flags); 2152 qca_flush(hu); 2153 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 2154 2155 /* Non-serdev device usually is powered by external power 2156 * and don't need additional action in driver for power down 2157 */ 2158 if (!hu->serdev) 2159 return; 2160 2161 qcadev = serdev_device_get_drvdata(hu->serdev); 2162 power = qcadev->bt_power; 2163 2164 if (power && power->pwrseq) { 2165 pwrseq_power_off(power->pwrseq); 2166 set_bit(QCA_BT_OFF, &qca->flags); 2167 return; 2168 } 2169 2170 switch (soc_type) { 2171 case QCA_WCN3988: 2172 case QCA_WCN3990: 2173 case QCA_WCN3991: 2174 case QCA_WCN3998: 2175 host_set_baudrate(hu, 2400); 2176 qca_send_power_pulse(hu, false); 2177 qca_regulator_disable(qcadev); 2178 break; 2179 2180 case QCA_WCN6750: 2181 case QCA_WCN6855: 2182 gpiod_set_value_cansleep(qcadev->bt_en, 0); 2183 msleep(100); 2184 qca_regulator_disable(qcadev); 2185 if (qcadev->sw_ctrl) { 2186 sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl); 2187 bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state); 2188 } 2189 break; 2190 2191 default: 2192 gpiod_set_value_cansleep(qcadev->bt_en, 0); 2193 } 2194 2195 set_bit(QCA_BT_OFF, &qca->flags); 2196 } 2197 2198 static int qca_power_off(struct hci_dev *hdev) 2199 { 2200 struct hci_uart *hu = hci_get_drvdata(hdev); 2201 struct qca_data *qca = hu->priv; 2202 enum qca_btsoc_type soc_type = qca_soc_type(hu); 2203 2204 hu->hdev->hw_error = NULL; 2205 hu->hdev->cmd_timeout = NULL; 2206 2207 del_timer_sync(&qca->wake_retrans_timer); 2208 del_timer_sync(&qca->tx_idle_timer); 2209 2210 /* Stop sending shutdown command if soc crashes. */ 2211 if (soc_type != QCA_ROME 2212 && qca->memdump_state == QCA_MEMDUMP_IDLE) { 2213 qca_send_pre_shutdown_cmd(hdev); 2214 usleep_range(8000, 10000); 2215 } 2216 2217 qca_power_shutdown(hu); 2218 return 0; 2219 } 2220 2221 static int qca_regulator_enable(struct qca_serdev *qcadev) 2222 { 2223 struct qca_power *power = qcadev->bt_power; 2224 int ret; 2225 2226 if (power->pwrseq) 2227 return pwrseq_power_on(power->pwrseq); 2228 2229 /* Already enabled */ 2230 if (power->vregs_on) 2231 return 0; 2232 2233 BT_DBG("enabling %d regulators)", power->num_vregs); 2234 2235 ret = regulator_bulk_enable(power->num_vregs, power->vreg_bulk); 2236 if (ret) 2237 return ret; 2238 2239 power->vregs_on = true; 2240 2241 ret = clk_prepare_enable(qcadev->susclk); 2242 if (ret) 2243 qca_regulator_disable(qcadev); 2244 2245 return ret; 2246 } 2247 2248 static void qca_regulator_disable(struct qca_serdev *qcadev) 2249 { 2250 struct qca_power *power; 2251 2252 if (!qcadev) 2253 return; 2254 2255 power = qcadev->bt_power; 2256 2257 /* Already disabled? */ 2258 if (!power->vregs_on) 2259 return; 2260 2261 regulator_bulk_disable(power->num_vregs, power->vreg_bulk); 2262 power->vregs_on = false; 2263 2264 clk_disable_unprepare(qcadev->susclk); 2265 } 2266 2267 static int qca_init_regulators(struct qca_power *qca, 2268 const struct qca_vreg *vregs, size_t num_vregs) 2269 { 2270 struct regulator_bulk_data *bulk; 2271 int ret; 2272 int i; 2273 2274 bulk = devm_kcalloc(qca->dev, num_vregs, sizeof(*bulk), GFP_KERNEL); 2275 if (!bulk) 2276 return -ENOMEM; 2277 2278 for (i = 0; i < num_vregs; i++) 2279 bulk[i].supply = vregs[i].name; 2280 2281 ret = devm_regulator_bulk_get(qca->dev, num_vregs, bulk); 2282 if (ret < 0) 2283 return ret; 2284 2285 for (i = 0; i < num_vregs; i++) { 2286 ret = regulator_set_load(bulk[i].consumer, vregs[i].load_uA); 2287 if (ret) 2288 return ret; 2289 } 2290 2291 qca->vreg_bulk = bulk; 2292 qca->num_vregs = num_vregs; 2293 2294 return 0; 2295 } 2296 2297 static void qca_clk_disable_unprepare(void *data) 2298 { 2299 struct clk *clk = data; 2300 2301 clk_disable_unprepare(clk); 2302 } 2303 2304 static int qca_serdev_probe(struct serdev_device *serdev) 2305 { 2306 struct qca_serdev *qcadev; 2307 struct hci_dev *hdev; 2308 const struct qca_device_data *data; 2309 int err; 2310 bool power_ctrl_enabled = true; 2311 2312 qcadev = devm_kzalloc(&serdev->dev, sizeof(*qcadev), GFP_KERNEL); 2313 if (!qcadev) 2314 return -ENOMEM; 2315 2316 qcadev->serdev_hu.serdev = serdev; 2317 data = device_get_match_data(&serdev->dev); 2318 serdev_device_set_drvdata(serdev, qcadev); 2319 device_property_read_string(&serdev->dev, "firmware-name", 2320 &qcadev->firmware_name); 2321 device_property_read_u32(&serdev->dev, "max-speed", 2322 &qcadev->oper_speed); 2323 if (!qcadev->oper_speed) 2324 BT_DBG("UART will pick default operating speed"); 2325 2326 qcadev->bdaddr_property_broken = device_property_read_bool(&serdev->dev, 2327 "qcom,local-bd-address-broken"); 2328 2329 if (data) 2330 qcadev->btsoc_type = data->soc_type; 2331 else 2332 qcadev->btsoc_type = QCA_ROME; 2333 2334 switch (qcadev->btsoc_type) { 2335 case QCA_WCN3988: 2336 case QCA_WCN3990: 2337 case QCA_WCN3991: 2338 case QCA_WCN3998: 2339 case QCA_WCN6750: 2340 case QCA_WCN6855: 2341 case QCA_WCN7850: 2342 case QCA_QCA6390: 2343 qcadev->bt_power = devm_kzalloc(&serdev->dev, 2344 sizeof(struct qca_power), 2345 GFP_KERNEL); 2346 if (!qcadev->bt_power) 2347 return -ENOMEM; 2348 break; 2349 default: 2350 break; 2351 } 2352 2353 switch (qcadev->btsoc_type) { 2354 case QCA_WCN6855: 2355 case QCA_WCN7850: 2356 if (!device_property_present(&serdev->dev, "enable-gpios")) { 2357 /* 2358 * Backward compatibility with old DT sources. If the 2359 * node doesn't have the 'enable-gpios' property then 2360 * let's use the power sequencer. Otherwise, let's 2361 * drive everything outselves. 2362 */ 2363 qcadev->bt_power->pwrseq = devm_pwrseq_get(&serdev->dev, 2364 "bluetooth"); 2365 if (IS_ERR(qcadev->bt_power->pwrseq)) 2366 return PTR_ERR(qcadev->bt_power->pwrseq); 2367 2368 break; 2369 } 2370 fallthrough; 2371 case QCA_WCN3988: 2372 case QCA_WCN3990: 2373 case QCA_WCN3991: 2374 case QCA_WCN3998: 2375 case QCA_WCN6750: 2376 qcadev->bt_power->dev = &serdev->dev; 2377 err = qca_init_regulators(qcadev->bt_power, data->vregs, 2378 data->num_vregs); 2379 if (err) { 2380 BT_ERR("Failed to init regulators:%d", err); 2381 return err; 2382 } 2383 2384 qcadev->bt_power->vregs_on = false; 2385 2386 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable", 2387 GPIOD_OUT_LOW); 2388 if (IS_ERR(qcadev->bt_en) && 2389 (data->soc_type == QCA_WCN6750 || 2390 data->soc_type == QCA_WCN6855)) { 2391 dev_err(&serdev->dev, "failed to acquire BT_EN gpio\n"); 2392 return PTR_ERR(qcadev->bt_en); 2393 } 2394 2395 if (!qcadev->bt_en) 2396 power_ctrl_enabled = false; 2397 2398 qcadev->sw_ctrl = devm_gpiod_get_optional(&serdev->dev, "swctrl", 2399 GPIOD_IN); 2400 if (IS_ERR(qcadev->sw_ctrl) && 2401 (data->soc_type == QCA_WCN6750 || 2402 data->soc_type == QCA_WCN6855 || 2403 data->soc_type == QCA_WCN7850)) { 2404 dev_err(&serdev->dev, "failed to acquire SW_CTRL gpio\n"); 2405 return PTR_ERR(qcadev->sw_ctrl); 2406 } 2407 2408 qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL); 2409 if (IS_ERR(qcadev->susclk)) { 2410 dev_err(&serdev->dev, "failed to acquire clk\n"); 2411 return PTR_ERR(qcadev->susclk); 2412 } 2413 break; 2414 2415 case QCA_QCA6390: 2416 if (dev_of_node(&serdev->dev)) { 2417 qcadev->bt_power->pwrseq = devm_pwrseq_get(&serdev->dev, 2418 "bluetooth"); 2419 if (IS_ERR(qcadev->bt_power->pwrseq)) 2420 return PTR_ERR(qcadev->bt_power->pwrseq); 2421 break; 2422 } 2423 fallthrough; 2424 2425 default: 2426 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable", 2427 GPIOD_OUT_LOW); 2428 if (IS_ERR(qcadev->bt_en)) { 2429 dev_err(&serdev->dev, "failed to acquire enable gpio\n"); 2430 return PTR_ERR(qcadev->bt_en); 2431 } 2432 2433 if (!qcadev->bt_en) 2434 power_ctrl_enabled = false; 2435 2436 qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL); 2437 if (IS_ERR(qcadev->susclk)) { 2438 dev_warn(&serdev->dev, "failed to acquire clk\n"); 2439 return PTR_ERR(qcadev->susclk); 2440 } 2441 err = clk_set_rate(qcadev->susclk, SUSCLK_RATE_32KHZ); 2442 if (err) 2443 return err; 2444 2445 err = clk_prepare_enable(qcadev->susclk); 2446 if (err) 2447 return err; 2448 2449 err = devm_add_action_or_reset(&serdev->dev, 2450 qca_clk_disable_unprepare, 2451 qcadev->susclk); 2452 if (err) 2453 return err; 2454 2455 } 2456 2457 err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto); 2458 if (err) { 2459 BT_ERR("serdev registration failed"); 2460 return err; 2461 } 2462 2463 hdev = qcadev->serdev_hu.hdev; 2464 2465 if (power_ctrl_enabled) { 2466 set_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks); 2467 hdev->shutdown = qca_power_off; 2468 } 2469 2470 if (data) { 2471 /* Wideband speech support must be set per driver since it can't 2472 * be queried via hci. Same with the valid le states quirk. 2473 */ 2474 if (data->capabilities & QCA_CAP_WIDEBAND_SPEECH) 2475 set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED, 2476 &hdev->quirks); 2477 2478 if (!(data->capabilities & QCA_CAP_VALID_LE_STATES)) 2479 set_bit(HCI_QUIRK_BROKEN_LE_STATES, &hdev->quirks); 2480 } 2481 2482 return 0; 2483 } 2484 2485 static void qca_serdev_remove(struct serdev_device *serdev) 2486 { 2487 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2488 struct qca_power *power = qcadev->bt_power; 2489 2490 switch (qcadev->btsoc_type) { 2491 case QCA_WCN3988: 2492 case QCA_WCN3990: 2493 case QCA_WCN3991: 2494 case QCA_WCN3998: 2495 case QCA_WCN6750: 2496 case QCA_WCN6855: 2497 case QCA_WCN7850: 2498 if (power->vregs_on) 2499 qca_power_shutdown(&qcadev->serdev_hu); 2500 break; 2501 default: 2502 break; 2503 } 2504 2505 hci_uart_unregister_device(&qcadev->serdev_hu); 2506 } 2507 2508 static void qca_serdev_shutdown(struct device *dev) 2509 { 2510 int ret; 2511 int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS); 2512 struct serdev_device *serdev = to_serdev_device(dev); 2513 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2514 struct hci_uart *hu = &qcadev->serdev_hu; 2515 struct hci_dev *hdev = hu->hdev; 2516 const u8 ibs_wake_cmd[] = { 0xFD }; 2517 const u8 edl_reset_soc_cmd[] = { 0x01, 0x00, 0xFC, 0x01, 0x05 }; 2518 2519 if (qcadev->btsoc_type == QCA_QCA6390) { 2520 /* The purpose of sending the VSC is to reset SOC into a initial 2521 * state and the state will ensure next hdev->setup() success. 2522 * if HCI_QUIRK_NON_PERSISTENT_SETUP is set, it means that 2523 * hdev->setup() can do its job regardless of SoC state, so 2524 * don't need to send the VSC. 2525 * if HCI_SETUP is set, it means that hdev->setup() was never 2526 * invoked and the SOC is already in the initial state, so 2527 * don't also need to send the VSC. 2528 */ 2529 if (test_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks) || 2530 hci_dev_test_flag(hdev, HCI_SETUP)) 2531 return; 2532 2533 /* The serdev must be in open state when conrol logic arrives 2534 * here, so also fix the use-after-free issue caused by that 2535 * the serdev is flushed or wrote after it is closed. 2536 */ 2537 serdev_device_write_flush(serdev); 2538 ret = serdev_device_write_buf(serdev, ibs_wake_cmd, 2539 sizeof(ibs_wake_cmd)); 2540 if (ret < 0) { 2541 BT_ERR("QCA send IBS_WAKE_IND error: %d", ret); 2542 return; 2543 } 2544 serdev_device_wait_until_sent(serdev, timeout); 2545 usleep_range(8000, 10000); 2546 2547 serdev_device_write_flush(serdev); 2548 ret = serdev_device_write_buf(serdev, edl_reset_soc_cmd, 2549 sizeof(edl_reset_soc_cmd)); 2550 if (ret < 0) { 2551 BT_ERR("QCA send EDL_RESET_REQ error: %d", ret); 2552 return; 2553 } 2554 serdev_device_wait_until_sent(serdev, timeout); 2555 usleep_range(8000, 10000); 2556 } 2557 } 2558 2559 static int __maybe_unused qca_suspend(struct device *dev) 2560 { 2561 struct serdev_device *serdev = to_serdev_device(dev); 2562 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2563 struct hci_uart *hu = &qcadev->serdev_hu; 2564 struct qca_data *qca = hu->priv; 2565 unsigned long flags; 2566 bool tx_pending = false; 2567 int ret = 0; 2568 u8 cmd; 2569 u32 wait_timeout = 0; 2570 2571 set_bit(QCA_SUSPENDING, &qca->flags); 2572 2573 /* if BT SoC is running with default firmware then it does not 2574 * support in-band sleep 2575 */ 2576 if (test_bit(QCA_ROM_FW, &qca->flags)) 2577 return 0; 2578 2579 /* During SSR after memory dump collection, controller will be 2580 * powered off and then powered on.If controller is powered off 2581 * during SSR then we should wait until SSR is completed. 2582 */ 2583 if (test_bit(QCA_BT_OFF, &qca->flags) && 2584 !test_bit(QCA_SSR_TRIGGERED, &qca->flags)) 2585 return 0; 2586 2587 if (test_bit(QCA_IBS_DISABLED, &qca->flags) || 2588 test_bit(QCA_SSR_TRIGGERED, &qca->flags)) { 2589 wait_timeout = test_bit(QCA_SSR_TRIGGERED, &qca->flags) ? 2590 IBS_DISABLE_SSR_TIMEOUT_MS : 2591 FW_DOWNLOAD_TIMEOUT_MS; 2592 2593 /* QCA_IBS_DISABLED flag is set to true, During FW download 2594 * and during memory dump collection. It is reset to false, 2595 * After FW download complete. 2596 */ 2597 wait_on_bit_timeout(&qca->flags, QCA_IBS_DISABLED, 2598 TASK_UNINTERRUPTIBLE, msecs_to_jiffies(wait_timeout)); 2599 2600 if (test_bit(QCA_IBS_DISABLED, &qca->flags)) { 2601 bt_dev_err(hu->hdev, "SSR or FW download time out"); 2602 ret = -ETIMEDOUT; 2603 goto error; 2604 } 2605 } 2606 2607 cancel_work_sync(&qca->ws_awake_device); 2608 cancel_work_sync(&qca->ws_awake_rx); 2609 2610 spin_lock_irqsave_nested(&qca->hci_ibs_lock, 2611 flags, SINGLE_DEPTH_NESTING); 2612 2613 switch (qca->tx_ibs_state) { 2614 case HCI_IBS_TX_WAKING: 2615 del_timer(&qca->wake_retrans_timer); 2616 fallthrough; 2617 case HCI_IBS_TX_AWAKE: 2618 del_timer(&qca->tx_idle_timer); 2619 2620 serdev_device_write_flush(hu->serdev); 2621 cmd = HCI_IBS_SLEEP_IND; 2622 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd)); 2623 2624 if (ret < 0) { 2625 BT_ERR("Failed to send SLEEP to device"); 2626 break; 2627 } 2628 2629 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; 2630 qca->ibs_sent_slps++; 2631 tx_pending = true; 2632 break; 2633 2634 case HCI_IBS_TX_ASLEEP: 2635 break; 2636 2637 default: 2638 BT_ERR("Spurious tx state %d", qca->tx_ibs_state); 2639 ret = -EINVAL; 2640 break; 2641 } 2642 2643 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); 2644 2645 if (ret < 0) 2646 goto error; 2647 2648 if (tx_pending) { 2649 serdev_device_wait_until_sent(hu->serdev, 2650 msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS)); 2651 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu); 2652 } 2653 2654 /* Wait for HCI_IBS_SLEEP_IND sent by device to indicate its Tx is going 2655 * to sleep, so that the packet does not wake the system later. 2656 */ 2657 ret = wait_event_interruptible_timeout(qca->suspend_wait_q, 2658 qca->rx_ibs_state == HCI_IBS_RX_ASLEEP, 2659 msecs_to_jiffies(IBS_BTSOC_TX_IDLE_TIMEOUT_MS)); 2660 if (ret == 0) { 2661 ret = -ETIMEDOUT; 2662 goto error; 2663 } 2664 2665 return 0; 2666 2667 error: 2668 clear_bit(QCA_SUSPENDING, &qca->flags); 2669 2670 return ret; 2671 } 2672 2673 static int __maybe_unused qca_resume(struct device *dev) 2674 { 2675 struct serdev_device *serdev = to_serdev_device(dev); 2676 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2677 struct hci_uart *hu = &qcadev->serdev_hu; 2678 struct qca_data *qca = hu->priv; 2679 2680 clear_bit(QCA_SUSPENDING, &qca->flags); 2681 2682 return 0; 2683 } 2684 2685 static SIMPLE_DEV_PM_OPS(qca_pm_ops, qca_suspend, qca_resume); 2686 2687 #ifdef CONFIG_OF 2688 static const struct of_device_id qca_bluetooth_of_match[] = { 2689 { .compatible = "qcom,qca2066-bt", .data = &qca_soc_data_qca2066}, 2690 { .compatible = "qcom,qca6174-bt" }, 2691 { .compatible = "qcom,qca6390-bt", .data = &qca_soc_data_qca6390}, 2692 { .compatible = "qcom,qca9377-bt" }, 2693 { .compatible = "qcom,wcn3988-bt", .data = &qca_soc_data_wcn3988}, 2694 { .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data_wcn3990}, 2695 { .compatible = "qcom,wcn3991-bt", .data = &qca_soc_data_wcn3991}, 2696 { .compatible = "qcom,wcn3998-bt", .data = &qca_soc_data_wcn3998}, 2697 { .compatible = "qcom,wcn6750-bt", .data = &qca_soc_data_wcn6750}, 2698 { .compatible = "qcom,wcn6855-bt", .data = &qca_soc_data_wcn6855}, 2699 { .compatible = "qcom,wcn7850-bt", .data = &qca_soc_data_wcn7850}, 2700 { /* sentinel */ } 2701 }; 2702 MODULE_DEVICE_TABLE(of, qca_bluetooth_of_match); 2703 #endif 2704 2705 #ifdef CONFIG_ACPI 2706 static const struct acpi_device_id qca_bluetooth_acpi_match[] = { 2707 { "QCOM2066", (kernel_ulong_t)&qca_soc_data_qca2066 }, 2708 { "QCOM6390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2709 { "DLA16390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2710 { "DLB16390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2711 { "DLB26390", (kernel_ulong_t)&qca_soc_data_qca6390 }, 2712 { }, 2713 }; 2714 MODULE_DEVICE_TABLE(acpi, qca_bluetooth_acpi_match); 2715 #endif 2716 2717 #ifdef CONFIG_DEV_COREDUMP 2718 static void hciqca_coredump(struct device *dev) 2719 { 2720 struct serdev_device *serdev = to_serdev_device(dev); 2721 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); 2722 struct hci_uart *hu = &qcadev->serdev_hu; 2723 struct hci_dev *hdev = hu->hdev; 2724 2725 if (hdev->dump.coredump) 2726 hdev->dump.coredump(hdev); 2727 } 2728 #endif 2729 2730 static struct serdev_device_driver qca_serdev_driver = { 2731 .probe = qca_serdev_probe, 2732 .remove = qca_serdev_remove, 2733 .driver = { 2734 .name = "hci_uart_qca", 2735 .of_match_table = of_match_ptr(qca_bluetooth_of_match), 2736 .acpi_match_table = ACPI_PTR(qca_bluetooth_acpi_match), 2737 .shutdown = qca_serdev_shutdown, 2738 .pm = &qca_pm_ops, 2739 #ifdef CONFIG_DEV_COREDUMP 2740 .coredump = hciqca_coredump, 2741 #endif 2742 }, 2743 }; 2744 2745 int __init qca_init(void) 2746 { 2747 serdev_device_driver_register(&qca_serdev_driver); 2748 2749 return hci_uart_register_proto(&qca_proto); 2750 } 2751 2752 int __exit qca_deinit(void) 2753 { 2754 serdev_device_driver_unregister(&qca_serdev_driver); 2755 2756 return hci_uart_unregister_proto(&qca_proto); 2757 } 2758