xref: /linux/drivers/bluetooth/hci_qca.c (revision 4f77c3462308c62ffe7129cc18b9ac937f44b5a5)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  *  Bluetooth Software UART Qualcomm protocol
4  *
5  *  HCI_IBS (HCI In-Band Sleep) is Qualcomm's power management
6  *  protocol extension to H4.
7  *
8  *  Copyright (C) 2007 Texas Instruments, Inc.
9  *  Copyright (c) 2010, 2012, 2018 The Linux Foundation. All rights reserved.
10  *
11  *  Acknowledgements:
12  *  This file is based on hci_ll.c, which was...
13  *  Written by Ohad Ben-Cohen <ohad@bencohen.org>
14  *  which was in turn based on hci_h4.c, which was written
15  *  by Maxim Krasnyansky and Marcel Holtmann.
16  */
17 
18 #include <linux/kernel.h>
19 #include <linux/clk.h>
20 #include <linux/completion.h>
21 #include <linux/debugfs.h>
22 #include <linux/delay.h>
23 #include <linux/devcoredump.h>
24 #include <linux/device.h>
25 #include <linux/gpio/consumer.h>
26 #include <linux/mod_devicetable.h>
27 #include <linux/module.h>
28 #include <linux/of.h>
29 #include <linux/acpi.h>
30 #include <linux/platform_device.h>
31 #include <linux/pwrseq/consumer.h>
32 #include <linux/regulator/consumer.h>
33 #include <linux/serdev.h>
34 #include <linux/mutex.h>
35 #include <asm/unaligned.h>
36 
37 #include <net/bluetooth/bluetooth.h>
38 #include <net/bluetooth/hci_core.h>
39 
40 #include "hci_uart.h"
41 #include "btqca.h"
42 
43 /* HCI_IBS protocol messages */
44 #define HCI_IBS_SLEEP_IND	0xFE
45 #define HCI_IBS_WAKE_IND	0xFD
46 #define HCI_IBS_WAKE_ACK	0xFC
47 #define HCI_MAX_IBS_SIZE	10
48 
49 #define IBS_WAKE_RETRANS_TIMEOUT_MS	100
50 #define IBS_BTSOC_TX_IDLE_TIMEOUT_MS	200
51 #define IBS_HOST_TX_IDLE_TIMEOUT_MS	2000
52 #define CMD_TRANS_TIMEOUT_MS		100
53 #define MEMDUMP_TIMEOUT_MS		8000
54 #define IBS_DISABLE_SSR_TIMEOUT_MS \
55 	(MEMDUMP_TIMEOUT_MS + FW_DOWNLOAD_TIMEOUT_MS)
56 #define FW_DOWNLOAD_TIMEOUT_MS		3000
57 
58 /* susclk rate */
59 #define SUSCLK_RATE_32KHZ	32768
60 
61 /* Controller debug log header */
62 #define QCA_DEBUG_HANDLE	0x2EDC
63 
64 /* max retry count when init fails */
65 #define MAX_INIT_RETRIES 3
66 
67 /* Controller dump header */
68 #define QCA_SSR_DUMP_HANDLE		0x0108
69 #define QCA_DUMP_PACKET_SIZE		255
70 #define QCA_LAST_SEQUENCE_NUM		0xFFFF
71 #define QCA_CRASHBYTE_PACKET_LEN	1096
72 #define QCA_MEMDUMP_BYTE		0xFB
73 
74 enum qca_flags {
75 	QCA_IBS_DISABLED,
76 	QCA_DROP_VENDOR_EVENT,
77 	QCA_SUSPENDING,
78 	QCA_MEMDUMP_COLLECTION,
79 	QCA_HW_ERROR_EVENT,
80 	QCA_SSR_TRIGGERED,
81 	QCA_BT_OFF,
82 	QCA_ROM_FW,
83 	QCA_DEBUGFS_CREATED,
84 };
85 
86 enum qca_capabilities {
87 	QCA_CAP_WIDEBAND_SPEECH = BIT(0),
88 	QCA_CAP_VALID_LE_STATES = BIT(1),
89 };
90 
91 /* HCI_IBS transmit side sleep protocol states */
92 enum tx_ibs_states {
93 	HCI_IBS_TX_ASLEEP,
94 	HCI_IBS_TX_WAKING,
95 	HCI_IBS_TX_AWAKE,
96 };
97 
98 /* HCI_IBS receive side sleep protocol states */
99 enum rx_states {
100 	HCI_IBS_RX_ASLEEP,
101 	HCI_IBS_RX_AWAKE,
102 };
103 
104 /* HCI_IBS transmit and receive side clock state vote */
105 enum hci_ibs_clock_state_vote {
106 	HCI_IBS_VOTE_STATS_UPDATE,
107 	HCI_IBS_TX_VOTE_CLOCK_ON,
108 	HCI_IBS_TX_VOTE_CLOCK_OFF,
109 	HCI_IBS_RX_VOTE_CLOCK_ON,
110 	HCI_IBS_RX_VOTE_CLOCK_OFF,
111 };
112 
113 /* Controller memory dump states */
114 enum qca_memdump_states {
115 	QCA_MEMDUMP_IDLE,
116 	QCA_MEMDUMP_COLLECTING,
117 	QCA_MEMDUMP_COLLECTED,
118 	QCA_MEMDUMP_TIMEOUT,
119 };
120 
121 struct qca_memdump_info {
122 	u32 current_seq_no;
123 	u32 received_dump;
124 	u32 ram_dump_size;
125 };
126 
127 struct qca_memdump_event_hdr {
128 	__u8    evt;
129 	__u8    plen;
130 	__u16   opcode;
131 	__le16   seq_no;
132 	__u8    reserved;
133 } __packed;
134 
135 
136 struct qca_dump_size {
137 	__le32 dump_size;
138 } __packed;
139 
140 struct qca_data {
141 	struct hci_uart *hu;
142 	struct sk_buff *rx_skb;
143 	struct sk_buff_head txq;
144 	struct sk_buff_head tx_wait_q;	/* HCI_IBS wait queue	*/
145 	struct sk_buff_head rx_memdump_q;	/* Memdump wait queue	*/
146 	spinlock_t hci_ibs_lock;	/* HCI_IBS state lock	*/
147 	u8 tx_ibs_state;	/* HCI_IBS transmit side power state*/
148 	u8 rx_ibs_state;	/* HCI_IBS receive side power state */
149 	bool tx_vote;		/* Clock must be on for TX */
150 	bool rx_vote;		/* Clock must be on for RX */
151 	struct timer_list tx_idle_timer;
152 	u32 tx_idle_delay;
153 	struct timer_list wake_retrans_timer;
154 	u32 wake_retrans;
155 	struct workqueue_struct *workqueue;
156 	struct work_struct ws_awake_rx;
157 	struct work_struct ws_awake_device;
158 	struct work_struct ws_rx_vote_off;
159 	struct work_struct ws_tx_vote_off;
160 	struct work_struct ctrl_memdump_evt;
161 	struct delayed_work ctrl_memdump_timeout;
162 	struct qca_memdump_info *qca_memdump;
163 	unsigned long flags;
164 	struct completion drop_ev_comp;
165 	wait_queue_head_t suspend_wait_q;
166 	enum qca_memdump_states memdump_state;
167 	struct mutex hci_memdump_lock;
168 
169 	u16 fw_version;
170 	u16 controller_id;
171 	/* For debugging purpose */
172 	u64 ibs_sent_wacks;
173 	u64 ibs_sent_slps;
174 	u64 ibs_sent_wakes;
175 	u64 ibs_recv_wacks;
176 	u64 ibs_recv_slps;
177 	u64 ibs_recv_wakes;
178 	u64 vote_last_jif;
179 	u32 vote_on_ms;
180 	u32 vote_off_ms;
181 	u64 tx_votes_on;
182 	u64 rx_votes_on;
183 	u64 tx_votes_off;
184 	u64 rx_votes_off;
185 	u64 votes_on;
186 	u64 votes_off;
187 };
188 
189 enum qca_speed_type {
190 	QCA_INIT_SPEED = 1,
191 	QCA_OPER_SPEED
192 };
193 
194 /*
195  * Voltage regulator information required for configuring the
196  * QCA Bluetooth chipset
197  */
198 struct qca_vreg {
199 	const char *name;
200 	unsigned int load_uA;
201 };
202 
203 struct qca_device_data {
204 	enum qca_btsoc_type soc_type;
205 	struct qca_vreg *vregs;
206 	size_t num_vregs;
207 	uint32_t capabilities;
208 };
209 
210 /*
211  * Platform data for the QCA Bluetooth power driver.
212  */
213 struct qca_power {
214 	struct device *dev;
215 	struct regulator_bulk_data *vreg_bulk;
216 	int num_vregs;
217 	bool vregs_on;
218 	struct pwrseq_desc *pwrseq;
219 };
220 
221 struct qca_serdev {
222 	struct hci_uart	 serdev_hu;
223 	struct gpio_desc *bt_en;
224 	struct gpio_desc *sw_ctrl;
225 	struct clk	 *susclk;
226 	enum qca_btsoc_type btsoc_type;
227 	struct qca_power *bt_power;
228 	u32 init_speed;
229 	u32 oper_speed;
230 	bool bdaddr_property_broken;
231 	const char *firmware_name;
232 };
233 
234 static int qca_regulator_enable(struct qca_serdev *qcadev);
235 static void qca_regulator_disable(struct qca_serdev *qcadev);
236 static void qca_power_shutdown(struct hci_uart *hu);
237 static int qca_power_off(struct hci_dev *hdev);
238 static void qca_controller_memdump(struct work_struct *work);
239 static void qca_dmp_hdr(struct hci_dev *hdev, struct sk_buff *skb);
240 
241 static enum qca_btsoc_type qca_soc_type(struct hci_uart *hu)
242 {
243 	enum qca_btsoc_type soc_type;
244 
245 	if (hu->serdev) {
246 		struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev);
247 
248 		soc_type = qsd->btsoc_type;
249 	} else {
250 		soc_type = QCA_ROME;
251 	}
252 
253 	return soc_type;
254 }
255 
256 static const char *qca_get_firmware_name(struct hci_uart *hu)
257 {
258 	if (hu->serdev) {
259 		struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev);
260 
261 		return qsd->firmware_name;
262 	} else {
263 		return NULL;
264 	}
265 }
266 
267 static void __serial_clock_on(struct tty_struct *tty)
268 {
269 	/* TODO: Some chipset requires to enable UART clock on client
270 	 * side to save power consumption or manual work is required.
271 	 * Please put your code to control UART clock here if needed
272 	 */
273 }
274 
275 static void __serial_clock_off(struct tty_struct *tty)
276 {
277 	/* TODO: Some chipset requires to disable UART clock on client
278 	 * side to save power consumption or manual work is required.
279 	 * Please put your code to control UART clock off here if needed
280 	 */
281 }
282 
283 /* serial_clock_vote needs to be called with the ibs lock held */
284 static void serial_clock_vote(unsigned long vote, struct hci_uart *hu)
285 {
286 	struct qca_data *qca = hu->priv;
287 	unsigned int diff;
288 
289 	bool old_vote = (qca->tx_vote | qca->rx_vote);
290 	bool new_vote;
291 
292 	switch (vote) {
293 	case HCI_IBS_VOTE_STATS_UPDATE:
294 		diff = jiffies_to_msecs(jiffies - qca->vote_last_jif);
295 
296 		if (old_vote)
297 			qca->vote_off_ms += diff;
298 		else
299 			qca->vote_on_ms += diff;
300 		return;
301 
302 	case HCI_IBS_TX_VOTE_CLOCK_ON:
303 		qca->tx_vote = true;
304 		qca->tx_votes_on++;
305 		break;
306 
307 	case HCI_IBS_RX_VOTE_CLOCK_ON:
308 		qca->rx_vote = true;
309 		qca->rx_votes_on++;
310 		break;
311 
312 	case HCI_IBS_TX_VOTE_CLOCK_OFF:
313 		qca->tx_vote = false;
314 		qca->tx_votes_off++;
315 		break;
316 
317 	case HCI_IBS_RX_VOTE_CLOCK_OFF:
318 		qca->rx_vote = false;
319 		qca->rx_votes_off++;
320 		break;
321 
322 	default:
323 		BT_ERR("Voting irregularity");
324 		return;
325 	}
326 
327 	new_vote = qca->rx_vote | qca->tx_vote;
328 
329 	if (new_vote != old_vote) {
330 		if (new_vote)
331 			__serial_clock_on(hu->tty);
332 		else
333 			__serial_clock_off(hu->tty);
334 
335 		BT_DBG("Vote serial clock %s(%s)", new_vote ? "true" : "false",
336 		       vote ? "true" : "false");
337 
338 		diff = jiffies_to_msecs(jiffies - qca->vote_last_jif);
339 
340 		if (new_vote) {
341 			qca->votes_on++;
342 			qca->vote_off_ms += diff;
343 		} else {
344 			qca->votes_off++;
345 			qca->vote_on_ms += diff;
346 		}
347 		qca->vote_last_jif = jiffies;
348 	}
349 }
350 
351 /* Builds and sends an HCI_IBS command packet.
352  * These are very simple packets with only 1 cmd byte.
353  */
354 static int send_hci_ibs_cmd(u8 cmd, struct hci_uart *hu)
355 {
356 	int err = 0;
357 	struct sk_buff *skb = NULL;
358 	struct qca_data *qca = hu->priv;
359 
360 	BT_DBG("hu %p send hci ibs cmd 0x%x", hu, cmd);
361 
362 	skb = bt_skb_alloc(1, GFP_ATOMIC);
363 	if (!skb) {
364 		BT_ERR("Failed to allocate memory for HCI_IBS packet");
365 		return -ENOMEM;
366 	}
367 
368 	/* Assign HCI_IBS type */
369 	skb_put_u8(skb, cmd);
370 
371 	skb_queue_tail(&qca->txq, skb);
372 
373 	return err;
374 }
375 
376 static void qca_wq_awake_device(struct work_struct *work)
377 {
378 	struct qca_data *qca = container_of(work, struct qca_data,
379 					    ws_awake_device);
380 	struct hci_uart *hu = qca->hu;
381 	unsigned long retrans_delay;
382 	unsigned long flags;
383 
384 	BT_DBG("hu %p wq awake device", hu);
385 
386 	/* Vote for serial clock */
387 	serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_ON, hu);
388 
389 	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
390 
391 	/* Send wake indication to device */
392 	if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0)
393 		BT_ERR("Failed to send WAKE to device");
394 
395 	qca->ibs_sent_wakes++;
396 
397 	/* Start retransmit timer */
398 	retrans_delay = msecs_to_jiffies(qca->wake_retrans);
399 	mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay);
400 
401 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
402 
403 	/* Actually send the packets */
404 	hci_uart_tx_wakeup(hu);
405 }
406 
407 static void qca_wq_awake_rx(struct work_struct *work)
408 {
409 	struct qca_data *qca = container_of(work, struct qca_data,
410 					    ws_awake_rx);
411 	struct hci_uart *hu = qca->hu;
412 	unsigned long flags;
413 
414 	BT_DBG("hu %p wq awake rx", hu);
415 
416 	serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_ON, hu);
417 
418 	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
419 	qca->rx_ibs_state = HCI_IBS_RX_AWAKE;
420 
421 	/* Always acknowledge device wake up,
422 	 * sending IBS message doesn't count as TX ON.
423 	 */
424 	if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0)
425 		BT_ERR("Failed to acknowledge device wake up");
426 
427 	qca->ibs_sent_wacks++;
428 
429 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
430 
431 	/* Actually send the packets */
432 	hci_uart_tx_wakeup(hu);
433 }
434 
435 static void qca_wq_serial_rx_clock_vote_off(struct work_struct *work)
436 {
437 	struct qca_data *qca = container_of(work, struct qca_data,
438 					    ws_rx_vote_off);
439 	struct hci_uart *hu = qca->hu;
440 
441 	BT_DBG("hu %p rx clock vote off", hu);
442 
443 	serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_OFF, hu);
444 }
445 
446 static void qca_wq_serial_tx_clock_vote_off(struct work_struct *work)
447 {
448 	struct qca_data *qca = container_of(work, struct qca_data,
449 					    ws_tx_vote_off);
450 	struct hci_uart *hu = qca->hu;
451 
452 	BT_DBG("hu %p tx clock vote off", hu);
453 
454 	/* Run HCI tx handling unlocked */
455 	hci_uart_tx_wakeup(hu);
456 
457 	/* Now that message queued to tty driver, vote for tty clocks off.
458 	 * It is up to the tty driver to pend the clocks off until tx done.
459 	 */
460 	serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu);
461 }
462 
463 static void hci_ibs_tx_idle_timeout(struct timer_list *t)
464 {
465 	struct qca_data *qca = from_timer(qca, t, tx_idle_timer);
466 	struct hci_uart *hu = qca->hu;
467 	unsigned long flags;
468 
469 	BT_DBG("hu %p idle timeout in %d state", hu, qca->tx_ibs_state);
470 
471 	spin_lock_irqsave_nested(&qca->hci_ibs_lock,
472 				 flags, SINGLE_DEPTH_NESTING);
473 
474 	switch (qca->tx_ibs_state) {
475 	case HCI_IBS_TX_AWAKE:
476 		/* TX_IDLE, go to SLEEP */
477 		if (send_hci_ibs_cmd(HCI_IBS_SLEEP_IND, hu) < 0) {
478 			BT_ERR("Failed to send SLEEP to device");
479 			break;
480 		}
481 		qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
482 		qca->ibs_sent_slps++;
483 		queue_work(qca->workqueue, &qca->ws_tx_vote_off);
484 		break;
485 
486 	case HCI_IBS_TX_ASLEEP:
487 	case HCI_IBS_TX_WAKING:
488 	default:
489 		BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state);
490 		break;
491 	}
492 
493 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
494 }
495 
496 static void hci_ibs_wake_retrans_timeout(struct timer_list *t)
497 {
498 	struct qca_data *qca = from_timer(qca, t, wake_retrans_timer);
499 	struct hci_uart *hu = qca->hu;
500 	unsigned long flags, retrans_delay;
501 	bool retransmit = false;
502 
503 	BT_DBG("hu %p wake retransmit timeout in %d state",
504 		hu, qca->tx_ibs_state);
505 
506 	spin_lock_irqsave_nested(&qca->hci_ibs_lock,
507 				 flags, SINGLE_DEPTH_NESTING);
508 
509 	/* Don't retransmit the HCI_IBS_WAKE_IND when suspending. */
510 	if (test_bit(QCA_SUSPENDING, &qca->flags)) {
511 		spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
512 		return;
513 	}
514 
515 	switch (qca->tx_ibs_state) {
516 	case HCI_IBS_TX_WAKING:
517 		/* No WAKE_ACK, retransmit WAKE */
518 		retransmit = true;
519 		if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) {
520 			BT_ERR("Failed to acknowledge device wake up");
521 			break;
522 		}
523 		qca->ibs_sent_wakes++;
524 		retrans_delay = msecs_to_jiffies(qca->wake_retrans);
525 		mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay);
526 		break;
527 
528 	case HCI_IBS_TX_ASLEEP:
529 	case HCI_IBS_TX_AWAKE:
530 	default:
531 		BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state);
532 		break;
533 	}
534 
535 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
536 
537 	if (retransmit)
538 		hci_uart_tx_wakeup(hu);
539 }
540 
541 
542 static void qca_controller_memdump_timeout(struct work_struct *work)
543 {
544 	struct qca_data *qca = container_of(work, struct qca_data,
545 					ctrl_memdump_timeout.work);
546 	struct hci_uart *hu = qca->hu;
547 
548 	mutex_lock(&qca->hci_memdump_lock);
549 	if (test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) {
550 		qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
551 		if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) {
552 			/* Inject hw error event to reset the device
553 			 * and driver.
554 			 */
555 			hci_reset_dev(hu->hdev);
556 		}
557 	}
558 
559 	mutex_unlock(&qca->hci_memdump_lock);
560 }
561 
562 
563 /* Initialize protocol */
564 static int qca_open(struct hci_uart *hu)
565 {
566 	struct qca_serdev *qcadev;
567 	struct qca_data *qca;
568 
569 	BT_DBG("hu %p qca_open", hu);
570 
571 	if (!hci_uart_has_flow_control(hu))
572 		return -EOPNOTSUPP;
573 
574 	qca = kzalloc(sizeof(*qca), GFP_KERNEL);
575 	if (!qca)
576 		return -ENOMEM;
577 
578 	skb_queue_head_init(&qca->txq);
579 	skb_queue_head_init(&qca->tx_wait_q);
580 	skb_queue_head_init(&qca->rx_memdump_q);
581 	spin_lock_init(&qca->hci_ibs_lock);
582 	mutex_init(&qca->hci_memdump_lock);
583 	qca->workqueue = alloc_ordered_workqueue("qca_wq", 0);
584 	if (!qca->workqueue) {
585 		BT_ERR("QCA Workqueue not initialized properly");
586 		kfree(qca);
587 		return -ENOMEM;
588 	}
589 
590 	INIT_WORK(&qca->ws_awake_rx, qca_wq_awake_rx);
591 	INIT_WORK(&qca->ws_awake_device, qca_wq_awake_device);
592 	INIT_WORK(&qca->ws_rx_vote_off, qca_wq_serial_rx_clock_vote_off);
593 	INIT_WORK(&qca->ws_tx_vote_off, qca_wq_serial_tx_clock_vote_off);
594 	INIT_WORK(&qca->ctrl_memdump_evt, qca_controller_memdump);
595 	INIT_DELAYED_WORK(&qca->ctrl_memdump_timeout,
596 			  qca_controller_memdump_timeout);
597 	init_waitqueue_head(&qca->suspend_wait_q);
598 
599 	qca->hu = hu;
600 	init_completion(&qca->drop_ev_comp);
601 
602 	/* Assume we start with both sides asleep -- extra wakes OK */
603 	qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
604 	qca->rx_ibs_state = HCI_IBS_RX_ASLEEP;
605 
606 	qca->vote_last_jif = jiffies;
607 
608 	hu->priv = qca;
609 
610 	if (hu->serdev) {
611 		qcadev = serdev_device_get_drvdata(hu->serdev);
612 
613 		switch (qcadev->btsoc_type) {
614 		case QCA_WCN3988:
615 		case QCA_WCN3990:
616 		case QCA_WCN3991:
617 		case QCA_WCN3998:
618 		case QCA_WCN6750:
619 			hu->init_speed = qcadev->init_speed;
620 			break;
621 
622 		default:
623 			break;
624 		}
625 
626 		if (qcadev->oper_speed)
627 			hu->oper_speed = qcadev->oper_speed;
628 	}
629 
630 	timer_setup(&qca->wake_retrans_timer, hci_ibs_wake_retrans_timeout, 0);
631 	qca->wake_retrans = IBS_WAKE_RETRANS_TIMEOUT_MS;
632 
633 	timer_setup(&qca->tx_idle_timer, hci_ibs_tx_idle_timeout, 0);
634 	qca->tx_idle_delay = IBS_HOST_TX_IDLE_TIMEOUT_MS;
635 
636 	BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u",
637 	       qca->tx_idle_delay, qca->wake_retrans);
638 
639 	return 0;
640 }
641 
642 static void qca_debugfs_init(struct hci_dev *hdev)
643 {
644 	struct hci_uart *hu = hci_get_drvdata(hdev);
645 	struct qca_data *qca = hu->priv;
646 	struct dentry *ibs_dir;
647 	umode_t mode;
648 
649 	if (!hdev->debugfs)
650 		return;
651 
652 	if (test_and_set_bit(QCA_DEBUGFS_CREATED, &qca->flags))
653 		return;
654 
655 	ibs_dir = debugfs_create_dir("ibs", hdev->debugfs);
656 
657 	/* read only */
658 	mode = 0444;
659 	debugfs_create_u8("tx_ibs_state", mode, ibs_dir, &qca->tx_ibs_state);
660 	debugfs_create_u8("rx_ibs_state", mode, ibs_dir, &qca->rx_ibs_state);
661 	debugfs_create_u64("ibs_sent_sleeps", mode, ibs_dir,
662 			   &qca->ibs_sent_slps);
663 	debugfs_create_u64("ibs_sent_wakes", mode, ibs_dir,
664 			   &qca->ibs_sent_wakes);
665 	debugfs_create_u64("ibs_sent_wake_acks", mode, ibs_dir,
666 			   &qca->ibs_sent_wacks);
667 	debugfs_create_u64("ibs_recv_sleeps", mode, ibs_dir,
668 			   &qca->ibs_recv_slps);
669 	debugfs_create_u64("ibs_recv_wakes", mode, ibs_dir,
670 			   &qca->ibs_recv_wakes);
671 	debugfs_create_u64("ibs_recv_wake_acks", mode, ibs_dir,
672 			   &qca->ibs_recv_wacks);
673 	debugfs_create_bool("tx_vote", mode, ibs_dir, &qca->tx_vote);
674 	debugfs_create_u64("tx_votes_on", mode, ibs_dir, &qca->tx_votes_on);
675 	debugfs_create_u64("tx_votes_off", mode, ibs_dir, &qca->tx_votes_off);
676 	debugfs_create_bool("rx_vote", mode, ibs_dir, &qca->rx_vote);
677 	debugfs_create_u64("rx_votes_on", mode, ibs_dir, &qca->rx_votes_on);
678 	debugfs_create_u64("rx_votes_off", mode, ibs_dir, &qca->rx_votes_off);
679 	debugfs_create_u64("votes_on", mode, ibs_dir, &qca->votes_on);
680 	debugfs_create_u64("votes_off", mode, ibs_dir, &qca->votes_off);
681 	debugfs_create_u32("vote_on_ms", mode, ibs_dir, &qca->vote_on_ms);
682 	debugfs_create_u32("vote_off_ms", mode, ibs_dir, &qca->vote_off_ms);
683 
684 	/* read/write */
685 	mode = 0644;
686 	debugfs_create_u32("wake_retrans", mode, ibs_dir, &qca->wake_retrans);
687 	debugfs_create_u32("tx_idle_delay", mode, ibs_dir,
688 			   &qca->tx_idle_delay);
689 }
690 
691 /* Flush protocol data */
692 static int qca_flush(struct hci_uart *hu)
693 {
694 	struct qca_data *qca = hu->priv;
695 
696 	BT_DBG("hu %p qca flush", hu);
697 
698 	skb_queue_purge(&qca->tx_wait_q);
699 	skb_queue_purge(&qca->txq);
700 
701 	return 0;
702 }
703 
704 /* Close protocol */
705 static int qca_close(struct hci_uart *hu)
706 {
707 	struct qca_data *qca = hu->priv;
708 
709 	BT_DBG("hu %p qca close", hu);
710 
711 	serial_clock_vote(HCI_IBS_VOTE_STATS_UPDATE, hu);
712 
713 	skb_queue_purge(&qca->tx_wait_q);
714 	skb_queue_purge(&qca->txq);
715 	skb_queue_purge(&qca->rx_memdump_q);
716 	/*
717 	 * Shut the timers down so they can't be rearmed when
718 	 * destroy_workqueue() drains pending work which in turn might try
719 	 * to arm a timer.  After shutdown rearm attempts are silently
720 	 * ignored by the timer core code.
721 	 */
722 	timer_shutdown_sync(&qca->tx_idle_timer);
723 	timer_shutdown_sync(&qca->wake_retrans_timer);
724 	destroy_workqueue(qca->workqueue);
725 	qca->hu = NULL;
726 
727 	kfree_skb(qca->rx_skb);
728 
729 	hu->priv = NULL;
730 
731 	kfree(qca);
732 
733 	return 0;
734 }
735 
736 /* Called upon a wake-up-indication from the device.
737  */
738 static void device_want_to_wakeup(struct hci_uart *hu)
739 {
740 	unsigned long flags;
741 	struct qca_data *qca = hu->priv;
742 
743 	BT_DBG("hu %p want to wake up", hu);
744 
745 	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
746 
747 	qca->ibs_recv_wakes++;
748 
749 	/* Don't wake the rx up when suspending. */
750 	if (test_bit(QCA_SUSPENDING, &qca->flags)) {
751 		spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
752 		return;
753 	}
754 
755 	switch (qca->rx_ibs_state) {
756 	case HCI_IBS_RX_ASLEEP:
757 		/* Make sure clock is on - we may have turned clock off since
758 		 * receiving the wake up indicator awake rx clock.
759 		 */
760 		queue_work(qca->workqueue, &qca->ws_awake_rx);
761 		spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
762 		return;
763 
764 	case HCI_IBS_RX_AWAKE:
765 		/* Always acknowledge device wake up,
766 		 * sending IBS message doesn't count as TX ON.
767 		 */
768 		if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) {
769 			BT_ERR("Failed to acknowledge device wake up");
770 			break;
771 		}
772 		qca->ibs_sent_wacks++;
773 		break;
774 
775 	default:
776 		/* Any other state is illegal */
777 		BT_ERR("Received HCI_IBS_WAKE_IND in rx state %d",
778 		       qca->rx_ibs_state);
779 		break;
780 	}
781 
782 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
783 
784 	/* Actually send the packets */
785 	hci_uart_tx_wakeup(hu);
786 }
787 
788 /* Called upon a sleep-indication from the device.
789  */
790 static void device_want_to_sleep(struct hci_uart *hu)
791 {
792 	unsigned long flags;
793 	struct qca_data *qca = hu->priv;
794 
795 	BT_DBG("hu %p want to sleep in %d state", hu, qca->rx_ibs_state);
796 
797 	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
798 
799 	qca->ibs_recv_slps++;
800 
801 	switch (qca->rx_ibs_state) {
802 	case HCI_IBS_RX_AWAKE:
803 		/* Update state */
804 		qca->rx_ibs_state = HCI_IBS_RX_ASLEEP;
805 		/* Vote off rx clock under workqueue */
806 		queue_work(qca->workqueue, &qca->ws_rx_vote_off);
807 		break;
808 
809 	case HCI_IBS_RX_ASLEEP:
810 		break;
811 
812 	default:
813 		/* Any other state is illegal */
814 		BT_ERR("Received HCI_IBS_SLEEP_IND in rx state %d",
815 		       qca->rx_ibs_state);
816 		break;
817 	}
818 
819 	wake_up_interruptible(&qca->suspend_wait_q);
820 
821 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
822 }
823 
824 /* Called upon wake-up-acknowledgement from the device
825  */
826 static void device_woke_up(struct hci_uart *hu)
827 {
828 	unsigned long flags, idle_delay;
829 	struct qca_data *qca = hu->priv;
830 	struct sk_buff *skb = NULL;
831 
832 	BT_DBG("hu %p woke up", hu);
833 
834 	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
835 
836 	qca->ibs_recv_wacks++;
837 
838 	/* Don't react to the wake-up-acknowledgment when suspending. */
839 	if (test_bit(QCA_SUSPENDING, &qca->flags)) {
840 		spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
841 		return;
842 	}
843 
844 	switch (qca->tx_ibs_state) {
845 	case HCI_IBS_TX_AWAKE:
846 		/* Expect one if we send 2 WAKEs */
847 		BT_DBG("Received HCI_IBS_WAKE_ACK in tx state %d",
848 		       qca->tx_ibs_state);
849 		break;
850 
851 	case HCI_IBS_TX_WAKING:
852 		/* Send pending packets */
853 		while ((skb = skb_dequeue(&qca->tx_wait_q)))
854 			skb_queue_tail(&qca->txq, skb);
855 
856 		/* Switch timers and change state to HCI_IBS_TX_AWAKE */
857 		del_timer(&qca->wake_retrans_timer);
858 		idle_delay = msecs_to_jiffies(qca->tx_idle_delay);
859 		mod_timer(&qca->tx_idle_timer, jiffies + idle_delay);
860 		qca->tx_ibs_state = HCI_IBS_TX_AWAKE;
861 		break;
862 
863 	case HCI_IBS_TX_ASLEEP:
864 	default:
865 		BT_ERR("Received HCI_IBS_WAKE_ACK in tx state %d",
866 		       qca->tx_ibs_state);
867 		break;
868 	}
869 
870 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
871 
872 	/* Actually send the packets */
873 	hci_uart_tx_wakeup(hu);
874 }
875 
876 /* Enqueue frame for transmittion (padding, crc, etc) may be called from
877  * two simultaneous tasklets.
878  */
879 static int qca_enqueue(struct hci_uart *hu, struct sk_buff *skb)
880 {
881 	unsigned long flags = 0, idle_delay;
882 	struct qca_data *qca = hu->priv;
883 
884 	BT_DBG("hu %p qca enq skb %p tx_ibs_state %d", hu, skb,
885 	       qca->tx_ibs_state);
886 
887 	if (test_bit(QCA_SSR_TRIGGERED, &qca->flags)) {
888 		/* As SSR is in progress, ignore the packets */
889 		bt_dev_dbg(hu->hdev, "SSR is in progress");
890 		kfree_skb(skb);
891 		return 0;
892 	}
893 
894 	/* Prepend skb with frame type */
895 	memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1);
896 
897 	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
898 
899 	/* Don't go to sleep in middle of patch download or
900 	 * Out-Of-Band(GPIOs control) sleep is selected.
901 	 * Don't wake the device up when suspending.
902 	 */
903 	if (test_bit(QCA_IBS_DISABLED, &qca->flags) ||
904 	    test_bit(QCA_SUSPENDING, &qca->flags)) {
905 		skb_queue_tail(&qca->txq, skb);
906 		spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
907 		return 0;
908 	}
909 
910 	/* Act according to current state */
911 	switch (qca->tx_ibs_state) {
912 	case HCI_IBS_TX_AWAKE:
913 		BT_DBG("Device awake, sending normally");
914 		skb_queue_tail(&qca->txq, skb);
915 		idle_delay = msecs_to_jiffies(qca->tx_idle_delay);
916 		mod_timer(&qca->tx_idle_timer, jiffies + idle_delay);
917 		break;
918 
919 	case HCI_IBS_TX_ASLEEP:
920 		BT_DBG("Device asleep, waking up and queueing packet");
921 		/* Save packet for later */
922 		skb_queue_tail(&qca->tx_wait_q, skb);
923 
924 		qca->tx_ibs_state = HCI_IBS_TX_WAKING;
925 		/* Schedule a work queue to wake up device */
926 		queue_work(qca->workqueue, &qca->ws_awake_device);
927 		break;
928 
929 	case HCI_IBS_TX_WAKING:
930 		BT_DBG("Device waking up, queueing packet");
931 		/* Transient state; just keep packet for later */
932 		skb_queue_tail(&qca->tx_wait_q, skb);
933 		break;
934 
935 	default:
936 		BT_ERR("Illegal tx state: %d (losing packet)",
937 		       qca->tx_ibs_state);
938 		dev_kfree_skb_irq(skb);
939 		break;
940 	}
941 
942 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
943 
944 	return 0;
945 }
946 
947 static int qca_ibs_sleep_ind(struct hci_dev *hdev, struct sk_buff *skb)
948 {
949 	struct hci_uart *hu = hci_get_drvdata(hdev);
950 
951 	BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_SLEEP_IND);
952 
953 	device_want_to_sleep(hu);
954 
955 	kfree_skb(skb);
956 	return 0;
957 }
958 
959 static int qca_ibs_wake_ind(struct hci_dev *hdev, struct sk_buff *skb)
960 {
961 	struct hci_uart *hu = hci_get_drvdata(hdev);
962 
963 	BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_IND);
964 
965 	device_want_to_wakeup(hu);
966 
967 	kfree_skb(skb);
968 	return 0;
969 }
970 
971 static int qca_ibs_wake_ack(struct hci_dev *hdev, struct sk_buff *skb)
972 {
973 	struct hci_uart *hu = hci_get_drvdata(hdev);
974 
975 	BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_ACK);
976 
977 	device_woke_up(hu);
978 
979 	kfree_skb(skb);
980 	return 0;
981 }
982 
983 static int qca_recv_acl_data(struct hci_dev *hdev, struct sk_buff *skb)
984 {
985 	/* We receive debug logs from chip as an ACL packets.
986 	 * Instead of sending the data to ACL to decode the
987 	 * received data, we are pushing them to the above layers
988 	 * as a diagnostic packet.
989 	 */
990 	if (get_unaligned_le16(skb->data) == QCA_DEBUG_HANDLE)
991 		return hci_recv_diag(hdev, skb);
992 
993 	return hci_recv_frame(hdev, skb);
994 }
995 
996 static void qca_dmp_hdr(struct hci_dev *hdev, struct sk_buff *skb)
997 {
998 	struct hci_uart *hu = hci_get_drvdata(hdev);
999 	struct qca_data *qca = hu->priv;
1000 	char buf[80];
1001 
1002 	snprintf(buf, sizeof(buf), "Controller Name: 0x%x\n",
1003 		qca->controller_id);
1004 	skb_put_data(skb, buf, strlen(buf));
1005 
1006 	snprintf(buf, sizeof(buf), "Firmware Version: 0x%x\n",
1007 		qca->fw_version);
1008 	skb_put_data(skb, buf, strlen(buf));
1009 
1010 	snprintf(buf, sizeof(buf), "Vendor:Qualcomm\n");
1011 	skb_put_data(skb, buf, strlen(buf));
1012 
1013 	snprintf(buf, sizeof(buf), "Driver: %s\n",
1014 		hu->serdev->dev.driver->name);
1015 	skb_put_data(skb, buf, strlen(buf));
1016 }
1017 
1018 static void qca_controller_memdump(struct work_struct *work)
1019 {
1020 	struct qca_data *qca = container_of(work, struct qca_data,
1021 					    ctrl_memdump_evt);
1022 	struct hci_uart *hu = qca->hu;
1023 	struct sk_buff *skb;
1024 	struct qca_memdump_event_hdr *cmd_hdr;
1025 	struct qca_memdump_info *qca_memdump = qca->qca_memdump;
1026 	struct qca_dump_size *dump;
1027 	u16 seq_no;
1028 	u32 rx_size;
1029 	int ret = 0;
1030 	enum qca_btsoc_type soc_type = qca_soc_type(hu);
1031 
1032 	while ((skb = skb_dequeue(&qca->rx_memdump_q))) {
1033 
1034 		mutex_lock(&qca->hci_memdump_lock);
1035 		/* Skip processing the received packets if timeout detected
1036 		 * or memdump collection completed.
1037 		 */
1038 		if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT ||
1039 		    qca->memdump_state == QCA_MEMDUMP_COLLECTED) {
1040 			mutex_unlock(&qca->hci_memdump_lock);
1041 			return;
1042 		}
1043 
1044 		if (!qca_memdump) {
1045 			qca_memdump = kzalloc(sizeof(*qca_memdump), GFP_ATOMIC);
1046 			if (!qca_memdump) {
1047 				mutex_unlock(&qca->hci_memdump_lock);
1048 				return;
1049 			}
1050 
1051 			qca->qca_memdump = qca_memdump;
1052 		}
1053 
1054 		qca->memdump_state = QCA_MEMDUMP_COLLECTING;
1055 		cmd_hdr = (void *) skb->data;
1056 		seq_no = __le16_to_cpu(cmd_hdr->seq_no);
1057 		skb_pull(skb, sizeof(struct qca_memdump_event_hdr));
1058 
1059 		if (!seq_no) {
1060 
1061 			/* This is the first frame of memdump packet from
1062 			 * the controller, Disable IBS to recevie dump
1063 			 * with out any interruption, ideally time required for
1064 			 * the controller to send the dump is 8 seconds. let us
1065 			 * start timer to handle this asynchronous activity.
1066 			 */
1067 			set_bit(QCA_IBS_DISABLED, &qca->flags);
1068 			set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1069 			dump = (void *) skb->data;
1070 			qca_memdump->ram_dump_size = __le32_to_cpu(dump->dump_size);
1071 			if (!(qca_memdump->ram_dump_size)) {
1072 				bt_dev_err(hu->hdev, "Rx invalid memdump size");
1073 				kfree(qca_memdump);
1074 				kfree_skb(skb);
1075 				mutex_unlock(&qca->hci_memdump_lock);
1076 				return;
1077 			}
1078 
1079 			queue_delayed_work(qca->workqueue,
1080 					   &qca->ctrl_memdump_timeout,
1081 					   msecs_to_jiffies(MEMDUMP_TIMEOUT_MS));
1082 			skb_pull(skb, sizeof(qca_memdump->ram_dump_size));
1083 			qca_memdump->current_seq_no = 0;
1084 			qca_memdump->received_dump = 0;
1085 			ret = hci_devcd_init(hu->hdev, qca_memdump->ram_dump_size);
1086 			bt_dev_info(hu->hdev, "hci_devcd_init Return:%d",
1087 				    ret);
1088 			if (ret < 0) {
1089 				kfree(qca->qca_memdump);
1090 				qca->qca_memdump = NULL;
1091 				qca->memdump_state = QCA_MEMDUMP_COLLECTED;
1092 				cancel_delayed_work(&qca->ctrl_memdump_timeout);
1093 				clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1094 				mutex_unlock(&qca->hci_memdump_lock);
1095 				return;
1096 			}
1097 
1098 			bt_dev_info(hu->hdev, "QCA collecting dump of size:%u",
1099 				    qca_memdump->ram_dump_size);
1100 
1101 		}
1102 
1103 		/* If sequence no 0 is missed then there is no point in
1104 		 * accepting the other sequences.
1105 		 */
1106 		if (!test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) {
1107 			bt_dev_err(hu->hdev, "QCA: Discarding other packets");
1108 			kfree(qca_memdump);
1109 			kfree_skb(skb);
1110 			mutex_unlock(&qca->hci_memdump_lock);
1111 			return;
1112 		}
1113 		/* There could be chance of missing some packets from
1114 		 * the controller. In such cases let us store the dummy
1115 		 * packets in the buffer.
1116 		 */
1117 		/* For QCA6390, controller does not lost packets but
1118 		 * sequence number field of packet sometimes has error
1119 		 * bits, so skip this checking for missing packet.
1120 		 */
1121 		while ((seq_no > qca_memdump->current_seq_no + 1) &&
1122 			(soc_type != QCA_QCA6390) &&
1123 			seq_no != QCA_LAST_SEQUENCE_NUM) {
1124 			bt_dev_err(hu->hdev, "QCA controller missed packet:%d",
1125 				   qca_memdump->current_seq_no);
1126 			rx_size = qca_memdump->received_dump;
1127 			rx_size += QCA_DUMP_PACKET_SIZE;
1128 			if (rx_size > qca_memdump->ram_dump_size) {
1129 				bt_dev_err(hu->hdev,
1130 					   "QCA memdump received %d, no space for missed packet",
1131 					   qca_memdump->received_dump);
1132 				break;
1133 			}
1134 			hci_devcd_append_pattern(hu->hdev, 0x00,
1135 				QCA_DUMP_PACKET_SIZE);
1136 			qca_memdump->received_dump += QCA_DUMP_PACKET_SIZE;
1137 			qca_memdump->current_seq_no++;
1138 		}
1139 
1140 		rx_size = qca_memdump->received_dump  + skb->len;
1141 		if (rx_size <= qca_memdump->ram_dump_size) {
1142 			if ((seq_no != QCA_LAST_SEQUENCE_NUM) &&
1143 			    (seq_no != qca_memdump->current_seq_no)) {
1144 				bt_dev_err(hu->hdev,
1145 					   "QCA memdump unexpected packet %d",
1146 					   seq_no);
1147 			}
1148 			bt_dev_dbg(hu->hdev,
1149 				   "QCA memdump packet %d with length %d",
1150 				   seq_no, skb->len);
1151 			hci_devcd_append(hu->hdev, skb);
1152 			qca_memdump->current_seq_no += 1;
1153 			qca_memdump->received_dump = rx_size;
1154 		} else {
1155 			bt_dev_err(hu->hdev,
1156 				   "QCA memdump received no space for packet %d",
1157 				    qca_memdump->current_seq_no);
1158 		}
1159 
1160 		if (seq_no == QCA_LAST_SEQUENCE_NUM) {
1161 			bt_dev_info(hu->hdev,
1162 				"QCA memdump Done, received %d, total %d",
1163 				qca_memdump->received_dump,
1164 				qca_memdump->ram_dump_size);
1165 			hci_devcd_complete(hu->hdev);
1166 			cancel_delayed_work(&qca->ctrl_memdump_timeout);
1167 			kfree(qca->qca_memdump);
1168 			qca->qca_memdump = NULL;
1169 			qca->memdump_state = QCA_MEMDUMP_COLLECTED;
1170 			clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1171 		}
1172 
1173 		mutex_unlock(&qca->hci_memdump_lock);
1174 	}
1175 
1176 }
1177 
1178 static int qca_controller_memdump_event(struct hci_dev *hdev,
1179 					struct sk_buff *skb)
1180 {
1181 	struct hci_uart *hu = hci_get_drvdata(hdev);
1182 	struct qca_data *qca = hu->priv;
1183 
1184 	set_bit(QCA_SSR_TRIGGERED, &qca->flags);
1185 	skb_queue_tail(&qca->rx_memdump_q, skb);
1186 	queue_work(qca->workqueue, &qca->ctrl_memdump_evt);
1187 
1188 	return 0;
1189 }
1190 
1191 static int qca_recv_event(struct hci_dev *hdev, struct sk_buff *skb)
1192 {
1193 	struct hci_uart *hu = hci_get_drvdata(hdev);
1194 	struct qca_data *qca = hu->priv;
1195 
1196 	if (test_bit(QCA_DROP_VENDOR_EVENT, &qca->flags)) {
1197 		struct hci_event_hdr *hdr = (void *)skb->data;
1198 
1199 		/* For the WCN3990 the vendor command for a baudrate change
1200 		 * isn't sent as synchronous HCI command, because the
1201 		 * controller sends the corresponding vendor event with the
1202 		 * new baudrate. The event is received and properly decoded
1203 		 * after changing the baudrate of the host port. It needs to
1204 		 * be dropped, otherwise it can be misinterpreted as
1205 		 * response to a later firmware download command (also a
1206 		 * vendor command).
1207 		 */
1208 
1209 		if (hdr->evt == HCI_EV_VENDOR)
1210 			complete(&qca->drop_ev_comp);
1211 
1212 		kfree_skb(skb);
1213 
1214 		return 0;
1215 	}
1216 	/* We receive chip memory dump as an event packet, With a dedicated
1217 	 * handler followed by a hardware error event. When this event is
1218 	 * received we store dump into a file before closing hci. This
1219 	 * dump will help in triaging the issues.
1220 	 */
1221 	if ((skb->data[0] == HCI_VENDOR_PKT) &&
1222 	    (get_unaligned_be16(skb->data + 2) == QCA_SSR_DUMP_HANDLE))
1223 		return qca_controller_memdump_event(hdev, skb);
1224 
1225 	return hci_recv_frame(hdev, skb);
1226 }
1227 
1228 #define QCA_IBS_SLEEP_IND_EVENT \
1229 	.type = HCI_IBS_SLEEP_IND, \
1230 	.hlen = 0, \
1231 	.loff = 0, \
1232 	.lsize = 0, \
1233 	.maxlen = HCI_MAX_IBS_SIZE
1234 
1235 #define QCA_IBS_WAKE_IND_EVENT \
1236 	.type = HCI_IBS_WAKE_IND, \
1237 	.hlen = 0, \
1238 	.loff = 0, \
1239 	.lsize = 0, \
1240 	.maxlen = HCI_MAX_IBS_SIZE
1241 
1242 #define QCA_IBS_WAKE_ACK_EVENT \
1243 	.type = HCI_IBS_WAKE_ACK, \
1244 	.hlen = 0, \
1245 	.loff = 0, \
1246 	.lsize = 0, \
1247 	.maxlen = HCI_MAX_IBS_SIZE
1248 
1249 static const struct h4_recv_pkt qca_recv_pkts[] = {
1250 	{ H4_RECV_ACL,             .recv = qca_recv_acl_data },
1251 	{ H4_RECV_SCO,             .recv = hci_recv_frame    },
1252 	{ H4_RECV_EVENT,           .recv = qca_recv_event    },
1253 	{ QCA_IBS_WAKE_IND_EVENT,  .recv = qca_ibs_wake_ind  },
1254 	{ QCA_IBS_WAKE_ACK_EVENT,  .recv = qca_ibs_wake_ack  },
1255 	{ QCA_IBS_SLEEP_IND_EVENT, .recv = qca_ibs_sleep_ind },
1256 };
1257 
1258 static int qca_recv(struct hci_uart *hu, const void *data, int count)
1259 {
1260 	struct qca_data *qca = hu->priv;
1261 
1262 	if (!test_bit(HCI_UART_REGISTERED, &hu->flags))
1263 		return -EUNATCH;
1264 
1265 	qca->rx_skb = h4_recv_buf(hu->hdev, qca->rx_skb, data, count,
1266 				  qca_recv_pkts, ARRAY_SIZE(qca_recv_pkts));
1267 	if (IS_ERR(qca->rx_skb)) {
1268 		int err = PTR_ERR(qca->rx_skb);
1269 		bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err);
1270 		qca->rx_skb = NULL;
1271 		return err;
1272 	}
1273 
1274 	return count;
1275 }
1276 
1277 static struct sk_buff *qca_dequeue(struct hci_uart *hu)
1278 {
1279 	struct qca_data *qca = hu->priv;
1280 
1281 	return skb_dequeue(&qca->txq);
1282 }
1283 
1284 static uint8_t qca_get_baudrate_value(int speed)
1285 {
1286 	switch (speed) {
1287 	case 9600:
1288 		return QCA_BAUDRATE_9600;
1289 	case 19200:
1290 		return QCA_BAUDRATE_19200;
1291 	case 38400:
1292 		return QCA_BAUDRATE_38400;
1293 	case 57600:
1294 		return QCA_BAUDRATE_57600;
1295 	case 115200:
1296 		return QCA_BAUDRATE_115200;
1297 	case 230400:
1298 		return QCA_BAUDRATE_230400;
1299 	case 460800:
1300 		return QCA_BAUDRATE_460800;
1301 	case 500000:
1302 		return QCA_BAUDRATE_500000;
1303 	case 921600:
1304 		return QCA_BAUDRATE_921600;
1305 	case 1000000:
1306 		return QCA_BAUDRATE_1000000;
1307 	case 2000000:
1308 		return QCA_BAUDRATE_2000000;
1309 	case 3000000:
1310 		return QCA_BAUDRATE_3000000;
1311 	case 3200000:
1312 		return QCA_BAUDRATE_3200000;
1313 	case 3500000:
1314 		return QCA_BAUDRATE_3500000;
1315 	default:
1316 		return QCA_BAUDRATE_115200;
1317 	}
1318 }
1319 
1320 static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate)
1321 {
1322 	struct hci_uart *hu = hci_get_drvdata(hdev);
1323 	struct qca_data *qca = hu->priv;
1324 	struct sk_buff *skb;
1325 	u8 cmd[] = { 0x01, 0x48, 0xFC, 0x01, 0x00 };
1326 
1327 	if (baudrate > QCA_BAUDRATE_3200000)
1328 		return -EINVAL;
1329 
1330 	cmd[4] = baudrate;
1331 
1332 	skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL);
1333 	if (!skb) {
1334 		bt_dev_err(hdev, "Failed to allocate baudrate packet");
1335 		return -ENOMEM;
1336 	}
1337 
1338 	/* Assign commands to change baudrate and packet type. */
1339 	skb_put_data(skb, cmd, sizeof(cmd));
1340 	hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
1341 
1342 	skb_queue_tail(&qca->txq, skb);
1343 	hci_uart_tx_wakeup(hu);
1344 
1345 	/* Wait for the baudrate change request to be sent */
1346 
1347 	while (!skb_queue_empty(&qca->txq))
1348 		usleep_range(100, 200);
1349 
1350 	if (hu->serdev)
1351 		serdev_device_wait_until_sent(hu->serdev,
1352 		      msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS));
1353 
1354 	/* Give the controller time to process the request */
1355 	switch (qca_soc_type(hu)) {
1356 	case QCA_WCN3988:
1357 	case QCA_WCN3990:
1358 	case QCA_WCN3991:
1359 	case QCA_WCN3998:
1360 	case QCA_WCN6750:
1361 	case QCA_WCN6855:
1362 	case QCA_WCN7850:
1363 		usleep_range(1000, 10000);
1364 		break;
1365 
1366 	default:
1367 		msleep(300);
1368 	}
1369 
1370 	return 0;
1371 }
1372 
1373 static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed)
1374 {
1375 	if (hu->serdev)
1376 		serdev_device_set_baudrate(hu->serdev, speed);
1377 	else
1378 		hci_uart_set_baudrate(hu, speed);
1379 }
1380 
1381 static int qca_send_power_pulse(struct hci_uart *hu, bool on)
1382 {
1383 	int ret;
1384 	int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS);
1385 	u8 cmd = on ? QCA_WCN3990_POWERON_PULSE : QCA_WCN3990_POWEROFF_PULSE;
1386 
1387 	/* These power pulses are single byte command which are sent
1388 	 * at required baudrate to wcn3990. On wcn3990, we have an external
1389 	 * circuit at Tx pin which decodes the pulse sent at specific baudrate.
1390 	 * For example, wcn3990 supports RF COEX antenna for both Wi-Fi/BT
1391 	 * and also we use the same power inputs to turn on and off for
1392 	 * Wi-Fi/BT. Powering up the power sources will not enable BT, until
1393 	 * we send a power on pulse at 115200 bps. This algorithm will help to
1394 	 * save power. Disabling hardware flow control is mandatory while
1395 	 * sending power pulses to SoC.
1396 	 */
1397 	bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd);
1398 
1399 	serdev_device_write_flush(hu->serdev);
1400 	hci_uart_set_flow_control(hu, true);
1401 	ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd));
1402 	if (ret < 0) {
1403 		bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd);
1404 		return ret;
1405 	}
1406 
1407 	serdev_device_wait_until_sent(hu->serdev, timeout);
1408 	hci_uart_set_flow_control(hu, false);
1409 
1410 	/* Give to controller time to boot/shutdown */
1411 	if (on)
1412 		msleep(100);
1413 	else
1414 		usleep_range(1000, 10000);
1415 
1416 	return 0;
1417 }
1418 
1419 static unsigned int qca_get_speed(struct hci_uart *hu,
1420 				  enum qca_speed_type speed_type)
1421 {
1422 	unsigned int speed = 0;
1423 
1424 	if (speed_type == QCA_INIT_SPEED) {
1425 		if (hu->init_speed)
1426 			speed = hu->init_speed;
1427 		else if (hu->proto->init_speed)
1428 			speed = hu->proto->init_speed;
1429 	} else {
1430 		if (hu->oper_speed)
1431 			speed = hu->oper_speed;
1432 		else if (hu->proto->oper_speed)
1433 			speed = hu->proto->oper_speed;
1434 	}
1435 
1436 	return speed;
1437 }
1438 
1439 static int qca_check_speeds(struct hci_uart *hu)
1440 {
1441 	switch (qca_soc_type(hu)) {
1442 	case QCA_WCN3988:
1443 	case QCA_WCN3990:
1444 	case QCA_WCN3991:
1445 	case QCA_WCN3998:
1446 	case QCA_WCN6750:
1447 	case QCA_WCN6855:
1448 	case QCA_WCN7850:
1449 		if (!qca_get_speed(hu, QCA_INIT_SPEED) &&
1450 		    !qca_get_speed(hu, QCA_OPER_SPEED))
1451 			return -EINVAL;
1452 		break;
1453 
1454 	default:
1455 		if (!qca_get_speed(hu, QCA_INIT_SPEED) ||
1456 		    !qca_get_speed(hu, QCA_OPER_SPEED))
1457 			return -EINVAL;
1458 	}
1459 
1460 	return 0;
1461 }
1462 
1463 static int qca_set_speed(struct hci_uart *hu, enum qca_speed_type speed_type)
1464 {
1465 	unsigned int speed, qca_baudrate;
1466 	struct qca_data *qca = hu->priv;
1467 	int ret = 0;
1468 
1469 	if (speed_type == QCA_INIT_SPEED) {
1470 		speed = qca_get_speed(hu, QCA_INIT_SPEED);
1471 		if (speed)
1472 			host_set_baudrate(hu, speed);
1473 	} else {
1474 		enum qca_btsoc_type soc_type = qca_soc_type(hu);
1475 
1476 		speed = qca_get_speed(hu, QCA_OPER_SPEED);
1477 		if (!speed)
1478 			return 0;
1479 
1480 		/* Disable flow control for wcn3990 to deassert RTS while
1481 		 * changing the baudrate of chip and host.
1482 		 */
1483 		switch (soc_type) {
1484 		case QCA_WCN3988:
1485 		case QCA_WCN3990:
1486 		case QCA_WCN3991:
1487 		case QCA_WCN3998:
1488 		case QCA_WCN6750:
1489 		case QCA_WCN6855:
1490 		case QCA_WCN7850:
1491 			hci_uart_set_flow_control(hu, true);
1492 			break;
1493 
1494 		default:
1495 			break;
1496 		}
1497 
1498 		switch (soc_type) {
1499 		case QCA_WCN3990:
1500 			reinit_completion(&qca->drop_ev_comp);
1501 			set_bit(QCA_DROP_VENDOR_EVENT, &qca->flags);
1502 			break;
1503 
1504 		default:
1505 			break;
1506 		}
1507 
1508 		qca_baudrate = qca_get_baudrate_value(speed);
1509 		bt_dev_dbg(hu->hdev, "Set UART speed to %d", speed);
1510 		ret = qca_set_baudrate(hu->hdev, qca_baudrate);
1511 		if (ret)
1512 			goto error;
1513 
1514 		host_set_baudrate(hu, speed);
1515 
1516 error:
1517 		switch (soc_type) {
1518 		case QCA_WCN3988:
1519 		case QCA_WCN3990:
1520 		case QCA_WCN3991:
1521 		case QCA_WCN3998:
1522 		case QCA_WCN6750:
1523 		case QCA_WCN6855:
1524 		case QCA_WCN7850:
1525 			hci_uart_set_flow_control(hu, false);
1526 			break;
1527 
1528 		default:
1529 			break;
1530 		}
1531 
1532 		switch (soc_type) {
1533 		case QCA_WCN3990:
1534 			/* Wait for the controller to send the vendor event
1535 			 * for the baudrate change command.
1536 			 */
1537 			if (!wait_for_completion_timeout(&qca->drop_ev_comp,
1538 						 msecs_to_jiffies(100))) {
1539 				bt_dev_err(hu->hdev,
1540 					   "Failed to change controller baudrate\n");
1541 				ret = -ETIMEDOUT;
1542 			}
1543 
1544 			clear_bit(QCA_DROP_VENDOR_EVENT, &qca->flags);
1545 			break;
1546 
1547 		default:
1548 			break;
1549 		}
1550 	}
1551 
1552 	return ret;
1553 }
1554 
1555 static int qca_send_crashbuffer(struct hci_uart *hu)
1556 {
1557 	struct qca_data *qca = hu->priv;
1558 	struct sk_buff *skb;
1559 
1560 	skb = bt_skb_alloc(QCA_CRASHBYTE_PACKET_LEN, GFP_KERNEL);
1561 	if (!skb) {
1562 		bt_dev_err(hu->hdev, "Failed to allocate memory for skb packet");
1563 		return -ENOMEM;
1564 	}
1565 
1566 	/* We forcefully crash the controller, by sending 0xfb byte for
1567 	 * 1024 times. We also might have chance of losing data, To be
1568 	 * on safer side we send 1096 bytes to the SoC.
1569 	 */
1570 	memset(skb_put(skb, QCA_CRASHBYTE_PACKET_LEN), QCA_MEMDUMP_BYTE,
1571 	       QCA_CRASHBYTE_PACKET_LEN);
1572 	hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
1573 	bt_dev_info(hu->hdev, "crash the soc to collect controller dump");
1574 	skb_queue_tail(&qca->txq, skb);
1575 	hci_uart_tx_wakeup(hu);
1576 
1577 	return 0;
1578 }
1579 
1580 static void qca_wait_for_dump_collection(struct hci_dev *hdev)
1581 {
1582 	struct hci_uart *hu = hci_get_drvdata(hdev);
1583 	struct qca_data *qca = hu->priv;
1584 
1585 	wait_on_bit_timeout(&qca->flags, QCA_MEMDUMP_COLLECTION,
1586 			    TASK_UNINTERRUPTIBLE, MEMDUMP_TIMEOUT_MS);
1587 
1588 	clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1589 }
1590 
1591 static void qca_hw_error(struct hci_dev *hdev, u8 code)
1592 {
1593 	struct hci_uart *hu = hci_get_drvdata(hdev);
1594 	struct qca_data *qca = hu->priv;
1595 
1596 	set_bit(QCA_SSR_TRIGGERED, &qca->flags);
1597 	set_bit(QCA_HW_ERROR_EVENT, &qca->flags);
1598 	bt_dev_info(hdev, "mem_dump_status: %d", qca->memdump_state);
1599 
1600 	if (qca->memdump_state == QCA_MEMDUMP_IDLE) {
1601 		/* If hardware error event received for other than QCA
1602 		 * soc memory dump event, then we need to crash the SOC
1603 		 * and wait here for 8 seconds to get the dump packets.
1604 		 * This will block main thread to be on hold until we
1605 		 * collect dump.
1606 		 */
1607 		set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1608 		qca_send_crashbuffer(hu);
1609 		qca_wait_for_dump_collection(hdev);
1610 	} else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) {
1611 		/* Let us wait here until memory dump collected or
1612 		 * memory dump timer expired.
1613 		 */
1614 		bt_dev_info(hdev, "waiting for dump to complete");
1615 		qca_wait_for_dump_collection(hdev);
1616 	}
1617 
1618 	mutex_lock(&qca->hci_memdump_lock);
1619 	if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) {
1620 		bt_dev_err(hu->hdev, "clearing allocated memory due to memdump timeout");
1621 		hci_devcd_abort(hu->hdev);
1622 		if (qca->qca_memdump) {
1623 			kfree(qca->qca_memdump);
1624 			qca->qca_memdump = NULL;
1625 		}
1626 		qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
1627 		cancel_delayed_work(&qca->ctrl_memdump_timeout);
1628 	}
1629 	mutex_unlock(&qca->hci_memdump_lock);
1630 
1631 	if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT ||
1632 	    qca->memdump_state == QCA_MEMDUMP_COLLECTED) {
1633 		cancel_work_sync(&qca->ctrl_memdump_evt);
1634 		skb_queue_purge(&qca->rx_memdump_q);
1635 	}
1636 
1637 	clear_bit(QCA_HW_ERROR_EVENT, &qca->flags);
1638 }
1639 
1640 static void qca_cmd_timeout(struct hci_dev *hdev)
1641 {
1642 	struct hci_uart *hu = hci_get_drvdata(hdev);
1643 	struct qca_data *qca = hu->priv;
1644 
1645 	set_bit(QCA_SSR_TRIGGERED, &qca->flags);
1646 	if (qca->memdump_state == QCA_MEMDUMP_IDLE) {
1647 		set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1648 		qca_send_crashbuffer(hu);
1649 		qca_wait_for_dump_collection(hdev);
1650 	} else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) {
1651 		/* Let us wait here until memory dump collected or
1652 		 * memory dump timer expired.
1653 		 */
1654 		bt_dev_info(hdev, "waiting for dump to complete");
1655 		qca_wait_for_dump_collection(hdev);
1656 	}
1657 
1658 	mutex_lock(&qca->hci_memdump_lock);
1659 	if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) {
1660 		qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
1661 		if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) {
1662 			/* Inject hw error event to reset the device
1663 			 * and driver.
1664 			 */
1665 			hci_reset_dev(hu->hdev);
1666 		}
1667 	}
1668 	mutex_unlock(&qca->hci_memdump_lock);
1669 }
1670 
1671 static bool qca_wakeup(struct hci_dev *hdev)
1672 {
1673 	struct hci_uart *hu = hci_get_drvdata(hdev);
1674 	bool wakeup;
1675 
1676 	if (!hu->serdev)
1677 		return true;
1678 
1679 	/* BT SoC attached through the serial bus is handled by the serdev driver.
1680 	 * So we need to use the device handle of the serdev driver to get the
1681 	 * status of device may wakeup.
1682 	 */
1683 	wakeup = device_may_wakeup(&hu->serdev->ctrl->dev);
1684 	bt_dev_dbg(hu->hdev, "wakeup status : %d", wakeup);
1685 
1686 	return wakeup;
1687 }
1688 
1689 static int qca_port_reopen(struct hci_uart *hu)
1690 {
1691 	int ret;
1692 
1693 	/* Now the device is in ready state to communicate with host.
1694 	 * To sync host with device we need to reopen port.
1695 	 * Without this, we will have RTS and CTS synchronization
1696 	 * issues.
1697 	 */
1698 	serdev_device_close(hu->serdev);
1699 	ret = serdev_device_open(hu->serdev);
1700 	if (ret) {
1701 		bt_dev_err(hu->hdev, "failed to open port");
1702 		return ret;
1703 	}
1704 
1705 	hci_uart_set_flow_control(hu, false);
1706 
1707 	return 0;
1708 }
1709 
1710 static int qca_regulator_init(struct hci_uart *hu)
1711 {
1712 	enum qca_btsoc_type soc_type = qca_soc_type(hu);
1713 	struct qca_serdev *qcadev;
1714 	int ret;
1715 	bool sw_ctrl_state;
1716 
1717 	/* Check for vregs status, may be hci down has turned
1718 	 * off the voltage regulator.
1719 	 */
1720 	qcadev = serdev_device_get_drvdata(hu->serdev);
1721 
1722 	if (!qcadev->bt_power->vregs_on) {
1723 		serdev_device_close(hu->serdev);
1724 		ret = qca_regulator_enable(qcadev);
1725 		if (ret)
1726 			return ret;
1727 
1728 		ret = serdev_device_open(hu->serdev);
1729 		if (ret) {
1730 			bt_dev_err(hu->hdev, "failed to open port");
1731 			return ret;
1732 		}
1733 	}
1734 
1735 	switch (soc_type) {
1736 	case QCA_WCN3988:
1737 	case QCA_WCN3990:
1738 	case QCA_WCN3991:
1739 	case QCA_WCN3998:
1740 		/* Forcefully enable wcn399x to enter in to boot mode. */
1741 		host_set_baudrate(hu, 2400);
1742 		ret = qca_send_power_pulse(hu, false);
1743 		if (ret)
1744 			return ret;
1745 		break;
1746 
1747 	default:
1748 		break;
1749 	}
1750 
1751 	/* For wcn6750 need to enable gpio bt_en */
1752 	if (qcadev->bt_en) {
1753 		gpiod_set_value_cansleep(qcadev->bt_en, 0);
1754 		msleep(50);
1755 		gpiod_set_value_cansleep(qcadev->bt_en, 1);
1756 		msleep(50);
1757 		if (qcadev->sw_ctrl) {
1758 			sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl);
1759 			bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state);
1760 		}
1761 	}
1762 
1763 	qca_set_speed(hu, QCA_INIT_SPEED);
1764 
1765 	switch (soc_type) {
1766 	case QCA_WCN3988:
1767 	case QCA_WCN3990:
1768 	case QCA_WCN3991:
1769 	case QCA_WCN3998:
1770 		ret = qca_send_power_pulse(hu, true);
1771 		if (ret)
1772 			return ret;
1773 		break;
1774 
1775 	default:
1776 		break;
1777 	}
1778 
1779 	return qca_port_reopen(hu);
1780 }
1781 
1782 static int qca_power_on(struct hci_dev *hdev)
1783 {
1784 	struct hci_uart *hu = hci_get_drvdata(hdev);
1785 	enum qca_btsoc_type soc_type = qca_soc_type(hu);
1786 	struct qca_serdev *qcadev;
1787 	struct qca_data *qca = hu->priv;
1788 	int ret = 0;
1789 
1790 	/* Non-serdev device usually is powered by external power
1791 	 * and don't need additional action in driver for power on
1792 	 */
1793 	if (!hu->serdev)
1794 		return 0;
1795 
1796 	switch (soc_type) {
1797 	case QCA_WCN3988:
1798 	case QCA_WCN3990:
1799 	case QCA_WCN3991:
1800 	case QCA_WCN3998:
1801 	case QCA_WCN6750:
1802 	case QCA_WCN6855:
1803 	case QCA_WCN7850:
1804 	case QCA_QCA6390:
1805 		ret = qca_regulator_init(hu);
1806 		break;
1807 
1808 	default:
1809 		qcadev = serdev_device_get_drvdata(hu->serdev);
1810 		if (qcadev->bt_en) {
1811 			gpiod_set_value_cansleep(qcadev->bt_en, 1);
1812 			/* Controller needs time to bootup. */
1813 			msleep(150);
1814 		}
1815 	}
1816 
1817 	clear_bit(QCA_BT_OFF, &qca->flags);
1818 	return ret;
1819 }
1820 
1821 static void hci_coredump_qca(struct hci_dev *hdev)
1822 {
1823 	int err;
1824 	static const u8 param[] = { 0x26 };
1825 
1826 	err = __hci_cmd_send(hdev, 0xfc0c, 1, param);
1827 	if (err < 0)
1828 		bt_dev_err(hdev, "%s: trigger crash failed (%d)", __func__, err);
1829 }
1830 
1831 static int qca_get_data_path_id(struct hci_dev *hdev, __u8 *data_path_id)
1832 {
1833 	/* QCA uses 1 as non-HCI data path id for HFP */
1834 	*data_path_id = 1;
1835 	return 0;
1836 }
1837 
1838 static int qca_configure_hfp_offload(struct hci_dev *hdev)
1839 {
1840 	bt_dev_info(hdev, "HFP non-HCI data transport is supported");
1841 	hdev->get_data_path_id = qca_get_data_path_id;
1842 	/* Do not need to send HCI_Configure_Data_Path to configure non-HCI
1843 	 * data transport path for QCA controllers, so set below field as NULL.
1844 	 */
1845 	hdev->get_codec_config_data = NULL;
1846 	return 0;
1847 }
1848 
1849 static int qca_setup(struct hci_uart *hu)
1850 {
1851 	struct hci_dev *hdev = hu->hdev;
1852 	struct qca_data *qca = hu->priv;
1853 	unsigned int speed, qca_baudrate = QCA_BAUDRATE_115200;
1854 	unsigned int retries = 0;
1855 	enum qca_btsoc_type soc_type = qca_soc_type(hu);
1856 	const char *firmware_name = qca_get_firmware_name(hu);
1857 	int ret;
1858 	struct qca_btsoc_version ver;
1859 	struct qca_serdev *qcadev;
1860 	const char *soc_name;
1861 
1862 	ret = qca_check_speeds(hu);
1863 	if (ret)
1864 		return ret;
1865 
1866 	clear_bit(QCA_ROM_FW, &qca->flags);
1867 	/* Patch downloading has to be done without IBS mode */
1868 	set_bit(QCA_IBS_DISABLED, &qca->flags);
1869 
1870 	/* Enable controller to do both LE scan and BR/EDR inquiry
1871 	 * simultaneously.
1872 	 */
1873 	set_bit(HCI_QUIRK_SIMULTANEOUS_DISCOVERY, &hdev->quirks);
1874 
1875 	switch (soc_type) {
1876 	case QCA_QCA2066:
1877 		soc_name = "qca2066";
1878 		break;
1879 
1880 	case QCA_WCN3988:
1881 	case QCA_WCN3990:
1882 	case QCA_WCN3991:
1883 	case QCA_WCN3998:
1884 		soc_name = "wcn399x";
1885 		break;
1886 
1887 	case QCA_WCN6750:
1888 		soc_name = "wcn6750";
1889 		break;
1890 
1891 	case QCA_WCN6855:
1892 		soc_name = "wcn6855";
1893 		break;
1894 
1895 	case QCA_WCN7850:
1896 		soc_name = "wcn7850";
1897 		break;
1898 
1899 	default:
1900 		soc_name = "ROME/QCA6390";
1901 	}
1902 	bt_dev_info(hdev, "setting up %s", soc_name);
1903 
1904 	qca->memdump_state = QCA_MEMDUMP_IDLE;
1905 
1906 retry:
1907 	ret = qca_power_on(hdev);
1908 	if (ret)
1909 		goto out;
1910 
1911 	clear_bit(QCA_SSR_TRIGGERED, &qca->flags);
1912 
1913 	switch (soc_type) {
1914 	case QCA_WCN3988:
1915 	case QCA_WCN3990:
1916 	case QCA_WCN3991:
1917 	case QCA_WCN3998:
1918 	case QCA_WCN6750:
1919 	case QCA_WCN6855:
1920 	case QCA_WCN7850:
1921 		qcadev = serdev_device_get_drvdata(hu->serdev);
1922 		if (qcadev->bdaddr_property_broken)
1923 			set_bit(HCI_QUIRK_BDADDR_PROPERTY_BROKEN, &hdev->quirks);
1924 
1925 		hci_set_aosp_capable(hdev);
1926 
1927 		ret = qca_read_soc_version(hdev, &ver, soc_type);
1928 		if (ret)
1929 			goto out;
1930 		break;
1931 
1932 	default:
1933 		qca_set_speed(hu, QCA_INIT_SPEED);
1934 	}
1935 
1936 	/* Setup user speed if needed */
1937 	speed = qca_get_speed(hu, QCA_OPER_SPEED);
1938 	if (speed) {
1939 		ret = qca_set_speed(hu, QCA_OPER_SPEED);
1940 		if (ret)
1941 			goto out;
1942 
1943 		qca_baudrate = qca_get_baudrate_value(speed);
1944 	}
1945 
1946 	switch (soc_type) {
1947 	case QCA_WCN3988:
1948 	case QCA_WCN3990:
1949 	case QCA_WCN3991:
1950 	case QCA_WCN3998:
1951 	case QCA_WCN6750:
1952 	case QCA_WCN6855:
1953 	case QCA_WCN7850:
1954 		break;
1955 
1956 	default:
1957 		/* Get QCA version information */
1958 		ret = qca_read_soc_version(hdev, &ver, soc_type);
1959 		if (ret)
1960 			goto out;
1961 	}
1962 
1963 	/* Setup patch / NVM configurations */
1964 	ret = qca_uart_setup(hdev, qca_baudrate, soc_type, ver,
1965 			firmware_name);
1966 	if (!ret) {
1967 		clear_bit(QCA_IBS_DISABLED, &qca->flags);
1968 		qca_debugfs_init(hdev);
1969 		hu->hdev->hw_error = qca_hw_error;
1970 		hu->hdev->cmd_timeout = qca_cmd_timeout;
1971 		if (hu->serdev) {
1972 			if (device_can_wakeup(hu->serdev->ctrl->dev.parent))
1973 				hu->hdev->wakeup = qca_wakeup;
1974 		}
1975 	} else if (ret == -ENOENT) {
1976 		/* No patch/nvm-config found, run with original fw/config */
1977 		set_bit(QCA_ROM_FW, &qca->flags);
1978 		ret = 0;
1979 	} else if (ret == -EAGAIN) {
1980 		/*
1981 		 * Userspace firmware loader will return -EAGAIN in case no
1982 		 * patch/nvm-config is found, so run with original fw/config.
1983 		 */
1984 		set_bit(QCA_ROM_FW, &qca->flags);
1985 		ret = 0;
1986 	}
1987 
1988 out:
1989 	if (ret && retries < MAX_INIT_RETRIES) {
1990 		bt_dev_warn(hdev, "Retry BT power ON:%d", retries);
1991 		qca_power_shutdown(hu);
1992 		if (hu->serdev) {
1993 			serdev_device_close(hu->serdev);
1994 			ret = serdev_device_open(hu->serdev);
1995 			if (ret) {
1996 				bt_dev_err(hdev, "failed to open port");
1997 				return ret;
1998 			}
1999 		}
2000 		retries++;
2001 		goto retry;
2002 	}
2003 
2004 	/* Setup bdaddr */
2005 	if (soc_type == QCA_ROME)
2006 		hu->hdev->set_bdaddr = qca_set_bdaddr_rome;
2007 	else
2008 		hu->hdev->set_bdaddr = qca_set_bdaddr;
2009 
2010 	if (soc_type == QCA_QCA2066)
2011 		qca_configure_hfp_offload(hdev);
2012 
2013 	qca->fw_version = le16_to_cpu(ver.patch_ver);
2014 	qca->controller_id = le16_to_cpu(ver.rom_ver);
2015 	hci_devcd_register(hdev, hci_coredump_qca, qca_dmp_hdr, NULL);
2016 
2017 	return ret;
2018 }
2019 
2020 static const struct hci_uart_proto qca_proto = {
2021 	.id		= HCI_UART_QCA,
2022 	.name		= "QCA",
2023 	.manufacturer	= 29,
2024 	.init_speed	= 115200,
2025 	.oper_speed	= 3000000,
2026 	.open		= qca_open,
2027 	.close		= qca_close,
2028 	.flush		= qca_flush,
2029 	.setup		= qca_setup,
2030 	.recv		= qca_recv,
2031 	.enqueue	= qca_enqueue,
2032 	.dequeue	= qca_dequeue,
2033 };
2034 
2035 static const struct qca_device_data qca_soc_data_wcn3988 __maybe_unused = {
2036 	.soc_type = QCA_WCN3988,
2037 	.vregs = (struct qca_vreg []) {
2038 		{ "vddio", 15000  },
2039 		{ "vddxo", 80000  },
2040 		{ "vddrf", 300000 },
2041 		{ "vddch0", 450000 },
2042 	},
2043 	.num_vregs = 4,
2044 };
2045 
2046 static const struct qca_device_data qca_soc_data_wcn3990 __maybe_unused = {
2047 	.soc_type = QCA_WCN3990,
2048 	.vregs = (struct qca_vreg []) {
2049 		{ "vddio", 15000  },
2050 		{ "vddxo", 80000  },
2051 		{ "vddrf", 300000 },
2052 		{ "vddch0", 450000 },
2053 	},
2054 	.num_vregs = 4,
2055 };
2056 
2057 static const struct qca_device_data qca_soc_data_wcn3991 __maybe_unused = {
2058 	.soc_type = QCA_WCN3991,
2059 	.vregs = (struct qca_vreg []) {
2060 		{ "vddio", 15000  },
2061 		{ "vddxo", 80000  },
2062 		{ "vddrf", 300000 },
2063 		{ "vddch0", 450000 },
2064 	},
2065 	.num_vregs = 4,
2066 	.capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
2067 };
2068 
2069 static const struct qca_device_data qca_soc_data_wcn3998 __maybe_unused = {
2070 	.soc_type = QCA_WCN3998,
2071 	.vregs = (struct qca_vreg []) {
2072 		{ "vddio", 10000  },
2073 		{ "vddxo", 80000  },
2074 		{ "vddrf", 300000 },
2075 		{ "vddch0", 450000 },
2076 	},
2077 	.num_vregs = 4,
2078 };
2079 
2080 static const struct qca_device_data qca_soc_data_qca2066 __maybe_unused = {
2081 	.soc_type = QCA_QCA2066,
2082 	.num_vregs = 0,
2083 	.capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
2084 };
2085 
2086 static const struct qca_device_data qca_soc_data_qca6390 __maybe_unused = {
2087 	.soc_type = QCA_QCA6390,
2088 	.num_vregs = 0,
2089 };
2090 
2091 static const struct qca_device_data qca_soc_data_wcn6750 __maybe_unused = {
2092 	.soc_type = QCA_WCN6750,
2093 	.vregs = (struct qca_vreg []) {
2094 		{ "vddio", 5000 },
2095 		{ "vddaon", 26000 },
2096 		{ "vddbtcxmx", 126000 },
2097 		{ "vddrfacmn", 12500 },
2098 		{ "vddrfa0p8", 102000 },
2099 		{ "vddrfa1p7", 302000 },
2100 		{ "vddrfa1p2", 257000 },
2101 		{ "vddrfa2p2", 1700000 },
2102 		{ "vddasd", 200 },
2103 	},
2104 	.num_vregs = 9,
2105 	.capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
2106 };
2107 
2108 static const struct qca_device_data qca_soc_data_wcn6855 __maybe_unused = {
2109 	.soc_type = QCA_WCN6855,
2110 	.vregs = (struct qca_vreg []) {
2111 		{ "vddio", 5000 },
2112 		{ "vddbtcxmx", 126000 },
2113 		{ "vddrfacmn", 12500 },
2114 		{ "vddrfa0p8", 102000 },
2115 		{ "vddrfa1p7", 302000 },
2116 		{ "vddrfa1p2", 257000 },
2117 	},
2118 	.num_vregs = 6,
2119 	.capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
2120 };
2121 
2122 static const struct qca_device_data qca_soc_data_wcn7850 __maybe_unused = {
2123 	.soc_type = QCA_WCN7850,
2124 	.vregs = (struct qca_vreg []) {
2125 		{ "vddio", 5000 },
2126 		{ "vddaon", 26000 },
2127 		{ "vdddig", 126000 },
2128 		{ "vddrfa0p8", 102000 },
2129 		{ "vddrfa1p2", 257000 },
2130 		{ "vddrfa1p9", 302000 },
2131 	},
2132 	.num_vregs = 6,
2133 	.capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
2134 };
2135 
2136 static void qca_power_shutdown(struct hci_uart *hu)
2137 {
2138 	struct qca_serdev *qcadev;
2139 	struct qca_data *qca = hu->priv;
2140 	unsigned long flags;
2141 	enum qca_btsoc_type soc_type = qca_soc_type(hu);
2142 	bool sw_ctrl_state;
2143 	struct qca_power *power;
2144 
2145 	/* From this point we go into power off state. But serial port is
2146 	 * still open, stop queueing the IBS data and flush all the buffered
2147 	 * data in skb's.
2148 	 */
2149 	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
2150 	set_bit(QCA_IBS_DISABLED, &qca->flags);
2151 	qca_flush(hu);
2152 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
2153 
2154 	/* Non-serdev device usually is powered by external power
2155 	 * and don't need additional action in driver for power down
2156 	 */
2157 	if (!hu->serdev)
2158 		return;
2159 
2160 	qcadev = serdev_device_get_drvdata(hu->serdev);
2161 	power = qcadev->bt_power;
2162 
2163 	if (power && power->pwrseq) {
2164 		pwrseq_power_off(power->pwrseq);
2165 		set_bit(QCA_BT_OFF, &qca->flags);
2166 		return;
2167         }
2168 
2169 	switch (soc_type) {
2170 	case QCA_WCN3988:
2171 	case QCA_WCN3990:
2172 	case QCA_WCN3991:
2173 	case QCA_WCN3998:
2174 		host_set_baudrate(hu, 2400);
2175 		qca_send_power_pulse(hu, false);
2176 		qca_regulator_disable(qcadev);
2177 		break;
2178 
2179 	case QCA_WCN6750:
2180 	case QCA_WCN6855:
2181 		gpiod_set_value_cansleep(qcadev->bt_en, 0);
2182 		msleep(100);
2183 		qca_regulator_disable(qcadev);
2184 		if (qcadev->sw_ctrl) {
2185 			sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl);
2186 			bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state);
2187 		}
2188 		break;
2189 
2190 	default:
2191 		gpiod_set_value_cansleep(qcadev->bt_en, 0);
2192 	}
2193 
2194 	set_bit(QCA_BT_OFF, &qca->flags);
2195 }
2196 
2197 static int qca_power_off(struct hci_dev *hdev)
2198 {
2199 	struct hci_uart *hu = hci_get_drvdata(hdev);
2200 	struct qca_data *qca = hu->priv;
2201 	enum qca_btsoc_type soc_type = qca_soc_type(hu);
2202 
2203 	hu->hdev->hw_error = NULL;
2204 	hu->hdev->cmd_timeout = NULL;
2205 
2206 	del_timer_sync(&qca->wake_retrans_timer);
2207 	del_timer_sync(&qca->tx_idle_timer);
2208 
2209 	/* Stop sending shutdown command if soc crashes. */
2210 	if (soc_type != QCA_ROME
2211 		&& qca->memdump_state == QCA_MEMDUMP_IDLE) {
2212 		qca_send_pre_shutdown_cmd(hdev);
2213 		usleep_range(8000, 10000);
2214 	}
2215 
2216 	qca_power_shutdown(hu);
2217 	return 0;
2218 }
2219 
2220 static int qca_regulator_enable(struct qca_serdev *qcadev)
2221 {
2222 	struct qca_power *power = qcadev->bt_power;
2223 	int ret;
2224 
2225 	if (power->pwrseq)
2226 		return pwrseq_power_on(power->pwrseq);
2227 
2228 	/* Already enabled */
2229 	if (power->vregs_on)
2230 		return 0;
2231 
2232 	BT_DBG("enabling %d regulators)", power->num_vregs);
2233 
2234 	ret = regulator_bulk_enable(power->num_vregs, power->vreg_bulk);
2235 	if (ret)
2236 		return ret;
2237 
2238 	power->vregs_on = true;
2239 
2240 	ret = clk_prepare_enable(qcadev->susclk);
2241 	if (ret)
2242 		qca_regulator_disable(qcadev);
2243 
2244 	return ret;
2245 }
2246 
2247 static void qca_regulator_disable(struct qca_serdev *qcadev)
2248 {
2249 	struct qca_power *power;
2250 
2251 	if (!qcadev)
2252 		return;
2253 
2254 	power = qcadev->bt_power;
2255 
2256 	/* Already disabled? */
2257 	if (!power->vregs_on)
2258 		return;
2259 
2260 	regulator_bulk_disable(power->num_vregs, power->vreg_bulk);
2261 	power->vregs_on = false;
2262 
2263 	clk_disable_unprepare(qcadev->susclk);
2264 }
2265 
2266 static int qca_init_regulators(struct qca_power *qca,
2267 				const struct qca_vreg *vregs, size_t num_vregs)
2268 {
2269 	struct regulator_bulk_data *bulk;
2270 	int ret;
2271 	int i;
2272 
2273 	bulk = devm_kcalloc(qca->dev, num_vregs, sizeof(*bulk), GFP_KERNEL);
2274 	if (!bulk)
2275 		return -ENOMEM;
2276 
2277 	for (i = 0; i < num_vregs; i++)
2278 		bulk[i].supply = vregs[i].name;
2279 
2280 	ret = devm_regulator_bulk_get(qca->dev, num_vregs, bulk);
2281 	if (ret < 0)
2282 		return ret;
2283 
2284 	for (i = 0; i < num_vregs; i++) {
2285 		ret = regulator_set_load(bulk[i].consumer, vregs[i].load_uA);
2286 		if (ret)
2287 			return ret;
2288 	}
2289 
2290 	qca->vreg_bulk = bulk;
2291 	qca->num_vregs = num_vregs;
2292 
2293 	return 0;
2294 }
2295 
2296 static void qca_clk_disable_unprepare(void *data)
2297 {
2298 	struct clk *clk = data;
2299 
2300 	clk_disable_unprepare(clk);
2301 }
2302 
2303 static int qca_serdev_probe(struct serdev_device *serdev)
2304 {
2305 	struct qca_serdev *qcadev;
2306 	struct hci_dev *hdev;
2307 	const struct qca_device_data *data;
2308 	int err;
2309 	bool power_ctrl_enabled = true;
2310 
2311 	qcadev = devm_kzalloc(&serdev->dev, sizeof(*qcadev), GFP_KERNEL);
2312 	if (!qcadev)
2313 		return -ENOMEM;
2314 
2315 	qcadev->serdev_hu.serdev = serdev;
2316 	data = device_get_match_data(&serdev->dev);
2317 	serdev_device_set_drvdata(serdev, qcadev);
2318 	device_property_read_string(&serdev->dev, "firmware-name",
2319 					 &qcadev->firmware_name);
2320 	device_property_read_u32(&serdev->dev, "max-speed",
2321 				 &qcadev->oper_speed);
2322 	if (!qcadev->oper_speed)
2323 		BT_DBG("UART will pick default operating speed");
2324 
2325 	qcadev->bdaddr_property_broken = device_property_read_bool(&serdev->dev,
2326 			"qcom,local-bd-address-broken");
2327 
2328 	if (data)
2329 		qcadev->btsoc_type = data->soc_type;
2330 	else
2331 		qcadev->btsoc_type = QCA_ROME;
2332 
2333 	switch (qcadev->btsoc_type) {
2334 	case QCA_WCN3988:
2335 	case QCA_WCN3990:
2336 	case QCA_WCN3991:
2337 	case QCA_WCN3998:
2338 	case QCA_WCN6750:
2339 	case QCA_WCN6855:
2340 	case QCA_WCN7850:
2341 	case QCA_QCA6390:
2342 		qcadev->bt_power = devm_kzalloc(&serdev->dev,
2343 						sizeof(struct qca_power),
2344 						GFP_KERNEL);
2345 		if (!qcadev->bt_power)
2346 			return -ENOMEM;
2347 		break;
2348 	default:
2349 		break;
2350 	}
2351 
2352 	switch (qcadev->btsoc_type) {
2353 	case QCA_WCN6855:
2354 	case QCA_WCN7850:
2355 		if (!device_property_present(&serdev->dev, "enable-gpios")) {
2356 			/*
2357 			 * Backward compatibility with old DT sources. If the
2358 			 * node doesn't have the 'enable-gpios' property then
2359 			 * let's use the power sequencer. Otherwise, let's
2360 			 * drive everything outselves.
2361 			 */
2362 			qcadev->bt_power->pwrseq = devm_pwrseq_get(&serdev->dev,
2363 								   "bluetooth");
2364 			if (IS_ERR(qcadev->bt_power->pwrseq))
2365 				return PTR_ERR(qcadev->bt_power->pwrseq);
2366 
2367 			break;
2368 		}
2369 		fallthrough;
2370 	case QCA_WCN3988:
2371 	case QCA_WCN3990:
2372 	case QCA_WCN3991:
2373 	case QCA_WCN3998:
2374 	case QCA_WCN6750:
2375 		qcadev->bt_power->dev = &serdev->dev;
2376 		err = qca_init_regulators(qcadev->bt_power, data->vregs,
2377 					  data->num_vregs);
2378 		if (err) {
2379 			BT_ERR("Failed to init regulators:%d", err);
2380 			return err;
2381 		}
2382 
2383 		qcadev->bt_power->vregs_on = false;
2384 
2385 		qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable",
2386 					       GPIOD_OUT_LOW);
2387 		if (IS_ERR(qcadev->bt_en) &&
2388 		    (data->soc_type == QCA_WCN6750 ||
2389 		     data->soc_type == QCA_WCN6855)) {
2390 			dev_err(&serdev->dev, "failed to acquire BT_EN gpio\n");
2391 			return PTR_ERR(qcadev->bt_en);
2392 		}
2393 
2394 		if (!qcadev->bt_en)
2395 			power_ctrl_enabled = false;
2396 
2397 		qcadev->sw_ctrl = devm_gpiod_get_optional(&serdev->dev, "swctrl",
2398 					       GPIOD_IN);
2399 		if (IS_ERR(qcadev->sw_ctrl) &&
2400 		    (data->soc_type == QCA_WCN6750 ||
2401 		     data->soc_type == QCA_WCN6855 ||
2402 		     data->soc_type == QCA_WCN7850)) {
2403 			dev_err(&serdev->dev, "failed to acquire SW_CTRL gpio\n");
2404 			return PTR_ERR(qcadev->sw_ctrl);
2405 		}
2406 
2407 		qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL);
2408 		if (IS_ERR(qcadev->susclk)) {
2409 			dev_err(&serdev->dev, "failed to acquire clk\n");
2410 			return PTR_ERR(qcadev->susclk);
2411 		}
2412 		break;
2413 
2414 	case QCA_QCA6390:
2415 		if (dev_of_node(&serdev->dev)) {
2416 			qcadev->bt_power->pwrseq = devm_pwrseq_get(&serdev->dev,
2417 								   "bluetooth");
2418 			if (IS_ERR(qcadev->bt_power->pwrseq))
2419 				return PTR_ERR(qcadev->bt_power->pwrseq);
2420 			break;
2421 		}
2422 		fallthrough;
2423 
2424 	default:
2425 		qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable",
2426 					       GPIOD_OUT_LOW);
2427 		if (IS_ERR(qcadev->bt_en)) {
2428 			dev_err(&serdev->dev, "failed to acquire enable gpio\n");
2429 			return PTR_ERR(qcadev->bt_en);
2430 		}
2431 
2432 		if (!qcadev->bt_en)
2433 			power_ctrl_enabled = false;
2434 
2435 		qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL);
2436 		if (IS_ERR(qcadev->susclk)) {
2437 			dev_warn(&serdev->dev, "failed to acquire clk\n");
2438 			return PTR_ERR(qcadev->susclk);
2439 		}
2440 		err = clk_set_rate(qcadev->susclk, SUSCLK_RATE_32KHZ);
2441 		if (err)
2442 			return err;
2443 
2444 		err = clk_prepare_enable(qcadev->susclk);
2445 		if (err)
2446 			return err;
2447 
2448 		err = devm_add_action_or_reset(&serdev->dev,
2449 					       qca_clk_disable_unprepare,
2450 					       qcadev->susclk);
2451 		if (err)
2452 			return err;
2453 
2454 	}
2455 
2456 	err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto);
2457 	if (err) {
2458 		BT_ERR("serdev registration failed");
2459 		return err;
2460 	}
2461 
2462 	hdev = qcadev->serdev_hu.hdev;
2463 
2464 	if (power_ctrl_enabled) {
2465 		set_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks);
2466 		hdev->shutdown = qca_power_off;
2467 	}
2468 
2469 	if (data) {
2470 		/* Wideband speech support must be set per driver since it can't
2471 		 * be queried via hci. Same with the valid le states quirk.
2472 		 */
2473 		if (data->capabilities & QCA_CAP_WIDEBAND_SPEECH)
2474 			set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED,
2475 				&hdev->quirks);
2476 
2477 		if (!(data->capabilities & QCA_CAP_VALID_LE_STATES))
2478 			set_bit(HCI_QUIRK_BROKEN_LE_STATES, &hdev->quirks);
2479 	}
2480 
2481 	return 0;
2482 }
2483 
2484 static void qca_serdev_remove(struct serdev_device *serdev)
2485 {
2486 	struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2487 	struct qca_power *power = qcadev->bt_power;
2488 
2489 	switch (qcadev->btsoc_type) {
2490 	case QCA_WCN3988:
2491 	case QCA_WCN3990:
2492 	case QCA_WCN3991:
2493 	case QCA_WCN3998:
2494 	case QCA_WCN6750:
2495 	case QCA_WCN6855:
2496 	case QCA_WCN7850:
2497 		if (power->vregs_on)
2498 			qca_power_shutdown(&qcadev->serdev_hu);
2499 		break;
2500 	default:
2501 		break;
2502 	}
2503 
2504 	hci_uart_unregister_device(&qcadev->serdev_hu);
2505 }
2506 
2507 static void qca_serdev_shutdown(struct device *dev)
2508 {
2509 	int ret;
2510 	int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS);
2511 	struct serdev_device *serdev = to_serdev_device(dev);
2512 	struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2513 	struct hci_uart *hu = &qcadev->serdev_hu;
2514 	struct hci_dev *hdev = hu->hdev;
2515 	const u8 ibs_wake_cmd[] = { 0xFD };
2516 	const u8 edl_reset_soc_cmd[] = { 0x01, 0x00, 0xFC, 0x01, 0x05 };
2517 
2518 	if (qcadev->btsoc_type == QCA_QCA6390) {
2519 		/* The purpose of sending the VSC is to reset SOC into a initial
2520 		 * state and the state will ensure next hdev->setup() success.
2521 		 * if HCI_QUIRK_NON_PERSISTENT_SETUP is set, it means that
2522 		 * hdev->setup() can do its job regardless of SoC state, so
2523 		 * don't need to send the VSC.
2524 		 * if HCI_SETUP is set, it means that hdev->setup() was never
2525 		 * invoked and the SOC is already in the initial state, so
2526 		 * don't also need to send the VSC.
2527 		 */
2528 		if (test_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks) ||
2529 		    hci_dev_test_flag(hdev, HCI_SETUP))
2530 			return;
2531 
2532 		/* The serdev must be in open state when conrol logic arrives
2533 		 * here, so also fix the use-after-free issue caused by that
2534 		 * the serdev is flushed or wrote after it is closed.
2535 		 */
2536 		serdev_device_write_flush(serdev);
2537 		ret = serdev_device_write_buf(serdev, ibs_wake_cmd,
2538 					      sizeof(ibs_wake_cmd));
2539 		if (ret < 0) {
2540 			BT_ERR("QCA send IBS_WAKE_IND error: %d", ret);
2541 			return;
2542 		}
2543 		serdev_device_wait_until_sent(serdev, timeout);
2544 		usleep_range(8000, 10000);
2545 
2546 		serdev_device_write_flush(serdev);
2547 		ret = serdev_device_write_buf(serdev, edl_reset_soc_cmd,
2548 					      sizeof(edl_reset_soc_cmd));
2549 		if (ret < 0) {
2550 			BT_ERR("QCA send EDL_RESET_REQ error: %d", ret);
2551 			return;
2552 		}
2553 		serdev_device_wait_until_sent(serdev, timeout);
2554 		usleep_range(8000, 10000);
2555 	}
2556 }
2557 
2558 static int __maybe_unused qca_suspend(struct device *dev)
2559 {
2560 	struct serdev_device *serdev = to_serdev_device(dev);
2561 	struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2562 	struct hci_uart *hu = &qcadev->serdev_hu;
2563 	struct qca_data *qca = hu->priv;
2564 	unsigned long flags;
2565 	bool tx_pending = false;
2566 	int ret = 0;
2567 	u8 cmd;
2568 	u32 wait_timeout = 0;
2569 
2570 	set_bit(QCA_SUSPENDING, &qca->flags);
2571 
2572 	/* if BT SoC is running with default firmware then it does not
2573 	 * support in-band sleep
2574 	 */
2575 	if (test_bit(QCA_ROM_FW, &qca->flags))
2576 		return 0;
2577 
2578 	/* During SSR after memory dump collection, controller will be
2579 	 * powered off and then powered on.If controller is powered off
2580 	 * during SSR then we should wait until SSR is completed.
2581 	 */
2582 	if (test_bit(QCA_BT_OFF, &qca->flags) &&
2583 	    !test_bit(QCA_SSR_TRIGGERED, &qca->flags))
2584 		return 0;
2585 
2586 	if (test_bit(QCA_IBS_DISABLED, &qca->flags) ||
2587 	    test_bit(QCA_SSR_TRIGGERED, &qca->flags)) {
2588 		wait_timeout = test_bit(QCA_SSR_TRIGGERED, &qca->flags) ?
2589 					IBS_DISABLE_SSR_TIMEOUT_MS :
2590 					FW_DOWNLOAD_TIMEOUT_MS;
2591 
2592 		/* QCA_IBS_DISABLED flag is set to true, During FW download
2593 		 * and during memory dump collection. It is reset to false,
2594 		 * After FW download complete.
2595 		 */
2596 		wait_on_bit_timeout(&qca->flags, QCA_IBS_DISABLED,
2597 			    TASK_UNINTERRUPTIBLE, msecs_to_jiffies(wait_timeout));
2598 
2599 		if (test_bit(QCA_IBS_DISABLED, &qca->flags)) {
2600 			bt_dev_err(hu->hdev, "SSR or FW download time out");
2601 			ret = -ETIMEDOUT;
2602 			goto error;
2603 		}
2604 	}
2605 
2606 	cancel_work_sync(&qca->ws_awake_device);
2607 	cancel_work_sync(&qca->ws_awake_rx);
2608 
2609 	spin_lock_irqsave_nested(&qca->hci_ibs_lock,
2610 				 flags, SINGLE_DEPTH_NESTING);
2611 
2612 	switch (qca->tx_ibs_state) {
2613 	case HCI_IBS_TX_WAKING:
2614 		del_timer(&qca->wake_retrans_timer);
2615 		fallthrough;
2616 	case HCI_IBS_TX_AWAKE:
2617 		del_timer(&qca->tx_idle_timer);
2618 
2619 		serdev_device_write_flush(hu->serdev);
2620 		cmd = HCI_IBS_SLEEP_IND;
2621 		ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd));
2622 
2623 		if (ret < 0) {
2624 			BT_ERR("Failed to send SLEEP to device");
2625 			break;
2626 		}
2627 
2628 		qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
2629 		qca->ibs_sent_slps++;
2630 		tx_pending = true;
2631 		break;
2632 
2633 	case HCI_IBS_TX_ASLEEP:
2634 		break;
2635 
2636 	default:
2637 		BT_ERR("Spurious tx state %d", qca->tx_ibs_state);
2638 		ret = -EINVAL;
2639 		break;
2640 	}
2641 
2642 	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
2643 
2644 	if (ret < 0)
2645 		goto error;
2646 
2647 	if (tx_pending) {
2648 		serdev_device_wait_until_sent(hu->serdev,
2649 					      msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS));
2650 		serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu);
2651 	}
2652 
2653 	/* Wait for HCI_IBS_SLEEP_IND sent by device to indicate its Tx is going
2654 	 * to sleep, so that the packet does not wake the system later.
2655 	 */
2656 	ret = wait_event_interruptible_timeout(qca->suspend_wait_q,
2657 			qca->rx_ibs_state == HCI_IBS_RX_ASLEEP,
2658 			msecs_to_jiffies(IBS_BTSOC_TX_IDLE_TIMEOUT_MS));
2659 	if (ret == 0) {
2660 		ret = -ETIMEDOUT;
2661 		goto error;
2662 	}
2663 
2664 	return 0;
2665 
2666 error:
2667 	clear_bit(QCA_SUSPENDING, &qca->flags);
2668 
2669 	return ret;
2670 }
2671 
2672 static int __maybe_unused qca_resume(struct device *dev)
2673 {
2674 	struct serdev_device *serdev = to_serdev_device(dev);
2675 	struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2676 	struct hci_uart *hu = &qcadev->serdev_hu;
2677 	struct qca_data *qca = hu->priv;
2678 
2679 	clear_bit(QCA_SUSPENDING, &qca->flags);
2680 
2681 	return 0;
2682 }
2683 
2684 static SIMPLE_DEV_PM_OPS(qca_pm_ops, qca_suspend, qca_resume);
2685 
2686 #ifdef CONFIG_OF
2687 static const struct of_device_id qca_bluetooth_of_match[] = {
2688 	{ .compatible = "qcom,qca2066-bt", .data = &qca_soc_data_qca2066},
2689 	{ .compatible = "qcom,qca6174-bt" },
2690 	{ .compatible = "qcom,qca6390-bt", .data = &qca_soc_data_qca6390},
2691 	{ .compatible = "qcom,qca9377-bt" },
2692 	{ .compatible = "qcom,wcn3988-bt", .data = &qca_soc_data_wcn3988},
2693 	{ .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data_wcn3990},
2694 	{ .compatible = "qcom,wcn3991-bt", .data = &qca_soc_data_wcn3991},
2695 	{ .compatible = "qcom,wcn3998-bt", .data = &qca_soc_data_wcn3998},
2696 	{ .compatible = "qcom,wcn6750-bt", .data = &qca_soc_data_wcn6750},
2697 	{ .compatible = "qcom,wcn6855-bt", .data = &qca_soc_data_wcn6855},
2698 	{ .compatible = "qcom,wcn7850-bt", .data = &qca_soc_data_wcn7850},
2699 	{ /* sentinel */ }
2700 };
2701 MODULE_DEVICE_TABLE(of, qca_bluetooth_of_match);
2702 #endif
2703 
2704 #ifdef CONFIG_ACPI
2705 static const struct acpi_device_id qca_bluetooth_acpi_match[] = {
2706 	{ "QCOM2066", (kernel_ulong_t)&qca_soc_data_qca2066 },
2707 	{ "QCOM6390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2708 	{ "DLA16390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2709 	{ "DLB16390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2710 	{ "DLB26390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2711 	{ },
2712 };
2713 MODULE_DEVICE_TABLE(acpi, qca_bluetooth_acpi_match);
2714 #endif
2715 
2716 #ifdef CONFIG_DEV_COREDUMP
2717 static void hciqca_coredump(struct device *dev)
2718 {
2719 	struct serdev_device *serdev = to_serdev_device(dev);
2720 	struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2721 	struct hci_uart *hu = &qcadev->serdev_hu;
2722 	struct hci_dev  *hdev = hu->hdev;
2723 
2724 	if (hdev->dump.coredump)
2725 		hdev->dump.coredump(hdev);
2726 }
2727 #endif
2728 
2729 static struct serdev_device_driver qca_serdev_driver = {
2730 	.probe = qca_serdev_probe,
2731 	.remove = qca_serdev_remove,
2732 	.driver = {
2733 		.name = "hci_uart_qca",
2734 		.of_match_table = of_match_ptr(qca_bluetooth_of_match),
2735 		.acpi_match_table = ACPI_PTR(qca_bluetooth_acpi_match),
2736 		.shutdown = qca_serdev_shutdown,
2737 		.pm = &qca_pm_ops,
2738 #ifdef CONFIG_DEV_COREDUMP
2739 		.coredump = hciqca_coredump,
2740 #endif
2741 	},
2742 };
2743 
2744 int __init qca_init(void)
2745 {
2746 	serdev_device_driver_register(&qca_serdev_driver);
2747 
2748 	return hci_uart_register_proto(&qca_proto);
2749 }
2750 
2751 int __exit qca_deinit(void)
2752 {
2753 	serdev_device_driver_unregister(&qca_serdev_driver);
2754 
2755 	return hci_uart_unregister_proto(&qca_proto);
2756 }
2757