1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Bluetooth supports for Qualcomm Atheros ROME chips 4 * 5 * Copyright (c) 2015 The Linux Foundation. All rights reserved. 6 */ 7 8 #define EDL_PATCH_CMD_OPCODE (0xFC00) 9 #define EDL_NVM_ACCESS_OPCODE (0xFC0B) 10 #define EDL_WRITE_BD_ADDR_OPCODE (0xFC14) 11 #define EDL_PATCH_CMD_LEN (1) 12 #define EDL_PATCH_VER_REQ_CMD (0x19) 13 #define EDL_PATCH_TLV_REQ_CMD (0x1E) 14 #define EDL_GET_BUILD_INFO_CMD (0x20) 15 #define EDL_NVM_ACCESS_SET_REQ_CMD (0x01) 16 #define EDL_PATCH_CONFIG_CMD (0x28) 17 #define MAX_SIZE_PER_TLV_SEGMENT (243) 18 #define QCA_PRE_SHUTDOWN_CMD (0xFC08) 19 #define QCA_DISABLE_LOGGING (0xFC17) 20 21 #define EDL_CMD_REQ_RES_EVT (0x00) 22 #define EDL_PATCH_VER_RES_EVT (0x19) 23 #define EDL_APP_VER_RES_EVT (0x02) 24 #define EDL_TVL_DNLD_RES_EVT (0x04) 25 #define EDL_CMD_EXE_STATUS_EVT (0x00) 26 #define EDL_SET_BAUDRATE_RSP_EVT (0x92) 27 #define EDL_NVM_ACCESS_CODE_EVT (0x0B) 28 #define EDL_PATCH_CONFIG_RES_EVT (0x00) 29 #define QCA_DISABLE_LOGGING_SUB_OP (0x14) 30 31 #define EDL_TAG_ID_HCI (17) 32 #define EDL_TAG_ID_DEEP_SLEEP (27) 33 34 #define QCA_WCN3990_POWERON_PULSE 0xFC 35 #define QCA_WCN3990_POWEROFF_PULSE 0xC0 36 37 #define QCA_HCI_CC_OPCODE 0xFC00 38 #define QCA_HCI_CC_SUCCESS 0x00 39 40 #define QCA_WCN3991_SOC_ID (0x40014320) 41 42 /* QCA chipset version can be decided by patch and SoC 43 * version, combination with upper 2 bytes from SoC 44 * and lower 2 bytes from patch will be used. 45 */ 46 #define get_soc_ver(soc_id, rom_ver) \ 47 ((le32_to_cpu(soc_id) << 16) | (le16_to_cpu(rom_ver))) 48 49 #define QCA_FW_BUILD_VER_LEN 255 50 51 52 enum qca_baudrate { 53 QCA_BAUDRATE_115200 = 0, 54 QCA_BAUDRATE_57600, 55 QCA_BAUDRATE_38400, 56 QCA_BAUDRATE_19200, 57 QCA_BAUDRATE_9600, 58 QCA_BAUDRATE_230400, 59 QCA_BAUDRATE_250000, 60 QCA_BAUDRATE_460800, 61 QCA_BAUDRATE_500000, 62 QCA_BAUDRATE_720000, 63 QCA_BAUDRATE_921600, 64 QCA_BAUDRATE_1000000, 65 QCA_BAUDRATE_1250000, 66 QCA_BAUDRATE_2000000, 67 QCA_BAUDRATE_3000000, 68 QCA_BAUDRATE_4000000, 69 QCA_BAUDRATE_1600000, 70 QCA_BAUDRATE_3200000, 71 QCA_BAUDRATE_3500000, 72 QCA_BAUDRATE_AUTO = 0xFE, 73 QCA_BAUDRATE_RESERVED 74 }; 75 76 enum qca_tlv_dnld_mode { 77 QCA_SKIP_EVT_NONE, 78 QCA_SKIP_EVT_VSE, 79 QCA_SKIP_EVT_CC, 80 QCA_SKIP_EVT_VSE_CC 81 }; 82 83 enum qca_tlv_type { 84 TLV_TYPE_PATCH = 1, 85 TLV_TYPE_NVM, 86 ELF_TYPE_PATCH, 87 }; 88 89 struct qca_fw_config { 90 u8 type; 91 char fwname[64]; 92 uint8_t user_baud_rate; 93 enum qca_tlv_dnld_mode dnld_mode; 94 enum qca_tlv_dnld_mode dnld_type; 95 }; 96 97 struct edl_event_hdr { 98 __u8 cresp; 99 __u8 rtype; 100 __u8 data[]; 101 } __packed; 102 103 struct qca_btsoc_version { 104 __le32 product_id; 105 __le16 patch_ver; 106 __le16 rom_ver; 107 __le32 soc_id; 108 } __packed; 109 110 struct tlv_seg_resp { 111 __u8 result; 112 } __packed; 113 114 struct tlv_type_patch { 115 __le32 total_size; 116 __le32 data_length; 117 __u8 format_version; 118 __u8 signature; 119 __u8 download_mode; 120 __u8 reserved1; 121 __le16 product_id; 122 __le16 rom_build; 123 __le16 patch_version; 124 __le16 reserved2; 125 __le32 entry; 126 } __packed; 127 128 struct tlv_type_nvm { 129 __le16 tag_id; 130 __le16 tag_len; 131 __le32 reserve1; 132 __le32 reserve2; 133 __u8 data[]; 134 } __packed; 135 136 struct tlv_type_hdr { 137 __le32 type_len; 138 __u8 data[]; 139 } __packed; 140 141 enum qca_btsoc_type { 142 QCA_INVALID = -1, 143 QCA_AR3002, 144 QCA_ROME, 145 QCA_WCN3988, 146 QCA_WCN3990, 147 QCA_WCN3998, 148 QCA_WCN3991, 149 QCA_QCA6390, 150 QCA_WCN6750, 151 QCA_WCN6855, 152 }; 153 154 #if IS_ENABLED(CONFIG_BT_QCA) 155 156 int qca_set_bdaddr_rome(struct hci_dev *hdev, const bdaddr_t *bdaddr); 157 int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate, 158 enum qca_btsoc_type soc_type, struct qca_btsoc_version ver, 159 const char *firmware_name); 160 int qca_read_soc_version(struct hci_dev *hdev, struct qca_btsoc_version *ver, 161 enum qca_btsoc_type); 162 int qca_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr); 163 int qca_send_pre_shutdown_cmd(struct hci_dev *hdev); 164 static inline bool qca_is_wcn399x(enum qca_btsoc_type soc_type) 165 { 166 switch (soc_type) { 167 case QCA_WCN3988: 168 case QCA_WCN3990: 169 case QCA_WCN3991: 170 case QCA_WCN3998: 171 return true; 172 default: 173 return false; 174 } 175 } 176 static inline bool qca_is_wcn6750(enum qca_btsoc_type soc_type) 177 { 178 return soc_type == QCA_WCN6750; 179 } 180 static inline bool qca_is_wcn6855(enum qca_btsoc_type soc_type) 181 { 182 return soc_type == QCA_WCN6855; 183 } 184 185 #else 186 187 static inline int qca_set_bdaddr_rome(struct hci_dev *hdev, const bdaddr_t *bdaddr) 188 { 189 return -EOPNOTSUPP; 190 } 191 192 static inline int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate, 193 enum qca_btsoc_type soc_type, 194 struct qca_btsoc_version ver, 195 const char *firmware_name) 196 { 197 return -EOPNOTSUPP; 198 } 199 200 static inline int qca_read_soc_version(struct hci_dev *hdev, 201 struct qca_btsoc_version *ver, 202 enum qca_btsoc_type) 203 { 204 return -EOPNOTSUPP; 205 } 206 207 static inline int qca_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr) 208 { 209 return -EOPNOTSUPP; 210 } 211 212 static inline bool qca_is_wcn399x(enum qca_btsoc_type soc_type) 213 { 214 return false; 215 } 216 217 static inline bool qca_is_wcn6750(enum qca_btsoc_type soc_type) 218 { 219 return false; 220 } 221 222 static inline bool qca_is_wcn6855(enum qca_btsoc_type soc_type) 223 { 224 return false; 225 } 226 227 static inline int qca_send_pre_shutdown_cmd(struct hci_dev *hdev) 228 { 229 return -EOPNOTSUPP; 230 } 231 #endif 232