1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Bluetooth supports for Qualcomm Atheros ROME chips 4 * 5 * Copyright (c) 2015 The Linux Foundation. All rights reserved. 6 */ 7 8 #define EDL_PATCH_CMD_OPCODE 0xFC00 9 #define EDL_NVM_ACCESS_OPCODE 0xFC0B 10 #define EDL_WRITE_BD_ADDR_OPCODE 0xFC14 11 #define EDL_PATCH_CMD_LEN 1 12 #define EDL_PATCH_VER_REQ_CMD 0x19 13 #define EDL_PATCH_TLV_REQ_CMD 0x1E 14 #define EDL_GET_BUILD_INFO_CMD 0x20 15 #define EDL_GET_BID_REQ_CMD 0x23 16 #define EDL_NVM_ACCESS_SET_REQ_CMD 0x01 17 #define EDL_PATCH_CONFIG_CMD 0x28 18 #define MAX_SIZE_PER_TLV_SEGMENT 243 19 #define QCA_PRE_SHUTDOWN_CMD 0xFC08 20 #define QCA_DISABLE_LOGGING 0xFC17 21 22 #define EDL_CMD_REQ_RES_EVT 0x00 23 #define EDL_PATCH_VER_RES_EVT 0x19 24 #define EDL_APP_VER_RES_EVT 0x02 25 #define EDL_TVL_DNLD_RES_EVT 0x04 26 #define EDL_CMD_EXE_STATUS_EVT 0x00 27 #define EDL_SET_BAUDRATE_RSP_EVT 0x92 28 #define EDL_NVM_ACCESS_CODE_EVT 0x0B 29 #define EDL_PATCH_CONFIG_RES_EVT 0x00 30 #define QCA_DISABLE_LOGGING_SUB_OP 0x14 31 32 #define EDL_TAG_ID_BD_ADDR 2 33 #define EDL_TAG_ID_HCI 17 34 #define EDL_TAG_ID_DEEP_SLEEP 27 35 36 #define QCA_WCN3990_POWERON_PULSE 0xFC 37 #define QCA_WCN3990_POWEROFF_PULSE 0xC0 38 39 #define QCA_HCI_CC_OPCODE 0xFC00 40 #define QCA_HCI_CC_SUCCESS 0x00 41 42 #define QCA_WCN3991_SOC_ID 0x40014320 43 44 /* QCA chipset version can be decided by patch and SoC 45 * version, combination with upper 2 bytes from SoC 46 * and lower 2 bytes from patch will be used. 47 */ 48 #define get_soc_ver(soc_id, rom_ver) \ 49 ((le32_to_cpu(soc_id) << 16) | (le16_to_cpu(rom_ver))) 50 51 #define QCA_HSP_GF_SOC_ID 0x1200 52 #define QCA_HSP_GF_SOC_MASK 0x0000ff00 53 54 enum qca_baudrate { 55 QCA_BAUDRATE_115200 = 0, 56 QCA_BAUDRATE_57600, 57 QCA_BAUDRATE_38400, 58 QCA_BAUDRATE_19200, 59 QCA_BAUDRATE_9600, 60 QCA_BAUDRATE_230400, 61 QCA_BAUDRATE_250000, 62 QCA_BAUDRATE_460800, 63 QCA_BAUDRATE_500000, 64 QCA_BAUDRATE_720000, 65 QCA_BAUDRATE_921600, 66 QCA_BAUDRATE_1000000, 67 QCA_BAUDRATE_1250000, 68 QCA_BAUDRATE_2000000, 69 QCA_BAUDRATE_3000000, 70 QCA_BAUDRATE_4000000, 71 QCA_BAUDRATE_1600000, 72 QCA_BAUDRATE_3200000, 73 QCA_BAUDRATE_3500000, 74 QCA_BAUDRATE_AUTO = 0xFE, 75 QCA_BAUDRATE_RESERVED 76 }; 77 78 enum qca_tlv_dnld_mode { 79 QCA_SKIP_EVT_NONE, 80 QCA_SKIP_EVT_VSE, 81 QCA_SKIP_EVT_CC, 82 QCA_SKIP_EVT_VSE_CC 83 }; 84 85 enum qca_tlv_type { 86 TLV_TYPE_PATCH = 1, 87 TLV_TYPE_NVM, 88 ELF_TYPE_PATCH, 89 }; 90 91 struct qca_fw_config { 92 u8 type; 93 char fwname[64]; 94 uint8_t user_baud_rate; 95 enum qca_tlv_dnld_mode dnld_mode; 96 enum qca_tlv_dnld_mode dnld_type; 97 bdaddr_t bdaddr; 98 }; 99 100 struct edl_event_hdr { 101 __u8 cresp; 102 __u8 rtype; 103 __u8 data[]; 104 } __packed; 105 106 struct qca_btsoc_version { 107 __le32 product_id; 108 __le16 patch_ver; 109 __le16 rom_ver; 110 __le32 soc_id; 111 } __packed; 112 113 struct tlv_seg_resp { 114 __u8 result; 115 } __packed; 116 117 struct tlv_type_patch { 118 __le32 total_size; 119 __le32 data_length; 120 __u8 format_version; 121 __u8 signature; 122 __u8 download_mode; 123 __u8 reserved1; 124 __le16 product_id; 125 __le16 rom_build; 126 __le16 patch_version; 127 __le16 reserved2; 128 __le32 entry; 129 } __packed; 130 131 struct tlv_type_nvm { 132 __le16 tag_id; 133 __le16 tag_len; 134 __le32 reserve1; 135 __le32 reserve2; 136 __u8 data[]; 137 } __packed; 138 139 struct tlv_type_hdr { 140 __le32 type_len; 141 __u8 data[]; 142 } __packed; 143 144 enum qca_btsoc_type { 145 QCA_INVALID = -1, 146 QCA_AR3002, 147 QCA_ROME, 148 QCA_WCN3988, 149 QCA_WCN3990, 150 QCA_WCN3998, 151 QCA_WCN3991, 152 QCA_QCA2066, 153 QCA_QCA6390, 154 QCA_WCN6750, 155 QCA_WCN6855, 156 QCA_WCN7850, 157 }; 158 159 #if IS_ENABLED(CONFIG_BT_QCA) 160 161 int qca_set_bdaddr_rome(struct hci_dev *hdev, const bdaddr_t *bdaddr); 162 int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate, 163 enum qca_btsoc_type soc_type, struct qca_btsoc_version ver, 164 const char *firmware_name); 165 int qca_read_soc_version(struct hci_dev *hdev, struct qca_btsoc_version *ver, 166 enum qca_btsoc_type); 167 int qca_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr); 168 int qca_send_pre_shutdown_cmd(struct hci_dev *hdev); 169 #else 170 171 static inline int qca_set_bdaddr_rome(struct hci_dev *hdev, const bdaddr_t *bdaddr) 172 { 173 return -EOPNOTSUPP; 174 } 175 176 static inline int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate, 177 enum qca_btsoc_type soc_type, 178 struct qca_btsoc_version ver, 179 const char *firmware_name) 180 { 181 return -EOPNOTSUPP; 182 } 183 184 static inline int qca_read_soc_version(struct hci_dev *hdev, 185 struct qca_btsoc_version *ver, 186 enum qca_btsoc_type) 187 { 188 return -EOPNOTSUPP; 189 } 190 191 static inline int qca_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr) 192 { 193 return -EOPNOTSUPP; 194 } 195 196 static inline int qca_send_pre_shutdown_cmd(struct hci_dev *hdev) 197 { 198 return -EOPNOTSUPP; 199 } 200 #endif 201