1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Bluetooth supports for Qualcomm Atheros ROME chips 4 * 5 * Copyright (c) 2015 The Linux Foundation. All rights reserved. 6 */ 7 8 #define EDL_PATCH_CMD_OPCODE (0xFC00) 9 #define EDL_NVM_ACCESS_OPCODE (0xFC0B) 10 #define EDL_WRITE_BD_ADDR_OPCODE (0xFC14) 11 #define EDL_PATCH_CMD_LEN (1) 12 #define EDL_PATCH_VER_REQ_CMD (0x19) 13 #define EDL_PATCH_TLV_REQ_CMD (0x1E) 14 #define EDL_GET_BUILD_INFO_CMD (0x20) 15 #define EDL_NVM_ACCESS_SET_REQ_CMD (0x01) 16 #define MAX_SIZE_PER_TLV_SEGMENT (243) 17 #define QCA_PRE_SHUTDOWN_CMD (0xFC08) 18 #define QCA_DISABLE_LOGGING (0xFC17) 19 20 #define EDL_CMD_REQ_RES_EVT (0x00) 21 #define EDL_PATCH_VER_RES_EVT (0x19) 22 #define EDL_APP_VER_RES_EVT (0x02) 23 #define EDL_TVL_DNLD_RES_EVT (0x04) 24 #define EDL_CMD_EXE_STATUS_EVT (0x00) 25 #define EDL_SET_BAUDRATE_RSP_EVT (0x92) 26 #define EDL_NVM_ACCESS_CODE_EVT (0x0B) 27 #define QCA_DISABLE_LOGGING_SUB_OP (0x14) 28 29 #define EDL_TAG_ID_HCI (17) 30 #define EDL_TAG_ID_DEEP_SLEEP (27) 31 32 #define QCA_WCN3990_POWERON_PULSE 0xFC 33 #define QCA_WCN3990_POWEROFF_PULSE 0xC0 34 35 #define QCA_HCI_CC_OPCODE 0xFC00 36 #define QCA_HCI_CC_SUCCESS 0x00 37 38 #define QCA_WCN3991_SOC_ID (0x40014320) 39 40 /* QCA chipset version can be decided by patch and SoC 41 * version, combination with upper 2 bytes from SoC 42 * and lower 2 bytes from patch will be used. 43 */ 44 #define get_soc_ver(soc_id, rom_ver) \ 45 ((le32_to_cpu(soc_id) << 16) | (le16_to_cpu(rom_ver))) 46 47 #define QCA_FW_BUILD_VER_LEN 255 48 49 50 enum qca_baudrate { 51 QCA_BAUDRATE_115200 = 0, 52 QCA_BAUDRATE_57600, 53 QCA_BAUDRATE_38400, 54 QCA_BAUDRATE_19200, 55 QCA_BAUDRATE_9600, 56 QCA_BAUDRATE_230400, 57 QCA_BAUDRATE_250000, 58 QCA_BAUDRATE_460800, 59 QCA_BAUDRATE_500000, 60 QCA_BAUDRATE_720000, 61 QCA_BAUDRATE_921600, 62 QCA_BAUDRATE_1000000, 63 QCA_BAUDRATE_1250000, 64 QCA_BAUDRATE_2000000, 65 QCA_BAUDRATE_3000000, 66 QCA_BAUDRATE_4000000, 67 QCA_BAUDRATE_1600000, 68 QCA_BAUDRATE_3200000, 69 QCA_BAUDRATE_3500000, 70 QCA_BAUDRATE_AUTO = 0xFE, 71 QCA_BAUDRATE_RESERVED 72 }; 73 74 enum qca_tlv_dnld_mode { 75 QCA_SKIP_EVT_NONE, 76 QCA_SKIP_EVT_VSE, 77 QCA_SKIP_EVT_CC, 78 QCA_SKIP_EVT_VSE_CC 79 }; 80 81 enum qca_tlv_type { 82 TLV_TYPE_PATCH = 1, 83 TLV_TYPE_NVM, 84 ELF_TYPE_PATCH, 85 }; 86 87 struct qca_fw_config { 88 u8 type; 89 char fwname[64]; 90 uint8_t user_baud_rate; 91 enum qca_tlv_dnld_mode dnld_mode; 92 enum qca_tlv_dnld_mode dnld_type; 93 }; 94 95 struct edl_event_hdr { 96 __u8 cresp; 97 __u8 rtype; 98 __u8 data[]; 99 } __packed; 100 101 struct qca_btsoc_version { 102 __le32 product_id; 103 __le16 patch_ver; 104 __le16 rom_ver; 105 __le32 soc_id; 106 } __packed; 107 108 struct tlv_seg_resp { 109 __u8 result; 110 } __packed; 111 112 struct tlv_type_patch { 113 __le32 total_size; 114 __le32 data_length; 115 __u8 format_version; 116 __u8 signature; 117 __u8 download_mode; 118 __u8 reserved1; 119 __le16 product_id; 120 __le16 rom_build; 121 __le16 patch_version; 122 __le16 reserved2; 123 __le32 entry; 124 } __packed; 125 126 struct tlv_type_nvm { 127 __le16 tag_id; 128 __le16 tag_len; 129 __le32 reserve1; 130 __le32 reserve2; 131 __u8 data[]; 132 } __packed; 133 134 struct tlv_type_hdr { 135 __le32 type_len; 136 __u8 data[]; 137 } __packed; 138 139 enum qca_btsoc_type { 140 QCA_INVALID = -1, 141 QCA_AR3002, 142 QCA_ROME, 143 QCA_WCN3990, 144 QCA_WCN3998, 145 QCA_WCN3991, 146 QCA_QCA6390, 147 QCA_WCN6750, 148 }; 149 150 #if IS_ENABLED(CONFIG_BT_QCA) 151 152 int qca_set_bdaddr_rome(struct hci_dev *hdev, const bdaddr_t *bdaddr); 153 int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate, 154 enum qca_btsoc_type soc_type, struct qca_btsoc_version ver, 155 const char *firmware_name); 156 int qca_read_soc_version(struct hci_dev *hdev, struct qca_btsoc_version *ver, 157 enum qca_btsoc_type); 158 int qca_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr); 159 int qca_send_pre_shutdown_cmd(struct hci_dev *hdev); 160 static inline bool qca_is_wcn399x(enum qca_btsoc_type soc_type) 161 { 162 return soc_type == QCA_WCN3990 || soc_type == QCA_WCN3991 || 163 soc_type == QCA_WCN3998; 164 } 165 static inline bool qca_is_wcn6750(enum qca_btsoc_type soc_type) 166 { 167 return soc_type == QCA_WCN6750; 168 } 169 170 #else 171 172 static inline int qca_set_bdaddr_rome(struct hci_dev *hdev, const bdaddr_t *bdaddr) 173 { 174 return -EOPNOTSUPP; 175 } 176 177 static inline int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate, 178 enum qca_btsoc_type soc_type, 179 struct qca_btsoc_version ver, 180 const char *firmware_name) 181 { 182 return -EOPNOTSUPP; 183 } 184 185 static inline int qca_read_soc_version(struct hci_dev *hdev, 186 struct qca_btsoc_version *ver, 187 enum qca_btsoc_type) 188 { 189 return -EOPNOTSUPP; 190 } 191 192 static inline int qca_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr) 193 { 194 return -EOPNOTSUPP; 195 } 196 197 static inline bool qca_is_wcn399x(enum qca_btsoc_type soc_type) 198 { 199 return false; 200 } 201 202 static inline bool qca_is_wcn6750(enum qca_btsoc_type soc_type) 203 { 204 return false; 205 } 206 207 static inline int qca_send_pre_shutdown_cmd(struct hci_dev *hdev) 208 { 209 return -EOPNOTSUPP; 210 } 211 #endif 212