1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * ps3vram - Use extra PS3 video ram as block device. 4 * 5 * Copyright 2009 Sony Corporation 6 * 7 * Based on the MTD ps3vram driver, which is 8 * Copyright (c) 2007-2008 Jim Paris <jim@jtan.com> 9 * Added support RSX DMA Vivien Chappelier <vivien.chappelier@free.fr> 10 */ 11 12 #include <linux/blkdev.h> 13 #include <linux/delay.h> 14 #include <linux/module.h> 15 #include <linux/proc_fs.h> 16 #include <linux/seq_file.h> 17 #include <linux/slab.h> 18 19 #include <asm/cell-regs.h> 20 #include <asm/firmware.h> 21 #include <asm/lv1call.h> 22 #include <asm/ps3.h> 23 #include <asm/ps3gpu.h> 24 25 26 #define DEVICE_NAME "ps3vram" 27 28 29 #define XDR_BUF_SIZE (2 * 1024 * 1024) /* XDR buffer (must be 1MiB aligned) */ 30 #define XDR_IOIF 0x0c000000 31 32 #define FIFO_BASE XDR_IOIF 33 #define FIFO_SIZE (64 * 1024) 34 35 #define DMA_PAGE_SIZE (4 * 1024) 36 37 #define CACHE_PAGE_SIZE (256 * 1024) 38 #define CACHE_PAGE_COUNT ((XDR_BUF_SIZE - FIFO_SIZE) / CACHE_PAGE_SIZE) 39 40 #define CACHE_OFFSET CACHE_PAGE_SIZE 41 #define FIFO_OFFSET 0 42 43 #define CTRL_PUT 0x10 44 #define CTRL_GET 0x11 45 #define CTRL_TOP 0x15 46 47 #define UPLOAD_SUBCH 1 48 #define DOWNLOAD_SUBCH 2 49 50 #define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c 51 #define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104 52 53 #define CACHE_PAGE_PRESENT 1 54 #define CACHE_PAGE_DIRTY 2 55 56 struct ps3vram_tag { 57 unsigned int address; 58 unsigned int flags; 59 }; 60 61 struct ps3vram_cache { 62 unsigned int page_count; 63 unsigned int page_size; 64 struct ps3vram_tag *tags; 65 unsigned int hit; 66 unsigned int miss; 67 }; 68 69 struct ps3vram_priv { 70 struct request_queue *queue; 71 struct gendisk *gendisk; 72 73 u64 size; 74 75 u64 memory_handle; 76 u64 context_handle; 77 u32 __iomem *ctrl; 78 void __iomem *reports; 79 u8 *xdr_buf; 80 81 u32 *fifo_base; 82 u32 *fifo_ptr; 83 84 struct ps3vram_cache cache; 85 86 spinlock_t lock; /* protecting list of bios */ 87 struct bio_list list; 88 }; 89 90 91 static int ps3vram_major; 92 93 94 static const struct block_device_operations ps3vram_fops = { 95 .owner = THIS_MODULE, 96 }; 97 98 99 #define DMA_NOTIFIER_HANDLE_BASE 0x66604200 /* first DMA notifier handle */ 100 #define DMA_NOTIFIER_OFFSET_BASE 0x1000 /* first DMA notifier offset */ 101 #define DMA_NOTIFIER_SIZE 0x40 102 #define NOTIFIER 7 /* notifier used for completion report */ 103 104 static char *size = "256M"; 105 module_param(size, charp, 0); 106 MODULE_PARM_DESC(size, "memory size"); 107 108 static u32 __iomem *ps3vram_get_notifier(void __iomem *reports, int notifier) 109 { 110 return reports + DMA_NOTIFIER_OFFSET_BASE + 111 DMA_NOTIFIER_SIZE * notifier; 112 } 113 114 static void ps3vram_notifier_reset(struct ps3_system_bus_device *dev) 115 { 116 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 117 u32 __iomem *notify = ps3vram_get_notifier(priv->reports, NOTIFIER); 118 int i; 119 120 for (i = 0; i < 4; i++) 121 iowrite32be(0xffffffff, notify + i); 122 } 123 124 static int ps3vram_notifier_wait(struct ps3_system_bus_device *dev, 125 unsigned int timeout_ms) 126 { 127 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 128 u32 __iomem *notify = ps3vram_get_notifier(priv->reports, NOTIFIER); 129 unsigned long timeout; 130 131 for (timeout = 20; timeout; timeout--) { 132 if (!ioread32be(notify + 3)) 133 return 0; 134 udelay(10); 135 } 136 137 timeout = jiffies + msecs_to_jiffies(timeout_ms); 138 139 do { 140 if (!ioread32be(notify + 3)) 141 return 0; 142 msleep(1); 143 } while (time_before(jiffies, timeout)); 144 145 return -ETIMEDOUT; 146 } 147 148 static void ps3vram_init_ring(struct ps3_system_bus_device *dev) 149 { 150 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 151 152 iowrite32be(FIFO_BASE + FIFO_OFFSET, priv->ctrl + CTRL_PUT); 153 iowrite32be(FIFO_BASE + FIFO_OFFSET, priv->ctrl + CTRL_GET); 154 } 155 156 static int ps3vram_wait_ring(struct ps3_system_bus_device *dev, 157 unsigned int timeout_ms) 158 { 159 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 160 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms); 161 162 do { 163 if (ioread32be(priv->ctrl + CTRL_PUT) == ioread32be(priv->ctrl + CTRL_GET)) 164 return 0; 165 msleep(1); 166 } while (time_before(jiffies, timeout)); 167 168 dev_warn(&dev->core, "FIFO timeout (%08x/%08x/%08x)\n", 169 ioread32be(priv->ctrl + CTRL_PUT), ioread32be(priv->ctrl + CTRL_GET), 170 ioread32be(priv->ctrl + CTRL_TOP)); 171 172 return -ETIMEDOUT; 173 } 174 175 static void ps3vram_out_ring(struct ps3vram_priv *priv, u32 data) 176 { 177 *(priv->fifo_ptr)++ = data; 178 } 179 180 static void ps3vram_begin_ring(struct ps3vram_priv *priv, u32 chan, u32 tag, 181 u32 size) 182 { 183 ps3vram_out_ring(priv, (size << 18) | (chan << 13) | tag); 184 } 185 186 static void ps3vram_rewind_ring(struct ps3_system_bus_device *dev) 187 { 188 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 189 int status; 190 191 ps3vram_out_ring(priv, 0x20000000 | (FIFO_BASE + FIFO_OFFSET)); 192 193 iowrite32be(FIFO_BASE + FIFO_OFFSET, priv->ctrl + CTRL_PUT); 194 195 /* asking the HV for a blit will kick the FIFO */ 196 status = lv1_gpu_fb_blit(priv->context_handle, 0, 0, 0, 0); 197 if (status) 198 dev_err(&dev->core, "%s: lv1_gpu_fb_blit failed %d\n", 199 __func__, status); 200 201 priv->fifo_ptr = priv->fifo_base; 202 } 203 204 static void ps3vram_fire_ring(struct ps3_system_bus_device *dev) 205 { 206 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 207 int status; 208 209 mutex_lock(&ps3_gpu_mutex); 210 211 iowrite32be(FIFO_BASE + FIFO_OFFSET + (priv->fifo_ptr - priv->fifo_base) 212 * sizeof(u32), priv->ctrl + CTRL_PUT); 213 214 /* asking the HV for a blit will kick the FIFO */ 215 status = lv1_gpu_fb_blit(priv->context_handle, 0, 0, 0, 0); 216 if (status) 217 dev_err(&dev->core, "%s: lv1_gpu_fb_blit failed %d\n", 218 __func__, status); 219 220 if ((priv->fifo_ptr - priv->fifo_base) * sizeof(u32) > 221 FIFO_SIZE - 1024) { 222 dev_dbg(&dev->core, "FIFO full, rewinding\n"); 223 ps3vram_wait_ring(dev, 200); 224 ps3vram_rewind_ring(dev); 225 } 226 227 mutex_unlock(&ps3_gpu_mutex); 228 } 229 230 static void ps3vram_bind(struct ps3_system_bus_device *dev) 231 { 232 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 233 234 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0, 1); 235 ps3vram_out_ring(priv, 0x31337303); 236 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x180, 3); 237 ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER); 238 ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */ 239 ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */ 240 241 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0, 1); 242 ps3vram_out_ring(priv, 0x3137c0de); 243 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x180, 3); 244 ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER); 245 ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */ 246 ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */ 247 248 ps3vram_fire_ring(dev); 249 } 250 251 static int ps3vram_upload(struct ps3_system_bus_device *dev, 252 unsigned int src_offset, unsigned int dst_offset, 253 int len, int count) 254 { 255 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 256 257 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 258 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8); 259 ps3vram_out_ring(priv, XDR_IOIF + src_offset); 260 ps3vram_out_ring(priv, dst_offset); 261 ps3vram_out_ring(priv, len); 262 ps3vram_out_ring(priv, len); 263 ps3vram_out_ring(priv, len); 264 ps3vram_out_ring(priv, count); 265 ps3vram_out_ring(priv, (1 << 8) | 1); 266 ps3vram_out_ring(priv, 0); 267 268 ps3vram_notifier_reset(dev); 269 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 270 NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1); 271 ps3vram_out_ring(priv, 0); 272 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x100, 1); 273 ps3vram_out_ring(priv, 0); 274 ps3vram_fire_ring(dev); 275 if (ps3vram_notifier_wait(dev, 200) < 0) { 276 dev_warn(&dev->core, "%s: Notifier timeout\n", __func__); 277 return -1; 278 } 279 280 return 0; 281 } 282 283 static int ps3vram_download(struct ps3_system_bus_device *dev, 284 unsigned int src_offset, unsigned int dst_offset, 285 int len, int count) 286 { 287 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 288 289 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 290 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8); 291 ps3vram_out_ring(priv, src_offset); 292 ps3vram_out_ring(priv, XDR_IOIF + dst_offset); 293 ps3vram_out_ring(priv, len); 294 ps3vram_out_ring(priv, len); 295 ps3vram_out_ring(priv, len); 296 ps3vram_out_ring(priv, count); 297 ps3vram_out_ring(priv, (1 << 8) | 1); 298 ps3vram_out_ring(priv, 0); 299 300 ps3vram_notifier_reset(dev); 301 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 302 NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1); 303 ps3vram_out_ring(priv, 0); 304 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x100, 1); 305 ps3vram_out_ring(priv, 0); 306 ps3vram_fire_ring(dev); 307 if (ps3vram_notifier_wait(dev, 200) < 0) { 308 dev_warn(&dev->core, "%s: Notifier timeout\n", __func__); 309 return -1; 310 } 311 312 return 0; 313 } 314 315 static void ps3vram_cache_evict(struct ps3_system_bus_device *dev, int entry) 316 { 317 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 318 struct ps3vram_cache *cache = &priv->cache; 319 320 if (!(cache->tags[entry].flags & CACHE_PAGE_DIRTY)) 321 return; 322 323 dev_dbg(&dev->core, "Flushing %d: 0x%08x\n", entry, 324 cache->tags[entry].address); 325 if (ps3vram_upload(dev, CACHE_OFFSET + entry * cache->page_size, 326 cache->tags[entry].address, DMA_PAGE_SIZE, 327 cache->page_size / DMA_PAGE_SIZE) < 0) { 328 dev_err(&dev->core, 329 "Failed to upload from 0x%x to " "0x%x size 0x%x\n", 330 entry * cache->page_size, cache->tags[entry].address, 331 cache->page_size); 332 } 333 cache->tags[entry].flags &= ~CACHE_PAGE_DIRTY; 334 } 335 336 static void ps3vram_cache_load(struct ps3_system_bus_device *dev, int entry, 337 unsigned int address) 338 { 339 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 340 struct ps3vram_cache *cache = &priv->cache; 341 342 dev_dbg(&dev->core, "Fetching %d: 0x%08x\n", entry, address); 343 if (ps3vram_download(dev, address, 344 CACHE_OFFSET + entry * cache->page_size, 345 DMA_PAGE_SIZE, 346 cache->page_size / DMA_PAGE_SIZE) < 0) { 347 dev_err(&dev->core, 348 "Failed to download from 0x%x to 0x%x size 0x%x\n", 349 address, entry * cache->page_size, cache->page_size); 350 } 351 352 cache->tags[entry].address = address; 353 cache->tags[entry].flags |= CACHE_PAGE_PRESENT; 354 } 355 356 357 static void ps3vram_cache_flush(struct ps3_system_bus_device *dev) 358 { 359 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 360 struct ps3vram_cache *cache = &priv->cache; 361 int i; 362 363 dev_dbg(&dev->core, "FLUSH\n"); 364 for (i = 0; i < cache->page_count; i++) { 365 ps3vram_cache_evict(dev, i); 366 cache->tags[i].flags = 0; 367 } 368 } 369 370 static unsigned int ps3vram_cache_match(struct ps3_system_bus_device *dev, 371 loff_t address) 372 { 373 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 374 struct ps3vram_cache *cache = &priv->cache; 375 unsigned int base; 376 unsigned int offset; 377 int i; 378 static int counter; 379 380 offset = (unsigned int) (address & (cache->page_size - 1)); 381 base = (unsigned int) (address - offset); 382 383 /* fully associative check */ 384 for (i = 0; i < cache->page_count; i++) { 385 if ((cache->tags[i].flags & CACHE_PAGE_PRESENT) && 386 cache->tags[i].address == base) { 387 cache->hit++; 388 dev_dbg(&dev->core, "Found entry %d: 0x%08x\n", i, 389 cache->tags[i].address); 390 return i; 391 } 392 } 393 394 /* choose a random entry */ 395 i = (jiffies + (counter++)) % cache->page_count; 396 dev_dbg(&dev->core, "Using entry %d\n", i); 397 398 ps3vram_cache_evict(dev, i); 399 ps3vram_cache_load(dev, i, base); 400 401 cache->miss++; 402 return i; 403 } 404 405 static int ps3vram_cache_init(struct ps3_system_bus_device *dev) 406 { 407 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 408 409 priv->cache.page_count = CACHE_PAGE_COUNT; 410 priv->cache.page_size = CACHE_PAGE_SIZE; 411 priv->cache.tags = kcalloc(CACHE_PAGE_COUNT, 412 sizeof(struct ps3vram_tag), 413 GFP_KERNEL); 414 if (!priv->cache.tags) 415 return -ENOMEM; 416 417 dev_info(&dev->core, "Created ram cache: %d entries, %d KiB each\n", 418 CACHE_PAGE_COUNT, CACHE_PAGE_SIZE / 1024); 419 420 return 0; 421 } 422 423 static void ps3vram_cache_cleanup(struct ps3_system_bus_device *dev) 424 { 425 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 426 427 ps3vram_cache_flush(dev); 428 kfree(priv->cache.tags); 429 } 430 431 static blk_status_t ps3vram_read(struct ps3_system_bus_device *dev, loff_t from, 432 size_t len, size_t *retlen, u_char *buf) 433 { 434 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 435 unsigned int cached, count; 436 437 dev_dbg(&dev->core, "%s: from=0x%08x len=0x%zx\n", __func__, 438 (unsigned int)from, len); 439 440 if (from >= priv->size) 441 return BLK_STS_IOERR; 442 443 if (len > priv->size - from) 444 len = priv->size - from; 445 446 /* Copy from vram to buf */ 447 count = len; 448 while (count) { 449 unsigned int offset, avail; 450 unsigned int entry; 451 452 offset = (unsigned int) (from & (priv->cache.page_size - 1)); 453 avail = priv->cache.page_size - offset; 454 455 entry = ps3vram_cache_match(dev, from); 456 cached = CACHE_OFFSET + entry * priv->cache.page_size + offset; 457 458 dev_dbg(&dev->core, "%s: from=%08x cached=%08x offset=%08x " 459 "avail=%08x count=%08x\n", __func__, 460 (unsigned int)from, cached, offset, avail, count); 461 462 if (avail > count) 463 avail = count; 464 memcpy(buf, priv->xdr_buf + cached, avail); 465 466 buf += avail; 467 count -= avail; 468 from += avail; 469 } 470 471 *retlen = len; 472 return 0; 473 } 474 475 static blk_status_t ps3vram_write(struct ps3_system_bus_device *dev, loff_t to, 476 size_t len, size_t *retlen, const u_char *buf) 477 { 478 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 479 unsigned int cached, count; 480 481 if (to >= priv->size) 482 return BLK_STS_IOERR; 483 484 if (len > priv->size - to) 485 len = priv->size - to; 486 487 /* Copy from buf to vram */ 488 count = len; 489 while (count) { 490 unsigned int offset, avail; 491 unsigned int entry; 492 493 offset = (unsigned int) (to & (priv->cache.page_size - 1)); 494 avail = priv->cache.page_size - offset; 495 496 entry = ps3vram_cache_match(dev, to); 497 cached = CACHE_OFFSET + entry * priv->cache.page_size + offset; 498 499 dev_dbg(&dev->core, "%s: to=%08x cached=%08x offset=%08x " 500 "avail=%08x count=%08x\n", __func__, (unsigned int)to, 501 cached, offset, avail, count); 502 503 if (avail > count) 504 avail = count; 505 memcpy(priv->xdr_buf + cached, buf, avail); 506 507 priv->cache.tags[entry].flags |= CACHE_PAGE_DIRTY; 508 509 buf += avail; 510 count -= avail; 511 to += avail; 512 } 513 514 *retlen = len; 515 return 0; 516 } 517 518 static int ps3vram_proc_show(struct seq_file *m, void *v) 519 { 520 struct ps3vram_priv *priv = m->private; 521 522 seq_printf(m, "hit:%u\nmiss:%u\n", priv->cache.hit, priv->cache.miss); 523 return 0; 524 } 525 526 static void ps3vram_proc_init(struct ps3_system_bus_device *dev) 527 { 528 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 529 struct proc_dir_entry *pde; 530 531 pde = proc_create_single_data(DEVICE_NAME, 0444, NULL, 532 ps3vram_proc_show, priv); 533 if (!pde) 534 dev_warn(&dev->core, "failed to create /proc entry\n"); 535 } 536 537 static struct bio *ps3vram_do_bio(struct ps3_system_bus_device *dev, 538 struct bio *bio) 539 { 540 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 541 int write = bio_data_dir(bio) == WRITE; 542 const char *op = write ? "write" : "read"; 543 loff_t offset = bio->bi_iter.bi_sector << 9; 544 blk_status_t error = 0; 545 struct bio_vec bvec; 546 struct bvec_iter iter; 547 struct bio *next; 548 549 bio_for_each_segment(bvec, bio, iter) { 550 /* PS3 is ppc64, so we don't handle highmem */ 551 char *ptr = page_address(bvec.bv_page) + bvec.bv_offset; 552 size_t len = bvec.bv_len, retlen; 553 554 dev_dbg(&dev->core, " %s %zu bytes at offset %llu\n", op, 555 len, offset); 556 if (write) 557 error = ps3vram_write(dev, offset, len, &retlen, ptr); 558 else 559 error = ps3vram_read(dev, offset, len, &retlen, ptr); 560 561 if (error) { 562 dev_err(&dev->core, "%s failed\n", op); 563 goto out; 564 } 565 566 if (retlen != len) { 567 dev_err(&dev->core, "Short %s\n", op); 568 error = BLK_STS_IOERR; 569 goto out; 570 } 571 572 offset += len; 573 } 574 575 dev_dbg(&dev->core, "%s completed\n", op); 576 577 out: 578 spin_lock_irq(&priv->lock); 579 bio_list_pop(&priv->list); 580 next = bio_list_peek(&priv->list); 581 spin_unlock_irq(&priv->lock); 582 583 bio->bi_status = error; 584 bio_endio(bio); 585 return next; 586 } 587 588 static blk_qc_t ps3vram_make_request(struct request_queue *q, struct bio *bio) 589 { 590 struct ps3_system_bus_device *dev = q->queuedata; 591 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 592 int busy; 593 594 dev_dbg(&dev->core, "%s\n", __func__); 595 596 blk_queue_split(q, &bio); 597 598 spin_lock_irq(&priv->lock); 599 busy = !bio_list_empty(&priv->list); 600 bio_list_add(&priv->list, bio); 601 spin_unlock_irq(&priv->lock); 602 603 if (busy) 604 return BLK_QC_T_NONE; 605 606 do { 607 bio = ps3vram_do_bio(dev, bio); 608 } while (bio); 609 610 return BLK_QC_T_NONE; 611 } 612 613 static int ps3vram_probe(struct ps3_system_bus_device *dev) 614 { 615 struct ps3vram_priv *priv; 616 int error, status; 617 struct request_queue *queue; 618 struct gendisk *gendisk; 619 u64 ddr_size, ddr_lpar, ctrl_lpar, info_lpar, reports_lpar, 620 reports_size, xdr_lpar; 621 char *rest; 622 623 priv = kzalloc(sizeof(*priv), GFP_KERNEL); 624 if (!priv) { 625 error = -ENOMEM; 626 goto fail; 627 } 628 629 spin_lock_init(&priv->lock); 630 bio_list_init(&priv->list); 631 ps3_system_bus_set_drvdata(dev, priv); 632 633 /* Allocate XDR buffer (1MiB aligned) */ 634 priv->xdr_buf = (void *)__get_free_pages(GFP_KERNEL, 635 get_order(XDR_BUF_SIZE)); 636 if (priv->xdr_buf == NULL) { 637 dev_err(&dev->core, "Could not allocate XDR buffer\n"); 638 error = -ENOMEM; 639 goto fail_free_priv; 640 } 641 642 /* Put FIFO at begginning of XDR buffer */ 643 priv->fifo_base = (u32 *) (priv->xdr_buf + FIFO_OFFSET); 644 priv->fifo_ptr = priv->fifo_base; 645 646 /* XXX: Need to open GPU, in case ps3fb or snd_ps3 aren't loaded */ 647 if (ps3_open_hv_device(dev)) { 648 dev_err(&dev->core, "ps3_open_hv_device failed\n"); 649 error = -EAGAIN; 650 goto out_free_xdr_buf; 651 } 652 653 /* Request memory */ 654 status = -1; 655 ddr_size = ALIGN(memparse(size, &rest), 1024*1024); 656 if (!ddr_size) { 657 dev_err(&dev->core, "Specified size is too small\n"); 658 error = -EINVAL; 659 goto out_close_gpu; 660 } 661 662 while (ddr_size > 0) { 663 status = lv1_gpu_memory_allocate(ddr_size, 0, 0, 0, 0, 664 &priv->memory_handle, 665 &ddr_lpar); 666 if (!status) 667 break; 668 ddr_size -= 1024*1024; 669 } 670 if (status) { 671 dev_err(&dev->core, "lv1_gpu_memory_allocate failed %d\n", 672 status); 673 error = -ENOMEM; 674 goto out_close_gpu; 675 } 676 677 /* Request context */ 678 status = lv1_gpu_context_allocate(priv->memory_handle, 0, 679 &priv->context_handle, &ctrl_lpar, 680 &info_lpar, &reports_lpar, 681 &reports_size); 682 if (status) { 683 dev_err(&dev->core, "lv1_gpu_context_allocate failed %d\n", 684 status); 685 error = -ENOMEM; 686 goto out_free_memory; 687 } 688 689 /* Map XDR buffer to RSX */ 690 xdr_lpar = ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)); 691 status = lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF, 692 xdr_lpar, XDR_BUF_SIZE, 693 CBE_IOPTE_PP_W | CBE_IOPTE_PP_R | 694 CBE_IOPTE_M); 695 if (status) { 696 dev_err(&dev->core, "lv1_gpu_context_iomap failed %d\n", 697 status); 698 error = -ENOMEM; 699 goto out_free_context; 700 } 701 702 priv->ctrl = ioremap(ctrl_lpar, 64 * 1024); 703 if (!priv->ctrl) { 704 dev_err(&dev->core, "ioremap CTRL failed\n"); 705 error = -ENOMEM; 706 goto out_unmap_context; 707 } 708 709 priv->reports = ioremap(reports_lpar, reports_size); 710 if (!priv->reports) { 711 dev_err(&dev->core, "ioremap REPORTS failed\n"); 712 error = -ENOMEM; 713 goto out_unmap_ctrl; 714 } 715 716 mutex_lock(&ps3_gpu_mutex); 717 ps3vram_init_ring(dev); 718 mutex_unlock(&ps3_gpu_mutex); 719 720 priv->size = ddr_size; 721 722 ps3vram_bind(dev); 723 724 mutex_lock(&ps3_gpu_mutex); 725 error = ps3vram_wait_ring(dev, 100); 726 mutex_unlock(&ps3_gpu_mutex); 727 if (error < 0) { 728 dev_err(&dev->core, "Failed to initialize channels\n"); 729 error = -ETIMEDOUT; 730 goto out_unmap_reports; 731 } 732 733 error = ps3vram_cache_init(dev); 734 if (error < 0) { 735 goto out_unmap_reports; 736 } 737 738 ps3vram_proc_init(dev); 739 740 queue = blk_alloc_queue(GFP_KERNEL); 741 if (!queue) { 742 dev_err(&dev->core, "blk_alloc_queue failed\n"); 743 error = -ENOMEM; 744 goto out_cache_cleanup; 745 } 746 747 priv->queue = queue; 748 queue->queuedata = dev; 749 blk_queue_make_request(queue, ps3vram_make_request); 750 blk_queue_max_segments(queue, BLK_MAX_SEGMENTS); 751 blk_queue_max_segment_size(queue, BLK_MAX_SEGMENT_SIZE); 752 blk_queue_max_hw_sectors(queue, BLK_SAFE_MAX_SECTORS); 753 754 gendisk = alloc_disk(1); 755 if (!gendisk) { 756 dev_err(&dev->core, "alloc_disk failed\n"); 757 error = -ENOMEM; 758 goto fail_cleanup_queue; 759 } 760 761 priv->gendisk = gendisk; 762 gendisk->major = ps3vram_major; 763 gendisk->first_minor = 0; 764 gendisk->fops = &ps3vram_fops; 765 gendisk->queue = queue; 766 gendisk->private_data = dev; 767 strlcpy(gendisk->disk_name, DEVICE_NAME, sizeof(gendisk->disk_name)); 768 set_capacity(gendisk, priv->size >> 9); 769 770 dev_info(&dev->core, "%s: Using %llu MiB of GPU memory\n", 771 gendisk->disk_name, get_capacity(gendisk) >> 11); 772 773 device_add_disk(&dev->core, gendisk, NULL); 774 return 0; 775 776 fail_cleanup_queue: 777 blk_cleanup_queue(queue); 778 out_cache_cleanup: 779 remove_proc_entry(DEVICE_NAME, NULL); 780 ps3vram_cache_cleanup(dev); 781 out_unmap_reports: 782 iounmap(priv->reports); 783 out_unmap_ctrl: 784 iounmap(priv->ctrl); 785 out_unmap_context: 786 lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF, xdr_lpar, 787 XDR_BUF_SIZE, CBE_IOPTE_M); 788 out_free_context: 789 lv1_gpu_context_free(priv->context_handle); 790 out_free_memory: 791 lv1_gpu_memory_free(priv->memory_handle); 792 out_close_gpu: 793 ps3_close_hv_device(dev); 794 out_free_xdr_buf: 795 free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE)); 796 fail_free_priv: 797 kfree(priv); 798 ps3_system_bus_set_drvdata(dev, NULL); 799 fail: 800 return error; 801 } 802 803 static int ps3vram_remove(struct ps3_system_bus_device *dev) 804 { 805 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 806 807 del_gendisk(priv->gendisk); 808 put_disk(priv->gendisk); 809 blk_cleanup_queue(priv->queue); 810 remove_proc_entry(DEVICE_NAME, NULL); 811 ps3vram_cache_cleanup(dev); 812 iounmap(priv->reports); 813 iounmap(priv->ctrl); 814 lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF, 815 ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)), 816 XDR_BUF_SIZE, CBE_IOPTE_M); 817 lv1_gpu_context_free(priv->context_handle); 818 lv1_gpu_memory_free(priv->memory_handle); 819 ps3_close_hv_device(dev); 820 free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE)); 821 kfree(priv); 822 ps3_system_bus_set_drvdata(dev, NULL); 823 return 0; 824 } 825 826 static struct ps3_system_bus_driver ps3vram = { 827 .match_id = PS3_MATCH_ID_GPU, 828 .match_sub_id = PS3_MATCH_SUB_ID_GPU_RAMDISK, 829 .core.name = DEVICE_NAME, 830 .core.owner = THIS_MODULE, 831 .probe = ps3vram_probe, 832 .remove = ps3vram_remove, 833 .shutdown = ps3vram_remove, 834 }; 835 836 837 static int __init ps3vram_init(void) 838 { 839 int error; 840 841 if (!firmware_has_feature(FW_FEATURE_PS3_LV1)) 842 return -ENODEV; 843 844 error = register_blkdev(0, DEVICE_NAME); 845 if (error <= 0) { 846 pr_err("%s: register_blkdev failed %d\n", DEVICE_NAME, error); 847 return error; 848 } 849 ps3vram_major = error; 850 851 pr_info("%s: registered block device major %d\n", DEVICE_NAME, 852 ps3vram_major); 853 854 error = ps3_system_bus_driver_register(&ps3vram); 855 if (error) 856 unregister_blkdev(ps3vram_major, DEVICE_NAME); 857 858 return error; 859 } 860 861 static void __exit ps3vram_exit(void) 862 { 863 ps3_system_bus_driver_unregister(&ps3vram); 864 unregister_blkdev(ps3vram_major, DEVICE_NAME); 865 } 866 867 module_init(ps3vram_init); 868 module_exit(ps3vram_exit); 869 870 MODULE_LICENSE("GPL"); 871 MODULE_DESCRIPTION("PS3 Video RAM Storage Driver"); 872 MODULE_AUTHOR("Sony Corporation"); 873 MODULE_ALIAS(PS3_MODULE_ALIAS_GPU_RAMDISK); 874