1 /* 2 * ps3vram - Use extra PS3 video ram as MTD block device. 3 * 4 * Copyright 2009 Sony Corporation 5 * 6 * Based on the MTD ps3vram driver, which is 7 * Copyright (c) 2007-2008 Jim Paris <jim@jtan.com> 8 * Added support RSX DMA Vivien Chappelier <vivien.chappelier@free.fr> 9 */ 10 11 #include <linux/blkdev.h> 12 #include <linux/delay.h> 13 #include <linux/proc_fs.h> 14 #include <linux/seq_file.h> 15 16 #include <asm/firmware.h> 17 #include <asm/lv1call.h> 18 #include <asm/ps3.h> 19 20 21 #define DEVICE_NAME "ps3vram" 22 23 24 #define XDR_BUF_SIZE (2 * 1024 * 1024) /* XDR buffer (must be 1MiB aligned) */ 25 #define XDR_IOIF 0x0c000000 26 27 #define FIFO_BASE XDR_IOIF 28 #define FIFO_SIZE (64 * 1024) 29 30 #define DMA_PAGE_SIZE (4 * 1024) 31 32 #define CACHE_PAGE_SIZE (256 * 1024) 33 #define CACHE_PAGE_COUNT ((XDR_BUF_SIZE - FIFO_SIZE) / CACHE_PAGE_SIZE) 34 35 #define CACHE_OFFSET CACHE_PAGE_SIZE 36 #define FIFO_OFFSET 0 37 38 #define CTRL_PUT 0x10 39 #define CTRL_GET 0x11 40 #define CTRL_TOP 0x15 41 42 #define UPLOAD_SUBCH 1 43 #define DOWNLOAD_SUBCH 2 44 45 #define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c 46 #define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104 47 48 #define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT 0x601 49 50 #define CACHE_PAGE_PRESENT 1 51 #define CACHE_PAGE_DIRTY 2 52 53 struct ps3vram_tag { 54 unsigned int address; 55 unsigned int flags; 56 }; 57 58 struct ps3vram_cache { 59 unsigned int page_count; 60 unsigned int page_size; 61 struct ps3vram_tag *tags; 62 unsigned int hit; 63 unsigned int miss; 64 }; 65 66 struct ps3vram_priv { 67 struct request_queue *queue; 68 struct gendisk *gendisk; 69 70 u64 size; 71 72 u64 memory_handle; 73 u64 context_handle; 74 u32 *ctrl; 75 u32 *reports; 76 u8 __iomem *ddr_base; 77 u8 *xdr_buf; 78 79 u32 *fifo_base; 80 u32 *fifo_ptr; 81 82 struct ps3vram_cache cache; 83 84 /* Used to serialize cache/DMA operations */ 85 struct mutex lock; 86 }; 87 88 89 static int ps3vram_major; 90 91 92 static struct block_device_operations ps3vram_fops = { 93 .owner = THIS_MODULE, 94 }; 95 96 97 #define DMA_NOTIFIER_HANDLE_BASE 0x66604200 /* first DMA notifier handle */ 98 #define DMA_NOTIFIER_OFFSET_BASE 0x1000 /* first DMA notifier offset */ 99 #define DMA_NOTIFIER_SIZE 0x40 100 #define NOTIFIER 7 /* notifier used for completion report */ 101 102 static char *size = "256M"; 103 module_param(size, charp, 0); 104 MODULE_PARM_DESC(size, "memory size"); 105 106 static u32 *ps3vram_get_notifier(u32 *reports, int notifier) 107 { 108 return (void *)reports + DMA_NOTIFIER_OFFSET_BASE + 109 DMA_NOTIFIER_SIZE * notifier; 110 } 111 112 static void ps3vram_notifier_reset(struct ps3_system_bus_device *dev) 113 { 114 struct ps3vram_priv *priv = dev->core.driver_data; 115 u32 *notify = ps3vram_get_notifier(priv->reports, NOTIFIER); 116 int i; 117 118 for (i = 0; i < 4; i++) 119 notify[i] = 0xffffffff; 120 } 121 122 static int ps3vram_notifier_wait(struct ps3_system_bus_device *dev, 123 unsigned int timeout_ms) 124 { 125 struct ps3vram_priv *priv = dev->core.driver_data; 126 u32 *notify = ps3vram_get_notifier(priv->reports, NOTIFIER); 127 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms); 128 129 do { 130 if (!notify[3]) 131 return 0; 132 msleep(1); 133 } while (time_before(jiffies, timeout)); 134 135 return -ETIMEDOUT; 136 } 137 138 static void ps3vram_init_ring(struct ps3_system_bus_device *dev) 139 { 140 struct ps3vram_priv *priv = dev->core.driver_data; 141 142 priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET; 143 priv->ctrl[CTRL_GET] = FIFO_BASE + FIFO_OFFSET; 144 } 145 146 static int ps3vram_wait_ring(struct ps3_system_bus_device *dev, 147 unsigned int timeout_ms) 148 { 149 struct ps3vram_priv *priv = dev->core.driver_data; 150 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms); 151 152 do { 153 if (priv->ctrl[CTRL_PUT] == priv->ctrl[CTRL_GET]) 154 return 0; 155 msleep(1); 156 } while (time_before(jiffies, timeout)); 157 158 dev_warn(&dev->core, "FIFO timeout (%08x/%08x/%08x)\n", 159 priv->ctrl[CTRL_PUT], priv->ctrl[CTRL_GET], 160 priv->ctrl[CTRL_TOP]); 161 162 return -ETIMEDOUT; 163 } 164 165 static void ps3vram_out_ring(struct ps3vram_priv *priv, u32 data) 166 { 167 *(priv->fifo_ptr)++ = data; 168 } 169 170 static void ps3vram_begin_ring(struct ps3vram_priv *priv, u32 chan, u32 tag, 171 u32 size) 172 { 173 ps3vram_out_ring(priv, (size << 18) | (chan << 13) | tag); 174 } 175 176 static void ps3vram_rewind_ring(struct ps3_system_bus_device *dev) 177 { 178 struct ps3vram_priv *priv = dev->core.driver_data; 179 int status; 180 181 ps3vram_out_ring(priv, 0x20000000 | (FIFO_BASE + FIFO_OFFSET)); 182 183 priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET; 184 185 /* asking the HV for a blit will kick the FIFO */ 186 status = lv1_gpu_context_attribute(priv->context_handle, 187 L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT, 0, 188 0, 0, 0); 189 if (status) 190 dev_err(&dev->core, 191 "%s: lv1_gpu_context_attribute failed %d\n", __func__, 192 status); 193 194 priv->fifo_ptr = priv->fifo_base; 195 } 196 197 static void ps3vram_fire_ring(struct ps3_system_bus_device *dev) 198 { 199 struct ps3vram_priv *priv = dev->core.driver_data; 200 int status; 201 202 mutex_lock(&ps3_gpu_mutex); 203 204 priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET + 205 (priv->fifo_ptr - priv->fifo_base) * sizeof(u32); 206 207 /* asking the HV for a blit will kick the FIFO */ 208 status = lv1_gpu_context_attribute(priv->context_handle, 209 L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT, 0, 210 0, 0, 0); 211 if (status) 212 dev_err(&dev->core, 213 "%s: lv1_gpu_context_attribute failed %d\n", __func__, 214 status); 215 216 if ((priv->fifo_ptr - priv->fifo_base) * sizeof(u32) > 217 FIFO_SIZE - 1024) { 218 dev_dbg(&dev->core, "FIFO full, rewinding\n"); 219 ps3vram_wait_ring(dev, 200); 220 ps3vram_rewind_ring(dev); 221 } 222 223 mutex_unlock(&ps3_gpu_mutex); 224 } 225 226 static void ps3vram_bind(struct ps3_system_bus_device *dev) 227 { 228 struct ps3vram_priv *priv = dev->core.driver_data; 229 230 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0, 1); 231 ps3vram_out_ring(priv, 0x31337303); 232 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x180, 3); 233 ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER); 234 ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */ 235 ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */ 236 237 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0, 1); 238 ps3vram_out_ring(priv, 0x3137c0de); 239 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x180, 3); 240 ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER); 241 ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */ 242 ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */ 243 244 ps3vram_fire_ring(dev); 245 } 246 247 static int ps3vram_upload(struct ps3_system_bus_device *dev, 248 unsigned int src_offset, unsigned int dst_offset, 249 int len, int count) 250 { 251 struct ps3vram_priv *priv = dev->core.driver_data; 252 253 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 254 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8); 255 ps3vram_out_ring(priv, XDR_IOIF + src_offset); 256 ps3vram_out_ring(priv, dst_offset); 257 ps3vram_out_ring(priv, len); 258 ps3vram_out_ring(priv, len); 259 ps3vram_out_ring(priv, len); 260 ps3vram_out_ring(priv, count); 261 ps3vram_out_ring(priv, (1 << 8) | 1); 262 ps3vram_out_ring(priv, 0); 263 264 ps3vram_notifier_reset(dev); 265 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 266 NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1); 267 ps3vram_out_ring(priv, 0); 268 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x100, 1); 269 ps3vram_out_ring(priv, 0); 270 ps3vram_fire_ring(dev); 271 if (ps3vram_notifier_wait(dev, 200) < 0) { 272 dev_warn(&dev->core, "%s: Notifier timeout\n", __func__); 273 return -1; 274 } 275 276 return 0; 277 } 278 279 static int ps3vram_download(struct ps3_system_bus_device *dev, 280 unsigned int src_offset, unsigned int dst_offset, 281 int len, int count) 282 { 283 struct ps3vram_priv *priv = dev->core.driver_data; 284 285 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 286 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8); 287 ps3vram_out_ring(priv, src_offset); 288 ps3vram_out_ring(priv, XDR_IOIF + dst_offset); 289 ps3vram_out_ring(priv, len); 290 ps3vram_out_ring(priv, len); 291 ps3vram_out_ring(priv, len); 292 ps3vram_out_ring(priv, count); 293 ps3vram_out_ring(priv, (1 << 8) | 1); 294 ps3vram_out_ring(priv, 0); 295 296 ps3vram_notifier_reset(dev); 297 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 298 NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1); 299 ps3vram_out_ring(priv, 0); 300 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x100, 1); 301 ps3vram_out_ring(priv, 0); 302 ps3vram_fire_ring(dev); 303 if (ps3vram_notifier_wait(dev, 200) < 0) { 304 dev_warn(&dev->core, "%s: Notifier timeout\n", __func__); 305 return -1; 306 } 307 308 return 0; 309 } 310 311 static void ps3vram_cache_evict(struct ps3_system_bus_device *dev, int entry) 312 { 313 struct ps3vram_priv *priv = dev->core.driver_data; 314 struct ps3vram_cache *cache = &priv->cache; 315 316 if (!(cache->tags[entry].flags & CACHE_PAGE_DIRTY)) 317 return; 318 319 dev_dbg(&dev->core, "Flushing %d: 0x%08x\n", entry, 320 cache->tags[entry].address); 321 if (ps3vram_upload(dev, CACHE_OFFSET + entry * cache->page_size, 322 cache->tags[entry].address, DMA_PAGE_SIZE, 323 cache->page_size / DMA_PAGE_SIZE) < 0) { 324 dev_err(&dev->core, 325 "Failed to upload from 0x%x to " "0x%x size 0x%x\n", 326 entry * cache->page_size, cache->tags[entry].address, 327 cache->page_size); 328 } 329 cache->tags[entry].flags &= ~CACHE_PAGE_DIRTY; 330 } 331 332 static void ps3vram_cache_load(struct ps3_system_bus_device *dev, int entry, 333 unsigned int address) 334 { 335 struct ps3vram_priv *priv = dev->core.driver_data; 336 struct ps3vram_cache *cache = &priv->cache; 337 338 dev_dbg(&dev->core, "Fetching %d: 0x%08x\n", entry, address); 339 if (ps3vram_download(dev, address, 340 CACHE_OFFSET + entry * cache->page_size, 341 DMA_PAGE_SIZE, 342 cache->page_size / DMA_PAGE_SIZE) < 0) { 343 dev_err(&dev->core, 344 "Failed to download from 0x%x to 0x%x size 0x%x\n", 345 address, entry * cache->page_size, cache->page_size); 346 } 347 348 cache->tags[entry].address = address; 349 cache->tags[entry].flags |= CACHE_PAGE_PRESENT; 350 } 351 352 353 static void ps3vram_cache_flush(struct ps3_system_bus_device *dev) 354 { 355 struct ps3vram_priv *priv = dev->core.driver_data; 356 struct ps3vram_cache *cache = &priv->cache; 357 int i; 358 359 dev_dbg(&dev->core, "FLUSH\n"); 360 for (i = 0; i < cache->page_count; i++) { 361 ps3vram_cache_evict(dev, i); 362 cache->tags[i].flags = 0; 363 } 364 } 365 366 static unsigned int ps3vram_cache_match(struct ps3_system_bus_device *dev, 367 loff_t address) 368 { 369 struct ps3vram_priv *priv = dev->core.driver_data; 370 struct ps3vram_cache *cache = &priv->cache; 371 unsigned int base; 372 unsigned int offset; 373 int i; 374 static int counter; 375 376 offset = (unsigned int) (address & (cache->page_size - 1)); 377 base = (unsigned int) (address - offset); 378 379 /* fully associative check */ 380 for (i = 0; i < cache->page_count; i++) { 381 if ((cache->tags[i].flags & CACHE_PAGE_PRESENT) && 382 cache->tags[i].address == base) { 383 cache->hit++; 384 dev_dbg(&dev->core, "Found entry %d: 0x%08x\n", i, 385 cache->tags[i].address); 386 return i; 387 } 388 } 389 390 /* choose a random entry */ 391 i = (jiffies + (counter++)) % cache->page_count; 392 dev_dbg(&dev->core, "Using entry %d\n", i); 393 394 ps3vram_cache_evict(dev, i); 395 ps3vram_cache_load(dev, i, base); 396 397 cache->miss++; 398 return i; 399 } 400 401 static int ps3vram_cache_init(struct ps3_system_bus_device *dev) 402 { 403 struct ps3vram_priv *priv = dev->core.driver_data; 404 405 priv->cache.page_count = CACHE_PAGE_COUNT; 406 priv->cache.page_size = CACHE_PAGE_SIZE; 407 priv->cache.tags = kzalloc(sizeof(struct ps3vram_tag) * 408 CACHE_PAGE_COUNT, GFP_KERNEL); 409 if (priv->cache.tags == NULL) { 410 dev_err(&dev->core, "Could not allocate cache tags\n"); 411 return -ENOMEM; 412 } 413 414 dev_info(&dev->core, "Created ram cache: %d entries, %d KiB each\n", 415 CACHE_PAGE_COUNT, CACHE_PAGE_SIZE / 1024); 416 417 return 0; 418 } 419 420 static void ps3vram_cache_cleanup(struct ps3_system_bus_device *dev) 421 { 422 struct ps3vram_priv *priv = dev->core.driver_data; 423 424 ps3vram_cache_flush(dev); 425 kfree(priv->cache.tags); 426 } 427 428 static int ps3vram_read(struct ps3_system_bus_device *dev, loff_t from, 429 size_t len, size_t *retlen, u_char *buf) 430 { 431 struct ps3vram_priv *priv = dev->core.driver_data; 432 unsigned int cached, count; 433 434 dev_dbg(&dev->core, "%s: from=0x%08x len=0x%zx\n", __func__, 435 (unsigned int)from, len); 436 437 if (from >= priv->size) 438 return -EIO; 439 440 if (len > priv->size - from) 441 len = priv->size - from; 442 443 /* Copy from vram to buf */ 444 count = len; 445 while (count) { 446 unsigned int offset, avail; 447 unsigned int entry; 448 449 offset = (unsigned int) (from & (priv->cache.page_size - 1)); 450 avail = priv->cache.page_size - offset; 451 452 mutex_lock(&priv->lock); 453 454 entry = ps3vram_cache_match(dev, from); 455 cached = CACHE_OFFSET + entry * priv->cache.page_size + offset; 456 457 dev_dbg(&dev->core, "%s: from=%08x cached=%08x offset=%08x " 458 "avail=%08x count=%08x\n", __func__, 459 (unsigned int)from, cached, offset, avail, count); 460 461 if (avail > count) 462 avail = count; 463 memcpy(buf, priv->xdr_buf + cached, avail); 464 465 mutex_unlock(&priv->lock); 466 467 buf += avail; 468 count -= avail; 469 from += avail; 470 } 471 472 *retlen = len; 473 return 0; 474 } 475 476 static int ps3vram_write(struct ps3_system_bus_device *dev, loff_t to, 477 size_t len, size_t *retlen, const u_char *buf) 478 { 479 struct ps3vram_priv *priv = dev->core.driver_data; 480 unsigned int cached, count; 481 482 if (to >= priv->size) 483 return -EIO; 484 485 if (len > priv->size - to) 486 len = priv->size - to; 487 488 /* Copy from buf to vram */ 489 count = len; 490 while (count) { 491 unsigned int offset, avail; 492 unsigned int entry; 493 494 offset = (unsigned int) (to & (priv->cache.page_size - 1)); 495 avail = priv->cache.page_size - offset; 496 497 mutex_lock(&priv->lock); 498 499 entry = ps3vram_cache_match(dev, to); 500 cached = CACHE_OFFSET + entry * priv->cache.page_size + offset; 501 502 dev_dbg(&dev->core, "%s: to=%08x cached=%08x offset=%08x " 503 "avail=%08x count=%08x\n", __func__, (unsigned int)to, 504 cached, offset, avail, count); 505 506 if (avail > count) 507 avail = count; 508 memcpy(priv->xdr_buf + cached, buf, avail); 509 510 priv->cache.tags[entry].flags |= CACHE_PAGE_DIRTY; 511 512 mutex_unlock(&priv->lock); 513 514 buf += avail; 515 count -= avail; 516 to += avail; 517 } 518 519 *retlen = len; 520 return 0; 521 } 522 523 static int ps3vram_proc_show(struct seq_file *m, void *v) 524 { 525 struct ps3vram_priv *priv = m->private; 526 527 seq_printf(m, "hit:%u\nmiss:%u\n", priv->cache.hit, priv->cache.miss); 528 return 0; 529 } 530 531 static int ps3vram_proc_open(struct inode *inode, struct file *file) 532 { 533 return single_open(file, ps3vram_proc_show, PDE(inode)->data); 534 } 535 536 static const struct file_operations ps3vram_proc_fops = { 537 .owner = THIS_MODULE, 538 .open = ps3vram_proc_open, 539 .read = seq_read, 540 .llseek = seq_lseek, 541 .release = single_release, 542 }; 543 544 static void __devinit ps3vram_proc_init(struct ps3_system_bus_device *dev) 545 { 546 struct ps3vram_priv *priv = dev->core.driver_data; 547 struct proc_dir_entry *pde; 548 549 pde = proc_create(DEVICE_NAME, 0444, NULL, &ps3vram_proc_fops); 550 if (!pde) { 551 dev_warn(&dev->core, "failed to create /proc entry\n"); 552 return; 553 } 554 555 pde->owner = THIS_MODULE; 556 pde->data = priv; 557 } 558 559 static int ps3vram_make_request(struct request_queue *q, struct bio *bio) 560 { 561 struct ps3_system_bus_device *dev = q->queuedata; 562 int write = bio_data_dir(bio) == WRITE; 563 const char *op = write ? "write" : "read"; 564 loff_t offset = bio->bi_sector << 9; 565 int error = 0; 566 struct bio_vec *bvec; 567 unsigned int i; 568 569 dev_dbg(&dev->core, "%s\n", __func__); 570 571 bio_for_each_segment(bvec, bio, i) { 572 /* PS3 is ppc64, so we don't handle highmem */ 573 char *ptr = page_address(bvec->bv_page) + bvec->bv_offset; 574 size_t len = bvec->bv_len, retlen; 575 576 dev_dbg(&dev->core, " %s %zu bytes at offset %llu\n", op, 577 len, offset); 578 if (write) 579 error = ps3vram_write(dev, offset, len, &retlen, ptr); 580 else 581 error = ps3vram_read(dev, offset, len, &retlen, ptr); 582 583 if (error) { 584 dev_err(&dev->core, "%s failed\n", op); 585 goto out; 586 } 587 588 if (retlen != len) { 589 dev_err(&dev->core, "Short %s\n", op); 590 goto out; 591 } 592 593 offset += len; 594 } 595 596 dev_dbg(&dev->core, "%s completed\n", op); 597 598 out: 599 bio_endio(bio, error); 600 return 0; 601 } 602 603 static int __devinit ps3vram_probe(struct ps3_system_bus_device *dev) 604 { 605 struct ps3vram_priv *priv; 606 int error, status; 607 struct request_queue *queue; 608 struct gendisk *gendisk; 609 u64 ddr_lpar, ctrl_lpar, info_lpar, reports_lpar, ddr_size, 610 reports_size; 611 char *rest; 612 613 priv = kzalloc(sizeof(*priv), GFP_KERNEL); 614 if (!priv) { 615 error = -ENOMEM; 616 goto fail; 617 } 618 619 mutex_init(&priv->lock); 620 dev->core.driver_data = priv; 621 622 priv = dev->core.driver_data; 623 624 /* Allocate XDR buffer (1MiB aligned) */ 625 priv->xdr_buf = (void *)__get_free_pages(GFP_KERNEL, 626 get_order(XDR_BUF_SIZE)); 627 if (priv->xdr_buf == NULL) { 628 dev_err(&dev->core, "Could not allocate XDR buffer\n"); 629 error = -ENOMEM; 630 goto fail_free_priv; 631 } 632 633 /* Put FIFO at begginning of XDR buffer */ 634 priv->fifo_base = (u32 *) (priv->xdr_buf + FIFO_OFFSET); 635 priv->fifo_ptr = priv->fifo_base; 636 637 /* XXX: Need to open GPU, in case ps3fb or snd_ps3 aren't loaded */ 638 if (ps3_open_hv_device(dev)) { 639 dev_err(&dev->core, "ps3_open_hv_device failed\n"); 640 error = -EAGAIN; 641 goto out_close_gpu; 642 } 643 644 /* Request memory */ 645 status = -1; 646 ddr_size = ALIGN(memparse(size, &rest), 1024*1024); 647 if (!ddr_size) { 648 dev_err(&dev->core, "Specified size is too small\n"); 649 error = -EINVAL; 650 goto out_close_gpu; 651 } 652 653 while (ddr_size > 0) { 654 status = lv1_gpu_memory_allocate(ddr_size, 0, 0, 0, 0, 655 &priv->memory_handle, 656 &ddr_lpar); 657 if (!status) 658 break; 659 ddr_size -= 1024*1024; 660 } 661 if (status) { 662 dev_err(&dev->core, "lv1_gpu_memory_allocate failed %d\n", 663 status); 664 error = -ENOMEM; 665 goto out_free_xdr_buf; 666 } 667 668 /* Request context */ 669 status = lv1_gpu_context_allocate(priv->memory_handle, 0, 670 &priv->context_handle, &ctrl_lpar, 671 &info_lpar, &reports_lpar, 672 &reports_size); 673 if (status) { 674 dev_err(&dev->core, "lv1_gpu_context_allocate failed %d\n", 675 status); 676 error = -ENOMEM; 677 goto out_free_memory; 678 } 679 680 /* Map XDR buffer to RSX */ 681 status = lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF, 682 ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)), 683 XDR_BUF_SIZE, 0); 684 if (status) { 685 dev_err(&dev->core, "lv1_gpu_context_iomap failed %d\n", 686 status); 687 error = -ENOMEM; 688 goto out_free_context; 689 } 690 691 priv->ddr_base = ioremap_flags(ddr_lpar, ddr_size, _PAGE_NO_CACHE); 692 693 if (!priv->ddr_base) { 694 dev_err(&dev->core, "ioremap DDR failed\n"); 695 error = -ENOMEM; 696 goto out_free_context; 697 } 698 699 priv->ctrl = ioremap(ctrl_lpar, 64 * 1024); 700 if (!priv->ctrl) { 701 dev_err(&dev->core, "ioremap CTRL failed\n"); 702 error = -ENOMEM; 703 goto out_unmap_vram; 704 } 705 706 priv->reports = ioremap(reports_lpar, reports_size); 707 if (!priv->reports) { 708 dev_err(&dev->core, "ioremap REPORTS failed\n"); 709 error = -ENOMEM; 710 goto out_unmap_ctrl; 711 } 712 713 mutex_lock(&ps3_gpu_mutex); 714 ps3vram_init_ring(dev); 715 mutex_unlock(&ps3_gpu_mutex); 716 717 priv->size = ddr_size; 718 719 ps3vram_bind(dev); 720 721 mutex_lock(&ps3_gpu_mutex); 722 error = ps3vram_wait_ring(dev, 100); 723 mutex_unlock(&ps3_gpu_mutex); 724 if (error < 0) { 725 dev_err(&dev->core, "Failed to initialize channels\n"); 726 error = -ETIMEDOUT; 727 goto out_unmap_reports; 728 } 729 730 ps3vram_cache_init(dev); 731 ps3vram_proc_init(dev); 732 733 queue = blk_alloc_queue(GFP_KERNEL); 734 if (!queue) { 735 dev_err(&dev->core, "blk_alloc_queue failed\n"); 736 error = -ENOMEM; 737 goto out_cache_cleanup; 738 } 739 740 priv->queue = queue; 741 queue->queuedata = dev; 742 blk_queue_make_request(queue, ps3vram_make_request); 743 blk_queue_max_phys_segments(queue, MAX_PHYS_SEGMENTS); 744 blk_queue_max_hw_segments(queue, MAX_HW_SEGMENTS); 745 blk_queue_max_segment_size(queue, MAX_SEGMENT_SIZE); 746 blk_queue_max_sectors(queue, SAFE_MAX_SECTORS); 747 748 gendisk = alloc_disk(1); 749 if (!gendisk) { 750 dev_err(&dev->core, "alloc_disk failed\n"); 751 error = -ENOMEM; 752 goto fail_cleanup_queue; 753 } 754 755 priv->gendisk = gendisk; 756 gendisk->major = ps3vram_major; 757 gendisk->first_minor = 0; 758 gendisk->fops = &ps3vram_fops; 759 gendisk->queue = queue; 760 gendisk->private_data = dev; 761 gendisk->driverfs_dev = &dev->core; 762 strlcpy(gendisk->disk_name, DEVICE_NAME, sizeof(gendisk->disk_name)); 763 set_capacity(gendisk, priv->size >> 9); 764 765 dev_info(&dev->core, "%s: Using %lu MiB of GPU memory\n", 766 gendisk->disk_name, get_capacity(gendisk) >> 11); 767 768 add_disk(gendisk); 769 return 0; 770 771 fail_cleanup_queue: 772 blk_cleanup_queue(queue); 773 out_cache_cleanup: 774 remove_proc_entry(DEVICE_NAME, NULL); 775 ps3vram_cache_cleanup(dev); 776 out_unmap_reports: 777 iounmap(priv->reports); 778 out_unmap_ctrl: 779 iounmap(priv->ctrl); 780 out_unmap_vram: 781 iounmap(priv->ddr_base); 782 out_free_context: 783 lv1_gpu_context_free(priv->context_handle); 784 out_free_memory: 785 lv1_gpu_memory_free(priv->memory_handle); 786 out_close_gpu: 787 ps3_close_hv_device(dev); 788 out_free_xdr_buf: 789 free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE)); 790 fail_free_priv: 791 kfree(priv); 792 dev->core.driver_data = NULL; 793 fail: 794 return error; 795 } 796 797 static int ps3vram_remove(struct ps3_system_bus_device *dev) 798 { 799 struct ps3vram_priv *priv = dev->core.driver_data; 800 801 del_gendisk(priv->gendisk); 802 put_disk(priv->gendisk); 803 blk_cleanup_queue(priv->queue); 804 remove_proc_entry(DEVICE_NAME, NULL); 805 ps3vram_cache_cleanup(dev); 806 iounmap(priv->reports); 807 iounmap(priv->ctrl); 808 iounmap(priv->ddr_base); 809 lv1_gpu_context_free(priv->context_handle); 810 lv1_gpu_memory_free(priv->memory_handle); 811 ps3_close_hv_device(dev); 812 free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE)); 813 kfree(priv); 814 dev->core.driver_data = NULL; 815 return 0; 816 } 817 818 static struct ps3_system_bus_driver ps3vram = { 819 .match_id = PS3_MATCH_ID_GPU, 820 .match_sub_id = PS3_MATCH_SUB_ID_GPU_RAMDISK, 821 .core.name = DEVICE_NAME, 822 .core.owner = THIS_MODULE, 823 .probe = ps3vram_probe, 824 .remove = ps3vram_remove, 825 .shutdown = ps3vram_remove, 826 }; 827 828 829 static int __init ps3vram_init(void) 830 { 831 int error; 832 833 if (!firmware_has_feature(FW_FEATURE_PS3_LV1)) 834 return -ENODEV; 835 836 error = register_blkdev(0, DEVICE_NAME); 837 if (error <= 0) { 838 pr_err("%s: register_blkdev failed %d\n", DEVICE_NAME, error); 839 return error; 840 } 841 ps3vram_major = error; 842 843 pr_info("%s: registered block device major %d\n", DEVICE_NAME, 844 ps3vram_major); 845 846 error = ps3_system_bus_driver_register(&ps3vram); 847 if (error) 848 unregister_blkdev(ps3vram_major, DEVICE_NAME); 849 850 return error; 851 } 852 853 static void __exit ps3vram_exit(void) 854 { 855 ps3_system_bus_driver_unregister(&ps3vram); 856 unregister_blkdev(ps3vram_major, DEVICE_NAME); 857 } 858 859 module_init(ps3vram_init); 860 module_exit(ps3vram_exit); 861 862 MODULE_LICENSE("GPL"); 863 MODULE_DESCRIPTION("PS3 Video RAM Storage Driver"); 864 MODULE_AUTHOR("Sony Corporation"); 865 MODULE_ALIAS(PS3_MODULE_ALIAS_GPU_RAMDISK); 866