1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * mtip32xx.h - Header file for the P320 SSD Block Driver 4 * Copyright (C) 2011 Micron Technology, Inc. 5 * 6 * Portions of this code were derived from works subjected to the 7 * following copyright: 8 * Copyright (C) 2009 Integrated Device Technology, Inc. 9 */ 10 11 #ifndef __MTIP32XX_H__ 12 #define __MTIP32XX_H__ 13 14 #include <linux/spinlock.h> 15 #include <linux/rwsem.h> 16 #include <linux/ata.h> 17 #include <linux/interrupt.h> 18 19 /* Offset of Subsystem Device ID in pci confoguration space */ 20 #define PCI_SUBSYSTEM_DEVICEID 0x2E 21 22 /* offset of Device Control register in PCIe extended capabilites space */ 23 #define PCIE_CONFIG_EXT_DEVICE_CONTROL_OFFSET 0x48 24 25 /* check for erase mode support during secure erase */ 26 #define MTIP_SEC_ERASE_MODE 0x2 27 28 /* # of times to retry timed out/failed IOs */ 29 #define MTIP_MAX_RETRIES 2 30 31 /* Various timeout values in ms */ 32 #define MTIP_NCQ_CMD_TIMEOUT_MS 15000 33 #define MTIP_IOCTL_CMD_TIMEOUT_MS 5000 34 #define MTIP_INT_CMD_TIMEOUT_MS 5000 35 #define MTIP_QUIESCE_IO_TIMEOUT_MS (MTIP_NCQ_CMD_TIMEOUT_MS * \ 36 (MTIP_MAX_RETRIES + 1)) 37 38 /* check for timeouts every 500ms */ 39 #define MTIP_TIMEOUT_CHECK_PERIOD 500 40 41 /* ftl rebuild */ 42 #define MTIP_FTL_REBUILD_OFFSET 142 43 #define MTIP_FTL_REBUILD_MAGIC 0xED51 44 #define MTIP_FTL_REBUILD_TIMEOUT_MS 2400000 45 46 /* unaligned IO handling */ 47 #define MTIP_MAX_UNALIGNED_SLOTS 2 48 49 /* Macro to extract the tag bit number from a tag value. */ 50 #define MTIP_TAG_BIT(tag) (tag & 0x1F) 51 52 /* 53 * Macro to extract the tag index from a tag value. The index 54 * is used to access the correct s_active/Command Issue register based 55 * on the tag value. 56 */ 57 #define MTIP_TAG_INDEX(tag) (tag >> 5) 58 59 /* 60 * Maximum number of scatter gather entries 61 * a single command may have. 62 */ 63 #define MTIP_MAX_SG 504 64 65 /* 66 * Maximum number of slot groups (Command Issue & s_active registers) 67 * NOTE: This is the driver maximum; check dd->slot_groups for actual value. 68 */ 69 #define MTIP_MAX_SLOT_GROUPS 8 70 71 /* Internal command tag. */ 72 #define MTIP_TAG_INTERNAL 0 73 74 /* Micron Vendor ID & P320x SSD Device ID */ 75 #define PCI_VENDOR_ID_MICRON 0x1344 76 #define P320H_DEVICE_ID 0x5150 77 #define P320M_DEVICE_ID 0x5151 78 #define P320S_DEVICE_ID 0x5152 79 #define P325M_DEVICE_ID 0x5153 80 #define P420H_DEVICE_ID 0x5160 81 #define P420M_DEVICE_ID 0x5161 82 #define P425M_DEVICE_ID 0x5163 83 84 /* Driver name and version strings */ 85 #define MTIP_DRV_NAME "mtip32xx" 86 #define MTIP_DRV_VERSION "1.3.1" 87 88 /* Maximum number of minor device numbers per device. */ 89 #define MTIP_MAX_MINORS 16 90 91 /* Maximum number of supported command slots. */ 92 #define MTIP_MAX_COMMAND_SLOTS (MTIP_MAX_SLOT_GROUPS * 32) 93 94 /* 95 * Per-tag bitfield size in longs. 96 * Linux bit manipulation functions 97 * (i.e. test_and_set_bit, find_next_zero_bit) 98 * manipulate memory in longs, so we try to make the math work. 99 * take the slot groups and find the number of longs, rounding up. 100 * Careful! i386 and x86_64 use different size longs! 101 */ 102 #define U32_PER_LONG (sizeof(long) / sizeof(u32)) 103 #define SLOTBITS_IN_LONGS ((MTIP_MAX_SLOT_GROUPS + \ 104 (U32_PER_LONG-1))/U32_PER_LONG) 105 106 /* BAR number used to access the HBA registers. */ 107 #define MTIP_ABAR 5 108 109 #ifdef DEBUG 110 #define dbg_printk(format, arg...) \ 111 printk(pr_fmt(format), ##arg); 112 #else 113 #define dbg_printk(format, arg...) 114 #endif 115 116 #define MTIP_DFS_MAX_BUF_SIZE 1024 117 118 enum { 119 /* below are bit numbers in 'flags' defined in mtip_port */ 120 MTIP_PF_IC_ACTIVE_BIT = 0, /* pio/ioctl */ 121 MTIP_PF_EH_ACTIVE_BIT = 1, /* error handling */ 122 MTIP_PF_SE_ACTIVE_BIT = 2, /* secure erase */ 123 MTIP_PF_DM_ACTIVE_BIT = 3, /* download microcde */ 124 MTIP_PF_TO_ACTIVE_BIT = 9, /* timeout handling */ 125 MTIP_PF_PAUSE_IO = ((1 << MTIP_PF_IC_ACTIVE_BIT) | 126 (1 << MTIP_PF_EH_ACTIVE_BIT) | 127 (1 << MTIP_PF_SE_ACTIVE_BIT) | 128 (1 << MTIP_PF_DM_ACTIVE_BIT) | 129 (1 << MTIP_PF_TO_ACTIVE_BIT)), 130 MTIP_PF_HOST_CAP_64 = 10, /* cache HOST_CAP_64 */ 131 132 MTIP_PF_SVC_THD_ACTIVE_BIT = 4, 133 MTIP_PF_ISSUE_CMDS_BIT = 5, 134 MTIP_PF_REBUILD_BIT = 6, 135 MTIP_PF_SVC_THD_STOP_BIT = 8, 136 137 MTIP_PF_SVC_THD_WORK = ((1 << MTIP_PF_EH_ACTIVE_BIT) | 138 (1 << MTIP_PF_ISSUE_CMDS_BIT) | 139 (1 << MTIP_PF_REBUILD_BIT) | 140 (1 << MTIP_PF_SVC_THD_STOP_BIT) | 141 (1 << MTIP_PF_TO_ACTIVE_BIT)), 142 143 /* below are bit numbers in 'dd_flag' defined in driver_data */ 144 MTIP_DDF_SEC_LOCK_BIT = 0, 145 MTIP_DDF_REMOVE_PENDING_BIT = 1, 146 MTIP_DDF_OVER_TEMP_BIT = 2, 147 MTIP_DDF_WRITE_PROTECT_BIT = 3, 148 MTIP_DDF_CLEANUP_BIT = 5, 149 MTIP_DDF_RESUME_BIT = 6, 150 MTIP_DDF_INIT_DONE_BIT = 7, 151 MTIP_DDF_REBUILD_FAILED_BIT = 8, 152 153 MTIP_DDF_STOP_IO = ((1 << MTIP_DDF_REMOVE_PENDING_BIT) | 154 (1 << MTIP_DDF_SEC_LOCK_BIT) | 155 (1 << MTIP_DDF_OVER_TEMP_BIT) | 156 (1 << MTIP_DDF_WRITE_PROTECT_BIT) | 157 (1 << MTIP_DDF_REBUILD_FAILED_BIT)), 158 159 }; 160 161 struct smart_attr { 162 u8 attr_id; 163 __le16 flags; 164 u8 cur; 165 u8 worst; 166 __le32 data; 167 u8 res[3]; 168 } __packed; 169 170 struct mtip_work { 171 struct work_struct work; 172 void *port; 173 int cpu_binding; 174 u32 completed; 175 } ____cacheline_aligned_in_smp; 176 177 #define DEFINE_HANDLER(group) \ 178 void mtip_workq_sdbf##group(struct work_struct *work) \ 179 { \ 180 struct mtip_work *w = (struct mtip_work *) work; \ 181 mtip_workq_sdbfx(w->port, group, w->completed); \ 182 } 183 184 /* Register Frame Information Structure (FIS), host to device. */ 185 struct host_to_dev_fis { 186 /* 187 * FIS type. 188 * - 27h Register FIS, host to device. 189 * - 34h Register FIS, device to host. 190 * - 39h DMA Activate FIS, device to host. 191 * - 41h DMA Setup FIS, bi-directional. 192 * - 46h Data FIS, bi-directional. 193 * - 58h BIST Activate FIS, bi-directional. 194 * - 5Fh PIO Setup FIS, device to host. 195 * - A1h Set Device Bits FIS, device to host. 196 */ 197 unsigned char type; 198 unsigned char opts; 199 unsigned char command; 200 unsigned char features; 201 202 union { 203 unsigned char lba_low; 204 unsigned char sector; 205 }; 206 union { 207 unsigned char lba_mid; 208 unsigned char cyl_low; 209 }; 210 union { 211 unsigned char lba_hi; 212 unsigned char cyl_hi; 213 }; 214 union { 215 unsigned char device; 216 unsigned char head; 217 }; 218 219 union { 220 unsigned char lba_low_ex; 221 unsigned char sector_ex; 222 }; 223 union { 224 unsigned char lba_mid_ex; 225 unsigned char cyl_low_ex; 226 }; 227 union { 228 unsigned char lba_hi_ex; 229 unsigned char cyl_hi_ex; 230 }; 231 unsigned char features_ex; 232 233 unsigned char sect_count; 234 unsigned char sect_cnt_ex; 235 unsigned char res2; 236 unsigned char control; 237 238 unsigned int res3; 239 }; 240 241 /* Command header structure. */ 242 struct mtip_cmd_hdr { 243 /* 244 * Command options. 245 * - Bits 31:16 Number of PRD entries. 246 * - Bits 15:8 Unused in this implementation. 247 * - Bit 7 Prefetch bit, informs the drive to prefetch PRD entries. 248 * - Bit 6 Write bit, should be set when writing data to the device. 249 * - Bit 5 Unused in this implementation. 250 * - Bits 4:0 Length of the command FIS in DWords (DWord = 4 bytes). 251 */ 252 __le32 opts; 253 /* This field is unsed when using NCQ. */ 254 union { 255 __le32 byte_count; 256 __le32 status; 257 }; 258 /* 259 * Lower 32 bits of the command table address associated with this 260 * header. The command table addresses must be 128 byte aligned. 261 */ 262 __le32 ctba; 263 /* 264 * If 64 bit addressing is used this field is the upper 32 bits 265 * of the command table address associated with this command. 266 */ 267 __le32 ctbau; 268 /* Reserved and unused. */ 269 u32 res[4]; 270 }; 271 272 /* Command scatter gather structure (PRD). */ 273 struct mtip_cmd_sg { 274 /* 275 * Low 32 bits of the data buffer address. For P320 this 276 * address must be 8 byte aligned signified by bits 2:0 being 277 * set to 0. 278 */ 279 __le32 dba; 280 /* 281 * When 64 bit addressing is used this field is the upper 282 * 32 bits of the data buffer address. 283 */ 284 __le32 dba_upper; 285 /* Unused. */ 286 __le32 reserved; 287 /* 288 * Bit 31: interrupt when this data block has been transferred. 289 * Bits 30..22: reserved 290 * Bits 21..0: byte count (minus 1). For P320 the byte count must be 291 * 8 byte aligned signified by bits 2:0 being set to 1. 292 */ 293 __le32 info; 294 }; 295 struct mtip_port; 296 297 struct mtip_int_cmd; 298 299 /* Structure used to describe a command. */ 300 struct mtip_cmd { 301 void *command; /* ptr to command table entry */ 302 303 dma_addr_t command_dma; /* corresponding physical address */ 304 305 int scatter_ents; /* Number of scatter list entries used */ 306 307 int unaligned; /* command is unaligned on 4k boundary */ 308 309 union { 310 struct scatterlist sg[MTIP_MAX_SG]; /* Scatter list entries */ 311 struct mtip_int_cmd *icmd; 312 }; 313 314 int retries; /* The number of retries left for this command. */ 315 316 int direction; /* Data transfer direction */ 317 blk_status_t status; 318 }; 319 320 /* Structure used to describe a port. */ 321 struct mtip_port { 322 /* Pointer back to the driver data for this port. */ 323 struct driver_data *dd; 324 /* 325 * Used to determine if the data pointed to by the 326 * identify field is valid. 327 */ 328 unsigned long identify_valid; 329 /* Base address of the memory mapped IO for the port. */ 330 void __iomem *mmio; 331 /* Array of pointers to the memory mapped s_active registers. */ 332 void __iomem *s_active[MTIP_MAX_SLOT_GROUPS]; 333 /* Array of pointers to the memory mapped completed registers. */ 334 void __iomem *completed[MTIP_MAX_SLOT_GROUPS]; 335 /* Array of pointers to the memory mapped Command Issue registers. */ 336 void __iomem *cmd_issue[MTIP_MAX_SLOT_GROUPS]; 337 /* 338 * Pointer to the beginning of the command header memory as used 339 * by the driver. 340 */ 341 void *command_list; 342 /* 343 * Pointer to the beginning of the command header memory as used 344 * by the DMA. 345 */ 346 dma_addr_t command_list_dma; 347 /* 348 * Pointer to the beginning of the RX FIS memory as used 349 * by the driver. 350 */ 351 void *rxfis; 352 /* 353 * Pointer to the beginning of the RX FIS memory as used 354 * by the DMA. 355 */ 356 dma_addr_t rxfis_dma; 357 /* 358 * Pointer to the DMA region for RX Fis, Identify, RLE10, and SMART 359 */ 360 void *block1; 361 /* 362 * DMA address of region for RX Fis, Identify, RLE10, and SMART 363 */ 364 dma_addr_t block1_dma; 365 /* 366 * Pointer to the beginning of the identify data memory as used 367 * by the driver. 368 */ 369 u16 *identify; 370 /* 371 * Pointer to the beginning of the identify data memory as used 372 * by the DMA. 373 */ 374 dma_addr_t identify_dma; 375 /* 376 * Pointer to the beginning of a sector buffer that is used 377 * by the driver when issuing internal commands. 378 */ 379 u16 *sector_buffer; 380 /* 381 * Pointer to the beginning of a sector buffer that is used 382 * by the DMA when the driver issues internal commands. 383 */ 384 dma_addr_t sector_buffer_dma; 385 386 u16 *log_buf; 387 dma_addr_t log_buf_dma; 388 389 u8 *smart_buf; 390 dma_addr_t smart_buf_dma; 391 392 /* 393 * used to queue commands when an internal command is in progress 394 * or error handling is active 395 */ 396 unsigned long cmds_to_issue[SLOTBITS_IN_LONGS]; 397 /* Used by mtip_service_thread to wait for an event */ 398 wait_queue_head_t svc_wait; 399 /* 400 * indicates the state of the port. Also, helps the service thread 401 * to determine its action on wake up. 402 */ 403 unsigned long flags; 404 /* 405 * Timer used to complete commands that have been active for too long. 406 */ 407 unsigned long ic_pause_timer; 408 409 /* Counter to control queue depth of unaligned IOs */ 410 atomic_t cmd_slot_unal; 411 412 /* Spinlock for working around command-issue bug. */ 413 spinlock_t cmd_issue_lock[MTIP_MAX_SLOT_GROUPS]; 414 }; 415 416 /* 417 * Driver private data structure. 418 * 419 * One structure is allocated per probed device. 420 */ 421 struct driver_data { 422 void __iomem *mmio; /* Base address of the HBA registers. */ 423 424 int major; /* Major device number. */ 425 426 int instance; /* Instance number. First device probed is 0, ... */ 427 428 struct gendisk *disk; /* Pointer to our gendisk structure. */ 429 430 struct pci_dev *pdev; /* Pointer to the PCI device structure. */ 431 432 struct request_queue *queue; /* Our request queue. */ 433 434 struct blk_mq_tag_set tags; /* blk_mq tags */ 435 436 struct mtip_port *port; /* Pointer to the port data structure. */ 437 438 unsigned product_type; /* magic value declaring the product type */ 439 440 unsigned slot_groups; /* number of slot groups the product supports */ 441 442 unsigned long index; /* Index to determine the disk name */ 443 444 unsigned long dd_flag; /* NOTE: use atomic bit operations on this */ 445 446 struct task_struct *mtip_svc_handler; /* task_struct of svc thd */ 447 448 struct dentry *dfs_node; 449 450 bool sr; 451 452 int numa_node; /* NUMA support */ 453 454 char workq_name[32]; 455 456 struct workqueue_struct *isr_workq; 457 458 atomic_t irq_workers_active; 459 460 struct mtip_work work[MTIP_MAX_SLOT_GROUPS]; 461 462 int isr_binding; 463 464 int unal_qdepth; /* qdepth of unaligned IO queue */ 465 }; 466 467 #endif 468