1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // Register map access API 4 // 5 // Copyright 2011 Wolfson Microelectronics plc 6 // 7 // Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 8 9 #include <linux/device.h> 10 #include <linux/slab.h> 11 #include <linux/export.h> 12 #include <linux/mutex.h> 13 #include <linux/err.h> 14 #include <linux/property.h> 15 #include <linux/rbtree.h> 16 #include <linux/sched.h> 17 #include <linux/delay.h> 18 #include <linux/log2.h> 19 #include <linux/hwspinlock.h> 20 #include <asm/unaligned.h> 21 22 #define CREATE_TRACE_POINTS 23 #include "trace.h" 24 25 #include "internal.h" 26 27 /* 28 * Sometimes for failures during very early init the trace 29 * infrastructure isn't available early enough to be used. For this 30 * sort of problem defining LOG_DEVICE will add printks for basic 31 * register I/O on a specific device. 32 */ 33 #undef LOG_DEVICE 34 35 #ifdef LOG_DEVICE 36 static inline bool regmap_should_log(struct regmap *map) 37 { 38 return (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0); 39 } 40 #else 41 static inline bool regmap_should_log(struct regmap *map) { return false; } 42 #endif 43 44 45 static int _regmap_update_bits(struct regmap *map, unsigned int reg, 46 unsigned int mask, unsigned int val, 47 bool *change, bool force_write); 48 49 static int _regmap_bus_reg_read(void *context, unsigned int reg, 50 unsigned int *val); 51 static int _regmap_bus_read(void *context, unsigned int reg, 52 unsigned int *val); 53 static int _regmap_bus_formatted_write(void *context, unsigned int reg, 54 unsigned int val); 55 static int _regmap_bus_reg_write(void *context, unsigned int reg, 56 unsigned int val); 57 static int _regmap_bus_raw_write(void *context, unsigned int reg, 58 unsigned int val); 59 60 bool regmap_reg_in_ranges(unsigned int reg, 61 const struct regmap_range *ranges, 62 unsigned int nranges) 63 { 64 const struct regmap_range *r; 65 int i; 66 67 for (i = 0, r = ranges; i < nranges; i++, r++) 68 if (regmap_reg_in_range(reg, r)) 69 return true; 70 return false; 71 } 72 EXPORT_SYMBOL_GPL(regmap_reg_in_ranges); 73 74 bool regmap_check_range_table(struct regmap *map, unsigned int reg, 75 const struct regmap_access_table *table) 76 { 77 /* Check "no ranges" first */ 78 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges)) 79 return false; 80 81 /* In case zero "yes ranges" are supplied, any reg is OK */ 82 if (!table->n_yes_ranges) 83 return true; 84 85 return regmap_reg_in_ranges(reg, table->yes_ranges, 86 table->n_yes_ranges); 87 } 88 EXPORT_SYMBOL_GPL(regmap_check_range_table); 89 90 bool regmap_writeable(struct regmap *map, unsigned int reg) 91 { 92 if (map->max_register && reg > map->max_register) 93 return false; 94 95 if (map->writeable_reg) 96 return map->writeable_reg(map->dev, reg); 97 98 if (map->wr_table) 99 return regmap_check_range_table(map, reg, map->wr_table); 100 101 return true; 102 } 103 104 bool regmap_cached(struct regmap *map, unsigned int reg) 105 { 106 int ret; 107 unsigned int val; 108 109 if (map->cache_type == REGCACHE_NONE) 110 return false; 111 112 if (!map->cache_ops) 113 return false; 114 115 if (map->max_register && reg > map->max_register) 116 return false; 117 118 map->lock(map->lock_arg); 119 ret = regcache_read(map, reg, &val); 120 map->unlock(map->lock_arg); 121 if (ret) 122 return false; 123 124 return true; 125 } 126 127 bool regmap_readable(struct regmap *map, unsigned int reg) 128 { 129 if (!map->reg_read) 130 return false; 131 132 if (map->max_register && reg > map->max_register) 133 return false; 134 135 if (map->format.format_write) 136 return false; 137 138 if (map->readable_reg) 139 return map->readable_reg(map->dev, reg); 140 141 if (map->rd_table) 142 return regmap_check_range_table(map, reg, map->rd_table); 143 144 return true; 145 } 146 147 bool regmap_volatile(struct regmap *map, unsigned int reg) 148 { 149 if (!map->format.format_write && !regmap_readable(map, reg)) 150 return false; 151 152 if (map->volatile_reg) 153 return map->volatile_reg(map->dev, reg); 154 155 if (map->volatile_table) 156 return regmap_check_range_table(map, reg, map->volatile_table); 157 158 if (map->cache_ops) 159 return false; 160 else 161 return true; 162 } 163 164 bool regmap_precious(struct regmap *map, unsigned int reg) 165 { 166 if (!regmap_readable(map, reg)) 167 return false; 168 169 if (map->precious_reg) 170 return map->precious_reg(map->dev, reg); 171 172 if (map->precious_table) 173 return regmap_check_range_table(map, reg, map->precious_table); 174 175 return false; 176 } 177 178 bool regmap_writeable_noinc(struct regmap *map, unsigned int reg) 179 { 180 if (map->writeable_noinc_reg) 181 return map->writeable_noinc_reg(map->dev, reg); 182 183 if (map->wr_noinc_table) 184 return regmap_check_range_table(map, reg, map->wr_noinc_table); 185 186 return true; 187 } 188 189 bool regmap_readable_noinc(struct regmap *map, unsigned int reg) 190 { 191 if (map->readable_noinc_reg) 192 return map->readable_noinc_reg(map->dev, reg); 193 194 if (map->rd_noinc_table) 195 return regmap_check_range_table(map, reg, map->rd_noinc_table); 196 197 return true; 198 } 199 200 static bool regmap_volatile_range(struct regmap *map, unsigned int reg, 201 size_t num) 202 { 203 unsigned int i; 204 205 for (i = 0; i < num; i++) 206 if (!regmap_volatile(map, reg + regmap_get_offset(map, i))) 207 return false; 208 209 return true; 210 } 211 212 static void regmap_format_12_20_write(struct regmap *map, 213 unsigned int reg, unsigned int val) 214 { 215 u8 *out = map->work_buf; 216 217 out[0] = reg >> 4; 218 out[1] = (reg << 4) | (val >> 16); 219 out[2] = val >> 8; 220 out[3] = val; 221 } 222 223 224 static void regmap_format_2_6_write(struct regmap *map, 225 unsigned int reg, unsigned int val) 226 { 227 u8 *out = map->work_buf; 228 229 *out = (reg << 6) | val; 230 } 231 232 static void regmap_format_4_12_write(struct regmap *map, 233 unsigned int reg, unsigned int val) 234 { 235 __be16 *out = map->work_buf; 236 *out = cpu_to_be16((reg << 12) | val); 237 } 238 239 static void regmap_format_7_9_write(struct regmap *map, 240 unsigned int reg, unsigned int val) 241 { 242 __be16 *out = map->work_buf; 243 *out = cpu_to_be16((reg << 9) | val); 244 } 245 246 static void regmap_format_7_17_write(struct regmap *map, 247 unsigned int reg, unsigned int val) 248 { 249 u8 *out = map->work_buf; 250 251 out[2] = val; 252 out[1] = val >> 8; 253 out[0] = (val >> 16) | (reg << 1); 254 } 255 256 static void regmap_format_10_14_write(struct regmap *map, 257 unsigned int reg, unsigned int val) 258 { 259 u8 *out = map->work_buf; 260 261 out[2] = val; 262 out[1] = (val >> 8) | (reg << 6); 263 out[0] = reg >> 2; 264 } 265 266 static void regmap_format_8(void *buf, unsigned int val, unsigned int shift) 267 { 268 u8 *b = buf; 269 270 b[0] = val << shift; 271 } 272 273 static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift) 274 { 275 put_unaligned_be16(val << shift, buf); 276 } 277 278 static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift) 279 { 280 put_unaligned_le16(val << shift, buf); 281 } 282 283 static void regmap_format_16_native(void *buf, unsigned int val, 284 unsigned int shift) 285 { 286 u16 v = val << shift; 287 288 memcpy(buf, &v, sizeof(v)); 289 } 290 291 static void regmap_format_24(void *buf, unsigned int val, unsigned int shift) 292 { 293 u8 *b = buf; 294 295 val <<= shift; 296 297 b[0] = val >> 16; 298 b[1] = val >> 8; 299 b[2] = val; 300 } 301 302 static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift) 303 { 304 put_unaligned_be32(val << shift, buf); 305 } 306 307 static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift) 308 { 309 put_unaligned_le32(val << shift, buf); 310 } 311 312 static void regmap_format_32_native(void *buf, unsigned int val, 313 unsigned int shift) 314 { 315 u32 v = val << shift; 316 317 memcpy(buf, &v, sizeof(v)); 318 } 319 320 #ifdef CONFIG_64BIT 321 static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift) 322 { 323 put_unaligned_be64((u64) val << shift, buf); 324 } 325 326 static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift) 327 { 328 put_unaligned_le64((u64) val << shift, buf); 329 } 330 331 static void regmap_format_64_native(void *buf, unsigned int val, 332 unsigned int shift) 333 { 334 u64 v = (u64) val << shift; 335 336 memcpy(buf, &v, sizeof(v)); 337 } 338 #endif 339 340 static void regmap_parse_inplace_noop(void *buf) 341 { 342 } 343 344 static unsigned int regmap_parse_8(const void *buf) 345 { 346 const u8 *b = buf; 347 348 return b[0]; 349 } 350 351 static unsigned int regmap_parse_16_be(const void *buf) 352 { 353 return get_unaligned_be16(buf); 354 } 355 356 static unsigned int regmap_parse_16_le(const void *buf) 357 { 358 return get_unaligned_le16(buf); 359 } 360 361 static void regmap_parse_16_be_inplace(void *buf) 362 { 363 u16 v = get_unaligned_be16(buf); 364 365 memcpy(buf, &v, sizeof(v)); 366 } 367 368 static void regmap_parse_16_le_inplace(void *buf) 369 { 370 u16 v = get_unaligned_le16(buf); 371 372 memcpy(buf, &v, sizeof(v)); 373 } 374 375 static unsigned int regmap_parse_16_native(const void *buf) 376 { 377 u16 v; 378 379 memcpy(&v, buf, sizeof(v)); 380 return v; 381 } 382 383 static unsigned int regmap_parse_24(const void *buf) 384 { 385 const u8 *b = buf; 386 unsigned int ret = b[2]; 387 ret |= ((unsigned int)b[1]) << 8; 388 ret |= ((unsigned int)b[0]) << 16; 389 390 return ret; 391 } 392 393 static unsigned int regmap_parse_32_be(const void *buf) 394 { 395 return get_unaligned_be32(buf); 396 } 397 398 static unsigned int regmap_parse_32_le(const void *buf) 399 { 400 return get_unaligned_le32(buf); 401 } 402 403 static void regmap_parse_32_be_inplace(void *buf) 404 { 405 u32 v = get_unaligned_be32(buf); 406 407 memcpy(buf, &v, sizeof(v)); 408 } 409 410 static void regmap_parse_32_le_inplace(void *buf) 411 { 412 u32 v = get_unaligned_le32(buf); 413 414 memcpy(buf, &v, sizeof(v)); 415 } 416 417 static unsigned int regmap_parse_32_native(const void *buf) 418 { 419 u32 v; 420 421 memcpy(&v, buf, sizeof(v)); 422 return v; 423 } 424 425 #ifdef CONFIG_64BIT 426 static unsigned int regmap_parse_64_be(const void *buf) 427 { 428 return get_unaligned_be64(buf); 429 } 430 431 static unsigned int regmap_parse_64_le(const void *buf) 432 { 433 return get_unaligned_le64(buf); 434 } 435 436 static void regmap_parse_64_be_inplace(void *buf) 437 { 438 u64 v = get_unaligned_be64(buf); 439 440 memcpy(buf, &v, sizeof(v)); 441 } 442 443 static void regmap_parse_64_le_inplace(void *buf) 444 { 445 u64 v = get_unaligned_le64(buf); 446 447 memcpy(buf, &v, sizeof(v)); 448 } 449 450 static unsigned int regmap_parse_64_native(const void *buf) 451 { 452 u64 v; 453 454 memcpy(&v, buf, sizeof(v)); 455 return v; 456 } 457 #endif 458 459 static void regmap_lock_hwlock(void *__map) 460 { 461 struct regmap *map = __map; 462 463 hwspin_lock_timeout(map->hwlock, UINT_MAX); 464 } 465 466 static void regmap_lock_hwlock_irq(void *__map) 467 { 468 struct regmap *map = __map; 469 470 hwspin_lock_timeout_irq(map->hwlock, UINT_MAX); 471 } 472 473 static void regmap_lock_hwlock_irqsave(void *__map) 474 { 475 struct regmap *map = __map; 476 477 hwspin_lock_timeout_irqsave(map->hwlock, UINT_MAX, 478 &map->spinlock_flags); 479 } 480 481 static void regmap_unlock_hwlock(void *__map) 482 { 483 struct regmap *map = __map; 484 485 hwspin_unlock(map->hwlock); 486 } 487 488 static void regmap_unlock_hwlock_irq(void *__map) 489 { 490 struct regmap *map = __map; 491 492 hwspin_unlock_irq(map->hwlock); 493 } 494 495 static void regmap_unlock_hwlock_irqrestore(void *__map) 496 { 497 struct regmap *map = __map; 498 499 hwspin_unlock_irqrestore(map->hwlock, &map->spinlock_flags); 500 } 501 502 static void regmap_lock_unlock_none(void *__map) 503 { 504 505 } 506 507 static void regmap_lock_mutex(void *__map) 508 { 509 struct regmap *map = __map; 510 mutex_lock(&map->mutex); 511 } 512 513 static void regmap_unlock_mutex(void *__map) 514 { 515 struct regmap *map = __map; 516 mutex_unlock(&map->mutex); 517 } 518 519 static void regmap_lock_spinlock(void *__map) 520 __acquires(&map->spinlock) 521 { 522 struct regmap *map = __map; 523 unsigned long flags; 524 525 spin_lock_irqsave(&map->spinlock, flags); 526 map->spinlock_flags = flags; 527 } 528 529 static void regmap_unlock_spinlock(void *__map) 530 __releases(&map->spinlock) 531 { 532 struct regmap *map = __map; 533 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags); 534 } 535 536 static void regmap_lock_raw_spinlock(void *__map) 537 __acquires(&map->raw_spinlock) 538 { 539 struct regmap *map = __map; 540 unsigned long flags; 541 542 raw_spin_lock_irqsave(&map->raw_spinlock, flags); 543 map->raw_spinlock_flags = flags; 544 } 545 546 static void regmap_unlock_raw_spinlock(void *__map) 547 __releases(&map->raw_spinlock) 548 { 549 struct regmap *map = __map; 550 raw_spin_unlock_irqrestore(&map->raw_spinlock, map->raw_spinlock_flags); 551 } 552 553 static void dev_get_regmap_release(struct device *dev, void *res) 554 { 555 /* 556 * We don't actually have anything to do here; the goal here 557 * is not to manage the regmap but to provide a simple way to 558 * get the regmap back given a struct device. 559 */ 560 } 561 562 static bool _regmap_range_add(struct regmap *map, 563 struct regmap_range_node *data) 564 { 565 struct rb_root *root = &map->range_tree; 566 struct rb_node **new = &(root->rb_node), *parent = NULL; 567 568 while (*new) { 569 struct regmap_range_node *this = 570 rb_entry(*new, struct regmap_range_node, node); 571 572 parent = *new; 573 if (data->range_max < this->range_min) 574 new = &((*new)->rb_left); 575 else if (data->range_min > this->range_max) 576 new = &((*new)->rb_right); 577 else 578 return false; 579 } 580 581 rb_link_node(&data->node, parent, new); 582 rb_insert_color(&data->node, root); 583 584 return true; 585 } 586 587 static struct regmap_range_node *_regmap_range_lookup(struct regmap *map, 588 unsigned int reg) 589 { 590 struct rb_node *node = map->range_tree.rb_node; 591 592 while (node) { 593 struct regmap_range_node *this = 594 rb_entry(node, struct regmap_range_node, node); 595 596 if (reg < this->range_min) 597 node = node->rb_left; 598 else if (reg > this->range_max) 599 node = node->rb_right; 600 else 601 return this; 602 } 603 604 return NULL; 605 } 606 607 static void regmap_range_exit(struct regmap *map) 608 { 609 struct rb_node *next; 610 struct regmap_range_node *range_node; 611 612 next = rb_first(&map->range_tree); 613 while (next) { 614 range_node = rb_entry(next, struct regmap_range_node, node); 615 next = rb_next(&range_node->node); 616 rb_erase(&range_node->node, &map->range_tree); 617 kfree(range_node); 618 } 619 620 kfree(map->selector_work_buf); 621 } 622 623 static int regmap_set_name(struct regmap *map, const struct regmap_config *config) 624 { 625 if (config->name) { 626 const char *name = kstrdup_const(config->name, GFP_KERNEL); 627 628 if (!name) 629 return -ENOMEM; 630 631 kfree_const(map->name); 632 map->name = name; 633 } 634 635 return 0; 636 } 637 638 int regmap_attach_dev(struct device *dev, struct regmap *map, 639 const struct regmap_config *config) 640 { 641 struct regmap **m; 642 int ret; 643 644 map->dev = dev; 645 646 ret = regmap_set_name(map, config); 647 if (ret) 648 return ret; 649 650 regmap_debugfs_init(map); 651 652 /* Add a devres resource for dev_get_regmap() */ 653 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL); 654 if (!m) { 655 regmap_debugfs_exit(map); 656 return -ENOMEM; 657 } 658 *m = map; 659 devres_add(dev, m); 660 661 return 0; 662 } 663 EXPORT_SYMBOL_GPL(regmap_attach_dev); 664 665 static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus, 666 const struct regmap_config *config) 667 { 668 enum regmap_endian endian; 669 670 /* Retrieve the endianness specification from the regmap config */ 671 endian = config->reg_format_endian; 672 673 /* If the regmap config specified a non-default value, use that */ 674 if (endian != REGMAP_ENDIAN_DEFAULT) 675 return endian; 676 677 /* Retrieve the endianness specification from the bus config */ 678 if (bus && bus->reg_format_endian_default) 679 endian = bus->reg_format_endian_default; 680 681 /* If the bus specified a non-default value, use that */ 682 if (endian != REGMAP_ENDIAN_DEFAULT) 683 return endian; 684 685 /* Use this if no other value was found */ 686 return REGMAP_ENDIAN_BIG; 687 } 688 689 enum regmap_endian regmap_get_val_endian(struct device *dev, 690 const struct regmap_bus *bus, 691 const struct regmap_config *config) 692 { 693 struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL; 694 enum regmap_endian endian; 695 696 /* Retrieve the endianness specification from the regmap config */ 697 endian = config->val_format_endian; 698 699 /* If the regmap config specified a non-default value, use that */ 700 if (endian != REGMAP_ENDIAN_DEFAULT) 701 return endian; 702 703 /* If the firmware node exist try to get endianness from it */ 704 if (fwnode_property_read_bool(fwnode, "big-endian")) 705 endian = REGMAP_ENDIAN_BIG; 706 else if (fwnode_property_read_bool(fwnode, "little-endian")) 707 endian = REGMAP_ENDIAN_LITTLE; 708 else if (fwnode_property_read_bool(fwnode, "native-endian")) 709 endian = REGMAP_ENDIAN_NATIVE; 710 711 /* If the endianness was specified in fwnode, use that */ 712 if (endian != REGMAP_ENDIAN_DEFAULT) 713 return endian; 714 715 /* Retrieve the endianness specification from the bus config */ 716 if (bus && bus->val_format_endian_default) 717 endian = bus->val_format_endian_default; 718 719 /* If the bus specified a non-default value, use that */ 720 if (endian != REGMAP_ENDIAN_DEFAULT) 721 return endian; 722 723 /* Use this if no other value was found */ 724 return REGMAP_ENDIAN_BIG; 725 } 726 EXPORT_SYMBOL_GPL(regmap_get_val_endian); 727 728 struct regmap *__regmap_init(struct device *dev, 729 const struct regmap_bus *bus, 730 void *bus_context, 731 const struct regmap_config *config, 732 struct lock_class_key *lock_key, 733 const char *lock_name) 734 { 735 struct regmap *map; 736 int ret = -EINVAL; 737 enum regmap_endian reg_endian, val_endian; 738 int i, j; 739 740 if (!config) 741 goto err; 742 743 map = kzalloc(sizeof(*map), GFP_KERNEL); 744 if (map == NULL) { 745 ret = -ENOMEM; 746 goto err; 747 } 748 749 ret = regmap_set_name(map, config); 750 if (ret) 751 goto err_map; 752 753 ret = -EINVAL; /* Later error paths rely on this */ 754 755 if (config->disable_locking) { 756 map->lock = map->unlock = regmap_lock_unlock_none; 757 map->can_sleep = config->can_sleep; 758 regmap_debugfs_disable(map); 759 } else if (config->lock && config->unlock) { 760 map->lock = config->lock; 761 map->unlock = config->unlock; 762 map->lock_arg = config->lock_arg; 763 map->can_sleep = config->can_sleep; 764 } else if (config->use_hwlock) { 765 map->hwlock = hwspin_lock_request_specific(config->hwlock_id); 766 if (!map->hwlock) { 767 ret = -ENXIO; 768 goto err_name; 769 } 770 771 switch (config->hwlock_mode) { 772 case HWLOCK_IRQSTATE: 773 map->lock = regmap_lock_hwlock_irqsave; 774 map->unlock = regmap_unlock_hwlock_irqrestore; 775 break; 776 case HWLOCK_IRQ: 777 map->lock = regmap_lock_hwlock_irq; 778 map->unlock = regmap_unlock_hwlock_irq; 779 break; 780 default: 781 map->lock = regmap_lock_hwlock; 782 map->unlock = regmap_unlock_hwlock; 783 break; 784 } 785 786 map->lock_arg = map; 787 } else { 788 if ((bus && bus->fast_io) || 789 config->fast_io) { 790 if (config->use_raw_spinlock) { 791 raw_spin_lock_init(&map->raw_spinlock); 792 map->lock = regmap_lock_raw_spinlock; 793 map->unlock = regmap_unlock_raw_spinlock; 794 lockdep_set_class_and_name(&map->raw_spinlock, 795 lock_key, lock_name); 796 } else { 797 spin_lock_init(&map->spinlock); 798 map->lock = regmap_lock_spinlock; 799 map->unlock = regmap_unlock_spinlock; 800 lockdep_set_class_and_name(&map->spinlock, 801 lock_key, lock_name); 802 } 803 } else { 804 mutex_init(&map->mutex); 805 map->lock = regmap_lock_mutex; 806 map->unlock = regmap_unlock_mutex; 807 map->can_sleep = true; 808 lockdep_set_class_and_name(&map->mutex, 809 lock_key, lock_name); 810 } 811 map->lock_arg = map; 812 } 813 814 /* 815 * When we write in fast-paths with regmap_bulk_write() don't allocate 816 * scratch buffers with sleeping allocations. 817 */ 818 if ((bus && bus->fast_io) || config->fast_io) 819 map->alloc_flags = GFP_ATOMIC; 820 else 821 map->alloc_flags = GFP_KERNEL; 822 823 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8); 824 map->format.pad_bytes = config->pad_bits / 8; 825 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8); 826 map->format.buf_size = DIV_ROUND_UP(config->reg_bits + 827 config->val_bits + config->pad_bits, 8); 828 map->reg_shift = config->pad_bits % 8; 829 if (config->reg_stride) 830 map->reg_stride = config->reg_stride; 831 else 832 map->reg_stride = 1; 833 if (is_power_of_2(map->reg_stride)) 834 map->reg_stride_order = ilog2(map->reg_stride); 835 else 836 map->reg_stride_order = -1; 837 map->use_single_read = config->use_single_read || !bus || !bus->read; 838 map->use_single_write = config->use_single_write || !bus || !bus->write; 839 map->can_multi_write = config->can_multi_write && bus && bus->write; 840 if (bus) { 841 map->max_raw_read = bus->max_raw_read; 842 map->max_raw_write = bus->max_raw_write; 843 } 844 map->dev = dev; 845 map->bus = bus; 846 map->bus_context = bus_context; 847 map->max_register = config->max_register; 848 map->wr_table = config->wr_table; 849 map->rd_table = config->rd_table; 850 map->volatile_table = config->volatile_table; 851 map->precious_table = config->precious_table; 852 map->wr_noinc_table = config->wr_noinc_table; 853 map->rd_noinc_table = config->rd_noinc_table; 854 map->writeable_reg = config->writeable_reg; 855 map->readable_reg = config->readable_reg; 856 map->volatile_reg = config->volatile_reg; 857 map->precious_reg = config->precious_reg; 858 map->writeable_noinc_reg = config->writeable_noinc_reg; 859 map->readable_noinc_reg = config->readable_noinc_reg; 860 map->cache_type = config->cache_type; 861 862 spin_lock_init(&map->async_lock); 863 INIT_LIST_HEAD(&map->async_list); 864 INIT_LIST_HEAD(&map->async_free); 865 init_waitqueue_head(&map->async_waitq); 866 867 if (config->read_flag_mask || 868 config->write_flag_mask || 869 config->zero_flag_mask) { 870 map->read_flag_mask = config->read_flag_mask; 871 map->write_flag_mask = config->write_flag_mask; 872 } else if (bus) { 873 map->read_flag_mask = bus->read_flag_mask; 874 } 875 876 if (!bus) { 877 map->reg_read = config->reg_read; 878 map->reg_write = config->reg_write; 879 map->reg_update_bits = config->reg_update_bits; 880 881 map->defer_caching = false; 882 goto skip_format_initialization; 883 } else if (!bus->read || !bus->write) { 884 map->reg_read = _regmap_bus_reg_read; 885 map->reg_write = _regmap_bus_reg_write; 886 map->reg_update_bits = bus->reg_update_bits; 887 888 map->defer_caching = false; 889 goto skip_format_initialization; 890 } else { 891 map->reg_read = _regmap_bus_read; 892 map->reg_update_bits = bus->reg_update_bits; 893 } 894 895 reg_endian = regmap_get_reg_endian(bus, config); 896 val_endian = regmap_get_val_endian(dev, bus, config); 897 898 switch (config->reg_bits + map->reg_shift) { 899 case 2: 900 switch (config->val_bits) { 901 case 6: 902 map->format.format_write = regmap_format_2_6_write; 903 break; 904 default: 905 goto err_hwlock; 906 } 907 break; 908 909 case 4: 910 switch (config->val_bits) { 911 case 12: 912 map->format.format_write = regmap_format_4_12_write; 913 break; 914 default: 915 goto err_hwlock; 916 } 917 break; 918 919 case 7: 920 switch (config->val_bits) { 921 case 9: 922 map->format.format_write = regmap_format_7_9_write; 923 break; 924 case 17: 925 map->format.format_write = regmap_format_7_17_write; 926 break; 927 default: 928 goto err_hwlock; 929 } 930 break; 931 932 case 10: 933 switch (config->val_bits) { 934 case 14: 935 map->format.format_write = regmap_format_10_14_write; 936 break; 937 default: 938 goto err_hwlock; 939 } 940 break; 941 942 case 12: 943 switch (config->val_bits) { 944 case 20: 945 map->format.format_write = regmap_format_12_20_write; 946 break; 947 default: 948 goto err_hwlock; 949 } 950 break; 951 952 case 8: 953 map->format.format_reg = regmap_format_8; 954 break; 955 956 case 16: 957 switch (reg_endian) { 958 case REGMAP_ENDIAN_BIG: 959 map->format.format_reg = regmap_format_16_be; 960 break; 961 case REGMAP_ENDIAN_LITTLE: 962 map->format.format_reg = regmap_format_16_le; 963 break; 964 case REGMAP_ENDIAN_NATIVE: 965 map->format.format_reg = regmap_format_16_native; 966 break; 967 default: 968 goto err_hwlock; 969 } 970 break; 971 972 case 24: 973 if (reg_endian != REGMAP_ENDIAN_BIG) 974 goto err_hwlock; 975 map->format.format_reg = regmap_format_24; 976 break; 977 978 case 32: 979 switch (reg_endian) { 980 case REGMAP_ENDIAN_BIG: 981 map->format.format_reg = regmap_format_32_be; 982 break; 983 case REGMAP_ENDIAN_LITTLE: 984 map->format.format_reg = regmap_format_32_le; 985 break; 986 case REGMAP_ENDIAN_NATIVE: 987 map->format.format_reg = regmap_format_32_native; 988 break; 989 default: 990 goto err_hwlock; 991 } 992 break; 993 994 #ifdef CONFIG_64BIT 995 case 64: 996 switch (reg_endian) { 997 case REGMAP_ENDIAN_BIG: 998 map->format.format_reg = regmap_format_64_be; 999 break; 1000 case REGMAP_ENDIAN_LITTLE: 1001 map->format.format_reg = regmap_format_64_le; 1002 break; 1003 case REGMAP_ENDIAN_NATIVE: 1004 map->format.format_reg = regmap_format_64_native; 1005 break; 1006 default: 1007 goto err_hwlock; 1008 } 1009 break; 1010 #endif 1011 1012 default: 1013 goto err_hwlock; 1014 } 1015 1016 if (val_endian == REGMAP_ENDIAN_NATIVE) 1017 map->format.parse_inplace = regmap_parse_inplace_noop; 1018 1019 switch (config->val_bits) { 1020 case 8: 1021 map->format.format_val = regmap_format_8; 1022 map->format.parse_val = regmap_parse_8; 1023 map->format.parse_inplace = regmap_parse_inplace_noop; 1024 break; 1025 case 16: 1026 switch (val_endian) { 1027 case REGMAP_ENDIAN_BIG: 1028 map->format.format_val = regmap_format_16_be; 1029 map->format.parse_val = regmap_parse_16_be; 1030 map->format.parse_inplace = regmap_parse_16_be_inplace; 1031 break; 1032 case REGMAP_ENDIAN_LITTLE: 1033 map->format.format_val = regmap_format_16_le; 1034 map->format.parse_val = regmap_parse_16_le; 1035 map->format.parse_inplace = regmap_parse_16_le_inplace; 1036 break; 1037 case REGMAP_ENDIAN_NATIVE: 1038 map->format.format_val = regmap_format_16_native; 1039 map->format.parse_val = regmap_parse_16_native; 1040 break; 1041 default: 1042 goto err_hwlock; 1043 } 1044 break; 1045 case 24: 1046 if (val_endian != REGMAP_ENDIAN_BIG) 1047 goto err_hwlock; 1048 map->format.format_val = regmap_format_24; 1049 map->format.parse_val = regmap_parse_24; 1050 break; 1051 case 32: 1052 switch (val_endian) { 1053 case REGMAP_ENDIAN_BIG: 1054 map->format.format_val = regmap_format_32_be; 1055 map->format.parse_val = regmap_parse_32_be; 1056 map->format.parse_inplace = regmap_parse_32_be_inplace; 1057 break; 1058 case REGMAP_ENDIAN_LITTLE: 1059 map->format.format_val = regmap_format_32_le; 1060 map->format.parse_val = regmap_parse_32_le; 1061 map->format.parse_inplace = regmap_parse_32_le_inplace; 1062 break; 1063 case REGMAP_ENDIAN_NATIVE: 1064 map->format.format_val = regmap_format_32_native; 1065 map->format.parse_val = regmap_parse_32_native; 1066 break; 1067 default: 1068 goto err_hwlock; 1069 } 1070 break; 1071 #ifdef CONFIG_64BIT 1072 case 64: 1073 switch (val_endian) { 1074 case REGMAP_ENDIAN_BIG: 1075 map->format.format_val = regmap_format_64_be; 1076 map->format.parse_val = regmap_parse_64_be; 1077 map->format.parse_inplace = regmap_parse_64_be_inplace; 1078 break; 1079 case REGMAP_ENDIAN_LITTLE: 1080 map->format.format_val = regmap_format_64_le; 1081 map->format.parse_val = regmap_parse_64_le; 1082 map->format.parse_inplace = regmap_parse_64_le_inplace; 1083 break; 1084 case REGMAP_ENDIAN_NATIVE: 1085 map->format.format_val = regmap_format_64_native; 1086 map->format.parse_val = regmap_parse_64_native; 1087 break; 1088 default: 1089 goto err_hwlock; 1090 } 1091 break; 1092 #endif 1093 } 1094 1095 if (map->format.format_write) { 1096 if ((reg_endian != REGMAP_ENDIAN_BIG) || 1097 (val_endian != REGMAP_ENDIAN_BIG)) 1098 goto err_hwlock; 1099 map->use_single_write = true; 1100 } 1101 1102 if (!map->format.format_write && 1103 !(map->format.format_reg && map->format.format_val)) 1104 goto err_hwlock; 1105 1106 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL); 1107 if (map->work_buf == NULL) { 1108 ret = -ENOMEM; 1109 goto err_hwlock; 1110 } 1111 1112 if (map->format.format_write) { 1113 map->defer_caching = false; 1114 map->reg_write = _regmap_bus_formatted_write; 1115 } else if (map->format.format_val) { 1116 map->defer_caching = true; 1117 map->reg_write = _regmap_bus_raw_write; 1118 } 1119 1120 skip_format_initialization: 1121 1122 map->range_tree = RB_ROOT; 1123 for (i = 0; i < config->num_ranges; i++) { 1124 const struct regmap_range_cfg *range_cfg = &config->ranges[i]; 1125 struct regmap_range_node *new; 1126 1127 /* Sanity check */ 1128 if (range_cfg->range_max < range_cfg->range_min) { 1129 dev_err(map->dev, "Invalid range %d: %d < %d\n", i, 1130 range_cfg->range_max, range_cfg->range_min); 1131 goto err_range; 1132 } 1133 1134 if (range_cfg->range_max > map->max_register) { 1135 dev_err(map->dev, "Invalid range %d: %d > %d\n", i, 1136 range_cfg->range_max, map->max_register); 1137 goto err_range; 1138 } 1139 1140 if (range_cfg->selector_reg > map->max_register) { 1141 dev_err(map->dev, 1142 "Invalid range %d: selector out of map\n", i); 1143 goto err_range; 1144 } 1145 1146 if (range_cfg->window_len == 0) { 1147 dev_err(map->dev, "Invalid range %d: window_len 0\n", 1148 i); 1149 goto err_range; 1150 } 1151 1152 /* Make sure, that this register range has no selector 1153 or data window within its boundary */ 1154 for (j = 0; j < config->num_ranges; j++) { 1155 unsigned int sel_reg = config->ranges[j].selector_reg; 1156 unsigned int win_min = config->ranges[j].window_start; 1157 unsigned int win_max = win_min + 1158 config->ranges[j].window_len - 1; 1159 1160 /* Allow data window inside its own virtual range */ 1161 if (j == i) 1162 continue; 1163 1164 if (range_cfg->range_min <= sel_reg && 1165 sel_reg <= range_cfg->range_max) { 1166 dev_err(map->dev, 1167 "Range %d: selector for %d in window\n", 1168 i, j); 1169 goto err_range; 1170 } 1171 1172 if (!(win_max < range_cfg->range_min || 1173 win_min > range_cfg->range_max)) { 1174 dev_err(map->dev, 1175 "Range %d: window for %d in window\n", 1176 i, j); 1177 goto err_range; 1178 } 1179 } 1180 1181 new = kzalloc(sizeof(*new), GFP_KERNEL); 1182 if (new == NULL) { 1183 ret = -ENOMEM; 1184 goto err_range; 1185 } 1186 1187 new->map = map; 1188 new->name = range_cfg->name; 1189 new->range_min = range_cfg->range_min; 1190 new->range_max = range_cfg->range_max; 1191 new->selector_reg = range_cfg->selector_reg; 1192 new->selector_mask = range_cfg->selector_mask; 1193 new->selector_shift = range_cfg->selector_shift; 1194 new->window_start = range_cfg->window_start; 1195 new->window_len = range_cfg->window_len; 1196 1197 if (!_regmap_range_add(map, new)) { 1198 dev_err(map->dev, "Failed to add range %d\n", i); 1199 kfree(new); 1200 goto err_range; 1201 } 1202 1203 if (map->selector_work_buf == NULL) { 1204 map->selector_work_buf = 1205 kzalloc(map->format.buf_size, GFP_KERNEL); 1206 if (map->selector_work_buf == NULL) { 1207 ret = -ENOMEM; 1208 goto err_range; 1209 } 1210 } 1211 } 1212 1213 ret = regcache_init(map, config); 1214 if (ret != 0) 1215 goto err_range; 1216 1217 if (dev) { 1218 ret = regmap_attach_dev(dev, map, config); 1219 if (ret != 0) 1220 goto err_regcache; 1221 } else { 1222 regmap_debugfs_init(map); 1223 } 1224 1225 return map; 1226 1227 err_regcache: 1228 regcache_exit(map); 1229 err_range: 1230 regmap_range_exit(map); 1231 kfree(map->work_buf); 1232 err_hwlock: 1233 if (map->hwlock) 1234 hwspin_lock_free(map->hwlock); 1235 err_name: 1236 kfree_const(map->name); 1237 err_map: 1238 kfree(map); 1239 err: 1240 return ERR_PTR(ret); 1241 } 1242 EXPORT_SYMBOL_GPL(__regmap_init); 1243 1244 static void devm_regmap_release(struct device *dev, void *res) 1245 { 1246 regmap_exit(*(struct regmap **)res); 1247 } 1248 1249 struct regmap *__devm_regmap_init(struct device *dev, 1250 const struct regmap_bus *bus, 1251 void *bus_context, 1252 const struct regmap_config *config, 1253 struct lock_class_key *lock_key, 1254 const char *lock_name) 1255 { 1256 struct regmap **ptr, *regmap; 1257 1258 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL); 1259 if (!ptr) 1260 return ERR_PTR(-ENOMEM); 1261 1262 regmap = __regmap_init(dev, bus, bus_context, config, 1263 lock_key, lock_name); 1264 if (!IS_ERR(regmap)) { 1265 *ptr = regmap; 1266 devres_add(dev, ptr); 1267 } else { 1268 devres_free(ptr); 1269 } 1270 1271 return regmap; 1272 } 1273 EXPORT_SYMBOL_GPL(__devm_regmap_init); 1274 1275 static void regmap_field_init(struct regmap_field *rm_field, 1276 struct regmap *regmap, struct reg_field reg_field) 1277 { 1278 rm_field->regmap = regmap; 1279 rm_field->reg = reg_field.reg; 1280 rm_field->shift = reg_field.lsb; 1281 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb); 1282 rm_field->id_size = reg_field.id_size; 1283 rm_field->id_offset = reg_field.id_offset; 1284 } 1285 1286 /** 1287 * devm_regmap_field_alloc() - Allocate and initialise a register field. 1288 * 1289 * @dev: Device that will be interacted with 1290 * @regmap: regmap bank in which this register field is located. 1291 * @reg_field: Register field with in the bank. 1292 * 1293 * The return value will be an ERR_PTR() on error or a valid pointer 1294 * to a struct regmap_field. The regmap_field will be automatically freed 1295 * by the device management code. 1296 */ 1297 struct regmap_field *devm_regmap_field_alloc(struct device *dev, 1298 struct regmap *regmap, struct reg_field reg_field) 1299 { 1300 struct regmap_field *rm_field = devm_kzalloc(dev, 1301 sizeof(*rm_field), GFP_KERNEL); 1302 if (!rm_field) 1303 return ERR_PTR(-ENOMEM); 1304 1305 regmap_field_init(rm_field, regmap, reg_field); 1306 1307 return rm_field; 1308 1309 } 1310 EXPORT_SYMBOL_GPL(devm_regmap_field_alloc); 1311 1312 1313 /** 1314 * regmap_field_bulk_alloc() - Allocate and initialise a bulk register field. 1315 * 1316 * @regmap: regmap bank in which this register field is located. 1317 * @rm_field: regmap register fields within the bank. 1318 * @reg_field: Register fields within the bank. 1319 * @num_fields: Number of register fields. 1320 * 1321 * The return value will be an -ENOMEM on error or zero for success. 1322 * Newly allocated regmap_fields should be freed by calling 1323 * regmap_field_bulk_free() 1324 */ 1325 int regmap_field_bulk_alloc(struct regmap *regmap, 1326 struct regmap_field **rm_field, 1327 const struct reg_field *reg_field, 1328 int num_fields) 1329 { 1330 struct regmap_field *rf; 1331 int i; 1332 1333 rf = kcalloc(num_fields, sizeof(*rf), GFP_KERNEL); 1334 if (!rf) 1335 return -ENOMEM; 1336 1337 for (i = 0; i < num_fields; i++) { 1338 regmap_field_init(&rf[i], regmap, reg_field[i]); 1339 rm_field[i] = &rf[i]; 1340 } 1341 1342 return 0; 1343 } 1344 EXPORT_SYMBOL_GPL(regmap_field_bulk_alloc); 1345 1346 /** 1347 * devm_regmap_field_bulk_alloc() - Allocate and initialise a bulk register 1348 * fields. 1349 * 1350 * @dev: Device that will be interacted with 1351 * @regmap: regmap bank in which this register field is located. 1352 * @rm_field: regmap register fields within the bank. 1353 * @reg_field: Register fields within the bank. 1354 * @num_fields: Number of register fields. 1355 * 1356 * The return value will be an -ENOMEM on error or zero for success. 1357 * Newly allocated regmap_fields will be automatically freed by the 1358 * device management code. 1359 */ 1360 int devm_regmap_field_bulk_alloc(struct device *dev, 1361 struct regmap *regmap, 1362 struct regmap_field **rm_field, 1363 const struct reg_field *reg_field, 1364 int num_fields) 1365 { 1366 struct regmap_field *rf; 1367 int i; 1368 1369 rf = devm_kcalloc(dev, num_fields, sizeof(*rf), GFP_KERNEL); 1370 if (!rf) 1371 return -ENOMEM; 1372 1373 for (i = 0; i < num_fields; i++) { 1374 regmap_field_init(&rf[i], regmap, reg_field[i]); 1375 rm_field[i] = &rf[i]; 1376 } 1377 1378 return 0; 1379 } 1380 EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_alloc); 1381 1382 /** 1383 * regmap_field_bulk_free() - Free register field allocated using 1384 * regmap_field_bulk_alloc. 1385 * 1386 * @field: regmap fields which should be freed. 1387 */ 1388 void regmap_field_bulk_free(struct regmap_field *field) 1389 { 1390 kfree(field); 1391 } 1392 EXPORT_SYMBOL_GPL(regmap_field_bulk_free); 1393 1394 /** 1395 * devm_regmap_field_bulk_free() - Free a bulk register field allocated using 1396 * devm_regmap_field_bulk_alloc. 1397 * 1398 * @dev: Device that will be interacted with 1399 * @field: regmap field which should be freed. 1400 * 1401 * Free register field allocated using devm_regmap_field_bulk_alloc(). Usually 1402 * drivers need not call this function, as the memory allocated via devm 1403 * will be freed as per device-driver life-cycle. 1404 */ 1405 void devm_regmap_field_bulk_free(struct device *dev, 1406 struct regmap_field *field) 1407 { 1408 devm_kfree(dev, field); 1409 } 1410 EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_free); 1411 1412 /** 1413 * devm_regmap_field_free() - Free a register field allocated using 1414 * devm_regmap_field_alloc. 1415 * 1416 * @dev: Device that will be interacted with 1417 * @field: regmap field which should be freed. 1418 * 1419 * Free register field allocated using devm_regmap_field_alloc(). Usually 1420 * drivers need not call this function, as the memory allocated via devm 1421 * will be freed as per device-driver life-cyle. 1422 */ 1423 void devm_regmap_field_free(struct device *dev, 1424 struct regmap_field *field) 1425 { 1426 devm_kfree(dev, field); 1427 } 1428 EXPORT_SYMBOL_GPL(devm_regmap_field_free); 1429 1430 /** 1431 * regmap_field_alloc() - Allocate and initialise a register field. 1432 * 1433 * @regmap: regmap bank in which this register field is located. 1434 * @reg_field: Register field with in the bank. 1435 * 1436 * The return value will be an ERR_PTR() on error or a valid pointer 1437 * to a struct regmap_field. The regmap_field should be freed by the 1438 * user once its finished working with it using regmap_field_free(). 1439 */ 1440 struct regmap_field *regmap_field_alloc(struct regmap *regmap, 1441 struct reg_field reg_field) 1442 { 1443 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL); 1444 1445 if (!rm_field) 1446 return ERR_PTR(-ENOMEM); 1447 1448 regmap_field_init(rm_field, regmap, reg_field); 1449 1450 return rm_field; 1451 } 1452 EXPORT_SYMBOL_GPL(regmap_field_alloc); 1453 1454 /** 1455 * regmap_field_free() - Free register field allocated using 1456 * regmap_field_alloc. 1457 * 1458 * @field: regmap field which should be freed. 1459 */ 1460 void regmap_field_free(struct regmap_field *field) 1461 { 1462 kfree(field); 1463 } 1464 EXPORT_SYMBOL_GPL(regmap_field_free); 1465 1466 /** 1467 * regmap_reinit_cache() - Reinitialise the current register cache 1468 * 1469 * @map: Register map to operate on. 1470 * @config: New configuration. Only the cache data will be used. 1471 * 1472 * Discard any existing register cache for the map and initialize a 1473 * new cache. This can be used to restore the cache to defaults or to 1474 * update the cache configuration to reflect runtime discovery of the 1475 * hardware. 1476 * 1477 * No explicit locking is done here, the user needs to ensure that 1478 * this function will not race with other calls to regmap. 1479 */ 1480 int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config) 1481 { 1482 int ret; 1483 1484 regcache_exit(map); 1485 regmap_debugfs_exit(map); 1486 1487 map->max_register = config->max_register; 1488 map->writeable_reg = config->writeable_reg; 1489 map->readable_reg = config->readable_reg; 1490 map->volatile_reg = config->volatile_reg; 1491 map->precious_reg = config->precious_reg; 1492 map->writeable_noinc_reg = config->writeable_noinc_reg; 1493 map->readable_noinc_reg = config->readable_noinc_reg; 1494 map->cache_type = config->cache_type; 1495 1496 ret = regmap_set_name(map, config); 1497 if (ret) 1498 return ret; 1499 1500 regmap_debugfs_init(map); 1501 1502 map->cache_bypass = false; 1503 map->cache_only = false; 1504 1505 return regcache_init(map, config); 1506 } 1507 EXPORT_SYMBOL_GPL(regmap_reinit_cache); 1508 1509 /** 1510 * regmap_exit() - Free a previously allocated register map 1511 * 1512 * @map: Register map to operate on. 1513 */ 1514 void regmap_exit(struct regmap *map) 1515 { 1516 struct regmap_async *async; 1517 1518 regcache_exit(map); 1519 regmap_debugfs_exit(map); 1520 regmap_range_exit(map); 1521 if (map->bus && map->bus->free_context) 1522 map->bus->free_context(map->bus_context); 1523 kfree(map->work_buf); 1524 while (!list_empty(&map->async_free)) { 1525 async = list_first_entry_or_null(&map->async_free, 1526 struct regmap_async, 1527 list); 1528 list_del(&async->list); 1529 kfree(async->work_buf); 1530 kfree(async); 1531 } 1532 if (map->hwlock) 1533 hwspin_lock_free(map->hwlock); 1534 if (map->lock == regmap_lock_mutex) 1535 mutex_destroy(&map->mutex); 1536 kfree_const(map->name); 1537 kfree(map->patch); 1538 if (map->bus && map->bus->free_on_exit) 1539 kfree(map->bus); 1540 kfree(map); 1541 } 1542 EXPORT_SYMBOL_GPL(regmap_exit); 1543 1544 static int dev_get_regmap_match(struct device *dev, void *res, void *data) 1545 { 1546 struct regmap **r = res; 1547 if (!r || !*r) { 1548 WARN_ON(!r || !*r); 1549 return 0; 1550 } 1551 1552 /* If the user didn't specify a name match any */ 1553 if (data) 1554 return !strcmp((*r)->name, data); 1555 else 1556 return 1; 1557 } 1558 1559 /** 1560 * dev_get_regmap() - Obtain the regmap (if any) for a device 1561 * 1562 * @dev: Device to retrieve the map for 1563 * @name: Optional name for the register map, usually NULL. 1564 * 1565 * Returns the regmap for the device if one is present, or NULL. If 1566 * name is specified then it must match the name specified when 1567 * registering the device, if it is NULL then the first regmap found 1568 * will be used. Devices with multiple register maps are very rare, 1569 * generic code should normally not need to specify a name. 1570 */ 1571 struct regmap *dev_get_regmap(struct device *dev, const char *name) 1572 { 1573 struct regmap **r = devres_find(dev, dev_get_regmap_release, 1574 dev_get_regmap_match, (void *)name); 1575 1576 if (!r) 1577 return NULL; 1578 return *r; 1579 } 1580 EXPORT_SYMBOL_GPL(dev_get_regmap); 1581 1582 /** 1583 * regmap_get_device() - Obtain the device from a regmap 1584 * 1585 * @map: Register map to operate on. 1586 * 1587 * Returns the underlying device that the regmap has been created for. 1588 */ 1589 struct device *regmap_get_device(struct regmap *map) 1590 { 1591 return map->dev; 1592 } 1593 EXPORT_SYMBOL_GPL(regmap_get_device); 1594 1595 static int _regmap_select_page(struct regmap *map, unsigned int *reg, 1596 struct regmap_range_node *range, 1597 unsigned int val_num) 1598 { 1599 void *orig_work_buf; 1600 unsigned int win_offset; 1601 unsigned int win_page; 1602 bool page_chg; 1603 int ret; 1604 1605 win_offset = (*reg - range->range_min) % range->window_len; 1606 win_page = (*reg - range->range_min) / range->window_len; 1607 1608 if (val_num > 1) { 1609 /* Bulk write shouldn't cross range boundary */ 1610 if (*reg + val_num - 1 > range->range_max) 1611 return -EINVAL; 1612 1613 /* ... or single page boundary */ 1614 if (val_num > range->window_len - win_offset) 1615 return -EINVAL; 1616 } 1617 1618 /* It is possible to have selector register inside data window. 1619 In that case, selector register is located on every page and 1620 it needs no page switching, when accessed alone. */ 1621 if (val_num > 1 || 1622 range->window_start + win_offset != range->selector_reg) { 1623 /* Use separate work_buf during page switching */ 1624 orig_work_buf = map->work_buf; 1625 map->work_buf = map->selector_work_buf; 1626 1627 ret = _regmap_update_bits(map, range->selector_reg, 1628 range->selector_mask, 1629 win_page << range->selector_shift, 1630 &page_chg, false); 1631 1632 map->work_buf = orig_work_buf; 1633 1634 if (ret != 0) 1635 return ret; 1636 } 1637 1638 *reg = range->window_start + win_offset; 1639 1640 return 0; 1641 } 1642 1643 static void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes, 1644 unsigned long mask) 1645 { 1646 u8 *buf; 1647 int i; 1648 1649 if (!mask || !map->work_buf) 1650 return; 1651 1652 buf = map->work_buf; 1653 1654 for (i = 0; i < max_bytes; i++) 1655 buf[i] |= (mask >> (8 * i)) & 0xff; 1656 } 1657 1658 static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg, 1659 const void *val, size_t val_len, bool noinc) 1660 { 1661 struct regmap_range_node *range; 1662 unsigned long flags; 1663 void *work_val = map->work_buf + map->format.reg_bytes + 1664 map->format.pad_bytes; 1665 void *buf; 1666 int ret = -ENOTSUPP; 1667 size_t len; 1668 int i; 1669 1670 WARN_ON(!map->bus); 1671 1672 /* Check for unwritable or noinc registers in range 1673 * before we start 1674 */ 1675 if (!regmap_writeable_noinc(map, reg)) { 1676 for (i = 0; i < val_len / map->format.val_bytes; i++) { 1677 unsigned int element = 1678 reg + regmap_get_offset(map, i); 1679 if (!regmap_writeable(map, element) || 1680 regmap_writeable_noinc(map, element)) 1681 return -EINVAL; 1682 } 1683 } 1684 1685 if (!map->cache_bypass && map->format.parse_val) { 1686 unsigned int ival; 1687 int val_bytes = map->format.val_bytes; 1688 for (i = 0; i < val_len / val_bytes; i++) { 1689 ival = map->format.parse_val(val + (i * val_bytes)); 1690 ret = regcache_write(map, 1691 reg + regmap_get_offset(map, i), 1692 ival); 1693 if (ret) { 1694 dev_err(map->dev, 1695 "Error in caching of register: %x ret: %d\n", 1696 reg + regmap_get_offset(map, i), ret); 1697 return ret; 1698 } 1699 } 1700 if (map->cache_only) { 1701 map->cache_dirty = true; 1702 return 0; 1703 } 1704 } 1705 1706 range = _regmap_range_lookup(map, reg); 1707 if (range) { 1708 int val_num = val_len / map->format.val_bytes; 1709 int win_offset = (reg - range->range_min) % range->window_len; 1710 int win_residue = range->window_len - win_offset; 1711 1712 /* If the write goes beyond the end of the window split it */ 1713 while (val_num > win_residue) { 1714 dev_dbg(map->dev, "Writing window %d/%zu\n", 1715 win_residue, val_len / map->format.val_bytes); 1716 ret = _regmap_raw_write_impl(map, reg, val, 1717 win_residue * 1718 map->format.val_bytes, noinc); 1719 if (ret != 0) 1720 return ret; 1721 1722 reg += win_residue; 1723 val_num -= win_residue; 1724 val += win_residue * map->format.val_bytes; 1725 val_len -= win_residue * map->format.val_bytes; 1726 1727 win_offset = (reg - range->range_min) % 1728 range->window_len; 1729 win_residue = range->window_len - win_offset; 1730 } 1731 1732 ret = _regmap_select_page(map, ®, range, noinc ? 1 : val_num); 1733 if (ret != 0) 1734 return ret; 1735 } 1736 1737 map->format.format_reg(map->work_buf, reg, map->reg_shift); 1738 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes, 1739 map->write_flag_mask); 1740 1741 /* 1742 * Essentially all I/O mechanisms will be faster with a single 1743 * buffer to write. Since register syncs often generate raw 1744 * writes of single registers optimise that case. 1745 */ 1746 if (val != work_val && val_len == map->format.val_bytes) { 1747 memcpy(work_val, val, map->format.val_bytes); 1748 val = work_val; 1749 } 1750 1751 if (map->async && map->bus->async_write) { 1752 struct regmap_async *async; 1753 1754 trace_regmap_async_write_start(map, reg, val_len); 1755 1756 spin_lock_irqsave(&map->async_lock, flags); 1757 async = list_first_entry_or_null(&map->async_free, 1758 struct regmap_async, 1759 list); 1760 if (async) 1761 list_del(&async->list); 1762 spin_unlock_irqrestore(&map->async_lock, flags); 1763 1764 if (!async) { 1765 async = map->bus->async_alloc(); 1766 if (!async) 1767 return -ENOMEM; 1768 1769 async->work_buf = kzalloc(map->format.buf_size, 1770 GFP_KERNEL | GFP_DMA); 1771 if (!async->work_buf) { 1772 kfree(async); 1773 return -ENOMEM; 1774 } 1775 } 1776 1777 async->map = map; 1778 1779 /* If the caller supplied the value we can use it safely. */ 1780 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes + 1781 map->format.reg_bytes + map->format.val_bytes); 1782 1783 spin_lock_irqsave(&map->async_lock, flags); 1784 list_add_tail(&async->list, &map->async_list); 1785 spin_unlock_irqrestore(&map->async_lock, flags); 1786 1787 if (val != work_val) 1788 ret = map->bus->async_write(map->bus_context, 1789 async->work_buf, 1790 map->format.reg_bytes + 1791 map->format.pad_bytes, 1792 val, val_len, async); 1793 else 1794 ret = map->bus->async_write(map->bus_context, 1795 async->work_buf, 1796 map->format.reg_bytes + 1797 map->format.pad_bytes + 1798 val_len, NULL, 0, async); 1799 1800 if (ret != 0) { 1801 dev_err(map->dev, "Failed to schedule write: %d\n", 1802 ret); 1803 1804 spin_lock_irqsave(&map->async_lock, flags); 1805 list_move(&async->list, &map->async_free); 1806 spin_unlock_irqrestore(&map->async_lock, flags); 1807 } 1808 1809 return ret; 1810 } 1811 1812 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes); 1813 1814 /* If we're doing a single register write we can probably just 1815 * send the work_buf directly, otherwise try to do a gather 1816 * write. 1817 */ 1818 if (val == work_val) 1819 ret = map->bus->write(map->bus_context, map->work_buf, 1820 map->format.reg_bytes + 1821 map->format.pad_bytes + 1822 val_len); 1823 else if (map->bus->gather_write) 1824 ret = map->bus->gather_write(map->bus_context, map->work_buf, 1825 map->format.reg_bytes + 1826 map->format.pad_bytes, 1827 val, val_len); 1828 else 1829 ret = -ENOTSUPP; 1830 1831 /* If that didn't work fall back on linearising by hand. */ 1832 if (ret == -ENOTSUPP) { 1833 len = map->format.reg_bytes + map->format.pad_bytes + val_len; 1834 buf = kzalloc(len, GFP_KERNEL); 1835 if (!buf) 1836 return -ENOMEM; 1837 1838 memcpy(buf, map->work_buf, map->format.reg_bytes); 1839 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes, 1840 val, val_len); 1841 ret = map->bus->write(map->bus_context, buf, len); 1842 1843 kfree(buf); 1844 } else if (ret != 0 && !map->cache_bypass && map->format.parse_val) { 1845 /* regcache_drop_region() takes lock that we already have, 1846 * thus call map->cache_ops->drop() directly 1847 */ 1848 if (map->cache_ops && map->cache_ops->drop) 1849 map->cache_ops->drop(map, reg, reg + 1); 1850 } 1851 1852 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes); 1853 1854 return ret; 1855 } 1856 1857 /** 1858 * regmap_can_raw_write - Test if regmap_raw_write() is supported 1859 * 1860 * @map: Map to check. 1861 */ 1862 bool regmap_can_raw_write(struct regmap *map) 1863 { 1864 return map->bus && map->bus->write && map->format.format_val && 1865 map->format.format_reg; 1866 } 1867 EXPORT_SYMBOL_GPL(regmap_can_raw_write); 1868 1869 /** 1870 * regmap_get_raw_read_max - Get the maximum size we can read 1871 * 1872 * @map: Map to check. 1873 */ 1874 size_t regmap_get_raw_read_max(struct regmap *map) 1875 { 1876 return map->max_raw_read; 1877 } 1878 EXPORT_SYMBOL_GPL(regmap_get_raw_read_max); 1879 1880 /** 1881 * regmap_get_raw_write_max - Get the maximum size we can read 1882 * 1883 * @map: Map to check. 1884 */ 1885 size_t regmap_get_raw_write_max(struct regmap *map) 1886 { 1887 return map->max_raw_write; 1888 } 1889 EXPORT_SYMBOL_GPL(regmap_get_raw_write_max); 1890 1891 static int _regmap_bus_formatted_write(void *context, unsigned int reg, 1892 unsigned int val) 1893 { 1894 int ret; 1895 struct regmap_range_node *range; 1896 struct regmap *map = context; 1897 1898 WARN_ON(!map->bus || !map->format.format_write); 1899 1900 range = _regmap_range_lookup(map, reg); 1901 if (range) { 1902 ret = _regmap_select_page(map, ®, range, 1); 1903 if (ret != 0) 1904 return ret; 1905 } 1906 1907 map->format.format_write(map, reg, val); 1908 1909 trace_regmap_hw_write_start(map, reg, 1); 1910 1911 ret = map->bus->write(map->bus_context, map->work_buf, 1912 map->format.buf_size); 1913 1914 trace_regmap_hw_write_done(map, reg, 1); 1915 1916 return ret; 1917 } 1918 1919 static int _regmap_bus_reg_write(void *context, unsigned int reg, 1920 unsigned int val) 1921 { 1922 struct regmap *map = context; 1923 1924 return map->bus->reg_write(map->bus_context, reg, val); 1925 } 1926 1927 static int _regmap_bus_raw_write(void *context, unsigned int reg, 1928 unsigned int val) 1929 { 1930 struct regmap *map = context; 1931 1932 WARN_ON(!map->bus || !map->format.format_val); 1933 1934 map->format.format_val(map->work_buf + map->format.reg_bytes 1935 + map->format.pad_bytes, val, 0); 1936 return _regmap_raw_write_impl(map, reg, 1937 map->work_buf + 1938 map->format.reg_bytes + 1939 map->format.pad_bytes, 1940 map->format.val_bytes, 1941 false); 1942 } 1943 1944 static inline void *_regmap_map_get_context(struct regmap *map) 1945 { 1946 return (map->bus) ? map : map->bus_context; 1947 } 1948 1949 int _regmap_write(struct regmap *map, unsigned int reg, 1950 unsigned int val) 1951 { 1952 int ret; 1953 void *context = _regmap_map_get_context(map); 1954 1955 if (!regmap_writeable(map, reg)) 1956 return -EIO; 1957 1958 if (!map->cache_bypass && !map->defer_caching) { 1959 ret = regcache_write(map, reg, val); 1960 if (ret != 0) 1961 return ret; 1962 if (map->cache_only) { 1963 map->cache_dirty = true; 1964 return 0; 1965 } 1966 } 1967 1968 ret = map->reg_write(context, reg, val); 1969 if (ret == 0) { 1970 if (regmap_should_log(map)) 1971 dev_info(map->dev, "%x <= %x\n", reg, val); 1972 1973 trace_regmap_reg_write(map, reg, val); 1974 } 1975 1976 return ret; 1977 } 1978 1979 /** 1980 * regmap_write() - Write a value to a single register 1981 * 1982 * @map: Register map to write to 1983 * @reg: Register to write to 1984 * @val: Value to be written 1985 * 1986 * A value of zero will be returned on success, a negative errno will 1987 * be returned in error cases. 1988 */ 1989 int regmap_write(struct regmap *map, unsigned int reg, unsigned int val) 1990 { 1991 int ret; 1992 1993 if (!IS_ALIGNED(reg, map->reg_stride)) 1994 return -EINVAL; 1995 1996 map->lock(map->lock_arg); 1997 1998 ret = _regmap_write(map, reg, val); 1999 2000 map->unlock(map->lock_arg); 2001 2002 return ret; 2003 } 2004 EXPORT_SYMBOL_GPL(regmap_write); 2005 2006 /** 2007 * regmap_write_async() - Write a value to a single register asynchronously 2008 * 2009 * @map: Register map to write to 2010 * @reg: Register to write to 2011 * @val: Value to be written 2012 * 2013 * A value of zero will be returned on success, a negative errno will 2014 * be returned in error cases. 2015 */ 2016 int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val) 2017 { 2018 int ret; 2019 2020 if (!IS_ALIGNED(reg, map->reg_stride)) 2021 return -EINVAL; 2022 2023 map->lock(map->lock_arg); 2024 2025 map->async = true; 2026 2027 ret = _regmap_write(map, reg, val); 2028 2029 map->async = false; 2030 2031 map->unlock(map->lock_arg); 2032 2033 return ret; 2034 } 2035 EXPORT_SYMBOL_GPL(regmap_write_async); 2036 2037 int _regmap_raw_write(struct regmap *map, unsigned int reg, 2038 const void *val, size_t val_len, bool noinc) 2039 { 2040 size_t val_bytes = map->format.val_bytes; 2041 size_t val_count = val_len / val_bytes; 2042 size_t chunk_count, chunk_bytes; 2043 size_t chunk_regs = val_count; 2044 int ret, i; 2045 2046 if (!val_count) 2047 return -EINVAL; 2048 2049 if (map->use_single_write) 2050 chunk_regs = 1; 2051 else if (map->max_raw_write && val_len > map->max_raw_write) 2052 chunk_regs = map->max_raw_write / val_bytes; 2053 2054 chunk_count = val_count / chunk_regs; 2055 chunk_bytes = chunk_regs * val_bytes; 2056 2057 /* Write as many bytes as possible with chunk_size */ 2058 for (i = 0; i < chunk_count; i++) { 2059 ret = _regmap_raw_write_impl(map, reg, val, chunk_bytes, noinc); 2060 if (ret) 2061 return ret; 2062 2063 reg += regmap_get_offset(map, chunk_regs); 2064 val += chunk_bytes; 2065 val_len -= chunk_bytes; 2066 } 2067 2068 /* Write remaining bytes */ 2069 if (val_len) 2070 ret = _regmap_raw_write_impl(map, reg, val, val_len, noinc); 2071 2072 return ret; 2073 } 2074 2075 /** 2076 * regmap_raw_write() - Write raw values to one or more registers 2077 * 2078 * @map: Register map to write to 2079 * @reg: Initial register to write to 2080 * @val: Block of data to be written, laid out for direct transmission to the 2081 * device 2082 * @val_len: Length of data pointed to by val. 2083 * 2084 * This function is intended to be used for things like firmware 2085 * download where a large block of data needs to be transferred to the 2086 * device. No formatting will be done on the data provided. 2087 * 2088 * A value of zero will be returned on success, a negative errno will 2089 * be returned in error cases. 2090 */ 2091 int regmap_raw_write(struct regmap *map, unsigned int reg, 2092 const void *val, size_t val_len) 2093 { 2094 int ret; 2095 2096 if (!regmap_can_raw_write(map)) 2097 return -EINVAL; 2098 if (val_len % map->format.val_bytes) 2099 return -EINVAL; 2100 2101 map->lock(map->lock_arg); 2102 2103 ret = _regmap_raw_write(map, reg, val, val_len, false); 2104 2105 map->unlock(map->lock_arg); 2106 2107 return ret; 2108 } 2109 EXPORT_SYMBOL_GPL(regmap_raw_write); 2110 2111 /** 2112 * regmap_noinc_write(): Write data from a register without incrementing the 2113 * register number 2114 * 2115 * @map: Register map to write to 2116 * @reg: Register to write to 2117 * @val: Pointer to data buffer 2118 * @val_len: Length of output buffer in bytes. 2119 * 2120 * The regmap API usually assumes that bulk bus write operations will write a 2121 * range of registers. Some devices have certain registers for which a write 2122 * operation can write to an internal FIFO. 2123 * 2124 * The target register must be volatile but registers after it can be 2125 * completely unrelated cacheable registers. 2126 * 2127 * This will attempt multiple writes as required to write val_len bytes. 2128 * 2129 * A value of zero will be returned on success, a negative errno will be 2130 * returned in error cases. 2131 */ 2132 int regmap_noinc_write(struct regmap *map, unsigned int reg, 2133 const void *val, size_t val_len) 2134 { 2135 size_t write_len; 2136 int ret; 2137 2138 if (!map->bus) 2139 return -EINVAL; 2140 if (!map->bus->write) 2141 return -ENOTSUPP; 2142 if (val_len % map->format.val_bytes) 2143 return -EINVAL; 2144 if (!IS_ALIGNED(reg, map->reg_stride)) 2145 return -EINVAL; 2146 if (val_len == 0) 2147 return -EINVAL; 2148 2149 map->lock(map->lock_arg); 2150 2151 if (!regmap_volatile(map, reg) || !regmap_writeable_noinc(map, reg)) { 2152 ret = -EINVAL; 2153 goto out_unlock; 2154 } 2155 2156 while (val_len) { 2157 if (map->max_raw_write && map->max_raw_write < val_len) 2158 write_len = map->max_raw_write; 2159 else 2160 write_len = val_len; 2161 ret = _regmap_raw_write(map, reg, val, write_len, true); 2162 if (ret) 2163 goto out_unlock; 2164 val = ((u8 *)val) + write_len; 2165 val_len -= write_len; 2166 } 2167 2168 out_unlock: 2169 map->unlock(map->lock_arg); 2170 return ret; 2171 } 2172 EXPORT_SYMBOL_GPL(regmap_noinc_write); 2173 2174 /** 2175 * regmap_field_update_bits_base() - Perform a read/modify/write cycle a 2176 * register field. 2177 * 2178 * @field: Register field to write to 2179 * @mask: Bitmask to change 2180 * @val: Value to be written 2181 * @change: Boolean indicating if a write was done 2182 * @async: Boolean indicating asynchronously 2183 * @force: Boolean indicating use force update 2184 * 2185 * Perform a read/modify/write cycle on the register field with change, 2186 * async, force option. 2187 * 2188 * A value of zero will be returned on success, a negative errno will 2189 * be returned in error cases. 2190 */ 2191 int regmap_field_update_bits_base(struct regmap_field *field, 2192 unsigned int mask, unsigned int val, 2193 bool *change, bool async, bool force) 2194 { 2195 mask = (mask << field->shift) & field->mask; 2196 2197 return regmap_update_bits_base(field->regmap, field->reg, 2198 mask, val << field->shift, 2199 change, async, force); 2200 } 2201 EXPORT_SYMBOL_GPL(regmap_field_update_bits_base); 2202 2203 /** 2204 * regmap_fields_update_bits_base() - Perform a read/modify/write cycle a 2205 * register field with port ID 2206 * 2207 * @field: Register field to write to 2208 * @id: port ID 2209 * @mask: Bitmask to change 2210 * @val: Value to be written 2211 * @change: Boolean indicating if a write was done 2212 * @async: Boolean indicating asynchronously 2213 * @force: Boolean indicating use force update 2214 * 2215 * A value of zero will be returned on success, a negative errno will 2216 * be returned in error cases. 2217 */ 2218 int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id, 2219 unsigned int mask, unsigned int val, 2220 bool *change, bool async, bool force) 2221 { 2222 if (id >= field->id_size) 2223 return -EINVAL; 2224 2225 mask = (mask << field->shift) & field->mask; 2226 2227 return regmap_update_bits_base(field->regmap, 2228 field->reg + (field->id_offset * id), 2229 mask, val << field->shift, 2230 change, async, force); 2231 } 2232 EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base); 2233 2234 /** 2235 * regmap_bulk_write() - Write multiple registers to the device 2236 * 2237 * @map: Register map to write to 2238 * @reg: First register to be write from 2239 * @val: Block of data to be written, in native register size for device 2240 * @val_count: Number of registers to write 2241 * 2242 * This function is intended to be used for writing a large block of 2243 * data to the device either in single transfer or multiple transfer. 2244 * 2245 * A value of zero will be returned on success, a negative errno will 2246 * be returned in error cases. 2247 */ 2248 int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, 2249 size_t val_count) 2250 { 2251 int ret = 0, i; 2252 size_t val_bytes = map->format.val_bytes; 2253 2254 if (!IS_ALIGNED(reg, map->reg_stride)) 2255 return -EINVAL; 2256 2257 /* 2258 * Some devices don't support bulk write, for them we have a series of 2259 * single write operations. 2260 */ 2261 if (!map->bus || !map->format.parse_inplace) { 2262 map->lock(map->lock_arg); 2263 for (i = 0; i < val_count; i++) { 2264 unsigned int ival; 2265 2266 switch (val_bytes) { 2267 case 1: 2268 ival = *(u8 *)(val + (i * val_bytes)); 2269 break; 2270 case 2: 2271 ival = *(u16 *)(val + (i * val_bytes)); 2272 break; 2273 case 4: 2274 ival = *(u32 *)(val + (i * val_bytes)); 2275 break; 2276 #ifdef CONFIG_64BIT 2277 case 8: 2278 ival = *(u64 *)(val + (i * val_bytes)); 2279 break; 2280 #endif 2281 default: 2282 ret = -EINVAL; 2283 goto out; 2284 } 2285 2286 ret = _regmap_write(map, 2287 reg + regmap_get_offset(map, i), 2288 ival); 2289 if (ret != 0) 2290 goto out; 2291 } 2292 out: 2293 map->unlock(map->lock_arg); 2294 } else { 2295 void *wval; 2296 2297 wval = kmemdup(val, val_count * val_bytes, map->alloc_flags); 2298 if (!wval) 2299 return -ENOMEM; 2300 2301 for (i = 0; i < val_count * val_bytes; i += val_bytes) 2302 map->format.parse_inplace(wval + i); 2303 2304 ret = regmap_raw_write(map, reg, wval, val_bytes * val_count); 2305 2306 kfree(wval); 2307 } 2308 return ret; 2309 } 2310 EXPORT_SYMBOL_GPL(regmap_bulk_write); 2311 2312 /* 2313 * _regmap_raw_multi_reg_write() 2314 * 2315 * the (register,newvalue) pairs in regs have not been formatted, but 2316 * they are all in the same page and have been changed to being page 2317 * relative. The page register has been written if that was necessary. 2318 */ 2319 static int _regmap_raw_multi_reg_write(struct regmap *map, 2320 const struct reg_sequence *regs, 2321 size_t num_regs) 2322 { 2323 int ret; 2324 void *buf; 2325 int i; 2326 u8 *u8; 2327 size_t val_bytes = map->format.val_bytes; 2328 size_t reg_bytes = map->format.reg_bytes; 2329 size_t pad_bytes = map->format.pad_bytes; 2330 size_t pair_size = reg_bytes + pad_bytes + val_bytes; 2331 size_t len = pair_size * num_regs; 2332 2333 if (!len) 2334 return -EINVAL; 2335 2336 buf = kzalloc(len, GFP_KERNEL); 2337 if (!buf) 2338 return -ENOMEM; 2339 2340 /* We have to linearise by hand. */ 2341 2342 u8 = buf; 2343 2344 for (i = 0; i < num_regs; i++) { 2345 unsigned int reg = regs[i].reg; 2346 unsigned int val = regs[i].def; 2347 trace_regmap_hw_write_start(map, reg, 1); 2348 map->format.format_reg(u8, reg, map->reg_shift); 2349 u8 += reg_bytes + pad_bytes; 2350 map->format.format_val(u8, val, 0); 2351 u8 += val_bytes; 2352 } 2353 u8 = buf; 2354 *u8 |= map->write_flag_mask; 2355 2356 ret = map->bus->write(map->bus_context, buf, len); 2357 2358 kfree(buf); 2359 2360 for (i = 0; i < num_regs; i++) { 2361 int reg = regs[i].reg; 2362 trace_regmap_hw_write_done(map, reg, 1); 2363 } 2364 return ret; 2365 } 2366 2367 static unsigned int _regmap_register_page(struct regmap *map, 2368 unsigned int reg, 2369 struct regmap_range_node *range) 2370 { 2371 unsigned int win_page = (reg - range->range_min) / range->window_len; 2372 2373 return win_page; 2374 } 2375 2376 static int _regmap_range_multi_paged_reg_write(struct regmap *map, 2377 struct reg_sequence *regs, 2378 size_t num_regs) 2379 { 2380 int ret; 2381 int i, n; 2382 struct reg_sequence *base; 2383 unsigned int this_page = 0; 2384 unsigned int page_change = 0; 2385 /* 2386 * the set of registers are not neccessarily in order, but 2387 * since the order of write must be preserved this algorithm 2388 * chops the set each time the page changes. This also applies 2389 * if there is a delay required at any point in the sequence. 2390 */ 2391 base = regs; 2392 for (i = 0, n = 0; i < num_regs; i++, n++) { 2393 unsigned int reg = regs[i].reg; 2394 struct regmap_range_node *range; 2395 2396 range = _regmap_range_lookup(map, reg); 2397 if (range) { 2398 unsigned int win_page = _regmap_register_page(map, reg, 2399 range); 2400 2401 if (i == 0) 2402 this_page = win_page; 2403 if (win_page != this_page) { 2404 this_page = win_page; 2405 page_change = 1; 2406 } 2407 } 2408 2409 /* If we have both a page change and a delay make sure to 2410 * write the regs and apply the delay before we change the 2411 * page. 2412 */ 2413 2414 if (page_change || regs[i].delay_us) { 2415 2416 /* For situations where the first write requires 2417 * a delay we need to make sure we don't call 2418 * raw_multi_reg_write with n=0 2419 * This can't occur with page breaks as we 2420 * never write on the first iteration 2421 */ 2422 if (regs[i].delay_us && i == 0) 2423 n = 1; 2424 2425 ret = _regmap_raw_multi_reg_write(map, base, n); 2426 if (ret != 0) 2427 return ret; 2428 2429 if (regs[i].delay_us) { 2430 if (map->can_sleep) 2431 fsleep(regs[i].delay_us); 2432 else 2433 udelay(regs[i].delay_us); 2434 } 2435 2436 base += n; 2437 n = 0; 2438 2439 if (page_change) { 2440 ret = _regmap_select_page(map, 2441 &base[n].reg, 2442 range, 1); 2443 if (ret != 0) 2444 return ret; 2445 2446 page_change = 0; 2447 } 2448 2449 } 2450 2451 } 2452 if (n > 0) 2453 return _regmap_raw_multi_reg_write(map, base, n); 2454 return 0; 2455 } 2456 2457 static int _regmap_multi_reg_write(struct regmap *map, 2458 const struct reg_sequence *regs, 2459 size_t num_regs) 2460 { 2461 int i; 2462 int ret; 2463 2464 if (!map->can_multi_write) { 2465 for (i = 0; i < num_regs; i++) { 2466 ret = _regmap_write(map, regs[i].reg, regs[i].def); 2467 if (ret != 0) 2468 return ret; 2469 2470 if (regs[i].delay_us) { 2471 if (map->can_sleep) 2472 fsleep(regs[i].delay_us); 2473 else 2474 udelay(regs[i].delay_us); 2475 } 2476 } 2477 return 0; 2478 } 2479 2480 if (!map->format.parse_inplace) 2481 return -EINVAL; 2482 2483 if (map->writeable_reg) 2484 for (i = 0; i < num_regs; i++) { 2485 int reg = regs[i].reg; 2486 if (!map->writeable_reg(map->dev, reg)) 2487 return -EINVAL; 2488 if (!IS_ALIGNED(reg, map->reg_stride)) 2489 return -EINVAL; 2490 } 2491 2492 if (!map->cache_bypass) { 2493 for (i = 0; i < num_regs; i++) { 2494 unsigned int val = regs[i].def; 2495 unsigned int reg = regs[i].reg; 2496 ret = regcache_write(map, reg, val); 2497 if (ret) { 2498 dev_err(map->dev, 2499 "Error in caching of register: %x ret: %d\n", 2500 reg, ret); 2501 return ret; 2502 } 2503 } 2504 if (map->cache_only) { 2505 map->cache_dirty = true; 2506 return 0; 2507 } 2508 } 2509 2510 WARN_ON(!map->bus); 2511 2512 for (i = 0; i < num_regs; i++) { 2513 unsigned int reg = regs[i].reg; 2514 struct regmap_range_node *range; 2515 2516 /* Coalesce all the writes between a page break or a delay 2517 * in a sequence 2518 */ 2519 range = _regmap_range_lookup(map, reg); 2520 if (range || regs[i].delay_us) { 2521 size_t len = sizeof(struct reg_sequence)*num_regs; 2522 struct reg_sequence *base = kmemdup(regs, len, 2523 GFP_KERNEL); 2524 if (!base) 2525 return -ENOMEM; 2526 ret = _regmap_range_multi_paged_reg_write(map, base, 2527 num_regs); 2528 kfree(base); 2529 2530 return ret; 2531 } 2532 } 2533 return _regmap_raw_multi_reg_write(map, regs, num_regs); 2534 } 2535 2536 /** 2537 * regmap_multi_reg_write() - Write multiple registers to the device 2538 * 2539 * @map: Register map to write to 2540 * @regs: Array of structures containing register,value to be written 2541 * @num_regs: Number of registers to write 2542 * 2543 * Write multiple registers to the device where the set of register, value 2544 * pairs are supplied in any order, possibly not all in a single range. 2545 * 2546 * The 'normal' block write mode will send ultimately send data on the 2547 * target bus as R,V1,V2,V3,..,Vn where successively higher registers are 2548 * addressed. However, this alternative block multi write mode will send 2549 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device 2550 * must of course support the mode. 2551 * 2552 * A value of zero will be returned on success, a negative errno will be 2553 * returned in error cases. 2554 */ 2555 int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs, 2556 int num_regs) 2557 { 2558 int ret; 2559 2560 map->lock(map->lock_arg); 2561 2562 ret = _regmap_multi_reg_write(map, regs, num_regs); 2563 2564 map->unlock(map->lock_arg); 2565 2566 return ret; 2567 } 2568 EXPORT_SYMBOL_GPL(regmap_multi_reg_write); 2569 2570 /** 2571 * regmap_multi_reg_write_bypassed() - Write multiple registers to the 2572 * device but not the cache 2573 * 2574 * @map: Register map to write to 2575 * @regs: Array of structures containing register,value to be written 2576 * @num_regs: Number of registers to write 2577 * 2578 * Write multiple registers to the device but not the cache where the set 2579 * of register are supplied in any order. 2580 * 2581 * This function is intended to be used for writing a large block of data 2582 * atomically to the device in single transfer for those I2C client devices 2583 * that implement this alternative block write mode. 2584 * 2585 * A value of zero will be returned on success, a negative errno will 2586 * be returned in error cases. 2587 */ 2588 int regmap_multi_reg_write_bypassed(struct regmap *map, 2589 const struct reg_sequence *regs, 2590 int num_regs) 2591 { 2592 int ret; 2593 bool bypass; 2594 2595 map->lock(map->lock_arg); 2596 2597 bypass = map->cache_bypass; 2598 map->cache_bypass = true; 2599 2600 ret = _regmap_multi_reg_write(map, regs, num_regs); 2601 2602 map->cache_bypass = bypass; 2603 2604 map->unlock(map->lock_arg); 2605 2606 return ret; 2607 } 2608 EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed); 2609 2610 /** 2611 * regmap_raw_write_async() - Write raw values to one or more registers 2612 * asynchronously 2613 * 2614 * @map: Register map to write to 2615 * @reg: Initial register to write to 2616 * @val: Block of data to be written, laid out for direct transmission to the 2617 * device. Must be valid until regmap_async_complete() is called. 2618 * @val_len: Length of data pointed to by val. 2619 * 2620 * This function is intended to be used for things like firmware 2621 * download where a large block of data needs to be transferred to the 2622 * device. No formatting will be done on the data provided. 2623 * 2624 * If supported by the underlying bus the write will be scheduled 2625 * asynchronously, helping maximise I/O speed on higher speed buses 2626 * like SPI. regmap_async_complete() can be called to ensure that all 2627 * asynchrnous writes have been completed. 2628 * 2629 * A value of zero will be returned on success, a negative errno will 2630 * be returned in error cases. 2631 */ 2632 int regmap_raw_write_async(struct regmap *map, unsigned int reg, 2633 const void *val, size_t val_len) 2634 { 2635 int ret; 2636 2637 if (val_len % map->format.val_bytes) 2638 return -EINVAL; 2639 if (!IS_ALIGNED(reg, map->reg_stride)) 2640 return -EINVAL; 2641 2642 map->lock(map->lock_arg); 2643 2644 map->async = true; 2645 2646 ret = _regmap_raw_write(map, reg, val, val_len, false); 2647 2648 map->async = false; 2649 2650 map->unlock(map->lock_arg); 2651 2652 return ret; 2653 } 2654 EXPORT_SYMBOL_GPL(regmap_raw_write_async); 2655 2656 static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val, 2657 unsigned int val_len, bool noinc) 2658 { 2659 struct regmap_range_node *range; 2660 int ret; 2661 2662 WARN_ON(!map->bus); 2663 2664 if (!map->bus || !map->bus->read) 2665 return -EINVAL; 2666 2667 range = _regmap_range_lookup(map, reg); 2668 if (range) { 2669 ret = _regmap_select_page(map, ®, range, 2670 noinc ? 1 : val_len / map->format.val_bytes); 2671 if (ret != 0) 2672 return ret; 2673 } 2674 2675 map->format.format_reg(map->work_buf, reg, map->reg_shift); 2676 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes, 2677 map->read_flag_mask); 2678 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes); 2679 2680 ret = map->bus->read(map->bus_context, map->work_buf, 2681 map->format.reg_bytes + map->format.pad_bytes, 2682 val, val_len); 2683 2684 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes); 2685 2686 return ret; 2687 } 2688 2689 static int _regmap_bus_reg_read(void *context, unsigned int reg, 2690 unsigned int *val) 2691 { 2692 struct regmap *map = context; 2693 2694 return map->bus->reg_read(map->bus_context, reg, val); 2695 } 2696 2697 static int _regmap_bus_read(void *context, unsigned int reg, 2698 unsigned int *val) 2699 { 2700 int ret; 2701 struct regmap *map = context; 2702 void *work_val = map->work_buf + map->format.reg_bytes + 2703 map->format.pad_bytes; 2704 2705 if (!map->format.parse_val) 2706 return -EINVAL; 2707 2708 ret = _regmap_raw_read(map, reg, work_val, map->format.val_bytes, false); 2709 if (ret == 0) 2710 *val = map->format.parse_val(work_val); 2711 2712 return ret; 2713 } 2714 2715 static int _regmap_read(struct regmap *map, unsigned int reg, 2716 unsigned int *val) 2717 { 2718 int ret; 2719 void *context = _regmap_map_get_context(map); 2720 2721 if (!map->cache_bypass) { 2722 ret = regcache_read(map, reg, val); 2723 if (ret == 0) 2724 return 0; 2725 } 2726 2727 if (map->cache_only) 2728 return -EBUSY; 2729 2730 if (!regmap_readable(map, reg)) 2731 return -EIO; 2732 2733 ret = map->reg_read(context, reg, val); 2734 if (ret == 0) { 2735 if (regmap_should_log(map)) 2736 dev_info(map->dev, "%x => %x\n", reg, *val); 2737 2738 trace_regmap_reg_read(map, reg, *val); 2739 2740 if (!map->cache_bypass) 2741 regcache_write(map, reg, *val); 2742 } 2743 2744 return ret; 2745 } 2746 2747 /** 2748 * regmap_read() - Read a value from a single register 2749 * 2750 * @map: Register map to read from 2751 * @reg: Register to be read from 2752 * @val: Pointer to store read value 2753 * 2754 * A value of zero will be returned on success, a negative errno will 2755 * be returned in error cases. 2756 */ 2757 int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val) 2758 { 2759 int ret; 2760 2761 if (!IS_ALIGNED(reg, map->reg_stride)) 2762 return -EINVAL; 2763 2764 map->lock(map->lock_arg); 2765 2766 ret = _regmap_read(map, reg, val); 2767 2768 map->unlock(map->lock_arg); 2769 2770 return ret; 2771 } 2772 EXPORT_SYMBOL_GPL(regmap_read); 2773 2774 /** 2775 * regmap_raw_read() - Read raw data from the device 2776 * 2777 * @map: Register map to read from 2778 * @reg: First register to be read from 2779 * @val: Pointer to store read value 2780 * @val_len: Size of data to read 2781 * 2782 * A value of zero will be returned on success, a negative errno will 2783 * be returned in error cases. 2784 */ 2785 int regmap_raw_read(struct regmap *map, unsigned int reg, void *val, 2786 size_t val_len) 2787 { 2788 size_t val_bytes = map->format.val_bytes; 2789 size_t val_count = val_len / val_bytes; 2790 unsigned int v; 2791 int ret, i; 2792 2793 if (!map->bus) 2794 return -EINVAL; 2795 if (val_len % map->format.val_bytes) 2796 return -EINVAL; 2797 if (!IS_ALIGNED(reg, map->reg_stride)) 2798 return -EINVAL; 2799 if (val_count == 0) 2800 return -EINVAL; 2801 2802 map->lock(map->lock_arg); 2803 2804 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass || 2805 map->cache_type == REGCACHE_NONE) { 2806 size_t chunk_count, chunk_bytes; 2807 size_t chunk_regs = val_count; 2808 2809 if (!map->bus->read) { 2810 ret = -ENOTSUPP; 2811 goto out; 2812 } 2813 2814 if (map->use_single_read) 2815 chunk_regs = 1; 2816 else if (map->max_raw_read && val_len > map->max_raw_read) 2817 chunk_regs = map->max_raw_read / val_bytes; 2818 2819 chunk_count = val_count / chunk_regs; 2820 chunk_bytes = chunk_regs * val_bytes; 2821 2822 /* Read bytes that fit into whole chunks */ 2823 for (i = 0; i < chunk_count; i++) { 2824 ret = _regmap_raw_read(map, reg, val, chunk_bytes, false); 2825 if (ret != 0) 2826 goto out; 2827 2828 reg += regmap_get_offset(map, chunk_regs); 2829 val += chunk_bytes; 2830 val_len -= chunk_bytes; 2831 } 2832 2833 /* Read remaining bytes */ 2834 if (val_len) { 2835 ret = _regmap_raw_read(map, reg, val, val_len, false); 2836 if (ret != 0) 2837 goto out; 2838 } 2839 } else { 2840 /* Otherwise go word by word for the cache; should be low 2841 * cost as we expect to hit the cache. 2842 */ 2843 for (i = 0; i < val_count; i++) { 2844 ret = _regmap_read(map, reg + regmap_get_offset(map, i), 2845 &v); 2846 if (ret != 0) 2847 goto out; 2848 2849 map->format.format_val(val + (i * val_bytes), v, 0); 2850 } 2851 } 2852 2853 out: 2854 map->unlock(map->lock_arg); 2855 2856 return ret; 2857 } 2858 EXPORT_SYMBOL_GPL(regmap_raw_read); 2859 2860 /** 2861 * regmap_noinc_read(): Read data from a register without incrementing the 2862 * register number 2863 * 2864 * @map: Register map to read from 2865 * @reg: Register to read from 2866 * @val: Pointer to data buffer 2867 * @val_len: Length of output buffer in bytes. 2868 * 2869 * The regmap API usually assumes that bulk bus read operations will read a 2870 * range of registers. Some devices have certain registers for which a read 2871 * operation read will read from an internal FIFO. 2872 * 2873 * The target register must be volatile but registers after it can be 2874 * completely unrelated cacheable registers. 2875 * 2876 * This will attempt multiple reads as required to read val_len bytes. 2877 * 2878 * A value of zero will be returned on success, a negative errno will be 2879 * returned in error cases. 2880 */ 2881 int regmap_noinc_read(struct regmap *map, unsigned int reg, 2882 void *val, size_t val_len) 2883 { 2884 size_t read_len; 2885 int ret; 2886 2887 if (!map->bus) 2888 return -EINVAL; 2889 if (!map->bus->read) 2890 return -ENOTSUPP; 2891 if (val_len % map->format.val_bytes) 2892 return -EINVAL; 2893 if (!IS_ALIGNED(reg, map->reg_stride)) 2894 return -EINVAL; 2895 if (val_len == 0) 2896 return -EINVAL; 2897 2898 map->lock(map->lock_arg); 2899 2900 if (!regmap_volatile(map, reg) || !regmap_readable_noinc(map, reg)) { 2901 ret = -EINVAL; 2902 goto out_unlock; 2903 } 2904 2905 while (val_len) { 2906 if (map->max_raw_read && map->max_raw_read < val_len) 2907 read_len = map->max_raw_read; 2908 else 2909 read_len = val_len; 2910 ret = _regmap_raw_read(map, reg, val, read_len, true); 2911 if (ret) 2912 goto out_unlock; 2913 val = ((u8 *)val) + read_len; 2914 val_len -= read_len; 2915 } 2916 2917 out_unlock: 2918 map->unlock(map->lock_arg); 2919 return ret; 2920 } 2921 EXPORT_SYMBOL_GPL(regmap_noinc_read); 2922 2923 /** 2924 * regmap_field_read(): Read a value to a single register field 2925 * 2926 * @field: Register field to read from 2927 * @val: Pointer to store read value 2928 * 2929 * A value of zero will be returned on success, a negative errno will 2930 * be returned in error cases. 2931 */ 2932 int regmap_field_read(struct regmap_field *field, unsigned int *val) 2933 { 2934 int ret; 2935 unsigned int reg_val; 2936 ret = regmap_read(field->regmap, field->reg, ®_val); 2937 if (ret != 0) 2938 return ret; 2939 2940 reg_val &= field->mask; 2941 reg_val >>= field->shift; 2942 *val = reg_val; 2943 2944 return ret; 2945 } 2946 EXPORT_SYMBOL_GPL(regmap_field_read); 2947 2948 /** 2949 * regmap_fields_read() - Read a value to a single register field with port ID 2950 * 2951 * @field: Register field to read from 2952 * @id: port ID 2953 * @val: Pointer to store read value 2954 * 2955 * A value of zero will be returned on success, a negative errno will 2956 * be returned in error cases. 2957 */ 2958 int regmap_fields_read(struct regmap_field *field, unsigned int id, 2959 unsigned int *val) 2960 { 2961 int ret; 2962 unsigned int reg_val; 2963 2964 if (id >= field->id_size) 2965 return -EINVAL; 2966 2967 ret = regmap_read(field->regmap, 2968 field->reg + (field->id_offset * id), 2969 ®_val); 2970 if (ret != 0) 2971 return ret; 2972 2973 reg_val &= field->mask; 2974 reg_val >>= field->shift; 2975 *val = reg_val; 2976 2977 return ret; 2978 } 2979 EXPORT_SYMBOL_GPL(regmap_fields_read); 2980 2981 /** 2982 * regmap_bulk_read() - Read multiple registers from the device 2983 * 2984 * @map: Register map to read from 2985 * @reg: First register to be read from 2986 * @val: Pointer to store read value, in native register size for device 2987 * @val_count: Number of registers to read 2988 * 2989 * A value of zero will be returned on success, a negative errno will 2990 * be returned in error cases. 2991 */ 2992 int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, 2993 size_t val_count) 2994 { 2995 int ret, i; 2996 size_t val_bytes = map->format.val_bytes; 2997 bool vol = regmap_volatile_range(map, reg, val_count); 2998 2999 if (!IS_ALIGNED(reg, map->reg_stride)) 3000 return -EINVAL; 3001 if (val_count == 0) 3002 return -EINVAL; 3003 3004 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) { 3005 ret = regmap_raw_read(map, reg, val, val_bytes * val_count); 3006 if (ret != 0) 3007 return ret; 3008 3009 for (i = 0; i < val_count * val_bytes; i += val_bytes) 3010 map->format.parse_inplace(val + i); 3011 } else { 3012 #ifdef CONFIG_64BIT 3013 u64 *u64 = val; 3014 #endif 3015 u32 *u32 = val; 3016 u16 *u16 = val; 3017 u8 *u8 = val; 3018 3019 map->lock(map->lock_arg); 3020 3021 for (i = 0; i < val_count; i++) { 3022 unsigned int ival; 3023 3024 ret = _regmap_read(map, reg + regmap_get_offset(map, i), 3025 &ival); 3026 if (ret != 0) 3027 goto out; 3028 3029 switch (map->format.val_bytes) { 3030 #ifdef CONFIG_64BIT 3031 case 8: 3032 u64[i] = ival; 3033 break; 3034 #endif 3035 case 4: 3036 u32[i] = ival; 3037 break; 3038 case 2: 3039 u16[i] = ival; 3040 break; 3041 case 1: 3042 u8[i] = ival; 3043 break; 3044 default: 3045 ret = -EINVAL; 3046 goto out; 3047 } 3048 } 3049 3050 out: 3051 map->unlock(map->lock_arg); 3052 } 3053 3054 return ret; 3055 } 3056 EXPORT_SYMBOL_GPL(regmap_bulk_read); 3057 3058 static int _regmap_update_bits(struct regmap *map, unsigned int reg, 3059 unsigned int mask, unsigned int val, 3060 bool *change, bool force_write) 3061 { 3062 int ret; 3063 unsigned int tmp, orig; 3064 3065 if (change) 3066 *change = false; 3067 3068 if (regmap_volatile(map, reg) && map->reg_update_bits) { 3069 ret = map->reg_update_bits(map->bus_context, reg, mask, val); 3070 if (ret == 0 && change) 3071 *change = true; 3072 } else { 3073 ret = _regmap_read(map, reg, &orig); 3074 if (ret != 0) 3075 return ret; 3076 3077 tmp = orig & ~mask; 3078 tmp |= val & mask; 3079 3080 if (force_write || (tmp != orig)) { 3081 ret = _regmap_write(map, reg, tmp); 3082 if (ret == 0 && change) 3083 *change = true; 3084 } 3085 } 3086 3087 return ret; 3088 } 3089 3090 /** 3091 * regmap_update_bits_base() - Perform a read/modify/write cycle on a register 3092 * 3093 * @map: Register map to update 3094 * @reg: Register to update 3095 * @mask: Bitmask to change 3096 * @val: New value for bitmask 3097 * @change: Boolean indicating if a write was done 3098 * @async: Boolean indicating asynchronously 3099 * @force: Boolean indicating use force update 3100 * 3101 * Perform a read/modify/write cycle on a register map with change, async, force 3102 * options. 3103 * 3104 * If async is true: 3105 * 3106 * With most buses the read must be done synchronously so this is most useful 3107 * for devices with a cache which do not need to interact with the hardware to 3108 * determine the current register value. 3109 * 3110 * Returns zero for success, a negative number on error. 3111 */ 3112 int regmap_update_bits_base(struct regmap *map, unsigned int reg, 3113 unsigned int mask, unsigned int val, 3114 bool *change, bool async, bool force) 3115 { 3116 int ret; 3117 3118 map->lock(map->lock_arg); 3119 3120 map->async = async; 3121 3122 ret = _regmap_update_bits(map, reg, mask, val, change, force); 3123 3124 map->async = false; 3125 3126 map->unlock(map->lock_arg); 3127 3128 return ret; 3129 } 3130 EXPORT_SYMBOL_GPL(regmap_update_bits_base); 3131 3132 /** 3133 * regmap_test_bits() - Check if all specified bits are set in a register. 3134 * 3135 * @map: Register map to operate on 3136 * @reg: Register to read from 3137 * @bits: Bits to test 3138 * 3139 * Returns 0 if at least one of the tested bits is not set, 1 if all tested 3140 * bits are set and a negative error number if the underlying regmap_read() 3141 * fails. 3142 */ 3143 int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits) 3144 { 3145 unsigned int val, ret; 3146 3147 ret = regmap_read(map, reg, &val); 3148 if (ret) 3149 return ret; 3150 3151 return (val & bits) == bits; 3152 } 3153 EXPORT_SYMBOL_GPL(regmap_test_bits); 3154 3155 void regmap_async_complete_cb(struct regmap_async *async, int ret) 3156 { 3157 struct regmap *map = async->map; 3158 bool wake; 3159 3160 trace_regmap_async_io_complete(map); 3161 3162 spin_lock(&map->async_lock); 3163 list_move(&async->list, &map->async_free); 3164 wake = list_empty(&map->async_list); 3165 3166 if (ret != 0) 3167 map->async_ret = ret; 3168 3169 spin_unlock(&map->async_lock); 3170 3171 if (wake) 3172 wake_up(&map->async_waitq); 3173 } 3174 EXPORT_SYMBOL_GPL(regmap_async_complete_cb); 3175 3176 static int regmap_async_is_done(struct regmap *map) 3177 { 3178 unsigned long flags; 3179 int ret; 3180 3181 spin_lock_irqsave(&map->async_lock, flags); 3182 ret = list_empty(&map->async_list); 3183 spin_unlock_irqrestore(&map->async_lock, flags); 3184 3185 return ret; 3186 } 3187 3188 /** 3189 * regmap_async_complete - Ensure all asynchronous I/O has completed. 3190 * 3191 * @map: Map to operate on. 3192 * 3193 * Blocks until any pending asynchronous I/O has completed. Returns 3194 * an error code for any failed I/O operations. 3195 */ 3196 int regmap_async_complete(struct regmap *map) 3197 { 3198 unsigned long flags; 3199 int ret; 3200 3201 /* Nothing to do with no async support */ 3202 if (!map->bus || !map->bus->async_write) 3203 return 0; 3204 3205 trace_regmap_async_complete_start(map); 3206 3207 wait_event(map->async_waitq, regmap_async_is_done(map)); 3208 3209 spin_lock_irqsave(&map->async_lock, flags); 3210 ret = map->async_ret; 3211 map->async_ret = 0; 3212 spin_unlock_irqrestore(&map->async_lock, flags); 3213 3214 trace_regmap_async_complete_done(map); 3215 3216 return ret; 3217 } 3218 EXPORT_SYMBOL_GPL(regmap_async_complete); 3219 3220 /** 3221 * regmap_register_patch - Register and apply register updates to be applied 3222 * on device initialistion 3223 * 3224 * @map: Register map to apply updates to. 3225 * @regs: Values to update. 3226 * @num_regs: Number of entries in regs. 3227 * 3228 * Register a set of register updates to be applied to the device 3229 * whenever the device registers are synchronised with the cache and 3230 * apply them immediately. Typically this is used to apply 3231 * corrections to be applied to the device defaults on startup, such 3232 * as the updates some vendors provide to undocumented registers. 3233 * 3234 * The caller must ensure that this function cannot be called 3235 * concurrently with either itself or regcache_sync(). 3236 */ 3237 int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs, 3238 int num_regs) 3239 { 3240 struct reg_sequence *p; 3241 int ret; 3242 bool bypass; 3243 3244 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n", 3245 num_regs)) 3246 return 0; 3247 3248 p = krealloc(map->patch, 3249 sizeof(struct reg_sequence) * (map->patch_regs + num_regs), 3250 GFP_KERNEL); 3251 if (p) { 3252 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs)); 3253 map->patch = p; 3254 map->patch_regs += num_regs; 3255 } else { 3256 return -ENOMEM; 3257 } 3258 3259 map->lock(map->lock_arg); 3260 3261 bypass = map->cache_bypass; 3262 3263 map->cache_bypass = true; 3264 map->async = true; 3265 3266 ret = _regmap_multi_reg_write(map, regs, num_regs); 3267 3268 map->async = false; 3269 map->cache_bypass = bypass; 3270 3271 map->unlock(map->lock_arg); 3272 3273 regmap_async_complete(map); 3274 3275 return ret; 3276 } 3277 EXPORT_SYMBOL_GPL(regmap_register_patch); 3278 3279 /** 3280 * regmap_get_val_bytes() - Report the size of a register value 3281 * 3282 * @map: Register map to operate on. 3283 * 3284 * Report the size of a register value, mainly intended to for use by 3285 * generic infrastructure built on top of regmap. 3286 */ 3287 int regmap_get_val_bytes(struct regmap *map) 3288 { 3289 if (map->format.format_write) 3290 return -EINVAL; 3291 3292 return map->format.val_bytes; 3293 } 3294 EXPORT_SYMBOL_GPL(regmap_get_val_bytes); 3295 3296 /** 3297 * regmap_get_max_register() - Report the max register value 3298 * 3299 * @map: Register map to operate on. 3300 * 3301 * Report the max register value, mainly intended to for use by 3302 * generic infrastructure built on top of regmap. 3303 */ 3304 int regmap_get_max_register(struct regmap *map) 3305 { 3306 return map->max_register ? map->max_register : -EINVAL; 3307 } 3308 EXPORT_SYMBOL_GPL(regmap_get_max_register); 3309 3310 /** 3311 * regmap_get_reg_stride() - Report the register address stride 3312 * 3313 * @map: Register map to operate on. 3314 * 3315 * Report the register address stride, mainly intended to for use by 3316 * generic infrastructure built on top of regmap. 3317 */ 3318 int regmap_get_reg_stride(struct regmap *map) 3319 { 3320 return map->reg_stride; 3321 } 3322 EXPORT_SYMBOL_GPL(regmap_get_reg_stride); 3323 3324 int regmap_parse_val(struct regmap *map, const void *buf, 3325 unsigned int *val) 3326 { 3327 if (!map->format.parse_val) 3328 return -EINVAL; 3329 3330 *val = map->format.parse_val(buf); 3331 3332 return 0; 3333 } 3334 EXPORT_SYMBOL_GPL(regmap_parse_val); 3335 3336 static int __init regmap_initcall(void) 3337 { 3338 regmap_debugfs_initcall(); 3339 3340 return 0; 3341 } 3342 postcore_initcall(regmap_initcall); 3343