1 /* 2 * Register cache access API 3 * 4 * Copyright 2011 Wolfson Microelectronics plc 5 * 6 * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/slab.h> 14 #include <trace/events/regmap.h> 15 #include <linux/bsearch.h> 16 #include <linux/sort.h> 17 18 #include "internal.h" 19 20 static const struct regcache_ops *cache_types[] = { 21 ®cache_indexed_ops, 22 ®cache_rbtree_ops, 23 ®cache_lzo_ops, 24 }; 25 26 static int regcache_hw_init(struct regmap *map) 27 { 28 int i, j; 29 int ret; 30 int count; 31 unsigned int val; 32 void *tmp_buf; 33 34 if (!map->num_reg_defaults_raw) 35 return -EINVAL; 36 37 if (!map->reg_defaults_raw) { 38 dev_warn(map->dev, "No cache defaults, reading back from HW\n"); 39 tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL); 40 if (!tmp_buf) 41 return -EINVAL; 42 ret = regmap_bulk_read(map, 0, tmp_buf, 43 map->num_reg_defaults_raw); 44 if (ret < 0) { 45 kfree(tmp_buf); 46 return ret; 47 } 48 map->reg_defaults_raw = tmp_buf; 49 map->cache_free = 1; 50 } 51 52 /* calculate the size of reg_defaults */ 53 for (count = 0, i = 0; i < map->num_reg_defaults_raw; i++) { 54 val = regcache_get_val(map->reg_defaults_raw, 55 i, map->cache_word_size); 56 if (!val) 57 continue; 58 count++; 59 } 60 61 map->reg_defaults = kmalloc(count * sizeof(struct reg_default), 62 GFP_KERNEL); 63 if (!map->reg_defaults) 64 return -ENOMEM; 65 66 /* fill the reg_defaults */ 67 map->num_reg_defaults = count; 68 for (i = 0, j = 0; i < map->num_reg_defaults_raw; i++) { 69 val = regcache_get_val(map->reg_defaults_raw, 70 i, map->cache_word_size); 71 if (!val) 72 continue; 73 map->reg_defaults[j].reg = i; 74 map->reg_defaults[j].def = val; 75 j++; 76 } 77 78 return 0; 79 } 80 81 int regcache_init(struct regmap *map) 82 { 83 int ret; 84 int i; 85 void *tmp_buf; 86 87 if (map->cache_type == REGCACHE_NONE) { 88 map->cache_bypass = true; 89 return 0; 90 } 91 92 for (i = 0; i < ARRAY_SIZE(cache_types); i++) 93 if (cache_types[i]->type == map->cache_type) 94 break; 95 96 if (i == ARRAY_SIZE(cache_types)) { 97 dev_err(map->dev, "Could not match compress type: %d\n", 98 map->cache_type); 99 return -EINVAL; 100 } 101 102 map->cache = NULL; 103 map->cache_ops = cache_types[i]; 104 105 if (!map->cache_ops->read || 106 !map->cache_ops->write || 107 !map->cache_ops->name) 108 return -EINVAL; 109 110 /* We still need to ensure that the reg_defaults 111 * won't vanish from under us. We'll need to make 112 * a copy of it. 113 */ 114 if (map->reg_defaults) { 115 if (!map->num_reg_defaults) 116 return -EINVAL; 117 tmp_buf = kmemdup(map->reg_defaults, map->num_reg_defaults * 118 sizeof(struct reg_default), GFP_KERNEL); 119 if (!tmp_buf) 120 return -ENOMEM; 121 map->reg_defaults = tmp_buf; 122 } else if (map->num_reg_defaults_raw) { 123 /* Some devices such as PMICs don't have cache defaults, 124 * we cope with this by reading back the HW registers and 125 * crafting the cache defaults by hand. 126 */ 127 ret = regcache_hw_init(map); 128 if (ret < 0) 129 return ret; 130 } 131 132 if (!map->max_register) 133 map->max_register = map->num_reg_defaults_raw; 134 135 if (map->cache_ops->init) { 136 dev_dbg(map->dev, "Initializing %s cache\n", 137 map->cache_ops->name); 138 return map->cache_ops->init(map); 139 } 140 return 0; 141 } 142 143 void regcache_exit(struct regmap *map) 144 { 145 if (map->cache_type == REGCACHE_NONE) 146 return; 147 148 BUG_ON(!map->cache_ops); 149 150 kfree(map->reg_defaults); 151 if (map->cache_free) 152 kfree(map->reg_defaults_raw); 153 154 if (map->cache_ops->exit) { 155 dev_dbg(map->dev, "Destroying %s cache\n", 156 map->cache_ops->name); 157 map->cache_ops->exit(map); 158 } 159 } 160 161 /** 162 * regcache_read: Fetch the value of a given register from the cache. 163 * 164 * @map: map to configure. 165 * @reg: The register index. 166 * @value: The value to be returned. 167 * 168 * Return a negative value on failure, 0 on success. 169 */ 170 int regcache_read(struct regmap *map, 171 unsigned int reg, unsigned int *value) 172 { 173 if (map->cache_type == REGCACHE_NONE) 174 return -ENOSYS; 175 176 BUG_ON(!map->cache_ops); 177 178 if (!regmap_readable(map, reg)) 179 return -EIO; 180 181 if (!regmap_volatile(map, reg)) 182 return map->cache_ops->read(map, reg, value); 183 184 return -EINVAL; 185 } 186 EXPORT_SYMBOL_GPL(regcache_read); 187 188 /** 189 * regcache_write: Set the value of a given register in the cache. 190 * 191 * @map: map to configure. 192 * @reg: The register index. 193 * @value: The new register value. 194 * 195 * Return a negative value on failure, 0 on success. 196 */ 197 int regcache_write(struct regmap *map, 198 unsigned int reg, unsigned int value) 199 { 200 if (map->cache_type == REGCACHE_NONE) 201 return 0; 202 203 BUG_ON(!map->cache_ops); 204 205 if (!regmap_writeable(map, reg)) 206 return -EIO; 207 208 if (!regmap_volatile(map, reg)) 209 return map->cache_ops->write(map, reg, value); 210 211 return 0; 212 } 213 EXPORT_SYMBOL_GPL(regcache_write); 214 215 /** 216 * regcache_sync: Sync the register cache with the hardware. 217 * 218 * @map: map to configure. 219 * 220 * Any registers that should not be synced should be marked as 221 * volatile. In general drivers can choose not to use the provided 222 * syncing functionality if they so require. 223 * 224 * Return a negative value on failure, 0 on success. 225 */ 226 int regcache_sync(struct regmap *map) 227 { 228 int ret = 0; 229 unsigned int val; 230 unsigned int i; 231 const char *name; 232 unsigned int bypass; 233 234 BUG_ON(!map->cache_ops); 235 236 mutex_lock(&map->lock); 237 /* Remember the initial bypass state */ 238 bypass = map->cache_bypass; 239 dev_dbg(map->dev, "Syncing %s cache\n", 240 map->cache_ops->name); 241 name = map->cache_ops->name; 242 trace_regcache_sync(map->dev, name, "start"); 243 if (map->cache_ops->sync) { 244 ret = map->cache_ops->sync(map); 245 } else { 246 for (i = 0; i < map->num_reg_defaults; i++) { 247 ret = regcache_read(map, i, &val); 248 if (ret < 0) 249 goto out; 250 map->cache_bypass = 1; 251 ret = _regmap_write(map, i, val); 252 map->cache_bypass = 0; 253 if (ret < 0) 254 goto out; 255 dev_dbg(map->dev, "Synced register %#x, value %#x\n", 256 map->reg_defaults[i].reg, 257 map->reg_defaults[i].def); 258 } 259 260 } 261 out: 262 trace_regcache_sync(map->dev, name, "stop"); 263 /* Restore the bypass state */ 264 map->cache_bypass = bypass; 265 mutex_unlock(&map->lock); 266 267 return ret; 268 } 269 EXPORT_SYMBOL_GPL(regcache_sync); 270 271 /** 272 * regcache_cache_only: Put a register map into cache only mode 273 * 274 * @map: map to configure 275 * @cache_only: flag if changes should be written to the hardware 276 * 277 * When a register map is marked as cache only writes to the register 278 * map API will only update the register cache, they will not cause 279 * any hardware changes. This is useful for allowing portions of 280 * drivers to act as though the device were functioning as normal when 281 * it is disabled for power saving reasons. 282 */ 283 void regcache_cache_only(struct regmap *map, bool enable) 284 { 285 mutex_lock(&map->lock); 286 WARN_ON(map->cache_bypass && enable); 287 map->cache_only = enable; 288 mutex_unlock(&map->lock); 289 } 290 EXPORT_SYMBOL_GPL(regcache_cache_only); 291 292 /** 293 * regcache_cache_bypass: Put a register map into cache bypass mode 294 * 295 * @map: map to configure 296 * @cache_bypass: flag if changes should not be written to the hardware 297 * 298 * When a register map is marked with the cache bypass option, writes 299 * to the register map API will only update the hardware and not the 300 * the cache directly. This is useful when syncing the cache back to 301 * the hardware. 302 */ 303 void regcache_cache_bypass(struct regmap *map, bool enable) 304 { 305 mutex_lock(&map->lock); 306 WARN_ON(map->cache_only && enable); 307 map->cache_bypass = enable; 308 mutex_unlock(&map->lock); 309 } 310 EXPORT_SYMBOL_GPL(regcache_cache_bypass); 311 312 bool regcache_set_val(void *base, unsigned int idx, 313 unsigned int val, unsigned int word_size) 314 { 315 switch (word_size) { 316 case 1: { 317 u8 *cache = base; 318 if (cache[idx] == val) 319 return true; 320 cache[idx] = val; 321 break; 322 } 323 case 2: { 324 u16 *cache = base; 325 if (cache[idx] == val) 326 return true; 327 cache[idx] = val; 328 break; 329 } 330 default: 331 BUG(); 332 } 333 /* unreachable */ 334 return false; 335 } 336 337 unsigned int regcache_get_val(const void *base, unsigned int idx, 338 unsigned int word_size) 339 { 340 if (!base) 341 return -EINVAL; 342 343 switch (word_size) { 344 case 1: { 345 const u8 *cache = base; 346 return cache[idx]; 347 } 348 case 2: { 349 const u16 *cache = base; 350 return cache[idx]; 351 } 352 default: 353 BUG(); 354 } 355 /* unreachable */ 356 return -1; 357 } 358 359 static int regcache_default_cmp(const void *a, const void *b) 360 { 361 const struct reg_default *_a = a; 362 const struct reg_default *_b = b; 363 364 return _a->reg - _b->reg; 365 } 366 367 int regcache_lookup_reg(struct regmap *map, unsigned int reg) 368 { 369 struct reg_default key; 370 struct reg_default *r; 371 372 key.reg = reg; 373 key.def = 0; 374 375 r = bsearch(&key, map->reg_defaults, map->num_reg_defaults, 376 sizeof(struct reg_default), regcache_default_cmp); 377 378 if (r) 379 return r - map->reg_defaults; 380 else 381 return -ENOENT; 382 } 383 384 int regcache_insert_reg(struct regmap *map, unsigned int reg, 385 unsigned int val) 386 { 387 void *tmp; 388 389 tmp = krealloc(map->reg_defaults, 390 (map->num_reg_defaults + 1) * sizeof(struct reg_default), 391 GFP_KERNEL); 392 if (!tmp) 393 return -ENOMEM; 394 map->reg_defaults = tmp; 395 map->num_reg_defaults++; 396 map->reg_defaults[map->num_reg_defaults - 1].reg = reg; 397 map->reg_defaults[map->num_reg_defaults - 1].def = val; 398 sort(map->reg_defaults, map->num_reg_defaults, 399 sizeof(struct reg_default), regcache_default_cmp, NULL); 400 return 0; 401 } 402