xref: /linux/drivers/auxdisplay/arm-charlcd.c (revision a50eba1e778ad4da5b6f9ddbbf57dabbea59bc05)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Driver for the on-board character LCD found on some ARM reference boards
4  * This is basically an Hitachi HD44780 LCD with a custom IP block to drive it
5  * https://en.wikipedia.org/wiki/HD44780_Character_LCD
6  * Currently it will just display the text "ARM Linux" and the linux version
7  *
8  * Author: Linus Walleij <triad@df.lth.se>
9  */
10 #include <linux/completion.h>
11 #include <linux/container_of.h>
12 #include <linux/delay.h>
13 #include <linux/err.h>
14 #include <linux/init.h>
15 #include <linux/interrupt.h>
16 #include <linux/iopoll.h>
17 #include <linux/platform_device.h>
18 #include <linux/string.h>
19 #include <linux/types.h>
20 #include <linux/workqueue.h>
21 #include <generated/utsrelease.h>
22 
23 #define DRIVERNAME "arm-charlcd"
24 #define CHARLCD_TIMEOUT (msecs_to_jiffies(1000))
25 
26 /* Offsets to registers */
27 #define CHAR_COM	0x00U
28 #define CHAR_DAT	0x04U
29 #define CHAR_RD		0x08U
30 #define CHAR_RAW	0x0CU
31 #define CHAR_MASK	0x10U
32 #define CHAR_STAT	0x14U
33 
34 #define CHAR_RAW_CLEAR	0x00000000U
35 #define CHAR_RAW_VALID	0x00000100U
36 
37 /* Hitachi HD44780 display commands */
38 #define HD_CLEAR			0x01U
39 #define HD_HOME				0x02U
40 #define HD_ENTRYMODE			0x04U
41 #define HD_ENTRYMODE_INCREMENT		0x02U
42 #define HD_ENTRYMODE_SHIFT		0x01U
43 #define HD_DISPCTRL			0x08U
44 #define HD_DISPCTRL_ON			0x04U
45 #define HD_DISPCTRL_CURSOR_ON		0x02U
46 #define HD_DISPCTRL_CURSOR_BLINK	0x01U
47 #define HD_CRSR_SHIFT			0x10U
48 #define HD_CRSR_SHIFT_DISPLAY		0x08U
49 #define HD_CRSR_SHIFT_DISPLAY_RIGHT	0x04U
50 #define HD_FUNCSET			0x20U
51 #define HD_FUNCSET_8BIT			0x10U
52 #define HD_FUNCSET_2_LINES		0x08U
53 #define HD_FUNCSET_FONT_5X10		0x04U
54 #define HD_SET_CGRAM			0x40U
55 #define HD_SET_DDRAM			0x80U
56 #define HD_BUSY_FLAG			0x80U
57 
58 /**
59  * struct charlcd - Private data structure
60  * @dev: a pointer back to containing device
61  * @virtbase: the offset to the controller in virtual memory
62  * @irq: reserved interrupt number
63  * @complete: completion structure for the last LCD command
64  * @init_work: delayed work structure to initialize the display on boot
65  */
66 struct charlcd {
67 	struct device *dev;
68 	void __iomem *virtbase;
69 	int irq;
70 	struct completion complete;
71 	struct delayed_work init_work;
72 };
73 
74 static irqreturn_t charlcd_interrupt(int irq, void *data)
75 {
76 	struct charlcd *lcd = data;
77 	u8 status;
78 
79 	status = readl(lcd->virtbase + CHAR_STAT) & 0x01;
80 	/* Clear IRQ */
81 	writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
82 	if (status)
83 		complete(&lcd->complete);
84 	else
85 		dev_info(lcd->dev, "Spurious IRQ (%02x)\n", status);
86 	return IRQ_HANDLED;
87 }
88 
89 
90 static void charlcd_wait_complete_irq(struct charlcd *lcd)
91 {
92 	int ret;
93 
94 	ret = wait_for_completion_interruptible_timeout(&lcd->complete,
95 							CHARLCD_TIMEOUT);
96 	/* Disable IRQ after completion */
97 	writel(0x00, lcd->virtbase + CHAR_MASK);
98 
99 	if (ret < 0) {
100 		dev_err(lcd->dev,
101 			"wait_for_completion_interruptible_timeout() returned %d waiting for ready\n",
102 			ret);
103 		return;
104 	}
105 
106 	if (ret == 0) {
107 		dev_err(lcd->dev, "charlcd controller timed out waiting for ready\n");
108 		return;
109 	}
110 }
111 
112 static u8 charlcd_4bit_read_char(struct charlcd *lcd)
113 {
114 	u8 data;
115 	u32 val;
116 
117 	/* If we can, use an IRQ to wait for the data, else poll */
118 	if (lcd->irq >= 0)
119 		charlcd_wait_complete_irq(lcd);
120 	else {
121 		udelay(100);
122 		readl_poll_timeout_atomic(lcd->virtbase + CHAR_RAW, val,
123 					  val & CHAR_RAW_VALID, 100, 1000);
124 		writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
125 	}
126 	msleep(1);
127 
128 	/* Read the 4 high bits of the data */
129 	data = readl(lcd->virtbase + CHAR_RD) & 0xf0;
130 
131 	/*
132 	 * The second read for the low bits does not trigger an IRQ
133 	 * so in this case we have to poll for the 4 lower bits
134 	 */
135 	udelay(100);
136 	readl_poll_timeout_atomic(lcd->virtbase + CHAR_RAW, val,
137 				  val & CHAR_RAW_VALID, 100, 1000);
138 	writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
139 	msleep(1);
140 
141 	/* Read the 4 low bits of the data */
142 	data |= (readl(lcd->virtbase + CHAR_RD) >> 4) & 0x0f;
143 
144 	return data;
145 }
146 
147 static bool charlcd_4bit_read_bf(struct charlcd *lcd)
148 {
149 	if (lcd->irq >= 0) {
150 		/*
151 		 * If we'll use IRQs to wait for the busyflag, clear any
152 		 * pending flag and enable IRQ
153 		 */
154 		writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
155 		init_completion(&lcd->complete);
156 		writel(0x01, lcd->virtbase + CHAR_MASK);
157 	}
158 	readl(lcd->virtbase + CHAR_COM);
159 
160 	return charlcd_4bit_read_char(lcd) & HD_BUSY_FLAG;
161 }
162 
163 static void charlcd_4bit_wait_busy(struct charlcd *lcd)
164 {
165 	int retries = 50;
166 
167 	udelay(100);
168 	while (charlcd_4bit_read_bf(lcd) && retries)
169 		retries--;
170 	if (!retries)
171 		dev_err(lcd->dev, "timeout waiting for busyflag\n");
172 }
173 
174 static void charlcd_4bit_command(struct charlcd *lcd, u8 cmd)
175 {
176 	u32 cmdlo = (cmd << 4) & 0xf0;
177 	u32 cmdhi = (cmd & 0xf0);
178 
179 	writel(cmdhi, lcd->virtbase + CHAR_COM);
180 	udelay(10);
181 	writel(cmdlo, lcd->virtbase + CHAR_COM);
182 	charlcd_4bit_wait_busy(lcd);
183 }
184 
185 static void charlcd_4bit_char(struct charlcd *lcd, u8 ch)
186 {
187 	u32 chlo = (ch << 4) & 0xf0;
188 	u32 chhi = (ch & 0xf0);
189 
190 	writel(chhi, lcd->virtbase + CHAR_DAT);
191 	udelay(10);
192 	writel(chlo, lcd->virtbase + CHAR_DAT);
193 	charlcd_4bit_wait_busy(lcd);
194 }
195 
196 static void charlcd_4bit_print(struct charlcd *lcd, int line, const char *str)
197 {
198 	u8 offset;
199 	int i;
200 
201 	/*
202 	 * We support line 0, 1
203 	 * Line 1 runs from 0x00..0x27
204 	 * Line 2 runs from 0x28..0x4f
205 	 */
206 	if (line == 0)
207 		offset = 0;
208 	else if (line == 1)
209 		offset = 0x28;
210 	else
211 		return;
212 
213 	/* Set offset */
214 	charlcd_4bit_command(lcd, HD_SET_DDRAM | offset);
215 
216 	/* Send string */
217 	for (i = 0; i < strlen(str) && i < 0x28; i++)
218 		charlcd_4bit_char(lcd, str[i]);
219 }
220 
221 static void charlcd_4bit_init(struct charlcd *lcd)
222 {
223 	/* These commands cannot be checked with the busy flag */
224 	writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM);
225 	msleep(5);
226 	writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM);
227 	udelay(100);
228 	writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM);
229 	udelay(100);
230 	/* Go to 4bit mode */
231 	writel(HD_FUNCSET, lcd->virtbase + CHAR_COM);
232 	udelay(100);
233 	/*
234 	 * 4bit mode, 2 lines, 5x8 font, after this the number of lines
235 	 * and the font cannot be changed until the next initialization sequence
236 	 */
237 	charlcd_4bit_command(lcd, HD_FUNCSET | HD_FUNCSET_2_LINES);
238 	charlcd_4bit_command(lcd, HD_DISPCTRL | HD_DISPCTRL_ON);
239 	charlcd_4bit_command(lcd, HD_ENTRYMODE | HD_ENTRYMODE_INCREMENT);
240 	charlcd_4bit_command(lcd, HD_CLEAR);
241 	charlcd_4bit_command(lcd, HD_HOME);
242 	/* Put something useful in the display */
243 	charlcd_4bit_print(lcd, 0, "ARM Linux");
244 	charlcd_4bit_print(lcd, 1, UTS_RELEASE);
245 }
246 
247 static void charlcd_init_work(struct work_struct *work)
248 {
249 	struct charlcd *lcd =
250 		container_of(work, struct charlcd, init_work.work);
251 
252 	charlcd_4bit_init(lcd);
253 }
254 
255 static int __init charlcd_probe(struct platform_device *pdev)
256 {
257 	struct device *dev = &pdev->dev;
258 	int ret;
259 	struct charlcd *lcd;
260 
261 	lcd = devm_kzalloc(dev, sizeof(*lcd), GFP_KERNEL);
262 	if (!lcd)
263 		return -ENOMEM;
264 
265 	lcd->dev = &pdev->dev;
266 
267 	lcd->virtbase = devm_platform_ioremap_resource(pdev, 0);
268 	if (IS_ERR(lcd->virtbase))
269 		return PTR_ERR(lcd->virtbase);
270 
271 	lcd->irq = platform_get_irq(pdev, 0);
272 	/* If no IRQ is supplied, we'll survive without it */
273 	if (lcd->irq >= 0) {
274 		ret = devm_request_irq(dev, lcd->irq, charlcd_interrupt, 0, DRIVERNAME, lcd);
275 		if (ret)
276 			return ret;
277 	}
278 
279 	platform_set_drvdata(pdev, lcd);
280 
281 	/*
282 	 * Initialize the display in a delayed work, because
283 	 * it is VERY slow and would slow down the boot of the system.
284 	 */
285 	INIT_DELAYED_WORK(&lcd->init_work, charlcd_init_work);
286 	schedule_delayed_work(&lcd->init_work, 0);
287 
288 	return 0;
289 }
290 
291 static int charlcd_suspend(struct device *dev)
292 {
293 	struct charlcd *lcd = dev_get_drvdata(dev);
294 
295 	/* Power the display off */
296 	charlcd_4bit_command(lcd, HD_DISPCTRL);
297 	return 0;
298 }
299 
300 static int charlcd_resume(struct device *dev)
301 {
302 	struct charlcd *lcd = dev_get_drvdata(dev);
303 
304 	/* Turn the display back on */
305 	charlcd_4bit_command(lcd, HD_DISPCTRL | HD_DISPCTRL_ON);
306 	return 0;
307 }
308 
309 static const struct dev_pm_ops charlcd_pm_ops = {
310 	.suspend = charlcd_suspend,
311 	.resume = charlcd_resume,
312 };
313 
314 static const struct of_device_id charlcd_match[] = {
315 	{ .compatible = "arm,versatile-lcd", },
316 	{}
317 };
318 
319 static struct platform_driver charlcd_driver = {
320 	.driver = {
321 		.name = DRIVERNAME,
322 		.pm = &charlcd_pm_ops,
323 		.suppress_bind_attrs = true,
324 		.of_match_table = charlcd_match,
325 	},
326 };
327 builtin_platform_driver_probe(charlcd_driver, charlcd_probe);
328