1 /* 2 * Driver for the Solos PCI ADSL2+ card, designed to support Linux by 3 * Traverse Technologies -- http://www.traverse.com.au/ 4 * Xrio Limited -- http://www.xrio.com/ 5 * 6 * 7 * Copyright © 2008 Traverse Technologies 8 * Copyright © 2008 Intel Corporation 9 * 10 * Authors: Nathan Williams <nathan@traverse.com.au> 11 * David Woodhouse <dwmw2@infradead.org> 12 * Treker Chen <treker@xrio.com> 13 * 14 * This program is free software; you can redistribute it and/or 15 * modify it under the terms of the GNU General Public License 16 * version 2, as published by the Free Software Foundation. 17 * 18 * This program is distributed in the hope that it will be useful, 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 * GNU General Public License for more details. 22 */ 23 24 #define DEBUG 25 #define VERBOSE_DEBUG 26 27 #include <linux/interrupt.h> 28 #include <linux/module.h> 29 #include <linux/kernel.h> 30 #include <linux/errno.h> 31 #include <linux/ioport.h> 32 #include <linux/types.h> 33 #include <linux/pci.h> 34 #include <linux/atm.h> 35 #include <linux/atmdev.h> 36 #include <linux/skbuff.h> 37 #include <linux/sysfs.h> 38 #include <linux/device.h> 39 #include <linux/kobject.h> 40 #include <linux/firmware.h> 41 #include <linux/ctype.h> 42 #include <linux/swab.h> 43 44 #define VERSION "0.07" 45 #define PTAG "solos-pci" 46 47 #define CONFIG_RAM_SIZE 128 48 #define FLAGS_ADDR 0x7C 49 #define IRQ_EN_ADDR 0x78 50 #define FPGA_VER 0x74 51 #define IRQ_CLEAR 0x70 52 #define WRITE_FLASH 0x6C 53 #define PORTS 0x68 54 #define FLASH_BLOCK 0x64 55 #define FLASH_BUSY 0x60 56 #define FPGA_MODE 0x5C 57 #define FLASH_MODE 0x58 58 #define TX_DMA_ADDR(port) (0x40 + (4 * (port))) 59 #define RX_DMA_ADDR(port) (0x30 + (4 * (port))) 60 61 #define DATA_RAM_SIZE 32768 62 #define BUF_SIZE 2048 63 #define OLD_BUF_SIZE 4096 /* For FPGA versions <= 2*/ 64 #define FPGA_PAGE 528 /* FPGA flash page size*/ 65 #define SOLOS_PAGE 512 /* Solos flash page size*/ 66 #define FPGA_BLOCK (FPGA_PAGE * 8) /* FPGA flash block size*/ 67 #define SOLOS_BLOCK (SOLOS_PAGE * 8) /* Solos flash block size*/ 68 69 #define RX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2) 70 #define TX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2 + (card->buffer_size)) 71 #define FLASH_BUF ((card->buffers) + 4*(card->buffer_size)*2) 72 73 #define RX_DMA_SIZE 2048 74 75 #define FPGA_VERSION(a,b) (((a) << 8) + (b)) 76 #define LEGACY_BUFFERS 2 77 #define DMA_SUPPORTED 4 78 79 static int reset = 0; 80 static int atmdebug = 0; 81 static int firmware_upgrade = 0; 82 static int fpga_upgrade = 0; 83 static int db_firmware_upgrade = 0; 84 static int db_fpga_upgrade = 0; 85 86 struct pkt_hdr { 87 __le16 size; 88 __le16 vpi; 89 __le16 vci; 90 __le16 type; 91 }; 92 93 struct solos_skb_cb { 94 struct atm_vcc *vcc; 95 uint32_t dma_addr; 96 }; 97 98 99 #define SKB_CB(skb) ((struct solos_skb_cb *)skb->cb) 100 101 #define PKT_DATA 0 102 #define PKT_COMMAND 1 103 #define PKT_POPEN 3 104 #define PKT_PCLOSE 4 105 #define PKT_STATUS 5 106 107 struct solos_card { 108 void __iomem *config_regs; 109 void __iomem *buffers; 110 int nr_ports; 111 int tx_mask; 112 struct pci_dev *dev; 113 struct atm_dev *atmdev[4]; 114 struct tasklet_struct tlet; 115 spinlock_t tx_lock; 116 spinlock_t tx_queue_lock; 117 spinlock_t cli_queue_lock; 118 spinlock_t param_queue_lock; 119 struct list_head param_queue; 120 struct sk_buff_head tx_queue[4]; 121 struct sk_buff_head cli_queue[4]; 122 struct sk_buff *tx_skb[4]; 123 struct sk_buff *rx_skb[4]; 124 wait_queue_head_t param_wq; 125 wait_queue_head_t fw_wq; 126 int using_dma; 127 int fpga_version; 128 int buffer_size; 129 }; 130 131 132 struct solos_param { 133 struct list_head list; 134 pid_t pid; 135 int port; 136 struct sk_buff *response; 137 }; 138 139 #define SOLOS_CHAN(atmdev) ((int)(unsigned long)(atmdev)->phy_data) 140 141 MODULE_AUTHOR("Traverse Technologies <support@traverse.com.au>"); 142 MODULE_DESCRIPTION("Solos PCI driver"); 143 MODULE_VERSION(VERSION); 144 MODULE_LICENSE("GPL"); 145 MODULE_PARM_DESC(reset, "Reset Solos chips on startup"); 146 MODULE_PARM_DESC(atmdebug, "Print ATM data"); 147 MODULE_PARM_DESC(firmware_upgrade, "Initiate Solos firmware upgrade"); 148 MODULE_PARM_DESC(fpga_upgrade, "Initiate FPGA upgrade"); 149 MODULE_PARM_DESC(db_firmware_upgrade, "Initiate daughter board Solos firmware upgrade"); 150 MODULE_PARM_DESC(db_fpga_upgrade, "Initiate daughter board FPGA upgrade"); 151 module_param(reset, int, 0444); 152 module_param(atmdebug, int, 0644); 153 module_param(firmware_upgrade, int, 0444); 154 module_param(fpga_upgrade, int, 0444); 155 module_param(db_firmware_upgrade, int, 0444); 156 module_param(db_fpga_upgrade, int, 0444); 157 158 static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb, 159 struct atm_vcc *vcc); 160 static uint32_t fpga_tx(struct solos_card *); 161 static irqreturn_t solos_irq(int irq, void *dev_id); 162 static struct atm_vcc* find_vcc(struct atm_dev *dev, short vpi, int vci); 163 static int list_vccs(int vci); 164 static void release_vccs(struct atm_dev *dev); 165 static int atm_init(struct solos_card *); 166 static void atm_remove(struct solos_card *); 167 static int send_command(struct solos_card *card, int dev, const char *buf, size_t size); 168 static void solos_bh(unsigned long); 169 static int print_buffer(struct sk_buff *buf); 170 171 static inline void solos_pop(struct atm_vcc *vcc, struct sk_buff *skb) 172 { 173 if (vcc->pop) 174 vcc->pop(vcc, skb); 175 else 176 dev_kfree_skb_any(skb); 177 } 178 179 static ssize_t solos_param_show(struct device *dev, struct device_attribute *attr, 180 char *buf) 181 { 182 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev); 183 struct solos_card *card = atmdev->dev_data; 184 struct solos_param prm; 185 struct sk_buff *skb; 186 struct pkt_hdr *header; 187 int buflen; 188 189 buflen = strlen(attr->attr.name) + 10; 190 191 skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL); 192 if (!skb) { 193 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_show()\n"); 194 return -ENOMEM; 195 } 196 197 header = (void *)skb_put(skb, sizeof(*header)); 198 199 buflen = snprintf((void *)&header[1], buflen - 1, 200 "L%05d\n%s\n", current->pid, attr->attr.name); 201 skb_put(skb, buflen); 202 203 header->size = cpu_to_le16(buflen); 204 header->vpi = cpu_to_le16(0); 205 header->vci = cpu_to_le16(0); 206 header->type = cpu_to_le16(PKT_COMMAND); 207 208 prm.pid = current->pid; 209 prm.response = NULL; 210 prm.port = SOLOS_CHAN(atmdev); 211 212 spin_lock_irq(&card->param_queue_lock); 213 list_add(&prm.list, &card->param_queue); 214 spin_unlock_irq(&card->param_queue_lock); 215 216 fpga_queue(card, prm.port, skb, NULL); 217 218 wait_event_timeout(card->param_wq, prm.response, 5 * HZ); 219 220 spin_lock_irq(&card->param_queue_lock); 221 list_del(&prm.list); 222 spin_unlock_irq(&card->param_queue_lock); 223 224 if (!prm.response) 225 return -EIO; 226 227 buflen = prm.response->len; 228 memcpy(buf, prm.response->data, buflen); 229 kfree_skb(prm.response); 230 231 return buflen; 232 } 233 234 static ssize_t solos_param_store(struct device *dev, struct device_attribute *attr, 235 const char *buf, size_t count) 236 { 237 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev); 238 struct solos_card *card = atmdev->dev_data; 239 struct solos_param prm; 240 struct sk_buff *skb; 241 struct pkt_hdr *header; 242 int buflen; 243 ssize_t ret; 244 245 buflen = strlen(attr->attr.name) + 11 + count; 246 247 skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL); 248 if (!skb) { 249 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_store()\n"); 250 return -ENOMEM; 251 } 252 253 header = (void *)skb_put(skb, sizeof(*header)); 254 255 buflen = snprintf((void *)&header[1], buflen - 1, 256 "L%05d\n%s\n%s\n", current->pid, attr->attr.name, buf); 257 258 skb_put(skb, buflen); 259 header->size = cpu_to_le16(buflen); 260 header->vpi = cpu_to_le16(0); 261 header->vci = cpu_to_le16(0); 262 header->type = cpu_to_le16(PKT_COMMAND); 263 264 prm.pid = current->pid; 265 prm.response = NULL; 266 prm.port = SOLOS_CHAN(atmdev); 267 268 spin_lock_irq(&card->param_queue_lock); 269 list_add(&prm.list, &card->param_queue); 270 spin_unlock_irq(&card->param_queue_lock); 271 272 fpga_queue(card, prm.port, skb, NULL); 273 274 wait_event_timeout(card->param_wq, prm.response, 5 * HZ); 275 276 spin_lock_irq(&card->param_queue_lock); 277 list_del(&prm.list); 278 spin_unlock_irq(&card->param_queue_lock); 279 280 skb = prm.response; 281 282 if (!skb) 283 return -EIO; 284 285 buflen = skb->len; 286 287 /* Sometimes it has a newline, sometimes it doesn't. */ 288 if (skb->data[buflen - 1] == '\n') 289 buflen--; 290 291 if (buflen == 2 && !strncmp(skb->data, "OK", 2)) 292 ret = count; 293 else if (buflen == 5 && !strncmp(skb->data, "ERROR", 5)) 294 ret = -EIO; 295 else { 296 /* We know we have enough space allocated for this; we allocated 297 it ourselves */ 298 skb->data[buflen] = 0; 299 300 dev_warn(&card->dev->dev, "Unexpected parameter response: '%s'\n", 301 skb->data); 302 ret = -EIO; 303 } 304 kfree_skb(skb); 305 306 return ret; 307 } 308 309 static char *next_string(struct sk_buff *skb) 310 { 311 int i = 0; 312 char *this = skb->data; 313 314 for (i = 0; i < skb->len; i++) { 315 if (this[i] == '\n') { 316 this[i] = 0; 317 skb_pull(skb, i + 1); 318 return this; 319 } 320 if (!isprint(this[i])) 321 return NULL; 322 } 323 return NULL; 324 } 325 326 /* 327 * Status packet has fields separated by \n, starting with a version number 328 * for the information therein. Fields are.... 329 * 330 * packet version 331 * RxBitRate (version >= 1) 332 * TxBitRate (version >= 1) 333 * State (version >= 1) 334 * LocalSNRMargin (version >= 1) 335 * LocalLineAttn (version >= 1) 336 */ 337 static int process_status(struct solos_card *card, int port, struct sk_buff *skb) 338 { 339 char *str, *end, *state_str, *snr, *attn; 340 int ver, rate_up, rate_down; 341 342 if (!card->atmdev[port]) 343 return -ENODEV; 344 345 str = next_string(skb); 346 if (!str) 347 return -EIO; 348 349 ver = simple_strtol(str, NULL, 10); 350 if (ver < 1) { 351 dev_warn(&card->dev->dev, "Unexpected status interrupt version %d\n", 352 ver); 353 return -EIO; 354 } 355 356 str = next_string(skb); 357 if (!str) 358 return -EIO; 359 if (!strcmp(str, "ERROR")) { 360 dev_dbg(&card->dev->dev, "Status packet indicated Solos error on port %d (starting up?)\n", 361 port); 362 return 0; 363 } 364 365 rate_down = simple_strtol(str, &end, 10); 366 if (*end) 367 return -EIO; 368 369 str = next_string(skb); 370 if (!str) 371 return -EIO; 372 rate_up = simple_strtol(str, &end, 10); 373 if (*end) 374 return -EIO; 375 376 state_str = next_string(skb); 377 if (!state_str) 378 return -EIO; 379 380 /* Anything but 'Showtime' is down */ 381 if (strcmp(state_str, "Showtime")) { 382 card->atmdev[port]->signal = ATM_PHY_SIG_LOST; 383 release_vccs(card->atmdev[port]); 384 dev_info(&card->dev->dev, "Port %d: %s\n", port, state_str); 385 return 0; 386 } 387 388 snr = next_string(skb); 389 if (!snr) 390 return -EIO; 391 attn = next_string(skb); 392 if (!attn) 393 return -EIO; 394 395 dev_info(&card->dev->dev, "Port %d: %s @%d/%d kb/s%s%s%s%s\n", 396 port, state_str, rate_down/1000, rate_up/1000, 397 snr[0]?", SNR ":"", snr, attn[0]?", Attn ":"", attn); 398 399 card->atmdev[port]->link_rate = rate_down / 424; 400 card->atmdev[port]->signal = ATM_PHY_SIG_FOUND; 401 402 return 0; 403 } 404 405 static int process_command(struct solos_card *card, int port, struct sk_buff *skb) 406 { 407 struct solos_param *prm; 408 unsigned long flags; 409 int cmdpid; 410 int found = 0; 411 412 if (skb->len < 7) 413 return 0; 414 415 if (skb->data[0] != 'L' || !isdigit(skb->data[1]) || 416 !isdigit(skb->data[2]) || !isdigit(skb->data[3]) || 417 !isdigit(skb->data[4]) || !isdigit(skb->data[5]) || 418 skb->data[6] != '\n') 419 return 0; 420 421 cmdpid = simple_strtol(&skb->data[1], NULL, 10); 422 423 spin_lock_irqsave(&card->param_queue_lock, flags); 424 list_for_each_entry(prm, &card->param_queue, list) { 425 if (prm->port == port && prm->pid == cmdpid) { 426 prm->response = skb; 427 skb_pull(skb, 7); 428 wake_up(&card->param_wq); 429 found = 1; 430 break; 431 } 432 } 433 spin_unlock_irqrestore(&card->param_queue_lock, flags); 434 return found; 435 } 436 437 static ssize_t console_show(struct device *dev, struct device_attribute *attr, 438 char *buf) 439 { 440 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev); 441 struct solos_card *card = atmdev->dev_data; 442 struct sk_buff *skb; 443 444 spin_lock(&card->cli_queue_lock); 445 skb = skb_dequeue(&card->cli_queue[SOLOS_CHAN(atmdev)]); 446 spin_unlock(&card->cli_queue_lock); 447 if(skb == NULL) 448 return sprintf(buf, "No data.\n"); 449 450 memcpy(buf, skb->data, skb->len); 451 dev_dbg(&card->dev->dev, "len: %d\n", skb->len); 452 453 kfree_skb(skb); 454 return skb->len; 455 } 456 457 static int send_command(struct solos_card *card, int dev, const char *buf, size_t size) 458 { 459 struct sk_buff *skb; 460 struct pkt_hdr *header; 461 462 if (size > (BUF_SIZE - sizeof(*header))) { 463 dev_dbg(&card->dev->dev, "Command is too big. Dropping request\n"); 464 return 0; 465 } 466 skb = alloc_skb(size + sizeof(*header), GFP_ATOMIC); 467 if (!skb) { 468 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in send_command()\n"); 469 return 0; 470 } 471 472 header = (void *)skb_put(skb, sizeof(*header)); 473 474 header->size = cpu_to_le16(size); 475 header->vpi = cpu_to_le16(0); 476 header->vci = cpu_to_le16(0); 477 header->type = cpu_to_le16(PKT_COMMAND); 478 479 memcpy(skb_put(skb, size), buf, size); 480 481 fpga_queue(card, dev, skb, NULL); 482 483 return 0; 484 } 485 486 static ssize_t console_store(struct device *dev, struct device_attribute *attr, 487 const char *buf, size_t count) 488 { 489 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev); 490 struct solos_card *card = atmdev->dev_data; 491 int err; 492 493 err = send_command(card, SOLOS_CHAN(atmdev), buf, count); 494 495 return err?:count; 496 } 497 498 static DEVICE_ATTR(console, 0644, console_show, console_store); 499 500 501 #define SOLOS_ATTR_RO(x) static DEVICE_ATTR(x, 0444, solos_param_show, NULL); 502 #define SOLOS_ATTR_RW(x) static DEVICE_ATTR(x, 0644, solos_param_show, solos_param_store); 503 504 #include "solos-attrlist.c" 505 506 #undef SOLOS_ATTR_RO 507 #undef SOLOS_ATTR_RW 508 509 #define SOLOS_ATTR_RO(x) &dev_attr_##x.attr, 510 #define SOLOS_ATTR_RW(x) &dev_attr_##x.attr, 511 512 static struct attribute *solos_attrs[] = { 513 #include "solos-attrlist.c" 514 NULL 515 }; 516 517 static struct attribute_group solos_attr_group = { 518 .attrs = solos_attrs, 519 .name = "parameters", 520 }; 521 522 static int flash_upgrade(struct solos_card *card, int chip) 523 { 524 const struct firmware *fw; 525 const char *fw_name; 526 uint32_t data32 = 0; 527 int blocksize = 0; 528 int numblocks = 0; 529 int offset; 530 531 if (chip == 0) { 532 fw_name = "solos-FPGA.bin"; 533 blocksize = FPGA_BLOCK; 534 } 535 536 if (chip == 1) { 537 fw_name = "solos-Firmware.bin"; 538 blocksize = SOLOS_BLOCK; 539 } 540 541 if (chip == 2){ 542 if (card->fpga_version > LEGACY_BUFFERS){ 543 fw_name = "solos-db-FPGA.bin"; 544 blocksize = FPGA_BLOCK; 545 } else { 546 dev_info(&card->dev->dev, "FPGA version doesn't support daughter board upgrades\n"); 547 return -EPERM; 548 } 549 } 550 551 if (chip == 3){ 552 if (card->fpga_version > LEGACY_BUFFERS){ 553 fw_name = "solos-Firmware.bin"; 554 blocksize = SOLOS_BLOCK; 555 } else { 556 dev_info(&card->dev->dev, "FPGA version doesn't support daughter board upgrades\n"); 557 return -EPERM; 558 } 559 } 560 561 if (request_firmware(&fw, fw_name, &card->dev->dev)) 562 return -ENOENT; 563 564 dev_info(&card->dev->dev, "Flash upgrade starting\n"); 565 566 numblocks = fw->size / blocksize; 567 dev_info(&card->dev->dev, "Firmware size: %zd\n", fw->size); 568 dev_info(&card->dev->dev, "Number of blocks: %d\n", numblocks); 569 570 dev_info(&card->dev->dev, "Changing FPGA to Update mode\n"); 571 iowrite32(1, card->config_regs + FPGA_MODE); 572 data32 = ioread32(card->config_regs + FPGA_MODE); 573 574 /* Set mode to Chip Erase */ 575 if(chip == 0 || chip == 2) 576 dev_info(&card->dev->dev, "Set FPGA Flash mode to FPGA Chip Erase\n"); 577 if(chip == 1 || chip == 3) 578 dev_info(&card->dev->dev, "Set FPGA Flash mode to Solos Chip Erase\n"); 579 iowrite32((chip * 2), card->config_regs + FLASH_MODE); 580 581 582 iowrite32(1, card->config_regs + WRITE_FLASH); 583 wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY)); 584 585 for (offset = 0; offset < fw->size; offset += blocksize) { 586 int i; 587 588 /* Clear write flag */ 589 iowrite32(0, card->config_regs + WRITE_FLASH); 590 591 /* Set mode to Block Write */ 592 /* dev_info(&card->dev->dev, "Set FPGA Flash mode to Block Write\n"); */ 593 iowrite32(((chip * 2) + 1), card->config_regs + FLASH_MODE); 594 595 /* Copy block to buffer, swapping each 16 bits */ 596 for(i = 0; i < blocksize; i += 4) { 597 uint32_t word = swahb32p((uint32_t *)(fw->data + offset + i)); 598 if(card->fpga_version > LEGACY_BUFFERS) 599 iowrite32(word, FLASH_BUF + i); 600 else 601 iowrite32(word, RX_BUF(card, 3) + i); 602 } 603 604 /* Specify block number and then trigger flash write */ 605 iowrite32(offset / blocksize, card->config_regs + FLASH_BLOCK); 606 iowrite32(1, card->config_regs + WRITE_FLASH); 607 wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY)); 608 } 609 610 release_firmware(fw); 611 iowrite32(0, card->config_regs + WRITE_FLASH); 612 iowrite32(0, card->config_regs + FPGA_MODE); 613 iowrite32(0, card->config_regs + FLASH_MODE); 614 dev_info(&card->dev->dev, "Returning FPGA to Data mode\n"); 615 return 0; 616 } 617 618 static irqreturn_t solos_irq(int irq, void *dev_id) 619 { 620 struct solos_card *card = dev_id; 621 int handled = 1; 622 623 iowrite32(0, card->config_regs + IRQ_CLEAR); 624 625 /* If we're up and running, just kick the tasklet to process TX/RX */ 626 if (card->atmdev[0]) 627 tasklet_schedule(&card->tlet); 628 else 629 wake_up(&card->fw_wq); 630 631 return IRQ_RETVAL(handled); 632 } 633 634 void solos_bh(unsigned long card_arg) 635 { 636 struct solos_card *card = (void *)card_arg; 637 uint32_t card_flags; 638 uint32_t rx_done = 0; 639 int port; 640 641 /* 642 * Since fpga_tx() is going to need to read the flags under its lock, 643 * it can return them to us so that we don't have to hit PCI MMIO 644 * again for the same information 645 */ 646 card_flags = fpga_tx(card); 647 648 for (port = 0; port < card->nr_ports; port++) { 649 if (card_flags & (0x10 << port)) { 650 struct pkt_hdr _hdr, *header; 651 struct sk_buff *skb; 652 struct atm_vcc *vcc; 653 int size; 654 655 if (card->using_dma) { 656 skb = card->rx_skb[port]; 657 card->rx_skb[port] = NULL; 658 659 pci_unmap_single(card->dev, SKB_CB(skb)->dma_addr, 660 RX_DMA_SIZE, PCI_DMA_FROMDEVICE); 661 662 header = (void *)skb->data; 663 size = le16_to_cpu(header->size); 664 skb_put(skb, size + sizeof(*header)); 665 skb_pull(skb, sizeof(*header)); 666 } else { 667 header = &_hdr; 668 669 rx_done |= 0x10 << port; 670 671 memcpy_fromio(header, RX_BUF(card, port), sizeof(*header)); 672 673 size = le16_to_cpu(header->size); 674 if (size > (card->buffer_size - sizeof(*header))){ 675 dev_warn(&card->dev->dev, "Invalid buffer size\n"); 676 continue; 677 } 678 679 skb = alloc_skb(size + 1, GFP_ATOMIC); 680 if (!skb) { 681 if (net_ratelimit()) 682 dev_warn(&card->dev->dev, "Failed to allocate sk_buff for RX\n"); 683 continue; 684 } 685 686 memcpy_fromio(skb_put(skb, size), 687 RX_BUF(card, port) + sizeof(*header), 688 size); 689 } 690 if (atmdebug) { 691 dev_info(&card->dev->dev, "Received: device %d\n", port); 692 dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n", 693 size, le16_to_cpu(header->vpi), 694 le16_to_cpu(header->vci)); 695 print_buffer(skb); 696 } 697 698 switch (le16_to_cpu(header->type)) { 699 case PKT_DATA: 700 vcc = find_vcc(card->atmdev[port], le16_to_cpu(header->vpi), 701 le16_to_cpu(header->vci)); 702 if (!vcc) { 703 if (net_ratelimit()) 704 dev_warn(&card->dev->dev, "Received packet for unknown VCI.VPI %d.%d on port %d\n", 705 le16_to_cpu(header->vci), le16_to_cpu(header->vpi), 706 port); 707 continue; 708 } 709 atm_charge(vcc, skb->truesize); 710 vcc->push(vcc, skb); 711 atomic_inc(&vcc->stats->rx); 712 break; 713 714 case PKT_STATUS: 715 if (process_status(card, port, skb) && 716 net_ratelimit()) { 717 dev_warn(&card->dev->dev, "Bad status packet of %d bytes on port %d:\n", skb->len, port); 718 print_buffer(skb); 719 } 720 dev_kfree_skb_any(skb); 721 break; 722 723 case PKT_COMMAND: 724 default: /* FIXME: Not really, surely? */ 725 if (process_command(card, port, skb)) 726 break; 727 spin_lock(&card->cli_queue_lock); 728 if (skb_queue_len(&card->cli_queue[port]) > 10) { 729 if (net_ratelimit()) 730 dev_warn(&card->dev->dev, "Dropping console response on port %d\n", 731 port); 732 dev_kfree_skb_any(skb); 733 } else 734 skb_queue_tail(&card->cli_queue[port], skb); 735 spin_unlock(&card->cli_queue_lock); 736 break; 737 } 738 } 739 /* Allocate RX skbs for any ports which need them */ 740 if (card->using_dma && card->atmdev[port] && 741 !card->rx_skb[port]) { 742 struct sk_buff *skb = alloc_skb(RX_DMA_SIZE, GFP_ATOMIC); 743 if (skb) { 744 SKB_CB(skb)->dma_addr = 745 pci_map_single(card->dev, skb->data, 746 RX_DMA_SIZE, PCI_DMA_FROMDEVICE); 747 iowrite32(SKB_CB(skb)->dma_addr, 748 card->config_regs + RX_DMA_ADDR(port)); 749 card->rx_skb[port] = skb; 750 } else { 751 if (net_ratelimit()) 752 dev_warn(&card->dev->dev, "Failed to allocate RX skb"); 753 754 /* We'll have to try again later */ 755 tasklet_schedule(&card->tlet); 756 } 757 } 758 } 759 if (rx_done) 760 iowrite32(rx_done, card->config_regs + FLAGS_ADDR); 761 762 return; 763 } 764 765 static struct atm_vcc *find_vcc(struct atm_dev *dev, short vpi, int vci) 766 { 767 struct hlist_head *head; 768 struct atm_vcc *vcc = NULL; 769 struct hlist_node *node; 770 struct sock *s; 771 772 read_lock(&vcc_sklist_lock); 773 head = &vcc_hash[vci & (VCC_HTABLE_SIZE -1)]; 774 sk_for_each(s, node, head) { 775 vcc = atm_sk(s); 776 if (vcc->dev == dev && vcc->vci == vci && 777 vcc->vpi == vpi && vcc->qos.rxtp.traffic_class != ATM_NONE) 778 goto out; 779 } 780 vcc = NULL; 781 out: 782 read_unlock(&vcc_sklist_lock); 783 return vcc; 784 } 785 786 static int list_vccs(int vci) 787 { 788 struct hlist_head *head; 789 struct atm_vcc *vcc; 790 struct hlist_node *node; 791 struct sock *s; 792 int num_found = 0; 793 int i; 794 795 read_lock(&vcc_sklist_lock); 796 if (vci != 0){ 797 head = &vcc_hash[vci & (VCC_HTABLE_SIZE -1)]; 798 sk_for_each(s, node, head) { 799 num_found ++; 800 vcc = atm_sk(s); 801 printk(KERN_DEBUG "Device: %d Vpi: %d Vci: %d\n", 802 vcc->dev->number, 803 vcc->vpi, 804 vcc->vci); 805 } 806 } else { 807 for(i = 0; i < VCC_HTABLE_SIZE; i++){ 808 head = &vcc_hash[i]; 809 sk_for_each(s, node, head) { 810 num_found ++; 811 vcc = atm_sk(s); 812 printk(KERN_DEBUG "Device: %d Vpi: %d Vci: %d\n", 813 vcc->dev->number, 814 vcc->vpi, 815 vcc->vci); 816 } 817 } 818 } 819 read_unlock(&vcc_sklist_lock); 820 return num_found; 821 } 822 823 static void release_vccs(struct atm_dev *dev) 824 { 825 int i; 826 827 write_lock_irq(&vcc_sklist_lock); 828 for (i = 0; i < VCC_HTABLE_SIZE; i++) { 829 struct hlist_head *head = &vcc_hash[i]; 830 struct hlist_node *node, *tmp; 831 struct sock *s; 832 struct atm_vcc *vcc; 833 834 sk_for_each_safe(s, node, tmp, head) { 835 vcc = atm_sk(s); 836 if (vcc->dev == dev) { 837 vcc_release_async(vcc, -EPIPE); 838 sk_del_node_init(s); 839 } 840 } 841 } 842 write_unlock_irq(&vcc_sklist_lock); 843 } 844 845 846 static int popen(struct atm_vcc *vcc) 847 { 848 struct solos_card *card = vcc->dev->dev_data; 849 struct sk_buff *skb; 850 struct pkt_hdr *header; 851 852 if (vcc->qos.aal != ATM_AAL5) { 853 dev_warn(&card->dev->dev, "Unsupported ATM type %d\n", 854 vcc->qos.aal); 855 return -EINVAL; 856 } 857 858 skb = alloc_skb(sizeof(*header), GFP_ATOMIC); 859 if (!skb && net_ratelimit()) { 860 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in popen()\n"); 861 return -ENOMEM; 862 } 863 header = (void *)skb_put(skb, sizeof(*header)); 864 865 header->size = cpu_to_le16(0); 866 header->vpi = cpu_to_le16(vcc->vpi); 867 header->vci = cpu_to_le16(vcc->vci); 868 header->type = cpu_to_le16(PKT_POPEN); 869 870 fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, NULL); 871 872 set_bit(ATM_VF_ADDR, &vcc->flags); 873 set_bit(ATM_VF_READY, &vcc->flags); 874 list_vccs(0); 875 876 877 return 0; 878 } 879 880 static void pclose(struct atm_vcc *vcc) 881 { 882 struct solos_card *card = vcc->dev->dev_data; 883 struct sk_buff *skb; 884 struct pkt_hdr *header; 885 886 skb = alloc_skb(sizeof(*header), GFP_ATOMIC); 887 if (!skb) { 888 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in pclose()\n"); 889 return; 890 } 891 header = (void *)skb_put(skb, sizeof(*header)); 892 893 header->size = cpu_to_le16(0); 894 header->vpi = cpu_to_le16(vcc->vpi); 895 header->vci = cpu_to_le16(vcc->vci); 896 header->type = cpu_to_le16(PKT_PCLOSE); 897 898 fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, NULL); 899 900 clear_bit(ATM_VF_ADDR, &vcc->flags); 901 clear_bit(ATM_VF_READY, &vcc->flags); 902 903 return; 904 } 905 906 static int print_buffer(struct sk_buff *buf) 907 { 908 int len,i; 909 char msg[500]; 910 char item[10]; 911 912 len = buf->len; 913 for (i = 0; i < len; i++){ 914 if(i % 8 == 0) 915 sprintf(msg, "%02X: ", i); 916 917 sprintf(item,"%02X ",*(buf->data + i)); 918 strcat(msg, item); 919 if(i % 8 == 7) { 920 sprintf(item, "\n"); 921 strcat(msg, item); 922 printk(KERN_DEBUG "%s", msg); 923 } 924 } 925 if (i % 8 != 0) { 926 sprintf(item, "\n"); 927 strcat(msg, item); 928 printk(KERN_DEBUG "%s", msg); 929 } 930 printk(KERN_DEBUG "\n"); 931 932 return 0; 933 } 934 935 static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb, 936 struct atm_vcc *vcc) 937 { 938 int old_len; 939 unsigned long flags; 940 941 SKB_CB(skb)->vcc = vcc; 942 943 spin_lock_irqsave(&card->tx_queue_lock, flags); 944 old_len = skb_queue_len(&card->tx_queue[port]); 945 skb_queue_tail(&card->tx_queue[port], skb); 946 if (!old_len) 947 card->tx_mask |= (1 << port); 948 spin_unlock_irqrestore(&card->tx_queue_lock, flags); 949 950 /* Theoretically we could just schedule the tasklet here, but 951 that introduces latency we don't want -- it's noticeable */ 952 if (!old_len) 953 fpga_tx(card); 954 } 955 956 static uint32_t fpga_tx(struct solos_card *card) 957 { 958 uint32_t tx_pending, card_flags; 959 uint32_t tx_started = 0; 960 struct sk_buff *skb; 961 struct atm_vcc *vcc; 962 unsigned char port; 963 unsigned long flags; 964 965 spin_lock_irqsave(&card->tx_lock, flags); 966 967 card_flags = ioread32(card->config_regs + FLAGS_ADDR); 968 /* 969 * The queue lock is required for _writing_ to tx_mask, but we're 970 * OK to read it here without locking. The only potential update 971 * that we could race with is in fpga_queue() where it sets a bit 972 * for a new port... but it's going to call this function again if 973 * it's doing that, anyway. 974 */ 975 tx_pending = card->tx_mask & ~card_flags; 976 977 for (port = 0; tx_pending; tx_pending >>= 1, port++) { 978 if (tx_pending & 1) { 979 struct sk_buff *oldskb = card->tx_skb[port]; 980 if (oldskb) 981 pci_unmap_single(card->dev, SKB_CB(oldskb)->dma_addr, 982 oldskb->len, PCI_DMA_TODEVICE); 983 984 spin_lock(&card->tx_queue_lock); 985 skb = skb_dequeue(&card->tx_queue[port]); 986 if (!skb) 987 card->tx_mask &= ~(1 << port); 988 spin_unlock(&card->tx_queue_lock); 989 990 if (skb && !card->using_dma) { 991 memcpy_toio(TX_BUF(card, port), skb->data, skb->len); 992 tx_started |= 1 << port; 993 oldskb = skb; /* We're done with this skb already */ 994 } else if (skb && card->using_dma) { 995 SKB_CB(skb)->dma_addr = pci_map_single(card->dev, skb->data, 996 skb->len, PCI_DMA_TODEVICE); 997 iowrite32(SKB_CB(skb)->dma_addr, 998 card->config_regs + TX_DMA_ADDR(port)); 999 } 1000 1001 if (!oldskb) 1002 continue; 1003 1004 /* Clean up and free oldskb now it's gone */ 1005 if (atmdebug) { 1006 dev_info(&card->dev->dev, "Transmitted: port %d\n", 1007 port); 1008 print_buffer(oldskb); 1009 } 1010 1011 vcc = SKB_CB(oldskb)->vcc; 1012 1013 if (vcc) { 1014 atomic_inc(&vcc->stats->tx); 1015 solos_pop(vcc, oldskb); 1016 } else 1017 dev_kfree_skb_irq(oldskb); 1018 1019 } 1020 } 1021 /* For non-DMA TX, write the 'TX start' bit for all four ports simultaneously */ 1022 if (tx_started) 1023 iowrite32(tx_started, card->config_regs + FLAGS_ADDR); 1024 1025 spin_unlock_irqrestore(&card->tx_lock, flags); 1026 return card_flags; 1027 } 1028 1029 static int psend(struct atm_vcc *vcc, struct sk_buff *skb) 1030 { 1031 struct solos_card *card = vcc->dev->dev_data; 1032 struct pkt_hdr *header; 1033 int pktlen; 1034 1035 pktlen = skb->len; 1036 if (pktlen > (BUF_SIZE - sizeof(*header))) { 1037 dev_warn(&card->dev->dev, "Length of PDU is too large. Dropping PDU.\n"); 1038 solos_pop(vcc, skb); 1039 return 0; 1040 } 1041 1042 if (!skb_clone_writable(skb, sizeof(*header))) { 1043 int expand_by = 0; 1044 int ret; 1045 1046 if (skb_headroom(skb) < sizeof(*header)) 1047 expand_by = sizeof(*header) - skb_headroom(skb); 1048 1049 ret = pskb_expand_head(skb, expand_by, 0, GFP_ATOMIC); 1050 if (ret) { 1051 dev_warn(&card->dev->dev, "pskb_expand_head failed.\n"); 1052 solos_pop(vcc, skb); 1053 return ret; 1054 } 1055 } 1056 1057 header = (void *)skb_push(skb, sizeof(*header)); 1058 1059 /* This does _not_ include the size of the header */ 1060 header->size = cpu_to_le16(pktlen); 1061 header->vpi = cpu_to_le16(vcc->vpi); 1062 header->vci = cpu_to_le16(vcc->vci); 1063 header->type = cpu_to_le16(PKT_DATA); 1064 1065 fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, vcc); 1066 1067 return 0; 1068 } 1069 1070 static struct atmdev_ops fpga_ops = { 1071 .open = popen, 1072 .close = pclose, 1073 .ioctl = NULL, 1074 .getsockopt = NULL, 1075 .setsockopt = NULL, 1076 .send = psend, 1077 .send_oam = NULL, 1078 .phy_put = NULL, 1079 .phy_get = NULL, 1080 .change_qos = NULL, 1081 .proc_read = NULL, 1082 .owner = THIS_MODULE 1083 }; 1084 1085 static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id) 1086 { 1087 int err; 1088 uint16_t fpga_ver; 1089 uint8_t major_ver, minor_ver; 1090 uint32_t data32; 1091 struct solos_card *card; 1092 1093 card = kzalloc(sizeof(*card), GFP_KERNEL); 1094 if (!card) 1095 return -ENOMEM; 1096 1097 card->dev = dev; 1098 init_waitqueue_head(&card->fw_wq); 1099 init_waitqueue_head(&card->param_wq); 1100 1101 err = pci_enable_device(dev); 1102 if (err) { 1103 dev_warn(&dev->dev, "Failed to enable PCI device\n"); 1104 goto out; 1105 } 1106 1107 err = pci_set_dma_mask(dev, DMA_BIT_MASK(32)); 1108 if (err) { 1109 dev_warn(&dev->dev, "Failed to set 32-bit DMA mask\n"); 1110 goto out; 1111 } 1112 1113 err = pci_request_regions(dev, "solos"); 1114 if (err) { 1115 dev_warn(&dev->dev, "Failed to request regions\n"); 1116 goto out; 1117 } 1118 1119 card->config_regs = pci_iomap(dev, 0, CONFIG_RAM_SIZE); 1120 if (!card->config_regs) { 1121 dev_warn(&dev->dev, "Failed to ioremap config registers\n"); 1122 goto out_release_regions; 1123 } 1124 card->buffers = pci_iomap(dev, 1, DATA_RAM_SIZE); 1125 if (!card->buffers) { 1126 dev_warn(&dev->dev, "Failed to ioremap data buffers\n"); 1127 goto out_unmap_config; 1128 } 1129 1130 if (reset) { 1131 iowrite32(1, card->config_regs + FPGA_MODE); 1132 data32 = ioread32(card->config_regs + FPGA_MODE); 1133 1134 iowrite32(0, card->config_regs + FPGA_MODE); 1135 data32 = ioread32(card->config_regs + FPGA_MODE); 1136 } 1137 1138 data32 = ioread32(card->config_regs + FPGA_VER); 1139 fpga_ver = (data32 & 0x0000FFFF); 1140 major_ver = ((data32 & 0xFF000000) >> 24); 1141 minor_ver = ((data32 & 0x00FF0000) >> 16); 1142 card->fpga_version = FPGA_VERSION(major_ver,minor_ver); 1143 if (card->fpga_version > LEGACY_BUFFERS) 1144 card->buffer_size = BUF_SIZE; 1145 else 1146 card->buffer_size = OLD_BUF_SIZE; 1147 dev_info(&dev->dev, "Solos FPGA Version %d.%02d svn-%d\n", 1148 major_ver, minor_ver, fpga_ver); 1149 1150 if (card->fpga_version >= DMA_SUPPORTED){ 1151 card->using_dma = 1; 1152 } else { 1153 card->using_dma = 0; 1154 /* Set RX empty flag for all ports */ 1155 iowrite32(0xF0, card->config_regs + FLAGS_ADDR); 1156 } 1157 1158 data32 = ioread32(card->config_regs + PORTS); 1159 card->nr_ports = (data32 & 0x000000FF); 1160 1161 pci_set_drvdata(dev, card); 1162 1163 tasklet_init(&card->tlet, solos_bh, (unsigned long)card); 1164 spin_lock_init(&card->tx_lock); 1165 spin_lock_init(&card->tx_queue_lock); 1166 spin_lock_init(&card->cli_queue_lock); 1167 spin_lock_init(&card->param_queue_lock); 1168 INIT_LIST_HEAD(&card->param_queue); 1169 1170 err = request_irq(dev->irq, solos_irq, IRQF_SHARED, 1171 "solos-pci", card); 1172 if (err) { 1173 dev_dbg(&card->dev->dev, "Failed to request interrupt IRQ: %d\n", dev->irq); 1174 goto out_unmap_both; 1175 } 1176 1177 iowrite32(1, card->config_regs + IRQ_EN_ADDR); 1178 1179 if (fpga_upgrade) 1180 flash_upgrade(card, 0); 1181 1182 if (firmware_upgrade) 1183 flash_upgrade(card, 1); 1184 1185 if (db_fpga_upgrade) 1186 flash_upgrade(card, 2); 1187 1188 if (db_firmware_upgrade) 1189 flash_upgrade(card, 3); 1190 1191 err = atm_init(card); 1192 if (err) 1193 goto out_free_irq; 1194 1195 return 0; 1196 1197 out_free_irq: 1198 iowrite32(0, card->config_regs + IRQ_EN_ADDR); 1199 free_irq(dev->irq, card); 1200 tasklet_kill(&card->tlet); 1201 1202 out_unmap_both: 1203 pci_set_drvdata(dev, NULL); 1204 pci_iounmap(dev, card->config_regs); 1205 out_unmap_config: 1206 pci_iounmap(dev, card->buffers); 1207 out_release_regions: 1208 pci_release_regions(dev); 1209 out: 1210 kfree(card); 1211 return err; 1212 } 1213 1214 static int atm_init(struct solos_card *card) 1215 { 1216 int i; 1217 1218 for (i = 0; i < card->nr_ports; i++) { 1219 struct sk_buff *skb; 1220 struct pkt_hdr *header; 1221 1222 skb_queue_head_init(&card->tx_queue[i]); 1223 skb_queue_head_init(&card->cli_queue[i]); 1224 1225 card->atmdev[i] = atm_dev_register("solos-pci", &fpga_ops, -1, NULL); 1226 if (!card->atmdev[i]) { 1227 dev_err(&card->dev->dev, "Could not register ATM device %d\n", i); 1228 atm_remove(card); 1229 return -ENODEV; 1230 } 1231 if (device_create_file(&card->atmdev[i]->class_dev, &dev_attr_console)) 1232 dev_err(&card->dev->dev, "Could not register console for ATM device %d\n", i); 1233 if (sysfs_create_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group)) 1234 dev_err(&card->dev->dev, "Could not register parameter group for ATM device %d\n", i); 1235 1236 dev_info(&card->dev->dev, "Registered ATM device %d\n", card->atmdev[i]->number); 1237 1238 card->atmdev[i]->ci_range.vpi_bits = 8; 1239 card->atmdev[i]->ci_range.vci_bits = 16; 1240 card->atmdev[i]->dev_data = card; 1241 card->atmdev[i]->phy_data = (void *)(unsigned long)i; 1242 card->atmdev[i]->signal = ATM_PHY_SIG_UNKNOWN; 1243 1244 skb = alloc_skb(sizeof(*header), GFP_ATOMIC); 1245 if (!skb) { 1246 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in atm_init()\n"); 1247 continue; 1248 } 1249 1250 header = (void *)skb_put(skb, sizeof(*header)); 1251 1252 header->size = cpu_to_le16(0); 1253 header->vpi = cpu_to_le16(0); 1254 header->vci = cpu_to_le16(0); 1255 header->type = cpu_to_le16(PKT_STATUS); 1256 1257 fpga_queue(card, i, skb, NULL); 1258 } 1259 return 0; 1260 } 1261 1262 static void atm_remove(struct solos_card *card) 1263 { 1264 int i; 1265 1266 for (i = 0; i < card->nr_ports; i++) { 1267 if (card->atmdev[i]) { 1268 struct sk_buff *skb; 1269 1270 dev_info(&card->dev->dev, "Unregistering ATM device %d\n", card->atmdev[i]->number); 1271 1272 sysfs_remove_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group); 1273 atm_dev_deregister(card->atmdev[i]); 1274 1275 skb = card->rx_skb[i]; 1276 if (skb) { 1277 pci_unmap_single(card->dev, SKB_CB(skb)->dma_addr, 1278 RX_DMA_SIZE, PCI_DMA_FROMDEVICE); 1279 dev_kfree_skb(skb); 1280 } 1281 skb = card->tx_skb[i]; 1282 if (skb) { 1283 pci_unmap_single(card->dev, SKB_CB(skb)->dma_addr, 1284 skb->len, PCI_DMA_TODEVICE); 1285 dev_kfree_skb(skb); 1286 } 1287 while ((skb = skb_dequeue(&card->tx_queue[i]))) 1288 dev_kfree_skb(skb); 1289 1290 } 1291 } 1292 } 1293 1294 static void fpga_remove(struct pci_dev *dev) 1295 { 1296 struct solos_card *card = pci_get_drvdata(dev); 1297 1298 /* Disable IRQs */ 1299 iowrite32(0, card->config_regs + IRQ_EN_ADDR); 1300 1301 /* Reset FPGA */ 1302 iowrite32(1, card->config_regs + FPGA_MODE); 1303 (void)ioread32(card->config_regs + FPGA_MODE); 1304 1305 atm_remove(card); 1306 1307 free_irq(dev->irq, card); 1308 tasklet_kill(&card->tlet); 1309 1310 /* Release device from reset */ 1311 iowrite32(0, card->config_regs + FPGA_MODE); 1312 (void)ioread32(card->config_regs + FPGA_MODE); 1313 1314 pci_iounmap(dev, card->buffers); 1315 pci_iounmap(dev, card->config_regs); 1316 1317 pci_release_regions(dev); 1318 pci_disable_device(dev); 1319 1320 pci_set_drvdata(dev, NULL); 1321 kfree(card); 1322 } 1323 1324 static struct pci_device_id fpga_pci_tbl[] __devinitdata = { 1325 { 0x10ee, 0x0300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 1326 { 0, } 1327 }; 1328 1329 MODULE_DEVICE_TABLE(pci,fpga_pci_tbl); 1330 1331 static struct pci_driver fpga_driver = { 1332 .name = "solos", 1333 .id_table = fpga_pci_tbl, 1334 .probe = fpga_probe, 1335 .remove = fpga_remove, 1336 }; 1337 1338 1339 static int __init solos_pci_init(void) 1340 { 1341 printk(KERN_INFO "Solos PCI Driver Version %s\n", VERSION); 1342 return pci_register_driver(&fpga_driver); 1343 } 1344 1345 static void __exit solos_pci_exit(void) 1346 { 1347 pci_unregister_driver(&fpga_driver); 1348 printk(KERN_INFO "Solos PCI Driver %s Unloaded\n", VERSION); 1349 } 1350 1351 module_init(solos_pci_init); 1352 module_exit(solos_pci_exit); 1353