xref: /linux/drivers/atm/solos-pci.c (revision c98be0c96db00e9b6b02d31e0fa7590c54cdaaac)
1 /*
2  * Driver for the Solos PCI ADSL2+ card, designed to support Linux by
3  *  Traverse Technologies -- http://www.traverse.com.au/
4  *  Xrio Limited          -- http://www.xrio.com/
5  *
6  *
7  * Copyright © 2008 Traverse Technologies
8  * Copyright © 2008 Intel Corporation
9  *
10  * Authors: Nathan Williams <nathan@traverse.com.au>
11  *          David Woodhouse <dwmw2@infradead.org>
12  *          Treker Chen <treker@xrio.com>
13  *
14  * This program is free software; you can redistribute it and/or
15  * modify it under the terms of the GNU General Public License
16  * version 2, as published by the Free Software Foundation.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21  * GNU General Public License for more details.
22  */
23 
24 #define DEBUG
25 #define VERBOSE_DEBUG
26 
27 #include <linux/interrupt.h>
28 #include <linux/module.h>
29 #include <linux/kernel.h>
30 #include <linux/errno.h>
31 #include <linux/ioport.h>
32 #include <linux/types.h>
33 #include <linux/pci.h>
34 #include <linux/atm.h>
35 #include <linux/atmdev.h>
36 #include <linux/skbuff.h>
37 #include <linux/sysfs.h>
38 #include <linux/device.h>
39 #include <linux/kobject.h>
40 #include <linux/firmware.h>
41 #include <linux/ctype.h>
42 #include <linux/swab.h>
43 #include <linux/slab.h>
44 
45 #define VERSION "1.04"
46 #define DRIVER_VERSION 0x01
47 #define PTAG "solos-pci"
48 
49 #define CONFIG_RAM_SIZE	128
50 #define FLAGS_ADDR	0x7C
51 #define IRQ_EN_ADDR	0x78
52 #define FPGA_VER	0x74
53 #define IRQ_CLEAR	0x70
54 #define WRITE_FLASH	0x6C
55 #define PORTS		0x68
56 #define FLASH_BLOCK	0x64
57 #define FLASH_BUSY	0x60
58 #define FPGA_MODE	0x5C
59 #define FLASH_MODE	0x58
60 #define GPIO_STATUS	0x54
61 #define DRIVER_VER	0x50
62 #define TX_DMA_ADDR(port)	(0x40 + (4 * (port)))
63 #define RX_DMA_ADDR(port)	(0x30 + (4 * (port)))
64 
65 #define DATA_RAM_SIZE	32768
66 #define BUF_SIZE	2048
67 #define OLD_BUF_SIZE	4096 /* For FPGA versions <= 2*/
68 /* Old boards use ATMEL AD45DB161D flash */
69 #define ATMEL_FPGA_PAGE	528 /* FPGA flash page size*/
70 #define ATMEL_SOLOS_PAGE	512 /* Solos flash page size*/
71 #define ATMEL_FPGA_BLOCK	(ATMEL_FPGA_PAGE * 8) /* FPGA block size*/
72 #define ATMEL_SOLOS_BLOCK	(ATMEL_SOLOS_PAGE * 8) /* Solos block size*/
73 /* Current boards use M25P/M25PE SPI flash */
74 #define SPI_FLASH_BLOCK	(256 * 64)
75 
76 #define RX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2)
77 #define TX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2 + (card->buffer_size))
78 #define FLASH_BUF ((card->buffers) + 4*(card->buffer_size)*2)
79 
80 #define RX_DMA_SIZE	2048
81 
82 #define FPGA_VERSION(a,b) (((a) << 8) + (b))
83 #define LEGACY_BUFFERS	2
84 #define DMA_SUPPORTED	4
85 
86 static int reset = 0;
87 static int atmdebug = 0;
88 static int firmware_upgrade = 0;
89 static int fpga_upgrade = 0;
90 static int db_firmware_upgrade = 0;
91 static int db_fpga_upgrade = 0;
92 
93 struct pkt_hdr {
94 	__le16 size;
95 	__le16 vpi;
96 	__le16 vci;
97 	__le16 type;
98 };
99 
100 struct solos_skb_cb {
101 	struct atm_vcc *vcc;
102 	uint32_t dma_addr;
103 };
104 
105 
106 #define SKB_CB(skb)		((struct solos_skb_cb *)skb->cb)
107 
108 #define PKT_DATA	0
109 #define PKT_COMMAND	1
110 #define PKT_POPEN	3
111 #define PKT_PCLOSE	4
112 #define PKT_STATUS	5
113 
114 struct solos_card {
115 	void __iomem *config_regs;
116 	void __iomem *buffers;
117 	int nr_ports;
118 	int tx_mask;
119 	struct pci_dev *dev;
120 	struct atm_dev *atmdev[4];
121 	struct tasklet_struct tlet;
122 	spinlock_t tx_lock;
123 	spinlock_t tx_queue_lock;
124 	spinlock_t cli_queue_lock;
125 	spinlock_t param_queue_lock;
126 	struct list_head param_queue;
127 	struct sk_buff_head tx_queue[4];
128 	struct sk_buff_head cli_queue[4];
129 	struct sk_buff *tx_skb[4];
130 	struct sk_buff *rx_skb[4];
131 	unsigned char *dma_bounce;
132 	wait_queue_head_t param_wq;
133 	wait_queue_head_t fw_wq;
134 	int using_dma;
135 	int dma_alignment;
136 	int fpga_version;
137 	int buffer_size;
138 	int atmel_flash;
139 };
140 
141 
142 struct solos_param {
143 	struct list_head list;
144 	pid_t pid;
145 	int port;
146 	struct sk_buff *response;
147 };
148 
149 #define SOLOS_CHAN(atmdev) ((int)(unsigned long)(atmdev)->phy_data)
150 
151 MODULE_AUTHOR("Traverse Technologies <support@traverse.com.au>");
152 MODULE_DESCRIPTION("Solos PCI driver");
153 MODULE_VERSION(VERSION);
154 MODULE_LICENSE("GPL");
155 MODULE_FIRMWARE("solos-FPGA.bin");
156 MODULE_FIRMWARE("solos-Firmware.bin");
157 MODULE_FIRMWARE("solos-db-FPGA.bin");
158 MODULE_PARM_DESC(reset, "Reset Solos chips on startup");
159 MODULE_PARM_DESC(atmdebug, "Print ATM data");
160 MODULE_PARM_DESC(firmware_upgrade, "Initiate Solos firmware upgrade");
161 MODULE_PARM_DESC(fpga_upgrade, "Initiate FPGA upgrade");
162 MODULE_PARM_DESC(db_firmware_upgrade, "Initiate daughter board Solos firmware upgrade");
163 MODULE_PARM_DESC(db_fpga_upgrade, "Initiate daughter board FPGA upgrade");
164 module_param(reset, int, 0444);
165 module_param(atmdebug, int, 0644);
166 module_param(firmware_upgrade, int, 0444);
167 module_param(fpga_upgrade, int, 0444);
168 module_param(db_firmware_upgrade, int, 0444);
169 module_param(db_fpga_upgrade, int, 0444);
170 
171 static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb,
172 		       struct atm_vcc *vcc);
173 static uint32_t fpga_tx(struct solos_card *);
174 static irqreturn_t solos_irq(int irq, void *dev_id);
175 static struct atm_vcc* find_vcc(struct atm_dev *dev, short vpi, int vci);
176 static int atm_init(struct solos_card *, struct device *);
177 static void atm_remove(struct solos_card *);
178 static int send_command(struct solos_card *card, int dev, const char *buf, size_t size);
179 static void solos_bh(unsigned long);
180 static int print_buffer(struct sk_buff *buf);
181 
182 static inline void solos_pop(struct atm_vcc *vcc, struct sk_buff *skb)
183 {
184         if (vcc->pop)
185                 vcc->pop(vcc, skb);
186         else
187                 dev_kfree_skb_any(skb);
188 }
189 
190 static ssize_t solos_param_show(struct device *dev, struct device_attribute *attr,
191 				char *buf)
192 {
193 	struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
194 	struct solos_card *card = atmdev->dev_data;
195 	struct solos_param prm;
196 	struct sk_buff *skb;
197 	struct pkt_hdr *header;
198 	int buflen;
199 
200 	buflen = strlen(attr->attr.name) + 10;
201 
202 	skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL);
203 	if (!skb) {
204 		dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_show()\n");
205 		return -ENOMEM;
206 	}
207 
208 	header = (void *)skb_put(skb, sizeof(*header));
209 
210 	buflen = snprintf((void *)&header[1], buflen - 1,
211 			  "L%05d\n%s\n", current->pid, attr->attr.name);
212 	skb_put(skb, buflen);
213 
214 	header->size = cpu_to_le16(buflen);
215 	header->vpi = cpu_to_le16(0);
216 	header->vci = cpu_to_le16(0);
217 	header->type = cpu_to_le16(PKT_COMMAND);
218 
219 	prm.pid = current->pid;
220 	prm.response = NULL;
221 	prm.port = SOLOS_CHAN(atmdev);
222 
223 	spin_lock_irq(&card->param_queue_lock);
224 	list_add(&prm.list, &card->param_queue);
225 	spin_unlock_irq(&card->param_queue_lock);
226 
227 	fpga_queue(card, prm.port, skb, NULL);
228 
229 	wait_event_timeout(card->param_wq, prm.response, 5 * HZ);
230 
231 	spin_lock_irq(&card->param_queue_lock);
232 	list_del(&prm.list);
233 	spin_unlock_irq(&card->param_queue_lock);
234 
235 	if (!prm.response)
236 		return -EIO;
237 
238 	buflen = prm.response->len;
239 	memcpy(buf, prm.response->data, buflen);
240 	kfree_skb(prm.response);
241 
242 	return buflen;
243 }
244 
245 static ssize_t solos_param_store(struct device *dev, struct device_attribute *attr,
246 				 const char *buf, size_t count)
247 {
248 	struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
249 	struct solos_card *card = atmdev->dev_data;
250 	struct solos_param prm;
251 	struct sk_buff *skb;
252 	struct pkt_hdr *header;
253 	int buflen;
254 	ssize_t ret;
255 
256 	buflen = strlen(attr->attr.name) + 11 + count;
257 
258 	skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL);
259 	if (!skb) {
260 		dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_store()\n");
261 		return -ENOMEM;
262 	}
263 
264 	header = (void *)skb_put(skb, sizeof(*header));
265 
266 	buflen = snprintf((void *)&header[1], buflen - 1,
267 			  "L%05d\n%s\n%s\n", current->pid, attr->attr.name, buf);
268 
269 	skb_put(skb, buflen);
270 	header->size = cpu_to_le16(buflen);
271 	header->vpi = cpu_to_le16(0);
272 	header->vci = cpu_to_le16(0);
273 	header->type = cpu_to_le16(PKT_COMMAND);
274 
275 	prm.pid = current->pid;
276 	prm.response = NULL;
277 	prm.port = SOLOS_CHAN(atmdev);
278 
279 	spin_lock_irq(&card->param_queue_lock);
280 	list_add(&prm.list, &card->param_queue);
281 	spin_unlock_irq(&card->param_queue_lock);
282 
283 	fpga_queue(card, prm.port, skb, NULL);
284 
285 	wait_event_timeout(card->param_wq, prm.response, 5 * HZ);
286 
287 	spin_lock_irq(&card->param_queue_lock);
288 	list_del(&prm.list);
289 	spin_unlock_irq(&card->param_queue_lock);
290 
291 	skb = prm.response;
292 
293 	if (!skb)
294 		return -EIO;
295 
296 	buflen = skb->len;
297 
298 	/* Sometimes it has a newline, sometimes it doesn't. */
299 	if (skb->data[buflen - 1] == '\n')
300 		buflen--;
301 
302 	if (buflen == 2 && !strncmp(skb->data, "OK", 2))
303 		ret = count;
304 	else if (buflen == 5 && !strncmp(skb->data, "ERROR", 5))
305 		ret = -EIO;
306 	else {
307 		/* We know we have enough space allocated for this; we allocated
308 		   it ourselves */
309 		skb->data[buflen] = 0;
310 
311 		dev_warn(&card->dev->dev, "Unexpected parameter response: '%s'\n",
312 			 skb->data);
313 		ret = -EIO;
314 	}
315 	kfree_skb(skb);
316 
317 	return ret;
318 }
319 
320 static char *next_string(struct sk_buff *skb)
321 {
322 	int i = 0;
323 	char *this = skb->data;
324 
325 	for (i = 0; i < skb->len; i++) {
326 		if (this[i] == '\n') {
327 			this[i] = 0;
328 			skb_pull(skb, i + 1);
329 			return this;
330 		}
331 		if (!isprint(this[i]))
332 			return NULL;
333 	}
334 	return NULL;
335 }
336 
337 /*
338  * Status packet has fields separated by \n, starting with a version number
339  * for the information therein. Fields are....
340  *
341  *     packet version
342  *     RxBitRate	(version >= 1)
343  *     TxBitRate	(version >= 1)
344  *     State		(version >= 1)
345  *     LocalSNRMargin	(version >= 1)
346  *     LocalLineAttn	(version >= 1)
347  */
348 static int process_status(struct solos_card *card, int port, struct sk_buff *skb)
349 {
350 	char *str, *end, *state_str, *snr, *attn;
351 	int ver, rate_up, rate_down;
352 
353 	if (!card->atmdev[port])
354 		return -ENODEV;
355 
356 	str = next_string(skb);
357 	if (!str)
358 		return -EIO;
359 
360 	ver = simple_strtol(str, NULL, 10);
361 	if (ver < 1) {
362 		dev_warn(&card->dev->dev, "Unexpected status interrupt version %d\n",
363 			 ver);
364 		return -EIO;
365 	}
366 
367 	str = next_string(skb);
368 	if (!str)
369 		return -EIO;
370 	if (!strcmp(str, "ERROR")) {
371 		dev_dbg(&card->dev->dev, "Status packet indicated Solos error on port %d (starting up?)\n",
372 			 port);
373 		return 0;
374 	}
375 
376 	rate_down = simple_strtol(str, &end, 10);
377 	if (*end)
378 		return -EIO;
379 
380 	str = next_string(skb);
381 	if (!str)
382 		return -EIO;
383 	rate_up = simple_strtol(str, &end, 10);
384 	if (*end)
385 		return -EIO;
386 
387 	state_str = next_string(skb);
388 	if (!state_str)
389 		return -EIO;
390 
391 	/* Anything but 'Showtime' is down */
392 	if (strcmp(state_str, "Showtime")) {
393 		atm_dev_signal_change(card->atmdev[port], ATM_PHY_SIG_LOST);
394 		dev_info(&card->dev->dev, "Port %d: %s\n", port, state_str);
395 		return 0;
396 	}
397 
398 	snr = next_string(skb);
399 	if (!snr)
400 		return -EIO;
401 	attn = next_string(skb);
402 	if (!attn)
403 		return -EIO;
404 
405 	dev_info(&card->dev->dev, "Port %d: %s @%d/%d kb/s%s%s%s%s\n",
406 		 port, state_str, rate_down/1000, rate_up/1000,
407 		 snr[0]?", SNR ":"", snr, attn[0]?", Attn ":"", attn);
408 
409 	card->atmdev[port]->link_rate = rate_down / 424;
410 	atm_dev_signal_change(card->atmdev[port], ATM_PHY_SIG_FOUND);
411 
412 	return 0;
413 }
414 
415 static int process_command(struct solos_card *card, int port, struct sk_buff *skb)
416 {
417 	struct solos_param *prm;
418 	unsigned long flags;
419 	int cmdpid;
420 	int found = 0;
421 
422 	if (skb->len < 7)
423 		return 0;
424 
425 	if (skb->data[0] != 'L'    || !isdigit(skb->data[1]) ||
426 	    !isdigit(skb->data[2]) || !isdigit(skb->data[3]) ||
427 	    !isdigit(skb->data[4]) || !isdigit(skb->data[5]) ||
428 	    skb->data[6] != '\n')
429 		return 0;
430 
431 	cmdpid = simple_strtol(&skb->data[1], NULL, 10);
432 
433 	spin_lock_irqsave(&card->param_queue_lock, flags);
434 	list_for_each_entry(prm, &card->param_queue, list) {
435 		if (prm->port == port && prm->pid == cmdpid) {
436 			prm->response = skb;
437 			skb_pull(skb, 7);
438 			wake_up(&card->param_wq);
439 			found = 1;
440 			break;
441 		}
442 	}
443 	spin_unlock_irqrestore(&card->param_queue_lock, flags);
444 	return found;
445 }
446 
447 static ssize_t console_show(struct device *dev, struct device_attribute *attr,
448 			    char *buf)
449 {
450 	struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
451 	struct solos_card *card = atmdev->dev_data;
452 	struct sk_buff *skb;
453 	unsigned int len;
454 
455 	spin_lock(&card->cli_queue_lock);
456 	skb = skb_dequeue(&card->cli_queue[SOLOS_CHAN(atmdev)]);
457 	spin_unlock(&card->cli_queue_lock);
458 	if(skb == NULL)
459 		return sprintf(buf, "No data.\n");
460 
461 	len = skb->len;
462 	memcpy(buf, skb->data, len);
463 
464 	kfree_skb(skb);
465 	return len;
466 }
467 
468 static int send_command(struct solos_card *card, int dev, const char *buf, size_t size)
469 {
470 	struct sk_buff *skb;
471 	struct pkt_hdr *header;
472 
473 	if (size > (BUF_SIZE - sizeof(*header))) {
474 		dev_dbg(&card->dev->dev, "Command is too big.  Dropping request\n");
475 		return 0;
476 	}
477 	skb = alloc_skb(size + sizeof(*header), GFP_ATOMIC);
478 	if (!skb) {
479 		dev_warn(&card->dev->dev, "Failed to allocate sk_buff in send_command()\n");
480 		return 0;
481 	}
482 
483 	header = (void *)skb_put(skb, sizeof(*header));
484 
485 	header->size = cpu_to_le16(size);
486 	header->vpi = cpu_to_le16(0);
487 	header->vci = cpu_to_le16(0);
488 	header->type = cpu_to_le16(PKT_COMMAND);
489 
490 	memcpy(skb_put(skb, size), buf, size);
491 
492 	fpga_queue(card, dev, skb, NULL);
493 
494 	return 0;
495 }
496 
497 static ssize_t console_store(struct device *dev, struct device_attribute *attr,
498 			     const char *buf, size_t count)
499 {
500 	struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
501 	struct solos_card *card = atmdev->dev_data;
502 	int err;
503 
504 	err = send_command(card, SOLOS_CHAN(atmdev), buf, count);
505 
506 	return err?:count;
507 }
508 
509 struct geos_gpio_attr {
510 	struct device_attribute attr;
511 	int offset;
512 };
513 
514 #define SOLOS_GPIO_ATTR(_name, _mode, _show, _store, _offset)	\
515 	struct geos_gpio_attr gpio_attr_##_name = {		\
516 		.attr = __ATTR(_name, _mode, _show, _store),	\
517 		.offset = _offset }
518 
519 static ssize_t geos_gpio_store(struct device *dev, struct device_attribute *attr,
520 			       const char *buf, size_t count)
521 {
522 	struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
523 	struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr);
524 	struct solos_card *card = pci_get_drvdata(pdev);
525 	uint32_t data32;
526 
527 	if (count != 1 && (count != 2 || buf[1] != '\n'))
528 		return -EINVAL;
529 
530 	spin_lock_irq(&card->param_queue_lock);
531 	data32 = ioread32(card->config_regs + GPIO_STATUS);
532 	if (buf[0] == '1') {
533 		data32 |= 1 << gattr->offset;
534 		iowrite32(data32, card->config_regs + GPIO_STATUS);
535 	} else if (buf[0] == '0') {
536 		data32 &= ~(1 << gattr->offset);
537 		iowrite32(data32, card->config_regs + GPIO_STATUS);
538 	} else {
539 		count = -EINVAL;
540 	}
541 	spin_unlock_irq(&card->param_queue_lock);
542 	return count;
543 }
544 
545 static ssize_t geos_gpio_show(struct device *dev, struct device_attribute *attr,
546 			      char *buf)
547 {
548 	struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
549 	struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr);
550 	struct solos_card *card = pci_get_drvdata(pdev);
551 	uint32_t data32;
552 
553 	data32 = ioread32(card->config_regs + GPIO_STATUS);
554 	data32 = (data32 >> gattr->offset) & 1;
555 
556 	return sprintf(buf, "%d\n", data32);
557 }
558 
559 static ssize_t hardware_show(struct device *dev, struct device_attribute *attr,
560 			     char *buf)
561 {
562 	struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
563 	struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr);
564 	struct solos_card *card = pci_get_drvdata(pdev);
565 	uint32_t data32;
566 
567 	data32 = ioread32(card->config_regs + GPIO_STATUS);
568 	switch (gattr->offset) {
569 	case 0:
570 		/* HardwareVersion */
571 		data32 = data32 & 0x1F;
572 		break;
573 	case 1:
574 		/* HardwareVariant */
575 		data32 = (data32 >> 5) & 0x0F;
576 		break;
577 	}
578 	return sprintf(buf, "%d\n", data32);
579 }
580 
581 static DEVICE_ATTR(console, 0644, console_show, console_store);
582 
583 
584 #define SOLOS_ATTR_RO(x) static DEVICE_ATTR(x, 0444, solos_param_show, NULL);
585 #define SOLOS_ATTR_RW(x) static DEVICE_ATTR(x, 0644, solos_param_show, solos_param_store);
586 
587 #include "solos-attrlist.c"
588 
589 static SOLOS_GPIO_ATTR(GPIO1, 0644, geos_gpio_show, geos_gpio_store, 9);
590 static SOLOS_GPIO_ATTR(GPIO2, 0644, geos_gpio_show, geos_gpio_store, 10);
591 static SOLOS_GPIO_ATTR(GPIO3, 0644, geos_gpio_show, geos_gpio_store, 11);
592 static SOLOS_GPIO_ATTR(GPIO4, 0644, geos_gpio_show, geos_gpio_store, 12);
593 static SOLOS_GPIO_ATTR(GPIO5, 0644, geos_gpio_show, geos_gpio_store, 13);
594 static SOLOS_GPIO_ATTR(PushButton, 0444, geos_gpio_show, NULL, 14);
595 static SOLOS_GPIO_ATTR(HardwareVersion, 0444, hardware_show, NULL, 0);
596 static SOLOS_GPIO_ATTR(HardwareVariant, 0444, hardware_show, NULL, 1);
597 #undef SOLOS_ATTR_RO
598 #undef SOLOS_ATTR_RW
599 
600 #define SOLOS_ATTR_RO(x) &dev_attr_##x.attr,
601 #define SOLOS_ATTR_RW(x) &dev_attr_##x.attr,
602 
603 static struct attribute *solos_attrs[] = {
604 #include "solos-attrlist.c"
605 	NULL
606 };
607 
608 static struct attribute_group solos_attr_group = {
609 	.attrs = solos_attrs,
610 	.name = "parameters",
611 };
612 
613 static struct attribute *gpio_attrs[] = {
614 	&gpio_attr_GPIO1.attr.attr,
615 	&gpio_attr_GPIO2.attr.attr,
616 	&gpio_attr_GPIO3.attr.attr,
617 	&gpio_attr_GPIO4.attr.attr,
618 	&gpio_attr_GPIO5.attr.attr,
619 	&gpio_attr_PushButton.attr.attr,
620 	&gpio_attr_HardwareVersion.attr.attr,
621 	&gpio_attr_HardwareVariant.attr.attr,
622 	NULL
623 };
624 
625 static struct attribute_group gpio_attr_group = {
626 	.attrs = gpio_attrs,
627 	.name = "gpio",
628 };
629 
630 static int flash_upgrade(struct solos_card *card, int chip)
631 {
632 	const struct firmware *fw;
633 	const char *fw_name;
634 	int blocksize = 0;
635 	int numblocks = 0;
636 	int offset;
637 
638 	switch (chip) {
639 	case 0:
640 		fw_name = "solos-FPGA.bin";
641 		if (card->atmel_flash)
642 			blocksize = ATMEL_FPGA_BLOCK;
643 		else
644 			blocksize = SPI_FLASH_BLOCK;
645 		break;
646 	case 1:
647 		fw_name = "solos-Firmware.bin";
648 		if (card->atmel_flash)
649 			blocksize = ATMEL_SOLOS_BLOCK;
650 		else
651 			blocksize = SPI_FLASH_BLOCK;
652 		break;
653 	case 2:
654 		if (card->fpga_version > LEGACY_BUFFERS){
655 			fw_name = "solos-db-FPGA.bin";
656 			if (card->atmel_flash)
657 				blocksize = ATMEL_FPGA_BLOCK;
658 			else
659 				blocksize = SPI_FLASH_BLOCK;
660 		} else {
661 			dev_info(&card->dev->dev, "FPGA version doesn't support"
662 					" daughter board upgrades\n");
663 			return -EPERM;
664 		}
665 		break;
666 	case 3:
667 		if (card->fpga_version > LEGACY_BUFFERS){
668 			fw_name = "solos-Firmware.bin";
669 			if (card->atmel_flash)
670 				blocksize = ATMEL_SOLOS_BLOCK;
671 			else
672 				blocksize = SPI_FLASH_BLOCK;
673 		} else {
674 			dev_info(&card->dev->dev, "FPGA version doesn't support"
675 					" daughter board upgrades\n");
676 			return -EPERM;
677 		}
678 		break;
679 	default:
680 		return -ENODEV;
681 	}
682 
683 	if (request_firmware(&fw, fw_name, &card->dev->dev))
684 		return -ENOENT;
685 
686 	dev_info(&card->dev->dev, "Flash upgrade starting\n");
687 
688 	/* New FPGAs require driver version before permitting flash upgrades */
689 	iowrite32(DRIVER_VERSION, card->config_regs + DRIVER_VER);
690 
691 	numblocks = fw->size / blocksize;
692 	dev_info(&card->dev->dev, "Firmware size: %zd\n", fw->size);
693 	dev_info(&card->dev->dev, "Number of blocks: %d\n", numblocks);
694 
695 	dev_info(&card->dev->dev, "Changing FPGA to Update mode\n");
696 	iowrite32(1, card->config_regs + FPGA_MODE);
697 	(void) ioread32(card->config_regs + FPGA_MODE);
698 
699 	/* Set mode to Chip Erase */
700 	if(chip == 0 || chip == 2)
701 		dev_info(&card->dev->dev, "Set FPGA Flash mode to FPGA Chip Erase\n");
702 	if(chip == 1 || chip == 3)
703 		dev_info(&card->dev->dev, "Set FPGA Flash mode to Solos Chip Erase\n");
704 	iowrite32((chip * 2), card->config_regs + FLASH_MODE);
705 
706 
707 	iowrite32(1, card->config_regs + WRITE_FLASH);
708 	wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY));
709 
710 	for (offset = 0; offset < fw->size; offset += blocksize) {
711 		int i;
712 
713 		/* Clear write flag */
714 		iowrite32(0, card->config_regs + WRITE_FLASH);
715 
716 		/* Set mode to Block Write */
717 		/* dev_info(&card->dev->dev, "Set FPGA Flash mode to Block Write\n"); */
718 		iowrite32(((chip * 2) + 1), card->config_regs + FLASH_MODE);
719 
720 		/* Copy block to buffer, swapping each 16 bits for Atmel flash */
721 		for(i = 0; i < blocksize; i += 4) {
722 			uint32_t word;
723 			if (card->atmel_flash)
724 				word = swahb32p((uint32_t *)(fw->data + offset + i));
725 			else
726 				word = *(uint32_t *)(fw->data + offset + i);
727 			if(card->fpga_version > LEGACY_BUFFERS)
728 				iowrite32(word, FLASH_BUF + i);
729 			else
730 				iowrite32(word, RX_BUF(card, 3) + i);
731 		}
732 
733 		/* Specify block number and then trigger flash write */
734 		iowrite32(offset / blocksize, card->config_regs + FLASH_BLOCK);
735 		iowrite32(1, card->config_regs + WRITE_FLASH);
736 		wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY));
737 	}
738 
739 	release_firmware(fw);
740 	iowrite32(0, card->config_regs + WRITE_FLASH);
741 	iowrite32(0, card->config_regs + FPGA_MODE);
742 	iowrite32(0, card->config_regs + FLASH_MODE);
743 	dev_info(&card->dev->dev, "Returning FPGA to Data mode\n");
744 	return 0;
745 }
746 
747 static irqreturn_t solos_irq(int irq, void *dev_id)
748 {
749 	struct solos_card *card = dev_id;
750 	int handled = 1;
751 
752 	iowrite32(0, card->config_regs + IRQ_CLEAR);
753 
754 	/* If we're up and running, just kick the tasklet to process TX/RX */
755 	if (card->atmdev[0])
756 		tasklet_schedule(&card->tlet);
757 	else
758 		wake_up(&card->fw_wq);
759 
760 	return IRQ_RETVAL(handled);
761 }
762 
763 void solos_bh(unsigned long card_arg)
764 {
765 	struct solos_card *card = (void *)card_arg;
766 	uint32_t card_flags;
767 	uint32_t rx_done = 0;
768 	int port;
769 
770 	/*
771 	 * Since fpga_tx() is going to need to read the flags under its lock,
772 	 * it can return them to us so that we don't have to hit PCI MMIO
773 	 * again for the same information
774 	 */
775 	card_flags = fpga_tx(card);
776 
777 	for (port = 0; port < card->nr_ports; port++) {
778 		if (card_flags & (0x10 << port)) {
779 			struct pkt_hdr _hdr, *header;
780 			struct sk_buff *skb;
781 			struct atm_vcc *vcc;
782 			int size;
783 
784 			if (card->using_dma) {
785 				skb = card->rx_skb[port];
786 				card->rx_skb[port] = NULL;
787 
788 				pci_unmap_single(card->dev, SKB_CB(skb)->dma_addr,
789 						 RX_DMA_SIZE, PCI_DMA_FROMDEVICE);
790 
791 				header = (void *)skb->data;
792 				size = le16_to_cpu(header->size);
793 				skb_put(skb, size + sizeof(*header));
794 				skb_pull(skb, sizeof(*header));
795 			} else {
796 				header = &_hdr;
797 
798 				rx_done |= 0x10 << port;
799 
800 				memcpy_fromio(header, RX_BUF(card, port), sizeof(*header));
801 
802 				size = le16_to_cpu(header->size);
803 				if (size > (card->buffer_size - sizeof(*header))){
804 					dev_warn(&card->dev->dev, "Invalid buffer size\n");
805 					continue;
806 				}
807 
808 				skb = alloc_skb(size + 1, GFP_ATOMIC);
809 				if (!skb) {
810 					if (net_ratelimit())
811 						dev_warn(&card->dev->dev, "Failed to allocate sk_buff for RX\n");
812 					continue;
813 				}
814 
815 				memcpy_fromio(skb_put(skb, size),
816 					      RX_BUF(card, port) + sizeof(*header),
817 					      size);
818 			}
819 			if (atmdebug) {
820 				dev_info(&card->dev->dev, "Received: port %d\n", port);
821 				dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n",
822 					 size, le16_to_cpu(header->vpi),
823 					 le16_to_cpu(header->vci));
824 				print_buffer(skb);
825 			}
826 
827 			switch (le16_to_cpu(header->type)) {
828 			case PKT_DATA:
829 				vcc = find_vcc(card->atmdev[port], le16_to_cpu(header->vpi),
830 					       le16_to_cpu(header->vci));
831 				if (!vcc) {
832 					if (net_ratelimit())
833 						dev_warn(&card->dev->dev, "Received packet for unknown VPI.VCI %d.%d on port %d\n",
834 							 le16_to_cpu(header->vpi), le16_to_cpu(header->vci),
835 							 port);
836 					dev_kfree_skb_any(skb);
837 					break;
838 				}
839 				atm_charge(vcc, skb->truesize);
840 				vcc->push(vcc, skb);
841 				atomic_inc(&vcc->stats->rx);
842 				break;
843 
844 			case PKT_STATUS:
845 				if (process_status(card, port, skb) &&
846 				    net_ratelimit()) {
847 					dev_warn(&card->dev->dev, "Bad status packet of %d bytes on port %d:\n", skb->len, port);
848 					print_buffer(skb);
849 				}
850 				dev_kfree_skb_any(skb);
851 				break;
852 
853 			case PKT_COMMAND:
854 			default: /* FIXME: Not really, surely? */
855 				if (process_command(card, port, skb))
856 					break;
857 				spin_lock(&card->cli_queue_lock);
858 				if (skb_queue_len(&card->cli_queue[port]) > 10) {
859 					if (net_ratelimit())
860 						dev_warn(&card->dev->dev, "Dropping console response on port %d\n",
861 							 port);
862 					dev_kfree_skb_any(skb);
863 				} else
864 					skb_queue_tail(&card->cli_queue[port], skb);
865 				spin_unlock(&card->cli_queue_lock);
866 				break;
867 			}
868 		}
869 		/* Allocate RX skbs for any ports which need them */
870 		if (card->using_dma && card->atmdev[port] &&
871 		    !card->rx_skb[port]) {
872 			struct sk_buff *skb = alloc_skb(RX_DMA_SIZE, GFP_ATOMIC);
873 			if (skb) {
874 				SKB_CB(skb)->dma_addr =
875 					pci_map_single(card->dev, skb->data,
876 						       RX_DMA_SIZE, PCI_DMA_FROMDEVICE);
877 				iowrite32(SKB_CB(skb)->dma_addr,
878 					  card->config_regs + RX_DMA_ADDR(port));
879 				card->rx_skb[port] = skb;
880 			} else {
881 				if (net_ratelimit())
882 					dev_warn(&card->dev->dev, "Failed to allocate RX skb");
883 
884 				/* We'll have to try again later */
885 				tasklet_schedule(&card->tlet);
886 			}
887 		}
888 	}
889 	if (rx_done)
890 		iowrite32(rx_done, card->config_regs + FLAGS_ADDR);
891 
892 	return;
893 }
894 
895 static struct atm_vcc *find_vcc(struct atm_dev *dev, short vpi, int vci)
896 {
897 	struct hlist_head *head;
898 	struct atm_vcc *vcc = NULL;
899 	struct sock *s;
900 
901 	read_lock(&vcc_sklist_lock);
902 	head = &vcc_hash[vci & (VCC_HTABLE_SIZE -1)];
903 	sk_for_each(s, head) {
904 		vcc = atm_sk(s);
905 		if (vcc->dev == dev && vcc->vci == vci &&
906 		    vcc->vpi == vpi && vcc->qos.rxtp.traffic_class != ATM_NONE &&
907 		    test_bit(ATM_VF_READY, &vcc->flags))
908 			goto out;
909 	}
910 	vcc = NULL;
911  out:
912 	read_unlock(&vcc_sklist_lock);
913 	return vcc;
914 }
915 
916 static int popen(struct atm_vcc *vcc)
917 {
918 	struct solos_card *card = vcc->dev->dev_data;
919 	struct sk_buff *skb;
920 	struct pkt_hdr *header;
921 
922 	if (vcc->qos.aal != ATM_AAL5) {
923 		dev_warn(&card->dev->dev, "Unsupported ATM type %d\n",
924 			 vcc->qos.aal);
925 		return -EINVAL;
926 	}
927 
928 	skb = alloc_skb(sizeof(*header), GFP_KERNEL);
929 	if (!skb) {
930 		if (net_ratelimit())
931 			dev_warn(&card->dev->dev, "Failed to allocate sk_buff in popen()\n");
932 		return -ENOMEM;
933 	}
934 	header = (void *)skb_put(skb, sizeof(*header));
935 
936 	header->size = cpu_to_le16(0);
937 	header->vpi = cpu_to_le16(vcc->vpi);
938 	header->vci = cpu_to_le16(vcc->vci);
939 	header->type = cpu_to_le16(PKT_POPEN);
940 
941 	fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, NULL);
942 
943 	set_bit(ATM_VF_ADDR, &vcc->flags);
944 	set_bit(ATM_VF_READY, &vcc->flags);
945 
946 	return 0;
947 }
948 
949 static void pclose(struct atm_vcc *vcc)
950 {
951 	struct solos_card *card = vcc->dev->dev_data;
952 	unsigned char port = SOLOS_CHAN(vcc->dev);
953 	struct sk_buff *skb, *tmpskb;
954 	struct pkt_hdr *header;
955 
956 	/* Remove any yet-to-be-transmitted packets from the pending queue */
957 	spin_lock(&card->tx_queue_lock);
958 	skb_queue_walk_safe(&card->tx_queue[port], skb, tmpskb) {
959 		if (SKB_CB(skb)->vcc == vcc) {
960 			skb_unlink(skb, &card->tx_queue[port]);
961 			solos_pop(vcc, skb);
962 		}
963 	}
964 	spin_unlock(&card->tx_queue_lock);
965 
966 	skb = alloc_skb(sizeof(*header), GFP_KERNEL);
967 	if (!skb) {
968 		dev_warn(&card->dev->dev, "Failed to allocate sk_buff in pclose()\n");
969 		return;
970 	}
971 	header = (void *)skb_put(skb, sizeof(*header));
972 
973 	header->size = cpu_to_le16(0);
974 	header->vpi = cpu_to_le16(vcc->vpi);
975 	header->vci = cpu_to_le16(vcc->vci);
976 	header->type = cpu_to_le16(PKT_PCLOSE);
977 
978 	skb_get(skb);
979 	fpga_queue(card, port, skb, NULL);
980 
981 	if (!wait_event_timeout(card->param_wq, !skb_shared(skb), 5 * HZ))
982 		dev_warn(&card->dev->dev,
983 			 "Timeout waiting for VCC close on port %d\n", port);
984 
985 	dev_kfree_skb(skb);
986 
987 	/* Hold up vcc_destroy_socket() (our caller) until solos_bh() in the
988 	   tasklet has finished processing any incoming packets (and, more to
989 	   the point, using the vcc pointer). */
990 	tasklet_unlock_wait(&card->tlet);
991 
992 	clear_bit(ATM_VF_ADDR, &vcc->flags);
993 
994 	return;
995 }
996 
997 static int print_buffer(struct sk_buff *buf)
998 {
999 	int len,i;
1000 	char msg[500];
1001 	char item[10];
1002 
1003 	len = buf->len;
1004 	for (i = 0; i < len; i++){
1005 		if(i % 8 == 0)
1006 			sprintf(msg, "%02X: ", i);
1007 
1008 		sprintf(item,"%02X ",*(buf->data + i));
1009 		strcat(msg, item);
1010 		if(i % 8 == 7) {
1011 			sprintf(item, "\n");
1012 			strcat(msg, item);
1013 			printk(KERN_DEBUG "%s", msg);
1014 		}
1015 	}
1016 	if (i % 8 != 0) {
1017 		sprintf(item, "\n");
1018 		strcat(msg, item);
1019 		printk(KERN_DEBUG "%s", msg);
1020 	}
1021 	printk(KERN_DEBUG "\n");
1022 
1023 	return 0;
1024 }
1025 
1026 static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb,
1027 		       struct atm_vcc *vcc)
1028 {
1029 	int old_len;
1030 	unsigned long flags;
1031 
1032 	SKB_CB(skb)->vcc = vcc;
1033 
1034 	spin_lock_irqsave(&card->tx_queue_lock, flags);
1035 	old_len = skb_queue_len(&card->tx_queue[port]);
1036 	skb_queue_tail(&card->tx_queue[port], skb);
1037 	if (!old_len)
1038 		card->tx_mask |= (1 << port);
1039 	spin_unlock_irqrestore(&card->tx_queue_lock, flags);
1040 
1041 	/* Theoretically we could just schedule the tasklet here, but
1042 	   that introduces latency we don't want -- it's noticeable */
1043 	if (!old_len)
1044 		fpga_tx(card);
1045 }
1046 
1047 static uint32_t fpga_tx(struct solos_card *card)
1048 {
1049 	uint32_t tx_pending, card_flags;
1050 	uint32_t tx_started = 0;
1051 	struct sk_buff *skb;
1052 	struct atm_vcc *vcc;
1053 	unsigned char port;
1054 	unsigned long flags;
1055 
1056 	spin_lock_irqsave(&card->tx_lock, flags);
1057 
1058 	card_flags = ioread32(card->config_regs + FLAGS_ADDR);
1059 	/*
1060 	 * The queue lock is required for _writing_ to tx_mask, but we're
1061 	 * OK to read it here without locking. The only potential update
1062 	 * that we could race with is in fpga_queue() where it sets a bit
1063 	 * for a new port... but it's going to call this function again if
1064 	 * it's doing that, anyway.
1065 	 */
1066 	tx_pending = card->tx_mask & ~card_flags;
1067 
1068 	for (port = 0; tx_pending; tx_pending >>= 1, port++) {
1069 		if (tx_pending & 1) {
1070 			struct sk_buff *oldskb = card->tx_skb[port];
1071 			if (oldskb) {
1072 				pci_unmap_single(card->dev, SKB_CB(oldskb)->dma_addr,
1073 						 oldskb->len, PCI_DMA_TODEVICE);
1074 				card->tx_skb[port] = NULL;
1075 			}
1076 			spin_lock(&card->tx_queue_lock);
1077 			skb = skb_dequeue(&card->tx_queue[port]);
1078 			if (!skb)
1079 				card->tx_mask &= ~(1 << port);
1080 			spin_unlock(&card->tx_queue_lock);
1081 
1082 			if (skb && !card->using_dma) {
1083 				memcpy_toio(TX_BUF(card, port), skb->data, skb->len);
1084 				tx_started |= 1 << port;
1085 				oldskb = skb; /* We're done with this skb already */
1086 			} else if (skb && card->using_dma) {
1087 				unsigned char *data = skb->data;
1088 				if ((unsigned long)data & card->dma_alignment) {
1089 					data = card->dma_bounce + (BUF_SIZE * port);
1090 					memcpy(data, skb->data, skb->len);
1091 				}
1092 				SKB_CB(skb)->dma_addr = pci_map_single(card->dev, data,
1093 								       skb->len, PCI_DMA_TODEVICE);
1094 				card->tx_skb[port] = skb;
1095 				iowrite32(SKB_CB(skb)->dma_addr,
1096 					  card->config_regs + TX_DMA_ADDR(port));
1097 			}
1098 
1099 			if (!oldskb)
1100 				continue;
1101 
1102 			/* Clean up and free oldskb now it's gone */
1103 			if (atmdebug) {
1104 				struct pkt_hdr *header = (void *)oldskb->data;
1105 				int size = le16_to_cpu(header->size);
1106 
1107 				skb_pull(oldskb, sizeof(*header));
1108 				dev_info(&card->dev->dev, "Transmitted: port %d\n",
1109 					 port);
1110 				dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n",
1111 					 size, le16_to_cpu(header->vpi),
1112 					 le16_to_cpu(header->vci));
1113 				print_buffer(oldskb);
1114 			}
1115 
1116 			vcc = SKB_CB(oldskb)->vcc;
1117 
1118 			if (vcc) {
1119 				atomic_inc(&vcc->stats->tx);
1120 				solos_pop(vcc, oldskb);
1121 			} else {
1122 				dev_kfree_skb_irq(oldskb);
1123 				wake_up(&card->param_wq);
1124 			}
1125 		}
1126 	}
1127 	/* For non-DMA TX, write the 'TX start' bit for all four ports simultaneously */
1128 	if (tx_started)
1129 		iowrite32(tx_started, card->config_regs + FLAGS_ADDR);
1130 
1131 	spin_unlock_irqrestore(&card->tx_lock, flags);
1132 	return card_flags;
1133 }
1134 
1135 static int psend(struct atm_vcc *vcc, struct sk_buff *skb)
1136 {
1137 	struct solos_card *card = vcc->dev->dev_data;
1138 	struct pkt_hdr *header;
1139 	int pktlen;
1140 
1141 	pktlen = skb->len;
1142 	if (pktlen > (BUF_SIZE - sizeof(*header))) {
1143 		dev_warn(&card->dev->dev, "Length of PDU is too large. Dropping PDU.\n");
1144 		solos_pop(vcc, skb);
1145 		return 0;
1146 	}
1147 
1148 	if (!skb_clone_writable(skb, sizeof(*header))) {
1149 		int expand_by = 0;
1150 		int ret;
1151 
1152 		if (skb_headroom(skb) < sizeof(*header))
1153 			expand_by = sizeof(*header) - skb_headroom(skb);
1154 
1155 		ret = pskb_expand_head(skb, expand_by, 0, GFP_ATOMIC);
1156 		if (ret) {
1157 			dev_warn(&card->dev->dev, "pskb_expand_head failed.\n");
1158 			solos_pop(vcc, skb);
1159 			return ret;
1160 		}
1161 	}
1162 
1163 	header = (void *)skb_push(skb, sizeof(*header));
1164 
1165 	/* This does _not_ include the size of the header */
1166 	header->size = cpu_to_le16(pktlen);
1167 	header->vpi = cpu_to_le16(vcc->vpi);
1168 	header->vci = cpu_to_le16(vcc->vci);
1169 	header->type = cpu_to_le16(PKT_DATA);
1170 
1171 	fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, vcc);
1172 
1173 	return 0;
1174 }
1175 
1176 static struct atmdev_ops fpga_ops = {
1177 	.open =		popen,
1178 	.close =	pclose,
1179 	.ioctl =	NULL,
1180 	.getsockopt =	NULL,
1181 	.setsockopt =	NULL,
1182 	.send =		psend,
1183 	.send_oam =	NULL,
1184 	.phy_put =	NULL,
1185 	.phy_get =	NULL,
1186 	.change_qos =	NULL,
1187 	.proc_read =	NULL,
1188 	.owner =	THIS_MODULE
1189 };
1190 
1191 static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id)
1192 {
1193 	int err;
1194 	uint16_t fpga_ver;
1195 	uint8_t major_ver, minor_ver;
1196 	uint32_t data32;
1197 	struct solos_card *card;
1198 
1199 	card = kzalloc(sizeof(*card), GFP_KERNEL);
1200 	if (!card)
1201 		return -ENOMEM;
1202 
1203 	card->dev = dev;
1204 	init_waitqueue_head(&card->fw_wq);
1205 	init_waitqueue_head(&card->param_wq);
1206 
1207 	err = pci_enable_device(dev);
1208 	if (err) {
1209 		dev_warn(&dev->dev,  "Failed to enable PCI device\n");
1210 		goto out;
1211 	}
1212 
1213 	err = pci_set_dma_mask(dev, DMA_BIT_MASK(32));
1214 	if (err) {
1215 		dev_warn(&dev->dev, "Failed to set 32-bit DMA mask\n");
1216 		goto out;
1217 	}
1218 
1219 	err = pci_request_regions(dev, "solos");
1220 	if (err) {
1221 		dev_warn(&dev->dev, "Failed to request regions\n");
1222 		goto out;
1223 	}
1224 
1225 	card->config_regs = pci_iomap(dev, 0, CONFIG_RAM_SIZE);
1226 	if (!card->config_regs) {
1227 		dev_warn(&dev->dev, "Failed to ioremap config registers\n");
1228 		goto out_release_regions;
1229 	}
1230 	card->buffers = pci_iomap(dev, 1, DATA_RAM_SIZE);
1231 	if (!card->buffers) {
1232 		dev_warn(&dev->dev, "Failed to ioremap data buffers\n");
1233 		goto out_unmap_config;
1234 	}
1235 
1236 	if (reset) {
1237 		iowrite32(1, card->config_regs + FPGA_MODE);
1238 		data32 = ioread32(card->config_regs + FPGA_MODE);
1239 
1240 		iowrite32(0, card->config_regs + FPGA_MODE);
1241 		data32 = ioread32(card->config_regs + FPGA_MODE);
1242 	}
1243 
1244 	data32 = ioread32(card->config_regs + FPGA_VER);
1245 	fpga_ver = (data32 & 0x0000FFFF);
1246 	major_ver = ((data32 & 0xFF000000) >> 24);
1247 	minor_ver = ((data32 & 0x00FF0000) >> 16);
1248 	card->fpga_version = FPGA_VERSION(major_ver,minor_ver);
1249 	if (card->fpga_version > LEGACY_BUFFERS)
1250 		card->buffer_size = BUF_SIZE;
1251 	else
1252 		card->buffer_size = OLD_BUF_SIZE;
1253 	dev_info(&dev->dev, "Solos FPGA Version %d.%02d svn-%d\n",
1254 		 major_ver, minor_ver, fpga_ver);
1255 
1256 	if (fpga_ver < 37 && (fpga_upgrade || firmware_upgrade ||
1257 			      db_fpga_upgrade || db_firmware_upgrade)) {
1258 		dev_warn(&dev->dev,
1259 			 "FPGA too old; cannot upgrade flash. Use JTAG.\n");
1260 		fpga_upgrade = firmware_upgrade = 0;
1261 		db_fpga_upgrade = db_firmware_upgrade = 0;
1262 	}
1263 
1264 	/* Stopped using Atmel flash after 0.03-38 */
1265 	if (fpga_ver < 39)
1266 		card->atmel_flash = 1;
1267 	else
1268 		card->atmel_flash = 0;
1269 
1270 	data32 = ioread32(card->config_regs + PORTS);
1271 	card->nr_ports = (data32 & 0x000000FF);
1272 
1273 	if (card->fpga_version >= DMA_SUPPORTED) {
1274 		pci_set_master(dev);
1275 		card->using_dma = 1;
1276 		if (1) { /* All known FPGA versions so far */
1277 			card->dma_alignment = 3;
1278 			card->dma_bounce = kmalloc(card->nr_ports * BUF_SIZE, GFP_KERNEL);
1279 			if (!card->dma_bounce) {
1280 				dev_warn(&card->dev->dev, "Failed to allocate DMA bounce buffers\n");
1281 				/* Fallback to MMIO doesn't work */
1282 				goto out_unmap_both;
1283 			}
1284 		}
1285 	} else {
1286 		card->using_dma = 0;
1287 		/* Set RX empty flag for all ports */
1288 		iowrite32(0xF0, card->config_regs + FLAGS_ADDR);
1289 	}
1290 
1291 	pci_set_drvdata(dev, card);
1292 
1293 	tasklet_init(&card->tlet, solos_bh, (unsigned long)card);
1294 	spin_lock_init(&card->tx_lock);
1295 	spin_lock_init(&card->tx_queue_lock);
1296 	spin_lock_init(&card->cli_queue_lock);
1297 	spin_lock_init(&card->param_queue_lock);
1298 	INIT_LIST_HEAD(&card->param_queue);
1299 
1300 	err = request_irq(dev->irq, solos_irq, IRQF_SHARED,
1301 			  "solos-pci", card);
1302 	if (err) {
1303 		dev_dbg(&card->dev->dev, "Failed to request interrupt IRQ: %d\n", dev->irq);
1304 		goto out_unmap_both;
1305 	}
1306 
1307 	iowrite32(1, card->config_regs + IRQ_EN_ADDR);
1308 
1309 	if (fpga_upgrade)
1310 		flash_upgrade(card, 0);
1311 
1312 	if (firmware_upgrade)
1313 		flash_upgrade(card, 1);
1314 
1315 	if (db_fpga_upgrade)
1316 		flash_upgrade(card, 2);
1317 
1318 	if (db_firmware_upgrade)
1319 		flash_upgrade(card, 3);
1320 
1321 	err = atm_init(card, &dev->dev);
1322 	if (err)
1323 		goto out_free_irq;
1324 
1325 	if (card->fpga_version >= DMA_SUPPORTED &&
1326 	    sysfs_create_group(&card->dev->dev.kobj, &gpio_attr_group))
1327 		dev_err(&card->dev->dev, "Could not register parameter group for GPIOs\n");
1328 
1329 	return 0;
1330 
1331  out_free_irq:
1332 	iowrite32(0, card->config_regs + IRQ_EN_ADDR);
1333 	free_irq(dev->irq, card);
1334 	tasklet_kill(&card->tlet);
1335 
1336  out_unmap_both:
1337 	kfree(card->dma_bounce);
1338 	pci_iounmap(dev, card->buffers);
1339  out_unmap_config:
1340 	pci_iounmap(dev, card->config_regs);
1341  out_release_regions:
1342 	pci_release_regions(dev);
1343  out:
1344 	kfree(card);
1345 	return err;
1346 }
1347 
1348 static int atm_init(struct solos_card *card, struct device *parent)
1349 {
1350 	int i;
1351 
1352 	for (i = 0; i < card->nr_ports; i++) {
1353 		struct sk_buff *skb;
1354 		struct pkt_hdr *header;
1355 
1356 		skb_queue_head_init(&card->tx_queue[i]);
1357 		skb_queue_head_init(&card->cli_queue[i]);
1358 
1359 		card->atmdev[i] = atm_dev_register("solos-pci", parent, &fpga_ops, -1, NULL);
1360 		if (!card->atmdev[i]) {
1361 			dev_err(&card->dev->dev, "Could not register ATM device %d\n", i);
1362 			atm_remove(card);
1363 			return -ENODEV;
1364 		}
1365 		if (device_create_file(&card->atmdev[i]->class_dev, &dev_attr_console))
1366 			dev_err(&card->dev->dev, "Could not register console for ATM device %d\n", i);
1367 		if (sysfs_create_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group))
1368 			dev_err(&card->dev->dev, "Could not register parameter group for ATM device %d\n", i);
1369 
1370 		dev_info(&card->dev->dev, "Registered ATM device %d\n", card->atmdev[i]->number);
1371 
1372 		card->atmdev[i]->ci_range.vpi_bits = 8;
1373 		card->atmdev[i]->ci_range.vci_bits = 16;
1374 		card->atmdev[i]->dev_data = card;
1375 		card->atmdev[i]->phy_data = (void *)(unsigned long)i;
1376 		atm_dev_signal_change(card->atmdev[i], ATM_PHY_SIG_FOUND);
1377 
1378 		skb = alloc_skb(sizeof(*header), GFP_KERNEL);
1379 		if (!skb) {
1380 			dev_warn(&card->dev->dev, "Failed to allocate sk_buff in atm_init()\n");
1381 			continue;
1382 		}
1383 
1384 		header = (void *)skb_put(skb, sizeof(*header));
1385 
1386 		header->size = cpu_to_le16(0);
1387 		header->vpi = cpu_to_le16(0);
1388 		header->vci = cpu_to_le16(0);
1389 		header->type = cpu_to_le16(PKT_STATUS);
1390 
1391 		fpga_queue(card, i, skb, NULL);
1392 	}
1393 	return 0;
1394 }
1395 
1396 static void atm_remove(struct solos_card *card)
1397 {
1398 	int i;
1399 
1400 	for (i = 0; i < card->nr_ports; i++) {
1401 		if (card->atmdev[i]) {
1402 			struct sk_buff *skb;
1403 
1404 			dev_info(&card->dev->dev, "Unregistering ATM device %d\n", card->atmdev[i]->number);
1405 
1406 			sysfs_remove_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group);
1407 			atm_dev_deregister(card->atmdev[i]);
1408 
1409 			skb = card->rx_skb[i];
1410 			if (skb) {
1411 				pci_unmap_single(card->dev, SKB_CB(skb)->dma_addr,
1412 						 RX_DMA_SIZE, PCI_DMA_FROMDEVICE);
1413 				dev_kfree_skb(skb);
1414 			}
1415 			skb = card->tx_skb[i];
1416 			if (skb) {
1417 				pci_unmap_single(card->dev, SKB_CB(skb)->dma_addr,
1418 						 skb->len, PCI_DMA_TODEVICE);
1419 				dev_kfree_skb(skb);
1420 			}
1421 			while ((skb = skb_dequeue(&card->tx_queue[i])))
1422 				dev_kfree_skb(skb);
1423 
1424 		}
1425 	}
1426 }
1427 
1428 static void fpga_remove(struct pci_dev *dev)
1429 {
1430 	struct solos_card *card = pci_get_drvdata(dev);
1431 
1432 	/* Disable IRQs */
1433 	iowrite32(0, card->config_regs + IRQ_EN_ADDR);
1434 
1435 	/* Reset FPGA */
1436 	iowrite32(1, card->config_regs + FPGA_MODE);
1437 	(void)ioread32(card->config_regs + FPGA_MODE);
1438 
1439 	if (card->fpga_version >= DMA_SUPPORTED)
1440 		sysfs_remove_group(&card->dev->dev.kobj, &gpio_attr_group);
1441 
1442 	atm_remove(card);
1443 
1444 	free_irq(dev->irq, card);
1445 	tasklet_kill(&card->tlet);
1446 
1447 	kfree(card->dma_bounce);
1448 
1449 	/* Release device from reset */
1450 	iowrite32(0, card->config_regs + FPGA_MODE);
1451 	(void)ioread32(card->config_regs + FPGA_MODE);
1452 
1453 	pci_iounmap(dev, card->buffers);
1454 	pci_iounmap(dev, card->config_regs);
1455 
1456 	pci_release_regions(dev);
1457 	pci_disable_device(dev);
1458 
1459 	kfree(card);
1460 }
1461 
1462 static struct pci_device_id fpga_pci_tbl[] = {
1463 	{ 0x10ee, 0x0300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
1464 	{ 0, }
1465 };
1466 
1467 MODULE_DEVICE_TABLE(pci,fpga_pci_tbl);
1468 
1469 static struct pci_driver fpga_driver = {
1470 	.name =		"solos",
1471 	.id_table =	fpga_pci_tbl,
1472 	.probe =	fpga_probe,
1473 	.remove =	fpga_remove,
1474 };
1475 
1476 
1477 static int __init solos_pci_init(void)
1478 {
1479 	BUILD_BUG_ON(sizeof(struct solos_skb_cb) > sizeof(((struct sk_buff *)0)->cb));
1480 
1481 	printk(KERN_INFO "Solos PCI Driver Version %s\n", VERSION);
1482 	return pci_register_driver(&fpga_driver);
1483 }
1484 
1485 static void __exit solos_pci_exit(void)
1486 {
1487 	pci_unregister_driver(&fpga_driver);
1488 	printk(KERN_INFO "Solos PCI Driver %s Unloaded\n", VERSION);
1489 }
1490 
1491 module_init(solos_pci_init);
1492 module_exit(solos_pci_exit);
1493