1 /* 2 * pata_via.c - VIA PATA for new ATA layer 3 * (C) 2005-2006 Red Hat Inc 4 * Alan Cox <alan@redhat.com> 5 * 6 * Documentation 7 * Most chipset documentation available under NDA only 8 * 9 * VIA version guide 10 * VIA VT82C561 - early design, uses ata_generic currently 11 * VIA VT82C576 - MWDMA, 33Mhz 12 * VIA VT82C586 - MWDMA, 33Mhz 13 * VIA VT82C586a - Added UDMA to 33Mhz 14 * VIA VT82C586b - UDMA33 15 * VIA VT82C596a - Nonfunctional UDMA66 16 * VIA VT82C596b - Working UDMA66 17 * VIA VT82C686 - Nonfunctional UDMA66 18 * VIA VT82C686a - Working UDMA66 19 * VIA VT82C686b - Updated to UDMA100 20 * VIA VT8231 - UDMA100 21 * VIA VT8233 - UDMA100 22 * VIA VT8233a - UDMA133 23 * VIA VT8233c - UDMA100 24 * VIA VT8235 - UDMA133 25 * VIA VT8237 - UDMA133 26 * VIA VT8237S - UDMA133 27 * VIA VT8251 - UDMA133 28 * 29 * Most registers remain compatible across chips. Others start reserved 30 * and acquire sensible semantics if set to 1 (eg cable detect). A few 31 * exceptions exist, notably around the FIFO settings. 32 * 33 * One additional quirk of the VIA design is that like ALi they use few 34 * PCI IDs for a lot of chips. 35 * 36 * Based heavily on: 37 * 38 * Version 3.38 39 * 40 * VIA IDE driver for Linux. Supported southbridges: 41 * 42 * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b, 43 * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a, 44 * vt8235, vt8237 45 * 46 * Copyright (c) 2000-2002 Vojtech Pavlik 47 * 48 * Based on the work of: 49 * Michel Aubry 50 * Jeff Garzik 51 * Andre Hedrick 52 53 */ 54 55 #include <linux/kernel.h> 56 #include <linux/module.h> 57 #include <linux/pci.h> 58 #include <linux/init.h> 59 #include <linux/blkdev.h> 60 #include <linux/delay.h> 61 #include <scsi/scsi_host.h> 62 #include <linux/libata.h> 63 #include <linux/dmi.h> 64 65 #define DRV_NAME "pata_via" 66 #define DRV_VERSION "0.3.3" 67 68 /* 69 * The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx 70 * driver. 71 */ 72 73 enum { 74 VIA_UDMA = 0x007, 75 VIA_UDMA_NONE = 0x000, 76 VIA_UDMA_33 = 0x001, 77 VIA_UDMA_66 = 0x002, 78 VIA_UDMA_100 = 0x003, 79 VIA_UDMA_133 = 0x004, 80 VIA_BAD_PREQ = 0x010, /* Crashes if PREQ# till DDACK# set */ 81 VIA_BAD_CLK66 = 0x020, /* 66 MHz clock doesn't work correctly */ 82 VIA_SET_FIFO = 0x040, /* Needs to have FIFO split set */ 83 VIA_NO_UNMASK = 0x080, /* Doesn't work with IRQ unmasking on */ 84 VIA_BAD_ID = 0x100, /* Has wrong vendor ID (0x1107) */ 85 VIA_BAD_AST = 0x200, /* Don't touch Address Setup Timing */ 86 VIA_NO_ENABLES = 0x400, /* Has no enablebits */ 87 }; 88 89 /* 90 * VIA SouthBridge chips. 91 */ 92 93 static const struct via_isa_bridge { 94 const char *name; 95 u16 id; 96 u8 rev_min; 97 u8 rev_max; 98 u16 flags; 99 } via_isa_bridges[] = { 100 { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 101 { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 102 { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 103 { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 104 { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES}, 105 { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 106 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 107 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 108 { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 109 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 }, 110 { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 }, 111 { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 }, 112 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 }, 113 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 }, 114 { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 }, 115 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 }, 116 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 }, 117 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO }, 118 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ }, 119 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO }, 120 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO }, 121 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO }, 122 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK }, 123 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID }, 124 { NULL } 125 }; 126 127 128 /* 129 * Cable special cases 130 */ 131 132 static const struct dmi_system_id cable_dmi_table[] = { 133 { 134 .ident = "Acer Ferrari 3400", 135 .matches = { 136 DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."), 137 DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"), 138 }, 139 }, 140 { } 141 }; 142 143 static int via_cable_override(struct pci_dev *pdev) 144 { 145 /* Systems by DMI */ 146 if (dmi_check_system(cable_dmi_table)) 147 return 1; 148 /* Arima W730-K8/Targa Visionary 811/... */ 149 if (pdev->subsystem_vendor == 0x161F && pdev->subsystem_device == 0x2032) 150 return 1; 151 return 0; 152 } 153 154 155 /** 156 * via_cable_detect - cable detection 157 * @ap: ATA port 158 * 159 * Perform cable detection. Actually for the VIA case the BIOS 160 * already did this for us. We read the values provided by the 161 * BIOS. If you are using an 8235 in a non-PC configuration you 162 * may need to update this code. 163 * 164 * Hotplug also impacts on this. 165 */ 166 167 static int via_cable_detect(struct ata_port *ap) { 168 const struct via_isa_bridge *config = ap->host->private_data; 169 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 170 u32 ata66; 171 172 if (via_cable_override(pdev)) 173 return ATA_CBL_PATA40_SHORT; 174 175 /* Early chips are 40 wire */ 176 if ((config->flags & VIA_UDMA) < VIA_UDMA_66) 177 return ATA_CBL_PATA40; 178 /* UDMA 66 chips have only drive side logic */ 179 else if ((config->flags & VIA_UDMA) < VIA_UDMA_100) 180 return ATA_CBL_PATA_UNK; 181 /* UDMA 100 or later */ 182 pci_read_config_dword(pdev, 0x50, &ata66); 183 /* Check both the drive cable reporting bits, we might not have 184 two drives */ 185 if (ata66 & (0x10100000 >> (16 * ap->port_no))) 186 return ATA_CBL_PATA80; 187 /* Check with ACPI so we can spot BIOS reported SATA bridges */ 188 if (ata_acpi_init_gtm(ap) && 189 ata_acpi_cbl_80wire(ap, ata_acpi_init_gtm(ap))) 190 return ATA_CBL_PATA80; 191 return ATA_CBL_PATA40; 192 } 193 194 static int via_pre_reset(struct ata_link *link, unsigned long deadline) 195 { 196 struct ata_port *ap = link->ap; 197 const struct via_isa_bridge *config = ap->host->private_data; 198 199 if (!(config->flags & VIA_NO_ENABLES)) { 200 static const struct pci_bits via_enable_bits[] = { 201 { 0x40, 1, 0x02, 0x02 }, 202 { 0x40, 1, 0x01, 0x01 } 203 }; 204 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 205 if (!pci_test_config_bits(pdev, &via_enable_bits[ap->port_no])) 206 return -ENOENT; 207 } 208 209 return ata_std_prereset(link, deadline); 210 } 211 212 213 /** 214 * via_error_handler - reset for VIA chips 215 * @ap: ATA port 216 * 217 * Handle the reset callback for the later chips with cable detect 218 */ 219 220 static void via_error_handler(struct ata_port *ap) 221 { 222 ata_bmdma_drive_eh(ap, via_pre_reset, ata_std_softreset, NULL, ata_std_postreset); 223 } 224 225 /** 226 * via_do_set_mode - set initial PIO mode data 227 * @ap: ATA interface 228 * @adev: ATA device 229 * @mode: ATA mode being programmed 230 * @tdiv: Clocks per PCI clock 231 * @set_ast: Set to program address setup 232 * @udma_type: UDMA mode/format of registers 233 * 234 * Program the VIA registers for DMA and PIO modes. Uses the ata timing 235 * support in order to compute modes. 236 * 237 * FIXME: Hotplug will require we serialize multiple mode changes 238 * on the two channels. 239 */ 240 241 static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mode, int tdiv, int set_ast, int udma_type) 242 { 243 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 244 struct ata_device *peer = ata_dev_pair(adev); 245 struct ata_timing t, p; 246 static int via_clock = 33333; /* Bus clock in kHZ - ought to be tunable one day */ 247 unsigned long T = 1000000000 / via_clock; 248 unsigned long UT = T/tdiv; 249 int ut; 250 int offset = 3 - (2*ap->port_no) - adev->devno; 251 252 /* Calculate the timing values we require */ 253 ata_timing_compute(adev, mode, &t, T, UT); 254 255 /* We share 8bit timing so we must merge the constraints */ 256 if (peer) { 257 if (peer->pio_mode) { 258 ata_timing_compute(peer, peer->pio_mode, &p, T, UT); 259 ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT); 260 } 261 } 262 263 /* Address setup is programmable but breaks on UDMA133 setups */ 264 if (set_ast) { 265 u8 setup; /* 2 bits per drive */ 266 int shift = 2 * offset; 267 268 pci_read_config_byte(pdev, 0x4C, &setup); 269 setup &= ~(3 << shift); 270 setup |= FIT(t.setup, 1, 4) << shift; /* 1,4 or 1,4 - 1 FIXME */ 271 pci_write_config_byte(pdev, 0x4C, setup); 272 } 273 274 /* Load the PIO mode bits */ 275 pci_write_config_byte(pdev, 0x4F - ap->port_no, 276 ((FIT(t.act8b, 1, 16) - 1) << 4) | (FIT(t.rec8b, 1, 16) - 1)); 277 pci_write_config_byte(pdev, 0x48 + offset, 278 ((FIT(t.active, 1, 16) - 1) << 4) | (FIT(t.recover, 1, 16) - 1)); 279 280 /* Load the UDMA bits according to type */ 281 switch(udma_type) { 282 default: 283 /* BUG() ? */ 284 /* fall through */ 285 case 33: 286 ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 5) - 2)) : 0x03; 287 break; 288 case 66: 289 ut = t.udma ? (0xe8 | (FIT(t.udma, 2, 9) - 2)) : 0x0f; 290 break; 291 case 100: 292 ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 9) - 2)) : 0x07; 293 break; 294 case 133: 295 ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 9) - 2)) : 0x07; 296 break; 297 } 298 299 /* Set UDMA unless device is not UDMA capable */ 300 if (udma_type && t.udma) { 301 u8 cable80_status; 302 303 /* Get 80-wire cable detection bit */ 304 pci_read_config_byte(pdev, 0x50 + offset, &cable80_status); 305 cable80_status &= 0x10; 306 307 pci_write_config_byte(pdev, 0x50 + offset, ut | cable80_status); 308 } 309 } 310 311 static void via_set_piomode(struct ata_port *ap, struct ata_device *adev) 312 { 313 const struct via_isa_bridge *config = ap->host->private_data; 314 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1; 315 int mode = config->flags & VIA_UDMA; 316 static u8 tclock[5] = { 1, 1, 2, 3, 4 }; 317 static u8 udma[5] = { 0, 33, 66, 100, 133 }; 318 319 via_do_set_mode(ap, adev, adev->pio_mode, tclock[mode], set_ast, udma[mode]); 320 } 321 322 static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev) 323 { 324 const struct via_isa_bridge *config = ap->host->private_data; 325 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1; 326 int mode = config->flags & VIA_UDMA; 327 static u8 tclock[5] = { 1, 1, 2, 3, 4 }; 328 static u8 udma[5] = { 0, 33, 66, 100, 133 }; 329 330 via_do_set_mode(ap, adev, adev->dma_mode, tclock[mode], set_ast, udma[mode]); 331 } 332 333 static struct scsi_host_template via_sht = { 334 .module = THIS_MODULE, 335 .name = DRV_NAME, 336 .ioctl = ata_scsi_ioctl, 337 .queuecommand = ata_scsi_queuecmd, 338 .can_queue = ATA_DEF_QUEUE, 339 .this_id = ATA_SHT_THIS_ID, 340 .sg_tablesize = LIBATA_MAX_PRD, 341 .cmd_per_lun = ATA_SHT_CMD_PER_LUN, 342 .emulated = ATA_SHT_EMULATED, 343 .use_clustering = ATA_SHT_USE_CLUSTERING, 344 .proc_name = DRV_NAME, 345 .dma_boundary = ATA_DMA_BOUNDARY, 346 .slave_configure = ata_scsi_slave_config, 347 .slave_destroy = ata_scsi_slave_destroy, 348 .bios_param = ata_std_bios_param, 349 }; 350 351 static struct ata_port_operations via_port_ops = { 352 .set_piomode = via_set_piomode, 353 .set_dmamode = via_set_dmamode, 354 .mode_filter = ata_pci_default_filter, 355 356 .tf_load = ata_tf_load, 357 .tf_read = ata_tf_read, 358 .check_status = ata_check_status, 359 .exec_command = ata_exec_command, 360 .dev_select = ata_std_dev_select, 361 362 .freeze = ata_bmdma_freeze, 363 .thaw = ata_bmdma_thaw, 364 .error_handler = via_error_handler, 365 .post_internal_cmd = ata_bmdma_post_internal_cmd, 366 .cable_detect = via_cable_detect, 367 368 .bmdma_setup = ata_bmdma_setup, 369 .bmdma_start = ata_bmdma_start, 370 .bmdma_stop = ata_bmdma_stop, 371 .bmdma_status = ata_bmdma_status, 372 373 .qc_prep = ata_qc_prep, 374 .qc_issue = ata_qc_issue_prot, 375 376 .data_xfer = ata_data_xfer, 377 378 .irq_handler = ata_interrupt, 379 .irq_clear = ata_bmdma_irq_clear, 380 .irq_on = ata_irq_on, 381 382 .port_start = ata_sff_port_start, 383 }; 384 385 static struct ata_port_operations via_port_ops_noirq = { 386 .set_piomode = via_set_piomode, 387 .set_dmamode = via_set_dmamode, 388 .mode_filter = ata_pci_default_filter, 389 390 .tf_load = ata_tf_load, 391 .tf_read = ata_tf_read, 392 .check_status = ata_check_status, 393 .exec_command = ata_exec_command, 394 .dev_select = ata_std_dev_select, 395 396 .freeze = ata_bmdma_freeze, 397 .thaw = ata_bmdma_thaw, 398 .error_handler = via_error_handler, 399 .post_internal_cmd = ata_bmdma_post_internal_cmd, 400 .cable_detect = via_cable_detect, 401 402 .bmdma_setup = ata_bmdma_setup, 403 .bmdma_start = ata_bmdma_start, 404 .bmdma_stop = ata_bmdma_stop, 405 .bmdma_status = ata_bmdma_status, 406 407 .qc_prep = ata_qc_prep, 408 .qc_issue = ata_qc_issue_prot, 409 410 .data_xfer = ata_data_xfer_noirq, 411 412 .irq_handler = ata_interrupt, 413 .irq_clear = ata_bmdma_irq_clear, 414 .irq_on = ata_irq_on, 415 416 .port_start = ata_sff_port_start, 417 }; 418 419 /** 420 * via_config_fifo - set up the FIFO 421 * @pdev: PCI device 422 * @flags: configuration flags 423 * 424 * Set the FIFO properties for this device if necessary. Used both on 425 * set up and on and the resume path 426 */ 427 428 static void via_config_fifo(struct pci_dev *pdev, unsigned int flags) 429 { 430 u8 enable; 431 432 /* 0x40 low bits indicate enabled channels */ 433 pci_read_config_byte(pdev, 0x40 , &enable); 434 enable &= 3; 435 436 if (flags & VIA_SET_FIFO) { 437 static const u8 fifo_setting[4] = {0x00, 0x60, 0x00, 0x20}; 438 u8 fifo; 439 440 pci_read_config_byte(pdev, 0x43, &fifo); 441 442 /* Clear PREQ# until DDACK# for errata */ 443 if (flags & VIA_BAD_PREQ) 444 fifo &= 0x7F; 445 else 446 fifo &= 0x9f; 447 /* Turn on FIFO for enabled channels */ 448 fifo |= fifo_setting[enable]; 449 pci_write_config_byte(pdev, 0x43, fifo); 450 } 451 } 452 453 /** 454 * via_init_one - discovery callback 455 * @pdev: PCI device 456 * @id: PCI table info 457 * 458 * A VIA IDE interface has been discovered. Figure out what revision 459 * and perform configuration work before handing it to the ATA layer 460 */ 461 462 static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) 463 { 464 /* Early VIA without UDMA support */ 465 static const struct ata_port_info via_mwdma_info = { 466 .sht = &via_sht, 467 .flags = ATA_FLAG_SLAVE_POSS, 468 .pio_mask = 0x1f, 469 .mwdma_mask = 0x07, 470 .port_ops = &via_port_ops 471 }; 472 /* Ditto with IRQ masking required */ 473 static const struct ata_port_info via_mwdma_info_borked = { 474 .sht = &via_sht, 475 .flags = ATA_FLAG_SLAVE_POSS, 476 .pio_mask = 0x1f, 477 .mwdma_mask = 0x07, 478 .port_ops = &via_port_ops_noirq, 479 }; 480 /* VIA UDMA 33 devices (and borked 66) */ 481 static const struct ata_port_info via_udma33_info = { 482 .sht = &via_sht, 483 .flags = ATA_FLAG_SLAVE_POSS, 484 .pio_mask = 0x1f, 485 .mwdma_mask = 0x07, 486 .udma_mask = ATA_UDMA2, 487 .port_ops = &via_port_ops 488 }; 489 /* VIA UDMA 66 devices */ 490 static const struct ata_port_info via_udma66_info = { 491 .sht = &via_sht, 492 .flags = ATA_FLAG_SLAVE_POSS, 493 .pio_mask = 0x1f, 494 .mwdma_mask = 0x07, 495 .udma_mask = ATA_UDMA4, 496 .port_ops = &via_port_ops 497 }; 498 /* VIA UDMA 100 devices */ 499 static const struct ata_port_info via_udma100_info = { 500 .sht = &via_sht, 501 .flags = ATA_FLAG_SLAVE_POSS, 502 .pio_mask = 0x1f, 503 .mwdma_mask = 0x07, 504 .udma_mask = ATA_UDMA5, 505 .port_ops = &via_port_ops 506 }; 507 /* UDMA133 with bad AST (All current 133) */ 508 static const struct ata_port_info via_udma133_info = { 509 .sht = &via_sht, 510 .flags = ATA_FLAG_SLAVE_POSS, 511 .pio_mask = 0x1f, 512 .mwdma_mask = 0x07, 513 .udma_mask = ATA_UDMA6, /* FIXME: should check north bridge */ 514 .port_ops = &via_port_ops 515 }; 516 struct ata_port_info type; 517 const struct ata_port_info *ppi[] = { &type, NULL }; 518 struct pci_dev *isa = NULL; 519 const struct via_isa_bridge *config; 520 static int printed_version; 521 u8 enable; 522 u32 timing; 523 524 if (!printed_version++) 525 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); 526 527 /* To find out how the IDE will behave and what features we 528 actually have to look at the bridge not the IDE controller */ 529 for (config = via_isa_bridges; config->id; config++) 530 if ((isa = pci_get_device(PCI_VENDOR_ID_VIA + 531 !!(config->flags & VIA_BAD_ID), 532 config->id, NULL))) { 533 534 if (isa->revision >= config->rev_min && 535 isa->revision <= config->rev_max) 536 break; 537 pci_dev_put(isa); 538 } 539 540 if (!config->id) { 541 printk(KERN_WARNING "via: Unknown VIA SouthBridge, disabling.\n"); 542 return -ENODEV; 543 } 544 pci_dev_put(isa); 545 546 /* 0x40 low bits indicate enabled channels */ 547 pci_read_config_byte(pdev, 0x40 , &enable); 548 enable &= 3; 549 if (enable == 0) { 550 return -ENODEV; 551 } 552 553 /* Initialise the FIFO for the enabled channels. */ 554 via_config_fifo(pdev, config->flags); 555 556 /* Clock set up */ 557 switch(config->flags & VIA_UDMA) { 558 case VIA_UDMA_NONE: 559 if (config->flags & VIA_NO_UNMASK) 560 type = via_mwdma_info_borked; 561 else 562 type = via_mwdma_info; 563 break; 564 case VIA_UDMA_33: 565 type = via_udma33_info; 566 break; 567 case VIA_UDMA_66: 568 type = via_udma66_info; 569 /* The 66 MHz devices require we enable the clock */ 570 pci_read_config_dword(pdev, 0x50, &timing); 571 timing |= 0x80008; 572 pci_write_config_dword(pdev, 0x50, timing); 573 break; 574 case VIA_UDMA_100: 575 type = via_udma100_info; 576 break; 577 case VIA_UDMA_133: 578 type = via_udma133_info; 579 break; 580 default: 581 WARN_ON(1); 582 return -ENODEV; 583 } 584 585 if (config->flags & VIA_BAD_CLK66) { 586 /* Disable the 66MHz clock on problem devices */ 587 pci_read_config_dword(pdev, 0x50, &timing); 588 timing &= ~0x80008; 589 pci_write_config_dword(pdev, 0x50, timing); 590 } 591 592 /* We have established the device type, now fire it up */ 593 type.private_data = (void *)config; 594 595 return ata_pci_init_one(pdev, ppi); 596 } 597 598 #ifdef CONFIG_PM 599 /** 600 * via_reinit_one - reinit after resume 601 * @pdev; PCI device 602 * 603 * Called when the VIA PATA device is resumed. We must then 604 * reconfigure the fifo and other setup we may have altered. In 605 * addition the kernel needs to have the resume methods on PCI 606 * quirk supported. 607 */ 608 609 static int via_reinit_one(struct pci_dev *pdev) 610 { 611 u32 timing; 612 struct ata_host *host = dev_get_drvdata(&pdev->dev); 613 const struct via_isa_bridge *config = host->private_data; 614 615 via_config_fifo(pdev, config->flags); 616 617 if ((config->flags & VIA_UDMA) == VIA_UDMA_66) { 618 /* The 66 MHz devices require we enable the clock */ 619 pci_read_config_dword(pdev, 0x50, &timing); 620 timing |= 0x80008; 621 pci_write_config_dword(pdev, 0x50, timing); 622 } 623 if (config->flags & VIA_BAD_CLK66) { 624 /* Disable the 66MHz clock on problem devices */ 625 pci_read_config_dword(pdev, 0x50, &timing); 626 timing &= ~0x80008; 627 pci_write_config_dword(pdev, 0x50, timing); 628 } 629 return ata_pci_device_resume(pdev); 630 } 631 #endif 632 633 static const struct pci_device_id via[] = { 634 { PCI_VDEVICE(VIA, 0x0571), }, 635 { PCI_VDEVICE(VIA, 0x0581), }, 636 { PCI_VDEVICE(VIA, 0x1571), }, 637 { PCI_VDEVICE(VIA, 0x3164), }, 638 { PCI_VDEVICE(VIA, 0x5324), }, 639 640 { }, 641 }; 642 643 static struct pci_driver via_pci_driver = { 644 .name = DRV_NAME, 645 .id_table = via, 646 .probe = via_init_one, 647 .remove = ata_pci_remove_one, 648 #ifdef CONFIG_PM 649 .suspend = ata_pci_device_suspend, 650 .resume = via_reinit_one, 651 #endif 652 }; 653 654 static int __init via_init(void) 655 { 656 return pci_register_driver(&via_pci_driver); 657 } 658 659 static void __exit via_exit(void) 660 { 661 pci_unregister_driver(&via_pci_driver); 662 } 663 664 MODULE_AUTHOR("Alan Cox"); 665 MODULE_DESCRIPTION("low-level driver for VIA PATA"); 666 MODULE_LICENSE("GPL"); 667 MODULE_DEVICE_TABLE(pci, via); 668 MODULE_VERSION(DRV_VERSION); 669 670 module_init(via_init); 671 module_exit(via_exit); 672