1 /* 2 * pata_sil680.c - SIL680 PATA for new ATA layer 3 * (C) 2005 Red Hat Inc 4 * Alan Cox <alan@redhat.com> 5 * 6 * based upon 7 * 8 * linux/drivers/ide/pci/siimage.c Version 1.07 Nov 30, 2003 9 * 10 * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org> 11 * Copyright (C) 2003 Red Hat <alan@redhat.com> 12 * 13 * May be copied or modified under the terms of the GNU General Public License 14 * 15 * Documentation publically available. 16 * 17 * If you have strange problems with nVidia chipset systems please 18 * see the SI support documentation and update your system BIOS 19 * if neccessary 20 * 21 * TODO 22 * If we know all our devices are LBA28 (or LBA28 sized) we could use 23 * the command fifo mode. 24 */ 25 26 #include <linux/kernel.h> 27 #include <linux/module.h> 28 #include <linux/pci.h> 29 #include <linux/init.h> 30 #include <linux/blkdev.h> 31 #include <linux/delay.h> 32 #include <scsi/scsi_host.h> 33 #include <linux/libata.h> 34 35 #define DRV_NAME "pata_sil680" 36 #define DRV_VERSION "0.4.5" 37 38 /** 39 * sil680_selreg - return register base 40 * @hwif: interface 41 * @r: config offset 42 * 43 * Turn a config register offset into the right address in either 44 * PCI space or MMIO space to access the control register in question 45 * Thankfully this is a configuration operation so isnt performance 46 * criticial. 47 */ 48 49 static unsigned long sil680_selreg(struct ata_port *ap, int r) 50 { 51 unsigned long base = 0xA0 + r; 52 base += (ap->port_no << 4); 53 return base; 54 } 55 56 /** 57 * sil680_seldev - return register base 58 * @hwif: interface 59 * @r: config offset 60 * 61 * Turn a config register offset into the right address in either 62 * PCI space or MMIO space to access the control register in question 63 * including accounting for the unit shift. 64 */ 65 66 static unsigned long sil680_seldev(struct ata_port *ap, struct ata_device *adev, int r) 67 { 68 unsigned long base = 0xA0 + r; 69 base += (ap->port_no << 4); 70 base |= adev->devno ? 2 : 0; 71 return base; 72 } 73 74 75 /** 76 * sil680_cable_detect - cable detection 77 * @ap: ATA port 78 * 79 * Perform cable detection. The SIL680 stores this in PCI config 80 * space for us. 81 */ 82 83 static int sil680_cable_detect(struct ata_port *ap) { 84 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 85 unsigned long addr = sil680_selreg(ap, 0); 86 u8 ata66; 87 pci_read_config_byte(pdev, addr, &ata66); 88 if (ata66 & 1) 89 return ATA_CBL_PATA80; 90 else 91 return ATA_CBL_PATA40; 92 } 93 94 static int sil680_pre_reset(struct ata_port *ap) 95 { 96 ap->cbl = sil680_cable_detect(ap); 97 return ata_std_prereset(ap); 98 } 99 100 /** 101 * sil680_bus_reset - reset the SIL680 bus 102 * @ap: ATA port to reset 103 * 104 * Perform the SIL680 housekeeping when doing an ATA bus reset 105 */ 106 107 static int sil680_bus_reset(struct ata_port *ap,unsigned int *classes) 108 { 109 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 110 unsigned long addr = sil680_selreg(ap, 0); 111 u8 reset; 112 113 pci_read_config_byte(pdev, addr, &reset); 114 pci_write_config_byte(pdev, addr, reset | 0x03); 115 udelay(25); 116 pci_write_config_byte(pdev, addr, reset); 117 return ata_std_softreset(ap, classes); 118 } 119 120 static void sil680_error_handler(struct ata_port *ap) 121 { 122 ata_bmdma_drive_eh(ap, sil680_pre_reset, sil680_bus_reset, NULL, ata_std_postreset); 123 } 124 125 /** 126 * sil680_set_piomode - set initial PIO mode data 127 * @ap: ATA interface 128 * @adev: ATA device 129 * 130 * Program the SIL680 registers for PIO mode. Note that the task speed 131 * registers are shared between the devices so we must pick the lowest 132 * mode for command work. 133 */ 134 135 static void sil680_set_piomode(struct ata_port *ap, struct ata_device *adev) 136 { 137 static u16 speed_p[5] = { 0x328A, 0x2283, 0x1104, 0x10C3, 0x10C1 }; 138 static u16 speed_t[5] = { 0x328A, 0x2283, 0x1281, 0x10C3, 0x10C1 }; 139 140 unsigned long tfaddr = sil680_selreg(ap, 0x02); 141 unsigned long addr = sil680_seldev(ap, adev, 0x04); 142 unsigned long addr_mask = 0x80 + 4 * ap->port_no; 143 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 144 int pio = adev->pio_mode - XFER_PIO_0; 145 int lowest_pio = pio; 146 int port_shift = 4 * adev->devno; 147 u16 reg; 148 u8 mode; 149 150 struct ata_device *pair = ata_dev_pair(adev); 151 152 if (pair != NULL && adev->pio_mode > pair->pio_mode) 153 lowest_pio = pair->pio_mode - XFER_PIO_0; 154 155 pci_write_config_word(pdev, addr, speed_p[pio]); 156 pci_write_config_word(pdev, tfaddr, speed_t[lowest_pio]); 157 158 pci_read_config_word(pdev, tfaddr-2, ®); 159 pci_read_config_byte(pdev, addr_mask, &mode); 160 161 reg &= ~0x0200; /* Clear IORDY */ 162 mode &= ~(3 << port_shift); /* Clear IORDY and DMA bits */ 163 164 if (ata_pio_need_iordy(adev)) { 165 reg |= 0x0200; /* Enable IORDY */ 166 mode |= 1 << port_shift; 167 } 168 pci_write_config_word(pdev, tfaddr-2, reg); 169 pci_write_config_byte(pdev, addr_mask, mode); 170 } 171 172 /** 173 * sil680_set_dmamode - set initial DMA mode data 174 * @ap: ATA interface 175 * @adev: ATA device 176 * 177 * Program the MWDMA/UDMA modes for the sil680 k 178 * chipset. The MWDMA mode values are pulled from a lookup table 179 * while the chipset uses mode number for UDMA. 180 */ 181 182 static void sil680_set_dmamode(struct ata_port *ap, struct ata_device *adev) 183 { 184 static u8 ultra_table[2][7] = { 185 { 0x0C, 0x07, 0x05, 0x04, 0x02, 0x01, 0xFF }, /* 100MHz */ 186 { 0x0F, 0x0B, 0x07, 0x05, 0x03, 0x02, 0x01 }, /* 133Mhz */ 187 }; 188 static u16 dma_table[3] = { 0x2208, 0x10C2, 0x10C1 }; 189 190 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 191 unsigned long ma = sil680_seldev(ap, adev, 0x08); 192 unsigned long ua = sil680_seldev(ap, adev, 0x0C); 193 unsigned long addr_mask = 0x80 + 4 * ap->port_no; 194 int port_shift = adev->devno * 4; 195 u8 scsc, mode; 196 u16 multi, ultra; 197 198 pci_read_config_byte(pdev, 0x8A, &scsc); 199 pci_read_config_byte(pdev, addr_mask, &mode); 200 pci_read_config_word(pdev, ma, &multi); 201 pci_read_config_word(pdev, ua, &ultra); 202 203 /* Mask timing bits */ 204 ultra &= ~0x3F; 205 mode &= ~(0x03 << port_shift); 206 207 /* Extract scsc */ 208 scsc = (scsc & 0x30) ? 1: 0; 209 210 if (adev->dma_mode >= XFER_UDMA_0) { 211 multi = 0x10C1; 212 ultra |= ultra_table[scsc][adev->dma_mode - XFER_UDMA_0]; 213 mode |= (0x03 << port_shift); 214 } else { 215 multi = dma_table[adev->dma_mode - XFER_MW_DMA_0]; 216 mode |= (0x02 << port_shift); 217 } 218 pci_write_config_byte(pdev, addr_mask, mode); 219 pci_write_config_word(pdev, ma, multi); 220 pci_write_config_word(pdev, ua, ultra); 221 } 222 223 static struct scsi_host_template sil680_sht = { 224 .module = THIS_MODULE, 225 .name = DRV_NAME, 226 .ioctl = ata_scsi_ioctl, 227 .queuecommand = ata_scsi_queuecmd, 228 .can_queue = ATA_DEF_QUEUE, 229 .this_id = ATA_SHT_THIS_ID, 230 .sg_tablesize = LIBATA_MAX_PRD, 231 .cmd_per_lun = ATA_SHT_CMD_PER_LUN, 232 .emulated = ATA_SHT_EMULATED, 233 .use_clustering = ATA_SHT_USE_CLUSTERING, 234 .proc_name = DRV_NAME, 235 .dma_boundary = ATA_DMA_BOUNDARY, 236 .slave_configure = ata_scsi_slave_config, 237 .slave_destroy = ata_scsi_slave_destroy, 238 .bios_param = ata_std_bios_param, 239 #ifdef CONFIG_PM 240 .suspend = ata_scsi_device_suspend, 241 .resume = ata_scsi_device_resume, 242 #endif 243 }; 244 245 static struct ata_port_operations sil680_port_ops = { 246 .port_disable = ata_port_disable, 247 .set_piomode = sil680_set_piomode, 248 .set_dmamode = sil680_set_dmamode, 249 .mode_filter = ata_pci_default_filter, 250 .tf_load = ata_tf_load, 251 .tf_read = ata_tf_read, 252 .check_status = ata_check_status, 253 .exec_command = ata_exec_command, 254 .dev_select = ata_std_dev_select, 255 256 .freeze = ata_bmdma_freeze, 257 .thaw = ata_bmdma_thaw, 258 .error_handler = sil680_error_handler, 259 .post_internal_cmd = ata_bmdma_post_internal_cmd, 260 261 .bmdma_setup = ata_bmdma_setup, 262 .bmdma_start = ata_bmdma_start, 263 .bmdma_stop = ata_bmdma_stop, 264 .bmdma_status = ata_bmdma_status, 265 266 .qc_prep = ata_qc_prep, 267 .qc_issue = ata_qc_issue_prot, 268 269 .data_xfer = ata_data_xfer, 270 271 .irq_handler = ata_interrupt, 272 .irq_clear = ata_bmdma_irq_clear, 273 .irq_on = ata_irq_on, 274 .irq_ack = ata_irq_ack, 275 276 .port_start = ata_port_start, 277 }; 278 279 /** 280 * sil680_init_chip - chip setup 281 * @pdev: PCI device 282 * 283 * Perform all the chip setup which must be done both when the device 284 * is powered up on boot and when we resume in case we resumed from RAM. 285 * Returns the final clock settings. 286 */ 287 288 static u8 sil680_init_chip(struct pci_dev *pdev) 289 { 290 u32 class_rev = 0; 291 u8 tmpbyte = 0; 292 293 pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class_rev); 294 class_rev &= 0xff; 295 /* FIXME: double check */ 296 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, (class_rev) ? 1 : 255); 297 298 pci_write_config_byte(pdev, 0x80, 0x00); 299 pci_write_config_byte(pdev, 0x84, 0x00); 300 301 pci_read_config_byte(pdev, 0x8A, &tmpbyte); 302 303 printk(KERN_INFO "sil680: BA5_EN = %d clock = %02X\n", 304 tmpbyte & 1, tmpbyte & 0x30); 305 306 switch(tmpbyte & 0x30) { 307 case 0x00: 308 /* 133 clock attempt to force it on */ 309 pci_write_config_byte(pdev, 0x8A, tmpbyte|0x10); 310 break; 311 case 0x30: 312 /* if clocking is disabled */ 313 /* 133 clock attempt to force it on */ 314 pci_write_config_byte(pdev, 0x8A, tmpbyte & ~0x20); 315 break; 316 case 0x10: 317 /* 133 already */ 318 break; 319 case 0x20: 320 /* BIOS set PCI x2 clocking */ 321 break; 322 } 323 324 pci_read_config_byte(pdev, 0x8A, &tmpbyte); 325 printk(KERN_INFO "sil680: BA5_EN = %d clock = %02X\n", 326 tmpbyte & 1, tmpbyte & 0x30); 327 328 pci_write_config_byte(pdev, 0xA1, 0x72); 329 pci_write_config_word(pdev, 0xA2, 0x328A); 330 pci_write_config_dword(pdev, 0xA4, 0x62DD62DD); 331 pci_write_config_dword(pdev, 0xA8, 0x43924392); 332 pci_write_config_dword(pdev, 0xAC, 0x40094009); 333 pci_write_config_byte(pdev, 0xB1, 0x72); 334 pci_write_config_word(pdev, 0xB2, 0x328A); 335 pci_write_config_dword(pdev, 0xB4, 0x62DD62DD); 336 pci_write_config_dword(pdev, 0xB8, 0x43924392); 337 pci_write_config_dword(pdev, 0xBC, 0x40094009); 338 339 switch(tmpbyte & 0x30) { 340 case 0x00: printk(KERN_INFO "sil680: 100MHz clock.\n");break; 341 case 0x10: printk(KERN_INFO "sil680: 133MHz clock.\n");break; 342 case 0x20: printk(KERN_INFO "sil680: Using PCI clock.\n");break; 343 /* This last case is _NOT_ ok */ 344 case 0x30: printk(KERN_ERR "sil680: Clock disabled ?\n"); 345 } 346 return tmpbyte & 0x30; 347 } 348 349 static int sil680_init_one(struct pci_dev *pdev, const struct pci_device_id *id) 350 { 351 static struct ata_port_info info = { 352 .sht = &sil680_sht, 353 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 354 .pio_mask = 0x1f, 355 .mwdma_mask = 0x07, 356 .udma_mask = 0x7f, 357 .port_ops = &sil680_port_ops 358 }; 359 static struct ata_port_info info_slow = { 360 .sht = &sil680_sht, 361 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 362 .pio_mask = 0x1f, 363 .mwdma_mask = 0x07, 364 .udma_mask = 0x3f, 365 .port_ops = &sil680_port_ops 366 }; 367 static struct ata_port_info *port_info[2] = {&info, &info}; 368 static int printed_version; 369 370 if (!printed_version++) 371 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); 372 373 switch(sil680_init_chip(pdev)) 374 { 375 case 0: 376 port_info[0] = port_info[1] = &info_slow; 377 break; 378 case 0x30: 379 return -ENODEV; 380 } 381 return ata_pci_init_one(pdev, port_info, 2); 382 } 383 384 #ifdef CONFIG_PM 385 static int sil680_reinit_one(struct pci_dev *pdev) 386 { 387 sil680_init_chip(pdev); 388 return ata_pci_device_resume(pdev); 389 } 390 #endif 391 392 static const struct pci_device_id sil680[] = { 393 { PCI_VDEVICE(CMD, PCI_DEVICE_ID_SII_680), }, 394 395 { }, 396 }; 397 398 static struct pci_driver sil680_pci_driver = { 399 .name = DRV_NAME, 400 .id_table = sil680, 401 .probe = sil680_init_one, 402 .remove = ata_pci_remove_one, 403 #ifdef CONFIG_PM 404 .suspend = ata_pci_device_suspend, 405 .resume = sil680_reinit_one, 406 #endif 407 }; 408 409 static int __init sil680_init(void) 410 { 411 return pci_register_driver(&sil680_pci_driver); 412 } 413 414 static void __exit sil680_exit(void) 415 { 416 pci_unregister_driver(&sil680_pci_driver); 417 } 418 419 MODULE_AUTHOR("Alan Cox"); 420 MODULE_DESCRIPTION("low-level driver for SI680 PATA"); 421 MODULE_LICENSE("GPL"); 422 MODULE_DEVICE_TABLE(pci, sil680); 423 MODULE_VERSION(DRV_VERSION); 424 425 module_init(sil680_init); 426 module_exit(sil680_exit); 427