1 /* 2 * pata_it8213.c - iTE Tech. Inc. IT8213 PATA driver 3 * 4 * The IT8213 is a very Intel ICH like device for timing purposes, having 5 * a similar register layout and the same split clock arrangement. Cable 6 * detection is different, and it does not have slave channels or all the 7 * clutter of later ICH/SATA setups. 8 */ 9 10 #include <linux/kernel.h> 11 #include <linux/module.h> 12 #include <linux/pci.h> 13 #include <linux/init.h> 14 #include <linux/blkdev.h> 15 #include <linux/delay.h> 16 #include <linux/device.h> 17 #include <scsi/scsi_host.h> 18 #include <linux/libata.h> 19 #include <linux/ata.h> 20 21 #define DRV_NAME "pata_it8213" 22 #define DRV_VERSION "0.0.2" 23 24 /** 25 * it8213_pre_reset - check for 40/80 pin 26 * @ap: Port 27 * 28 * Perform cable detection for the 8213 ATA interface. This is 29 * different to the PIIX arrangement 30 */ 31 32 static int it8213_pre_reset(struct ata_port *ap) 33 { 34 static const struct pci_bits it8213_enable_bits[] = { 35 { 0x41U, 1U, 0x80UL, 0x80UL }, /* port 0 */ 36 }; 37 38 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 39 u8 tmp; 40 41 if (!pci_test_config_bits(pdev, &it8213_enable_bits[ap->port_no])) 42 return -ENOENT; 43 44 pci_read_config_byte(pdev, 0x42, &tmp); 45 if (tmp & 2) /* The initial docs are incorrect */ 46 ap->cbl = ATA_CBL_PATA40; 47 else 48 ap->cbl = ATA_CBL_PATA80; 49 return ata_std_prereset(ap); 50 } 51 52 /** 53 * it8213_probe_reset - Probe specified port on PATA host controller 54 * @ap: Port to probe 55 * 56 * LOCKING: 57 * None (inherited from caller). 58 */ 59 60 static void it8213_error_handler(struct ata_port *ap) 61 { 62 ata_bmdma_drive_eh(ap, it8213_pre_reset, ata_std_softreset, NULL, ata_std_postreset); 63 } 64 65 /** 66 * it8213_set_piomode - Initialize host controller PATA PIO timings 67 * @ap: Port whose timings we are configuring 68 * @adev: um 69 * 70 * Set PIO mode for device, in host controller PCI config space. 71 * 72 * LOCKING: 73 * None (inherited from caller). 74 */ 75 76 static void it8213_set_piomode (struct ata_port *ap, struct ata_device *adev) 77 { 78 unsigned int pio = adev->pio_mode - XFER_PIO_0; 79 struct pci_dev *dev = to_pci_dev(ap->host->dev); 80 unsigned int idetm_port= ap->port_no ? 0x42 : 0x40; 81 u16 idetm_data; 82 int control = 0; 83 84 /* 85 * See Intel Document 298600-004 for the timing programing rules 86 * for PIIX/ICH. The 8213 is a clone so very similar 87 */ 88 89 static const /* ISP RTC */ 90 u8 timings[][2] = { { 0, 0 }, 91 { 0, 0 }, 92 { 1, 0 }, 93 { 2, 1 }, 94 { 2, 3 }, }; 95 96 if (pio > 2) 97 control |= 1; /* TIME1 enable */ 98 if (ata_pio_need_iordy(adev)) /* PIO 3/4 require IORDY */ 99 control |= 2; /* IORDY enable */ 100 /* Bit 2 is set for ATAPI on the IT8213 - reverse of ICH/PIIX */ 101 if (adev->class != ATA_DEV_ATA) 102 control |= 4; 103 104 pci_read_config_word(dev, idetm_port, &idetm_data); 105 106 /* Enable PPE, IE and TIME as appropriate */ 107 108 if (adev->devno == 0) { 109 idetm_data &= 0xCCF0; 110 idetm_data |= control; 111 idetm_data |= (timings[pio][0] << 12) | 112 (timings[pio][1] << 8); 113 } else { 114 u8 slave_data; 115 116 idetm_data &= 0xCC0F; 117 idetm_data |= (control << 4); 118 119 /* Slave timing in seperate register */ 120 pci_read_config_byte(dev, 0x44, &slave_data); 121 slave_data &= 0xF0; 122 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << 4; 123 pci_write_config_byte(dev, 0x44, slave_data); 124 } 125 126 idetm_data |= 0x4000; /* Ensure SITRE is enabled */ 127 pci_write_config_word(dev, idetm_port, idetm_data); 128 } 129 130 /** 131 * it8213_set_dmamode - Initialize host controller PATA DMA timings 132 * @ap: Port whose timings we are configuring 133 * @adev: Device to program 134 * 135 * Set UDMA/MWDMA mode for device, in host controller PCI config space. 136 * This device is basically an ICH alike. 137 * 138 * LOCKING: 139 * None (inherited from caller). 140 */ 141 142 static void it8213_set_dmamode (struct ata_port *ap, struct ata_device *adev) 143 { 144 struct pci_dev *dev = to_pci_dev(ap->host->dev); 145 u16 master_data; 146 u8 speed = adev->dma_mode; 147 int devid = adev->devno; 148 u8 udma_enable; 149 150 static const /* ISP RTC */ 151 u8 timings[][2] = { { 0, 0 }, 152 { 0, 0 }, 153 { 1, 0 }, 154 { 2, 1 }, 155 { 2, 3 }, }; 156 157 pci_read_config_word(dev, 0x40, &master_data); 158 pci_read_config_byte(dev, 0x48, &udma_enable); 159 160 if (speed >= XFER_UDMA_0) { 161 unsigned int udma = adev->dma_mode - XFER_UDMA_0; 162 u16 udma_timing; 163 u16 ideconf; 164 int u_clock, u_speed; 165 166 /* Clocks follow the PIIX style */ 167 u_speed = min(2 - (udma & 1), udma); 168 if (udma == 5) 169 u_clock = 0x1000; /* 100Mhz */ 170 else if (udma > 2) 171 u_clock = 1; /* 66Mhz */ 172 else 173 u_clock = 0; /* 33Mhz */ 174 175 udma_enable |= (1 << devid); 176 177 /* Load the UDMA mode number */ 178 pci_read_config_word(dev, 0x4A, &udma_timing); 179 udma_timing &= ~(3 << (4 * devid)); 180 udma_timing |= (udma & 3) << (4 * devid); 181 pci_write_config_word(dev, 0x4A, udma_timing); 182 183 /* Load the clock selection */ 184 pci_read_config_word(dev, 0x54, &ideconf); 185 ideconf &= ~(0x1001 << devid); 186 ideconf |= u_clock << devid; 187 pci_write_config_word(dev, 0x54, ideconf); 188 } else { 189 /* 190 * MWDMA is driven by the PIO timings. We must also enable 191 * IORDY unconditionally along with TIME1. PPE has already 192 * been set when the PIO timing was set. 193 */ 194 unsigned int mwdma = adev->dma_mode - XFER_MW_DMA_0; 195 unsigned int control; 196 u8 slave_data; 197 static const unsigned int needed_pio[3] = { 198 XFER_PIO_0, XFER_PIO_3, XFER_PIO_4 199 }; 200 int pio = needed_pio[mwdma] - XFER_PIO_0; 201 202 control = 3; /* IORDY|TIME1 */ 203 204 /* If the drive MWDMA is faster than it can do PIO then 205 we must force PIO into PIO0 */ 206 207 if (adev->pio_mode < needed_pio[mwdma]) 208 /* Enable DMA timing only */ 209 control |= 8; /* PIO cycles in PIO0 */ 210 211 if (devid) { /* Slave */ 212 master_data &= 0xFF4F; /* Mask out IORDY|TIME1|DMAONLY */ 213 master_data |= control << 4; 214 pci_read_config_byte(dev, 0x44, &slave_data); 215 slave_data &= (0x0F + 0xE1 * ap->port_no); 216 /* Load the matching timing */ 217 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0); 218 pci_write_config_byte(dev, 0x44, slave_data); 219 } else { /* Master */ 220 master_data &= 0xCCF4; /* Mask out IORDY|TIME1|DMAONLY 221 and master timing bits */ 222 master_data |= control; 223 master_data |= 224 (timings[pio][0] << 12) | 225 (timings[pio][1] << 8); 226 } 227 udma_enable &= ~(1 << devid); 228 pci_write_config_word(dev, 0x40, master_data); 229 } 230 pci_write_config_byte(dev, 0x48, udma_enable); 231 } 232 233 static struct scsi_host_template it8213_sht = { 234 .module = THIS_MODULE, 235 .name = DRV_NAME, 236 .ioctl = ata_scsi_ioctl, 237 .queuecommand = ata_scsi_queuecmd, 238 .can_queue = ATA_DEF_QUEUE, 239 .this_id = ATA_SHT_THIS_ID, 240 .sg_tablesize = LIBATA_MAX_PRD, 241 .max_sectors = ATA_MAX_SECTORS, 242 .cmd_per_lun = ATA_SHT_CMD_PER_LUN, 243 .emulated = ATA_SHT_EMULATED, 244 .use_clustering = ATA_SHT_USE_CLUSTERING, 245 .proc_name = DRV_NAME, 246 .dma_boundary = ATA_DMA_BOUNDARY, 247 .slave_configure = ata_scsi_slave_config, 248 .bios_param = ata_std_bios_param, 249 #ifdef CONFIG_PM 250 .resume = ata_scsi_device_resume, 251 .suspend = ata_scsi_device_suspend, 252 #endif 253 }; 254 255 static const struct ata_port_operations it8213_ops = { 256 .port_disable = ata_port_disable, 257 .set_piomode = it8213_set_piomode, 258 .set_dmamode = it8213_set_dmamode, 259 .mode_filter = ata_pci_default_filter, 260 261 .tf_load = ata_tf_load, 262 .tf_read = ata_tf_read, 263 .check_status = ata_check_status, 264 .exec_command = ata_exec_command, 265 .dev_select = ata_std_dev_select, 266 267 .freeze = ata_bmdma_freeze, 268 .thaw = ata_bmdma_thaw, 269 .error_handler = it8213_error_handler, 270 .post_internal_cmd = ata_bmdma_post_internal_cmd, 271 272 .bmdma_setup = ata_bmdma_setup, 273 .bmdma_start = ata_bmdma_start, 274 .bmdma_stop = ata_bmdma_stop, 275 .bmdma_status = ata_bmdma_status, 276 .qc_prep = ata_qc_prep, 277 .qc_issue = ata_qc_issue_prot, 278 .data_xfer = ata_data_xfer, 279 280 .irq_handler = ata_interrupt, 281 .irq_clear = ata_bmdma_irq_clear, 282 .irq_on = ata_irq_on, 283 .irq_ack = ata_irq_ack, 284 285 .port_start = ata_port_start, 286 }; 287 288 289 /** 290 * it8213_init_one - Register 8213 ATA PCI device with kernel services 291 * @pdev: PCI device to register 292 * @ent: Entry in it8213_pci_tbl matching with @pdev 293 * 294 * Called from kernel PCI layer. 295 * 296 * LOCKING: 297 * Inherited from PCI layer (may sleep). 298 * 299 * RETURNS: 300 * Zero on success, or -ERRNO value. 301 */ 302 303 static int it8213_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) 304 { 305 static int printed_version; 306 static struct ata_port_info info = { 307 .sht = &it8213_sht, 308 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 309 .pio_mask = 0x1f, /* pio0-4 */ 310 .mwdma_mask = 0x07, /* mwdma0-2 */ 311 .udma_mask = 0x1f, /* UDMA 100 */ 312 .port_ops = &it8213_ops, 313 }; 314 static struct ata_port_info *port_info[2] = { &info, &info }; 315 316 if (!printed_version++) 317 dev_printk(KERN_DEBUG, &pdev->dev, 318 "version " DRV_VERSION "\n"); 319 320 /* Current IT8213 stuff is single port */ 321 return ata_pci_init_one(pdev, port_info, 1); 322 } 323 324 static const struct pci_device_id it8213_pci_tbl[] = { 325 { PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8213), }, 326 327 { } /* terminate list */ 328 }; 329 330 static struct pci_driver it8213_pci_driver = { 331 .name = DRV_NAME, 332 .id_table = it8213_pci_tbl, 333 .probe = it8213_init_one, 334 .remove = ata_pci_remove_one, 335 #ifdef CONFIG_PM 336 .suspend = ata_pci_device_suspend, 337 .resume = ata_pci_device_resume, 338 #endif 339 }; 340 341 static int __init it8213_init(void) 342 { 343 return pci_register_driver(&it8213_pci_driver); 344 } 345 346 static void __exit it8213_exit(void) 347 { 348 pci_unregister_driver(&it8213_pci_driver); 349 } 350 351 module_init(it8213_init); 352 module_exit(it8213_exit); 353 354 MODULE_AUTHOR("Alan Cox"); 355 MODULE_DESCRIPTION("SCSI low-level driver for the ITE 8213"); 356 MODULE_LICENSE("GPL"); 357 MODULE_DEVICE_TABLE(pci, it8213_pci_tbl); 358 MODULE_VERSION(DRV_VERSION); 359