1 /* 2 * Freescale iMX PATA driver 3 * 4 * Copyright (C) 2011 Arnaud Patard <arnaud.patard@rtp-net.org> 5 * 6 * Based on pata_platform - Copyright (C) 2006 - 2007 Paul Mundt 7 * 8 * This file is subject to the terms and conditions of the GNU General Public 9 * License. See the file "COPYING" in the main directory of this archive 10 * for more details. 11 * 12 * TODO: 13 * - dmaengine support 14 */ 15 16 #include <linux/ata.h> 17 #include <linux/clk.h> 18 #include <linux/libata.h> 19 #include <linux/module.h> 20 #include <linux/platform_device.h> 21 22 #define DRV_NAME "pata_imx" 23 24 #define PATA_IMX_ATA_TIME_OFF 0x00 25 #define PATA_IMX_ATA_TIME_ON 0x01 26 #define PATA_IMX_ATA_TIME_1 0x02 27 #define PATA_IMX_ATA_TIME_2W 0x03 28 #define PATA_IMX_ATA_TIME_2R 0x04 29 #define PATA_IMX_ATA_TIME_AX 0x05 30 #define PATA_IMX_ATA_TIME_PIO_RDX 0x06 31 #define PATA_IMX_ATA_TIME_4 0x07 32 #define PATA_IMX_ATA_TIME_9 0x08 33 34 #define PATA_IMX_ATA_CONTROL 0x24 35 #define PATA_IMX_ATA_CTRL_FIFO_RST_B (1<<7) 36 #define PATA_IMX_ATA_CTRL_ATA_RST_B (1<<6) 37 #define PATA_IMX_ATA_CTRL_IORDY_EN (1<<0) 38 #define PATA_IMX_ATA_INT_EN 0x2C 39 #define PATA_IMX_ATA_INTR_ATA_INTRQ2 (1<<3) 40 #define PATA_IMX_DRIVE_DATA 0xA0 41 #define PATA_IMX_DRIVE_CONTROL 0xD8 42 43 static u32 pio_t4[] = { 30, 20, 15, 10, 10 }; 44 static u32 pio_t9[] = { 20, 15, 10, 10, 10 }; 45 static u32 pio_tA[] = { 35, 35, 35, 35, 35 }; 46 47 struct pata_imx_priv { 48 struct clk *clk; 49 /* timings/interrupt/control regs */ 50 void __iomem *host_regs; 51 u32 ata_ctl; 52 }; 53 54 static void pata_imx_set_timing(struct ata_device *adev, 55 struct pata_imx_priv *priv) 56 { 57 struct ata_timing timing; 58 unsigned long clkrate; 59 u32 T, mode; 60 61 clkrate = clk_get_rate(priv->clk); 62 63 if (adev->pio_mode < XFER_PIO_0 || adev->pio_mode > XFER_PIO_4 || 64 !clkrate) 65 return; 66 67 T = 1000000000 / clkrate; 68 ata_timing_compute(adev, adev->pio_mode, &timing, T * 1000, 0); 69 70 mode = adev->pio_mode - XFER_PIO_0; 71 72 writeb(3, priv->host_regs + PATA_IMX_ATA_TIME_OFF); 73 writeb(3, priv->host_regs + PATA_IMX_ATA_TIME_ON); 74 writeb(timing.setup, priv->host_regs + PATA_IMX_ATA_TIME_1); 75 writeb(timing.act8b, priv->host_regs + PATA_IMX_ATA_TIME_2W); 76 writeb(timing.act8b, priv->host_regs + PATA_IMX_ATA_TIME_2R); 77 writeb(1, priv->host_regs + PATA_IMX_ATA_TIME_PIO_RDX); 78 79 writeb(pio_t4[mode] / T + 1, priv->host_regs + PATA_IMX_ATA_TIME_4); 80 writeb(pio_t9[mode] / T + 1, priv->host_regs + PATA_IMX_ATA_TIME_9); 81 writeb(pio_tA[mode] / T + 1, priv->host_regs + PATA_IMX_ATA_TIME_AX); 82 } 83 84 static void pata_imx_set_piomode(struct ata_port *ap, struct ata_device *adev) 85 { 86 struct pata_imx_priv *priv = ap->host->private_data; 87 u32 val; 88 89 pata_imx_set_timing(adev, priv); 90 91 val = __raw_readl(priv->host_regs + PATA_IMX_ATA_CONTROL); 92 if (ata_pio_need_iordy(adev)) 93 val |= PATA_IMX_ATA_CTRL_IORDY_EN; 94 else 95 val &= ~PATA_IMX_ATA_CTRL_IORDY_EN; 96 __raw_writel(val, priv->host_regs + PATA_IMX_ATA_CONTROL); 97 } 98 99 static const struct scsi_host_template pata_imx_sht = { 100 ATA_PIO_SHT(DRV_NAME), 101 }; 102 103 static struct ata_port_operations pata_imx_port_ops = { 104 .inherits = &ata_sff_port_ops, 105 .sff_data_xfer = ata_sff_data_xfer32, 106 .cable_detect = ata_cable_unknown, 107 .set_piomode = pata_imx_set_piomode, 108 }; 109 110 static void pata_imx_setup_port(struct ata_ioports *ioaddr) 111 { 112 /* Fixup the port shift for platforms that need it */ 113 ioaddr->data_addr = ioaddr->cmd_addr + (ATA_REG_DATA << 2); 114 ioaddr->error_addr = ioaddr->cmd_addr + (ATA_REG_ERR << 2); 115 ioaddr->feature_addr = ioaddr->cmd_addr + (ATA_REG_FEATURE << 2); 116 ioaddr->nsect_addr = ioaddr->cmd_addr + (ATA_REG_NSECT << 2); 117 ioaddr->lbal_addr = ioaddr->cmd_addr + (ATA_REG_LBAL << 2); 118 ioaddr->lbam_addr = ioaddr->cmd_addr + (ATA_REG_LBAM << 2); 119 ioaddr->lbah_addr = ioaddr->cmd_addr + (ATA_REG_LBAH << 2); 120 ioaddr->device_addr = ioaddr->cmd_addr + (ATA_REG_DEVICE << 2); 121 ioaddr->status_addr = ioaddr->cmd_addr + (ATA_REG_STATUS << 2); 122 ioaddr->command_addr = ioaddr->cmd_addr + (ATA_REG_CMD << 2); 123 } 124 125 static int pata_imx_probe(struct platform_device *pdev) 126 { 127 struct ata_host *host; 128 struct ata_port *ap; 129 struct pata_imx_priv *priv; 130 int irq = 0; 131 struct resource *io_res; 132 int ret; 133 134 irq = platform_get_irq(pdev, 0); 135 if (irq < 0) 136 return irq; 137 138 priv = devm_kzalloc(&pdev->dev, 139 sizeof(struct pata_imx_priv), GFP_KERNEL); 140 if (!priv) 141 return -ENOMEM; 142 143 priv->clk = devm_clk_get_enabled(&pdev->dev, NULL); 144 if (IS_ERR(priv->clk)) { 145 dev_err(&pdev->dev, "Failed to get and enable clock\n"); 146 return PTR_ERR(priv->clk); 147 } 148 149 host = ata_host_alloc(&pdev->dev, 1); 150 if (!host) 151 return -ENOMEM; 152 153 host->private_data = priv; 154 ap = host->ports[0]; 155 156 ap->ops = &pata_imx_port_ops; 157 ap->pio_mask = ATA_PIO4; 158 ap->flags |= ATA_FLAG_SLAVE_POSS; 159 160 priv->host_regs = devm_platform_get_and_ioremap_resource(pdev, 0, &io_res); 161 if (IS_ERR(priv->host_regs)) 162 return PTR_ERR(priv->host_regs); 163 164 ap->ioaddr.cmd_addr = priv->host_regs + PATA_IMX_DRIVE_DATA; 165 ap->ioaddr.ctl_addr = priv->host_regs + PATA_IMX_DRIVE_CONTROL; 166 167 ap->ioaddr.altstatus_addr = ap->ioaddr.ctl_addr; 168 169 pata_imx_setup_port(&ap->ioaddr); 170 171 ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx", 172 (unsigned long long)io_res->start + PATA_IMX_DRIVE_DATA, 173 (unsigned long long)io_res->start + PATA_IMX_DRIVE_CONTROL); 174 175 /* deassert resets */ 176 __raw_writel(PATA_IMX_ATA_CTRL_FIFO_RST_B | 177 PATA_IMX_ATA_CTRL_ATA_RST_B, 178 priv->host_regs + PATA_IMX_ATA_CONTROL); 179 /* enable interrupts */ 180 __raw_writel(PATA_IMX_ATA_INTR_ATA_INTRQ2, 181 priv->host_regs + PATA_IMX_ATA_INT_EN); 182 183 /* activate */ 184 ret = ata_host_activate(host, irq, ata_sff_interrupt, 0, 185 &pata_imx_sht); 186 187 if (ret) 188 return ret; 189 190 return 0; 191 } 192 193 static void pata_imx_remove(struct platform_device *pdev) 194 { 195 struct ata_host *host = platform_get_drvdata(pdev); 196 struct pata_imx_priv *priv = host->private_data; 197 198 ata_host_detach(host); 199 200 __raw_writel(0, priv->host_regs + PATA_IMX_ATA_INT_EN); 201 } 202 203 #ifdef CONFIG_PM_SLEEP 204 static int pata_imx_suspend(struct device *dev) 205 { 206 struct ata_host *host = dev_get_drvdata(dev); 207 struct pata_imx_priv *priv = host->private_data; 208 209 ata_host_suspend(host, PMSG_SUSPEND); 210 211 __raw_writel(0, priv->host_regs + PATA_IMX_ATA_INT_EN); 212 priv->ata_ctl = __raw_readl(priv->host_regs + PATA_IMX_ATA_CONTROL); 213 clk_disable_unprepare(priv->clk); 214 215 return 0; 216 } 217 218 static int pata_imx_resume(struct device *dev) 219 { 220 struct ata_host *host = dev_get_drvdata(dev); 221 struct pata_imx_priv *priv = host->private_data; 222 223 int ret = clk_prepare_enable(priv->clk); 224 if (ret) 225 return ret; 226 227 __raw_writel(priv->ata_ctl, priv->host_regs + PATA_IMX_ATA_CONTROL); 228 229 __raw_writel(PATA_IMX_ATA_INTR_ATA_INTRQ2, 230 priv->host_regs + PATA_IMX_ATA_INT_EN); 231 232 ata_host_resume(host); 233 234 return 0; 235 } 236 #endif 237 238 static SIMPLE_DEV_PM_OPS(pata_imx_pm_ops, pata_imx_suspend, pata_imx_resume); 239 240 static const struct of_device_id imx_pata_dt_ids[] = { 241 { 242 .compatible = "fsl,imx27-pata", 243 }, { 244 /* sentinel */ 245 } 246 }; 247 MODULE_DEVICE_TABLE(of, imx_pata_dt_ids); 248 249 static struct platform_driver pata_imx_driver = { 250 .probe = pata_imx_probe, 251 .remove = pata_imx_remove, 252 .driver = { 253 .name = DRV_NAME, 254 .of_match_table = imx_pata_dt_ids, 255 .pm = &pata_imx_pm_ops, 256 }, 257 }; 258 259 module_platform_driver(pata_imx_driver); 260 261 MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>"); 262 MODULE_DESCRIPTION("low-level driver for iMX PATA"); 263 MODULE_LICENSE("GPL"); 264 MODULE_ALIAS("platform:" DRV_NAME); 265