1 /* 2 * libata-core.c - helper library for ATA 3 * 4 * Maintained by: Jeff Garzik <jgarzik@pobox.com> 5 * Please ALWAYS copy linux-ide@vger.kernel.org 6 * on emails. 7 * 8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved. 9 * Copyright 2003-2004 Jeff Garzik 10 * 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2, or (at your option) 15 * any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; see the file COPYING. If not, write to 24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 25 * 26 * 27 * libata documentation is available via 'make {ps|pdf}docs', 28 * as Documentation/DocBook/libata.* 29 * 30 * Hardware documentation available from http://www.t13.org/ and 31 * http://www.sata-io.org/ 32 * 33 * Standards documents from: 34 * http://www.t13.org (ATA standards, PCI DMA IDE spec) 35 * http://www.t10.org (SCSI MMC - for ATAPI MMC) 36 * http://www.sata-io.org (SATA) 37 * http://www.compactflash.org (CF) 38 * http://www.qic.org (QIC157 - Tape and DSC) 39 * http://www.ce-ata.org (CE-ATA: not supported) 40 * 41 */ 42 43 #include <linux/kernel.h> 44 #include <linux/module.h> 45 #include <linux/pci.h> 46 #include <linux/init.h> 47 #include <linux/list.h> 48 #include <linux/mm.h> 49 #include <linux/highmem.h> 50 #include <linux/spinlock.h> 51 #include <linux/blkdev.h> 52 #include <linux/delay.h> 53 #include <linux/timer.h> 54 #include <linux/interrupt.h> 55 #include <linux/completion.h> 56 #include <linux/suspend.h> 57 #include <linux/workqueue.h> 58 #include <linux/jiffies.h> 59 #include <linux/scatterlist.h> 60 #include <linux/io.h> 61 #include <scsi/scsi.h> 62 #include <scsi/scsi_cmnd.h> 63 #include <scsi/scsi_host.h> 64 #include <linux/libata.h> 65 #include <asm/semaphore.h> 66 #include <asm/byteorder.h> 67 #include <linux/cdrom.h> 68 69 #include "libata.h" 70 71 72 /* debounce timing parameters in msecs { interval, duration, timeout } */ 73 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 }; 74 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 }; 75 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 }; 76 77 static unsigned int ata_dev_init_params(struct ata_device *dev, 78 u16 heads, u16 sectors); 79 static unsigned int ata_dev_set_xfermode(struct ata_device *dev); 80 static unsigned int ata_dev_set_feature(struct ata_device *dev, 81 u8 enable, u8 feature); 82 static void ata_dev_xfermask(struct ata_device *dev); 83 static unsigned long ata_dev_blacklisted(const struct ata_device *dev); 84 85 unsigned int ata_print_id = 1; 86 static struct workqueue_struct *ata_wq; 87 88 struct workqueue_struct *ata_aux_wq; 89 90 int atapi_enabled = 1; 91 module_param(atapi_enabled, int, 0444); 92 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); 93 94 int atapi_dmadir = 0; 95 module_param(atapi_dmadir, int, 0444); 96 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)"); 97 98 int atapi_passthru16 = 1; 99 module_param(atapi_passthru16, int, 0444); 100 MODULE_PARM_DESC(atapi_passthru16, "Enable ATA_16 passthru for ATAPI devices; on by default (0=off, 1=on)"); 101 102 int libata_fua = 0; 103 module_param_named(fua, libata_fua, int, 0444); 104 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)"); 105 106 static int ata_ignore_hpa; 107 module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644); 108 MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)"); 109 110 static int libata_dma_mask = ATA_DMA_MASK_ATA|ATA_DMA_MASK_ATAPI|ATA_DMA_MASK_CFA; 111 module_param_named(dma, libata_dma_mask, int, 0444); 112 MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)"); 113 114 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ; 115 module_param(ata_probe_timeout, int, 0444); 116 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)"); 117 118 int libata_noacpi = 0; 119 module_param_named(noacpi, libata_noacpi, int, 0444); 120 MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in probe/suspend/resume when set"); 121 122 int libata_allow_tpm = 0; 123 module_param_named(allow_tpm, libata_allow_tpm, int, 0444); 124 MODULE_PARM_DESC(allow_tpm, "Permit the use of TPM commands"); 125 126 MODULE_AUTHOR("Jeff Garzik"); 127 MODULE_DESCRIPTION("Library module for ATA devices"); 128 MODULE_LICENSE("GPL"); 129 MODULE_VERSION(DRV_VERSION); 130 131 132 /** 133 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure 134 * @tf: Taskfile to convert 135 * @pmp: Port multiplier port 136 * @is_cmd: This FIS is for command 137 * @fis: Buffer into which data will output 138 * 139 * Converts a standard ATA taskfile to a Serial ATA 140 * FIS structure (Register - Host to Device). 141 * 142 * LOCKING: 143 * Inherited from caller. 144 */ 145 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis) 146 { 147 fis[0] = 0x27; /* Register - Host to Device FIS */ 148 fis[1] = pmp & 0xf; /* Port multiplier number*/ 149 if (is_cmd) 150 fis[1] |= (1 << 7); /* bit 7 indicates Command FIS */ 151 152 fis[2] = tf->command; 153 fis[3] = tf->feature; 154 155 fis[4] = tf->lbal; 156 fis[5] = tf->lbam; 157 fis[6] = tf->lbah; 158 fis[7] = tf->device; 159 160 fis[8] = tf->hob_lbal; 161 fis[9] = tf->hob_lbam; 162 fis[10] = tf->hob_lbah; 163 fis[11] = tf->hob_feature; 164 165 fis[12] = tf->nsect; 166 fis[13] = tf->hob_nsect; 167 fis[14] = 0; 168 fis[15] = tf->ctl; 169 170 fis[16] = 0; 171 fis[17] = 0; 172 fis[18] = 0; 173 fis[19] = 0; 174 } 175 176 /** 177 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile 178 * @fis: Buffer from which data will be input 179 * @tf: Taskfile to output 180 * 181 * Converts a serial ATA FIS structure to a standard ATA taskfile. 182 * 183 * LOCKING: 184 * Inherited from caller. 185 */ 186 187 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf) 188 { 189 tf->command = fis[2]; /* status */ 190 tf->feature = fis[3]; /* error */ 191 192 tf->lbal = fis[4]; 193 tf->lbam = fis[5]; 194 tf->lbah = fis[6]; 195 tf->device = fis[7]; 196 197 tf->hob_lbal = fis[8]; 198 tf->hob_lbam = fis[9]; 199 tf->hob_lbah = fis[10]; 200 201 tf->nsect = fis[12]; 202 tf->hob_nsect = fis[13]; 203 } 204 205 static const u8 ata_rw_cmds[] = { 206 /* pio multi */ 207 ATA_CMD_READ_MULTI, 208 ATA_CMD_WRITE_MULTI, 209 ATA_CMD_READ_MULTI_EXT, 210 ATA_CMD_WRITE_MULTI_EXT, 211 0, 212 0, 213 0, 214 ATA_CMD_WRITE_MULTI_FUA_EXT, 215 /* pio */ 216 ATA_CMD_PIO_READ, 217 ATA_CMD_PIO_WRITE, 218 ATA_CMD_PIO_READ_EXT, 219 ATA_CMD_PIO_WRITE_EXT, 220 0, 221 0, 222 0, 223 0, 224 /* dma */ 225 ATA_CMD_READ, 226 ATA_CMD_WRITE, 227 ATA_CMD_READ_EXT, 228 ATA_CMD_WRITE_EXT, 229 0, 230 0, 231 0, 232 ATA_CMD_WRITE_FUA_EXT 233 }; 234 235 /** 236 * ata_rwcmd_protocol - set taskfile r/w commands and protocol 237 * @tf: command to examine and configure 238 * @dev: device tf belongs to 239 * 240 * Examine the device configuration and tf->flags to calculate 241 * the proper read/write commands and protocol to use. 242 * 243 * LOCKING: 244 * caller. 245 */ 246 static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev) 247 { 248 u8 cmd; 249 250 int index, fua, lba48, write; 251 252 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0; 253 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0; 254 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0; 255 256 if (dev->flags & ATA_DFLAG_PIO) { 257 tf->protocol = ATA_PROT_PIO; 258 index = dev->multi_count ? 0 : 8; 259 } else if (lba48 && (dev->link->ap->flags & ATA_FLAG_PIO_LBA48)) { 260 /* Unable to use DMA due to host limitation */ 261 tf->protocol = ATA_PROT_PIO; 262 index = dev->multi_count ? 0 : 8; 263 } else { 264 tf->protocol = ATA_PROT_DMA; 265 index = 16; 266 } 267 268 cmd = ata_rw_cmds[index + fua + lba48 + write]; 269 if (cmd) { 270 tf->command = cmd; 271 return 0; 272 } 273 return -1; 274 } 275 276 /** 277 * ata_tf_read_block - Read block address from ATA taskfile 278 * @tf: ATA taskfile of interest 279 * @dev: ATA device @tf belongs to 280 * 281 * LOCKING: 282 * None. 283 * 284 * Read block address from @tf. This function can handle all 285 * three address formats - LBA, LBA48 and CHS. tf->protocol and 286 * flags select the address format to use. 287 * 288 * RETURNS: 289 * Block address read from @tf. 290 */ 291 u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev) 292 { 293 u64 block = 0; 294 295 if (tf->flags & ATA_TFLAG_LBA) { 296 if (tf->flags & ATA_TFLAG_LBA48) { 297 block |= (u64)tf->hob_lbah << 40; 298 block |= (u64)tf->hob_lbam << 32; 299 block |= tf->hob_lbal << 24; 300 } else 301 block |= (tf->device & 0xf) << 24; 302 303 block |= tf->lbah << 16; 304 block |= tf->lbam << 8; 305 block |= tf->lbal; 306 } else { 307 u32 cyl, head, sect; 308 309 cyl = tf->lbam | (tf->lbah << 8); 310 head = tf->device & 0xf; 311 sect = tf->lbal; 312 313 block = (cyl * dev->heads + head) * dev->sectors + sect; 314 } 315 316 return block; 317 } 318 319 /** 320 * ata_build_rw_tf - Build ATA taskfile for given read/write request 321 * @tf: Target ATA taskfile 322 * @dev: ATA device @tf belongs to 323 * @block: Block address 324 * @n_block: Number of blocks 325 * @tf_flags: RW/FUA etc... 326 * @tag: tag 327 * 328 * LOCKING: 329 * None. 330 * 331 * Build ATA taskfile @tf for read/write request described by 332 * @block, @n_block, @tf_flags and @tag on @dev. 333 * 334 * RETURNS: 335 * 336 * 0 on success, -ERANGE if the request is too large for @dev, 337 * -EINVAL if the request is invalid. 338 */ 339 int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev, 340 u64 block, u32 n_block, unsigned int tf_flags, 341 unsigned int tag) 342 { 343 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 344 tf->flags |= tf_flags; 345 346 if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) { 347 /* yay, NCQ */ 348 if (!lba_48_ok(block, n_block)) 349 return -ERANGE; 350 351 tf->protocol = ATA_PROT_NCQ; 352 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48; 353 354 if (tf->flags & ATA_TFLAG_WRITE) 355 tf->command = ATA_CMD_FPDMA_WRITE; 356 else 357 tf->command = ATA_CMD_FPDMA_READ; 358 359 tf->nsect = tag << 3; 360 tf->hob_feature = (n_block >> 8) & 0xff; 361 tf->feature = n_block & 0xff; 362 363 tf->hob_lbah = (block >> 40) & 0xff; 364 tf->hob_lbam = (block >> 32) & 0xff; 365 tf->hob_lbal = (block >> 24) & 0xff; 366 tf->lbah = (block >> 16) & 0xff; 367 tf->lbam = (block >> 8) & 0xff; 368 tf->lbal = block & 0xff; 369 370 tf->device = 1 << 6; 371 if (tf->flags & ATA_TFLAG_FUA) 372 tf->device |= 1 << 7; 373 } else if (dev->flags & ATA_DFLAG_LBA) { 374 tf->flags |= ATA_TFLAG_LBA; 375 376 if (lba_28_ok(block, n_block)) { 377 /* use LBA28 */ 378 tf->device |= (block >> 24) & 0xf; 379 } else if (lba_48_ok(block, n_block)) { 380 if (!(dev->flags & ATA_DFLAG_LBA48)) 381 return -ERANGE; 382 383 /* use LBA48 */ 384 tf->flags |= ATA_TFLAG_LBA48; 385 386 tf->hob_nsect = (n_block >> 8) & 0xff; 387 388 tf->hob_lbah = (block >> 40) & 0xff; 389 tf->hob_lbam = (block >> 32) & 0xff; 390 tf->hob_lbal = (block >> 24) & 0xff; 391 } else 392 /* request too large even for LBA48 */ 393 return -ERANGE; 394 395 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0)) 396 return -EINVAL; 397 398 tf->nsect = n_block & 0xff; 399 400 tf->lbah = (block >> 16) & 0xff; 401 tf->lbam = (block >> 8) & 0xff; 402 tf->lbal = block & 0xff; 403 404 tf->device |= ATA_LBA; 405 } else { 406 /* CHS */ 407 u32 sect, head, cyl, track; 408 409 /* The request -may- be too large for CHS addressing. */ 410 if (!lba_28_ok(block, n_block)) 411 return -ERANGE; 412 413 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0)) 414 return -EINVAL; 415 416 /* Convert LBA to CHS */ 417 track = (u32)block / dev->sectors; 418 cyl = track / dev->heads; 419 head = track % dev->heads; 420 sect = (u32)block % dev->sectors + 1; 421 422 DPRINTK("block %u track %u cyl %u head %u sect %u\n", 423 (u32)block, track, cyl, head, sect); 424 425 /* Check whether the converted CHS can fit. 426 Cylinder: 0-65535 427 Head: 0-15 428 Sector: 1-255*/ 429 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect)) 430 return -ERANGE; 431 432 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */ 433 tf->lbal = sect; 434 tf->lbam = cyl; 435 tf->lbah = cyl >> 8; 436 tf->device |= head; 437 } 438 439 return 0; 440 } 441 442 /** 443 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask 444 * @pio_mask: pio_mask 445 * @mwdma_mask: mwdma_mask 446 * @udma_mask: udma_mask 447 * 448 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single 449 * unsigned int xfer_mask. 450 * 451 * LOCKING: 452 * None. 453 * 454 * RETURNS: 455 * Packed xfer_mask. 456 */ 457 unsigned long ata_pack_xfermask(unsigned long pio_mask, 458 unsigned long mwdma_mask, 459 unsigned long udma_mask) 460 { 461 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) | 462 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) | 463 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA); 464 } 465 466 /** 467 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks 468 * @xfer_mask: xfer_mask to unpack 469 * @pio_mask: resulting pio_mask 470 * @mwdma_mask: resulting mwdma_mask 471 * @udma_mask: resulting udma_mask 472 * 473 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask. 474 * Any NULL distination masks will be ignored. 475 */ 476 void ata_unpack_xfermask(unsigned long xfer_mask, unsigned long *pio_mask, 477 unsigned long *mwdma_mask, unsigned long *udma_mask) 478 { 479 if (pio_mask) 480 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO; 481 if (mwdma_mask) 482 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA; 483 if (udma_mask) 484 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA; 485 } 486 487 static const struct ata_xfer_ent { 488 int shift, bits; 489 u8 base; 490 } ata_xfer_tbl[] = { 491 { ATA_SHIFT_PIO, ATA_NR_PIO_MODES, XFER_PIO_0 }, 492 { ATA_SHIFT_MWDMA, ATA_NR_MWDMA_MODES, XFER_MW_DMA_0 }, 493 { ATA_SHIFT_UDMA, ATA_NR_UDMA_MODES, XFER_UDMA_0 }, 494 { -1, }, 495 }; 496 497 /** 498 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask 499 * @xfer_mask: xfer_mask of interest 500 * 501 * Return matching XFER_* value for @xfer_mask. Only the highest 502 * bit of @xfer_mask is considered. 503 * 504 * LOCKING: 505 * None. 506 * 507 * RETURNS: 508 * Matching XFER_* value, 0xff if no match found. 509 */ 510 u8 ata_xfer_mask2mode(unsigned long xfer_mask) 511 { 512 int highbit = fls(xfer_mask) - 1; 513 const struct ata_xfer_ent *ent; 514 515 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) 516 if (highbit >= ent->shift && highbit < ent->shift + ent->bits) 517 return ent->base + highbit - ent->shift; 518 return 0xff; 519 } 520 521 /** 522 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_* 523 * @xfer_mode: XFER_* of interest 524 * 525 * Return matching xfer_mask for @xfer_mode. 526 * 527 * LOCKING: 528 * None. 529 * 530 * RETURNS: 531 * Matching xfer_mask, 0 if no match found. 532 */ 533 unsigned long ata_xfer_mode2mask(u8 xfer_mode) 534 { 535 const struct ata_xfer_ent *ent; 536 537 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) 538 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) 539 return ((2 << (ent->shift + xfer_mode - ent->base)) - 1) 540 & ~((1 << ent->shift) - 1); 541 return 0; 542 } 543 544 /** 545 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_* 546 * @xfer_mode: XFER_* of interest 547 * 548 * Return matching xfer_shift for @xfer_mode. 549 * 550 * LOCKING: 551 * None. 552 * 553 * RETURNS: 554 * Matching xfer_shift, -1 if no match found. 555 */ 556 int ata_xfer_mode2shift(unsigned long xfer_mode) 557 { 558 const struct ata_xfer_ent *ent; 559 560 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) 561 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) 562 return ent->shift; 563 return -1; 564 } 565 566 /** 567 * ata_mode_string - convert xfer_mask to string 568 * @xfer_mask: mask of bits supported; only highest bit counts. 569 * 570 * Determine string which represents the highest speed 571 * (highest bit in @modemask). 572 * 573 * LOCKING: 574 * None. 575 * 576 * RETURNS: 577 * Constant C string representing highest speed listed in 578 * @mode_mask, or the constant C string "<n/a>". 579 */ 580 const char *ata_mode_string(unsigned long xfer_mask) 581 { 582 static const char * const xfer_mode_str[] = { 583 "PIO0", 584 "PIO1", 585 "PIO2", 586 "PIO3", 587 "PIO4", 588 "PIO5", 589 "PIO6", 590 "MWDMA0", 591 "MWDMA1", 592 "MWDMA2", 593 "MWDMA3", 594 "MWDMA4", 595 "UDMA/16", 596 "UDMA/25", 597 "UDMA/33", 598 "UDMA/44", 599 "UDMA/66", 600 "UDMA/100", 601 "UDMA/133", 602 "UDMA7", 603 }; 604 int highbit; 605 606 highbit = fls(xfer_mask) - 1; 607 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str)) 608 return xfer_mode_str[highbit]; 609 return "<n/a>"; 610 } 611 612 static const char *sata_spd_string(unsigned int spd) 613 { 614 static const char * const spd_str[] = { 615 "1.5 Gbps", 616 "3.0 Gbps", 617 }; 618 619 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str)) 620 return "<unknown>"; 621 return spd_str[spd - 1]; 622 } 623 624 void ata_dev_disable(struct ata_device *dev) 625 { 626 if (ata_dev_enabled(dev)) { 627 if (ata_msg_drv(dev->link->ap)) 628 ata_dev_printk(dev, KERN_WARNING, "disabled\n"); 629 ata_acpi_on_disable(dev); 630 ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO0 | 631 ATA_DNXFER_QUIET); 632 dev->class++; 633 } 634 } 635 636 static int ata_dev_set_dipm(struct ata_device *dev, enum link_pm policy) 637 { 638 struct ata_link *link = dev->link; 639 struct ata_port *ap = link->ap; 640 u32 scontrol; 641 unsigned int err_mask; 642 int rc; 643 644 /* 645 * disallow DIPM for drivers which haven't set 646 * ATA_FLAG_IPM. This is because when DIPM is enabled, 647 * phy ready will be set in the interrupt status on 648 * state changes, which will cause some drivers to 649 * think there are errors - additionally drivers will 650 * need to disable hot plug. 651 */ 652 if (!(ap->flags & ATA_FLAG_IPM) || !ata_dev_enabled(dev)) { 653 ap->pm_policy = NOT_AVAILABLE; 654 return -EINVAL; 655 } 656 657 /* 658 * For DIPM, we will only enable it for the 659 * min_power setting. 660 * 661 * Why? Because Disks are too stupid to know that 662 * If the host rejects a request to go to SLUMBER 663 * they should retry at PARTIAL, and instead it 664 * just would give up. So, for medium_power to 665 * work at all, we need to only allow HIPM. 666 */ 667 rc = sata_scr_read(link, SCR_CONTROL, &scontrol); 668 if (rc) 669 return rc; 670 671 switch (policy) { 672 case MIN_POWER: 673 /* no restrictions on IPM transitions */ 674 scontrol &= ~(0x3 << 8); 675 rc = sata_scr_write(link, SCR_CONTROL, scontrol); 676 if (rc) 677 return rc; 678 679 /* enable DIPM */ 680 if (dev->flags & ATA_DFLAG_DIPM) 681 err_mask = ata_dev_set_feature(dev, 682 SETFEATURES_SATA_ENABLE, SATA_DIPM); 683 break; 684 case MEDIUM_POWER: 685 /* allow IPM to PARTIAL */ 686 scontrol &= ~(0x1 << 8); 687 scontrol |= (0x2 << 8); 688 rc = sata_scr_write(link, SCR_CONTROL, scontrol); 689 if (rc) 690 return rc; 691 692 /* 693 * we don't have to disable DIPM since IPM flags 694 * disallow transitions to SLUMBER, which effectively 695 * disable DIPM if it does not support PARTIAL 696 */ 697 break; 698 case NOT_AVAILABLE: 699 case MAX_PERFORMANCE: 700 /* disable all IPM transitions */ 701 scontrol |= (0x3 << 8); 702 rc = sata_scr_write(link, SCR_CONTROL, scontrol); 703 if (rc) 704 return rc; 705 706 /* 707 * we don't have to disable DIPM since IPM flags 708 * disallow all transitions which effectively 709 * disable DIPM anyway. 710 */ 711 break; 712 } 713 714 /* FIXME: handle SET FEATURES failure */ 715 (void) err_mask; 716 717 return 0; 718 } 719 720 /** 721 * ata_dev_enable_pm - enable SATA interface power management 722 * @dev: device to enable power management 723 * @policy: the link power management policy 724 * 725 * Enable SATA Interface power management. This will enable 726 * Device Interface Power Management (DIPM) for min_power 727 * policy, and then call driver specific callbacks for 728 * enabling Host Initiated Power management. 729 * 730 * Locking: Caller. 731 * Returns: -EINVAL if IPM is not supported, 0 otherwise. 732 */ 733 void ata_dev_enable_pm(struct ata_device *dev, enum link_pm policy) 734 { 735 int rc = 0; 736 struct ata_port *ap = dev->link->ap; 737 738 /* set HIPM first, then DIPM */ 739 if (ap->ops->enable_pm) 740 rc = ap->ops->enable_pm(ap, policy); 741 if (rc) 742 goto enable_pm_out; 743 rc = ata_dev_set_dipm(dev, policy); 744 745 enable_pm_out: 746 if (rc) 747 ap->pm_policy = MAX_PERFORMANCE; 748 else 749 ap->pm_policy = policy; 750 return /* rc */; /* hopefully we can use 'rc' eventually */ 751 } 752 753 #ifdef CONFIG_PM 754 /** 755 * ata_dev_disable_pm - disable SATA interface power management 756 * @dev: device to disable power management 757 * 758 * Disable SATA Interface power management. This will disable 759 * Device Interface Power Management (DIPM) without changing 760 * policy, call driver specific callbacks for disabling Host 761 * Initiated Power management. 762 * 763 * Locking: Caller. 764 * Returns: void 765 */ 766 static void ata_dev_disable_pm(struct ata_device *dev) 767 { 768 struct ata_port *ap = dev->link->ap; 769 770 ata_dev_set_dipm(dev, MAX_PERFORMANCE); 771 if (ap->ops->disable_pm) 772 ap->ops->disable_pm(ap); 773 } 774 #endif /* CONFIG_PM */ 775 776 void ata_lpm_schedule(struct ata_port *ap, enum link_pm policy) 777 { 778 ap->pm_policy = policy; 779 ap->link.eh_info.action |= ATA_EHI_LPM; 780 ap->link.eh_info.flags |= ATA_EHI_NO_AUTOPSY; 781 ata_port_schedule_eh(ap); 782 } 783 784 #ifdef CONFIG_PM 785 static void ata_lpm_enable(struct ata_host *host) 786 { 787 struct ata_link *link; 788 struct ata_port *ap; 789 struct ata_device *dev; 790 int i; 791 792 for (i = 0; i < host->n_ports; i++) { 793 ap = host->ports[i]; 794 ata_port_for_each_link(link, ap) { 795 ata_link_for_each_dev(dev, link) 796 ata_dev_disable_pm(dev); 797 } 798 } 799 } 800 801 static void ata_lpm_disable(struct ata_host *host) 802 { 803 int i; 804 805 for (i = 0; i < host->n_ports; i++) { 806 struct ata_port *ap = host->ports[i]; 807 ata_lpm_schedule(ap, ap->pm_policy); 808 } 809 } 810 #endif /* CONFIG_PM */ 811 812 813 /** 814 * ata_devchk - PATA device presence detection 815 * @ap: ATA channel to examine 816 * @device: Device to examine (starting at zero) 817 * 818 * This technique was originally described in 819 * Hale Landis's ATADRVR (www.ata-atapi.com), and 820 * later found its way into the ATA/ATAPI spec. 821 * 822 * Write a pattern to the ATA shadow registers, 823 * and if a device is present, it will respond by 824 * correctly storing and echoing back the 825 * ATA shadow register contents. 826 * 827 * LOCKING: 828 * caller. 829 */ 830 831 static unsigned int ata_devchk(struct ata_port *ap, unsigned int device) 832 { 833 struct ata_ioports *ioaddr = &ap->ioaddr; 834 u8 nsect, lbal; 835 836 ap->ops->dev_select(ap, device); 837 838 iowrite8(0x55, ioaddr->nsect_addr); 839 iowrite8(0xaa, ioaddr->lbal_addr); 840 841 iowrite8(0xaa, ioaddr->nsect_addr); 842 iowrite8(0x55, ioaddr->lbal_addr); 843 844 iowrite8(0x55, ioaddr->nsect_addr); 845 iowrite8(0xaa, ioaddr->lbal_addr); 846 847 nsect = ioread8(ioaddr->nsect_addr); 848 lbal = ioread8(ioaddr->lbal_addr); 849 850 if ((nsect == 0x55) && (lbal == 0xaa)) 851 return 1; /* we found a device */ 852 853 return 0; /* nothing found */ 854 } 855 856 /** 857 * ata_dev_classify - determine device type based on ATA-spec signature 858 * @tf: ATA taskfile register set for device to be identified 859 * 860 * Determine from taskfile register contents whether a device is 861 * ATA or ATAPI, as per "Signature and persistence" section 862 * of ATA/PI spec (volume 1, sect 5.14). 863 * 864 * LOCKING: 865 * None. 866 * 867 * RETURNS: 868 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, %ATA_DEV_PMP or 869 * %ATA_DEV_UNKNOWN the event of failure. 870 */ 871 unsigned int ata_dev_classify(const struct ata_taskfile *tf) 872 { 873 /* Apple's open source Darwin code hints that some devices only 874 * put a proper signature into the LBA mid/high registers, 875 * So, we only check those. It's sufficient for uniqueness. 876 * 877 * ATA/ATAPI-7 (d1532v1r1: Feb. 19, 2003) specified separate 878 * signatures for ATA and ATAPI devices attached on SerialATA, 879 * 0x3c/0xc3 and 0x69/0x96 respectively. However, SerialATA 880 * spec has never mentioned about using different signatures 881 * for ATA/ATAPI devices. Then, Serial ATA II: Port 882 * Multiplier specification began to use 0x69/0x96 to identify 883 * port multpliers and 0x3c/0xc3 to identify SEMB device. 884 * ATA/ATAPI-7 dropped descriptions about 0x3c/0xc3 and 885 * 0x69/0x96 shortly and described them as reserved for 886 * SerialATA. 887 * 888 * We follow the current spec and consider that 0x69/0x96 889 * identifies a port multiplier and 0x3c/0xc3 a SEMB device. 890 */ 891 if ((tf->lbam == 0) && (tf->lbah == 0)) { 892 DPRINTK("found ATA device by sig\n"); 893 return ATA_DEV_ATA; 894 } 895 896 if ((tf->lbam == 0x14) && (tf->lbah == 0xeb)) { 897 DPRINTK("found ATAPI device by sig\n"); 898 return ATA_DEV_ATAPI; 899 } 900 901 if ((tf->lbam == 0x69) && (tf->lbah == 0x96)) { 902 DPRINTK("found PMP device by sig\n"); 903 return ATA_DEV_PMP; 904 } 905 906 if ((tf->lbam == 0x3c) && (tf->lbah == 0xc3)) { 907 printk(KERN_INFO "ata: SEMB device ignored\n"); 908 return ATA_DEV_SEMB_UNSUP; /* not yet */ 909 } 910 911 DPRINTK("unknown device\n"); 912 return ATA_DEV_UNKNOWN; 913 } 914 915 /** 916 * ata_dev_try_classify - Parse returned ATA device signature 917 * @dev: ATA device to classify (starting at zero) 918 * @present: device seems present 919 * @r_err: Value of error register on completion 920 * 921 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, 922 * an ATA/ATAPI-defined set of values is placed in the ATA 923 * shadow registers, indicating the results of device detection 924 * and diagnostics. 925 * 926 * Select the ATA device, and read the values from the ATA shadow 927 * registers. Then parse according to the Error register value, 928 * and the spec-defined values examined by ata_dev_classify(). 929 * 930 * LOCKING: 931 * caller. 932 * 933 * RETURNS: 934 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE. 935 */ 936 unsigned int ata_dev_try_classify(struct ata_device *dev, int present, 937 u8 *r_err) 938 { 939 struct ata_port *ap = dev->link->ap; 940 struct ata_taskfile tf; 941 unsigned int class; 942 u8 err; 943 944 ap->ops->dev_select(ap, dev->devno); 945 946 memset(&tf, 0, sizeof(tf)); 947 948 ap->ops->tf_read(ap, &tf); 949 err = tf.feature; 950 if (r_err) 951 *r_err = err; 952 953 /* see if device passed diags: continue and warn later */ 954 if (err == 0) 955 /* diagnostic fail : do nothing _YET_ */ 956 dev->horkage |= ATA_HORKAGE_DIAGNOSTIC; 957 else if (err == 1) 958 /* do nothing */ ; 959 else if ((dev->devno == 0) && (err == 0x81)) 960 /* do nothing */ ; 961 else 962 return ATA_DEV_NONE; 963 964 /* determine if device is ATA or ATAPI */ 965 class = ata_dev_classify(&tf); 966 967 if (class == ATA_DEV_UNKNOWN) { 968 /* If the device failed diagnostic, it's likely to 969 * have reported incorrect device signature too. 970 * Assume ATA device if the device seems present but 971 * device signature is invalid with diagnostic 972 * failure. 973 */ 974 if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC)) 975 class = ATA_DEV_ATA; 976 else 977 class = ATA_DEV_NONE; 978 } else if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) 979 class = ATA_DEV_NONE; 980 981 return class; 982 } 983 984 /** 985 * ata_id_string - Convert IDENTIFY DEVICE page into string 986 * @id: IDENTIFY DEVICE results we will examine 987 * @s: string into which data is output 988 * @ofs: offset into identify device page 989 * @len: length of string to return. must be an even number. 990 * 991 * The strings in the IDENTIFY DEVICE page are broken up into 992 * 16-bit chunks. Run through the string, and output each 993 * 8-bit chunk linearly, regardless of platform. 994 * 995 * LOCKING: 996 * caller. 997 */ 998 999 void ata_id_string(const u16 *id, unsigned char *s, 1000 unsigned int ofs, unsigned int len) 1001 { 1002 unsigned int c; 1003 1004 while (len > 0) { 1005 c = id[ofs] >> 8; 1006 *s = c; 1007 s++; 1008 1009 c = id[ofs] & 0xff; 1010 *s = c; 1011 s++; 1012 1013 ofs++; 1014 len -= 2; 1015 } 1016 } 1017 1018 /** 1019 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string 1020 * @id: IDENTIFY DEVICE results we will examine 1021 * @s: string into which data is output 1022 * @ofs: offset into identify device page 1023 * @len: length of string to return. must be an odd number. 1024 * 1025 * This function is identical to ata_id_string except that it 1026 * trims trailing spaces and terminates the resulting string with 1027 * null. @len must be actual maximum length (even number) + 1. 1028 * 1029 * LOCKING: 1030 * caller. 1031 */ 1032 void ata_id_c_string(const u16 *id, unsigned char *s, 1033 unsigned int ofs, unsigned int len) 1034 { 1035 unsigned char *p; 1036 1037 WARN_ON(!(len & 1)); 1038 1039 ata_id_string(id, s, ofs, len - 1); 1040 1041 p = s + strnlen(s, len - 1); 1042 while (p > s && p[-1] == ' ') 1043 p--; 1044 *p = '\0'; 1045 } 1046 1047 static u64 ata_id_n_sectors(const u16 *id) 1048 { 1049 if (ata_id_has_lba(id)) { 1050 if (ata_id_has_lba48(id)) 1051 return ata_id_u64(id, 100); 1052 else 1053 return ata_id_u32(id, 60); 1054 } else { 1055 if (ata_id_current_chs_valid(id)) 1056 return ata_id_u32(id, 57); 1057 else 1058 return id[1] * id[3] * id[6]; 1059 } 1060 } 1061 1062 static u64 ata_tf_to_lba48(struct ata_taskfile *tf) 1063 { 1064 u64 sectors = 0; 1065 1066 sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40; 1067 sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32; 1068 sectors |= (tf->hob_lbal & 0xff) << 24; 1069 sectors |= (tf->lbah & 0xff) << 16; 1070 sectors |= (tf->lbam & 0xff) << 8; 1071 sectors |= (tf->lbal & 0xff); 1072 1073 return ++sectors; 1074 } 1075 1076 static u64 ata_tf_to_lba(struct ata_taskfile *tf) 1077 { 1078 u64 sectors = 0; 1079 1080 sectors |= (tf->device & 0x0f) << 24; 1081 sectors |= (tf->lbah & 0xff) << 16; 1082 sectors |= (tf->lbam & 0xff) << 8; 1083 sectors |= (tf->lbal & 0xff); 1084 1085 return ++sectors; 1086 } 1087 1088 /** 1089 * ata_read_native_max_address - Read native max address 1090 * @dev: target device 1091 * @max_sectors: out parameter for the result native max address 1092 * 1093 * Perform an LBA48 or LBA28 native size query upon the device in 1094 * question. 1095 * 1096 * RETURNS: 1097 * 0 on success, -EACCES if command is aborted by the drive. 1098 * -EIO on other errors. 1099 */ 1100 static int ata_read_native_max_address(struct ata_device *dev, u64 *max_sectors) 1101 { 1102 unsigned int err_mask; 1103 struct ata_taskfile tf; 1104 int lba48 = ata_id_has_lba48(dev->id); 1105 1106 ata_tf_init(dev, &tf); 1107 1108 /* always clear all address registers */ 1109 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR; 1110 1111 if (lba48) { 1112 tf.command = ATA_CMD_READ_NATIVE_MAX_EXT; 1113 tf.flags |= ATA_TFLAG_LBA48; 1114 } else 1115 tf.command = ATA_CMD_READ_NATIVE_MAX; 1116 1117 tf.protocol |= ATA_PROT_NODATA; 1118 tf.device |= ATA_LBA; 1119 1120 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); 1121 if (err_mask) { 1122 ata_dev_printk(dev, KERN_WARNING, "failed to read native " 1123 "max address (err_mask=0x%x)\n", err_mask); 1124 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED)) 1125 return -EACCES; 1126 return -EIO; 1127 } 1128 1129 if (lba48) 1130 *max_sectors = ata_tf_to_lba48(&tf); 1131 else 1132 *max_sectors = ata_tf_to_lba(&tf); 1133 if (dev->horkage & ATA_HORKAGE_HPA_SIZE) 1134 (*max_sectors)--; 1135 return 0; 1136 } 1137 1138 /** 1139 * ata_set_max_sectors - Set max sectors 1140 * @dev: target device 1141 * @new_sectors: new max sectors value to set for the device 1142 * 1143 * Set max sectors of @dev to @new_sectors. 1144 * 1145 * RETURNS: 1146 * 0 on success, -EACCES if command is aborted or denied (due to 1147 * previous non-volatile SET_MAX) by the drive. -EIO on other 1148 * errors. 1149 */ 1150 static int ata_set_max_sectors(struct ata_device *dev, u64 new_sectors) 1151 { 1152 unsigned int err_mask; 1153 struct ata_taskfile tf; 1154 int lba48 = ata_id_has_lba48(dev->id); 1155 1156 new_sectors--; 1157 1158 ata_tf_init(dev, &tf); 1159 1160 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR; 1161 1162 if (lba48) { 1163 tf.command = ATA_CMD_SET_MAX_EXT; 1164 tf.flags |= ATA_TFLAG_LBA48; 1165 1166 tf.hob_lbal = (new_sectors >> 24) & 0xff; 1167 tf.hob_lbam = (new_sectors >> 32) & 0xff; 1168 tf.hob_lbah = (new_sectors >> 40) & 0xff; 1169 } else { 1170 tf.command = ATA_CMD_SET_MAX; 1171 1172 tf.device |= (new_sectors >> 24) & 0xf; 1173 } 1174 1175 tf.protocol |= ATA_PROT_NODATA; 1176 tf.device |= ATA_LBA; 1177 1178 tf.lbal = (new_sectors >> 0) & 0xff; 1179 tf.lbam = (new_sectors >> 8) & 0xff; 1180 tf.lbah = (new_sectors >> 16) & 0xff; 1181 1182 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); 1183 if (err_mask) { 1184 ata_dev_printk(dev, KERN_WARNING, "failed to set " 1185 "max address (err_mask=0x%x)\n", err_mask); 1186 if (err_mask == AC_ERR_DEV && 1187 (tf.feature & (ATA_ABORTED | ATA_IDNF))) 1188 return -EACCES; 1189 return -EIO; 1190 } 1191 1192 return 0; 1193 } 1194 1195 /** 1196 * ata_hpa_resize - Resize a device with an HPA set 1197 * @dev: Device to resize 1198 * 1199 * Read the size of an LBA28 or LBA48 disk with HPA features and resize 1200 * it if required to the full size of the media. The caller must check 1201 * the drive has the HPA feature set enabled. 1202 * 1203 * RETURNS: 1204 * 0 on success, -errno on failure. 1205 */ 1206 static int ata_hpa_resize(struct ata_device *dev) 1207 { 1208 struct ata_eh_context *ehc = &dev->link->eh_context; 1209 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO; 1210 u64 sectors = ata_id_n_sectors(dev->id); 1211 u64 native_sectors; 1212 int rc; 1213 1214 /* do we need to do it? */ 1215 if (dev->class != ATA_DEV_ATA || 1216 !ata_id_has_lba(dev->id) || !ata_id_hpa_enabled(dev->id) || 1217 (dev->horkage & ATA_HORKAGE_BROKEN_HPA)) 1218 return 0; 1219 1220 /* read native max address */ 1221 rc = ata_read_native_max_address(dev, &native_sectors); 1222 if (rc) { 1223 /* If HPA isn't going to be unlocked, skip HPA 1224 * resizing from the next try. 1225 */ 1226 if (!ata_ignore_hpa) { 1227 ata_dev_printk(dev, KERN_WARNING, "HPA support seems " 1228 "broken, will skip HPA handling\n"); 1229 dev->horkage |= ATA_HORKAGE_BROKEN_HPA; 1230 1231 /* we can continue if device aborted the command */ 1232 if (rc == -EACCES) 1233 rc = 0; 1234 } 1235 1236 return rc; 1237 } 1238 1239 /* nothing to do? */ 1240 if (native_sectors <= sectors || !ata_ignore_hpa) { 1241 if (!print_info || native_sectors == sectors) 1242 return 0; 1243 1244 if (native_sectors > sectors) 1245 ata_dev_printk(dev, KERN_INFO, 1246 "HPA detected: current %llu, native %llu\n", 1247 (unsigned long long)sectors, 1248 (unsigned long long)native_sectors); 1249 else if (native_sectors < sectors) 1250 ata_dev_printk(dev, KERN_WARNING, 1251 "native sectors (%llu) is smaller than " 1252 "sectors (%llu)\n", 1253 (unsigned long long)native_sectors, 1254 (unsigned long long)sectors); 1255 return 0; 1256 } 1257 1258 /* let's unlock HPA */ 1259 rc = ata_set_max_sectors(dev, native_sectors); 1260 if (rc == -EACCES) { 1261 /* if device aborted the command, skip HPA resizing */ 1262 ata_dev_printk(dev, KERN_WARNING, "device aborted resize " 1263 "(%llu -> %llu), skipping HPA handling\n", 1264 (unsigned long long)sectors, 1265 (unsigned long long)native_sectors); 1266 dev->horkage |= ATA_HORKAGE_BROKEN_HPA; 1267 return 0; 1268 } else if (rc) 1269 return rc; 1270 1271 /* re-read IDENTIFY data */ 1272 rc = ata_dev_reread_id(dev, 0); 1273 if (rc) { 1274 ata_dev_printk(dev, KERN_ERR, "failed to re-read IDENTIFY " 1275 "data after HPA resizing\n"); 1276 return rc; 1277 } 1278 1279 if (print_info) { 1280 u64 new_sectors = ata_id_n_sectors(dev->id); 1281 ata_dev_printk(dev, KERN_INFO, 1282 "HPA unlocked: %llu -> %llu, native %llu\n", 1283 (unsigned long long)sectors, 1284 (unsigned long long)new_sectors, 1285 (unsigned long long)native_sectors); 1286 } 1287 1288 return 0; 1289 } 1290 1291 /** 1292 * ata_noop_dev_select - Select device 0/1 on ATA bus 1293 * @ap: ATA channel to manipulate 1294 * @device: ATA device (numbered from zero) to select 1295 * 1296 * This function performs no actual function. 1297 * 1298 * May be used as the dev_select() entry in ata_port_operations. 1299 * 1300 * LOCKING: 1301 * caller. 1302 */ 1303 void ata_noop_dev_select(struct ata_port *ap, unsigned int device) 1304 { 1305 } 1306 1307 1308 /** 1309 * ata_std_dev_select - Select device 0/1 on ATA bus 1310 * @ap: ATA channel to manipulate 1311 * @device: ATA device (numbered from zero) to select 1312 * 1313 * Use the method defined in the ATA specification to 1314 * make either device 0, or device 1, active on the 1315 * ATA channel. Works with both PIO and MMIO. 1316 * 1317 * May be used as the dev_select() entry in ata_port_operations. 1318 * 1319 * LOCKING: 1320 * caller. 1321 */ 1322 1323 void ata_std_dev_select(struct ata_port *ap, unsigned int device) 1324 { 1325 u8 tmp; 1326 1327 if (device == 0) 1328 tmp = ATA_DEVICE_OBS; 1329 else 1330 tmp = ATA_DEVICE_OBS | ATA_DEV1; 1331 1332 iowrite8(tmp, ap->ioaddr.device_addr); 1333 ata_pause(ap); /* needed; also flushes, for mmio */ 1334 } 1335 1336 /** 1337 * ata_dev_select - Select device 0/1 on ATA bus 1338 * @ap: ATA channel to manipulate 1339 * @device: ATA device (numbered from zero) to select 1340 * @wait: non-zero to wait for Status register BSY bit to clear 1341 * @can_sleep: non-zero if context allows sleeping 1342 * 1343 * Use the method defined in the ATA specification to 1344 * make either device 0, or device 1, active on the 1345 * ATA channel. 1346 * 1347 * This is a high-level version of ata_std_dev_select(), 1348 * which additionally provides the services of inserting 1349 * the proper pauses and status polling, where needed. 1350 * 1351 * LOCKING: 1352 * caller. 1353 */ 1354 1355 void ata_dev_select(struct ata_port *ap, unsigned int device, 1356 unsigned int wait, unsigned int can_sleep) 1357 { 1358 if (ata_msg_probe(ap)) 1359 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, " 1360 "device %u, wait %u\n", device, wait); 1361 1362 if (wait) 1363 ata_wait_idle(ap); 1364 1365 ap->ops->dev_select(ap, device); 1366 1367 if (wait) { 1368 if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI) 1369 msleep(150); 1370 ata_wait_idle(ap); 1371 } 1372 } 1373 1374 /** 1375 * ata_dump_id - IDENTIFY DEVICE info debugging output 1376 * @id: IDENTIFY DEVICE page to dump 1377 * 1378 * Dump selected 16-bit words from the given IDENTIFY DEVICE 1379 * page. 1380 * 1381 * LOCKING: 1382 * caller. 1383 */ 1384 1385 static inline void ata_dump_id(const u16 *id) 1386 { 1387 DPRINTK("49==0x%04x " 1388 "53==0x%04x " 1389 "63==0x%04x " 1390 "64==0x%04x " 1391 "75==0x%04x \n", 1392 id[49], 1393 id[53], 1394 id[63], 1395 id[64], 1396 id[75]); 1397 DPRINTK("80==0x%04x " 1398 "81==0x%04x " 1399 "82==0x%04x " 1400 "83==0x%04x " 1401 "84==0x%04x \n", 1402 id[80], 1403 id[81], 1404 id[82], 1405 id[83], 1406 id[84]); 1407 DPRINTK("88==0x%04x " 1408 "93==0x%04x\n", 1409 id[88], 1410 id[93]); 1411 } 1412 1413 /** 1414 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data 1415 * @id: IDENTIFY data to compute xfer mask from 1416 * 1417 * Compute the xfermask for this device. This is not as trivial 1418 * as it seems if we must consider early devices correctly. 1419 * 1420 * FIXME: pre IDE drive timing (do we care ?). 1421 * 1422 * LOCKING: 1423 * None. 1424 * 1425 * RETURNS: 1426 * Computed xfermask 1427 */ 1428 unsigned long ata_id_xfermask(const u16 *id) 1429 { 1430 unsigned long pio_mask, mwdma_mask, udma_mask; 1431 1432 /* Usual case. Word 53 indicates word 64 is valid */ 1433 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) { 1434 pio_mask = id[ATA_ID_PIO_MODES] & 0x03; 1435 pio_mask <<= 3; 1436 pio_mask |= 0x7; 1437 } else { 1438 /* If word 64 isn't valid then Word 51 high byte holds 1439 * the PIO timing number for the maximum. Turn it into 1440 * a mask. 1441 */ 1442 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF; 1443 if (mode < 5) /* Valid PIO range */ 1444 pio_mask = (2 << mode) - 1; 1445 else 1446 pio_mask = 1; 1447 1448 /* But wait.. there's more. Design your standards by 1449 * committee and you too can get a free iordy field to 1450 * process. However its the speeds not the modes that 1451 * are supported... Note drivers using the timing API 1452 * will get this right anyway 1453 */ 1454 } 1455 1456 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07; 1457 1458 if (ata_id_is_cfa(id)) { 1459 /* 1460 * Process compact flash extended modes 1461 */ 1462 int pio = id[163] & 0x7; 1463 int dma = (id[163] >> 3) & 7; 1464 1465 if (pio) 1466 pio_mask |= (1 << 5); 1467 if (pio > 1) 1468 pio_mask |= (1 << 6); 1469 if (dma) 1470 mwdma_mask |= (1 << 3); 1471 if (dma > 1) 1472 mwdma_mask |= (1 << 4); 1473 } 1474 1475 udma_mask = 0; 1476 if (id[ATA_ID_FIELD_VALID] & (1 << 2)) 1477 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff; 1478 1479 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); 1480 } 1481 1482 /** 1483 * ata_pio_queue_task - Queue port_task 1484 * @ap: The ata_port to queue port_task for 1485 * @fn: workqueue function to be scheduled 1486 * @data: data for @fn to use 1487 * @delay: delay time for workqueue function 1488 * 1489 * Schedule @fn(@data) for execution after @delay jiffies using 1490 * port_task. There is one port_task per port and it's the 1491 * user(low level driver)'s responsibility to make sure that only 1492 * one task is active at any given time. 1493 * 1494 * libata core layer takes care of synchronization between 1495 * port_task and EH. ata_pio_queue_task() may be ignored for EH 1496 * synchronization. 1497 * 1498 * LOCKING: 1499 * Inherited from caller. 1500 */ 1501 static void ata_pio_queue_task(struct ata_port *ap, void *data, 1502 unsigned long delay) 1503 { 1504 ap->port_task_data = data; 1505 1506 /* may fail if ata_port_flush_task() in progress */ 1507 queue_delayed_work(ata_wq, &ap->port_task, delay); 1508 } 1509 1510 /** 1511 * ata_port_flush_task - Flush port_task 1512 * @ap: The ata_port to flush port_task for 1513 * 1514 * After this function completes, port_task is guranteed not to 1515 * be running or scheduled. 1516 * 1517 * LOCKING: 1518 * Kernel thread context (may sleep) 1519 */ 1520 void ata_port_flush_task(struct ata_port *ap) 1521 { 1522 DPRINTK("ENTER\n"); 1523 1524 cancel_rearming_delayed_work(&ap->port_task); 1525 1526 if (ata_msg_ctl(ap)) 1527 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__); 1528 } 1529 1530 static void ata_qc_complete_internal(struct ata_queued_cmd *qc) 1531 { 1532 struct completion *waiting = qc->private_data; 1533 1534 complete(waiting); 1535 } 1536 1537 /** 1538 * ata_exec_internal_sg - execute libata internal command 1539 * @dev: Device to which the command is sent 1540 * @tf: Taskfile registers for the command and the result 1541 * @cdb: CDB for packet command 1542 * @dma_dir: Data tranfer direction of the command 1543 * @sgl: sg list for the data buffer of the command 1544 * @n_elem: Number of sg entries 1545 * @timeout: Timeout in msecs (0 for default) 1546 * 1547 * Executes libata internal command with timeout. @tf contains 1548 * command on entry and result on return. Timeout and error 1549 * conditions are reported via return value. No recovery action 1550 * is taken after a command times out. It's caller's duty to 1551 * clean up after timeout. 1552 * 1553 * LOCKING: 1554 * None. Should be called with kernel context, might sleep. 1555 * 1556 * RETURNS: 1557 * Zero on success, AC_ERR_* mask on failure 1558 */ 1559 unsigned ata_exec_internal_sg(struct ata_device *dev, 1560 struct ata_taskfile *tf, const u8 *cdb, 1561 int dma_dir, struct scatterlist *sgl, 1562 unsigned int n_elem, unsigned long timeout) 1563 { 1564 struct ata_link *link = dev->link; 1565 struct ata_port *ap = link->ap; 1566 u8 command = tf->command; 1567 struct ata_queued_cmd *qc; 1568 unsigned int tag, preempted_tag; 1569 u32 preempted_sactive, preempted_qc_active; 1570 int preempted_nr_active_links; 1571 DECLARE_COMPLETION_ONSTACK(wait); 1572 unsigned long flags; 1573 unsigned int err_mask; 1574 int rc; 1575 1576 spin_lock_irqsave(ap->lock, flags); 1577 1578 /* no internal command while frozen */ 1579 if (ap->pflags & ATA_PFLAG_FROZEN) { 1580 spin_unlock_irqrestore(ap->lock, flags); 1581 return AC_ERR_SYSTEM; 1582 } 1583 1584 /* initialize internal qc */ 1585 1586 /* XXX: Tag 0 is used for drivers with legacy EH as some 1587 * drivers choke if any other tag is given. This breaks 1588 * ata_tag_internal() test for those drivers. Don't use new 1589 * EH stuff without converting to it. 1590 */ 1591 if (ap->ops->error_handler) 1592 tag = ATA_TAG_INTERNAL; 1593 else 1594 tag = 0; 1595 1596 if (test_and_set_bit(tag, &ap->qc_allocated)) 1597 BUG(); 1598 qc = __ata_qc_from_tag(ap, tag); 1599 1600 qc->tag = tag; 1601 qc->scsicmd = NULL; 1602 qc->ap = ap; 1603 qc->dev = dev; 1604 ata_qc_reinit(qc); 1605 1606 preempted_tag = link->active_tag; 1607 preempted_sactive = link->sactive; 1608 preempted_qc_active = ap->qc_active; 1609 preempted_nr_active_links = ap->nr_active_links; 1610 link->active_tag = ATA_TAG_POISON; 1611 link->sactive = 0; 1612 ap->qc_active = 0; 1613 ap->nr_active_links = 0; 1614 1615 /* prepare & issue qc */ 1616 qc->tf = *tf; 1617 if (cdb) 1618 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN); 1619 qc->flags |= ATA_QCFLAG_RESULT_TF; 1620 qc->dma_dir = dma_dir; 1621 if (dma_dir != DMA_NONE) { 1622 unsigned int i, buflen = 0; 1623 struct scatterlist *sg; 1624 1625 for_each_sg(sgl, sg, n_elem, i) 1626 buflen += sg->length; 1627 1628 ata_sg_init(qc, sgl, n_elem); 1629 qc->nbytes = buflen; 1630 } 1631 1632 qc->private_data = &wait; 1633 qc->complete_fn = ata_qc_complete_internal; 1634 1635 ata_qc_issue(qc); 1636 1637 spin_unlock_irqrestore(ap->lock, flags); 1638 1639 if (!timeout) 1640 timeout = ata_probe_timeout * 1000 / HZ; 1641 1642 rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout)); 1643 1644 ata_port_flush_task(ap); 1645 1646 if (!rc) { 1647 spin_lock_irqsave(ap->lock, flags); 1648 1649 /* We're racing with irq here. If we lose, the 1650 * following test prevents us from completing the qc 1651 * twice. If we win, the port is frozen and will be 1652 * cleaned up by ->post_internal_cmd(). 1653 */ 1654 if (qc->flags & ATA_QCFLAG_ACTIVE) { 1655 qc->err_mask |= AC_ERR_TIMEOUT; 1656 1657 if (ap->ops->error_handler) 1658 ata_port_freeze(ap); 1659 else 1660 ata_qc_complete(qc); 1661 1662 if (ata_msg_warn(ap)) 1663 ata_dev_printk(dev, KERN_WARNING, 1664 "qc timeout (cmd 0x%x)\n", command); 1665 } 1666 1667 spin_unlock_irqrestore(ap->lock, flags); 1668 } 1669 1670 /* do post_internal_cmd */ 1671 if (ap->ops->post_internal_cmd) 1672 ap->ops->post_internal_cmd(qc); 1673 1674 /* perform minimal error analysis */ 1675 if (qc->flags & ATA_QCFLAG_FAILED) { 1676 if (qc->result_tf.command & (ATA_ERR | ATA_DF)) 1677 qc->err_mask |= AC_ERR_DEV; 1678 1679 if (!qc->err_mask) 1680 qc->err_mask |= AC_ERR_OTHER; 1681 1682 if (qc->err_mask & ~AC_ERR_OTHER) 1683 qc->err_mask &= ~AC_ERR_OTHER; 1684 } 1685 1686 /* finish up */ 1687 spin_lock_irqsave(ap->lock, flags); 1688 1689 *tf = qc->result_tf; 1690 err_mask = qc->err_mask; 1691 1692 ata_qc_free(qc); 1693 link->active_tag = preempted_tag; 1694 link->sactive = preempted_sactive; 1695 ap->qc_active = preempted_qc_active; 1696 ap->nr_active_links = preempted_nr_active_links; 1697 1698 /* XXX - Some LLDDs (sata_mv) disable port on command failure. 1699 * Until those drivers are fixed, we detect the condition 1700 * here, fail the command with AC_ERR_SYSTEM and reenable the 1701 * port. 1702 * 1703 * Note that this doesn't change any behavior as internal 1704 * command failure results in disabling the device in the 1705 * higher layer for LLDDs without new reset/EH callbacks. 1706 * 1707 * Kill the following code as soon as those drivers are fixed. 1708 */ 1709 if (ap->flags & ATA_FLAG_DISABLED) { 1710 err_mask |= AC_ERR_SYSTEM; 1711 ata_port_probe(ap); 1712 } 1713 1714 spin_unlock_irqrestore(ap->lock, flags); 1715 1716 return err_mask; 1717 } 1718 1719 /** 1720 * ata_exec_internal - execute libata internal command 1721 * @dev: Device to which the command is sent 1722 * @tf: Taskfile registers for the command and the result 1723 * @cdb: CDB for packet command 1724 * @dma_dir: Data tranfer direction of the command 1725 * @buf: Data buffer of the command 1726 * @buflen: Length of data buffer 1727 * @timeout: Timeout in msecs (0 for default) 1728 * 1729 * Wrapper around ata_exec_internal_sg() which takes simple 1730 * buffer instead of sg list. 1731 * 1732 * LOCKING: 1733 * None. Should be called with kernel context, might sleep. 1734 * 1735 * RETURNS: 1736 * Zero on success, AC_ERR_* mask on failure 1737 */ 1738 unsigned ata_exec_internal(struct ata_device *dev, 1739 struct ata_taskfile *tf, const u8 *cdb, 1740 int dma_dir, void *buf, unsigned int buflen, 1741 unsigned long timeout) 1742 { 1743 struct scatterlist *psg = NULL, sg; 1744 unsigned int n_elem = 0; 1745 1746 if (dma_dir != DMA_NONE) { 1747 WARN_ON(!buf); 1748 sg_init_one(&sg, buf, buflen); 1749 psg = &sg; 1750 n_elem++; 1751 } 1752 1753 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem, 1754 timeout); 1755 } 1756 1757 /** 1758 * ata_do_simple_cmd - execute simple internal command 1759 * @dev: Device to which the command is sent 1760 * @cmd: Opcode to execute 1761 * 1762 * Execute a 'simple' command, that only consists of the opcode 1763 * 'cmd' itself, without filling any other registers 1764 * 1765 * LOCKING: 1766 * Kernel thread context (may sleep). 1767 * 1768 * RETURNS: 1769 * Zero on success, AC_ERR_* mask on failure 1770 */ 1771 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd) 1772 { 1773 struct ata_taskfile tf; 1774 1775 ata_tf_init(dev, &tf); 1776 1777 tf.command = cmd; 1778 tf.flags |= ATA_TFLAG_DEVICE; 1779 tf.protocol = ATA_PROT_NODATA; 1780 1781 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); 1782 } 1783 1784 /** 1785 * ata_pio_need_iordy - check if iordy needed 1786 * @adev: ATA device 1787 * 1788 * Check if the current speed of the device requires IORDY. Used 1789 * by various controllers for chip configuration. 1790 */ 1791 1792 unsigned int ata_pio_need_iordy(const struct ata_device *adev) 1793 { 1794 /* Controller doesn't support IORDY. Probably a pointless check 1795 as the caller should know this */ 1796 if (adev->link->ap->flags & ATA_FLAG_NO_IORDY) 1797 return 0; 1798 /* PIO3 and higher it is mandatory */ 1799 if (adev->pio_mode > XFER_PIO_2) 1800 return 1; 1801 /* We turn it on when possible */ 1802 if (ata_id_has_iordy(adev->id)) 1803 return 1; 1804 return 0; 1805 } 1806 1807 /** 1808 * ata_pio_mask_no_iordy - Return the non IORDY mask 1809 * @adev: ATA device 1810 * 1811 * Compute the highest mode possible if we are not using iordy. Return 1812 * -1 if no iordy mode is available. 1813 */ 1814 1815 static u32 ata_pio_mask_no_iordy(const struct ata_device *adev) 1816 { 1817 /* If we have no drive specific rule, then PIO 2 is non IORDY */ 1818 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */ 1819 u16 pio = adev->id[ATA_ID_EIDE_PIO]; 1820 /* Is the speed faster than the drive allows non IORDY ? */ 1821 if (pio) { 1822 /* This is cycle times not frequency - watch the logic! */ 1823 if (pio > 240) /* PIO2 is 240nS per cycle */ 1824 return 3 << ATA_SHIFT_PIO; 1825 return 7 << ATA_SHIFT_PIO; 1826 } 1827 } 1828 return 3 << ATA_SHIFT_PIO; 1829 } 1830 1831 /** 1832 * ata_dev_read_id - Read ID data from the specified device 1833 * @dev: target device 1834 * @p_class: pointer to class of the target device (may be changed) 1835 * @flags: ATA_READID_* flags 1836 * @id: buffer to read IDENTIFY data into 1837 * 1838 * Read ID data from the specified device. ATA_CMD_ID_ATA is 1839 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI 1840 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS 1841 * for pre-ATA4 drives. 1842 * 1843 * FIXME: ATA_CMD_ID_ATA is optional for early drives and right 1844 * now we abort if we hit that case. 1845 * 1846 * LOCKING: 1847 * Kernel thread context (may sleep) 1848 * 1849 * RETURNS: 1850 * 0 on success, -errno otherwise. 1851 */ 1852 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class, 1853 unsigned int flags, u16 *id) 1854 { 1855 struct ata_port *ap = dev->link->ap; 1856 unsigned int class = *p_class; 1857 struct ata_taskfile tf; 1858 unsigned int err_mask = 0; 1859 const char *reason; 1860 int may_fallback = 1, tried_spinup = 0; 1861 int rc; 1862 1863 if (ata_msg_ctl(ap)) 1864 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__); 1865 1866 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */ 1867 retry: 1868 ata_tf_init(dev, &tf); 1869 1870 switch (class) { 1871 case ATA_DEV_ATA: 1872 tf.command = ATA_CMD_ID_ATA; 1873 break; 1874 case ATA_DEV_ATAPI: 1875 tf.command = ATA_CMD_ID_ATAPI; 1876 break; 1877 default: 1878 rc = -ENODEV; 1879 reason = "unsupported class"; 1880 goto err_out; 1881 } 1882 1883 tf.protocol = ATA_PROT_PIO; 1884 1885 /* Some devices choke if TF registers contain garbage. Make 1886 * sure those are properly initialized. 1887 */ 1888 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 1889 1890 /* Device presence detection is unreliable on some 1891 * controllers. Always poll IDENTIFY if available. 1892 */ 1893 tf.flags |= ATA_TFLAG_POLLING; 1894 1895 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE, 1896 id, sizeof(id[0]) * ATA_ID_WORDS, 0); 1897 if (err_mask) { 1898 if (err_mask & AC_ERR_NODEV_HINT) { 1899 DPRINTK("ata%u.%d: NODEV after polling detection\n", 1900 ap->print_id, dev->devno); 1901 return -ENOENT; 1902 } 1903 1904 /* Device or controller might have reported the wrong 1905 * device class. Give a shot at the other IDENTIFY if 1906 * the current one is aborted by the device. 1907 */ 1908 if (may_fallback && 1909 (err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) { 1910 may_fallback = 0; 1911 1912 if (class == ATA_DEV_ATA) 1913 class = ATA_DEV_ATAPI; 1914 else 1915 class = ATA_DEV_ATA; 1916 goto retry; 1917 } 1918 1919 rc = -EIO; 1920 reason = "I/O error"; 1921 goto err_out; 1922 } 1923 1924 /* Falling back doesn't make sense if ID data was read 1925 * successfully at least once. 1926 */ 1927 may_fallback = 0; 1928 1929 swap_buf_le16(id, ATA_ID_WORDS); 1930 1931 /* sanity check */ 1932 rc = -EINVAL; 1933 reason = "device reports invalid type"; 1934 1935 if (class == ATA_DEV_ATA) { 1936 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id)) 1937 goto err_out; 1938 } else { 1939 if (ata_id_is_ata(id)) 1940 goto err_out; 1941 } 1942 1943 if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) { 1944 tried_spinup = 1; 1945 /* 1946 * Drive powered-up in standby mode, and requires a specific 1947 * SET_FEATURES spin-up subcommand before it will accept 1948 * anything other than the original IDENTIFY command. 1949 */ 1950 err_mask = ata_dev_set_feature(dev, SETFEATURES_SPINUP, 0); 1951 if (err_mask && id[2] != 0x738c) { 1952 rc = -EIO; 1953 reason = "SPINUP failed"; 1954 goto err_out; 1955 } 1956 /* 1957 * If the drive initially returned incomplete IDENTIFY info, 1958 * we now must reissue the IDENTIFY command. 1959 */ 1960 if (id[2] == 0x37c8) 1961 goto retry; 1962 } 1963 1964 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) { 1965 /* 1966 * The exact sequence expected by certain pre-ATA4 drives is: 1967 * SRST RESET 1968 * IDENTIFY (optional in early ATA) 1969 * INITIALIZE DEVICE PARAMETERS (later IDE and ATA) 1970 * anything else.. 1971 * Some drives were very specific about that exact sequence. 1972 * 1973 * Note that ATA4 says lba is mandatory so the second check 1974 * shoud never trigger. 1975 */ 1976 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) { 1977 err_mask = ata_dev_init_params(dev, id[3], id[6]); 1978 if (err_mask) { 1979 rc = -EIO; 1980 reason = "INIT_DEV_PARAMS failed"; 1981 goto err_out; 1982 } 1983 1984 /* current CHS translation info (id[53-58]) might be 1985 * changed. reread the identify device info. 1986 */ 1987 flags &= ~ATA_READID_POSTRESET; 1988 goto retry; 1989 } 1990 } 1991 1992 *p_class = class; 1993 1994 return 0; 1995 1996 err_out: 1997 if (ata_msg_warn(ap)) 1998 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY " 1999 "(%s, err_mask=0x%x)\n", reason, err_mask); 2000 return rc; 2001 } 2002 2003 static inline u8 ata_dev_knobble(struct ata_device *dev) 2004 { 2005 struct ata_port *ap = dev->link->ap; 2006 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id))); 2007 } 2008 2009 static void ata_dev_config_ncq(struct ata_device *dev, 2010 char *desc, size_t desc_sz) 2011 { 2012 struct ata_port *ap = dev->link->ap; 2013 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id); 2014 2015 if (!ata_id_has_ncq(dev->id)) { 2016 desc[0] = '\0'; 2017 return; 2018 } 2019 if (dev->horkage & ATA_HORKAGE_NONCQ) { 2020 snprintf(desc, desc_sz, "NCQ (not used)"); 2021 return; 2022 } 2023 if (ap->flags & ATA_FLAG_NCQ) { 2024 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1); 2025 dev->flags |= ATA_DFLAG_NCQ; 2026 } 2027 2028 if (hdepth >= ddepth) 2029 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth); 2030 else 2031 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth); 2032 } 2033 2034 /** 2035 * ata_dev_configure - Configure the specified ATA/ATAPI device 2036 * @dev: Target device to configure 2037 * 2038 * Configure @dev according to @dev->id. Generic and low-level 2039 * driver specific fixups are also applied. 2040 * 2041 * LOCKING: 2042 * Kernel thread context (may sleep) 2043 * 2044 * RETURNS: 2045 * 0 on success, -errno otherwise 2046 */ 2047 int ata_dev_configure(struct ata_device *dev) 2048 { 2049 struct ata_port *ap = dev->link->ap; 2050 struct ata_eh_context *ehc = &dev->link->eh_context; 2051 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO; 2052 const u16 *id = dev->id; 2053 unsigned long xfer_mask; 2054 char revbuf[7]; /* XYZ-99\0 */ 2055 char fwrevbuf[ATA_ID_FW_REV_LEN+1]; 2056 char modelbuf[ATA_ID_PROD_LEN+1]; 2057 int rc; 2058 2059 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) { 2060 ata_dev_printk(dev, KERN_INFO, "%s: ENTER/EXIT -- nodev\n", 2061 __FUNCTION__); 2062 return 0; 2063 } 2064 2065 if (ata_msg_probe(ap)) 2066 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__); 2067 2068 /* set horkage */ 2069 dev->horkage |= ata_dev_blacklisted(dev); 2070 2071 /* let ACPI work its magic */ 2072 rc = ata_acpi_on_devcfg(dev); 2073 if (rc) 2074 return rc; 2075 2076 /* massage HPA, do it early as it might change IDENTIFY data */ 2077 rc = ata_hpa_resize(dev); 2078 if (rc) 2079 return rc; 2080 2081 /* print device capabilities */ 2082 if (ata_msg_probe(ap)) 2083 ata_dev_printk(dev, KERN_DEBUG, 2084 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x " 2085 "85:%04x 86:%04x 87:%04x 88:%04x\n", 2086 __FUNCTION__, 2087 id[49], id[82], id[83], id[84], 2088 id[85], id[86], id[87], id[88]); 2089 2090 /* initialize to-be-configured parameters */ 2091 dev->flags &= ~ATA_DFLAG_CFG_MASK; 2092 dev->max_sectors = 0; 2093 dev->cdb_len = 0; 2094 dev->n_sectors = 0; 2095 dev->cylinders = 0; 2096 dev->heads = 0; 2097 dev->sectors = 0; 2098 2099 /* 2100 * common ATA, ATAPI feature tests 2101 */ 2102 2103 /* find max transfer mode; for printk only */ 2104 xfer_mask = ata_id_xfermask(id); 2105 2106 if (ata_msg_probe(ap)) 2107 ata_dump_id(id); 2108 2109 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */ 2110 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV, 2111 sizeof(fwrevbuf)); 2112 2113 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD, 2114 sizeof(modelbuf)); 2115 2116 /* ATA-specific feature tests */ 2117 if (dev->class == ATA_DEV_ATA) { 2118 if (ata_id_is_cfa(id)) { 2119 if (id[162] & 1) /* CPRM may make this media unusable */ 2120 ata_dev_printk(dev, KERN_WARNING, 2121 "supports DRM functions and may " 2122 "not be fully accessable.\n"); 2123 snprintf(revbuf, 7, "CFA"); 2124 } else { 2125 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id)); 2126 /* Warn the user if the device has TPM extensions */ 2127 if (ata_id_has_tpm(id)) 2128 ata_dev_printk(dev, KERN_WARNING, 2129 "supports DRM functions and may " 2130 "not be fully accessable.\n"); 2131 } 2132 2133 dev->n_sectors = ata_id_n_sectors(id); 2134 2135 if (dev->id[59] & 0x100) 2136 dev->multi_count = dev->id[59] & 0xff; 2137 2138 if (ata_id_has_lba(id)) { 2139 const char *lba_desc; 2140 char ncq_desc[20]; 2141 2142 lba_desc = "LBA"; 2143 dev->flags |= ATA_DFLAG_LBA; 2144 if (ata_id_has_lba48(id)) { 2145 dev->flags |= ATA_DFLAG_LBA48; 2146 lba_desc = "LBA48"; 2147 2148 if (dev->n_sectors >= (1UL << 28) && 2149 ata_id_has_flush_ext(id)) 2150 dev->flags |= ATA_DFLAG_FLUSH_EXT; 2151 } 2152 2153 /* config NCQ */ 2154 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc)); 2155 2156 /* print device info to dmesg */ 2157 if (ata_msg_drv(ap) && print_info) { 2158 ata_dev_printk(dev, KERN_INFO, 2159 "%s: %s, %s, max %s\n", 2160 revbuf, modelbuf, fwrevbuf, 2161 ata_mode_string(xfer_mask)); 2162 ata_dev_printk(dev, KERN_INFO, 2163 "%Lu sectors, multi %u: %s %s\n", 2164 (unsigned long long)dev->n_sectors, 2165 dev->multi_count, lba_desc, ncq_desc); 2166 } 2167 } else { 2168 /* CHS */ 2169 2170 /* Default translation */ 2171 dev->cylinders = id[1]; 2172 dev->heads = id[3]; 2173 dev->sectors = id[6]; 2174 2175 if (ata_id_current_chs_valid(id)) { 2176 /* Current CHS translation is valid. */ 2177 dev->cylinders = id[54]; 2178 dev->heads = id[55]; 2179 dev->sectors = id[56]; 2180 } 2181 2182 /* print device info to dmesg */ 2183 if (ata_msg_drv(ap) && print_info) { 2184 ata_dev_printk(dev, KERN_INFO, 2185 "%s: %s, %s, max %s\n", 2186 revbuf, modelbuf, fwrevbuf, 2187 ata_mode_string(xfer_mask)); 2188 ata_dev_printk(dev, KERN_INFO, 2189 "%Lu sectors, multi %u, CHS %u/%u/%u\n", 2190 (unsigned long long)dev->n_sectors, 2191 dev->multi_count, dev->cylinders, 2192 dev->heads, dev->sectors); 2193 } 2194 } 2195 2196 dev->cdb_len = 16; 2197 } 2198 2199 /* ATAPI-specific feature tests */ 2200 else if (dev->class == ATA_DEV_ATAPI) { 2201 const char *cdb_intr_string = ""; 2202 const char *atapi_an_string = ""; 2203 u32 sntf; 2204 2205 rc = atapi_cdb_len(id); 2206 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { 2207 if (ata_msg_warn(ap)) 2208 ata_dev_printk(dev, KERN_WARNING, 2209 "unsupported CDB len\n"); 2210 rc = -EINVAL; 2211 goto err_out_nosup; 2212 } 2213 dev->cdb_len = (unsigned int) rc; 2214 2215 /* Enable ATAPI AN if both the host and device have 2216 * the support. If PMP is attached, SNTF is required 2217 * to enable ATAPI AN to discern between PHY status 2218 * changed notifications and ATAPI ANs. 2219 */ 2220 if ((ap->flags & ATA_FLAG_AN) && ata_id_has_atapi_AN(id) && 2221 (!ap->nr_pmp_links || 2222 sata_scr_read(&ap->link, SCR_NOTIFICATION, &sntf) == 0)) { 2223 unsigned int err_mask; 2224 2225 /* issue SET feature command to turn this on */ 2226 err_mask = ata_dev_set_feature(dev, 2227 SETFEATURES_SATA_ENABLE, SATA_AN); 2228 if (err_mask) 2229 ata_dev_printk(dev, KERN_ERR, 2230 "failed to enable ATAPI AN " 2231 "(err_mask=0x%x)\n", err_mask); 2232 else { 2233 dev->flags |= ATA_DFLAG_AN; 2234 atapi_an_string = ", ATAPI AN"; 2235 } 2236 } 2237 2238 if (ata_id_cdb_intr(dev->id)) { 2239 dev->flags |= ATA_DFLAG_CDB_INTR; 2240 cdb_intr_string = ", CDB intr"; 2241 } 2242 2243 /* print device info to dmesg */ 2244 if (ata_msg_drv(ap) && print_info) 2245 ata_dev_printk(dev, KERN_INFO, 2246 "ATAPI: %s, %s, max %s%s%s\n", 2247 modelbuf, fwrevbuf, 2248 ata_mode_string(xfer_mask), 2249 cdb_intr_string, atapi_an_string); 2250 } 2251 2252 /* determine max_sectors */ 2253 dev->max_sectors = ATA_MAX_SECTORS; 2254 if (dev->flags & ATA_DFLAG_LBA48) 2255 dev->max_sectors = ATA_MAX_SECTORS_LBA48; 2256 2257 if (!(dev->horkage & ATA_HORKAGE_IPM)) { 2258 if (ata_id_has_hipm(dev->id)) 2259 dev->flags |= ATA_DFLAG_HIPM; 2260 if (ata_id_has_dipm(dev->id)) 2261 dev->flags |= ATA_DFLAG_DIPM; 2262 } 2263 2264 /* Limit PATA drive on SATA cable bridge transfers to udma5, 2265 200 sectors */ 2266 if (ata_dev_knobble(dev)) { 2267 if (ata_msg_drv(ap) && print_info) 2268 ata_dev_printk(dev, KERN_INFO, 2269 "applying bridge limits\n"); 2270 dev->udma_mask &= ATA_UDMA5; 2271 dev->max_sectors = ATA_MAX_SECTORS; 2272 } 2273 2274 if ((dev->class == ATA_DEV_ATAPI) && 2275 (atapi_command_packet_set(id) == TYPE_TAPE)) { 2276 dev->max_sectors = ATA_MAX_SECTORS_TAPE; 2277 dev->horkage |= ATA_HORKAGE_STUCK_ERR; 2278 } 2279 2280 if (dev->horkage & ATA_HORKAGE_MAX_SEC_128) 2281 dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128, 2282 dev->max_sectors); 2283 2284 if (ata_dev_blacklisted(dev) & ATA_HORKAGE_IPM) { 2285 dev->horkage |= ATA_HORKAGE_IPM; 2286 2287 /* reset link pm_policy for this port to no pm */ 2288 ap->pm_policy = MAX_PERFORMANCE; 2289 } 2290 2291 if (ap->ops->dev_config) 2292 ap->ops->dev_config(dev); 2293 2294 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) { 2295 /* Let the user know. We don't want to disallow opens for 2296 rescue purposes, or in case the vendor is just a blithering 2297 idiot. Do this after the dev_config call as some controllers 2298 with buggy firmware may want to avoid reporting false device 2299 bugs */ 2300 2301 if (print_info) { 2302 ata_dev_printk(dev, KERN_WARNING, 2303 "Drive reports diagnostics failure. This may indicate a drive\n"); 2304 ata_dev_printk(dev, KERN_WARNING, 2305 "fault or invalid emulation. Contact drive vendor for information.\n"); 2306 } 2307 } 2308 2309 if (ata_msg_probe(ap)) 2310 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n", 2311 __FUNCTION__, ata_chk_status(ap)); 2312 return 0; 2313 2314 err_out_nosup: 2315 if (ata_msg_probe(ap)) 2316 ata_dev_printk(dev, KERN_DEBUG, 2317 "%s: EXIT, err\n", __FUNCTION__); 2318 return rc; 2319 } 2320 2321 /** 2322 * ata_cable_40wire - return 40 wire cable type 2323 * @ap: port 2324 * 2325 * Helper method for drivers which want to hardwire 40 wire cable 2326 * detection. 2327 */ 2328 2329 int ata_cable_40wire(struct ata_port *ap) 2330 { 2331 return ATA_CBL_PATA40; 2332 } 2333 2334 /** 2335 * ata_cable_80wire - return 80 wire cable type 2336 * @ap: port 2337 * 2338 * Helper method for drivers which want to hardwire 80 wire cable 2339 * detection. 2340 */ 2341 2342 int ata_cable_80wire(struct ata_port *ap) 2343 { 2344 return ATA_CBL_PATA80; 2345 } 2346 2347 /** 2348 * ata_cable_unknown - return unknown PATA cable. 2349 * @ap: port 2350 * 2351 * Helper method for drivers which have no PATA cable detection. 2352 */ 2353 2354 int ata_cable_unknown(struct ata_port *ap) 2355 { 2356 return ATA_CBL_PATA_UNK; 2357 } 2358 2359 /** 2360 * ata_cable_ignore - return ignored PATA cable. 2361 * @ap: port 2362 * 2363 * Helper method for drivers which don't use cable type to limit 2364 * transfer mode. 2365 */ 2366 int ata_cable_ignore(struct ata_port *ap) 2367 { 2368 return ATA_CBL_PATA_IGN; 2369 } 2370 2371 /** 2372 * ata_cable_sata - return SATA cable type 2373 * @ap: port 2374 * 2375 * Helper method for drivers which have SATA cables 2376 */ 2377 2378 int ata_cable_sata(struct ata_port *ap) 2379 { 2380 return ATA_CBL_SATA; 2381 } 2382 2383 /** 2384 * ata_bus_probe - Reset and probe ATA bus 2385 * @ap: Bus to probe 2386 * 2387 * Master ATA bus probing function. Initiates a hardware-dependent 2388 * bus reset, then attempts to identify any devices found on 2389 * the bus. 2390 * 2391 * LOCKING: 2392 * PCI/etc. bus probe sem. 2393 * 2394 * RETURNS: 2395 * Zero on success, negative errno otherwise. 2396 */ 2397 2398 int ata_bus_probe(struct ata_port *ap) 2399 { 2400 unsigned int classes[ATA_MAX_DEVICES]; 2401 int tries[ATA_MAX_DEVICES]; 2402 int rc; 2403 struct ata_device *dev; 2404 2405 ata_port_probe(ap); 2406 2407 ata_link_for_each_dev(dev, &ap->link) 2408 tries[dev->devno] = ATA_PROBE_MAX_TRIES; 2409 2410 retry: 2411 ata_link_for_each_dev(dev, &ap->link) { 2412 /* If we issue an SRST then an ATA drive (not ATAPI) 2413 * may change configuration and be in PIO0 timing. If 2414 * we do a hard reset (or are coming from power on) 2415 * this is true for ATA or ATAPI. Until we've set a 2416 * suitable controller mode we should not touch the 2417 * bus as we may be talking too fast. 2418 */ 2419 dev->pio_mode = XFER_PIO_0; 2420 2421 /* If the controller has a pio mode setup function 2422 * then use it to set the chipset to rights. Don't 2423 * touch the DMA setup as that will be dealt with when 2424 * configuring devices. 2425 */ 2426 if (ap->ops->set_piomode) 2427 ap->ops->set_piomode(ap, dev); 2428 } 2429 2430 /* reset and determine device classes */ 2431 ap->ops->phy_reset(ap); 2432 2433 ata_link_for_each_dev(dev, &ap->link) { 2434 if (!(ap->flags & ATA_FLAG_DISABLED) && 2435 dev->class != ATA_DEV_UNKNOWN) 2436 classes[dev->devno] = dev->class; 2437 else 2438 classes[dev->devno] = ATA_DEV_NONE; 2439 2440 dev->class = ATA_DEV_UNKNOWN; 2441 } 2442 2443 ata_port_probe(ap); 2444 2445 /* read IDENTIFY page and configure devices. We have to do the identify 2446 specific sequence bass-ackwards so that PDIAG- is released by 2447 the slave device */ 2448 2449 ata_link_for_each_dev(dev, &ap->link) { 2450 if (tries[dev->devno]) 2451 dev->class = classes[dev->devno]; 2452 2453 if (!ata_dev_enabled(dev)) 2454 continue; 2455 2456 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET, 2457 dev->id); 2458 if (rc) 2459 goto fail; 2460 } 2461 2462 /* Now ask for the cable type as PDIAG- should have been released */ 2463 if (ap->ops->cable_detect) 2464 ap->cbl = ap->ops->cable_detect(ap); 2465 2466 /* We may have SATA bridge glue hiding here irrespective of the 2467 reported cable types and sensed types */ 2468 ata_link_for_each_dev(dev, &ap->link) { 2469 if (!ata_dev_enabled(dev)) 2470 continue; 2471 /* SATA drives indicate we have a bridge. We don't know which 2472 end of the link the bridge is which is a problem */ 2473 if (ata_id_is_sata(dev->id)) 2474 ap->cbl = ATA_CBL_SATA; 2475 } 2476 2477 /* After the identify sequence we can now set up the devices. We do 2478 this in the normal order so that the user doesn't get confused */ 2479 2480 ata_link_for_each_dev(dev, &ap->link) { 2481 if (!ata_dev_enabled(dev)) 2482 continue; 2483 2484 ap->link.eh_context.i.flags |= ATA_EHI_PRINTINFO; 2485 rc = ata_dev_configure(dev); 2486 ap->link.eh_context.i.flags &= ~ATA_EHI_PRINTINFO; 2487 if (rc) 2488 goto fail; 2489 } 2490 2491 /* configure transfer mode */ 2492 rc = ata_set_mode(&ap->link, &dev); 2493 if (rc) 2494 goto fail; 2495 2496 ata_link_for_each_dev(dev, &ap->link) 2497 if (ata_dev_enabled(dev)) 2498 return 0; 2499 2500 /* no device present, disable port */ 2501 ata_port_disable(ap); 2502 return -ENODEV; 2503 2504 fail: 2505 tries[dev->devno]--; 2506 2507 switch (rc) { 2508 case -EINVAL: 2509 /* eeek, something went very wrong, give up */ 2510 tries[dev->devno] = 0; 2511 break; 2512 2513 case -ENODEV: 2514 /* give it just one more chance */ 2515 tries[dev->devno] = min(tries[dev->devno], 1); 2516 case -EIO: 2517 if (tries[dev->devno] == 1) { 2518 /* This is the last chance, better to slow 2519 * down than lose it. 2520 */ 2521 sata_down_spd_limit(&ap->link); 2522 ata_down_xfermask_limit(dev, ATA_DNXFER_PIO); 2523 } 2524 } 2525 2526 if (!tries[dev->devno]) 2527 ata_dev_disable(dev); 2528 2529 goto retry; 2530 } 2531 2532 /** 2533 * ata_port_probe - Mark port as enabled 2534 * @ap: Port for which we indicate enablement 2535 * 2536 * Modify @ap data structure such that the system 2537 * thinks that the entire port is enabled. 2538 * 2539 * LOCKING: host lock, or some other form of 2540 * serialization. 2541 */ 2542 2543 void ata_port_probe(struct ata_port *ap) 2544 { 2545 ap->flags &= ~ATA_FLAG_DISABLED; 2546 } 2547 2548 /** 2549 * sata_print_link_status - Print SATA link status 2550 * @link: SATA link to printk link status about 2551 * 2552 * This function prints link speed and status of a SATA link. 2553 * 2554 * LOCKING: 2555 * None. 2556 */ 2557 void sata_print_link_status(struct ata_link *link) 2558 { 2559 u32 sstatus, scontrol, tmp; 2560 2561 if (sata_scr_read(link, SCR_STATUS, &sstatus)) 2562 return; 2563 sata_scr_read(link, SCR_CONTROL, &scontrol); 2564 2565 if (ata_link_online(link)) { 2566 tmp = (sstatus >> 4) & 0xf; 2567 ata_link_printk(link, KERN_INFO, 2568 "SATA link up %s (SStatus %X SControl %X)\n", 2569 sata_spd_string(tmp), sstatus, scontrol); 2570 } else { 2571 ata_link_printk(link, KERN_INFO, 2572 "SATA link down (SStatus %X SControl %X)\n", 2573 sstatus, scontrol); 2574 } 2575 } 2576 2577 /** 2578 * ata_dev_pair - return other device on cable 2579 * @adev: device 2580 * 2581 * Obtain the other device on the same cable, or if none is 2582 * present NULL is returned 2583 */ 2584 2585 struct ata_device *ata_dev_pair(struct ata_device *adev) 2586 { 2587 struct ata_link *link = adev->link; 2588 struct ata_device *pair = &link->device[1 - adev->devno]; 2589 if (!ata_dev_enabled(pair)) 2590 return NULL; 2591 return pair; 2592 } 2593 2594 /** 2595 * ata_port_disable - Disable port. 2596 * @ap: Port to be disabled. 2597 * 2598 * Modify @ap data structure such that the system 2599 * thinks that the entire port is disabled, and should 2600 * never attempt to probe or communicate with devices 2601 * on this port. 2602 * 2603 * LOCKING: host lock, or some other form of 2604 * serialization. 2605 */ 2606 2607 void ata_port_disable(struct ata_port *ap) 2608 { 2609 ap->link.device[0].class = ATA_DEV_NONE; 2610 ap->link.device[1].class = ATA_DEV_NONE; 2611 ap->flags |= ATA_FLAG_DISABLED; 2612 } 2613 2614 /** 2615 * sata_down_spd_limit - adjust SATA spd limit downward 2616 * @link: Link to adjust SATA spd limit for 2617 * 2618 * Adjust SATA spd limit of @link downward. Note that this 2619 * function only adjusts the limit. The change must be applied 2620 * using sata_set_spd(). 2621 * 2622 * LOCKING: 2623 * Inherited from caller. 2624 * 2625 * RETURNS: 2626 * 0 on success, negative errno on failure 2627 */ 2628 int sata_down_spd_limit(struct ata_link *link) 2629 { 2630 u32 sstatus, spd, mask; 2631 int rc, highbit; 2632 2633 if (!sata_scr_valid(link)) 2634 return -EOPNOTSUPP; 2635 2636 /* If SCR can be read, use it to determine the current SPD. 2637 * If not, use cached value in link->sata_spd. 2638 */ 2639 rc = sata_scr_read(link, SCR_STATUS, &sstatus); 2640 if (rc == 0) 2641 spd = (sstatus >> 4) & 0xf; 2642 else 2643 spd = link->sata_spd; 2644 2645 mask = link->sata_spd_limit; 2646 if (mask <= 1) 2647 return -EINVAL; 2648 2649 /* unconditionally mask off the highest bit */ 2650 highbit = fls(mask) - 1; 2651 mask &= ~(1 << highbit); 2652 2653 /* Mask off all speeds higher than or equal to the current 2654 * one. Force 1.5Gbps if current SPD is not available. 2655 */ 2656 if (spd > 1) 2657 mask &= (1 << (spd - 1)) - 1; 2658 else 2659 mask &= 1; 2660 2661 /* were we already at the bottom? */ 2662 if (!mask) 2663 return -EINVAL; 2664 2665 link->sata_spd_limit = mask; 2666 2667 ata_link_printk(link, KERN_WARNING, "limiting SATA link speed to %s\n", 2668 sata_spd_string(fls(mask))); 2669 2670 return 0; 2671 } 2672 2673 static int __sata_set_spd_needed(struct ata_link *link, u32 *scontrol) 2674 { 2675 struct ata_link *host_link = &link->ap->link; 2676 u32 limit, target, spd; 2677 2678 limit = link->sata_spd_limit; 2679 2680 /* Don't configure downstream link faster than upstream link. 2681 * It doesn't speed up anything and some PMPs choke on such 2682 * configuration. 2683 */ 2684 if (!ata_is_host_link(link) && host_link->sata_spd) 2685 limit &= (1 << host_link->sata_spd) - 1; 2686 2687 if (limit == UINT_MAX) 2688 target = 0; 2689 else 2690 target = fls(limit); 2691 2692 spd = (*scontrol >> 4) & 0xf; 2693 *scontrol = (*scontrol & ~0xf0) | ((target & 0xf) << 4); 2694 2695 return spd != target; 2696 } 2697 2698 /** 2699 * sata_set_spd_needed - is SATA spd configuration needed 2700 * @link: Link in question 2701 * 2702 * Test whether the spd limit in SControl matches 2703 * @link->sata_spd_limit. This function is used to determine 2704 * whether hardreset is necessary to apply SATA spd 2705 * configuration. 2706 * 2707 * LOCKING: 2708 * Inherited from caller. 2709 * 2710 * RETURNS: 2711 * 1 if SATA spd configuration is needed, 0 otherwise. 2712 */ 2713 int sata_set_spd_needed(struct ata_link *link) 2714 { 2715 u32 scontrol; 2716 2717 if (sata_scr_read(link, SCR_CONTROL, &scontrol)) 2718 return 1; 2719 2720 return __sata_set_spd_needed(link, &scontrol); 2721 } 2722 2723 /** 2724 * sata_set_spd - set SATA spd according to spd limit 2725 * @link: Link to set SATA spd for 2726 * 2727 * Set SATA spd of @link according to sata_spd_limit. 2728 * 2729 * LOCKING: 2730 * Inherited from caller. 2731 * 2732 * RETURNS: 2733 * 0 if spd doesn't need to be changed, 1 if spd has been 2734 * changed. Negative errno if SCR registers are inaccessible. 2735 */ 2736 int sata_set_spd(struct ata_link *link) 2737 { 2738 u32 scontrol; 2739 int rc; 2740 2741 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) 2742 return rc; 2743 2744 if (!__sata_set_spd_needed(link, &scontrol)) 2745 return 0; 2746 2747 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol))) 2748 return rc; 2749 2750 return 1; 2751 } 2752 2753 /* 2754 * This mode timing computation functionality is ported over from 2755 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik 2756 */ 2757 /* 2758 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds). 2759 * These were taken from ATA/ATAPI-6 standard, rev 0a, except 2760 * for UDMA6, which is currently supported only by Maxtor drives. 2761 * 2762 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0. 2763 */ 2764 2765 static const struct ata_timing ata_timing[] = { 2766 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */ 2767 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 }, 2768 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 }, 2769 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 }, 2770 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 }, 2771 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 }, 2772 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 }, 2773 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 }, 2774 2775 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 }, 2776 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 }, 2777 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 }, 2778 2779 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 }, 2780 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 }, 2781 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 }, 2782 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 }, 2783 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 }, 2784 2785 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */ 2786 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 }, 2787 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 }, 2788 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 }, 2789 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 }, 2790 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 }, 2791 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 }, 2792 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 }, 2793 2794 { 0xFF } 2795 }; 2796 2797 #define ENOUGH(v, unit) (((v)-1)/(unit)+1) 2798 #define EZ(v, unit) ((v)?ENOUGH(v, unit):0) 2799 2800 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT) 2801 { 2802 q->setup = EZ(t->setup * 1000, T); 2803 q->act8b = EZ(t->act8b * 1000, T); 2804 q->rec8b = EZ(t->rec8b * 1000, T); 2805 q->cyc8b = EZ(t->cyc8b * 1000, T); 2806 q->active = EZ(t->active * 1000, T); 2807 q->recover = EZ(t->recover * 1000, T); 2808 q->cycle = EZ(t->cycle * 1000, T); 2809 q->udma = EZ(t->udma * 1000, UT); 2810 } 2811 2812 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b, 2813 struct ata_timing *m, unsigned int what) 2814 { 2815 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup); 2816 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b); 2817 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b); 2818 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b); 2819 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active); 2820 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover); 2821 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle); 2822 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma); 2823 } 2824 2825 const struct ata_timing *ata_timing_find_mode(u8 xfer_mode) 2826 { 2827 const struct ata_timing *t = ata_timing; 2828 2829 while (xfer_mode > t->mode) 2830 t++; 2831 2832 if (xfer_mode == t->mode) 2833 return t; 2834 return NULL; 2835 } 2836 2837 int ata_timing_compute(struct ata_device *adev, unsigned short speed, 2838 struct ata_timing *t, int T, int UT) 2839 { 2840 const struct ata_timing *s; 2841 struct ata_timing p; 2842 2843 /* 2844 * Find the mode. 2845 */ 2846 2847 if (!(s = ata_timing_find_mode(speed))) 2848 return -EINVAL; 2849 2850 memcpy(t, s, sizeof(*s)); 2851 2852 /* 2853 * If the drive is an EIDE drive, it can tell us it needs extended 2854 * PIO/MW_DMA cycle timing. 2855 */ 2856 2857 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ 2858 memset(&p, 0, sizeof(p)); 2859 if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) { 2860 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO]; 2861 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY]; 2862 } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) { 2863 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN]; 2864 } 2865 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B); 2866 } 2867 2868 /* 2869 * Convert the timing to bus clock counts. 2870 */ 2871 2872 ata_timing_quantize(t, t, T, UT); 2873 2874 /* 2875 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, 2876 * S.M.A.R.T * and some other commands. We have to ensure that the 2877 * DMA cycle timing is slower/equal than the fastest PIO timing. 2878 */ 2879 2880 if (speed > XFER_PIO_6) { 2881 ata_timing_compute(adev, adev->pio_mode, &p, T, UT); 2882 ata_timing_merge(&p, t, t, ATA_TIMING_ALL); 2883 } 2884 2885 /* 2886 * Lengthen active & recovery time so that cycle time is correct. 2887 */ 2888 2889 if (t->act8b + t->rec8b < t->cyc8b) { 2890 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; 2891 t->rec8b = t->cyc8b - t->act8b; 2892 } 2893 2894 if (t->active + t->recover < t->cycle) { 2895 t->active += (t->cycle - (t->active + t->recover)) / 2; 2896 t->recover = t->cycle - t->active; 2897 } 2898 2899 /* In a few cases quantisation may produce enough errors to 2900 leave t->cycle too low for the sum of active and recovery 2901 if so we must correct this */ 2902 if (t->active + t->recover > t->cycle) 2903 t->cycle = t->active + t->recover; 2904 2905 return 0; 2906 } 2907 2908 /** 2909 * ata_timing_cycle2mode - find xfer mode for the specified cycle duration 2910 * @xfer_shift: ATA_SHIFT_* value for transfer type to examine. 2911 * @cycle: cycle duration in ns 2912 * 2913 * Return matching xfer mode for @cycle. The returned mode is of 2914 * the transfer type specified by @xfer_shift. If @cycle is too 2915 * slow for @xfer_shift, 0xff is returned. If @cycle is faster 2916 * than the fastest known mode, the fasted mode is returned. 2917 * 2918 * LOCKING: 2919 * None. 2920 * 2921 * RETURNS: 2922 * Matching xfer_mode, 0xff if no match found. 2923 */ 2924 u8 ata_timing_cycle2mode(unsigned int xfer_shift, int cycle) 2925 { 2926 u8 base_mode = 0xff, last_mode = 0xff; 2927 const struct ata_xfer_ent *ent; 2928 const struct ata_timing *t; 2929 2930 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) 2931 if (ent->shift == xfer_shift) 2932 base_mode = ent->base; 2933 2934 for (t = ata_timing_find_mode(base_mode); 2935 t && ata_xfer_mode2shift(t->mode) == xfer_shift; t++) { 2936 unsigned short this_cycle; 2937 2938 switch (xfer_shift) { 2939 case ATA_SHIFT_PIO: 2940 case ATA_SHIFT_MWDMA: 2941 this_cycle = t->cycle; 2942 break; 2943 case ATA_SHIFT_UDMA: 2944 this_cycle = t->udma; 2945 break; 2946 default: 2947 return 0xff; 2948 } 2949 2950 if (cycle > this_cycle) 2951 break; 2952 2953 last_mode = t->mode; 2954 } 2955 2956 return last_mode; 2957 } 2958 2959 /** 2960 * ata_down_xfermask_limit - adjust dev xfer masks downward 2961 * @dev: Device to adjust xfer masks 2962 * @sel: ATA_DNXFER_* selector 2963 * 2964 * Adjust xfer masks of @dev downward. Note that this function 2965 * does not apply the change. Invoking ata_set_mode() afterwards 2966 * will apply the limit. 2967 * 2968 * LOCKING: 2969 * Inherited from caller. 2970 * 2971 * RETURNS: 2972 * 0 on success, negative errno on failure 2973 */ 2974 int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel) 2975 { 2976 char buf[32]; 2977 unsigned long orig_mask, xfer_mask; 2978 unsigned long pio_mask, mwdma_mask, udma_mask; 2979 int quiet, highbit; 2980 2981 quiet = !!(sel & ATA_DNXFER_QUIET); 2982 sel &= ~ATA_DNXFER_QUIET; 2983 2984 xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask, 2985 dev->mwdma_mask, 2986 dev->udma_mask); 2987 ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask); 2988 2989 switch (sel) { 2990 case ATA_DNXFER_PIO: 2991 highbit = fls(pio_mask) - 1; 2992 pio_mask &= ~(1 << highbit); 2993 break; 2994 2995 case ATA_DNXFER_DMA: 2996 if (udma_mask) { 2997 highbit = fls(udma_mask) - 1; 2998 udma_mask &= ~(1 << highbit); 2999 if (!udma_mask) 3000 return -ENOENT; 3001 } else if (mwdma_mask) { 3002 highbit = fls(mwdma_mask) - 1; 3003 mwdma_mask &= ~(1 << highbit); 3004 if (!mwdma_mask) 3005 return -ENOENT; 3006 } 3007 break; 3008 3009 case ATA_DNXFER_40C: 3010 udma_mask &= ATA_UDMA_MASK_40C; 3011 break; 3012 3013 case ATA_DNXFER_FORCE_PIO0: 3014 pio_mask &= 1; 3015 case ATA_DNXFER_FORCE_PIO: 3016 mwdma_mask = 0; 3017 udma_mask = 0; 3018 break; 3019 3020 default: 3021 BUG(); 3022 } 3023 3024 xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); 3025 3026 if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask) 3027 return -ENOENT; 3028 3029 if (!quiet) { 3030 if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA)) 3031 snprintf(buf, sizeof(buf), "%s:%s", 3032 ata_mode_string(xfer_mask), 3033 ata_mode_string(xfer_mask & ATA_MASK_PIO)); 3034 else 3035 snprintf(buf, sizeof(buf), "%s", 3036 ata_mode_string(xfer_mask)); 3037 3038 ata_dev_printk(dev, KERN_WARNING, 3039 "limiting speed to %s\n", buf); 3040 } 3041 3042 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask, 3043 &dev->udma_mask); 3044 3045 return 0; 3046 } 3047 3048 static int ata_dev_set_mode(struct ata_device *dev) 3049 { 3050 struct ata_eh_context *ehc = &dev->link->eh_context; 3051 const char *dev_err_whine = ""; 3052 int ign_dev_err = 0; 3053 unsigned int err_mask; 3054 int rc; 3055 3056 dev->flags &= ~ATA_DFLAG_PIO; 3057 if (dev->xfer_shift == ATA_SHIFT_PIO) 3058 dev->flags |= ATA_DFLAG_PIO; 3059 3060 err_mask = ata_dev_set_xfermode(dev); 3061 3062 if (err_mask & ~AC_ERR_DEV) 3063 goto fail; 3064 3065 /* revalidate */ 3066 ehc->i.flags |= ATA_EHI_POST_SETMODE; 3067 rc = ata_dev_revalidate(dev, ATA_DEV_UNKNOWN, 0); 3068 ehc->i.flags &= ~ATA_EHI_POST_SETMODE; 3069 if (rc) 3070 return rc; 3071 3072 /* Old CFA may refuse this command, which is just fine */ 3073 if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id)) 3074 ign_dev_err = 1; 3075 3076 /* Some very old devices and some bad newer ones fail any kind of 3077 SET_XFERMODE request but support PIO0-2 timings and no IORDY */ 3078 if (dev->xfer_shift == ATA_SHIFT_PIO && !ata_id_has_iordy(dev->id) && 3079 dev->pio_mode <= XFER_PIO_2) 3080 ign_dev_err = 1; 3081 3082 /* Early MWDMA devices do DMA but don't allow DMA mode setting. 3083 Don't fail an MWDMA0 set IFF the device indicates it is in MWDMA0 */ 3084 if (dev->xfer_shift == ATA_SHIFT_MWDMA && 3085 dev->dma_mode == XFER_MW_DMA_0 && 3086 (dev->id[63] >> 8) & 1) 3087 ign_dev_err = 1; 3088 3089 /* if the device is actually configured correctly, ignore dev err */ 3090 if (dev->xfer_mode == ata_xfer_mask2mode(ata_id_xfermask(dev->id))) 3091 ign_dev_err = 1; 3092 3093 if (err_mask & AC_ERR_DEV) { 3094 if (!ign_dev_err) 3095 goto fail; 3096 else 3097 dev_err_whine = " (device error ignored)"; 3098 } 3099 3100 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n", 3101 dev->xfer_shift, (int)dev->xfer_mode); 3102 3103 ata_dev_printk(dev, KERN_INFO, "configured for %s%s\n", 3104 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)), 3105 dev_err_whine); 3106 3107 return 0; 3108 3109 fail: 3110 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode " 3111 "(err_mask=0x%x)\n", err_mask); 3112 return -EIO; 3113 } 3114 3115 /** 3116 * ata_do_set_mode - Program timings and issue SET FEATURES - XFER 3117 * @link: link on which timings will be programmed 3118 * @r_failed_dev: out parameter for failed device 3119 * 3120 * Standard implementation of the function used to tune and set 3121 * ATA device disk transfer mode (PIO3, UDMA6, etc.). If 3122 * ata_dev_set_mode() fails, pointer to the failing device is 3123 * returned in @r_failed_dev. 3124 * 3125 * LOCKING: 3126 * PCI/etc. bus probe sem. 3127 * 3128 * RETURNS: 3129 * 0 on success, negative errno otherwise 3130 */ 3131 3132 int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev) 3133 { 3134 struct ata_port *ap = link->ap; 3135 struct ata_device *dev; 3136 int rc = 0, used_dma = 0, found = 0; 3137 3138 /* step 1: calculate xfer_mask */ 3139 ata_link_for_each_dev(dev, link) { 3140 unsigned long pio_mask, dma_mask; 3141 unsigned int mode_mask; 3142 3143 if (!ata_dev_enabled(dev)) 3144 continue; 3145 3146 mode_mask = ATA_DMA_MASK_ATA; 3147 if (dev->class == ATA_DEV_ATAPI) 3148 mode_mask = ATA_DMA_MASK_ATAPI; 3149 else if (ata_id_is_cfa(dev->id)) 3150 mode_mask = ATA_DMA_MASK_CFA; 3151 3152 ata_dev_xfermask(dev); 3153 3154 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0); 3155 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask); 3156 3157 if (libata_dma_mask & mode_mask) 3158 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask); 3159 else 3160 dma_mask = 0; 3161 3162 dev->pio_mode = ata_xfer_mask2mode(pio_mask); 3163 dev->dma_mode = ata_xfer_mask2mode(dma_mask); 3164 3165 found = 1; 3166 if (dev->dma_mode != 0xff) 3167 used_dma = 1; 3168 } 3169 if (!found) 3170 goto out; 3171 3172 /* step 2: always set host PIO timings */ 3173 ata_link_for_each_dev(dev, link) { 3174 if (!ata_dev_enabled(dev)) 3175 continue; 3176 3177 if (dev->pio_mode == 0xff) { 3178 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n"); 3179 rc = -EINVAL; 3180 goto out; 3181 } 3182 3183 dev->xfer_mode = dev->pio_mode; 3184 dev->xfer_shift = ATA_SHIFT_PIO; 3185 if (ap->ops->set_piomode) 3186 ap->ops->set_piomode(ap, dev); 3187 } 3188 3189 /* step 3: set host DMA timings */ 3190 ata_link_for_each_dev(dev, link) { 3191 if (!ata_dev_enabled(dev) || dev->dma_mode == 0xff) 3192 continue; 3193 3194 dev->xfer_mode = dev->dma_mode; 3195 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode); 3196 if (ap->ops->set_dmamode) 3197 ap->ops->set_dmamode(ap, dev); 3198 } 3199 3200 /* step 4: update devices' xfer mode */ 3201 ata_link_for_each_dev(dev, link) { 3202 /* don't update suspended devices' xfer mode */ 3203 if (!ata_dev_enabled(dev)) 3204 continue; 3205 3206 rc = ata_dev_set_mode(dev); 3207 if (rc) 3208 goto out; 3209 } 3210 3211 /* Record simplex status. If we selected DMA then the other 3212 * host channels are not permitted to do so. 3213 */ 3214 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX)) 3215 ap->host->simplex_claimed = ap; 3216 3217 out: 3218 if (rc) 3219 *r_failed_dev = dev; 3220 return rc; 3221 } 3222 3223 /** 3224 * ata_tf_to_host - issue ATA taskfile to host controller 3225 * @ap: port to which command is being issued 3226 * @tf: ATA taskfile register set 3227 * 3228 * Issues ATA taskfile register set to ATA host controller, 3229 * with proper synchronization with interrupt handler and 3230 * other threads. 3231 * 3232 * LOCKING: 3233 * spin_lock_irqsave(host lock) 3234 */ 3235 3236 static inline void ata_tf_to_host(struct ata_port *ap, 3237 const struct ata_taskfile *tf) 3238 { 3239 ap->ops->tf_load(ap, tf); 3240 ap->ops->exec_command(ap, tf); 3241 } 3242 3243 /** 3244 * ata_busy_sleep - sleep until BSY clears, or timeout 3245 * @ap: port containing status register to be polled 3246 * @tmout_pat: impatience timeout 3247 * @tmout: overall timeout 3248 * 3249 * Sleep until ATA Status register bit BSY clears, 3250 * or a timeout occurs. 3251 * 3252 * LOCKING: 3253 * Kernel thread context (may sleep). 3254 * 3255 * RETURNS: 3256 * 0 on success, -errno otherwise. 3257 */ 3258 int ata_busy_sleep(struct ata_port *ap, 3259 unsigned long tmout_pat, unsigned long tmout) 3260 { 3261 unsigned long timer_start, timeout; 3262 u8 status; 3263 3264 status = ata_busy_wait(ap, ATA_BUSY, 300); 3265 timer_start = jiffies; 3266 timeout = timer_start + tmout_pat; 3267 while (status != 0xff && (status & ATA_BUSY) && 3268 time_before(jiffies, timeout)) { 3269 msleep(50); 3270 status = ata_busy_wait(ap, ATA_BUSY, 3); 3271 } 3272 3273 if (status != 0xff && (status & ATA_BUSY)) 3274 ata_port_printk(ap, KERN_WARNING, 3275 "port is slow to respond, please be patient " 3276 "(Status 0x%x)\n", status); 3277 3278 timeout = timer_start + tmout; 3279 while (status != 0xff && (status & ATA_BUSY) && 3280 time_before(jiffies, timeout)) { 3281 msleep(50); 3282 status = ata_chk_status(ap); 3283 } 3284 3285 if (status == 0xff) 3286 return -ENODEV; 3287 3288 if (status & ATA_BUSY) { 3289 ata_port_printk(ap, KERN_ERR, "port failed to respond " 3290 "(%lu secs, Status 0x%x)\n", 3291 tmout / HZ, status); 3292 return -EBUSY; 3293 } 3294 3295 return 0; 3296 } 3297 3298 /** 3299 * ata_wait_after_reset - wait before checking status after reset 3300 * @ap: port containing status register to be polled 3301 * @deadline: deadline jiffies for the operation 3302 * 3303 * After reset, we need to pause a while before reading status. 3304 * Also, certain combination of controller and device report 0xff 3305 * for some duration (e.g. until SATA PHY is up and running) 3306 * which is interpreted as empty port in ATA world. This 3307 * function also waits for such devices to get out of 0xff 3308 * status. 3309 * 3310 * LOCKING: 3311 * Kernel thread context (may sleep). 3312 */ 3313 void ata_wait_after_reset(struct ata_port *ap, unsigned long deadline) 3314 { 3315 unsigned long until = jiffies + ATA_TMOUT_FF_WAIT; 3316 3317 if (time_before(until, deadline)) 3318 deadline = until; 3319 3320 /* Spec mandates ">= 2ms" before checking status. We wait 3321 * 150ms, because that was the magic delay used for ATAPI 3322 * devices in Hale Landis's ATADRVR, for the period of time 3323 * between when the ATA command register is written, and then 3324 * status is checked. Because waiting for "a while" before 3325 * checking status is fine, post SRST, we perform this magic 3326 * delay here as well. 3327 * 3328 * Old drivers/ide uses the 2mS rule and then waits for ready. 3329 */ 3330 msleep(150); 3331 3332 /* Wait for 0xff to clear. Some SATA devices take a long time 3333 * to clear 0xff after reset. For example, HHD424020F7SV00 3334 * iVDR needs >= 800ms while. Quantum GoVault needs even more 3335 * than that. 3336 * 3337 * Note that some PATA controllers (pata_ali) explode if 3338 * status register is read more than once when there's no 3339 * device attached. 3340 */ 3341 if (ap->flags & ATA_FLAG_SATA) { 3342 while (1) { 3343 u8 status = ata_chk_status(ap); 3344 3345 if (status != 0xff || time_after(jiffies, deadline)) 3346 return; 3347 3348 msleep(50); 3349 } 3350 } 3351 } 3352 3353 /** 3354 * ata_wait_ready - sleep until BSY clears, or timeout 3355 * @ap: port containing status register to be polled 3356 * @deadline: deadline jiffies for the operation 3357 * 3358 * Sleep until ATA Status register bit BSY clears, or timeout 3359 * occurs. 3360 * 3361 * LOCKING: 3362 * Kernel thread context (may sleep). 3363 * 3364 * RETURNS: 3365 * 0 on success, -errno otherwise. 3366 */ 3367 int ata_wait_ready(struct ata_port *ap, unsigned long deadline) 3368 { 3369 unsigned long start = jiffies; 3370 int warned = 0; 3371 3372 while (1) { 3373 u8 status = ata_chk_status(ap); 3374 unsigned long now = jiffies; 3375 3376 if (!(status & ATA_BUSY)) 3377 return 0; 3378 if (!ata_link_online(&ap->link) && status == 0xff) 3379 return -ENODEV; 3380 if (time_after(now, deadline)) 3381 return -EBUSY; 3382 3383 if (!warned && time_after(now, start + 5 * HZ) && 3384 (deadline - now > 3 * HZ)) { 3385 ata_port_printk(ap, KERN_WARNING, 3386 "port is slow to respond, please be patient " 3387 "(Status 0x%x)\n", status); 3388 warned = 1; 3389 } 3390 3391 msleep(50); 3392 } 3393 } 3394 3395 static int ata_bus_post_reset(struct ata_port *ap, unsigned int devmask, 3396 unsigned long deadline) 3397 { 3398 struct ata_ioports *ioaddr = &ap->ioaddr; 3399 unsigned int dev0 = devmask & (1 << 0); 3400 unsigned int dev1 = devmask & (1 << 1); 3401 int rc, ret = 0; 3402 3403 /* if device 0 was found in ata_devchk, wait for its 3404 * BSY bit to clear 3405 */ 3406 if (dev0) { 3407 rc = ata_wait_ready(ap, deadline); 3408 if (rc) { 3409 if (rc != -ENODEV) 3410 return rc; 3411 ret = rc; 3412 } 3413 } 3414 3415 /* if device 1 was found in ata_devchk, wait for register 3416 * access briefly, then wait for BSY to clear. 3417 */ 3418 if (dev1) { 3419 int i; 3420 3421 ap->ops->dev_select(ap, 1); 3422 3423 /* Wait for register access. Some ATAPI devices fail 3424 * to set nsect/lbal after reset, so don't waste too 3425 * much time on it. We're gonna wait for !BSY anyway. 3426 */ 3427 for (i = 0; i < 2; i++) { 3428 u8 nsect, lbal; 3429 3430 nsect = ioread8(ioaddr->nsect_addr); 3431 lbal = ioread8(ioaddr->lbal_addr); 3432 if ((nsect == 1) && (lbal == 1)) 3433 break; 3434 msleep(50); /* give drive a breather */ 3435 } 3436 3437 rc = ata_wait_ready(ap, deadline); 3438 if (rc) { 3439 if (rc != -ENODEV) 3440 return rc; 3441 ret = rc; 3442 } 3443 } 3444 3445 /* is all this really necessary? */ 3446 ap->ops->dev_select(ap, 0); 3447 if (dev1) 3448 ap->ops->dev_select(ap, 1); 3449 if (dev0) 3450 ap->ops->dev_select(ap, 0); 3451 3452 return ret; 3453 } 3454 3455 static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask, 3456 unsigned long deadline) 3457 { 3458 struct ata_ioports *ioaddr = &ap->ioaddr; 3459 3460 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id); 3461 3462 /* software reset. causes dev0 to be selected */ 3463 iowrite8(ap->ctl, ioaddr->ctl_addr); 3464 udelay(20); /* FIXME: flush */ 3465 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr); 3466 udelay(20); /* FIXME: flush */ 3467 iowrite8(ap->ctl, ioaddr->ctl_addr); 3468 3469 /* wait a while before checking status */ 3470 ata_wait_after_reset(ap, deadline); 3471 3472 /* Before we perform post reset processing we want to see if 3473 * the bus shows 0xFF because the odd clown forgets the D7 3474 * pulldown resistor. 3475 */ 3476 if (ata_chk_status(ap) == 0xFF) 3477 return -ENODEV; 3478 3479 return ata_bus_post_reset(ap, devmask, deadline); 3480 } 3481 3482 /** 3483 * ata_bus_reset - reset host port and associated ATA channel 3484 * @ap: port to reset 3485 * 3486 * This is typically the first time we actually start issuing 3487 * commands to the ATA channel. We wait for BSY to clear, then 3488 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its 3489 * result. Determine what devices, if any, are on the channel 3490 * by looking at the device 0/1 error register. Look at the signature 3491 * stored in each device's taskfile registers, to determine if 3492 * the device is ATA or ATAPI. 3493 * 3494 * LOCKING: 3495 * PCI/etc. bus probe sem. 3496 * Obtains host lock. 3497 * 3498 * SIDE EFFECTS: 3499 * Sets ATA_FLAG_DISABLED if bus reset fails. 3500 */ 3501 3502 void ata_bus_reset(struct ata_port *ap) 3503 { 3504 struct ata_device *device = ap->link.device; 3505 struct ata_ioports *ioaddr = &ap->ioaddr; 3506 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; 3507 u8 err; 3508 unsigned int dev0, dev1 = 0, devmask = 0; 3509 int rc; 3510 3511 DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no); 3512 3513 /* determine if device 0/1 are present */ 3514 if (ap->flags & ATA_FLAG_SATA_RESET) 3515 dev0 = 1; 3516 else { 3517 dev0 = ata_devchk(ap, 0); 3518 if (slave_possible) 3519 dev1 = ata_devchk(ap, 1); 3520 } 3521 3522 if (dev0) 3523 devmask |= (1 << 0); 3524 if (dev1) 3525 devmask |= (1 << 1); 3526 3527 /* select device 0 again */ 3528 ap->ops->dev_select(ap, 0); 3529 3530 /* issue bus reset */ 3531 if (ap->flags & ATA_FLAG_SRST) { 3532 rc = ata_bus_softreset(ap, devmask, jiffies + 40 * HZ); 3533 if (rc && rc != -ENODEV) 3534 goto err_out; 3535 } 3536 3537 /* 3538 * determine by signature whether we have ATA or ATAPI devices 3539 */ 3540 device[0].class = ata_dev_try_classify(&device[0], dev0, &err); 3541 if ((slave_possible) && (err != 0x81)) 3542 device[1].class = ata_dev_try_classify(&device[1], dev1, &err); 3543 3544 /* is double-select really necessary? */ 3545 if (device[1].class != ATA_DEV_NONE) 3546 ap->ops->dev_select(ap, 1); 3547 if (device[0].class != ATA_DEV_NONE) 3548 ap->ops->dev_select(ap, 0); 3549 3550 /* if no devices were detected, disable this port */ 3551 if ((device[0].class == ATA_DEV_NONE) && 3552 (device[1].class == ATA_DEV_NONE)) 3553 goto err_out; 3554 3555 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { 3556 /* set up device control for ATA_FLAG_SATA_RESET */ 3557 iowrite8(ap->ctl, ioaddr->ctl_addr); 3558 } 3559 3560 DPRINTK("EXIT\n"); 3561 return; 3562 3563 err_out: 3564 ata_port_printk(ap, KERN_ERR, "disabling port\n"); 3565 ata_port_disable(ap); 3566 3567 DPRINTK("EXIT\n"); 3568 } 3569 3570 /** 3571 * sata_link_debounce - debounce SATA phy status 3572 * @link: ATA link to debounce SATA phy status for 3573 * @params: timing parameters { interval, duratinon, timeout } in msec 3574 * @deadline: deadline jiffies for the operation 3575 * 3576 * Make sure SStatus of @link reaches stable state, determined by 3577 * holding the same value where DET is not 1 for @duration polled 3578 * every @interval, before @timeout. Timeout constraints the 3579 * beginning of the stable state. Because DET gets stuck at 1 on 3580 * some controllers after hot unplugging, this functions waits 3581 * until timeout then returns 0 if DET is stable at 1. 3582 * 3583 * @timeout is further limited by @deadline. The sooner of the 3584 * two is used. 3585 * 3586 * LOCKING: 3587 * Kernel thread context (may sleep) 3588 * 3589 * RETURNS: 3590 * 0 on success, -errno on failure. 3591 */ 3592 int sata_link_debounce(struct ata_link *link, const unsigned long *params, 3593 unsigned long deadline) 3594 { 3595 unsigned long interval_msec = params[0]; 3596 unsigned long duration = msecs_to_jiffies(params[1]); 3597 unsigned long last_jiffies, t; 3598 u32 last, cur; 3599 int rc; 3600 3601 t = jiffies + msecs_to_jiffies(params[2]); 3602 if (time_before(t, deadline)) 3603 deadline = t; 3604 3605 if ((rc = sata_scr_read(link, SCR_STATUS, &cur))) 3606 return rc; 3607 cur &= 0xf; 3608 3609 last = cur; 3610 last_jiffies = jiffies; 3611 3612 while (1) { 3613 msleep(interval_msec); 3614 if ((rc = sata_scr_read(link, SCR_STATUS, &cur))) 3615 return rc; 3616 cur &= 0xf; 3617 3618 /* DET stable? */ 3619 if (cur == last) { 3620 if (cur == 1 && time_before(jiffies, deadline)) 3621 continue; 3622 if (time_after(jiffies, last_jiffies + duration)) 3623 return 0; 3624 continue; 3625 } 3626 3627 /* unstable, start over */ 3628 last = cur; 3629 last_jiffies = jiffies; 3630 3631 /* Check deadline. If debouncing failed, return 3632 * -EPIPE to tell upper layer to lower link speed. 3633 */ 3634 if (time_after(jiffies, deadline)) 3635 return -EPIPE; 3636 } 3637 } 3638 3639 /** 3640 * sata_link_resume - resume SATA link 3641 * @link: ATA link to resume SATA 3642 * @params: timing parameters { interval, duratinon, timeout } in msec 3643 * @deadline: deadline jiffies for the operation 3644 * 3645 * Resume SATA phy @link and debounce it. 3646 * 3647 * LOCKING: 3648 * Kernel thread context (may sleep) 3649 * 3650 * RETURNS: 3651 * 0 on success, -errno on failure. 3652 */ 3653 int sata_link_resume(struct ata_link *link, const unsigned long *params, 3654 unsigned long deadline) 3655 { 3656 u32 scontrol; 3657 int rc; 3658 3659 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) 3660 return rc; 3661 3662 scontrol = (scontrol & 0x0f0) | 0x300; 3663 3664 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol))) 3665 return rc; 3666 3667 /* Some PHYs react badly if SStatus is pounded immediately 3668 * after resuming. Delay 200ms before debouncing. 3669 */ 3670 msleep(200); 3671 3672 return sata_link_debounce(link, params, deadline); 3673 } 3674 3675 /** 3676 * ata_std_prereset - prepare for reset 3677 * @link: ATA link to be reset 3678 * @deadline: deadline jiffies for the operation 3679 * 3680 * @link is about to be reset. Initialize it. Failure from 3681 * prereset makes libata abort whole reset sequence and give up 3682 * that port, so prereset should be best-effort. It does its 3683 * best to prepare for reset sequence but if things go wrong, it 3684 * should just whine, not fail. 3685 * 3686 * LOCKING: 3687 * Kernel thread context (may sleep) 3688 * 3689 * RETURNS: 3690 * 0 on success, -errno otherwise. 3691 */ 3692 int ata_std_prereset(struct ata_link *link, unsigned long deadline) 3693 { 3694 struct ata_port *ap = link->ap; 3695 struct ata_eh_context *ehc = &link->eh_context; 3696 const unsigned long *timing = sata_ehc_deb_timing(ehc); 3697 int rc; 3698 3699 /* handle link resume */ 3700 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) && 3701 (link->flags & ATA_LFLAG_HRST_TO_RESUME)) 3702 ehc->i.action |= ATA_EH_HARDRESET; 3703 3704 /* Some PMPs don't work with only SRST, force hardreset if PMP 3705 * is supported. 3706 */ 3707 if (ap->flags & ATA_FLAG_PMP) 3708 ehc->i.action |= ATA_EH_HARDRESET; 3709 3710 /* if we're about to do hardreset, nothing more to do */ 3711 if (ehc->i.action & ATA_EH_HARDRESET) 3712 return 0; 3713 3714 /* if SATA, resume link */ 3715 if (ap->flags & ATA_FLAG_SATA) { 3716 rc = sata_link_resume(link, timing, deadline); 3717 /* whine about phy resume failure but proceed */ 3718 if (rc && rc != -EOPNOTSUPP) 3719 ata_link_printk(link, KERN_WARNING, "failed to resume " 3720 "link for reset (errno=%d)\n", rc); 3721 } 3722 3723 /* Wait for !BSY if the controller can wait for the first D2H 3724 * Reg FIS and we don't know that no device is attached. 3725 */ 3726 if (!(link->flags & ATA_LFLAG_SKIP_D2H_BSY) && !ata_link_offline(link)) { 3727 rc = ata_wait_ready(ap, deadline); 3728 if (rc && rc != -ENODEV) { 3729 ata_link_printk(link, KERN_WARNING, "device not ready " 3730 "(errno=%d), forcing hardreset\n", rc); 3731 ehc->i.action |= ATA_EH_HARDRESET; 3732 } 3733 } 3734 3735 return 0; 3736 } 3737 3738 /** 3739 * ata_std_softreset - reset host port via ATA SRST 3740 * @link: ATA link to reset 3741 * @classes: resulting classes of attached devices 3742 * @deadline: deadline jiffies for the operation 3743 * 3744 * Reset host port using ATA SRST. 3745 * 3746 * LOCKING: 3747 * Kernel thread context (may sleep) 3748 * 3749 * RETURNS: 3750 * 0 on success, -errno otherwise. 3751 */ 3752 int ata_std_softreset(struct ata_link *link, unsigned int *classes, 3753 unsigned long deadline) 3754 { 3755 struct ata_port *ap = link->ap; 3756 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; 3757 unsigned int devmask = 0; 3758 int rc; 3759 u8 err; 3760 3761 DPRINTK("ENTER\n"); 3762 3763 if (ata_link_offline(link)) { 3764 classes[0] = ATA_DEV_NONE; 3765 goto out; 3766 } 3767 3768 /* determine if device 0/1 are present */ 3769 if (ata_devchk(ap, 0)) 3770 devmask |= (1 << 0); 3771 if (slave_possible && ata_devchk(ap, 1)) 3772 devmask |= (1 << 1); 3773 3774 /* select device 0 again */ 3775 ap->ops->dev_select(ap, 0); 3776 3777 /* issue bus reset */ 3778 DPRINTK("about to softreset, devmask=%x\n", devmask); 3779 rc = ata_bus_softreset(ap, devmask, deadline); 3780 /* if link is occupied, -ENODEV too is an error */ 3781 if (rc && (rc != -ENODEV || sata_scr_valid(link))) { 3782 ata_link_printk(link, KERN_ERR, "SRST failed (errno=%d)\n", rc); 3783 return rc; 3784 } 3785 3786 /* determine by signature whether we have ATA or ATAPI devices */ 3787 classes[0] = ata_dev_try_classify(&link->device[0], 3788 devmask & (1 << 0), &err); 3789 if (slave_possible && err != 0x81) 3790 classes[1] = ata_dev_try_classify(&link->device[1], 3791 devmask & (1 << 1), &err); 3792 3793 out: 3794 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]); 3795 return 0; 3796 } 3797 3798 /** 3799 * sata_link_hardreset - reset link via SATA phy reset 3800 * @link: link to reset 3801 * @timing: timing parameters { interval, duratinon, timeout } in msec 3802 * @deadline: deadline jiffies for the operation 3803 * 3804 * SATA phy-reset @link using DET bits of SControl register. 3805 * 3806 * LOCKING: 3807 * Kernel thread context (may sleep) 3808 * 3809 * RETURNS: 3810 * 0 on success, -errno otherwise. 3811 */ 3812 int sata_link_hardreset(struct ata_link *link, const unsigned long *timing, 3813 unsigned long deadline) 3814 { 3815 u32 scontrol; 3816 int rc; 3817 3818 DPRINTK("ENTER\n"); 3819 3820 if (sata_set_spd_needed(link)) { 3821 /* SATA spec says nothing about how to reconfigure 3822 * spd. To be on the safe side, turn off phy during 3823 * reconfiguration. This works for at least ICH7 AHCI 3824 * and Sil3124. 3825 */ 3826 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) 3827 goto out; 3828 3829 scontrol = (scontrol & 0x0f0) | 0x304; 3830 3831 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol))) 3832 goto out; 3833 3834 sata_set_spd(link); 3835 } 3836 3837 /* issue phy wake/reset */ 3838 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) 3839 goto out; 3840 3841 scontrol = (scontrol & 0x0f0) | 0x301; 3842 3843 if ((rc = sata_scr_write_flush(link, SCR_CONTROL, scontrol))) 3844 goto out; 3845 3846 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1 3847 * 10.4.2 says at least 1 ms. 3848 */ 3849 msleep(1); 3850 3851 /* bring link back */ 3852 rc = sata_link_resume(link, timing, deadline); 3853 out: 3854 DPRINTK("EXIT, rc=%d\n", rc); 3855 return rc; 3856 } 3857 3858 /** 3859 * sata_std_hardreset - reset host port via SATA phy reset 3860 * @link: link to reset 3861 * @class: resulting class of attached device 3862 * @deadline: deadline jiffies for the operation 3863 * 3864 * SATA phy-reset host port using DET bits of SControl register, 3865 * wait for !BSY and classify the attached device. 3866 * 3867 * LOCKING: 3868 * Kernel thread context (may sleep) 3869 * 3870 * RETURNS: 3871 * 0 on success, -errno otherwise. 3872 */ 3873 int sata_std_hardreset(struct ata_link *link, unsigned int *class, 3874 unsigned long deadline) 3875 { 3876 struct ata_port *ap = link->ap; 3877 const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context); 3878 int rc; 3879 3880 DPRINTK("ENTER\n"); 3881 3882 /* do hardreset */ 3883 rc = sata_link_hardreset(link, timing, deadline); 3884 if (rc) { 3885 ata_link_printk(link, KERN_ERR, 3886 "COMRESET failed (errno=%d)\n", rc); 3887 return rc; 3888 } 3889 3890 /* TODO: phy layer with polling, timeouts, etc. */ 3891 if (ata_link_offline(link)) { 3892 *class = ATA_DEV_NONE; 3893 DPRINTK("EXIT, link offline\n"); 3894 return 0; 3895 } 3896 3897 /* wait a while before checking status */ 3898 ata_wait_after_reset(ap, deadline); 3899 3900 /* If PMP is supported, we have to do follow-up SRST. Note 3901 * that some PMPs don't send D2H Reg FIS after hardreset at 3902 * all if the first port is empty. Wait for it just for a 3903 * second and request follow-up SRST. 3904 */ 3905 if (ap->flags & ATA_FLAG_PMP) { 3906 ata_wait_ready(ap, jiffies + HZ); 3907 return -EAGAIN; 3908 } 3909 3910 rc = ata_wait_ready(ap, deadline); 3911 /* link occupied, -ENODEV too is an error */ 3912 if (rc) { 3913 ata_link_printk(link, KERN_ERR, 3914 "COMRESET failed (errno=%d)\n", rc); 3915 return rc; 3916 } 3917 3918 ap->ops->dev_select(ap, 0); /* probably unnecessary */ 3919 3920 *class = ata_dev_try_classify(link->device, 1, NULL); 3921 3922 DPRINTK("EXIT, class=%u\n", *class); 3923 return 0; 3924 } 3925 3926 /** 3927 * ata_std_postreset - standard postreset callback 3928 * @link: the target ata_link 3929 * @classes: classes of attached devices 3930 * 3931 * This function is invoked after a successful reset. Note that 3932 * the device might have been reset more than once using 3933 * different reset methods before postreset is invoked. 3934 * 3935 * LOCKING: 3936 * Kernel thread context (may sleep) 3937 */ 3938 void ata_std_postreset(struct ata_link *link, unsigned int *classes) 3939 { 3940 struct ata_port *ap = link->ap; 3941 u32 serror; 3942 3943 DPRINTK("ENTER\n"); 3944 3945 /* print link status */ 3946 sata_print_link_status(link); 3947 3948 /* clear SError */ 3949 if (sata_scr_read(link, SCR_ERROR, &serror) == 0) 3950 sata_scr_write(link, SCR_ERROR, serror); 3951 link->eh_info.serror = 0; 3952 3953 /* is double-select really necessary? */ 3954 if (classes[0] != ATA_DEV_NONE) 3955 ap->ops->dev_select(ap, 1); 3956 if (classes[1] != ATA_DEV_NONE) 3957 ap->ops->dev_select(ap, 0); 3958 3959 /* bail out if no device is present */ 3960 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { 3961 DPRINTK("EXIT, no device\n"); 3962 return; 3963 } 3964 3965 /* set up device control */ 3966 if (ap->ioaddr.ctl_addr) 3967 iowrite8(ap->ctl, ap->ioaddr.ctl_addr); 3968 3969 DPRINTK("EXIT\n"); 3970 } 3971 3972 /** 3973 * ata_dev_same_device - Determine whether new ID matches configured device 3974 * @dev: device to compare against 3975 * @new_class: class of the new device 3976 * @new_id: IDENTIFY page of the new device 3977 * 3978 * Compare @new_class and @new_id against @dev and determine 3979 * whether @dev is the device indicated by @new_class and 3980 * @new_id. 3981 * 3982 * LOCKING: 3983 * None. 3984 * 3985 * RETURNS: 3986 * 1 if @dev matches @new_class and @new_id, 0 otherwise. 3987 */ 3988 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class, 3989 const u16 *new_id) 3990 { 3991 const u16 *old_id = dev->id; 3992 unsigned char model[2][ATA_ID_PROD_LEN + 1]; 3993 unsigned char serial[2][ATA_ID_SERNO_LEN + 1]; 3994 3995 if (dev->class != new_class) { 3996 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n", 3997 dev->class, new_class); 3998 return 0; 3999 } 4000 4001 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0])); 4002 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1])); 4003 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0])); 4004 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1])); 4005 4006 if (strcmp(model[0], model[1])) { 4007 ata_dev_printk(dev, KERN_INFO, "model number mismatch " 4008 "'%s' != '%s'\n", model[0], model[1]); 4009 return 0; 4010 } 4011 4012 if (strcmp(serial[0], serial[1])) { 4013 ata_dev_printk(dev, KERN_INFO, "serial number mismatch " 4014 "'%s' != '%s'\n", serial[0], serial[1]); 4015 return 0; 4016 } 4017 4018 return 1; 4019 } 4020 4021 /** 4022 * ata_dev_reread_id - Re-read IDENTIFY data 4023 * @dev: target ATA device 4024 * @readid_flags: read ID flags 4025 * 4026 * Re-read IDENTIFY page and make sure @dev is still attached to 4027 * the port. 4028 * 4029 * LOCKING: 4030 * Kernel thread context (may sleep) 4031 * 4032 * RETURNS: 4033 * 0 on success, negative errno otherwise 4034 */ 4035 int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags) 4036 { 4037 unsigned int class = dev->class; 4038 u16 *id = (void *)dev->link->ap->sector_buf; 4039 int rc; 4040 4041 /* read ID data */ 4042 rc = ata_dev_read_id(dev, &class, readid_flags, id); 4043 if (rc) 4044 return rc; 4045 4046 /* is the device still there? */ 4047 if (!ata_dev_same_device(dev, class, id)) 4048 return -ENODEV; 4049 4050 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS); 4051 return 0; 4052 } 4053 4054 /** 4055 * ata_dev_revalidate - Revalidate ATA device 4056 * @dev: device to revalidate 4057 * @new_class: new class code 4058 * @readid_flags: read ID flags 4059 * 4060 * Re-read IDENTIFY page, make sure @dev is still attached to the 4061 * port and reconfigure it according to the new IDENTIFY page. 4062 * 4063 * LOCKING: 4064 * Kernel thread context (may sleep) 4065 * 4066 * RETURNS: 4067 * 0 on success, negative errno otherwise 4068 */ 4069 int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class, 4070 unsigned int readid_flags) 4071 { 4072 u64 n_sectors = dev->n_sectors; 4073 int rc; 4074 4075 if (!ata_dev_enabled(dev)) 4076 return -ENODEV; 4077 4078 /* fail early if !ATA && !ATAPI to avoid issuing [P]IDENTIFY to PMP */ 4079 if (ata_class_enabled(new_class) && 4080 new_class != ATA_DEV_ATA && new_class != ATA_DEV_ATAPI) { 4081 ata_dev_printk(dev, KERN_INFO, "class mismatch %u != %u\n", 4082 dev->class, new_class); 4083 rc = -ENODEV; 4084 goto fail; 4085 } 4086 4087 /* re-read ID */ 4088 rc = ata_dev_reread_id(dev, readid_flags); 4089 if (rc) 4090 goto fail; 4091 4092 /* configure device according to the new ID */ 4093 rc = ata_dev_configure(dev); 4094 if (rc) 4095 goto fail; 4096 4097 /* verify n_sectors hasn't changed */ 4098 if (dev->class == ATA_DEV_ATA && n_sectors && 4099 dev->n_sectors != n_sectors) { 4100 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch " 4101 "%llu != %llu\n", 4102 (unsigned long long)n_sectors, 4103 (unsigned long long)dev->n_sectors); 4104 4105 /* restore original n_sectors */ 4106 dev->n_sectors = n_sectors; 4107 4108 rc = -ENODEV; 4109 goto fail; 4110 } 4111 4112 return 0; 4113 4114 fail: 4115 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc); 4116 return rc; 4117 } 4118 4119 struct ata_blacklist_entry { 4120 const char *model_num; 4121 const char *model_rev; 4122 unsigned long horkage; 4123 }; 4124 4125 static const struct ata_blacklist_entry ata_device_blacklist [] = { 4126 /* Devices with DMA related problems under Linux */ 4127 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA }, 4128 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA }, 4129 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA }, 4130 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA }, 4131 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA }, 4132 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA }, 4133 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA }, 4134 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA }, 4135 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA }, 4136 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA }, 4137 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA }, 4138 { "CRD-84", NULL, ATA_HORKAGE_NODMA }, 4139 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA }, 4140 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA }, 4141 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA }, 4142 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA }, 4143 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA }, 4144 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA }, 4145 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA }, 4146 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA }, 4147 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA }, 4148 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA }, 4149 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA }, 4150 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA }, 4151 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA }, 4152 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA }, 4153 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA }, 4154 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA }, 4155 { "SAMSUNG CD-ROM SN-124", "N001", ATA_HORKAGE_NODMA }, 4156 { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA }, 4157 /* Odd clown on sil3726/4726 PMPs */ 4158 { "Config Disk", NULL, ATA_HORKAGE_NODMA | 4159 ATA_HORKAGE_SKIP_PM }, 4160 4161 /* Weird ATAPI devices */ 4162 { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 }, 4163 4164 /* Devices we expect to fail diagnostics */ 4165 4166 /* Devices where NCQ should be avoided */ 4167 /* NCQ is slow */ 4168 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ }, 4169 { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, }, 4170 /* http://thread.gmane.org/gmane.linux.ide/14907 */ 4171 { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ }, 4172 /* NCQ is broken */ 4173 { "Maxtor *", "BANC*", ATA_HORKAGE_NONCQ }, 4174 { "Maxtor 7V300F0", "VA111630", ATA_HORKAGE_NONCQ }, 4175 { "ST380817AS", "3.42", ATA_HORKAGE_NONCQ }, 4176 { "ST3160023AS", "3.42", ATA_HORKAGE_NONCQ }, 4177 4178 /* Blacklist entries taken from Silicon Image 3124/3132 4179 Windows driver .inf file - also several Linux problem reports */ 4180 { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, }, 4181 { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, }, 4182 { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, }, 4183 4184 /* devices which puke on READ_NATIVE_MAX */ 4185 { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, }, 4186 { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA }, 4187 { "WDC WD2500JD-00HBB0", "WD-WMAL71490727", ATA_HORKAGE_BROKEN_HPA }, 4188 { "MAXTOR 6L080L4", "A93.0500", ATA_HORKAGE_BROKEN_HPA }, 4189 4190 /* Devices which report 1 sector over size HPA */ 4191 { "ST340823A", NULL, ATA_HORKAGE_HPA_SIZE, }, 4192 { "ST320413A", NULL, ATA_HORKAGE_HPA_SIZE, }, 4193 4194 /* Devices which get the IVB wrong */ 4195 { "QUANTUM FIREBALLlct10 05", "A03.0900", ATA_HORKAGE_IVB, }, 4196 { "TSSTcorp CDDVDW SH-S202J", "SB00", ATA_HORKAGE_IVB, }, 4197 { "TSSTcorp CDDVDW SH-S202J", "SB01", ATA_HORKAGE_IVB, }, 4198 { "TSSTcorp CDDVDW SH-S202N", "SB00", ATA_HORKAGE_IVB, }, 4199 { "TSSTcorp CDDVDW SH-S202N", "SB01", ATA_HORKAGE_IVB, }, 4200 4201 /* End Marker */ 4202 { } 4203 }; 4204 4205 static int strn_pattern_cmp(const char *patt, const char *name, int wildchar) 4206 { 4207 const char *p; 4208 int len; 4209 4210 /* 4211 * check for trailing wildcard: *\0 4212 */ 4213 p = strchr(patt, wildchar); 4214 if (p && ((*(p + 1)) == 0)) 4215 len = p - patt; 4216 else { 4217 len = strlen(name); 4218 if (!len) { 4219 if (!*patt) 4220 return 0; 4221 return -1; 4222 } 4223 } 4224 4225 return strncmp(patt, name, len); 4226 } 4227 4228 static unsigned long ata_dev_blacklisted(const struct ata_device *dev) 4229 { 4230 unsigned char model_num[ATA_ID_PROD_LEN + 1]; 4231 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1]; 4232 const struct ata_blacklist_entry *ad = ata_device_blacklist; 4233 4234 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num)); 4235 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev)); 4236 4237 while (ad->model_num) { 4238 if (!strn_pattern_cmp(ad->model_num, model_num, '*')) { 4239 if (ad->model_rev == NULL) 4240 return ad->horkage; 4241 if (!strn_pattern_cmp(ad->model_rev, model_rev, '*')) 4242 return ad->horkage; 4243 } 4244 ad++; 4245 } 4246 return 0; 4247 } 4248 4249 static int ata_dma_blacklisted(const struct ata_device *dev) 4250 { 4251 /* We don't support polling DMA. 4252 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO) 4253 * if the LLDD handles only interrupts in the HSM_ST_LAST state. 4254 */ 4255 if ((dev->link->ap->flags & ATA_FLAG_PIO_POLLING) && 4256 (dev->flags & ATA_DFLAG_CDB_INTR)) 4257 return 1; 4258 return (dev->horkage & ATA_HORKAGE_NODMA) ? 1 : 0; 4259 } 4260 4261 /** 4262 * ata_is_40wire - check drive side detection 4263 * @dev: device 4264 * 4265 * Perform drive side detection decoding, allowing for device vendors 4266 * who can't follow the documentation. 4267 */ 4268 4269 static int ata_is_40wire(struct ata_device *dev) 4270 { 4271 if (dev->horkage & ATA_HORKAGE_IVB) 4272 return ata_drive_40wire_relaxed(dev->id); 4273 return ata_drive_40wire(dev->id); 4274 } 4275 4276 /** 4277 * ata_dev_xfermask - Compute supported xfermask of the given device 4278 * @dev: Device to compute xfermask for 4279 * 4280 * Compute supported xfermask of @dev and store it in 4281 * dev->*_mask. This function is responsible for applying all 4282 * known limits including host controller limits, device 4283 * blacklist, etc... 4284 * 4285 * LOCKING: 4286 * None. 4287 */ 4288 static void ata_dev_xfermask(struct ata_device *dev) 4289 { 4290 struct ata_link *link = dev->link; 4291 struct ata_port *ap = link->ap; 4292 struct ata_host *host = ap->host; 4293 unsigned long xfer_mask; 4294 4295 /* controller modes available */ 4296 xfer_mask = ata_pack_xfermask(ap->pio_mask, 4297 ap->mwdma_mask, ap->udma_mask); 4298 4299 /* drive modes available */ 4300 xfer_mask &= ata_pack_xfermask(dev->pio_mask, 4301 dev->mwdma_mask, dev->udma_mask); 4302 xfer_mask &= ata_id_xfermask(dev->id); 4303 4304 /* 4305 * CFA Advanced TrueIDE timings are not allowed on a shared 4306 * cable 4307 */ 4308 if (ata_dev_pair(dev)) { 4309 /* No PIO5 or PIO6 */ 4310 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5)); 4311 /* No MWDMA3 or MWDMA 4 */ 4312 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3)); 4313 } 4314 4315 if (ata_dma_blacklisted(dev)) { 4316 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); 4317 ata_dev_printk(dev, KERN_WARNING, 4318 "device is on DMA blacklist, disabling DMA\n"); 4319 } 4320 4321 if ((host->flags & ATA_HOST_SIMPLEX) && 4322 host->simplex_claimed && host->simplex_claimed != ap) { 4323 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); 4324 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by " 4325 "other device, disabling DMA\n"); 4326 } 4327 4328 if (ap->flags & ATA_FLAG_NO_IORDY) 4329 xfer_mask &= ata_pio_mask_no_iordy(dev); 4330 4331 if (ap->ops->mode_filter) 4332 xfer_mask = ap->ops->mode_filter(dev, xfer_mask); 4333 4334 /* Apply cable rule here. Don't apply it early because when 4335 * we handle hot plug the cable type can itself change. 4336 * Check this last so that we know if the transfer rate was 4337 * solely limited by the cable. 4338 * Unknown or 80 wire cables reported host side are checked 4339 * drive side as well. Cases where we know a 40wire cable 4340 * is used safely for 80 are not checked here. 4341 */ 4342 if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA)) 4343 /* UDMA/44 or higher would be available */ 4344 if ((ap->cbl == ATA_CBL_PATA40) || 4345 (ata_is_40wire(dev) && 4346 (ap->cbl == ATA_CBL_PATA_UNK || 4347 ap->cbl == ATA_CBL_PATA80))) { 4348 ata_dev_printk(dev, KERN_WARNING, 4349 "limited to UDMA/33 due to 40-wire cable\n"); 4350 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA); 4351 } 4352 4353 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, 4354 &dev->mwdma_mask, &dev->udma_mask); 4355 } 4356 4357 /** 4358 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command 4359 * @dev: Device to which command will be sent 4360 * 4361 * Issue SET FEATURES - XFER MODE command to device @dev 4362 * on port @ap. 4363 * 4364 * LOCKING: 4365 * PCI/etc. bus probe sem. 4366 * 4367 * RETURNS: 4368 * 0 on success, AC_ERR_* mask otherwise. 4369 */ 4370 4371 static unsigned int ata_dev_set_xfermode(struct ata_device *dev) 4372 { 4373 struct ata_taskfile tf; 4374 unsigned int err_mask; 4375 4376 /* set up set-features taskfile */ 4377 DPRINTK("set features - xfer mode\n"); 4378 4379 /* Some controllers and ATAPI devices show flaky interrupt 4380 * behavior after setting xfer mode. Use polling instead. 4381 */ 4382 ata_tf_init(dev, &tf); 4383 tf.command = ATA_CMD_SET_FEATURES; 4384 tf.feature = SETFEATURES_XFER; 4385 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING; 4386 tf.protocol = ATA_PROT_NODATA; 4387 /* If we are using IORDY we must send the mode setting command */ 4388 if (ata_pio_need_iordy(dev)) 4389 tf.nsect = dev->xfer_mode; 4390 /* If the device has IORDY and the controller does not - turn it off */ 4391 else if (ata_id_has_iordy(dev->id)) 4392 tf.nsect = 0x01; 4393 else /* In the ancient relic department - skip all of this */ 4394 return 0; 4395 4396 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); 4397 4398 DPRINTK("EXIT, err_mask=%x\n", err_mask); 4399 return err_mask; 4400 } 4401 /** 4402 * ata_dev_set_feature - Issue SET FEATURES - SATA FEATURES 4403 * @dev: Device to which command will be sent 4404 * @enable: Whether to enable or disable the feature 4405 * @feature: The sector count represents the feature to set 4406 * 4407 * Issue SET FEATURES - SATA FEATURES command to device @dev 4408 * on port @ap with sector count 4409 * 4410 * LOCKING: 4411 * PCI/etc. bus probe sem. 4412 * 4413 * RETURNS: 4414 * 0 on success, AC_ERR_* mask otherwise. 4415 */ 4416 static unsigned int ata_dev_set_feature(struct ata_device *dev, u8 enable, 4417 u8 feature) 4418 { 4419 struct ata_taskfile tf; 4420 unsigned int err_mask; 4421 4422 /* set up set-features taskfile */ 4423 DPRINTK("set features - SATA features\n"); 4424 4425 ata_tf_init(dev, &tf); 4426 tf.command = ATA_CMD_SET_FEATURES; 4427 tf.feature = enable; 4428 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 4429 tf.protocol = ATA_PROT_NODATA; 4430 tf.nsect = feature; 4431 4432 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); 4433 4434 DPRINTK("EXIT, err_mask=%x\n", err_mask); 4435 return err_mask; 4436 } 4437 4438 /** 4439 * ata_dev_init_params - Issue INIT DEV PARAMS command 4440 * @dev: Device to which command will be sent 4441 * @heads: Number of heads (taskfile parameter) 4442 * @sectors: Number of sectors (taskfile parameter) 4443 * 4444 * LOCKING: 4445 * Kernel thread context (may sleep) 4446 * 4447 * RETURNS: 4448 * 0 on success, AC_ERR_* mask otherwise. 4449 */ 4450 static unsigned int ata_dev_init_params(struct ata_device *dev, 4451 u16 heads, u16 sectors) 4452 { 4453 struct ata_taskfile tf; 4454 unsigned int err_mask; 4455 4456 /* Number of sectors per track 1-255. Number of heads 1-16 */ 4457 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16) 4458 return AC_ERR_INVALID; 4459 4460 /* set up init dev params taskfile */ 4461 DPRINTK("init dev params \n"); 4462 4463 ata_tf_init(dev, &tf); 4464 tf.command = ATA_CMD_INIT_DEV_PARAMS; 4465 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 4466 tf.protocol = ATA_PROT_NODATA; 4467 tf.nsect = sectors; 4468 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */ 4469 4470 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); 4471 /* A clean abort indicates an original or just out of spec drive 4472 and we should continue as we issue the setup based on the 4473 drive reported working geometry */ 4474 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED)) 4475 err_mask = 0; 4476 4477 DPRINTK("EXIT, err_mask=%x\n", err_mask); 4478 return err_mask; 4479 } 4480 4481 /** 4482 * ata_sg_clean - Unmap DMA memory associated with command 4483 * @qc: Command containing DMA memory to be released 4484 * 4485 * Unmap all mapped DMA memory associated with this command. 4486 * 4487 * LOCKING: 4488 * spin_lock_irqsave(host lock) 4489 */ 4490 void ata_sg_clean(struct ata_queued_cmd *qc) 4491 { 4492 struct ata_port *ap = qc->ap; 4493 struct scatterlist *sg = qc->sg; 4494 int dir = qc->dma_dir; 4495 void *pad_buf = NULL; 4496 4497 WARN_ON(sg == NULL); 4498 4499 VPRINTK("unmapping %u sg elements\n", qc->mapped_n_elem); 4500 4501 /* if we padded the buffer out to 32-bit bound, and data 4502 * xfer direction is from-device, we must copy from the 4503 * pad buffer back into the supplied buffer 4504 */ 4505 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE)) 4506 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); 4507 4508 if (qc->mapped_n_elem) 4509 dma_unmap_sg(ap->dev, sg, qc->mapped_n_elem, dir); 4510 /* restore last sg */ 4511 if (qc->last_sg) 4512 *qc->last_sg = qc->saved_last_sg; 4513 if (pad_buf) { 4514 struct scatterlist *psg = &qc->extra_sg[1]; 4515 void *addr = kmap_atomic(sg_page(psg), KM_IRQ0); 4516 memcpy(addr + psg->offset, pad_buf, qc->pad_len); 4517 kunmap_atomic(addr, KM_IRQ0); 4518 } 4519 4520 qc->flags &= ~ATA_QCFLAG_DMAMAP; 4521 qc->sg = NULL; 4522 } 4523 4524 /** 4525 * ata_fill_sg - Fill PCI IDE PRD table 4526 * @qc: Metadata associated with taskfile to be transferred 4527 * 4528 * Fill PCI IDE PRD (scatter-gather) table with segments 4529 * associated with the current disk command. 4530 * 4531 * LOCKING: 4532 * spin_lock_irqsave(host lock) 4533 * 4534 */ 4535 static void ata_fill_sg(struct ata_queued_cmd *qc) 4536 { 4537 struct ata_port *ap = qc->ap; 4538 struct scatterlist *sg; 4539 unsigned int si, pi; 4540 4541 pi = 0; 4542 for_each_sg(qc->sg, sg, qc->n_elem, si) { 4543 u32 addr, offset; 4544 u32 sg_len, len; 4545 4546 /* determine if physical DMA addr spans 64K boundary. 4547 * Note h/w doesn't support 64-bit, so we unconditionally 4548 * truncate dma_addr_t to u32. 4549 */ 4550 addr = (u32) sg_dma_address(sg); 4551 sg_len = sg_dma_len(sg); 4552 4553 while (sg_len) { 4554 offset = addr & 0xffff; 4555 len = sg_len; 4556 if ((offset + sg_len) > 0x10000) 4557 len = 0x10000 - offset; 4558 4559 ap->prd[pi].addr = cpu_to_le32(addr); 4560 ap->prd[pi].flags_len = cpu_to_le32(len & 0xffff); 4561 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len); 4562 4563 pi++; 4564 sg_len -= len; 4565 addr += len; 4566 } 4567 } 4568 4569 ap->prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); 4570 } 4571 4572 /** 4573 * ata_fill_sg_dumb - Fill PCI IDE PRD table 4574 * @qc: Metadata associated with taskfile to be transferred 4575 * 4576 * Fill PCI IDE PRD (scatter-gather) table with segments 4577 * associated with the current disk command. Perform the fill 4578 * so that we avoid writing any length 64K records for 4579 * controllers that don't follow the spec. 4580 * 4581 * LOCKING: 4582 * spin_lock_irqsave(host lock) 4583 * 4584 */ 4585 static void ata_fill_sg_dumb(struct ata_queued_cmd *qc) 4586 { 4587 struct ata_port *ap = qc->ap; 4588 struct scatterlist *sg; 4589 unsigned int si, pi; 4590 4591 pi = 0; 4592 for_each_sg(qc->sg, sg, qc->n_elem, si) { 4593 u32 addr, offset; 4594 u32 sg_len, len, blen; 4595 4596 /* determine if physical DMA addr spans 64K boundary. 4597 * Note h/w doesn't support 64-bit, so we unconditionally 4598 * truncate dma_addr_t to u32. 4599 */ 4600 addr = (u32) sg_dma_address(sg); 4601 sg_len = sg_dma_len(sg); 4602 4603 while (sg_len) { 4604 offset = addr & 0xffff; 4605 len = sg_len; 4606 if ((offset + sg_len) > 0x10000) 4607 len = 0x10000 - offset; 4608 4609 blen = len & 0xffff; 4610 ap->prd[pi].addr = cpu_to_le32(addr); 4611 if (blen == 0) { 4612 /* Some PATA chipsets like the CS5530 can't 4613 cope with 0x0000 meaning 64K as the spec says */ 4614 ap->prd[pi].flags_len = cpu_to_le32(0x8000); 4615 blen = 0x8000; 4616 ap->prd[++pi].addr = cpu_to_le32(addr + 0x8000); 4617 } 4618 ap->prd[pi].flags_len = cpu_to_le32(blen); 4619 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len); 4620 4621 pi++; 4622 sg_len -= len; 4623 addr += len; 4624 } 4625 } 4626 4627 ap->prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); 4628 } 4629 4630 /** 4631 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported 4632 * @qc: Metadata associated with taskfile to check 4633 * 4634 * Allow low-level driver to filter ATA PACKET commands, returning 4635 * a status indicating whether or not it is OK to use DMA for the 4636 * supplied PACKET command. 4637 * 4638 * LOCKING: 4639 * spin_lock_irqsave(host lock) 4640 * 4641 * RETURNS: 0 when ATAPI DMA can be used 4642 * nonzero otherwise 4643 */ 4644 int ata_check_atapi_dma(struct ata_queued_cmd *qc) 4645 { 4646 struct ata_port *ap = qc->ap; 4647 4648 /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a 4649 * few ATAPI devices choke on such DMA requests. 4650 */ 4651 if (unlikely(qc->nbytes & 15)) 4652 return 1; 4653 4654 if (ap->ops->check_atapi_dma) 4655 return ap->ops->check_atapi_dma(qc); 4656 4657 return 0; 4658 } 4659 4660 /** 4661 * atapi_qc_may_overflow - Check whether data transfer may overflow 4662 * @qc: ATA command in question 4663 * 4664 * ATAPI commands which transfer variable length data to host 4665 * might overflow due to application error or hardare bug. This 4666 * function checks whether overflow should be drained and ignored 4667 * for @qc. 4668 * 4669 * LOCKING: 4670 * None. 4671 * 4672 * RETURNS: 4673 * 1 if @qc may overflow; otherwise, 0. 4674 */ 4675 static int atapi_qc_may_overflow(struct ata_queued_cmd *qc) 4676 { 4677 if (qc->tf.protocol != ATAPI_PROT_PIO && 4678 qc->tf.protocol != ATAPI_PROT_DMA) 4679 return 0; 4680 4681 if (qc->tf.flags & ATA_TFLAG_WRITE) 4682 return 0; 4683 4684 switch (qc->cdb[0]) { 4685 case READ_10: 4686 case READ_12: 4687 case WRITE_10: 4688 case WRITE_12: 4689 case GPCMD_READ_CD: 4690 case GPCMD_READ_CD_MSF: 4691 return 0; 4692 } 4693 4694 return 1; 4695 } 4696 4697 /** 4698 * ata_std_qc_defer - Check whether a qc needs to be deferred 4699 * @qc: ATA command in question 4700 * 4701 * Non-NCQ commands cannot run with any other command, NCQ or 4702 * not. As upper layer only knows the queue depth, we are 4703 * responsible for maintaining exclusion. This function checks 4704 * whether a new command @qc can be issued. 4705 * 4706 * LOCKING: 4707 * spin_lock_irqsave(host lock) 4708 * 4709 * RETURNS: 4710 * ATA_DEFER_* if deferring is needed, 0 otherwise. 4711 */ 4712 int ata_std_qc_defer(struct ata_queued_cmd *qc) 4713 { 4714 struct ata_link *link = qc->dev->link; 4715 4716 if (qc->tf.protocol == ATA_PROT_NCQ) { 4717 if (!ata_tag_valid(link->active_tag)) 4718 return 0; 4719 } else { 4720 if (!ata_tag_valid(link->active_tag) && !link->sactive) 4721 return 0; 4722 } 4723 4724 return ATA_DEFER_LINK; 4725 } 4726 4727 /** 4728 * ata_qc_prep - Prepare taskfile for submission 4729 * @qc: Metadata associated with taskfile to be prepared 4730 * 4731 * Prepare ATA taskfile for submission. 4732 * 4733 * LOCKING: 4734 * spin_lock_irqsave(host lock) 4735 */ 4736 void ata_qc_prep(struct ata_queued_cmd *qc) 4737 { 4738 if (!(qc->flags & ATA_QCFLAG_DMAMAP)) 4739 return; 4740 4741 ata_fill_sg(qc); 4742 } 4743 4744 /** 4745 * ata_dumb_qc_prep - Prepare taskfile for submission 4746 * @qc: Metadata associated with taskfile to be prepared 4747 * 4748 * Prepare ATA taskfile for submission. 4749 * 4750 * LOCKING: 4751 * spin_lock_irqsave(host lock) 4752 */ 4753 void ata_dumb_qc_prep(struct ata_queued_cmd *qc) 4754 { 4755 if (!(qc->flags & ATA_QCFLAG_DMAMAP)) 4756 return; 4757 4758 ata_fill_sg_dumb(qc); 4759 } 4760 4761 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { } 4762 4763 /** 4764 * ata_sg_init - Associate command with scatter-gather table. 4765 * @qc: Command to be associated 4766 * @sg: Scatter-gather table. 4767 * @n_elem: Number of elements in s/g table. 4768 * 4769 * Initialize the data-related elements of queued_cmd @qc 4770 * to point to a scatter-gather table @sg, containing @n_elem 4771 * elements. 4772 * 4773 * LOCKING: 4774 * spin_lock_irqsave(host lock) 4775 */ 4776 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, 4777 unsigned int n_elem) 4778 { 4779 qc->sg = sg; 4780 qc->n_elem = n_elem; 4781 qc->cursg = qc->sg; 4782 } 4783 4784 static unsigned int ata_sg_setup_extra(struct ata_queued_cmd *qc, 4785 unsigned int *n_elem_extra, 4786 unsigned int *nbytes_extra) 4787 { 4788 struct ata_port *ap = qc->ap; 4789 unsigned int n_elem = qc->n_elem; 4790 struct scatterlist *lsg, *copy_lsg = NULL, *tsg = NULL, *esg = NULL; 4791 4792 *n_elem_extra = 0; 4793 *nbytes_extra = 0; 4794 4795 /* needs padding? */ 4796 qc->pad_len = qc->nbytes & 3; 4797 4798 if (likely(!qc->pad_len)) 4799 return n_elem; 4800 4801 /* locate last sg and save it */ 4802 lsg = sg_last(qc->sg, n_elem); 4803 qc->last_sg = lsg; 4804 qc->saved_last_sg = *lsg; 4805 4806 sg_init_table(qc->extra_sg, ARRAY_SIZE(qc->extra_sg)); 4807 4808 if (qc->pad_len) { 4809 struct scatterlist *psg = &qc->extra_sg[1]; 4810 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); 4811 unsigned int offset; 4812 4813 WARN_ON(qc->dev->class != ATA_DEV_ATAPI); 4814 4815 memset(pad_buf, 0, ATA_DMA_PAD_SZ); 4816 4817 /* psg->page/offset are used to copy to-be-written 4818 * data in this function or read data in ata_sg_clean. 4819 */ 4820 offset = lsg->offset + lsg->length - qc->pad_len; 4821 sg_set_page(psg, nth_page(sg_page(lsg), offset >> PAGE_SHIFT), 4822 qc->pad_len, offset_in_page(offset)); 4823 4824 if (qc->tf.flags & ATA_TFLAG_WRITE) { 4825 void *addr = kmap_atomic(sg_page(psg), KM_IRQ0); 4826 memcpy(pad_buf, addr + psg->offset, qc->pad_len); 4827 kunmap_atomic(addr, KM_IRQ0); 4828 } 4829 4830 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); 4831 sg_dma_len(psg) = ATA_DMA_PAD_SZ; 4832 4833 /* Trim the last sg entry and chain the original and 4834 * padding sg lists. 4835 * 4836 * Because chaining consumes one sg entry, one extra 4837 * sg entry is allocated and the last sg entry is 4838 * copied to it if the length isn't zero after padded 4839 * amount is removed. 4840 * 4841 * If the last sg entry is completely replaced by 4842 * padding sg entry, the first sg entry is skipped 4843 * while chaining. 4844 */ 4845 lsg->length -= qc->pad_len; 4846 if (lsg->length) { 4847 copy_lsg = &qc->extra_sg[0]; 4848 tsg = &qc->extra_sg[0]; 4849 } else { 4850 n_elem--; 4851 tsg = &qc->extra_sg[1]; 4852 } 4853 4854 esg = &qc->extra_sg[1]; 4855 4856 (*n_elem_extra)++; 4857 (*nbytes_extra) += 4 - qc->pad_len; 4858 } 4859 4860 if (copy_lsg) 4861 sg_set_page(copy_lsg, sg_page(lsg), lsg->length, lsg->offset); 4862 4863 sg_chain(lsg, 1, tsg); 4864 sg_mark_end(esg); 4865 4866 /* sglist can't start with chaining sg entry, fast forward */ 4867 if (qc->sg == lsg) { 4868 qc->sg = tsg; 4869 qc->cursg = tsg; 4870 } 4871 4872 return n_elem; 4873 } 4874 4875 /** 4876 * ata_sg_setup - DMA-map the scatter-gather table associated with a command. 4877 * @qc: Command with scatter-gather table to be mapped. 4878 * 4879 * DMA-map the scatter-gather table associated with queued_cmd @qc. 4880 * 4881 * LOCKING: 4882 * spin_lock_irqsave(host lock) 4883 * 4884 * RETURNS: 4885 * Zero on success, negative on error. 4886 * 4887 */ 4888 static int ata_sg_setup(struct ata_queued_cmd *qc) 4889 { 4890 struct ata_port *ap = qc->ap; 4891 unsigned int n_elem, n_elem_extra, nbytes_extra; 4892 4893 VPRINTK("ENTER, ata%u\n", ap->print_id); 4894 4895 n_elem = ata_sg_setup_extra(qc, &n_elem_extra, &nbytes_extra); 4896 4897 if (n_elem) { 4898 n_elem = dma_map_sg(ap->dev, qc->sg, n_elem, qc->dma_dir); 4899 if (n_elem < 1) { 4900 /* restore last sg */ 4901 if (qc->last_sg) 4902 *qc->last_sg = qc->saved_last_sg; 4903 return -1; 4904 } 4905 DPRINTK("%d sg elements mapped\n", n_elem); 4906 } 4907 4908 qc->n_elem = qc->mapped_n_elem = n_elem; 4909 qc->n_elem += n_elem_extra; 4910 qc->nbytes += nbytes_extra; 4911 qc->flags |= ATA_QCFLAG_DMAMAP; 4912 4913 return 0; 4914 } 4915 4916 /** 4917 * swap_buf_le16 - swap halves of 16-bit words in place 4918 * @buf: Buffer to swap 4919 * @buf_words: Number of 16-bit words in buffer. 4920 * 4921 * Swap halves of 16-bit words if needed to convert from 4922 * little-endian byte order to native cpu byte order, or 4923 * vice-versa. 4924 * 4925 * LOCKING: 4926 * Inherited from caller. 4927 */ 4928 void swap_buf_le16(u16 *buf, unsigned int buf_words) 4929 { 4930 #ifdef __BIG_ENDIAN 4931 unsigned int i; 4932 4933 for (i = 0; i < buf_words; i++) 4934 buf[i] = le16_to_cpu(buf[i]); 4935 #endif /* __BIG_ENDIAN */ 4936 } 4937 4938 /** 4939 * ata_data_xfer - Transfer data by PIO 4940 * @dev: device to target 4941 * @buf: data buffer 4942 * @buflen: buffer length 4943 * @rw: read/write 4944 * 4945 * Transfer data from/to the device data register by PIO. 4946 * 4947 * LOCKING: 4948 * Inherited from caller. 4949 * 4950 * RETURNS: 4951 * Bytes consumed. 4952 */ 4953 unsigned int ata_data_xfer(struct ata_device *dev, unsigned char *buf, 4954 unsigned int buflen, int rw) 4955 { 4956 struct ata_port *ap = dev->link->ap; 4957 void __iomem *data_addr = ap->ioaddr.data_addr; 4958 unsigned int words = buflen >> 1; 4959 4960 /* Transfer multiple of 2 bytes */ 4961 if (rw == READ) 4962 ioread16_rep(data_addr, buf, words); 4963 else 4964 iowrite16_rep(data_addr, buf, words); 4965 4966 /* Transfer trailing 1 byte, if any. */ 4967 if (unlikely(buflen & 0x01)) { 4968 __le16 align_buf[1] = { 0 }; 4969 unsigned char *trailing_buf = buf + buflen - 1; 4970 4971 if (rw == READ) { 4972 align_buf[0] = cpu_to_le16(ioread16(data_addr)); 4973 memcpy(trailing_buf, align_buf, 1); 4974 } else { 4975 memcpy(align_buf, trailing_buf, 1); 4976 iowrite16(le16_to_cpu(align_buf[0]), data_addr); 4977 } 4978 words++; 4979 } 4980 4981 return words << 1; 4982 } 4983 4984 /** 4985 * ata_data_xfer_noirq - Transfer data by PIO 4986 * @dev: device to target 4987 * @buf: data buffer 4988 * @buflen: buffer length 4989 * @rw: read/write 4990 * 4991 * Transfer data from/to the device data register by PIO. Do the 4992 * transfer with interrupts disabled. 4993 * 4994 * LOCKING: 4995 * Inherited from caller. 4996 * 4997 * RETURNS: 4998 * Bytes consumed. 4999 */ 5000 unsigned int ata_data_xfer_noirq(struct ata_device *dev, unsigned char *buf, 5001 unsigned int buflen, int rw) 5002 { 5003 unsigned long flags; 5004 unsigned int consumed; 5005 5006 local_irq_save(flags); 5007 consumed = ata_data_xfer(dev, buf, buflen, rw); 5008 local_irq_restore(flags); 5009 5010 return consumed; 5011 } 5012 5013 5014 /** 5015 * ata_pio_sector - Transfer a sector of data. 5016 * @qc: Command on going 5017 * 5018 * Transfer qc->sect_size bytes of data from/to the ATA device. 5019 * 5020 * LOCKING: 5021 * Inherited from caller. 5022 */ 5023 5024 static void ata_pio_sector(struct ata_queued_cmd *qc) 5025 { 5026 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); 5027 struct ata_port *ap = qc->ap; 5028 struct page *page; 5029 unsigned int offset; 5030 unsigned char *buf; 5031 5032 if (qc->curbytes == qc->nbytes - qc->sect_size) 5033 ap->hsm_task_state = HSM_ST_LAST; 5034 5035 page = sg_page(qc->cursg); 5036 offset = qc->cursg->offset + qc->cursg_ofs; 5037 5038 /* get the current page and offset */ 5039 page = nth_page(page, (offset >> PAGE_SHIFT)); 5040 offset %= PAGE_SIZE; 5041 5042 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); 5043 5044 if (PageHighMem(page)) { 5045 unsigned long flags; 5046 5047 /* FIXME: use a bounce buffer */ 5048 local_irq_save(flags); 5049 buf = kmap_atomic(page, KM_IRQ0); 5050 5051 /* do the actual data transfer */ 5052 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write); 5053 5054 kunmap_atomic(buf, KM_IRQ0); 5055 local_irq_restore(flags); 5056 } else { 5057 buf = page_address(page); 5058 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write); 5059 } 5060 5061 qc->curbytes += qc->sect_size; 5062 qc->cursg_ofs += qc->sect_size; 5063 5064 if (qc->cursg_ofs == qc->cursg->length) { 5065 qc->cursg = sg_next(qc->cursg); 5066 qc->cursg_ofs = 0; 5067 } 5068 } 5069 5070 /** 5071 * ata_pio_sectors - Transfer one or many sectors. 5072 * @qc: Command on going 5073 * 5074 * Transfer one or many sectors of data from/to the 5075 * ATA device for the DRQ request. 5076 * 5077 * LOCKING: 5078 * Inherited from caller. 5079 */ 5080 5081 static void ata_pio_sectors(struct ata_queued_cmd *qc) 5082 { 5083 if (is_multi_taskfile(&qc->tf)) { 5084 /* READ/WRITE MULTIPLE */ 5085 unsigned int nsect; 5086 5087 WARN_ON(qc->dev->multi_count == 0); 5088 5089 nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size, 5090 qc->dev->multi_count); 5091 while (nsect--) 5092 ata_pio_sector(qc); 5093 } else 5094 ata_pio_sector(qc); 5095 5096 ata_altstatus(qc->ap); /* flush */ 5097 } 5098 5099 /** 5100 * atapi_send_cdb - Write CDB bytes to hardware 5101 * @ap: Port to which ATAPI device is attached. 5102 * @qc: Taskfile currently active 5103 * 5104 * When device has indicated its readiness to accept 5105 * a CDB, this function is called. Send the CDB. 5106 * 5107 * LOCKING: 5108 * caller. 5109 */ 5110 5111 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc) 5112 { 5113 /* send SCSI cdb */ 5114 DPRINTK("send cdb\n"); 5115 WARN_ON(qc->dev->cdb_len < 12); 5116 5117 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1); 5118 ata_altstatus(ap); /* flush */ 5119 5120 switch (qc->tf.protocol) { 5121 case ATAPI_PROT_PIO: 5122 ap->hsm_task_state = HSM_ST; 5123 break; 5124 case ATAPI_PROT_NODATA: 5125 ap->hsm_task_state = HSM_ST_LAST; 5126 break; 5127 case ATAPI_PROT_DMA: 5128 ap->hsm_task_state = HSM_ST_LAST; 5129 /* initiate bmdma */ 5130 ap->ops->bmdma_start(qc); 5131 break; 5132 } 5133 } 5134 5135 /** 5136 * __atapi_pio_bytes - Transfer data from/to the ATAPI device. 5137 * @qc: Command on going 5138 * @bytes: number of bytes 5139 * 5140 * Transfer Transfer data from/to the ATAPI device. 5141 * 5142 * LOCKING: 5143 * Inherited from caller. 5144 * 5145 */ 5146 static int __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) 5147 { 5148 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); 5149 struct ata_port *ap = qc->ap; 5150 struct ata_eh_info *ehi = &qc->dev->link->eh_info; 5151 struct scatterlist *sg; 5152 struct page *page; 5153 unsigned char *buf; 5154 unsigned int offset, count; 5155 5156 next_sg: 5157 sg = qc->cursg; 5158 if (unlikely(!sg)) { 5159 /* 5160 * The end of qc->sg is reached and the device expects 5161 * more data to transfer. In order not to overrun qc->sg 5162 * and fulfill length specified in the byte count register, 5163 * - for read case, discard trailing data from the device 5164 * - for write case, padding zero data to the device 5165 */ 5166 u16 pad_buf[1] = { 0 }; 5167 unsigned int i; 5168 5169 if (bytes > qc->curbytes - qc->nbytes + ATAPI_MAX_DRAIN) { 5170 ata_ehi_push_desc(ehi, "too much trailing data " 5171 "buf=%u cur=%u bytes=%u", 5172 qc->nbytes, qc->curbytes, bytes); 5173 return -1; 5174 } 5175 5176 /* overflow is exptected for misc ATAPI commands */ 5177 if (bytes && !atapi_qc_may_overflow(qc)) 5178 ata_dev_printk(qc->dev, KERN_WARNING, "ATAPI %u bytes " 5179 "trailing data (cdb=%02x nbytes=%u)\n", 5180 bytes, qc->cdb[0], qc->nbytes); 5181 5182 for (i = 0; i < (bytes + 1) / 2; i++) 5183 ap->ops->data_xfer(qc->dev, (unsigned char *)pad_buf, 2, do_write); 5184 5185 qc->curbytes += bytes; 5186 5187 return 0; 5188 } 5189 5190 page = sg_page(sg); 5191 offset = sg->offset + qc->cursg_ofs; 5192 5193 /* get the current page and offset */ 5194 page = nth_page(page, (offset >> PAGE_SHIFT)); 5195 offset %= PAGE_SIZE; 5196 5197 /* don't overrun current sg */ 5198 count = min(sg->length - qc->cursg_ofs, bytes); 5199 5200 /* don't cross page boundaries */ 5201 count = min(count, (unsigned int)PAGE_SIZE - offset); 5202 5203 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); 5204 5205 if (PageHighMem(page)) { 5206 unsigned long flags; 5207 5208 /* FIXME: use bounce buffer */ 5209 local_irq_save(flags); 5210 buf = kmap_atomic(page, KM_IRQ0); 5211 5212 /* do the actual data transfer */ 5213 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); 5214 5215 kunmap_atomic(buf, KM_IRQ0); 5216 local_irq_restore(flags); 5217 } else { 5218 buf = page_address(page); 5219 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); 5220 } 5221 5222 bytes -= count; 5223 if ((count & 1) && bytes) 5224 bytes--; 5225 qc->curbytes += count; 5226 qc->cursg_ofs += count; 5227 5228 if (qc->cursg_ofs == sg->length) { 5229 qc->cursg = sg_next(qc->cursg); 5230 qc->cursg_ofs = 0; 5231 } 5232 5233 if (bytes) 5234 goto next_sg; 5235 5236 return 0; 5237 } 5238 5239 /** 5240 * atapi_pio_bytes - Transfer data from/to the ATAPI device. 5241 * @qc: Command on going 5242 * 5243 * Transfer Transfer data from/to the ATAPI device. 5244 * 5245 * LOCKING: 5246 * Inherited from caller. 5247 */ 5248 5249 static void atapi_pio_bytes(struct ata_queued_cmd *qc) 5250 { 5251 struct ata_port *ap = qc->ap; 5252 struct ata_device *dev = qc->dev; 5253 unsigned int ireason, bc_lo, bc_hi, bytes; 5254 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; 5255 5256 /* Abuse qc->result_tf for temp storage of intermediate TF 5257 * here to save some kernel stack usage. 5258 * For normal completion, qc->result_tf is not relevant. For 5259 * error, qc->result_tf is later overwritten by ata_qc_complete(). 5260 * So, the correctness of qc->result_tf is not affected. 5261 */ 5262 ap->ops->tf_read(ap, &qc->result_tf); 5263 ireason = qc->result_tf.nsect; 5264 bc_lo = qc->result_tf.lbam; 5265 bc_hi = qc->result_tf.lbah; 5266 bytes = (bc_hi << 8) | bc_lo; 5267 5268 /* shall be cleared to zero, indicating xfer of data */ 5269 if (unlikely(ireason & (1 << 0))) 5270 goto err_out; 5271 5272 /* make sure transfer direction matches expected */ 5273 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; 5274 if (unlikely(do_write != i_write)) 5275 goto err_out; 5276 5277 if (unlikely(!bytes)) 5278 goto err_out; 5279 5280 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes); 5281 5282 if (__atapi_pio_bytes(qc, bytes)) 5283 goto err_out; 5284 ata_altstatus(ap); /* flush */ 5285 5286 return; 5287 5288 err_out: 5289 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n"); 5290 qc->err_mask |= AC_ERR_HSM; 5291 ap->hsm_task_state = HSM_ST_ERR; 5292 } 5293 5294 /** 5295 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue. 5296 * @ap: the target ata_port 5297 * @qc: qc on going 5298 * 5299 * RETURNS: 5300 * 1 if ok in workqueue, 0 otherwise. 5301 */ 5302 5303 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc) 5304 { 5305 if (qc->tf.flags & ATA_TFLAG_POLLING) 5306 return 1; 5307 5308 if (ap->hsm_task_state == HSM_ST_FIRST) { 5309 if (qc->tf.protocol == ATA_PROT_PIO && 5310 (qc->tf.flags & ATA_TFLAG_WRITE)) 5311 return 1; 5312 5313 if (ata_is_atapi(qc->tf.protocol) && 5314 !(qc->dev->flags & ATA_DFLAG_CDB_INTR)) 5315 return 1; 5316 } 5317 5318 return 0; 5319 } 5320 5321 /** 5322 * ata_hsm_qc_complete - finish a qc running on standard HSM 5323 * @qc: Command to complete 5324 * @in_wq: 1 if called from workqueue, 0 otherwise 5325 * 5326 * Finish @qc which is running on standard HSM. 5327 * 5328 * LOCKING: 5329 * If @in_wq is zero, spin_lock_irqsave(host lock). 5330 * Otherwise, none on entry and grabs host lock. 5331 */ 5332 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq) 5333 { 5334 struct ata_port *ap = qc->ap; 5335 unsigned long flags; 5336 5337 if (ap->ops->error_handler) { 5338 if (in_wq) { 5339 spin_lock_irqsave(ap->lock, flags); 5340 5341 /* EH might have kicked in while host lock is 5342 * released. 5343 */ 5344 qc = ata_qc_from_tag(ap, qc->tag); 5345 if (qc) { 5346 if (likely(!(qc->err_mask & AC_ERR_HSM))) { 5347 ap->ops->irq_on(ap); 5348 ata_qc_complete(qc); 5349 } else 5350 ata_port_freeze(ap); 5351 } 5352 5353 spin_unlock_irqrestore(ap->lock, flags); 5354 } else { 5355 if (likely(!(qc->err_mask & AC_ERR_HSM))) 5356 ata_qc_complete(qc); 5357 else 5358 ata_port_freeze(ap); 5359 } 5360 } else { 5361 if (in_wq) { 5362 spin_lock_irqsave(ap->lock, flags); 5363 ap->ops->irq_on(ap); 5364 ata_qc_complete(qc); 5365 spin_unlock_irqrestore(ap->lock, flags); 5366 } else 5367 ata_qc_complete(qc); 5368 } 5369 } 5370 5371 /** 5372 * ata_hsm_move - move the HSM to the next state. 5373 * @ap: the target ata_port 5374 * @qc: qc on going 5375 * @status: current device status 5376 * @in_wq: 1 if called from workqueue, 0 otherwise 5377 * 5378 * RETURNS: 5379 * 1 when poll next status needed, 0 otherwise. 5380 */ 5381 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc, 5382 u8 status, int in_wq) 5383 { 5384 unsigned long flags = 0; 5385 int poll_next; 5386 5387 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0); 5388 5389 /* Make sure ata_qc_issue_prot() does not throw things 5390 * like DMA polling into the workqueue. Notice that 5391 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING). 5392 */ 5393 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc)); 5394 5395 fsm_start: 5396 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n", 5397 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status); 5398 5399 switch (ap->hsm_task_state) { 5400 case HSM_ST_FIRST: 5401 /* Send first data block or PACKET CDB */ 5402 5403 /* If polling, we will stay in the work queue after 5404 * sending the data. Otherwise, interrupt handler 5405 * takes over after sending the data. 5406 */ 5407 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING); 5408 5409 /* check device status */ 5410 if (unlikely((status & ATA_DRQ) == 0)) { 5411 /* handle BSY=0, DRQ=0 as error */ 5412 if (likely(status & (ATA_ERR | ATA_DF))) 5413 /* device stops HSM for abort/error */ 5414 qc->err_mask |= AC_ERR_DEV; 5415 else 5416 /* HSM violation. Let EH handle this */ 5417 qc->err_mask |= AC_ERR_HSM; 5418 5419 ap->hsm_task_state = HSM_ST_ERR; 5420 goto fsm_start; 5421 } 5422 5423 /* Device should not ask for data transfer (DRQ=1) 5424 * when it finds something wrong. 5425 * We ignore DRQ here and stop the HSM by 5426 * changing hsm_task_state to HSM_ST_ERR and 5427 * let the EH abort the command or reset the device. 5428 */ 5429 if (unlikely(status & (ATA_ERR | ATA_DF))) { 5430 /* Some ATAPI tape drives forget to clear the ERR bit 5431 * when doing the next command (mostly request sense). 5432 * We ignore ERR here to workaround and proceed sending 5433 * the CDB. 5434 */ 5435 if (!(qc->dev->horkage & ATA_HORKAGE_STUCK_ERR)) { 5436 ata_port_printk(ap, KERN_WARNING, 5437 "DRQ=1 with device error, " 5438 "dev_stat 0x%X\n", status); 5439 qc->err_mask |= AC_ERR_HSM; 5440 ap->hsm_task_state = HSM_ST_ERR; 5441 goto fsm_start; 5442 } 5443 } 5444 5445 /* Send the CDB (atapi) or the first data block (ata pio out). 5446 * During the state transition, interrupt handler shouldn't 5447 * be invoked before the data transfer is complete and 5448 * hsm_task_state is changed. Hence, the following locking. 5449 */ 5450 if (in_wq) 5451 spin_lock_irqsave(ap->lock, flags); 5452 5453 if (qc->tf.protocol == ATA_PROT_PIO) { 5454 /* PIO data out protocol. 5455 * send first data block. 5456 */ 5457 5458 /* ata_pio_sectors() might change the state 5459 * to HSM_ST_LAST. so, the state is changed here 5460 * before ata_pio_sectors(). 5461 */ 5462 ap->hsm_task_state = HSM_ST; 5463 ata_pio_sectors(qc); 5464 } else 5465 /* send CDB */ 5466 atapi_send_cdb(ap, qc); 5467 5468 if (in_wq) 5469 spin_unlock_irqrestore(ap->lock, flags); 5470 5471 /* if polling, ata_pio_task() handles the rest. 5472 * otherwise, interrupt handler takes over from here. 5473 */ 5474 break; 5475 5476 case HSM_ST: 5477 /* complete command or read/write the data register */ 5478 if (qc->tf.protocol == ATAPI_PROT_PIO) { 5479 /* ATAPI PIO protocol */ 5480 if ((status & ATA_DRQ) == 0) { 5481 /* No more data to transfer or device error. 5482 * Device error will be tagged in HSM_ST_LAST. 5483 */ 5484 ap->hsm_task_state = HSM_ST_LAST; 5485 goto fsm_start; 5486 } 5487 5488 /* Device should not ask for data transfer (DRQ=1) 5489 * when it finds something wrong. 5490 * We ignore DRQ here and stop the HSM by 5491 * changing hsm_task_state to HSM_ST_ERR and 5492 * let the EH abort the command or reset the device. 5493 */ 5494 if (unlikely(status & (ATA_ERR | ATA_DF))) { 5495 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with " 5496 "device error, dev_stat 0x%X\n", 5497 status); 5498 qc->err_mask |= AC_ERR_HSM; 5499 ap->hsm_task_state = HSM_ST_ERR; 5500 goto fsm_start; 5501 } 5502 5503 atapi_pio_bytes(qc); 5504 5505 if (unlikely(ap->hsm_task_state == HSM_ST_ERR)) 5506 /* bad ireason reported by device */ 5507 goto fsm_start; 5508 5509 } else { 5510 /* ATA PIO protocol */ 5511 if (unlikely((status & ATA_DRQ) == 0)) { 5512 /* handle BSY=0, DRQ=0 as error */ 5513 if (likely(status & (ATA_ERR | ATA_DF))) 5514 /* device stops HSM for abort/error */ 5515 qc->err_mask |= AC_ERR_DEV; 5516 else 5517 /* HSM violation. Let EH handle this. 5518 * Phantom devices also trigger this 5519 * condition. Mark hint. 5520 */ 5521 qc->err_mask |= AC_ERR_HSM | 5522 AC_ERR_NODEV_HINT; 5523 5524 ap->hsm_task_state = HSM_ST_ERR; 5525 goto fsm_start; 5526 } 5527 5528 /* For PIO reads, some devices may ask for 5529 * data transfer (DRQ=1) alone with ERR=1. 5530 * We respect DRQ here and transfer one 5531 * block of junk data before changing the 5532 * hsm_task_state to HSM_ST_ERR. 5533 * 5534 * For PIO writes, ERR=1 DRQ=1 doesn't make 5535 * sense since the data block has been 5536 * transferred to the device. 5537 */ 5538 if (unlikely(status & (ATA_ERR | ATA_DF))) { 5539 /* data might be corrputed */ 5540 qc->err_mask |= AC_ERR_DEV; 5541 5542 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) { 5543 ata_pio_sectors(qc); 5544 status = ata_wait_idle(ap); 5545 } 5546 5547 if (status & (ATA_BUSY | ATA_DRQ)) 5548 qc->err_mask |= AC_ERR_HSM; 5549 5550 /* ata_pio_sectors() might change the 5551 * state to HSM_ST_LAST. so, the state 5552 * is changed after ata_pio_sectors(). 5553 */ 5554 ap->hsm_task_state = HSM_ST_ERR; 5555 goto fsm_start; 5556 } 5557 5558 ata_pio_sectors(qc); 5559 5560 if (ap->hsm_task_state == HSM_ST_LAST && 5561 (!(qc->tf.flags & ATA_TFLAG_WRITE))) { 5562 /* all data read */ 5563 status = ata_wait_idle(ap); 5564 goto fsm_start; 5565 } 5566 } 5567 5568 poll_next = 1; 5569 break; 5570 5571 case HSM_ST_LAST: 5572 if (unlikely(!ata_ok(status))) { 5573 qc->err_mask |= __ac_err_mask(status); 5574 ap->hsm_task_state = HSM_ST_ERR; 5575 goto fsm_start; 5576 } 5577 5578 /* no more data to transfer */ 5579 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n", 5580 ap->print_id, qc->dev->devno, status); 5581 5582 WARN_ON(qc->err_mask); 5583 5584 ap->hsm_task_state = HSM_ST_IDLE; 5585 5586 /* complete taskfile transaction */ 5587 ata_hsm_qc_complete(qc, in_wq); 5588 5589 poll_next = 0; 5590 break; 5591 5592 case HSM_ST_ERR: 5593 /* make sure qc->err_mask is available to 5594 * know what's wrong and recover 5595 */ 5596 WARN_ON(qc->err_mask == 0); 5597 5598 ap->hsm_task_state = HSM_ST_IDLE; 5599 5600 /* complete taskfile transaction */ 5601 ata_hsm_qc_complete(qc, in_wq); 5602 5603 poll_next = 0; 5604 break; 5605 default: 5606 poll_next = 0; 5607 BUG(); 5608 } 5609 5610 return poll_next; 5611 } 5612 5613 static void ata_pio_task(struct work_struct *work) 5614 { 5615 struct ata_port *ap = 5616 container_of(work, struct ata_port, port_task.work); 5617 struct ata_queued_cmd *qc = ap->port_task_data; 5618 u8 status; 5619 int poll_next; 5620 5621 fsm_start: 5622 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE); 5623 5624 /* 5625 * This is purely heuristic. This is a fast path. 5626 * Sometimes when we enter, BSY will be cleared in 5627 * a chk-status or two. If not, the drive is probably seeking 5628 * or something. Snooze for a couple msecs, then 5629 * chk-status again. If still busy, queue delayed work. 5630 */ 5631 status = ata_busy_wait(ap, ATA_BUSY, 5); 5632 if (status & ATA_BUSY) { 5633 msleep(2); 5634 status = ata_busy_wait(ap, ATA_BUSY, 10); 5635 if (status & ATA_BUSY) { 5636 ata_pio_queue_task(ap, qc, ATA_SHORT_PAUSE); 5637 return; 5638 } 5639 } 5640 5641 /* move the HSM */ 5642 poll_next = ata_hsm_move(ap, qc, status, 1); 5643 5644 /* another command or interrupt handler 5645 * may be running at this point. 5646 */ 5647 if (poll_next) 5648 goto fsm_start; 5649 } 5650 5651 /** 5652 * ata_qc_new - Request an available ATA command, for queueing 5653 * @ap: Port associated with device @dev 5654 * @dev: Device from whom we request an available command structure 5655 * 5656 * LOCKING: 5657 * None. 5658 */ 5659 5660 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) 5661 { 5662 struct ata_queued_cmd *qc = NULL; 5663 unsigned int i; 5664 5665 /* no command while frozen */ 5666 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN)) 5667 return NULL; 5668 5669 /* the last tag is reserved for internal command. */ 5670 for (i = 0; i < ATA_MAX_QUEUE - 1; i++) 5671 if (!test_and_set_bit(i, &ap->qc_allocated)) { 5672 qc = __ata_qc_from_tag(ap, i); 5673 break; 5674 } 5675 5676 if (qc) 5677 qc->tag = i; 5678 5679 return qc; 5680 } 5681 5682 /** 5683 * ata_qc_new_init - Request an available ATA command, and initialize it 5684 * @dev: Device from whom we request an available command structure 5685 * 5686 * LOCKING: 5687 * None. 5688 */ 5689 5690 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev) 5691 { 5692 struct ata_port *ap = dev->link->ap; 5693 struct ata_queued_cmd *qc; 5694 5695 qc = ata_qc_new(ap); 5696 if (qc) { 5697 qc->scsicmd = NULL; 5698 qc->ap = ap; 5699 qc->dev = dev; 5700 5701 ata_qc_reinit(qc); 5702 } 5703 5704 return qc; 5705 } 5706 5707 /** 5708 * ata_qc_free - free unused ata_queued_cmd 5709 * @qc: Command to complete 5710 * 5711 * Designed to free unused ata_queued_cmd object 5712 * in case something prevents using it. 5713 * 5714 * LOCKING: 5715 * spin_lock_irqsave(host lock) 5716 */ 5717 void ata_qc_free(struct ata_queued_cmd *qc) 5718 { 5719 struct ata_port *ap = qc->ap; 5720 unsigned int tag; 5721 5722 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ 5723 5724 qc->flags = 0; 5725 tag = qc->tag; 5726 if (likely(ata_tag_valid(tag))) { 5727 qc->tag = ATA_TAG_POISON; 5728 clear_bit(tag, &ap->qc_allocated); 5729 } 5730 } 5731 5732 void __ata_qc_complete(struct ata_queued_cmd *qc) 5733 { 5734 struct ata_port *ap = qc->ap; 5735 struct ata_link *link = qc->dev->link; 5736 5737 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ 5738 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE)); 5739 5740 if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) 5741 ata_sg_clean(qc); 5742 5743 /* command should be marked inactive atomically with qc completion */ 5744 if (qc->tf.protocol == ATA_PROT_NCQ) { 5745 link->sactive &= ~(1 << qc->tag); 5746 if (!link->sactive) 5747 ap->nr_active_links--; 5748 } else { 5749 link->active_tag = ATA_TAG_POISON; 5750 ap->nr_active_links--; 5751 } 5752 5753 /* clear exclusive status */ 5754 if (unlikely(qc->flags & ATA_QCFLAG_CLEAR_EXCL && 5755 ap->excl_link == link)) 5756 ap->excl_link = NULL; 5757 5758 /* atapi: mark qc as inactive to prevent the interrupt handler 5759 * from completing the command twice later, before the error handler 5760 * is called. (when rc != 0 and atapi request sense is needed) 5761 */ 5762 qc->flags &= ~ATA_QCFLAG_ACTIVE; 5763 ap->qc_active &= ~(1 << qc->tag); 5764 5765 /* call completion callback */ 5766 qc->complete_fn(qc); 5767 } 5768 5769 static void fill_result_tf(struct ata_queued_cmd *qc) 5770 { 5771 struct ata_port *ap = qc->ap; 5772 5773 qc->result_tf.flags = qc->tf.flags; 5774 ap->ops->tf_read(ap, &qc->result_tf); 5775 } 5776 5777 static void ata_verify_xfer(struct ata_queued_cmd *qc) 5778 { 5779 struct ata_device *dev = qc->dev; 5780 5781 if (ata_tag_internal(qc->tag)) 5782 return; 5783 5784 if (ata_is_nodata(qc->tf.protocol)) 5785 return; 5786 5787 if ((dev->mwdma_mask || dev->udma_mask) && ata_is_pio(qc->tf.protocol)) 5788 return; 5789 5790 dev->flags &= ~ATA_DFLAG_DUBIOUS_XFER; 5791 } 5792 5793 /** 5794 * ata_qc_complete - Complete an active ATA command 5795 * @qc: Command to complete 5796 * @err_mask: ATA Status register contents 5797 * 5798 * Indicate to the mid and upper layers that an ATA 5799 * command has completed, with either an ok or not-ok status. 5800 * 5801 * LOCKING: 5802 * spin_lock_irqsave(host lock) 5803 */ 5804 void ata_qc_complete(struct ata_queued_cmd *qc) 5805 { 5806 struct ata_port *ap = qc->ap; 5807 5808 /* XXX: New EH and old EH use different mechanisms to 5809 * synchronize EH with regular execution path. 5810 * 5811 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED. 5812 * Normal execution path is responsible for not accessing a 5813 * failed qc. libata core enforces the rule by returning NULL 5814 * from ata_qc_from_tag() for failed qcs. 5815 * 5816 * Old EH depends on ata_qc_complete() nullifying completion 5817 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does 5818 * not synchronize with interrupt handler. Only PIO task is 5819 * taken care of. 5820 */ 5821 if (ap->ops->error_handler) { 5822 struct ata_device *dev = qc->dev; 5823 struct ata_eh_info *ehi = &dev->link->eh_info; 5824 5825 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN); 5826 5827 if (unlikely(qc->err_mask)) 5828 qc->flags |= ATA_QCFLAG_FAILED; 5829 5830 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) { 5831 if (!ata_tag_internal(qc->tag)) { 5832 /* always fill result TF for failed qc */ 5833 fill_result_tf(qc); 5834 ata_qc_schedule_eh(qc); 5835 return; 5836 } 5837 } 5838 5839 /* read result TF if requested */ 5840 if (qc->flags & ATA_QCFLAG_RESULT_TF) 5841 fill_result_tf(qc); 5842 5843 /* Some commands need post-processing after successful 5844 * completion. 5845 */ 5846 switch (qc->tf.command) { 5847 case ATA_CMD_SET_FEATURES: 5848 if (qc->tf.feature != SETFEATURES_WC_ON && 5849 qc->tf.feature != SETFEATURES_WC_OFF) 5850 break; 5851 /* fall through */ 5852 case ATA_CMD_INIT_DEV_PARAMS: /* CHS translation changed */ 5853 case ATA_CMD_SET_MULTI: /* multi_count changed */ 5854 /* revalidate device */ 5855 ehi->dev_action[dev->devno] |= ATA_EH_REVALIDATE; 5856 ata_port_schedule_eh(ap); 5857 break; 5858 5859 case ATA_CMD_SLEEP: 5860 dev->flags |= ATA_DFLAG_SLEEPING; 5861 break; 5862 } 5863 5864 if (unlikely(dev->flags & ATA_DFLAG_DUBIOUS_XFER)) 5865 ata_verify_xfer(qc); 5866 5867 __ata_qc_complete(qc); 5868 } else { 5869 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED) 5870 return; 5871 5872 /* read result TF if failed or requested */ 5873 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF) 5874 fill_result_tf(qc); 5875 5876 __ata_qc_complete(qc); 5877 } 5878 } 5879 5880 /** 5881 * ata_qc_complete_multiple - Complete multiple qcs successfully 5882 * @ap: port in question 5883 * @qc_active: new qc_active mask 5884 * @finish_qc: LLDD callback invoked before completing a qc 5885 * 5886 * Complete in-flight commands. This functions is meant to be 5887 * called from low-level driver's interrupt routine to complete 5888 * requests normally. ap->qc_active and @qc_active is compared 5889 * and commands are completed accordingly. 5890 * 5891 * LOCKING: 5892 * spin_lock_irqsave(host lock) 5893 * 5894 * RETURNS: 5895 * Number of completed commands on success, -errno otherwise. 5896 */ 5897 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active, 5898 void (*finish_qc)(struct ata_queued_cmd *)) 5899 { 5900 int nr_done = 0; 5901 u32 done_mask; 5902 int i; 5903 5904 done_mask = ap->qc_active ^ qc_active; 5905 5906 if (unlikely(done_mask & qc_active)) { 5907 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition " 5908 "(%08x->%08x)\n", ap->qc_active, qc_active); 5909 return -EINVAL; 5910 } 5911 5912 for (i = 0; i < ATA_MAX_QUEUE; i++) { 5913 struct ata_queued_cmd *qc; 5914 5915 if (!(done_mask & (1 << i))) 5916 continue; 5917 5918 if ((qc = ata_qc_from_tag(ap, i))) { 5919 if (finish_qc) 5920 finish_qc(qc); 5921 ata_qc_complete(qc); 5922 nr_done++; 5923 } 5924 } 5925 5926 return nr_done; 5927 } 5928 5929 /** 5930 * ata_qc_issue - issue taskfile to device 5931 * @qc: command to issue to device 5932 * 5933 * Prepare an ATA command to submission to device. 5934 * This includes mapping the data into a DMA-able 5935 * area, filling in the S/G table, and finally 5936 * writing the taskfile to hardware, starting the command. 5937 * 5938 * LOCKING: 5939 * spin_lock_irqsave(host lock) 5940 */ 5941 void ata_qc_issue(struct ata_queued_cmd *qc) 5942 { 5943 struct ata_port *ap = qc->ap; 5944 struct ata_link *link = qc->dev->link; 5945 u8 prot = qc->tf.protocol; 5946 5947 /* Make sure only one non-NCQ command is outstanding. The 5948 * check is skipped for old EH because it reuses active qc to 5949 * request ATAPI sense. 5950 */ 5951 WARN_ON(ap->ops->error_handler && ata_tag_valid(link->active_tag)); 5952 5953 if (ata_is_ncq(prot)) { 5954 WARN_ON(link->sactive & (1 << qc->tag)); 5955 5956 if (!link->sactive) 5957 ap->nr_active_links++; 5958 link->sactive |= 1 << qc->tag; 5959 } else { 5960 WARN_ON(link->sactive); 5961 5962 ap->nr_active_links++; 5963 link->active_tag = qc->tag; 5964 } 5965 5966 qc->flags |= ATA_QCFLAG_ACTIVE; 5967 ap->qc_active |= 1 << qc->tag; 5968 5969 /* We guarantee to LLDs that they will have at least one 5970 * non-zero sg if the command is a data command. 5971 */ 5972 BUG_ON(ata_is_data(prot) && (!qc->sg || !qc->n_elem || !qc->nbytes)); 5973 5974 /* ata_sg_setup() may update nbytes */ 5975 qc->raw_nbytes = qc->nbytes; 5976 5977 if (ata_is_dma(prot) || (ata_is_pio(prot) && 5978 (ap->flags & ATA_FLAG_PIO_DMA))) 5979 if (ata_sg_setup(qc)) 5980 goto sg_err; 5981 5982 /* if device is sleeping, schedule softreset and abort the link */ 5983 if (unlikely(qc->dev->flags & ATA_DFLAG_SLEEPING)) { 5984 link->eh_info.action |= ATA_EH_SOFTRESET; 5985 ata_ehi_push_desc(&link->eh_info, "waking up from sleep"); 5986 ata_link_abort(link); 5987 return; 5988 } 5989 5990 ap->ops->qc_prep(qc); 5991 5992 qc->err_mask |= ap->ops->qc_issue(qc); 5993 if (unlikely(qc->err_mask)) 5994 goto err; 5995 return; 5996 5997 sg_err: 5998 qc->err_mask |= AC_ERR_SYSTEM; 5999 err: 6000 ata_qc_complete(qc); 6001 } 6002 6003 /** 6004 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner 6005 * @qc: command to issue to device 6006 * 6007 * Using various libata functions and hooks, this function 6008 * starts an ATA command. ATA commands are grouped into 6009 * classes called "protocols", and issuing each type of protocol 6010 * is slightly different. 6011 * 6012 * May be used as the qc_issue() entry in ata_port_operations. 6013 * 6014 * LOCKING: 6015 * spin_lock_irqsave(host lock) 6016 * 6017 * RETURNS: 6018 * Zero on success, AC_ERR_* mask on failure 6019 */ 6020 6021 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc) 6022 { 6023 struct ata_port *ap = qc->ap; 6024 6025 /* Use polling pio if the LLD doesn't handle 6026 * interrupt driven pio and atapi CDB interrupt. 6027 */ 6028 if (ap->flags & ATA_FLAG_PIO_POLLING) { 6029 switch (qc->tf.protocol) { 6030 case ATA_PROT_PIO: 6031 case ATA_PROT_NODATA: 6032 case ATAPI_PROT_PIO: 6033 case ATAPI_PROT_NODATA: 6034 qc->tf.flags |= ATA_TFLAG_POLLING; 6035 break; 6036 case ATAPI_PROT_DMA: 6037 if (qc->dev->flags & ATA_DFLAG_CDB_INTR) 6038 /* see ata_dma_blacklisted() */ 6039 BUG(); 6040 break; 6041 default: 6042 break; 6043 } 6044 } 6045 6046 /* select the device */ 6047 ata_dev_select(ap, qc->dev->devno, 1, 0); 6048 6049 /* start the command */ 6050 switch (qc->tf.protocol) { 6051 case ATA_PROT_NODATA: 6052 if (qc->tf.flags & ATA_TFLAG_POLLING) 6053 ata_qc_set_polling(qc); 6054 6055 ata_tf_to_host(ap, &qc->tf); 6056 ap->hsm_task_state = HSM_ST_LAST; 6057 6058 if (qc->tf.flags & ATA_TFLAG_POLLING) 6059 ata_pio_queue_task(ap, qc, 0); 6060 6061 break; 6062 6063 case ATA_PROT_DMA: 6064 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); 6065 6066 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ 6067 ap->ops->bmdma_setup(qc); /* set up bmdma */ 6068 ap->ops->bmdma_start(qc); /* initiate bmdma */ 6069 ap->hsm_task_state = HSM_ST_LAST; 6070 break; 6071 6072 case ATA_PROT_PIO: 6073 if (qc->tf.flags & ATA_TFLAG_POLLING) 6074 ata_qc_set_polling(qc); 6075 6076 ata_tf_to_host(ap, &qc->tf); 6077 6078 if (qc->tf.flags & ATA_TFLAG_WRITE) { 6079 /* PIO data out protocol */ 6080 ap->hsm_task_state = HSM_ST_FIRST; 6081 ata_pio_queue_task(ap, qc, 0); 6082 6083 /* always send first data block using 6084 * the ata_pio_task() codepath. 6085 */ 6086 } else { 6087 /* PIO data in protocol */ 6088 ap->hsm_task_state = HSM_ST; 6089 6090 if (qc->tf.flags & ATA_TFLAG_POLLING) 6091 ata_pio_queue_task(ap, qc, 0); 6092 6093 /* if polling, ata_pio_task() handles the rest. 6094 * otherwise, interrupt handler takes over from here. 6095 */ 6096 } 6097 6098 break; 6099 6100 case ATAPI_PROT_PIO: 6101 case ATAPI_PROT_NODATA: 6102 if (qc->tf.flags & ATA_TFLAG_POLLING) 6103 ata_qc_set_polling(qc); 6104 6105 ata_tf_to_host(ap, &qc->tf); 6106 6107 ap->hsm_task_state = HSM_ST_FIRST; 6108 6109 /* send cdb by polling if no cdb interrupt */ 6110 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) || 6111 (qc->tf.flags & ATA_TFLAG_POLLING)) 6112 ata_pio_queue_task(ap, qc, 0); 6113 break; 6114 6115 case ATAPI_PROT_DMA: 6116 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); 6117 6118 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ 6119 ap->ops->bmdma_setup(qc); /* set up bmdma */ 6120 ap->hsm_task_state = HSM_ST_FIRST; 6121 6122 /* send cdb by polling if no cdb interrupt */ 6123 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) 6124 ata_pio_queue_task(ap, qc, 0); 6125 break; 6126 6127 default: 6128 WARN_ON(1); 6129 return AC_ERR_SYSTEM; 6130 } 6131 6132 return 0; 6133 } 6134 6135 /** 6136 * ata_host_intr - Handle host interrupt for given (port, task) 6137 * @ap: Port on which interrupt arrived (possibly...) 6138 * @qc: Taskfile currently active in engine 6139 * 6140 * Handle host interrupt for given queued command. Currently, 6141 * only DMA interrupts are handled. All other commands are 6142 * handled via polling with interrupts disabled (nIEN bit). 6143 * 6144 * LOCKING: 6145 * spin_lock_irqsave(host lock) 6146 * 6147 * RETURNS: 6148 * One if interrupt was handled, zero if not (shared irq). 6149 */ 6150 6151 inline unsigned int ata_host_intr(struct ata_port *ap, 6152 struct ata_queued_cmd *qc) 6153 { 6154 struct ata_eh_info *ehi = &ap->link.eh_info; 6155 u8 status, host_stat = 0; 6156 6157 VPRINTK("ata%u: protocol %d task_state %d\n", 6158 ap->print_id, qc->tf.protocol, ap->hsm_task_state); 6159 6160 /* Check whether we are expecting interrupt in this state */ 6161 switch (ap->hsm_task_state) { 6162 case HSM_ST_FIRST: 6163 /* Some pre-ATAPI-4 devices assert INTRQ 6164 * at this state when ready to receive CDB. 6165 */ 6166 6167 /* Check the ATA_DFLAG_CDB_INTR flag is enough here. 6168 * The flag was turned on only for atapi devices. No 6169 * need to check ata_is_atapi(qc->tf.protocol) again. 6170 */ 6171 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) 6172 goto idle_irq; 6173 break; 6174 case HSM_ST_LAST: 6175 if (qc->tf.protocol == ATA_PROT_DMA || 6176 qc->tf.protocol == ATAPI_PROT_DMA) { 6177 /* check status of DMA engine */ 6178 host_stat = ap->ops->bmdma_status(ap); 6179 VPRINTK("ata%u: host_stat 0x%X\n", 6180 ap->print_id, host_stat); 6181 6182 /* if it's not our irq... */ 6183 if (!(host_stat & ATA_DMA_INTR)) 6184 goto idle_irq; 6185 6186 /* before we do anything else, clear DMA-Start bit */ 6187 ap->ops->bmdma_stop(qc); 6188 6189 if (unlikely(host_stat & ATA_DMA_ERR)) { 6190 /* error when transfering data to/from memory */ 6191 qc->err_mask |= AC_ERR_HOST_BUS; 6192 ap->hsm_task_state = HSM_ST_ERR; 6193 } 6194 } 6195 break; 6196 case HSM_ST: 6197 break; 6198 default: 6199 goto idle_irq; 6200 } 6201 6202 /* check altstatus */ 6203 status = ata_altstatus(ap); 6204 if (status & ATA_BUSY) 6205 goto idle_irq; 6206 6207 /* check main status, clearing INTRQ */ 6208 status = ata_chk_status(ap); 6209 if (unlikely(status & ATA_BUSY)) 6210 goto idle_irq; 6211 6212 /* ack bmdma irq events */ 6213 ap->ops->irq_clear(ap); 6214 6215 ata_hsm_move(ap, qc, status, 0); 6216 6217 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA || 6218 qc->tf.protocol == ATAPI_PROT_DMA)) 6219 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat); 6220 6221 return 1; /* irq handled */ 6222 6223 idle_irq: 6224 ap->stats.idle_irq++; 6225 6226 #ifdef ATA_IRQ_TRAP 6227 if ((ap->stats.idle_irq % 1000) == 0) { 6228 ata_chk_status(ap); 6229 ap->ops->irq_clear(ap); 6230 ata_port_printk(ap, KERN_WARNING, "irq trap\n"); 6231 return 1; 6232 } 6233 #endif 6234 return 0; /* irq not handled */ 6235 } 6236 6237 /** 6238 * ata_interrupt - Default ATA host interrupt handler 6239 * @irq: irq line (unused) 6240 * @dev_instance: pointer to our ata_host information structure 6241 * 6242 * Default interrupt handler for PCI IDE devices. Calls 6243 * ata_host_intr() for each port that is not disabled. 6244 * 6245 * LOCKING: 6246 * Obtains host lock during operation. 6247 * 6248 * RETURNS: 6249 * IRQ_NONE or IRQ_HANDLED. 6250 */ 6251 6252 irqreturn_t ata_interrupt(int irq, void *dev_instance) 6253 { 6254 struct ata_host *host = dev_instance; 6255 unsigned int i; 6256 unsigned int handled = 0; 6257 unsigned long flags; 6258 6259 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ 6260 spin_lock_irqsave(&host->lock, flags); 6261 6262 for (i = 0; i < host->n_ports; i++) { 6263 struct ata_port *ap; 6264 6265 ap = host->ports[i]; 6266 if (ap && 6267 !(ap->flags & ATA_FLAG_DISABLED)) { 6268 struct ata_queued_cmd *qc; 6269 6270 qc = ata_qc_from_tag(ap, ap->link.active_tag); 6271 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && 6272 (qc->flags & ATA_QCFLAG_ACTIVE)) 6273 handled |= ata_host_intr(ap, qc); 6274 } 6275 } 6276 6277 spin_unlock_irqrestore(&host->lock, flags); 6278 6279 return IRQ_RETVAL(handled); 6280 } 6281 6282 /** 6283 * sata_scr_valid - test whether SCRs are accessible 6284 * @link: ATA link to test SCR accessibility for 6285 * 6286 * Test whether SCRs are accessible for @link. 6287 * 6288 * LOCKING: 6289 * None. 6290 * 6291 * RETURNS: 6292 * 1 if SCRs are accessible, 0 otherwise. 6293 */ 6294 int sata_scr_valid(struct ata_link *link) 6295 { 6296 struct ata_port *ap = link->ap; 6297 6298 return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read; 6299 } 6300 6301 /** 6302 * sata_scr_read - read SCR register of the specified port 6303 * @link: ATA link to read SCR for 6304 * @reg: SCR to read 6305 * @val: Place to store read value 6306 * 6307 * Read SCR register @reg of @link into *@val. This function is 6308 * guaranteed to succeed if @link is ap->link, the cable type of 6309 * the port is SATA and the port implements ->scr_read. 6310 * 6311 * LOCKING: 6312 * None if @link is ap->link. Kernel thread context otherwise. 6313 * 6314 * RETURNS: 6315 * 0 on success, negative errno on failure. 6316 */ 6317 int sata_scr_read(struct ata_link *link, int reg, u32 *val) 6318 { 6319 if (ata_is_host_link(link)) { 6320 struct ata_port *ap = link->ap; 6321 6322 if (sata_scr_valid(link)) 6323 return ap->ops->scr_read(ap, reg, val); 6324 return -EOPNOTSUPP; 6325 } 6326 6327 return sata_pmp_scr_read(link, reg, val); 6328 } 6329 6330 /** 6331 * sata_scr_write - write SCR register of the specified port 6332 * @link: ATA link to write SCR for 6333 * @reg: SCR to write 6334 * @val: value to write 6335 * 6336 * Write @val to SCR register @reg of @link. This function is 6337 * guaranteed to succeed if @link is ap->link, the cable type of 6338 * the port is SATA and the port implements ->scr_read. 6339 * 6340 * LOCKING: 6341 * None if @link is ap->link. Kernel thread context otherwise. 6342 * 6343 * RETURNS: 6344 * 0 on success, negative errno on failure. 6345 */ 6346 int sata_scr_write(struct ata_link *link, int reg, u32 val) 6347 { 6348 if (ata_is_host_link(link)) { 6349 struct ata_port *ap = link->ap; 6350 6351 if (sata_scr_valid(link)) 6352 return ap->ops->scr_write(ap, reg, val); 6353 return -EOPNOTSUPP; 6354 } 6355 6356 return sata_pmp_scr_write(link, reg, val); 6357 } 6358 6359 /** 6360 * sata_scr_write_flush - write SCR register of the specified port and flush 6361 * @link: ATA link to write SCR for 6362 * @reg: SCR to write 6363 * @val: value to write 6364 * 6365 * This function is identical to sata_scr_write() except that this 6366 * function performs flush after writing to the register. 6367 * 6368 * LOCKING: 6369 * None if @link is ap->link. Kernel thread context otherwise. 6370 * 6371 * RETURNS: 6372 * 0 on success, negative errno on failure. 6373 */ 6374 int sata_scr_write_flush(struct ata_link *link, int reg, u32 val) 6375 { 6376 if (ata_is_host_link(link)) { 6377 struct ata_port *ap = link->ap; 6378 int rc; 6379 6380 if (sata_scr_valid(link)) { 6381 rc = ap->ops->scr_write(ap, reg, val); 6382 if (rc == 0) 6383 rc = ap->ops->scr_read(ap, reg, &val); 6384 return rc; 6385 } 6386 return -EOPNOTSUPP; 6387 } 6388 6389 return sata_pmp_scr_write(link, reg, val); 6390 } 6391 6392 /** 6393 * ata_link_online - test whether the given link is online 6394 * @link: ATA link to test 6395 * 6396 * Test whether @link is online. Note that this function returns 6397 * 0 if online status of @link cannot be obtained, so 6398 * ata_link_online(link) != !ata_link_offline(link). 6399 * 6400 * LOCKING: 6401 * None. 6402 * 6403 * RETURNS: 6404 * 1 if the port online status is available and online. 6405 */ 6406 int ata_link_online(struct ata_link *link) 6407 { 6408 u32 sstatus; 6409 6410 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 && 6411 (sstatus & 0xf) == 0x3) 6412 return 1; 6413 return 0; 6414 } 6415 6416 /** 6417 * ata_link_offline - test whether the given link is offline 6418 * @link: ATA link to test 6419 * 6420 * Test whether @link is offline. Note that this function 6421 * returns 0 if offline status of @link cannot be obtained, so 6422 * ata_link_online(link) != !ata_link_offline(link). 6423 * 6424 * LOCKING: 6425 * None. 6426 * 6427 * RETURNS: 6428 * 1 if the port offline status is available and offline. 6429 */ 6430 int ata_link_offline(struct ata_link *link) 6431 { 6432 u32 sstatus; 6433 6434 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 && 6435 (sstatus & 0xf) != 0x3) 6436 return 1; 6437 return 0; 6438 } 6439 6440 int ata_flush_cache(struct ata_device *dev) 6441 { 6442 unsigned int err_mask; 6443 u8 cmd; 6444 6445 if (!ata_try_flush_cache(dev)) 6446 return 0; 6447 6448 if (dev->flags & ATA_DFLAG_FLUSH_EXT) 6449 cmd = ATA_CMD_FLUSH_EXT; 6450 else 6451 cmd = ATA_CMD_FLUSH; 6452 6453 /* This is wrong. On a failed flush we get back the LBA of the lost 6454 sector and we should (assuming it wasn't aborted as unknown) issue 6455 a further flush command to continue the writeback until it 6456 does not error */ 6457 err_mask = ata_do_simple_cmd(dev, cmd); 6458 if (err_mask) { 6459 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n"); 6460 return -EIO; 6461 } 6462 6463 return 0; 6464 } 6465 6466 #ifdef CONFIG_PM 6467 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg, 6468 unsigned int action, unsigned int ehi_flags, 6469 int wait) 6470 { 6471 unsigned long flags; 6472 int i, rc; 6473 6474 for (i = 0; i < host->n_ports; i++) { 6475 struct ata_port *ap = host->ports[i]; 6476 struct ata_link *link; 6477 6478 /* Previous resume operation might still be in 6479 * progress. Wait for PM_PENDING to clear. 6480 */ 6481 if (ap->pflags & ATA_PFLAG_PM_PENDING) { 6482 ata_port_wait_eh(ap); 6483 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); 6484 } 6485 6486 /* request PM ops to EH */ 6487 spin_lock_irqsave(ap->lock, flags); 6488 6489 ap->pm_mesg = mesg; 6490 if (wait) { 6491 rc = 0; 6492 ap->pm_result = &rc; 6493 } 6494 6495 ap->pflags |= ATA_PFLAG_PM_PENDING; 6496 __ata_port_for_each_link(link, ap) { 6497 link->eh_info.action |= action; 6498 link->eh_info.flags |= ehi_flags; 6499 } 6500 6501 ata_port_schedule_eh(ap); 6502 6503 spin_unlock_irqrestore(ap->lock, flags); 6504 6505 /* wait and check result */ 6506 if (wait) { 6507 ata_port_wait_eh(ap); 6508 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); 6509 if (rc) 6510 return rc; 6511 } 6512 } 6513 6514 return 0; 6515 } 6516 6517 /** 6518 * ata_host_suspend - suspend host 6519 * @host: host to suspend 6520 * @mesg: PM message 6521 * 6522 * Suspend @host. Actual operation is performed by EH. This 6523 * function requests EH to perform PM operations and waits for EH 6524 * to finish. 6525 * 6526 * LOCKING: 6527 * Kernel thread context (may sleep). 6528 * 6529 * RETURNS: 6530 * 0 on success, -errno on failure. 6531 */ 6532 int ata_host_suspend(struct ata_host *host, pm_message_t mesg) 6533 { 6534 int rc; 6535 6536 /* 6537 * disable link pm on all ports before requesting 6538 * any pm activity 6539 */ 6540 ata_lpm_enable(host); 6541 6542 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1); 6543 if (rc == 0) 6544 host->dev->power.power_state = mesg; 6545 return rc; 6546 } 6547 6548 /** 6549 * ata_host_resume - resume host 6550 * @host: host to resume 6551 * 6552 * Resume @host. Actual operation is performed by EH. This 6553 * function requests EH to perform PM operations and returns. 6554 * Note that all resume operations are performed parallely. 6555 * 6556 * LOCKING: 6557 * Kernel thread context (may sleep). 6558 */ 6559 void ata_host_resume(struct ata_host *host) 6560 { 6561 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET, 6562 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0); 6563 host->dev->power.power_state = PMSG_ON; 6564 6565 /* reenable link pm */ 6566 ata_lpm_disable(host); 6567 } 6568 #endif 6569 6570 /** 6571 * ata_port_start - Set port up for dma. 6572 * @ap: Port to initialize 6573 * 6574 * Called just after data structures for each port are 6575 * initialized. Allocates space for PRD table. 6576 * 6577 * May be used as the port_start() entry in ata_port_operations. 6578 * 6579 * LOCKING: 6580 * Inherited from caller. 6581 */ 6582 int ata_port_start(struct ata_port *ap) 6583 { 6584 struct device *dev = ap->dev; 6585 int rc; 6586 6587 ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, 6588 GFP_KERNEL); 6589 if (!ap->prd) 6590 return -ENOMEM; 6591 6592 rc = ata_pad_alloc(ap, dev); 6593 if (rc) 6594 return rc; 6595 6596 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, 6597 (unsigned long long)ap->prd_dma); 6598 return 0; 6599 } 6600 6601 /** 6602 * ata_dev_init - Initialize an ata_device structure 6603 * @dev: Device structure to initialize 6604 * 6605 * Initialize @dev in preparation for probing. 6606 * 6607 * LOCKING: 6608 * Inherited from caller. 6609 */ 6610 void ata_dev_init(struct ata_device *dev) 6611 { 6612 struct ata_link *link = dev->link; 6613 struct ata_port *ap = link->ap; 6614 unsigned long flags; 6615 6616 /* SATA spd limit is bound to the first device */ 6617 link->sata_spd_limit = link->hw_sata_spd_limit; 6618 link->sata_spd = 0; 6619 6620 /* High bits of dev->flags are used to record warm plug 6621 * requests which occur asynchronously. Synchronize using 6622 * host lock. 6623 */ 6624 spin_lock_irqsave(ap->lock, flags); 6625 dev->flags &= ~ATA_DFLAG_INIT_MASK; 6626 dev->horkage = 0; 6627 spin_unlock_irqrestore(ap->lock, flags); 6628 6629 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0, 6630 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET); 6631 dev->pio_mask = UINT_MAX; 6632 dev->mwdma_mask = UINT_MAX; 6633 dev->udma_mask = UINT_MAX; 6634 } 6635 6636 /** 6637 * ata_link_init - Initialize an ata_link structure 6638 * @ap: ATA port link is attached to 6639 * @link: Link structure to initialize 6640 * @pmp: Port multiplier port number 6641 * 6642 * Initialize @link. 6643 * 6644 * LOCKING: 6645 * Kernel thread context (may sleep) 6646 */ 6647 void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp) 6648 { 6649 int i; 6650 6651 /* clear everything except for devices */ 6652 memset(link, 0, offsetof(struct ata_link, device[0])); 6653 6654 link->ap = ap; 6655 link->pmp = pmp; 6656 link->active_tag = ATA_TAG_POISON; 6657 link->hw_sata_spd_limit = UINT_MAX; 6658 6659 /* can't use iterator, ap isn't initialized yet */ 6660 for (i = 0; i < ATA_MAX_DEVICES; i++) { 6661 struct ata_device *dev = &link->device[i]; 6662 6663 dev->link = link; 6664 dev->devno = dev - link->device; 6665 ata_dev_init(dev); 6666 } 6667 } 6668 6669 /** 6670 * sata_link_init_spd - Initialize link->sata_spd_limit 6671 * @link: Link to configure sata_spd_limit for 6672 * 6673 * Initialize @link->[hw_]sata_spd_limit to the currently 6674 * configured value. 6675 * 6676 * LOCKING: 6677 * Kernel thread context (may sleep). 6678 * 6679 * RETURNS: 6680 * 0 on success, -errno on failure. 6681 */ 6682 int sata_link_init_spd(struct ata_link *link) 6683 { 6684 u32 scontrol, spd; 6685 int rc; 6686 6687 rc = sata_scr_read(link, SCR_CONTROL, &scontrol); 6688 if (rc) 6689 return rc; 6690 6691 spd = (scontrol >> 4) & 0xf; 6692 if (spd) 6693 link->hw_sata_spd_limit &= (1 << spd) - 1; 6694 6695 link->sata_spd_limit = link->hw_sata_spd_limit; 6696 6697 return 0; 6698 } 6699 6700 /** 6701 * ata_port_alloc - allocate and initialize basic ATA port resources 6702 * @host: ATA host this allocated port belongs to 6703 * 6704 * Allocate and initialize basic ATA port resources. 6705 * 6706 * RETURNS: 6707 * Allocate ATA port on success, NULL on failure. 6708 * 6709 * LOCKING: 6710 * Inherited from calling layer (may sleep). 6711 */ 6712 struct ata_port *ata_port_alloc(struct ata_host *host) 6713 { 6714 struct ata_port *ap; 6715 6716 DPRINTK("ENTER\n"); 6717 6718 ap = kzalloc(sizeof(*ap), GFP_KERNEL); 6719 if (!ap) 6720 return NULL; 6721 6722 ap->pflags |= ATA_PFLAG_INITIALIZING; 6723 ap->lock = &host->lock; 6724 ap->flags = ATA_FLAG_DISABLED; 6725 ap->print_id = -1; 6726 ap->ctl = ATA_DEVCTL_OBS; 6727 ap->host = host; 6728 ap->dev = host->dev; 6729 ap->last_ctl = 0xFF; 6730 6731 #if defined(ATA_VERBOSE_DEBUG) 6732 /* turn on all debugging levels */ 6733 ap->msg_enable = 0x00FF; 6734 #elif defined(ATA_DEBUG) 6735 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR; 6736 #else 6737 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN; 6738 #endif 6739 6740 INIT_DELAYED_WORK(&ap->port_task, ata_pio_task); 6741 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug); 6742 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan); 6743 INIT_LIST_HEAD(&ap->eh_done_q); 6744 init_waitqueue_head(&ap->eh_wait_q); 6745 init_timer_deferrable(&ap->fastdrain_timer); 6746 ap->fastdrain_timer.function = ata_eh_fastdrain_timerfn; 6747 ap->fastdrain_timer.data = (unsigned long)ap; 6748 6749 ap->cbl = ATA_CBL_NONE; 6750 6751 ata_link_init(ap, &ap->link, 0); 6752 6753 #ifdef ATA_IRQ_TRAP 6754 ap->stats.unhandled_irq = 1; 6755 ap->stats.idle_irq = 1; 6756 #endif 6757 return ap; 6758 } 6759 6760 static void ata_host_release(struct device *gendev, void *res) 6761 { 6762 struct ata_host *host = dev_get_drvdata(gendev); 6763 int i; 6764 6765 for (i = 0; i < host->n_ports; i++) { 6766 struct ata_port *ap = host->ports[i]; 6767 6768 if (!ap) 6769 continue; 6770 6771 if (ap->scsi_host) 6772 scsi_host_put(ap->scsi_host); 6773 6774 kfree(ap->pmp_link); 6775 kfree(ap); 6776 host->ports[i] = NULL; 6777 } 6778 6779 dev_set_drvdata(gendev, NULL); 6780 } 6781 6782 /** 6783 * ata_host_alloc - allocate and init basic ATA host resources 6784 * @dev: generic device this host is associated with 6785 * @max_ports: maximum number of ATA ports associated with this host 6786 * 6787 * Allocate and initialize basic ATA host resources. LLD calls 6788 * this function to allocate a host, initializes it fully and 6789 * attaches it using ata_host_register(). 6790 * 6791 * @max_ports ports are allocated and host->n_ports is 6792 * initialized to @max_ports. The caller is allowed to decrease 6793 * host->n_ports before calling ata_host_register(). The unused 6794 * ports will be automatically freed on registration. 6795 * 6796 * RETURNS: 6797 * Allocate ATA host on success, NULL on failure. 6798 * 6799 * LOCKING: 6800 * Inherited from calling layer (may sleep). 6801 */ 6802 struct ata_host *ata_host_alloc(struct device *dev, int max_ports) 6803 { 6804 struct ata_host *host; 6805 size_t sz; 6806 int i; 6807 6808 DPRINTK("ENTER\n"); 6809 6810 if (!devres_open_group(dev, NULL, GFP_KERNEL)) 6811 return NULL; 6812 6813 /* alloc a container for our list of ATA ports (buses) */ 6814 sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *); 6815 /* alloc a container for our list of ATA ports (buses) */ 6816 host = devres_alloc(ata_host_release, sz, GFP_KERNEL); 6817 if (!host) 6818 goto err_out; 6819 6820 devres_add(dev, host); 6821 dev_set_drvdata(dev, host); 6822 6823 spin_lock_init(&host->lock); 6824 host->dev = dev; 6825 host->n_ports = max_ports; 6826 6827 /* allocate ports bound to this host */ 6828 for (i = 0; i < max_ports; i++) { 6829 struct ata_port *ap; 6830 6831 ap = ata_port_alloc(host); 6832 if (!ap) 6833 goto err_out; 6834 6835 ap->port_no = i; 6836 host->ports[i] = ap; 6837 } 6838 6839 devres_remove_group(dev, NULL); 6840 return host; 6841 6842 err_out: 6843 devres_release_group(dev, NULL); 6844 return NULL; 6845 } 6846 6847 /** 6848 * ata_host_alloc_pinfo - alloc host and init with port_info array 6849 * @dev: generic device this host is associated with 6850 * @ppi: array of ATA port_info to initialize host with 6851 * @n_ports: number of ATA ports attached to this host 6852 * 6853 * Allocate ATA host and initialize with info from @ppi. If NULL 6854 * terminated, @ppi may contain fewer entries than @n_ports. The 6855 * last entry will be used for the remaining ports. 6856 * 6857 * RETURNS: 6858 * Allocate ATA host on success, NULL on failure. 6859 * 6860 * LOCKING: 6861 * Inherited from calling layer (may sleep). 6862 */ 6863 struct ata_host *ata_host_alloc_pinfo(struct device *dev, 6864 const struct ata_port_info * const * ppi, 6865 int n_ports) 6866 { 6867 const struct ata_port_info *pi; 6868 struct ata_host *host; 6869 int i, j; 6870 6871 host = ata_host_alloc(dev, n_ports); 6872 if (!host) 6873 return NULL; 6874 6875 for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) { 6876 struct ata_port *ap = host->ports[i]; 6877 6878 if (ppi[j]) 6879 pi = ppi[j++]; 6880 6881 ap->pio_mask = pi->pio_mask; 6882 ap->mwdma_mask = pi->mwdma_mask; 6883 ap->udma_mask = pi->udma_mask; 6884 ap->flags |= pi->flags; 6885 ap->link.flags |= pi->link_flags; 6886 ap->ops = pi->port_ops; 6887 6888 if (!host->ops && (pi->port_ops != &ata_dummy_port_ops)) 6889 host->ops = pi->port_ops; 6890 if (!host->private_data && pi->private_data) 6891 host->private_data = pi->private_data; 6892 } 6893 6894 return host; 6895 } 6896 6897 static void ata_host_stop(struct device *gendev, void *res) 6898 { 6899 struct ata_host *host = dev_get_drvdata(gendev); 6900 int i; 6901 6902 WARN_ON(!(host->flags & ATA_HOST_STARTED)); 6903 6904 for (i = 0; i < host->n_ports; i++) { 6905 struct ata_port *ap = host->ports[i]; 6906 6907 if (ap->ops->port_stop) 6908 ap->ops->port_stop(ap); 6909 } 6910 6911 if (host->ops->host_stop) 6912 host->ops->host_stop(host); 6913 } 6914 6915 /** 6916 * ata_host_start - start and freeze ports of an ATA host 6917 * @host: ATA host to start ports for 6918 * 6919 * Start and then freeze ports of @host. Started status is 6920 * recorded in host->flags, so this function can be called 6921 * multiple times. Ports are guaranteed to get started only 6922 * once. If host->ops isn't initialized yet, its set to the 6923 * first non-dummy port ops. 6924 * 6925 * LOCKING: 6926 * Inherited from calling layer (may sleep). 6927 * 6928 * RETURNS: 6929 * 0 if all ports are started successfully, -errno otherwise. 6930 */ 6931 int ata_host_start(struct ata_host *host) 6932 { 6933 int have_stop = 0; 6934 void *start_dr = NULL; 6935 int i, rc; 6936 6937 if (host->flags & ATA_HOST_STARTED) 6938 return 0; 6939 6940 for (i = 0; i < host->n_ports; i++) { 6941 struct ata_port *ap = host->ports[i]; 6942 6943 if (!host->ops && !ata_port_is_dummy(ap)) 6944 host->ops = ap->ops; 6945 6946 if (ap->ops->port_stop) 6947 have_stop = 1; 6948 } 6949 6950 if (host->ops->host_stop) 6951 have_stop = 1; 6952 6953 if (have_stop) { 6954 start_dr = devres_alloc(ata_host_stop, 0, GFP_KERNEL); 6955 if (!start_dr) 6956 return -ENOMEM; 6957 } 6958 6959 for (i = 0; i < host->n_ports; i++) { 6960 struct ata_port *ap = host->ports[i]; 6961 6962 if (ap->ops->port_start) { 6963 rc = ap->ops->port_start(ap); 6964 if (rc) { 6965 if (rc != -ENODEV) 6966 dev_printk(KERN_ERR, host->dev, 6967 "failed to start port %d " 6968 "(errno=%d)\n", i, rc); 6969 goto err_out; 6970 } 6971 } 6972 ata_eh_freeze_port(ap); 6973 } 6974 6975 if (start_dr) 6976 devres_add(host->dev, start_dr); 6977 host->flags |= ATA_HOST_STARTED; 6978 return 0; 6979 6980 err_out: 6981 while (--i >= 0) { 6982 struct ata_port *ap = host->ports[i]; 6983 6984 if (ap->ops->port_stop) 6985 ap->ops->port_stop(ap); 6986 } 6987 devres_free(start_dr); 6988 return rc; 6989 } 6990 6991 /** 6992 * ata_sas_host_init - Initialize a host struct 6993 * @host: host to initialize 6994 * @dev: device host is attached to 6995 * @flags: host flags 6996 * @ops: port_ops 6997 * 6998 * LOCKING: 6999 * PCI/etc. bus probe sem. 7000 * 7001 */ 7002 /* KILLME - the only user left is ipr */ 7003 void ata_host_init(struct ata_host *host, struct device *dev, 7004 unsigned long flags, const struct ata_port_operations *ops) 7005 { 7006 spin_lock_init(&host->lock); 7007 host->dev = dev; 7008 host->flags = flags; 7009 host->ops = ops; 7010 } 7011 7012 /** 7013 * ata_host_register - register initialized ATA host 7014 * @host: ATA host to register 7015 * @sht: template for SCSI host 7016 * 7017 * Register initialized ATA host. @host is allocated using 7018 * ata_host_alloc() and fully initialized by LLD. This function 7019 * starts ports, registers @host with ATA and SCSI layers and 7020 * probe registered devices. 7021 * 7022 * LOCKING: 7023 * Inherited from calling layer (may sleep). 7024 * 7025 * RETURNS: 7026 * 0 on success, -errno otherwise. 7027 */ 7028 int ata_host_register(struct ata_host *host, struct scsi_host_template *sht) 7029 { 7030 int i, rc; 7031 7032 /* host must have been started */ 7033 if (!(host->flags & ATA_HOST_STARTED)) { 7034 dev_printk(KERN_ERR, host->dev, 7035 "BUG: trying to register unstarted host\n"); 7036 WARN_ON(1); 7037 return -EINVAL; 7038 } 7039 7040 /* Blow away unused ports. This happens when LLD can't 7041 * determine the exact number of ports to allocate at 7042 * allocation time. 7043 */ 7044 for (i = host->n_ports; host->ports[i]; i++) 7045 kfree(host->ports[i]); 7046 7047 /* give ports names and add SCSI hosts */ 7048 for (i = 0; i < host->n_ports; i++) 7049 host->ports[i]->print_id = ata_print_id++; 7050 7051 rc = ata_scsi_add_hosts(host, sht); 7052 if (rc) 7053 return rc; 7054 7055 /* associate with ACPI nodes */ 7056 ata_acpi_associate(host); 7057 7058 /* set cable, sata_spd_limit and report */ 7059 for (i = 0; i < host->n_ports; i++) { 7060 struct ata_port *ap = host->ports[i]; 7061 unsigned long xfer_mask; 7062 7063 /* set SATA cable type if still unset */ 7064 if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA)) 7065 ap->cbl = ATA_CBL_SATA; 7066 7067 /* init sata_spd_limit to the current value */ 7068 sata_link_init_spd(&ap->link); 7069 7070 /* print per-port info to dmesg */ 7071 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask, 7072 ap->udma_mask); 7073 7074 if (!ata_port_is_dummy(ap)) { 7075 ata_port_printk(ap, KERN_INFO, 7076 "%cATA max %s %s\n", 7077 (ap->flags & ATA_FLAG_SATA) ? 'S' : 'P', 7078 ata_mode_string(xfer_mask), 7079 ap->link.eh_info.desc); 7080 ata_ehi_clear_desc(&ap->link.eh_info); 7081 } else 7082 ata_port_printk(ap, KERN_INFO, "DUMMY\n"); 7083 } 7084 7085 /* perform each probe synchronously */ 7086 DPRINTK("probe begin\n"); 7087 for (i = 0; i < host->n_ports; i++) { 7088 struct ata_port *ap = host->ports[i]; 7089 int rc; 7090 7091 /* probe */ 7092 if (ap->ops->error_handler) { 7093 struct ata_eh_info *ehi = &ap->link.eh_info; 7094 unsigned long flags; 7095 7096 ata_port_probe(ap); 7097 7098 /* kick EH for boot probing */ 7099 spin_lock_irqsave(ap->lock, flags); 7100 7101 ehi->probe_mask = 7102 (1 << ata_link_max_devices(&ap->link)) - 1; 7103 ehi->action |= ATA_EH_SOFTRESET; 7104 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET; 7105 7106 ap->pflags &= ~ATA_PFLAG_INITIALIZING; 7107 ap->pflags |= ATA_PFLAG_LOADING; 7108 ata_port_schedule_eh(ap); 7109 7110 spin_unlock_irqrestore(ap->lock, flags); 7111 7112 /* wait for EH to finish */ 7113 ata_port_wait_eh(ap); 7114 } else { 7115 DPRINTK("ata%u: bus probe begin\n", ap->print_id); 7116 rc = ata_bus_probe(ap); 7117 DPRINTK("ata%u: bus probe end\n", ap->print_id); 7118 7119 if (rc) { 7120 /* FIXME: do something useful here? 7121 * Current libata behavior will 7122 * tear down everything when 7123 * the module is removed 7124 * or the h/w is unplugged. 7125 */ 7126 } 7127 } 7128 } 7129 7130 /* probes are done, now scan each port's disk(s) */ 7131 DPRINTK("host probe begin\n"); 7132 for (i = 0; i < host->n_ports; i++) { 7133 struct ata_port *ap = host->ports[i]; 7134 7135 ata_scsi_scan_host(ap, 1); 7136 ata_lpm_schedule(ap, ap->pm_policy); 7137 } 7138 7139 return 0; 7140 } 7141 7142 /** 7143 * ata_host_activate - start host, request IRQ and register it 7144 * @host: target ATA host 7145 * @irq: IRQ to request 7146 * @irq_handler: irq_handler used when requesting IRQ 7147 * @irq_flags: irq_flags used when requesting IRQ 7148 * @sht: scsi_host_template to use when registering the host 7149 * 7150 * After allocating an ATA host and initializing it, most libata 7151 * LLDs perform three steps to activate the host - start host, 7152 * request IRQ and register it. This helper takes necessasry 7153 * arguments and performs the three steps in one go. 7154 * 7155 * An invalid IRQ skips the IRQ registration and expects the host to 7156 * have set polling mode on the port. In this case, @irq_handler 7157 * should be NULL. 7158 * 7159 * LOCKING: 7160 * Inherited from calling layer (may sleep). 7161 * 7162 * RETURNS: 7163 * 0 on success, -errno otherwise. 7164 */ 7165 int ata_host_activate(struct ata_host *host, int irq, 7166 irq_handler_t irq_handler, unsigned long irq_flags, 7167 struct scsi_host_template *sht) 7168 { 7169 int i, rc; 7170 7171 rc = ata_host_start(host); 7172 if (rc) 7173 return rc; 7174 7175 /* Special case for polling mode */ 7176 if (!irq) { 7177 WARN_ON(irq_handler); 7178 return ata_host_register(host, sht); 7179 } 7180 7181 rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags, 7182 dev_driver_string(host->dev), host); 7183 if (rc) 7184 return rc; 7185 7186 for (i = 0; i < host->n_ports; i++) 7187 ata_port_desc(host->ports[i], "irq %d", irq); 7188 7189 rc = ata_host_register(host, sht); 7190 /* if failed, just free the IRQ and leave ports alone */ 7191 if (rc) 7192 devm_free_irq(host->dev, irq, host); 7193 7194 return rc; 7195 } 7196 7197 /** 7198 * ata_port_detach - Detach ATA port in prepration of device removal 7199 * @ap: ATA port to be detached 7200 * 7201 * Detach all ATA devices and the associated SCSI devices of @ap; 7202 * then, remove the associated SCSI host. @ap is guaranteed to 7203 * be quiescent on return from this function. 7204 * 7205 * LOCKING: 7206 * Kernel thread context (may sleep). 7207 */ 7208 static void ata_port_detach(struct ata_port *ap) 7209 { 7210 unsigned long flags; 7211 struct ata_link *link; 7212 struct ata_device *dev; 7213 7214 if (!ap->ops->error_handler) 7215 goto skip_eh; 7216 7217 /* tell EH we're leaving & flush EH */ 7218 spin_lock_irqsave(ap->lock, flags); 7219 ap->pflags |= ATA_PFLAG_UNLOADING; 7220 spin_unlock_irqrestore(ap->lock, flags); 7221 7222 ata_port_wait_eh(ap); 7223 7224 /* EH is now guaranteed to see UNLOADING - EH context belongs 7225 * to us. Disable all existing devices. 7226 */ 7227 ata_port_for_each_link(link, ap) { 7228 ata_link_for_each_dev(dev, link) 7229 ata_dev_disable(dev); 7230 } 7231 7232 /* Final freeze & EH. All in-flight commands are aborted. EH 7233 * will be skipped and retrials will be terminated with bad 7234 * target. 7235 */ 7236 spin_lock_irqsave(ap->lock, flags); 7237 ata_port_freeze(ap); /* won't be thawed */ 7238 spin_unlock_irqrestore(ap->lock, flags); 7239 7240 ata_port_wait_eh(ap); 7241 cancel_rearming_delayed_work(&ap->hotplug_task); 7242 7243 skip_eh: 7244 /* remove the associated SCSI host */ 7245 scsi_remove_host(ap->scsi_host); 7246 } 7247 7248 /** 7249 * ata_host_detach - Detach all ports of an ATA host 7250 * @host: Host to detach 7251 * 7252 * Detach all ports of @host. 7253 * 7254 * LOCKING: 7255 * Kernel thread context (may sleep). 7256 */ 7257 void ata_host_detach(struct ata_host *host) 7258 { 7259 int i; 7260 7261 for (i = 0; i < host->n_ports; i++) 7262 ata_port_detach(host->ports[i]); 7263 7264 /* the host is dead now, dissociate ACPI */ 7265 ata_acpi_dissociate(host); 7266 } 7267 7268 /** 7269 * ata_std_ports - initialize ioaddr with standard port offsets. 7270 * @ioaddr: IO address structure to be initialized 7271 * 7272 * Utility function which initializes data_addr, error_addr, 7273 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, 7274 * device_addr, status_addr, and command_addr to standard offsets 7275 * relative to cmd_addr. 7276 * 7277 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. 7278 */ 7279 7280 void ata_std_ports(struct ata_ioports *ioaddr) 7281 { 7282 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; 7283 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; 7284 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; 7285 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; 7286 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; 7287 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; 7288 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; 7289 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; 7290 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; 7291 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; 7292 } 7293 7294 7295 #ifdef CONFIG_PCI 7296 7297 /** 7298 * ata_pci_remove_one - PCI layer callback for device removal 7299 * @pdev: PCI device that was removed 7300 * 7301 * PCI layer indicates to libata via this hook that hot-unplug or 7302 * module unload event has occurred. Detach all ports. Resource 7303 * release is handled via devres. 7304 * 7305 * LOCKING: 7306 * Inherited from PCI layer (may sleep). 7307 */ 7308 void ata_pci_remove_one(struct pci_dev *pdev) 7309 { 7310 struct device *dev = &pdev->dev; 7311 struct ata_host *host = dev_get_drvdata(dev); 7312 7313 ata_host_detach(host); 7314 } 7315 7316 /* move to PCI subsystem */ 7317 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits) 7318 { 7319 unsigned long tmp = 0; 7320 7321 switch (bits->width) { 7322 case 1: { 7323 u8 tmp8 = 0; 7324 pci_read_config_byte(pdev, bits->reg, &tmp8); 7325 tmp = tmp8; 7326 break; 7327 } 7328 case 2: { 7329 u16 tmp16 = 0; 7330 pci_read_config_word(pdev, bits->reg, &tmp16); 7331 tmp = tmp16; 7332 break; 7333 } 7334 case 4: { 7335 u32 tmp32 = 0; 7336 pci_read_config_dword(pdev, bits->reg, &tmp32); 7337 tmp = tmp32; 7338 break; 7339 } 7340 7341 default: 7342 return -EINVAL; 7343 } 7344 7345 tmp &= bits->mask; 7346 7347 return (tmp == bits->val) ? 1 : 0; 7348 } 7349 7350 #ifdef CONFIG_PM 7351 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg) 7352 { 7353 pci_save_state(pdev); 7354 pci_disable_device(pdev); 7355 7356 if (mesg.event == PM_EVENT_SUSPEND) 7357 pci_set_power_state(pdev, PCI_D3hot); 7358 } 7359 7360 int ata_pci_device_do_resume(struct pci_dev *pdev) 7361 { 7362 int rc; 7363 7364 pci_set_power_state(pdev, PCI_D0); 7365 pci_restore_state(pdev); 7366 7367 rc = pcim_enable_device(pdev); 7368 if (rc) { 7369 dev_printk(KERN_ERR, &pdev->dev, 7370 "failed to enable device after resume (%d)\n", rc); 7371 return rc; 7372 } 7373 7374 pci_set_master(pdev); 7375 return 0; 7376 } 7377 7378 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) 7379 { 7380 struct ata_host *host = dev_get_drvdata(&pdev->dev); 7381 int rc = 0; 7382 7383 rc = ata_host_suspend(host, mesg); 7384 if (rc) 7385 return rc; 7386 7387 ata_pci_device_do_suspend(pdev, mesg); 7388 7389 return 0; 7390 } 7391 7392 int ata_pci_device_resume(struct pci_dev *pdev) 7393 { 7394 struct ata_host *host = dev_get_drvdata(&pdev->dev); 7395 int rc; 7396 7397 rc = ata_pci_device_do_resume(pdev); 7398 if (rc == 0) 7399 ata_host_resume(host); 7400 return rc; 7401 } 7402 #endif /* CONFIG_PM */ 7403 7404 #endif /* CONFIG_PCI */ 7405 7406 7407 static int __init ata_init(void) 7408 { 7409 ata_probe_timeout *= HZ; 7410 ata_wq = create_workqueue("ata"); 7411 if (!ata_wq) 7412 return -ENOMEM; 7413 7414 ata_aux_wq = create_singlethread_workqueue("ata_aux"); 7415 if (!ata_aux_wq) { 7416 destroy_workqueue(ata_wq); 7417 return -ENOMEM; 7418 } 7419 7420 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); 7421 return 0; 7422 } 7423 7424 static void __exit ata_exit(void) 7425 { 7426 destroy_workqueue(ata_wq); 7427 destroy_workqueue(ata_aux_wq); 7428 } 7429 7430 subsys_initcall(ata_init); 7431 module_exit(ata_exit); 7432 7433 static unsigned long ratelimit_time; 7434 static DEFINE_SPINLOCK(ata_ratelimit_lock); 7435 7436 int ata_ratelimit(void) 7437 { 7438 int rc; 7439 unsigned long flags; 7440 7441 spin_lock_irqsave(&ata_ratelimit_lock, flags); 7442 7443 if (time_after(jiffies, ratelimit_time)) { 7444 rc = 1; 7445 ratelimit_time = jiffies + (HZ/5); 7446 } else 7447 rc = 0; 7448 7449 spin_unlock_irqrestore(&ata_ratelimit_lock, flags); 7450 7451 return rc; 7452 } 7453 7454 /** 7455 * ata_wait_register - wait until register value changes 7456 * @reg: IO-mapped register 7457 * @mask: Mask to apply to read register value 7458 * @val: Wait condition 7459 * @interval_msec: polling interval in milliseconds 7460 * @timeout_msec: timeout in milliseconds 7461 * 7462 * Waiting for some bits of register to change is a common 7463 * operation for ATA controllers. This function reads 32bit LE 7464 * IO-mapped register @reg and tests for the following condition. 7465 * 7466 * (*@reg & mask) != val 7467 * 7468 * If the condition is met, it returns; otherwise, the process is 7469 * repeated after @interval_msec until timeout. 7470 * 7471 * LOCKING: 7472 * Kernel thread context (may sleep) 7473 * 7474 * RETURNS: 7475 * The final register value. 7476 */ 7477 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, 7478 unsigned long interval_msec, 7479 unsigned long timeout_msec) 7480 { 7481 unsigned long timeout; 7482 u32 tmp; 7483 7484 tmp = ioread32(reg); 7485 7486 /* Calculate timeout _after_ the first read to make sure 7487 * preceding writes reach the controller before starting to 7488 * eat away the timeout. 7489 */ 7490 timeout = jiffies + (timeout_msec * HZ) / 1000; 7491 7492 while ((tmp & mask) == val && time_before(jiffies, timeout)) { 7493 msleep(interval_msec); 7494 tmp = ioread32(reg); 7495 } 7496 7497 return tmp; 7498 } 7499 7500 /* 7501 * Dummy port_ops 7502 */ 7503 static void ata_dummy_noret(struct ata_port *ap) { } 7504 static int ata_dummy_ret0(struct ata_port *ap) { return 0; } 7505 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { } 7506 7507 static u8 ata_dummy_check_status(struct ata_port *ap) 7508 { 7509 return ATA_DRDY; 7510 } 7511 7512 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc) 7513 { 7514 return AC_ERR_SYSTEM; 7515 } 7516 7517 const struct ata_port_operations ata_dummy_port_ops = { 7518 .check_status = ata_dummy_check_status, 7519 .check_altstatus = ata_dummy_check_status, 7520 .dev_select = ata_noop_dev_select, 7521 .qc_prep = ata_noop_qc_prep, 7522 .qc_issue = ata_dummy_qc_issue, 7523 .freeze = ata_dummy_noret, 7524 .thaw = ata_dummy_noret, 7525 .error_handler = ata_dummy_noret, 7526 .post_internal_cmd = ata_dummy_qc_noret, 7527 .irq_clear = ata_dummy_noret, 7528 .port_start = ata_dummy_ret0, 7529 .port_stop = ata_dummy_noret, 7530 }; 7531 7532 const struct ata_port_info ata_dummy_port_info = { 7533 .port_ops = &ata_dummy_port_ops, 7534 }; 7535 7536 /* 7537 * libata is essentially a library of internal helper functions for 7538 * low-level ATA host controller drivers. As such, the API/ABI is 7539 * likely to change as new drivers are added and updated. 7540 * Do not depend on ABI/API stability. 7541 */ 7542 EXPORT_SYMBOL_GPL(sata_deb_timing_normal); 7543 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug); 7544 EXPORT_SYMBOL_GPL(sata_deb_timing_long); 7545 EXPORT_SYMBOL_GPL(ata_dummy_port_ops); 7546 EXPORT_SYMBOL_GPL(ata_dummy_port_info); 7547 EXPORT_SYMBOL_GPL(ata_std_bios_param); 7548 EXPORT_SYMBOL_GPL(ata_std_ports); 7549 EXPORT_SYMBOL_GPL(ata_host_init); 7550 EXPORT_SYMBOL_GPL(ata_host_alloc); 7551 EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo); 7552 EXPORT_SYMBOL_GPL(ata_host_start); 7553 EXPORT_SYMBOL_GPL(ata_host_register); 7554 EXPORT_SYMBOL_GPL(ata_host_activate); 7555 EXPORT_SYMBOL_GPL(ata_host_detach); 7556 EXPORT_SYMBOL_GPL(ata_sg_init); 7557 EXPORT_SYMBOL_GPL(ata_hsm_move); 7558 EXPORT_SYMBOL_GPL(ata_qc_complete); 7559 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple); 7560 EXPORT_SYMBOL_GPL(ata_qc_issue_prot); 7561 EXPORT_SYMBOL_GPL(ata_tf_load); 7562 EXPORT_SYMBOL_GPL(ata_tf_read); 7563 EXPORT_SYMBOL_GPL(ata_noop_dev_select); 7564 EXPORT_SYMBOL_GPL(ata_std_dev_select); 7565 EXPORT_SYMBOL_GPL(sata_print_link_status); 7566 EXPORT_SYMBOL_GPL(ata_tf_to_fis); 7567 EXPORT_SYMBOL_GPL(ata_tf_from_fis); 7568 EXPORT_SYMBOL_GPL(ata_pack_xfermask); 7569 EXPORT_SYMBOL_GPL(ata_unpack_xfermask); 7570 EXPORT_SYMBOL_GPL(ata_xfer_mask2mode); 7571 EXPORT_SYMBOL_GPL(ata_xfer_mode2mask); 7572 EXPORT_SYMBOL_GPL(ata_xfer_mode2shift); 7573 EXPORT_SYMBOL_GPL(ata_mode_string); 7574 EXPORT_SYMBOL_GPL(ata_id_xfermask); 7575 EXPORT_SYMBOL_GPL(ata_check_status); 7576 EXPORT_SYMBOL_GPL(ata_altstatus); 7577 EXPORT_SYMBOL_GPL(ata_exec_command); 7578 EXPORT_SYMBOL_GPL(ata_port_start); 7579 EXPORT_SYMBOL_GPL(ata_sff_port_start); 7580 EXPORT_SYMBOL_GPL(ata_interrupt); 7581 EXPORT_SYMBOL_GPL(ata_do_set_mode); 7582 EXPORT_SYMBOL_GPL(ata_data_xfer); 7583 EXPORT_SYMBOL_GPL(ata_data_xfer_noirq); 7584 EXPORT_SYMBOL_GPL(ata_std_qc_defer); 7585 EXPORT_SYMBOL_GPL(ata_qc_prep); 7586 EXPORT_SYMBOL_GPL(ata_dumb_qc_prep); 7587 EXPORT_SYMBOL_GPL(ata_noop_qc_prep); 7588 EXPORT_SYMBOL_GPL(ata_bmdma_setup); 7589 EXPORT_SYMBOL_GPL(ata_bmdma_start); 7590 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); 7591 EXPORT_SYMBOL_GPL(ata_bmdma_status); 7592 EXPORT_SYMBOL_GPL(ata_bmdma_stop); 7593 EXPORT_SYMBOL_GPL(ata_bmdma_freeze); 7594 EXPORT_SYMBOL_GPL(ata_bmdma_thaw); 7595 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh); 7596 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler); 7597 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd); 7598 EXPORT_SYMBOL_GPL(ata_port_probe); 7599 EXPORT_SYMBOL_GPL(ata_dev_disable); 7600 EXPORT_SYMBOL_GPL(sata_set_spd); 7601 EXPORT_SYMBOL_GPL(sata_link_debounce); 7602 EXPORT_SYMBOL_GPL(sata_link_resume); 7603 EXPORT_SYMBOL_GPL(ata_bus_reset); 7604 EXPORT_SYMBOL_GPL(ata_std_prereset); 7605 EXPORT_SYMBOL_GPL(ata_std_softreset); 7606 EXPORT_SYMBOL_GPL(sata_link_hardreset); 7607 EXPORT_SYMBOL_GPL(sata_std_hardreset); 7608 EXPORT_SYMBOL_GPL(ata_std_postreset); 7609 EXPORT_SYMBOL_GPL(ata_dev_classify); 7610 EXPORT_SYMBOL_GPL(ata_dev_pair); 7611 EXPORT_SYMBOL_GPL(ata_port_disable); 7612 EXPORT_SYMBOL_GPL(ata_ratelimit); 7613 EXPORT_SYMBOL_GPL(ata_wait_register); 7614 EXPORT_SYMBOL_GPL(ata_busy_sleep); 7615 EXPORT_SYMBOL_GPL(ata_wait_after_reset); 7616 EXPORT_SYMBOL_GPL(ata_wait_ready); 7617 EXPORT_SYMBOL_GPL(ata_scsi_ioctl); 7618 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); 7619 EXPORT_SYMBOL_GPL(ata_scsi_slave_config); 7620 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy); 7621 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth); 7622 EXPORT_SYMBOL_GPL(ata_host_intr); 7623 EXPORT_SYMBOL_GPL(sata_scr_valid); 7624 EXPORT_SYMBOL_GPL(sata_scr_read); 7625 EXPORT_SYMBOL_GPL(sata_scr_write); 7626 EXPORT_SYMBOL_GPL(sata_scr_write_flush); 7627 EXPORT_SYMBOL_GPL(ata_link_online); 7628 EXPORT_SYMBOL_GPL(ata_link_offline); 7629 #ifdef CONFIG_PM 7630 EXPORT_SYMBOL_GPL(ata_host_suspend); 7631 EXPORT_SYMBOL_GPL(ata_host_resume); 7632 #endif /* CONFIG_PM */ 7633 EXPORT_SYMBOL_GPL(ata_id_string); 7634 EXPORT_SYMBOL_GPL(ata_id_c_string); 7635 EXPORT_SYMBOL_GPL(ata_scsi_simulate); 7636 7637 EXPORT_SYMBOL_GPL(ata_pio_need_iordy); 7638 EXPORT_SYMBOL_GPL(ata_timing_find_mode); 7639 EXPORT_SYMBOL_GPL(ata_timing_compute); 7640 EXPORT_SYMBOL_GPL(ata_timing_merge); 7641 EXPORT_SYMBOL_GPL(ata_timing_cycle2mode); 7642 7643 #ifdef CONFIG_PCI 7644 EXPORT_SYMBOL_GPL(pci_test_config_bits); 7645 EXPORT_SYMBOL_GPL(ata_pci_init_sff_host); 7646 EXPORT_SYMBOL_GPL(ata_pci_init_bmdma); 7647 EXPORT_SYMBOL_GPL(ata_pci_prepare_sff_host); 7648 EXPORT_SYMBOL_GPL(ata_pci_activate_sff_host); 7649 EXPORT_SYMBOL_GPL(ata_pci_init_one); 7650 EXPORT_SYMBOL_GPL(ata_pci_remove_one); 7651 #ifdef CONFIG_PM 7652 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend); 7653 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume); 7654 EXPORT_SYMBOL_GPL(ata_pci_device_suspend); 7655 EXPORT_SYMBOL_GPL(ata_pci_device_resume); 7656 #endif /* CONFIG_PM */ 7657 EXPORT_SYMBOL_GPL(ata_pci_default_filter); 7658 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex); 7659 #endif /* CONFIG_PCI */ 7660 7661 EXPORT_SYMBOL_GPL(sata_pmp_qc_defer_cmd_switch); 7662 EXPORT_SYMBOL_GPL(sata_pmp_std_prereset); 7663 EXPORT_SYMBOL_GPL(sata_pmp_std_hardreset); 7664 EXPORT_SYMBOL_GPL(sata_pmp_std_postreset); 7665 EXPORT_SYMBOL_GPL(sata_pmp_do_eh); 7666 7667 EXPORT_SYMBOL_GPL(__ata_ehi_push_desc); 7668 EXPORT_SYMBOL_GPL(ata_ehi_push_desc); 7669 EXPORT_SYMBOL_GPL(ata_ehi_clear_desc); 7670 EXPORT_SYMBOL_GPL(ata_port_desc); 7671 #ifdef CONFIG_PCI 7672 EXPORT_SYMBOL_GPL(ata_port_pbar_desc); 7673 #endif /* CONFIG_PCI */ 7674 EXPORT_SYMBOL_GPL(ata_port_schedule_eh); 7675 EXPORT_SYMBOL_GPL(ata_link_abort); 7676 EXPORT_SYMBOL_GPL(ata_port_abort); 7677 EXPORT_SYMBOL_GPL(ata_port_freeze); 7678 EXPORT_SYMBOL_GPL(sata_async_notification); 7679 EXPORT_SYMBOL_GPL(ata_eh_freeze_port); 7680 EXPORT_SYMBOL_GPL(ata_eh_thaw_port); 7681 EXPORT_SYMBOL_GPL(ata_eh_qc_complete); 7682 EXPORT_SYMBOL_GPL(ata_eh_qc_retry); 7683 EXPORT_SYMBOL_GPL(ata_do_eh); 7684 EXPORT_SYMBOL_GPL(ata_irq_on); 7685 EXPORT_SYMBOL_GPL(ata_dev_try_classify); 7686 7687 EXPORT_SYMBOL_GPL(ata_cable_40wire); 7688 EXPORT_SYMBOL_GPL(ata_cable_80wire); 7689 EXPORT_SYMBOL_GPL(ata_cable_unknown); 7690 EXPORT_SYMBOL_GPL(ata_cable_ignore); 7691 EXPORT_SYMBOL_GPL(ata_cable_sata); 7692