1 /* 2 * libata-core.c - helper library for ATA 3 * 4 * Maintained by: Jeff Garzik <jgarzik@pobox.com> 5 * Please ALWAYS copy linux-ide@vger.kernel.org 6 * on emails. 7 * 8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved. 9 * Copyright 2003-2004 Jeff Garzik 10 * 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2, or (at your option) 15 * any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; see the file COPYING. If not, write to 24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 25 * 26 * 27 * libata documentation is available via 'make {ps|pdf}docs', 28 * as Documentation/DocBook/libata.* 29 * 30 * Hardware documentation available from http://www.t13.org/ and 31 * http://www.sata-io.org/ 32 * 33 */ 34 35 #include <linux/kernel.h> 36 #include <linux/module.h> 37 #include <linux/pci.h> 38 #include <linux/init.h> 39 #include <linux/list.h> 40 #include <linux/mm.h> 41 #include <linux/highmem.h> 42 #include <linux/spinlock.h> 43 #include <linux/blkdev.h> 44 #include <linux/delay.h> 45 #include <linux/timer.h> 46 #include <linux/interrupt.h> 47 #include <linux/completion.h> 48 #include <linux/suspend.h> 49 #include <linux/workqueue.h> 50 #include <linux/jiffies.h> 51 #include <linux/scatterlist.h> 52 #include <scsi/scsi.h> 53 #include <scsi/scsi_cmnd.h> 54 #include <scsi/scsi_host.h> 55 #include <linux/libata.h> 56 #include <asm/io.h> 57 #include <asm/semaphore.h> 58 #include <asm/byteorder.h> 59 60 #include "libata.h" 61 62 /* debounce timing parameters in msecs { interval, duration, timeout } */ 63 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 }; 64 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 }; 65 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 }; 66 67 static unsigned int ata_dev_init_params(struct ata_device *dev, 68 u16 heads, u16 sectors); 69 static unsigned int ata_dev_set_xfermode(struct ata_device *dev); 70 static void ata_dev_xfermask(struct ata_device *dev); 71 72 static unsigned int ata_unique_id = 1; 73 static struct workqueue_struct *ata_wq; 74 75 struct workqueue_struct *ata_aux_wq; 76 77 int atapi_enabled = 1; 78 module_param(atapi_enabled, int, 0444); 79 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); 80 81 int atapi_dmadir = 0; 82 module_param(atapi_dmadir, int, 0444); 83 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)"); 84 85 int libata_fua = 0; 86 module_param_named(fua, libata_fua, int, 0444); 87 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)"); 88 89 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ; 90 module_param(ata_probe_timeout, int, 0444); 91 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)"); 92 93 MODULE_AUTHOR("Jeff Garzik"); 94 MODULE_DESCRIPTION("Library module for ATA devices"); 95 MODULE_LICENSE("GPL"); 96 MODULE_VERSION(DRV_VERSION); 97 98 99 /** 100 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure 101 * @tf: Taskfile to convert 102 * @fis: Buffer into which data will output 103 * @pmp: Port multiplier port 104 * 105 * Converts a standard ATA taskfile to a Serial ATA 106 * FIS structure (Register - Host to Device). 107 * 108 * LOCKING: 109 * Inherited from caller. 110 */ 111 112 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp) 113 { 114 fis[0] = 0x27; /* Register - Host to Device FIS */ 115 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number, 116 bit 7 indicates Command FIS */ 117 fis[2] = tf->command; 118 fis[3] = tf->feature; 119 120 fis[4] = tf->lbal; 121 fis[5] = tf->lbam; 122 fis[6] = tf->lbah; 123 fis[7] = tf->device; 124 125 fis[8] = tf->hob_lbal; 126 fis[9] = tf->hob_lbam; 127 fis[10] = tf->hob_lbah; 128 fis[11] = tf->hob_feature; 129 130 fis[12] = tf->nsect; 131 fis[13] = tf->hob_nsect; 132 fis[14] = 0; 133 fis[15] = tf->ctl; 134 135 fis[16] = 0; 136 fis[17] = 0; 137 fis[18] = 0; 138 fis[19] = 0; 139 } 140 141 /** 142 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile 143 * @fis: Buffer from which data will be input 144 * @tf: Taskfile to output 145 * 146 * Converts a serial ATA FIS structure to a standard ATA taskfile. 147 * 148 * LOCKING: 149 * Inherited from caller. 150 */ 151 152 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf) 153 { 154 tf->command = fis[2]; /* status */ 155 tf->feature = fis[3]; /* error */ 156 157 tf->lbal = fis[4]; 158 tf->lbam = fis[5]; 159 tf->lbah = fis[6]; 160 tf->device = fis[7]; 161 162 tf->hob_lbal = fis[8]; 163 tf->hob_lbam = fis[9]; 164 tf->hob_lbah = fis[10]; 165 166 tf->nsect = fis[12]; 167 tf->hob_nsect = fis[13]; 168 } 169 170 static const u8 ata_rw_cmds[] = { 171 /* pio multi */ 172 ATA_CMD_READ_MULTI, 173 ATA_CMD_WRITE_MULTI, 174 ATA_CMD_READ_MULTI_EXT, 175 ATA_CMD_WRITE_MULTI_EXT, 176 0, 177 0, 178 0, 179 ATA_CMD_WRITE_MULTI_FUA_EXT, 180 /* pio */ 181 ATA_CMD_PIO_READ, 182 ATA_CMD_PIO_WRITE, 183 ATA_CMD_PIO_READ_EXT, 184 ATA_CMD_PIO_WRITE_EXT, 185 0, 186 0, 187 0, 188 0, 189 /* dma */ 190 ATA_CMD_READ, 191 ATA_CMD_WRITE, 192 ATA_CMD_READ_EXT, 193 ATA_CMD_WRITE_EXT, 194 0, 195 0, 196 0, 197 ATA_CMD_WRITE_FUA_EXT 198 }; 199 200 /** 201 * ata_rwcmd_protocol - set taskfile r/w commands and protocol 202 * @tf: command to examine and configure 203 * @dev: device tf belongs to 204 * 205 * Examine the device configuration and tf->flags to calculate 206 * the proper read/write commands and protocol to use. 207 * 208 * LOCKING: 209 * caller. 210 */ 211 static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev) 212 { 213 u8 cmd; 214 215 int index, fua, lba48, write; 216 217 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0; 218 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0; 219 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0; 220 221 if (dev->flags & ATA_DFLAG_PIO) { 222 tf->protocol = ATA_PROT_PIO; 223 index = dev->multi_count ? 0 : 8; 224 } else if (lba48 && (dev->ap->flags & ATA_FLAG_PIO_LBA48)) { 225 /* Unable to use DMA due to host limitation */ 226 tf->protocol = ATA_PROT_PIO; 227 index = dev->multi_count ? 0 : 8; 228 } else { 229 tf->protocol = ATA_PROT_DMA; 230 index = 16; 231 } 232 233 cmd = ata_rw_cmds[index + fua + lba48 + write]; 234 if (cmd) { 235 tf->command = cmd; 236 return 0; 237 } 238 return -1; 239 } 240 241 /** 242 * ata_tf_read_block - Read block address from ATA taskfile 243 * @tf: ATA taskfile of interest 244 * @dev: ATA device @tf belongs to 245 * 246 * LOCKING: 247 * None. 248 * 249 * Read block address from @tf. This function can handle all 250 * three address formats - LBA, LBA48 and CHS. tf->protocol and 251 * flags select the address format to use. 252 * 253 * RETURNS: 254 * Block address read from @tf. 255 */ 256 u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev) 257 { 258 u64 block = 0; 259 260 if (tf->flags & ATA_TFLAG_LBA) { 261 if (tf->flags & ATA_TFLAG_LBA48) { 262 block |= (u64)tf->hob_lbah << 40; 263 block |= (u64)tf->hob_lbam << 32; 264 block |= tf->hob_lbal << 24; 265 } else 266 block |= (tf->device & 0xf) << 24; 267 268 block |= tf->lbah << 16; 269 block |= tf->lbam << 8; 270 block |= tf->lbal; 271 } else { 272 u32 cyl, head, sect; 273 274 cyl = tf->lbam | (tf->lbah << 8); 275 head = tf->device & 0xf; 276 sect = tf->lbal; 277 278 block = (cyl * dev->heads + head) * dev->sectors + sect; 279 } 280 281 return block; 282 } 283 284 /** 285 * ata_build_rw_tf - Build ATA taskfile for given read/write request 286 * @tf: Target ATA taskfile 287 * @dev: ATA device @tf belongs to 288 * @block: Block address 289 * @n_block: Number of blocks 290 * @tf_flags: RW/FUA etc... 291 * @tag: tag 292 * 293 * LOCKING: 294 * None. 295 * 296 * Build ATA taskfile @tf for read/write request described by 297 * @block, @n_block, @tf_flags and @tag on @dev. 298 * 299 * RETURNS: 300 * 301 * 0 on success, -ERANGE if the request is too large for @dev, 302 * -EINVAL if the request is invalid. 303 */ 304 int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev, 305 u64 block, u32 n_block, unsigned int tf_flags, 306 unsigned int tag) 307 { 308 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 309 tf->flags |= tf_flags; 310 311 if ((dev->flags & (ATA_DFLAG_PIO | ATA_DFLAG_NCQ_OFF | 312 ATA_DFLAG_NCQ)) == ATA_DFLAG_NCQ && 313 likely(tag != ATA_TAG_INTERNAL)) { 314 /* yay, NCQ */ 315 if (!lba_48_ok(block, n_block)) 316 return -ERANGE; 317 318 tf->protocol = ATA_PROT_NCQ; 319 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48; 320 321 if (tf->flags & ATA_TFLAG_WRITE) 322 tf->command = ATA_CMD_FPDMA_WRITE; 323 else 324 tf->command = ATA_CMD_FPDMA_READ; 325 326 tf->nsect = tag << 3; 327 tf->hob_feature = (n_block >> 8) & 0xff; 328 tf->feature = n_block & 0xff; 329 330 tf->hob_lbah = (block >> 40) & 0xff; 331 tf->hob_lbam = (block >> 32) & 0xff; 332 tf->hob_lbal = (block >> 24) & 0xff; 333 tf->lbah = (block >> 16) & 0xff; 334 tf->lbam = (block >> 8) & 0xff; 335 tf->lbal = block & 0xff; 336 337 tf->device = 1 << 6; 338 if (tf->flags & ATA_TFLAG_FUA) 339 tf->device |= 1 << 7; 340 } else if (dev->flags & ATA_DFLAG_LBA) { 341 tf->flags |= ATA_TFLAG_LBA; 342 343 if (lba_28_ok(block, n_block)) { 344 /* use LBA28 */ 345 tf->device |= (block >> 24) & 0xf; 346 } else if (lba_48_ok(block, n_block)) { 347 if (!(dev->flags & ATA_DFLAG_LBA48)) 348 return -ERANGE; 349 350 /* use LBA48 */ 351 tf->flags |= ATA_TFLAG_LBA48; 352 353 tf->hob_nsect = (n_block >> 8) & 0xff; 354 355 tf->hob_lbah = (block >> 40) & 0xff; 356 tf->hob_lbam = (block >> 32) & 0xff; 357 tf->hob_lbal = (block >> 24) & 0xff; 358 } else 359 /* request too large even for LBA48 */ 360 return -ERANGE; 361 362 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0)) 363 return -EINVAL; 364 365 tf->nsect = n_block & 0xff; 366 367 tf->lbah = (block >> 16) & 0xff; 368 tf->lbam = (block >> 8) & 0xff; 369 tf->lbal = block & 0xff; 370 371 tf->device |= ATA_LBA; 372 } else { 373 /* CHS */ 374 u32 sect, head, cyl, track; 375 376 /* The request -may- be too large for CHS addressing. */ 377 if (!lba_28_ok(block, n_block)) 378 return -ERANGE; 379 380 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0)) 381 return -EINVAL; 382 383 /* Convert LBA to CHS */ 384 track = (u32)block / dev->sectors; 385 cyl = track / dev->heads; 386 head = track % dev->heads; 387 sect = (u32)block % dev->sectors + 1; 388 389 DPRINTK("block %u track %u cyl %u head %u sect %u\n", 390 (u32)block, track, cyl, head, sect); 391 392 /* Check whether the converted CHS can fit. 393 Cylinder: 0-65535 394 Head: 0-15 395 Sector: 1-255*/ 396 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect)) 397 return -ERANGE; 398 399 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */ 400 tf->lbal = sect; 401 tf->lbam = cyl; 402 tf->lbah = cyl >> 8; 403 tf->device |= head; 404 } 405 406 return 0; 407 } 408 409 /** 410 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask 411 * @pio_mask: pio_mask 412 * @mwdma_mask: mwdma_mask 413 * @udma_mask: udma_mask 414 * 415 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single 416 * unsigned int xfer_mask. 417 * 418 * LOCKING: 419 * None. 420 * 421 * RETURNS: 422 * Packed xfer_mask. 423 */ 424 static unsigned int ata_pack_xfermask(unsigned int pio_mask, 425 unsigned int mwdma_mask, 426 unsigned int udma_mask) 427 { 428 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) | 429 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) | 430 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA); 431 } 432 433 /** 434 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks 435 * @xfer_mask: xfer_mask to unpack 436 * @pio_mask: resulting pio_mask 437 * @mwdma_mask: resulting mwdma_mask 438 * @udma_mask: resulting udma_mask 439 * 440 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask. 441 * Any NULL distination masks will be ignored. 442 */ 443 static void ata_unpack_xfermask(unsigned int xfer_mask, 444 unsigned int *pio_mask, 445 unsigned int *mwdma_mask, 446 unsigned int *udma_mask) 447 { 448 if (pio_mask) 449 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO; 450 if (mwdma_mask) 451 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA; 452 if (udma_mask) 453 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA; 454 } 455 456 static const struct ata_xfer_ent { 457 int shift, bits; 458 u8 base; 459 } ata_xfer_tbl[] = { 460 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 }, 461 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 }, 462 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 }, 463 { -1, }, 464 }; 465 466 /** 467 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask 468 * @xfer_mask: xfer_mask of interest 469 * 470 * Return matching XFER_* value for @xfer_mask. Only the highest 471 * bit of @xfer_mask is considered. 472 * 473 * LOCKING: 474 * None. 475 * 476 * RETURNS: 477 * Matching XFER_* value, 0 if no match found. 478 */ 479 static u8 ata_xfer_mask2mode(unsigned int xfer_mask) 480 { 481 int highbit = fls(xfer_mask) - 1; 482 const struct ata_xfer_ent *ent; 483 484 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) 485 if (highbit >= ent->shift && highbit < ent->shift + ent->bits) 486 return ent->base + highbit - ent->shift; 487 return 0; 488 } 489 490 /** 491 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_* 492 * @xfer_mode: XFER_* of interest 493 * 494 * Return matching xfer_mask for @xfer_mode. 495 * 496 * LOCKING: 497 * None. 498 * 499 * RETURNS: 500 * Matching xfer_mask, 0 if no match found. 501 */ 502 static unsigned int ata_xfer_mode2mask(u8 xfer_mode) 503 { 504 const struct ata_xfer_ent *ent; 505 506 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) 507 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) 508 return 1 << (ent->shift + xfer_mode - ent->base); 509 return 0; 510 } 511 512 /** 513 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_* 514 * @xfer_mode: XFER_* of interest 515 * 516 * Return matching xfer_shift for @xfer_mode. 517 * 518 * LOCKING: 519 * None. 520 * 521 * RETURNS: 522 * Matching xfer_shift, -1 if no match found. 523 */ 524 static int ata_xfer_mode2shift(unsigned int xfer_mode) 525 { 526 const struct ata_xfer_ent *ent; 527 528 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) 529 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) 530 return ent->shift; 531 return -1; 532 } 533 534 /** 535 * ata_mode_string - convert xfer_mask to string 536 * @xfer_mask: mask of bits supported; only highest bit counts. 537 * 538 * Determine string which represents the highest speed 539 * (highest bit in @modemask). 540 * 541 * LOCKING: 542 * None. 543 * 544 * RETURNS: 545 * Constant C string representing highest speed listed in 546 * @mode_mask, or the constant C string "<n/a>". 547 */ 548 static const char *ata_mode_string(unsigned int xfer_mask) 549 { 550 static const char * const xfer_mode_str[] = { 551 "PIO0", 552 "PIO1", 553 "PIO2", 554 "PIO3", 555 "PIO4", 556 "PIO5", 557 "PIO6", 558 "MWDMA0", 559 "MWDMA1", 560 "MWDMA2", 561 "MWDMA3", 562 "MWDMA4", 563 "UDMA/16", 564 "UDMA/25", 565 "UDMA/33", 566 "UDMA/44", 567 "UDMA/66", 568 "UDMA/100", 569 "UDMA/133", 570 "UDMA7", 571 }; 572 int highbit; 573 574 highbit = fls(xfer_mask) - 1; 575 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str)) 576 return xfer_mode_str[highbit]; 577 return "<n/a>"; 578 } 579 580 static const char *sata_spd_string(unsigned int spd) 581 { 582 static const char * const spd_str[] = { 583 "1.5 Gbps", 584 "3.0 Gbps", 585 }; 586 587 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str)) 588 return "<unknown>"; 589 return spd_str[spd - 1]; 590 } 591 592 void ata_dev_disable(struct ata_device *dev) 593 { 594 if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) { 595 ata_dev_printk(dev, KERN_WARNING, "disabled\n"); 596 dev->class++; 597 } 598 } 599 600 /** 601 * ata_pio_devchk - PATA device presence detection 602 * @ap: ATA channel to examine 603 * @device: Device to examine (starting at zero) 604 * 605 * This technique was originally described in 606 * Hale Landis's ATADRVR (www.ata-atapi.com), and 607 * later found its way into the ATA/ATAPI spec. 608 * 609 * Write a pattern to the ATA shadow registers, 610 * and if a device is present, it will respond by 611 * correctly storing and echoing back the 612 * ATA shadow register contents. 613 * 614 * LOCKING: 615 * caller. 616 */ 617 618 static unsigned int ata_pio_devchk(struct ata_port *ap, 619 unsigned int device) 620 { 621 struct ata_ioports *ioaddr = &ap->ioaddr; 622 u8 nsect, lbal; 623 624 ap->ops->dev_select(ap, device); 625 626 outb(0x55, ioaddr->nsect_addr); 627 outb(0xaa, ioaddr->lbal_addr); 628 629 outb(0xaa, ioaddr->nsect_addr); 630 outb(0x55, ioaddr->lbal_addr); 631 632 outb(0x55, ioaddr->nsect_addr); 633 outb(0xaa, ioaddr->lbal_addr); 634 635 nsect = inb(ioaddr->nsect_addr); 636 lbal = inb(ioaddr->lbal_addr); 637 638 if ((nsect == 0x55) && (lbal == 0xaa)) 639 return 1; /* we found a device */ 640 641 return 0; /* nothing found */ 642 } 643 644 /** 645 * ata_mmio_devchk - PATA device presence detection 646 * @ap: ATA channel to examine 647 * @device: Device to examine (starting at zero) 648 * 649 * This technique was originally described in 650 * Hale Landis's ATADRVR (www.ata-atapi.com), and 651 * later found its way into the ATA/ATAPI spec. 652 * 653 * Write a pattern to the ATA shadow registers, 654 * and if a device is present, it will respond by 655 * correctly storing and echoing back the 656 * ATA shadow register contents. 657 * 658 * LOCKING: 659 * caller. 660 */ 661 662 static unsigned int ata_mmio_devchk(struct ata_port *ap, 663 unsigned int device) 664 { 665 struct ata_ioports *ioaddr = &ap->ioaddr; 666 u8 nsect, lbal; 667 668 ap->ops->dev_select(ap, device); 669 670 writeb(0x55, (void __iomem *) ioaddr->nsect_addr); 671 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); 672 673 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr); 674 writeb(0x55, (void __iomem *) ioaddr->lbal_addr); 675 676 writeb(0x55, (void __iomem *) ioaddr->nsect_addr); 677 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); 678 679 nsect = readb((void __iomem *) ioaddr->nsect_addr); 680 lbal = readb((void __iomem *) ioaddr->lbal_addr); 681 682 if ((nsect == 0x55) && (lbal == 0xaa)) 683 return 1; /* we found a device */ 684 685 return 0; /* nothing found */ 686 } 687 688 /** 689 * ata_devchk - PATA device presence detection 690 * @ap: ATA channel to examine 691 * @device: Device to examine (starting at zero) 692 * 693 * Dispatch ATA device presence detection, depending 694 * on whether we are using PIO or MMIO to talk to the 695 * ATA shadow registers. 696 * 697 * LOCKING: 698 * caller. 699 */ 700 701 static unsigned int ata_devchk(struct ata_port *ap, 702 unsigned int device) 703 { 704 if (ap->flags & ATA_FLAG_MMIO) 705 return ata_mmio_devchk(ap, device); 706 return ata_pio_devchk(ap, device); 707 } 708 709 /** 710 * ata_dev_classify - determine device type based on ATA-spec signature 711 * @tf: ATA taskfile register set for device to be identified 712 * 713 * Determine from taskfile register contents whether a device is 714 * ATA or ATAPI, as per "Signature and persistence" section 715 * of ATA/PI spec (volume 1, sect 5.14). 716 * 717 * LOCKING: 718 * None. 719 * 720 * RETURNS: 721 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN 722 * the event of failure. 723 */ 724 725 unsigned int ata_dev_classify(const struct ata_taskfile *tf) 726 { 727 /* Apple's open source Darwin code hints that some devices only 728 * put a proper signature into the LBA mid/high registers, 729 * So, we only check those. It's sufficient for uniqueness. 730 */ 731 732 if (((tf->lbam == 0) && (tf->lbah == 0)) || 733 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) { 734 DPRINTK("found ATA device by sig\n"); 735 return ATA_DEV_ATA; 736 } 737 738 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) || 739 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) { 740 DPRINTK("found ATAPI device by sig\n"); 741 return ATA_DEV_ATAPI; 742 } 743 744 DPRINTK("unknown device\n"); 745 return ATA_DEV_UNKNOWN; 746 } 747 748 /** 749 * ata_dev_try_classify - Parse returned ATA device signature 750 * @ap: ATA channel to examine 751 * @device: Device to examine (starting at zero) 752 * @r_err: Value of error register on completion 753 * 754 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, 755 * an ATA/ATAPI-defined set of values is placed in the ATA 756 * shadow registers, indicating the results of device detection 757 * and diagnostics. 758 * 759 * Select the ATA device, and read the values from the ATA shadow 760 * registers. Then parse according to the Error register value, 761 * and the spec-defined values examined by ata_dev_classify(). 762 * 763 * LOCKING: 764 * caller. 765 * 766 * RETURNS: 767 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE. 768 */ 769 770 static unsigned int 771 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err) 772 { 773 struct ata_taskfile tf; 774 unsigned int class; 775 u8 err; 776 777 ap->ops->dev_select(ap, device); 778 779 memset(&tf, 0, sizeof(tf)); 780 781 ap->ops->tf_read(ap, &tf); 782 err = tf.feature; 783 if (r_err) 784 *r_err = err; 785 786 /* see if device passed diags: if master then continue and warn later */ 787 if (err == 0 && device == 0) 788 /* diagnostic fail : do nothing _YET_ */ 789 ap->device[device].horkage |= ATA_HORKAGE_DIAGNOSTIC; 790 else if (err == 1) 791 /* do nothing */ ; 792 else if ((device == 0) && (err == 0x81)) 793 /* do nothing */ ; 794 else 795 return ATA_DEV_NONE; 796 797 /* determine if device is ATA or ATAPI */ 798 class = ata_dev_classify(&tf); 799 800 if (class == ATA_DEV_UNKNOWN) 801 return ATA_DEV_NONE; 802 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) 803 return ATA_DEV_NONE; 804 return class; 805 } 806 807 /** 808 * ata_id_string - Convert IDENTIFY DEVICE page into string 809 * @id: IDENTIFY DEVICE results we will examine 810 * @s: string into which data is output 811 * @ofs: offset into identify device page 812 * @len: length of string to return. must be an even number. 813 * 814 * The strings in the IDENTIFY DEVICE page are broken up into 815 * 16-bit chunks. Run through the string, and output each 816 * 8-bit chunk linearly, regardless of platform. 817 * 818 * LOCKING: 819 * caller. 820 */ 821 822 void ata_id_string(const u16 *id, unsigned char *s, 823 unsigned int ofs, unsigned int len) 824 { 825 unsigned int c; 826 827 while (len > 0) { 828 c = id[ofs] >> 8; 829 *s = c; 830 s++; 831 832 c = id[ofs] & 0xff; 833 *s = c; 834 s++; 835 836 ofs++; 837 len -= 2; 838 } 839 } 840 841 /** 842 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string 843 * @id: IDENTIFY DEVICE results we will examine 844 * @s: string into which data is output 845 * @ofs: offset into identify device page 846 * @len: length of string to return. must be an odd number. 847 * 848 * This function is identical to ata_id_string except that it 849 * trims trailing spaces and terminates the resulting string with 850 * null. @len must be actual maximum length (even number) + 1. 851 * 852 * LOCKING: 853 * caller. 854 */ 855 void ata_id_c_string(const u16 *id, unsigned char *s, 856 unsigned int ofs, unsigned int len) 857 { 858 unsigned char *p; 859 860 WARN_ON(!(len & 1)); 861 862 ata_id_string(id, s, ofs, len - 1); 863 864 p = s + strnlen(s, len - 1); 865 while (p > s && p[-1] == ' ') 866 p--; 867 *p = '\0'; 868 } 869 870 static u64 ata_id_n_sectors(const u16 *id) 871 { 872 if (ata_id_has_lba(id)) { 873 if (ata_id_has_lba48(id)) 874 return ata_id_u64(id, 100); 875 else 876 return ata_id_u32(id, 60); 877 } else { 878 if (ata_id_current_chs_valid(id)) 879 return ata_id_u32(id, 57); 880 else 881 return id[1] * id[3] * id[6]; 882 } 883 } 884 885 /** 886 * ata_noop_dev_select - Select device 0/1 on ATA bus 887 * @ap: ATA channel to manipulate 888 * @device: ATA device (numbered from zero) to select 889 * 890 * This function performs no actual function. 891 * 892 * May be used as the dev_select() entry in ata_port_operations. 893 * 894 * LOCKING: 895 * caller. 896 */ 897 void ata_noop_dev_select (struct ata_port *ap, unsigned int device) 898 { 899 } 900 901 902 /** 903 * ata_std_dev_select - Select device 0/1 on ATA bus 904 * @ap: ATA channel to manipulate 905 * @device: ATA device (numbered from zero) to select 906 * 907 * Use the method defined in the ATA specification to 908 * make either device 0, or device 1, active on the 909 * ATA channel. Works with both PIO and MMIO. 910 * 911 * May be used as the dev_select() entry in ata_port_operations. 912 * 913 * LOCKING: 914 * caller. 915 */ 916 917 void ata_std_dev_select (struct ata_port *ap, unsigned int device) 918 { 919 u8 tmp; 920 921 if (device == 0) 922 tmp = ATA_DEVICE_OBS; 923 else 924 tmp = ATA_DEVICE_OBS | ATA_DEV1; 925 926 if (ap->flags & ATA_FLAG_MMIO) { 927 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr); 928 } else { 929 outb(tmp, ap->ioaddr.device_addr); 930 } 931 ata_pause(ap); /* needed; also flushes, for mmio */ 932 } 933 934 /** 935 * ata_dev_select - Select device 0/1 on ATA bus 936 * @ap: ATA channel to manipulate 937 * @device: ATA device (numbered from zero) to select 938 * @wait: non-zero to wait for Status register BSY bit to clear 939 * @can_sleep: non-zero if context allows sleeping 940 * 941 * Use the method defined in the ATA specification to 942 * make either device 0, or device 1, active on the 943 * ATA channel. 944 * 945 * This is a high-level version of ata_std_dev_select(), 946 * which additionally provides the services of inserting 947 * the proper pauses and status polling, where needed. 948 * 949 * LOCKING: 950 * caller. 951 */ 952 953 void ata_dev_select(struct ata_port *ap, unsigned int device, 954 unsigned int wait, unsigned int can_sleep) 955 { 956 if (ata_msg_probe(ap)) 957 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, ata%u: " 958 "device %u, wait %u\n", ap->id, device, wait); 959 960 if (wait) 961 ata_wait_idle(ap); 962 963 ap->ops->dev_select(ap, device); 964 965 if (wait) { 966 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI) 967 msleep(150); 968 ata_wait_idle(ap); 969 } 970 } 971 972 /** 973 * ata_dump_id - IDENTIFY DEVICE info debugging output 974 * @id: IDENTIFY DEVICE page to dump 975 * 976 * Dump selected 16-bit words from the given IDENTIFY DEVICE 977 * page. 978 * 979 * LOCKING: 980 * caller. 981 */ 982 983 static inline void ata_dump_id(const u16 *id) 984 { 985 DPRINTK("49==0x%04x " 986 "53==0x%04x " 987 "63==0x%04x " 988 "64==0x%04x " 989 "75==0x%04x \n", 990 id[49], 991 id[53], 992 id[63], 993 id[64], 994 id[75]); 995 DPRINTK("80==0x%04x " 996 "81==0x%04x " 997 "82==0x%04x " 998 "83==0x%04x " 999 "84==0x%04x \n", 1000 id[80], 1001 id[81], 1002 id[82], 1003 id[83], 1004 id[84]); 1005 DPRINTK("88==0x%04x " 1006 "93==0x%04x\n", 1007 id[88], 1008 id[93]); 1009 } 1010 1011 /** 1012 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data 1013 * @id: IDENTIFY data to compute xfer mask from 1014 * 1015 * Compute the xfermask for this device. This is not as trivial 1016 * as it seems if we must consider early devices correctly. 1017 * 1018 * FIXME: pre IDE drive timing (do we care ?). 1019 * 1020 * LOCKING: 1021 * None. 1022 * 1023 * RETURNS: 1024 * Computed xfermask 1025 */ 1026 static unsigned int ata_id_xfermask(const u16 *id) 1027 { 1028 unsigned int pio_mask, mwdma_mask, udma_mask; 1029 1030 /* Usual case. Word 53 indicates word 64 is valid */ 1031 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) { 1032 pio_mask = id[ATA_ID_PIO_MODES] & 0x03; 1033 pio_mask <<= 3; 1034 pio_mask |= 0x7; 1035 } else { 1036 /* If word 64 isn't valid then Word 51 high byte holds 1037 * the PIO timing number for the maximum. Turn it into 1038 * a mask. 1039 */ 1040 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF; 1041 if (mode < 5) /* Valid PIO range */ 1042 pio_mask = (2 << mode) - 1; 1043 else 1044 pio_mask = 1; 1045 1046 /* But wait.. there's more. Design your standards by 1047 * committee and you too can get a free iordy field to 1048 * process. However its the speeds not the modes that 1049 * are supported... Note drivers using the timing API 1050 * will get this right anyway 1051 */ 1052 } 1053 1054 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07; 1055 1056 if (ata_id_is_cfa(id)) { 1057 /* 1058 * Process compact flash extended modes 1059 */ 1060 int pio = id[163] & 0x7; 1061 int dma = (id[163] >> 3) & 7; 1062 1063 if (pio) 1064 pio_mask |= (1 << 5); 1065 if (pio > 1) 1066 pio_mask |= (1 << 6); 1067 if (dma) 1068 mwdma_mask |= (1 << 3); 1069 if (dma > 1) 1070 mwdma_mask |= (1 << 4); 1071 } 1072 1073 udma_mask = 0; 1074 if (id[ATA_ID_FIELD_VALID] & (1 << 2)) 1075 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff; 1076 1077 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); 1078 } 1079 1080 /** 1081 * ata_port_queue_task - Queue port_task 1082 * @ap: The ata_port to queue port_task for 1083 * @fn: workqueue function to be scheduled 1084 * @data: data for @fn to use 1085 * @delay: delay time for workqueue function 1086 * 1087 * Schedule @fn(@data) for execution after @delay jiffies using 1088 * port_task. There is one port_task per port and it's the 1089 * user(low level driver)'s responsibility to make sure that only 1090 * one task is active at any given time. 1091 * 1092 * libata core layer takes care of synchronization between 1093 * port_task and EH. ata_port_queue_task() may be ignored for EH 1094 * synchronization. 1095 * 1096 * LOCKING: 1097 * Inherited from caller. 1098 */ 1099 void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data, 1100 unsigned long delay) 1101 { 1102 int rc; 1103 1104 if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK) 1105 return; 1106 1107 PREPARE_DELAYED_WORK(&ap->port_task, fn); 1108 ap->port_task_data = data; 1109 1110 rc = queue_delayed_work(ata_wq, &ap->port_task, delay); 1111 1112 /* rc == 0 means that another user is using port task */ 1113 WARN_ON(rc == 0); 1114 } 1115 1116 /** 1117 * ata_port_flush_task - Flush port_task 1118 * @ap: The ata_port to flush port_task for 1119 * 1120 * After this function completes, port_task is guranteed not to 1121 * be running or scheduled. 1122 * 1123 * LOCKING: 1124 * Kernel thread context (may sleep) 1125 */ 1126 void ata_port_flush_task(struct ata_port *ap) 1127 { 1128 unsigned long flags; 1129 1130 DPRINTK("ENTER\n"); 1131 1132 spin_lock_irqsave(ap->lock, flags); 1133 ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK; 1134 spin_unlock_irqrestore(ap->lock, flags); 1135 1136 DPRINTK("flush #1\n"); 1137 flush_workqueue(ata_wq); 1138 1139 /* 1140 * At this point, if a task is running, it's guaranteed to see 1141 * the FLUSH flag; thus, it will never queue pio tasks again. 1142 * Cancel and flush. 1143 */ 1144 if (!cancel_delayed_work(&ap->port_task)) { 1145 if (ata_msg_ctl(ap)) 1146 ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n", 1147 __FUNCTION__); 1148 flush_workqueue(ata_wq); 1149 } 1150 1151 spin_lock_irqsave(ap->lock, flags); 1152 ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK; 1153 spin_unlock_irqrestore(ap->lock, flags); 1154 1155 if (ata_msg_ctl(ap)) 1156 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__); 1157 } 1158 1159 void ata_qc_complete_internal(struct ata_queued_cmd *qc) 1160 { 1161 struct completion *waiting = qc->private_data; 1162 1163 complete(waiting); 1164 } 1165 1166 /** 1167 * ata_exec_internal_sg - execute libata internal command 1168 * @dev: Device to which the command is sent 1169 * @tf: Taskfile registers for the command and the result 1170 * @cdb: CDB for packet command 1171 * @dma_dir: Data tranfer direction of the command 1172 * @sg: sg list for the data buffer of the command 1173 * @n_elem: Number of sg entries 1174 * 1175 * Executes libata internal command with timeout. @tf contains 1176 * command on entry and result on return. Timeout and error 1177 * conditions are reported via return value. No recovery action 1178 * is taken after a command times out. It's caller's duty to 1179 * clean up after timeout. 1180 * 1181 * LOCKING: 1182 * None. Should be called with kernel context, might sleep. 1183 * 1184 * RETURNS: 1185 * Zero on success, AC_ERR_* mask on failure 1186 */ 1187 unsigned ata_exec_internal_sg(struct ata_device *dev, 1188 struct ata_taskfile *tf, const u8 *cdb, 1189 int dma_dir, struct scatterlist *sg, 1190 unsigned int n_elem) 1191 { 1192 struct ata_port *ap = dev->ap; 1193 u8 command = tf->command; 1194 struct ata_queued_cmd *qc; 1195 unsigned int tag, preempted_tag; 1196 u32 preempted_sactive, preempted_qc_active; 1197 DECLARE_COMPLETION_ONSTACK(wait); 1198 unsigned long flags; 1199 unsigned int err_mask; 1200 int rc; 1201 1202 spin_lock_irqsave(ap->lock, flags); 1203 1204 /* no internal command while frozen */ 1205 if (ap->pflags & ATA_PFLAG_FROZEN) { 1206 spin_unlock_irqrestore(ap->lock, flags); 1207 return AC_ERR_SYSTEM; 1208 } 1209 1210 /* initialize internal qc */ 1211 1212 /* XXX: Tag 0 is used for drivers with legacy EH as some 1213 * drivers choke if any other tag is given. This breaks 1214 * ata_tag_internal() test for those drivers. Don't use new 1215 * EH stuff without converting to it. 1216 */ 1217 if (ap->ops->error_handler) 1218 tag = ATA_TAG_INTERNAL; 1219 else 1220 tag = 0; 1221 1222 if (test_and_set_bit(tag, &ap->qc_allocated)) 1223 BUG(); 1224 qc = __ata_qc_from_tag(ap, tag); 1225 1226 qc->tag = tag; 1227 qc->scsicmd = NULL; 1228 qc->ap = ap; 1229 qc->dev = dev; 1230 ata_qc_reinit(qc); 1231 1232 preempted_tag = ap->active_tag; 1233 preempted_sactive = ap->sactive; 1234 preempted_qc_active = ap->qc_active; 1235 ap->active_tag = ATA_TAG_POISON; 1236 ap->sactive = 0; 1237 ap->qc_active = 0; 1238 1239 /* prepare & issue qc */ 1240 qc->tf = *tf; 1241 if (cdb) 1242 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN); 1243 qc->flags |= ATA_QCFLAG_RESULT_TF; 1244 qc->dma_dir = dma_dir; 1245 if (dma_dir != DMA_NONE) { 1246 unsigned int i, buflen = 0; 1247 1248 for (i = 0; i < n_elem; i++) 1249 buflen += sg[i].length; 1250 1251 ata_sg_init(qc, sg, n_elem); 1252 qc->nsect = buflen / ATA_SECT_SIZE; 1253 qc->nbytes = buflen; 1254 } 1255 1256 qc->private_data = &wait; 1257 qc->complete_fn = ata_qc_complete_internal; 1258 1259 ata_qc_issue(qc); 1260 1261 spin_unlock_irqrestore(ap->lock, flags); 1262 1263 rc = wait_for_completion_timeout(&wait, ata_probe_timeout); 1264 1265 ata_port_flush_task(ap); 1266 1267 if (!rc) { 1268 spin_lock_irqsave(ap->lock, flags); 1269 1270 /* We're racing with irq here. If we lose, the 1271 * following test prevents us from completing the qc 1272 * twice. If we win, the port is frozen and will be 1273 * cleaned up by ->post_internal_cmd(). 1274 */ 1275 if (qc->flags & ATA_QCFLAG_ACTIVE) { 1276 qc->err_mask |= AC_ERR_TIMEOUT; 1277 1278 if (ap->ops->error_handler) 1279 ata_port_freeze(ap); 1280 else 1281 ata_qc_complete(qc); 1282 1283 if (ata_msg_warn(ap)) 1284 ata_dev_printk(dev, KERN_WARNING, 1285 "qc timeout (cmd 0x%x)\n", command); 1286 } 1287 1288 spin_unlock_irqrestore(ap->lock, flags); 1289 } 1290 1291 /* do post_internal_cmd */ 1292 if (ap->ops->post_internal_cmd) 1293 ap->ops->post_internal_cmd(qc); 1294 1295 if (qc->flags & ATA_QCFLAG_FAILED && !qc->err_mask) { 1296 if (ata_msg_warn(ap)) 1297 ata_dev_printk(dev, KERN_WARNING, 1298 "zero err_mask for failed " 1299 "internal command, assuming AC_ERR_OTHER\n"); 1300 qc->err_mask |= AC_ERR_OTHER; 1301 } 1302 1303 /* finish up */ 1304 spin_lock_irqsave(ap->lock, flags); 1305 1306 *tf = qc->result_tf; 1307 err_mask = qc->err_mask; 1308 1309 ata_qc_free(qc); 1310 ap->active_tag = preempted_tag; 1311 ap->sactive = preempted_sactive; 1312 ap->qc_active = preempted_qc_active; 1313 1314 /* XXX - Some LLDDs (sata_mv) disable port on command failure. 1315 * Until those drivers are fixed, we detect the condition 1316 * here, fail the command with AC_ERR_SYSTEM and reenable the 1317 * port. 1318 * 1319 * Note that this doesn't change any behavior as internal 1320 * command failure results in disabling the device in the 1321 * higher layer for LLDDs without new reset/EH callbacks. 1322 * 1323 * Kill the following code as soon as those drivers are fixed. 1324 */ 1325 if (ap->flags & ATA_FLAG_DISABLED) { 1326 err_mask |= AC_ERR_SYSTEM; 1327 ata_port_probe(ap); 1328 } 1329 1330 spin_unlock_irqrestore(ap->lock, flags); 1331 1332 return err_mask; 1333 } 1334 1335 /** 1336 * ata_exec_internal - execute libata internal command 1337 * @dev: Device to which the command is sent 1338 * @tf: Taskfile registers for the command and the result 1339 * @cdb: CDB for packet command 1340 * @dma_dir: Data tranfer direction of the command 1341 * @buf: Data buffer of the command 1342 * @buflen: Length of data buffer 1343 * 1344 * Wrapper around ata_exec_internal_sg() which takes simple 1345 * buffer instead of sg list. 1346 * 1347 * LOCKING: 1348 * None. Should be called with kernel context, might sleep. 1349 * 1350 * RETURNS: 1351 * Zero on success, AC_ERR_* mask on failure 1352 */ 1353 unsigned ata_exec_internal(struct ata_device *dev, 1354 struct ata_taskfile *tf, const u8 *cdb, 1355 int dma_dir, void *buf, unsigned int buflen) 1356 { 1357 struct scatterlist *psg = NULL, sg; 1358 unsigned int n_elem = 0; 1359 1360 if (dma_dir != DMA_NONE) { 1361 WARN_ON(!buf); 1362 sg_init_one(&sg, buf, buflen); 1363 psg = &sg; 1364 n_elem++; 1365 } 1366 1367 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem); 1368 } 1369 1370 /** 1371 * ata_do_simple_cmd - execute simple internal command 1372 * @dev: Device to which the command is sent 1373 * @cmd: Opcode to execute 1374 * 1375 * Execute a 'simple' command, that only consists of the opcode 1376 * 'cmd' itself, without filling any other registers 1377 * 1378 * LOCKING: 1379 * Kernel thread context (may sleep). 1380 * 1381 * RETURNS: 1382 * Zero on success, AC_ERR_* mask on failure 1383 */ 1384 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd) 1385 { 1386 struct ata_taskfile tf; 1387 1388 ata_tf_init(dev, &tf); 1389 1390 tf.command = cmd; 1391 tf.flags |= ATA_TFLAG_DEVICE; 1392 tf.protocol = ATA_PROT_NODATA; 1393 1394 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); 1395 } 1396 1397 /** 1398 * ata_pio_need_iordy - check if iordy needed 1399 * @adev: ATA device 1400 * 1401 * Check if the current speed of the device requires IORDY. Used 1402 * by various controllers for chip configuration. 1403 */ 1404 1405 unsigned int ata_pio_need_iordy(const struct ata_device *adev) 1406 { 1407 int pio; 1408 int speed = adev->pio_mode - XFER_PIO_0; 1409 1410 if (speed < 2) 1411 return 0; 1412 if (speed > 2) 1413 return 1; 1414 1415 /* If we have no drive specific rule, then PIO 2 is non IORDY */ 1416 1417 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */ 1418 pio = adev->id[ATA_ID_EIDE_PIO]; 1419 /* Is the speed faster than the drive allows non IORDY ? */ 1420 if (pio) { 1421 /* This is cycle times not frequency - watch the logic! */ 1422 if (pio > 240) /* PIO2 is 240nS per cycle */ 1423 return 1; 1424 return 0; 1425 } 1426 } 1427 return 0; 1428 } 1429 1430 /** 1431 * ata_dev_read_id - Read ID data from the specified device 1432 * @dev: target device 1433 * @p_class: pointer to class of the target device (may be changed) 1434 * @flags: ATA_READID_* flags 1435 * @id: buffer to read IDENTIFY data into 1436 * 1437 * Read ID data from the specified device. ATA_CMD_ID_ATA is 1438 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI 1439 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS 1440 * for pre-ATA4 drives. 1441 * 1442 * LOCKING: 1443 * Kernel thread context (may sleep) 1444 * 1445 * RETURNS: 1446 * 0 on success, -errno otherwise. 1447 */ 1448 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class, 1449 unsigned int flags, u16 *id) 1450 { 1451 struct ata_port *ap = dev->ap; 1452 unsigned int class = *p_class; 1453 struct ata_taskfile tf; 1454 unsigned int err_mask = 0; 1455 const char *reason; 1456 int rc; 1457 1458 if (ata_msg_ctl(ap)) 1459 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n", 1460 __FUNCTION__, ap->id, dev->devno); 1461 1462 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */ 1463 1464 retry: 1465 ata_tf_init(dev, &tf); 1466 1467 switch (class) { 1468 case ATA_DEV_ATA: 1469 tf.command = ATA_CMD_ID_ATA; 1470 break; 1471 case ATA_DEV_ATAPI: 1472 tf.command = ATA_CMD_ID_ATAPI; 1473 break; 1474 default: 1475 rc = -ENODEV; 1476 reason = "unsupported class"; 1477 goto err_out; 1478 } 1479 1480 tf.protocol = ATA_PROT_PIO; 1481 tf.flags |= ATA_TFLAG_POLLING; /* for polling presence detection */ 1482 1483 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE, 1484 id, sizeof(id[0]) * ATA_ID_WORDS); 1485 if (err_mask) { 1486 if (err_mask & AC_ERR_NODEV_HINT) { 1487 DPRINTK("ata%u.%d: NODEV after polling detection\n", 1488 ap->id, dev->devno); 1489 return -ENOENT; 1490 } 1491 1492 rc = -EIO; 1493 reason = "I/O error"; 1494 goto err_out; 1495 } 1496 1497 swap_buf_le16(id, ATA_ID_WORDS); 1498 1499 /* sanity check */ 1500 rc = -EINVAL; 1501 reason = "device reports illegal type"; 1502 1503 if (class == ATA_DEV_ATA) { 1504 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id)) 1505 goto err_out; 1506 } else { 1507 if (ata_id_is_ata(id)) 1508 goto err_out; 1509 } 1510 1511 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) { 1512 /* 1513 * The exact sequence expected by certain pre-ATA4 drives is: 1514 * SRST RESET 1515 * IDENTIFY 1516 * INITIALIZE DEVICE PARAMETERS 1517 * anything else.. 1518 * Some drives were very specific about that exact sequence. 1519 */ 1520 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) { 1521 err_mask = ata_dev_init_params(dev, id[3], id[6]); 1522 if (err_mask) { 1523 rc = -EIO; 1524 reason = "INIT_DEV_PARAMS failed"; 1525 goto err_out; 1526 } 1527 1528 /* current CHS translation info (id[53-58]) might be 1529 * changed. reread the identify device info. 1530 */ 1531 flags &= ~ATA_READID_POSTRESET; 1532 goto retry; 1533 } 1534 } 1535 1536 *p_class = class; 1537 1538 return 0; 1539 1540 err_out: 1541 if (ata_msg_warn(ap)) 1542 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY " 1543 "(%s, err_mask=0x%x)\n", reason, err_mask); 1544 return rc; 1545 } 1546 1547 static inline u8 ata_dev_knobble(struct ata_device *dev) 1548 { 1549 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id))); 1550 } 1551 1552 static void ata_dev_config_ncq(struct ata_device *dev, 1553 char *desc, size_t desc_sz) 1554 { 1555 struct ata_port *ap = dev->ap; 1556 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id); 1557 1558 if (!ata_id_has_ncq(dev->id)) { 1559 desc[0] = '\0'; 1560 return; 1561 } 1562 if (ata_device_blacklisted(dev) & ATA_HORKAGE_NONCQ) { 1563 snprintf(desc, desc_sz, "NCQ (not used)"); 1564 return; 1565 } 1566 if (ap->flags & ATA_FLAG_NCQ) { 1567 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1); 1568 dev->flags |= ATA_DFLAG_NCQ; 1569 } 1570 1571 if (hdepth >= ddepth) 1572 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth); 1573 else 1574 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth); 1575 } 1576 1577 static void ata_set_port_max_cmd_len(struct ata_port *ap) 1578 { 1579 int i; 1580 1581 if (ap->scsi_host) { 1582 unsigned int len = 0; 1583 1584 for (i = 0; i < ATA_MAX_DEVICES; i++) 1585 len = max(len, ap->device[i].cdb_len); 1586 1587 ap->scsi_host->max_cmd_len = len; 1588 } 1589 } 1590 1591 /** 1592 * ata_dev_configure - Configure the specified ATA/ATAPI device 1593 * @dev: Target device to configure 1594 * 1595 * Configure @dev according to @dev->id. Generic and low-level 1596 * driver specific fixups are also applied. 1597 * 1598 * LOCKING: 1599 * Kernel thread context (may sleep) 1600 * 1601 * RETURNS: 1602 * 0 on success, -errno otherwise 1603 */ 1604 int ata_dev_configure(struct ata_device *dev) 1605 { 1606 struct ata_port *ap = dev->ap; 1607 int print_info = ap->eh_context.i.flags & ATA_EHI_PRINTINFO; 1608 const u16 *id = dev->id; 1609 unsigned int xfer_mask; 1610 char revbuf[7]; /* XYZ-99\0 */ 1611 int rc; 1612 1613 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) { 1614 ata_dev_printk(dev, KERN_INFO, 1615 "%s: ENTER/EXIT (host %u, dev %u) -- nodev\n", 1616 __FUNCTION__, ap->id, dev->devno); 1617 return 0; 1618 } 1619 1620 if (ata_msg_probe(ap)) 1621 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n", 1622 __FUNCTION__, ap->id, dev->devno); 1623 1624 /* print device capabilities */ 1625 if (ata_msg_probe(ap)) 1626 ata_dev_printk(dev, KERN_DEBUG, 1627 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x " 1628 "85:%04x 86:%04x 87:%04x 88:%04x\n", 1629 __FUNCTION__, 1630 id[49], id[82], id[83], id[84], 1631 id[85], id[86], id[87], id[88]); 1632 1633 /* initialize to-be-configured parameters */ 1634 dev->flags &= ~ATA_DFLAG_CFG_MASK; 1635 dev->max_sectors = 0; 1636 dev->cdb_len = 0; 1637 dev->n_sectors = 0; 1638 dev->cylinders = 0; 1639 dev->heads = 0; 1640 dev->sectors = 0; 1641 1642 /* 1643 * common ATA, ATAPI feature tests 1644 */ 1645 1646 /* find max transfer mode; for printk only */ 1647 xfer_mask = ata_id_xfermask(id); 1648 1649 if (ata_msg_probe(ap)) 1650 ata_dump_id(id); 1651 1652 /* ATA-specific feature tests */ 1653 if (dev->class == ATA_DEV_ATA) { 1654 if (ata_id_is_cfa(id)) { 1655 if (id[162] & 1) /* CPRM may make this media unusable */ 1656 ata_dev_printk(dev, KERN_WARNING, "ata%u: device %u supports DRM functions and may not be fully accessable.\n", 1657 ap->id, dev->devno); 1658 snprintf(revbuf, 7, "CFA"); 1659 } 1660 else 1661 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id)); 1662 1663 dev->n_sectors = ata_id_n_sectors(id); 1664 1665 if (ata_id_has_lba(id)) { 1666 const char *lba_desc; 1667 char ncq_desc[20]; 1668 1669 lba_desc = "LBA"; 1670 dev->flags |= ATA_DFLAG_LBA; 1671 if (ata_id_has_lba48(id)) { 1672 dev->flags |= ATA_DFLAG_LBA48; 1673 lba_desc = "LBA48"; 1674 1675 if (dev->n_sectors >= (1UL << 28) && 1676 ata_id_has_flush_ext(id)) 1677 dev->flags |= ATA_DFLAG_FLUSH_EXT; 1678 } 1679 1680 /* config NCQ */ 1681 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc)); 1682 1683 /* print device info to dmesg */ 1684 if (ata_msg_drv(ap) && print_info) 1685 ata_dev_printk(dev, KERN_INFO, "%s, " 1686 "max %s, %Lu sectors: %s %s\n", 1687 revbuf, 1688 ata_mode_string(xfer_mask), 1689 (unsigned long long)dev->n_sectors, 1690 lba_desc, ncq_desc); 1691 } else { 1692 /* CHS */ 1693 1694 /* Default translation */ 1695 dev->cylinders = id[1]; 1696 dev->heads = id[3]; 1697 dev->sectors = id[6]; 1698 1699 if (ata_id_current_chs_valid(id)) { 1700 /* Current CHS translation is valid. */ 1701 dev->cylinders = id[54]; 1702 dev->heads = id[55]; 1703 dev->sectors = id[56]; 1704 } 1705 1706 /* print device info to dmesg */ 1707 if (ata_msg_drv(ap) && print_info) 1708 ata_dev_printk(dev, KERN_INFO, "%s, " 1709 "max %s, %Lu sectors: CHS %u/%u/%u\n", 1710 revbuf, 1711 ata_mode_string(xfer_mask), 1712 (unsigned long long)dev->n_sectors, 1713 dev->cylinders, dev->heads, 1714 dev->sectors); 1715 } 1716 1717 if (dev->id[59] & 0x100) { 1718 dev->multi_count = dev->id[59] & 0xff; 1719 if (ata_msg_drv(ap) && print_info) 1720 ata_dev_printk(dev, KERN_INFO, 1721 "ata%u: dev %u multi count %u\n", 1722 ap->id, dev->devno, dev->multi_count); 1723 } 1724 1725 dev->cdb_len = 16; 1726 } 1727 1728 /* ATAPI-specific feature tests */ 1729 else if (dev->class == ATA_DEV_ATAPI) { 1730 char *cdb_intr_string = ""; 1731 1732 rc = atapi_cdb_len(id); 1733 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { 1734 if (ata_msg_warn(ap)) 1735 ata_dev_printk(dev, KERN_WARNING, 1736 "unsupported CDB len\n"); 1737 rc = -EINVAL; 1738 goto err_out_nosup; 1739 } 1740 dev->cdb_len = (unsigned int) rc; 1741 1742 if (ata_id_cdb_intr(dev->id)) { 1743 dev->flags |= ATA_DFLAG_CDB_INTR; 1744 cdb_intr_string = ", CDB intr"; 1745 } 1746 1747 /* print device info to dmesg */ 1748 if (ata_msg_drv(ap) && print_info) 1749 ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n", 1750 ata_mode_string(xfer_mask), 1751 cdb_intr_string); 1752 } 1753 1754 /* determine max_sectors */ 1755 dev->max_sectors = ATA_MAX_SECTORS; 1756 if (dev->flags & ATA_DFLAG_LBA48) 1757 dev->max_sectors = ATA_MAX_SECTORS_LBA48; 1758 1759 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) { 1760 /* Let the user know. We don't want to disallow opens for 1761 rescue purposes, or in case the vendor is just a blithering 1762 idiot */ 1763 if (print_info) { 1764 ata_dev_printk(dev, KERN_WARNING, 1765 "Drive reports diagnostics failure. This may indicate a drive\n"); 1766 ata_dev_printk(dev, KERN_WARNING, 1767 "fault or invalid emulation. Contact drive vendor for information.\n"); 1768 } 1769 } 1770 1771 ata_set_port_max_cmd_len(ap); 1772 1773 /* limit bridge transfers to udma5, 200 sectors */ 1774 if (ata_dev_knobble(dev)) { 1775 if (ata_msg_drv(ap) && print_info) 1776 ata_dev_printk(dev, KERN_INFO, 1777 "applying bridge limits\n"); 1778 dev->udma_mask &= ATA_UDMA5; 1779 dev->max_sectors = ATA_MAX_SECTORS; 1780 } 1781 1782 if (ap->ops->dev_config) 1783 ap->ops->dev_config(ap, dev); 1784 1785 if (ata_msg_probe(ap)) 1786 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n", 1787 __FUNCTION__, ata_chk_status(ap)); 1788 return 0; 1789 1790 err_out_nosup: 1791 if (ata_msg_probe(ap)) 1792 ata_dev_printk(dev, KERN_DEBUG, 1793 "%s: EXIT, err\n", __FUNCTION__); 1794 return rc; 1795 } 1796 1797 /** 1798 * ata_bus_probe - Reset and probe ATA bus 1799 * @ap: Bus to probe 1800 * 1801 * Master ATA bus probing function. Initiates a hardware-dependent 1802 * bus reset, then attempts to identify any devices found on 1803 * the bus. 1804 * 1805 * LOCKING: 1806 * PCI/etc. bus probe sem. 1807 * 1808 * RETURNS: 1809 * Zero on success, negative errno otherwise. 1810 */ 1811 1812 int ata_bus_probe(struct ata_port *ap) 1813 { 1814 unsigned int classes[ATA_MAX_DEVICES]; 1815 int tries[ATA_MAX_DEVICES]; 1816 int i, rc, down_xfermask; 1817 struct ata_device *dev; 1818 1819 ata_port_probe(ap); 1820 1821 for (i = 0; i < ATA_MAX_DEVICES; i++) 1822 tries[i] = ATA_PROBE_MAX_TRIES; 1823 1824 retry: 1825 down_xfermask = 0; 1826 1827 /* reset and determine device classes */ 1828 ap->ops->phy_reset(ap); 1829 1830 for (i = 0; i < ATA_MAX_DEVICES; i++) { 1831 dev = &ap->device[i]; 1832 1833 if (!(ap->flags & ATA_FLAG_DISABLED) && 1834 dev->class != ATA_DEV_UNKNOWN) 1835 classes[dev->devno] = dev->class; 1836 else 1837 classes[dev->devno] = ATA_DEV_NONE; 1838 1839 dev->class = ATA_DEV_UNKNOWN; 1840 } 1841 1842 ata_port_probe(ap); 1843 1844 /* after the reset the device state is PIO 0 and the controller 1845 state is undefined. Record the mode */ 1846 1847 for (i = 0; i < ATA_MAX_DEVICES; i++) 1848 ap->device[i].pio_mode = XFER_PIO_0; 1849 1850 /* read IDENTIFY page and configure devices */ 1851 for (i = 0; i < ATA_MAX_DEVICES; i++) { 1852 dev = &ap->device[i]; 1853 1854 if (tries[i]) 1855 dev->class = classes[i]; 1856 1857 if (!ata_dev_enabled(dev)) 1858 continue; 1859 1860 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET, 1861 dev->id); 1862 if (rc) 1863 goto fail; 1864 1865 ap->eh_context.i.flags |= ATA_EHI_PRINTINFO; 1866 rc = ata_dev_configure(dev); 1867 ap->eh_context.i.flags &= ~ATA_EHI_PRINTINFO; 1868 if (rc) 1869 goto fail; 1870 } 1871 1872 /* configure transfer mode */ 1873 rc = ata_set_mode(ap, &dev); 1874 if (rc) { 1875 down_xfermask = 1; 1876 goto fail; 1877 } 1878 1879 for (i = 0; i < ATA_MAX_DEVICES; i++) 1880 if (ata_dev_enabled(&ap->device[i])) 1881 return 0; 1882 1883 /* no device present, disable port */ 1884 ata_port_disable(ap); 1885 ap->ops->port_disable(ap); 1886 return -ENODEV; 1887 1888 fail: 1889 switch (rc) { 1890 case -EINVAL: 1891 case -ENODEV: 1892 tries[dev->devno] = 0; 1893 break; 1894 case -EIO: 1895 sata_down_spd_limit(ap); 1896 /* fall through */ 1897 default: 1898 tries[dev->devno]--; 1899 if (down_xfermask && 1900 ata_down_xfermask_limit(dev, tries[dev->devno] == 1)) 1901 tries[dev->devno] = 0; 1902 } 1903 1904 if (!tries[dev->devno]) { 1905 ata_down_xfermask_limit(dev, 1); 1906 ata_dev_disable(dev); 1907 } 1908 1909 goto retry; 1910 } 1911 1912 /** 1913 * ata_port_probe - Mark port as enabled 1914 * @ap: Port for which we indicate enablement 1915 * 1916 * Modify @ap data structure such that the system 1917 * thinks that the entire port is enabled. 1918 * 1919 * LOCKING: host lock, or some other form of 1920 * serialization. 1921 */ 1922 1923 void ata_port_probe(struct ata_port *ap) 1924 { 1925 ap->flags &= ~ATA_FLAG_DISABLED; 1926 } 1927 1928 /** 1929 * sata_print_link_status - Print SATA link status 1930 * @ap: SATA port to printk link status about 1931 * 1932 * This function prints link speed and status of a SATA link. 1933 * 1934 * LOCKING: 1935 * None. 1936 */ 1937 static void sata_print_link_status(struct ata_port *ap) 1938 { 1939 u32 sstatus, scontrol, tmp; 1940 1941 if (sata_scr_read(ap, SCR_STATUS, &sstatus)) 1942 return; 1943 sata_scr_read(ap, SCR_CONTROL, &scontrol); 1944 1945 if (ata_port_online(ap)) { 1946 tmp = (sstatus >> 4) & 0xf; 1947 ata_port_printk(ap, KERN_INFO, 1948 "SATA link up %s (SStatus %X SControl %X)\n", 1949 sata_spd_string(tmp), sstatus, scontrol); 1950 } else { 1951 ata_port_printk(ap, KERN_INFO, 1952 "SATA link down (SStatus %X SControl %X)\n", 1953 sstatus, scontrol); 1954 } 1955 } 1956 1957 /** 1958 * __sata_phy_reset - Wake/reset a low-level SATA PHY 1959 * @ap: SATA port associated with target SATA PHY. 1960 * 1961 * This function issues commands to standard SATA Sxxx 1962 * PHY registers, to wake up the phy (and device), and 1963 * clear any reset condition. 1964 * 1965 * LOCKING: 1966 * PCI/etc. bus probe sem. 1967 * 1968 */ 1969 void __sata_phy_reset(struct ata_port *ap) 1970 { 1971 u32 sstatus; 1972 unsigned long timeout = jiffies + (HZ * 5); 1973 1974 if (ap->flags & ATA_FLAG_SATA_RESET) { 1975 /* issue phy wake/reset */ 1976 sata_scr_write_flush(ap, SCR_CONTROL, 0x301); 1977 /* Couldn't find anything in SATA I/II specs, but 1978 * AHCI-1.1 10.4.2 says at least 1 ms. */ 1979 mdelay(1); 1980 } 1981 /* phy wake/clear reset */ 1982 sata_scr_write_flush(ap, SCR_CONTROL, 0x300); 1983 1984 /* wait for phy to become ready, if necessary */ 1985 do { 1986 msleep(200); 1987 sata_scr_read(ap, SCR_STATUS, &sstatus); 1988 if ((sstatus & 0xf) != 1) 1989 break; 1990 } while (time_before(jiffies, timeout)); 1991 1992 /* print link status */ 1993 sata_print_link_status(ap); 1994 1995 /* TODO: phy layer with polling, timeouts, etc. */ 1996 if (!ata_port_offline(ap)) 1997 ata_port_probe(ap); 1998 else 1999 ata_port_disable(ap); 2000 2001 if (ap->flags & ATA_FLAG_DISABLED) 2002 return; 2003 2004 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { 2005 ata_port_disable(ap); 2006 return; 2007 } 2008 2009 ap->cbl = ATA_CBL_SATA; 2010 } 2011 2012 /** 2013 * sata_phy_reset - Reset SATA bus. 2014 * @ap: SATA port associated with target SATA PHY. 2015 * 2016 * This function resets the SATA bus, and then probes 2017 * the bus for devices. 2018 * 2019 * LOCKING: 2020 * PCI/etc. bus probe sem. 2021 * 2022 */ 2023 void sata_phy_reset(struct ata_port *ap) 2024 { 2025 __sata_phy_reset(ap); 2026 if (ap->flags & ATA_FLAG_DISABLED) 2027 return; 2028 ata_bus_reset(ap); 2029 } 2030 2031 /** 2032 * ata_dev_pair - return other device on cable 2033 * @adev: device 2034 * 2035 * Obtain the other device on the same cable, or if none is 2036 * present NULL is returned 2037 */ 2038 2039 struct ata_device *ata_dev_pair(struct ata_device *adev) 2040 { 2041 struct ata_port *ap = adev->ap; 2042 struct ata_device *pair = &ap->device[1 - adev->devno]; 2043 if (!ata_dev_enabled(pair)) 2044 return NULL; 2045 return pair; 2046 } 2047 2048 /** 2049 * ata_port_disable - Disable port. 2050 * @ap: Port to be disabled. 2051 * 2052 * Modify @ap data structure such that the system 2053 * thinks that the entire port is disabled, and should 2054 * never attempt to probe or communicate with devices 2055 * on this port. 2056 * 2057 * LOCKING: host lock, or some other form of 2058 * serialization. 2059 */ 2060 2061 void ata_port_disable(struct ata_port *ap) 2062 { 2063 ap->device[0].class = ATA_DEV_NONE; 2064 ap->device[1].class = ATA_DEV_NONE; 2065 ap->flags |= ATA_FLAG_DISABLED; 2066 } 2067 2068 /** 2069 * sata_down_spd_limit - adjust SATA spd limit downward 2070 * @ap: Port to adjust SATA spd limit for 2071 * 2072 * Adjust SATA spd limit of @ap downward. Note that this 2073 * function only adjusts the limit. The change must be applied 2074 * using sata_set_spd(). 2075 * 2076 * LOCKING: 2077 * Inherited from caller. 2078 * 2079 * RETURNS: 2080 * 0 on success, negative errno on failure 2081 */ 2082 int sata_down_spd_limit(struct ata_port *ap) 2083 { 2084 u32 sstatus, spd, mask; 2085 int rc, highbit; 2086 2087 rc = sata_scr_read(ap, SCR_STATUS, &sstatus); 2088 if (rc) 2089 return rc; 2090 2091 mask = ap->sata_spd_limit; 2092 if (mask <= 1) 2093 return -EINVAL; 2094 highbit = fls(mask) - 1; 2095 mask &= ~(1 << highbit); 2096 2097 spd = (sstatus >> 4) & 0xf; 2098 if (spd <= 1) 2099 return -EINVAL; 2100 spd--; 2101 mask &= (1 << spd) - 1; 2102 if (!mask) 2103 return -EINVAL; 2104 2105 ap->sata_spd_limit = mask; 2106 2107 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n", 2108 sata_spd_string(fls(mask))); 2109 2110 return 0; 2111 } 2112 2113 static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol) 2114 { 2115 u32 spd, limit; 2116 2117 if (ap->sata_spd_limit == UINT_MAX) 2118 limit = 0; 2119 else 2120 limit = fls(ap->sata_spd_limit); 2121 2122 spd = (*scontrol >> 4) & 0xf; 2123 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4); 2124 2125 return spd != limit; 2126 } 2127 2128 /** 2129 * sata_set_spd_needed - is SATA spd configuration needed 2130 * @ap: Port in question 2131 * 2132 * Test whether the spd limit in SControl matches 2133 * @ap->sata_spd_limit. This function is used to determine 2134 * whether hardreset is necessary to apply SATA spd 2135 * configuration. 2136 * 2137 * LOCKING: 2138 * Inherited from caller. 2139 * 2140 * RETURNS: 2141 * 1 if SATA spd configuration is needed, 0 otherwise. 2142 */ 2143 int sata_set_spd_needed(struct ata_port *ap) 2144 { 2145 u32 scontrol; 2146 2147 if (sata_scr_read(ap, SCR_CONTROL, &scontrol)) 2148 return 0; 2149 2150 return __sata_set_spd_needed(ap, &scontrol); 2151 } 2152 2153 /** 2154 * sata_set_spd - set SATA spd according to spd limit 2155 * @ap: Port to set SATA spd for 2156 * 2157 * Set SATA spd of @ap according to sata_spd_limit. 2158 * 2159 * LOCKING: 2160 * Inherited from caller. 2161 * 2162 * RETURNS: 2163 * 0 if spd doesn't need to be changed, 1 if spd has been 2164 * changed. Negative errno if SCR registers are inaccessible. 2165 */ 2166 int sata_set_spd(struct ata_port *ap) 2167 { 2168 u32 scontrol; 2169 int rc; 2170 2171 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) 2172 return rc; 2173 2174 if (!__sata_set_spd_needed(ap, &scontrol)) 2175 return 0; 2176 2177 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) 2178 return rc; 2179 2180 return 1; 2181 } 2182 2183 /* 2184 * This mode timing computation functionality is ported over from 2185 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik 2186 */ 2187 /* 2188 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds). 2189 * These were taken from ATA/ATAPI-6 standard, rev 0a, except 2190 * for UDMA6, which is currently supported only by Maxtor drives. 2191 * 2192 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0. 2193 */ 2194 2195 static const struct ata_timing ata_timing[] = { 2196 2197 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 }, 2198 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 }, 2199 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 }, 2200 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 }, 2201 2202 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 }, 2203 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 }, 2204 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 }, 2205 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 }, 2206 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 }, 2207 2208 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */ 2209 2210 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 }, 2211 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 }, 2212 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 }, 2213 2214 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 }, 2215 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 }, 2216 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 }, 2217 2218 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 }, 2219 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 }, 2220 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 }, 2221 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 }, 2222 2223 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 }, 2224 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 }, 2225 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 }, 2226 2227 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */ 2228 2229 { 0xFF } 2230 }; 2231 2232 #define ENOUGH(v,unit) (((v)-1)/(unit)+1) 2233 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0) 2234 2235 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT) 2236 { 2237 q->setup = EZ(t->setup * 1000, T); 2238 q->act8b = EZ(t->act8b * 1000, T); 2239 q->rec8b = EZ(t->rec8b * 1000, T); 2240 q->cyc8b = EZ(t->cyc8b * 1000, T); 2241 q->active = EZ(t->active * 1000, T); 2242 q->recover = EZ(t->recover * 1000, T); 2243 q->cycle = EZ(t->cycle * 1000, T); 2244 q->udma = EZ(t->udma * 1000, UT); 2245 } 2246 2247 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b, 2248 struct ata_timing *m, unsigned int what) 2249 { 2250 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup); 2251 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b); 2252 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b); 2253 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b); 2254 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active); 2255 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover); 2256 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle); 2257 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma); 2258 } 2259 2260 static const struct ata_timing* ata_timing_find_mode(unsigned short speed) 2261 { 2262 const struct ata_timing *t; 2263 2264 for (t = ata_timing; t->mode != speed; t++) 2265 if (t->mode == 0xFF) 2266 return NULL; 2267 return t; 2268 } 2269 2270 int ata_timing_compute(struct ata_device *adev, unsigned short speed, 2271 struct ata_timing *t, int T, int UT) 2272 { 2273 const struct ata_timing *s; 2274 struct ata_timing p; 2275 2276 /* 2277 * Find the mode. 2278 */ 2279 2280 if (!(s = ata_timing_find_mode(speed))) 2281 return -EINVAL; 2282 2283 memcpy(t, s, sizeof(*s)); 2284 2285 /* 2286 * If the drive is an EIDE drive, it can tell us it needs extended 2287 * PIO/MW_DMA cycle timing. 2288 */ 2289 2290 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ 2291 memset(&p, 0, sizeof(p)); 2292 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) { 2293 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO]; 2294 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY]; 2295 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) { 2296 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN]; 2297 } 2298 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B); 2299 } 2300 2301 /* 2302 * Convert the timing to bus clock counts. 2303 */ 2304 2305 ata_timing_quantize(t, t, T, UT); 2306 2307 /* 2308 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, 2309 * S.M.A.R.T * and some other commands. We have to ensure that the 2310 * DMA cycle timing is slower/equal than the fastest PIO timing. 2311 */ 2312 2313 if (speed > XFER_PIO_6) { 2314 ata_timing_compute(adev, adev->pio_mode, &p, T, UT); 2315 ata_timing_merge(&p, t, t, ATA_TIMING_ALL); 2316 } 2317 2318 /* 2319 * Lengthen active & recovery time so that cycle time is correct. 2320 */ 2321 2322 if (t->act8b + t->rec8b < t->cyc8b) { 2323 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; 2324 t->rec8b = t->cyc8b - t->act8b; 2325 } 2326 2327 if (t->active + t->recover < t->cycle) { 2328 t->active += (t->cycle - (t->active + t->recover)) / 2; 2329 t->recover = t->cycle - t->active; 2330 } 2331 2332 return 0; 2333 } 2334 2335 /** 2336 * ata_down_xfermask_limit - adjust dev xfer masks downward 2337 * @dev: Device to adjust xfer masks 2338 * @force_pio0: Force PIO0 2339 * 2340 * Adjust xfer masks of @dev downward. Note that this function 2341 * does not apply the change. Invoking ata_set_mode() afterwards 2342 * will apply the limit. 2343 * 2344 * LOCKING: 2345 * Inherited from caller. 2346 * 2347 * RETURNS: 2348 * 0 on success, negative errno on failure 2349 */ 2350 int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0) 2351 { 2352 unsigned long xfer_mask; 2353 int highbit; 2354 2355 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask, 2356 dev->udma_mask); 2357 2358 if (!xfer_mask) 2359 goto fail; 2360 /* don't gear down to MWDMA from UDMA, go directly to PIO */ 2361 if (xfer_mask & ATA_MASK_UDMA) 2362 xfer_mask &= ~ATA_MASK_MWDMA; 2363 2364 highbit = fls(xfer_mask) - 1; 2365 xfer_mask &= ~(1 << highbit); 2366 if (force_pio0) 2367 xfer_mask &= 1 << ATA_SHIFT_PIO; 2368 if (!xfer_mask) 2369 goto fail; 2370 2371 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask, 2372 &dev->udma_mask); 2373 2374 ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n", 2375 ata_mode_string(xfer_mask)); 2376 2377 return 0; 2378 2379 fail: 2380 return -EINVAL; 2381 } 2382 2383 static int ata_dev_set_mode(struct ata_device *dev) 2384 { 2385 struct ata_eh_context *ehc = &dev->ap->eh_context; 2386 unsigned int err_mask; 2387 int rc; 2388 2389 dev->flags &= ~ATA_DFLAG_PIO; 2390 if (dev->xfer_shift == ATA_SHIFT_PIO) 2391 dev->flags |= ATA_DFLAG_PIO; 2392 2393 err_mask = ata_dev_set_xfermode(dev); 2394 if (err_mask) { 2395 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode " 2396 "(err_mask=0x%x)\n", err_mask); 2397 return -EIO; 2398 } 2399 2400 ehc->i.flags |= ATA_EHI_POST_SETMODE; 2401 rc = ata_dev_revalidate(dev, 0); 2402 ehc->i.flags &= ~ATA_EHI_POST_SETMODE; 2403 if (rc) 2404 return rc; 2405 2406 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n", 2407 dev->xfer_shift, (int)dev->xfer_mode); 2408 2409 ata_dev_printk(dev, KERN_INFO, "configured for %s\n", 2410 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode))); 2411 return 0; 2412 } 2413 2414 /** 2415 * ata_set_mode - Program timings and issue SET FEATURES - XFER 2416 * @ap: port on which timings will be programmed 2417 * @r_failed_dev: out paramter for failed device 2418 * 2419 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If 2420 * ata_set_mode() fails, pointer to the failing device is 2421 * returned in @r_failed_dev. 2422 * 2423 * LOCKING: 2424 * PCI/etc. bus probe sem. 2425 * 2426 * RETURNS: 2427 * 0 on success, negative errno otherwise 2428 */ 2429 int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev) 2430 { 2431 struct ata_device *dev; 2432 int i, rc = 0, used_dma = 0, found = 0; 2433 2434 /* has private set_mode? */ 2435 if (ap->ops->set_mode) 2436 return ap->ops->set_mode(ap, r_failed_dev); 2437 2438 /* step 1: calculate xfer_mask */ 2439 for (i = 0; i < ATA_MAX_DEVICES; i++) { 2440 unsigned int pio_mask, dma_mask; 2441 2442 dev = &ap->device[i]; 2443 2444 if (!ata_dev_enabled(dev)) 2445 continue; 2446 2447 ata_dev_xfermask(dev); 2448 2449 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0); 2450 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask); 2451 dev->pio_mode = ata_xfer_mask2mode(pio_mask); 2452 dev->dma_mode = ata_xfer_mask2mode(dma_mask); 2453 2454 found = 1; 2455 if (dev->dma_mode) 2456 used_dma = 1; 2457 } 2458 if (!found) 2459 goto out; 2460 2461 /* step 2: always set host PIO timings */ 2462 for (i = 0; i < ATA_MAX_DEVICES; i++) { 2463 dev = &ap->device[i]; 2464 if (!ata_dev_enabled(dev)) 2465 continue; 2466 2467 if (!dev->pio_mode) { 2468 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n"); 2469 rc = -EINVAL; 2470 goto out; 2471 } 2472 2473 dev->xfer_mode = dev->pio_mode; 2474 dev->xfer_shift = ATA_SHIFT_PIO; 2475 if (ap->ops->set_piomode) 2476 ap->ops->set_piomode(ap, dev); 2477 } 2478 2479 /* step 3: set host DMA timings */ 2480 for (i = 0; i < ATA_MAX_DEVICES; i++) { 2481 dev = &ap->device[i]; 2482 2483 if (!ata_dev_enabled(dev) || !dev->dma_mode) 2484 continue; 2485 2486 dev->xfer_mode = dev->dma_mode; 2487 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode); 2488 if (ap->ops->set_dmamode) 2489 ap->ops->set_dmamode(ap, dev); 2490 } 2491 2492 /* step 4: update devices' xfer mode */ 2493 for (i = 0; i < ATA_MAX_DEVICES; i++) { 2494 dev = &ap->device[i]; 2495 2496 /* don't udpate suspended devices' xfer mode */ 2497 if (!ata_dev_ready(dev)) 2498 continue; 2499 2500 rc = ata_dev_set_mode(dev); 2501 if (rc) 2502 goto out; 2503 } 2504 2505 /* Record simplex status. If we selected DMA then the other 2506 * host channels are not permitted to do so. 2507 */ 2508 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX)) 2509 ap->host->simplex_claimed = 1; 2510 2511 /* step5: chip specific finalisation */ 2512 if (ap->ops->post_set_mode) 2513 ap->ops->post_set_mode(ap); 2514 2515 out: 2516 if (rc) 2517 *r_failed_dev = dev; 2518 return rc; 2519 } 2520 2521 /** 2522 * ata_tf_to_host - issue ATA taskfile to host controller 2523 * @ap: port to which command is being issued 2524 * @tf: ATA taskfile register set 2525 * 2526 * Issues ATA taskfile register set to ATA host controller, 2527 * with proper synchronization with interrupt handler and 2528 * other threads. 2529 * 2530 * LOCKING: 2531 * spin_lock_irqsave(host lock) 2532 */ 2533 2534 static inline void ata_tf_to_host(struct ata_port *ap, 2535 const struct ata_taskfile *tf) 2536 { 2537 ap->ops->tf_load(ap, tf); 2538 ap->ops->exec_command(ap, tf); 2539 } 2540 2541 /** 2542 * ata_busy_sleep - sleep until BSY clears, or timeout 2543 * @ap: port containing status register to be polled 2544 * @tmout_pat: impatience timeout 2545 * @tmout: overall timeout 2546 * 2547 * Sleep until ATA Status register bit BSY clears, 2548 * or a timeout occurs. 2549 * 2550 * LOCKING: 2551 * Kernel thread context (may sleep). 2552 * 2553 * RETURNS: 2554 * 0 on success, -errno otherwise. 2555 */ 2556 int ata_busy_sleep(struct ata_port *ap, 2557 unsigned long tmout_pat, unsigned long tmout) 2558 { 2559 unsigned long timer_start, timeout; 2560 u8 status; 2561 2562 status = ata_busy_wait(ap, ATA_BUSY, 300); 2563 timer_start = jiffies; 2564 timeout = timer_start + tmout_pat; 2565 while (status != 0xff && (status & ATA_BUSY) && 2566 time_before(jiffies, timeout)) { 2567 msleep(50); 2568 status = ata_busy_wait(ap, ATA_BUSY, 3); 2569 } 2570 2571 if (status != 0xff && (status & ATA_BUSY)) 2572 ata_port_printk(ap, KERN_WARNING, 2573 "port is slow to respond, please be patient " 2574 "(Status 0x%x)\n", status); 2575 2576 timeout = timer_start + tmout; 2577 while (status != 0xff && (status & ATA_BUSY) && 2578 time_before(jiffies, timeout)) { 2579 msleep(50); 2580 status = ata_chk_status(ap); 2581 } 2582 2583 if (status == 0xff) 2584 return -ENODEV; 2585 2586 if (status & ATA_BUSY) { 2587 ata_port_printk(ap, KERN_ERR, "port failed to respond " 2588 "(%lu secs, Status 0x%x)\n", 2589 tmout / HZ, status); 2590 return -EBUSY; 2591 } 2592 2593 return 0; 2594 } 2595 2596 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask) 2597 { 2598 struct ata_ioports *ioaddr = &ap->ioaddr; 2599 unsigned int dev0 = devmask & (1 << 0); 2600 unsigned int dev1 = devmask & (1 << 1); 2601 unsigned long timeout; 2602 2603 /* if device 0 was found in ata_devchk, wait for its 2604 * BSY bit to clear 2605 */ 2606 if (dev0) 2607 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); 2608 2609 /* if device 1 was found in ata_devchk, wait for 2610 * register access, then wait for BSY to clear 2611 */ 2612 timeout = jiffies + ATA_TMOUT_BOOT; 2613 while (dev1) { 2614 u8 nsect, lbal; 2615 2616 ap->ops->dev_select(ap, 1); 2617 if (ap->flags & ATA_FLAG_MMIO) { 2618 nsect = readb((void __iomem *) ioaddr->nsect_addr); 2619 lbal = readb((void __iomem *) ioaddr->lbal_addr); 2620 } else { 2621 nsect = inb(ioaddr->nsect_addr); 2622 lbal = inb(ioaddr->lbal_addr); 2623 } 2624 if ((nsect == 1) && (lbal == 1)) 2625 break; 2626 if (time_after(jiffies, timeout)) { 2627 dev1 = 0; 2628 break; 2629 } 2630 msleep(50); /* give drive a breather */ 2631 } 2632 if (dev1) 2633 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); 2634 2635 /* is all this really necessary? */ 2636 ap->ops->dev_select(ap, 0); 2637 if (dev1) 2638 ap->ops->dev_select(ap, 1); 2639 if (dev0) 2640 ap->ops->dev_select(ap, 0); 2641 } 2642 2643 static unsigned int ata_bus_softreset(struct ata_port *ap, 2644 unsigned int devmask) 2645 { 2646 struct ata_ioports *ioaddr = &ap->ioaddr; 2647 2648 DPRINTK("ata%u: bus reset via SRST\n", ap->id); 2649 2650 /* software reset. causes dev0 to be selected */ 2651 if (ap->flags & ATA_FLAG_MMIO) { 2652 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); 2653 udelay(20); /* FIXME: flush */ 2654 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr); 2655 udelay(20); /* FIXME: flush */ 2656 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); 2657 } else { 2658 outb(ap->ctl, ioaddr->ctl_addr); 2659 udelay(10); 2660 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr); 2661 udelay(10); 2662 outb(ap->ctl, ioaddr->ctl_addr); 2663 } 2664 2665 /* spec mandates ">= 2ms" before checking status. 2666 * We wait 150ms, because that was the magic delay used for 2667 * ATAPI devices in Hale Landis's ATADRVR, for the period of time 2668 * between when the ATA command register is written, and then 2669 * status is checked. Because waiting for "a while" before 2670 * checking status is fine, post SRST, we perform this magic 2671 * delay here as well. 2672 * 2673 * Old drivers/ide uses the 2mS rule and then waits for ready 2674 */ 2675 msleep(150); 2676 2677 /* Before we perform post reset processing we want to see if 2678 * the bus shows 0xFF because the odd clown forgets the D7 2679 * pulldown resistor. 2680 */ 2681 if (ata_check_status(ap) == 0xFF) 2682 return 0; 2683 2684 ata_bus_post_reset(ap, devmask); 2685 2686 return 0; 2687 } 2688 2689 /** 2690 * ata_bus_reset - reset host port and associated ATA channel 2691 * @ap: port to reset 2692 * 2693 * This is typically the first time we actually start issuing 2694 * commands to the ATA channel. We wait for BSY to clear, then 2695 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its 2696 * result. Determine what devices, if any, are on the channel 2697 * by looking at the device 0/1 error register. Look at the signature 2698 * stored in each device's taskfile registers, to determine if 2699 * the device is ATA or ATAPI. 2700 * 2701 * LOCKING: 2702 * PCI/etc. bus probe sem. 2703 * Obtains host lock. 2704 * 2705 * SIDE EFFECTS: 2706 * Sets ATA_FLAG_DISABLED if bus reset fails. 2707 */ 2708 2709 void ata_bus_reset(struct ata_port *ap) 2710 { 2711 struct ata_ioports *ioaddr = &ap->ioaddr; 2712 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; 2713 u8 err; 2714 unsigned int dev0, dev1 = 0, devmask = 0; 2715 2716 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no); 2717 2718 /* determine if device 0/1 are present */ 2719 if (ap->flags & ATA_FLAG_SATA_RESET) 2720 dev0 = 1; 2721 else { 2722 dev0 = ata_devchk(ap, 0); 2723 if (slave_possible) 2724 dev1 = ata_devchk(ap, 1); 2725 } 2726 2727 if (dev0) 2728 devmask |= (1 << 0); 2729 if (dev1) 2730 devmask |= (1 << 1); 2731 2732 /* select device 0 again */ 2733 ap->ops->dev_select(ap, 0); 2734 2735 /* issue bus reset */ 2736 if (ap->flags & ATA_FLAG_SRST) 2737 if (ata_bus_softreset(ap, devmask)) 2738 goto err_out; 2739 2740 /* 2741 * determine by signature whether we have ATA or ATAPI devices 2742 */ 2743 ap->device[0].class = ata_dev_try_classify(ap, 0, &err); 2744 if ((slave_possible) && (err != 0x81)) 2745 ap->device[1].class = ata_dev_try_classify(ap, 1, &err); 2746 2747 /* re-enable interrupts */ 2748 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */ 2749 ata_irq_on(ap); 2750 2751 /* is double-select really necessary? */ 2752 if (ap->device[1].class != ATA_DEV_NONE) 2753 ap->ops->dev_select(ap, 1); 2754 if (ap->device[0].class != ATA_DEV_NONE) 2755 ap->ops->dev_select(ap, 0); 2756 2757 /* if no devices were detected, disable this port */ 2758 if ((ap->device[0].class == ATA_DEV_NONE) && 2759 (ap->device[1].class == ATA_DEV_NONE)) 2760 goto err_out; 2761 2762 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { 2763 /* set up device control for ATA_FLAG_SATA_RESET */ 2764 if (ap->flags & ATA_FLAG_MMIO) 2765 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); 2766 else 2767 outb(ap->ctl, ioaddr->ctl_addr); 2768 } 2769 2770 DPRINTK("EXIT\n"); 2771 return; 2772 2773 err_out: 2774 ata_port_printk(ap, KERN_ERR, "disabling port\n"); 2775 ap->ops->port_disable(ap); 2776 2777 DPRINTK("EXIT\n"); 2778 } 2779 2780 /** 2781 * sata_phy_debounce - debounce SATA phy status 2782 * @ap: ATA port to debounce SATA phy status for 2783 * @params: timing parameters { interval, duratinon, timeout } in msec 2784 * 2785 * Make sure SStatus of @ap reaches stable state, determined by 2786 * holding the same value where DET is not 1 for @duration polled 2787 * every @interval, before @timeout. Timeout constraints the 2788 * beginning of the stable state. Because, after hot unplugging, 2789 * DET gets stuck at 1 on some controllers, this functions waits 2790 * until timeout then returns 0 if DET is stable at 1. 2791 * 2792 * LOCKING: 2793 * Kernel thread context (may sleep) 2794 * 2795 * RETURNS: 2796 * 0 on success, -errno on failure. 2797 */ 2798 int sata_phy_debounce(struct ata_port *ap, const unsigned long *params) 2799 { 2800 unsigned long interval_msec = params[0]; 2801 unsigned long duration = params[1] * HZ / 1000; 2802 unsigned long timeout = jiffies + params[2] * HZ / 1000; 2803 unsigned long last_jiffies; 2804 u32 last, cur; 2805 int rc; 2806 2807 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur))) 2808 return rc; 2809 cur &= 0xf; 2810 2811 last = cur; 2812 last_jiffies = jiffies; 2813 2814 while (1) { 2815 msleep(interval_msec); 2816 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur))) 2817 return rc; 2818 cur &= 0xf; 2819 2820 /* DET stable? */ 2821 if (cur == last) { 2822 if (cur == 1 && time_before(jiffies, timeout)) 2823 continue; 2824 if (time_after(jiffies, last_jiffies + duration)) 2825 return 0; 2826 continue; 2827 } 2828 2829 /* unstable, start over */ 2830 last = cur; 2831 last_jiffies = jiffies; 2832 2833 /* check timeout */ 2834 if (time_after(jiffies, timeout)) 2835 return -EBUSY; 2836 } 2837 } 2838 2839 /** 2840 * sata_phy_resume - resume SATA phy 2841 * @ap: ATA port to resume SATA phy for 2842 * @params: timing parameters { interval, duratinon, timeout } in msec 2843 * 2844 * Resume SATA phy of @ap and debounce it. 2845 * 2846 * LOCKING: 2847 * Kernel thread context (may sleep) 2848 * 2849 * RETURNS: 2850 * 0 on success, -errno on failure. 2851 */ 2852 int sata_phy_resume(struct ata_port *ap, const unsigned long *params) 2853 { 2854 u32 scontrol; 2855 int rc; 2856 2857 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) 2858 return rc; 2859 2860 scontrol = (scontrol & 0x0f0) | 0x300; 2861 2862 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) 2863 return rc; 2864 2865 /* Some PHYs react badly if SStatus is pounded immediately 2866 * after resuming. Delay 200ms before debouncing. 2867 */ 2868 msleep(200); 2869 2870 return sata_phy_debounce(ap, params); 2871 } 2872 2873 static void ata_wait_spinup(struct ata_port *ap) 2874 { 2875 struct ata_eh_context *ehc = &ap->eh_context; 2876 unsigned long end, secs; 2877 int rc; 2878 2879 /* first, debounce phy if SATA */ 2880 if (ap->cbl == ATA_CBL_SATA) { 2881 rc = sata_phy_debounce(ap, sata_deb_timing_hotplug); 2882 2883 /* if debounced successfully and offline, no need to wait */ 2884 if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap)) 2885 return; 2886 } 2887 2888 /* okay, let's give the drive time to spin up */ 2889 end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000; 2890 secs = ((end - jiffies) + HZ - 1) / HZ; 2891 2892 if (time_after(jiffies, end)) 2893 return; 2894 2895 if (secs > 5) 2896 ata_port_printk(ap, KERN_INFO, "waiting for device to spin up " 2897 "(%lu secs)\n", secs); 2898 2899 schedule_timeout_uninterruptible(end - jiffies); 2900 } 2901 2902 /** 2903 * ata_std_prereset - prepare for reset 2904 * @ap: ATA port to be reset 2905 * 2906 * @ap is about to be reset. Initialize it. 2907 * 2908 * LOCKING: 2909 * Kernel thread context (may sleep) 2910 * 2911 * RETURNS: 2912 * 0 on success, -errno otherwise. 2913 */ 2914 int ata_std_prereset(struct ata_port *ap) 2915 { 2916 struct ata_eh_context *ehc = &ap->eh_context; 2917 const unsigned long *timing = sata_ehc_deb_timing(ehc); 2918 int rc; 2919 2920 /* handle link resume & hotplug spinup */ 2921 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) && 2922 (ap->flags & ATA_FLAG_HRST_TO_RESUME)) 2923 ehc->i.action |= ATA_EH_HARDRESET; 2924 2925 if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) && 2926 (ap->flags & ATA_FLAG_SKIP_D2H_BSY)) 2927 ata_wait_spinup(ap); 2928 2929 /* if we're about to do hardreset, nothing more to do */ 2930 if (ehc->i.action & ATA_EH_HARDRESET) 2931 return 0; 2932 2933 /* if SATA, resume phy */ 2934 if (ap->cbl == ATA_CBL_SATA) { 2935 rc = sata_phy_resume(ap, timing); 2936 if (rc && rc != -EOPNOTSUPP) { 2937 /* phy resume failed */ 2938 ata_port_printk(ap, KERN_WARNING, "failed to resume " 2939 "link for reset (errno=%d)\n", rc); 2940 return rc; 2941 } 2942 } 2943 2944 /* Wait for !BSY if the controller can wait for the first D2H 2945 * Reg FIS and we don't know that no device is attached. 2946 */ 2947 if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap)) 2948 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); 2949 2950 return 0; 2951 } 2952 2953 /** 2954 * ata_std_softreset - reset host port via ATA SRST 2955 * @ap: port to reset 2956 * @classes: resulting classes of attached devices 2957 * 2958 * Reset host port using ATA SRST. 2959 * 2960 * LOCKING: 2961 * Kernel thread context (may sleep) 2962 * 2963 * RETURNS: 2964 * 0 on success, -errno otherwise. 2965 */ 2966 int ata_std_softreset(struct ata_port *ap, unsigned int *classes) 2967 { 2968 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; 2969 unsigned int devmask = 0, err_mask; 2970 u8 err; 2971 2972 DPRINTK("ENTER\n"); 2973 2974 if (ata_port_offline(ap)) { 2975 classes[0] = ATA_DEV_NONE; 2976 goto out; 2977 } 2978 2979 /* determine if device 0/1 are present */ 2980 if (ata_devchk(ap, 0)) 2981 devmask |= (1 << 0); 2982 if (slave_possible && ata_devchk(ap, 1)) 2983 devmask |= (1 << 1); 2984 2985 /* select device 0 again */ 2986 ap->ops->dev_select(ap, 0); 2987 2988 /* issue bus reset */ 2989 DPRINTK("about to softreset, devmask=%x\n", devmask); 2990 err_mask = ata_bus_softreset(ap, devmask); 2991 if (err_mask) { 2992 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n", 2993 err_mask); 2994 return -EIO; 2995 } 2996 2997 /* determine by signature whether we have ATA or ATAPI devices */ 2998 classes[0] = ata_dev_try_classify(ap, 0, &err); 2999 if (slave_possible && err != 0x81) 3000 classes[1] = ata_dev_try_classify(ap, 1, &err); 3001 3002 out: 3003 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]); 3004 return 0; 3005 } 3006 3007 /** 3008 * sata_port_hardreset - reset port via SATA phy reset 3009 * @ap: port to reset 3010 * @timing: timing parameters { interval, duratinon, timeout } in msec 3011 * 3012 * SATA phy-reset host port using DET bits of SControl register. 3013 * 3014 * LOCKING: 3015 * Kernel thread context (may sleep) 3016 * 3017 * RETURNS: 3018 * 0 on success, -errno otherwise. 3019 */ 3020 int sata_port_hardreset(struct ata_port *ap, const unsigned long *timing) 3021 { 3022 u32 scontrol; 3023 int rc; 3024 3025 DPRINTK("ENTER\n"); 3026 3027 if (sata_set_spd_needed(ap)) { 3028 /* SATA spec says nothing about how to reconfigure 3029 * spd. To be on the safe side, turn off phy during 3030 * reconfiguration. This works for at least ICH7 AHCI 3031 * and Sil3124. 3032 */ 3033 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) 3034 goto out; 3035 3036 scontrol = (scontrol & 0x0f0) | 0x304; 3037 3038 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) 3039 goto out; 3040 3041 sata_set_spd(ap); 3042 } 3043 3044 /* issue phy wake/reset */ 3045 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) 3046 goto out; 3047 3048 scontrol = (scontrol & 0x0f0) | 0x301; 3049 3050 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol))) 3051 goto out; 3052 3053 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1 3054 * 10.4.2 says at least 1 ms. 3055 */ 3056 msleep(1); 3057 3058 /* bring phy back */ 3059 rc = sata_phy_resume(ap, timing); 3060 out: 3061 DPRINTK("EXIT, rc=%d\n", rc); 3062 return rc; 3063 } 3064 3065 /** 3066 * sata_std_hardreset - reset host port via SATA phy reset 3067 * @ap: port to reset 3068 * @class: resulting class of attached device 3069 * 3070 * SATA phy-reset host port using DET bits of SControl register, 3071 * wait for !BSY and classify the attached device. 3072 * 3073 * LOCKING: 3074 * Kernel thread context (may sleep) 3075 * 3076 * RETURNS: 3077 * 0 on success, -errno otherwise. 3078 */ 3079 int sata_std_hardreset(struct ata_port *ap, unsigned int *class) 3080 { 3081 const unsigned long *timing = sata_ehc_deb_timing(&ap->eh_context); 3082 int rc; 3083 3084 DPRINTK("ENTER\n"); 3085 3086 /* do hardreset */ 3087 rc = sata_port_hardreset(ap, timing); 3088 if (rc) { 3089 ata_port_printk(ap, KERN_ERR, 3090 "COMRESET failed (errno=%d)\n", rc); 3091 return rc; 3092 } 3093 3094 /* TODO: phy layer with polling, timeouts, etc. */ 3095 if (ata_port_offline(ap)) { 3096 *class = ATA_DEV_NONE; 3097 DPRINTK("EXIT, link offline\n"); 3098 return 0; 3099 } 3100 3101 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { 3102 ata_port_printk(ap, KERN_ERR, 3103 "COMRESET failed (device not ready)\n"); 3104 return -EIO; 3105 } 3106 3107 ap->ops->dev_select(ap, 0); /* probably unnecessary */ 3108 3109 *class = ata_dev_try_classify(ap, 0, NULL); 3110 3111 DPRINTK("EXIT, class=%u\n", *class); 3112 return 0; 3113 } 3114 3115 /** 3116 * ata_std_postreset - standard postreset callback 3117 * @ap: the target ata_port 3118 * @classes: classes of attached devices 3119 * 3120 * This function is invoked after a successful reset. Note that 3121 * the device might have been reset more than once using 3122 * different reset methods before postreset is invoked. 3123 * 3124 * LOCKING: 3125 * Kernel thread context (may sleep) 3126 */ 3127 void ata_std_postreset(struct ata_port *ap, unsigned int *classes) 3128 { 3129 u32 serror; 3130 3131 DPRINTK("ENTER\n"); 3132 3133 /* print link status */ 3134 sata_print_link_status(ap); 3135 3136 /* clear SError */ 3137 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0) 3138 sata_scr_write(ap, SCR_ERROR, serror); 3139 3140 /* re-enable interrupts */ 3141 if (!ap->ops->error_handler) { 3142 /* FIXME: hack. create a hook instead */ 3143 if (ap->ioaddr.ctl_addr) 3144 ata_irq_on(ap); 3145 } 3146 3147 /* is double-select really necessary? */ 3148 if (classes[0] != ATA_DEV_NONE) 3149 ap->ops->dev_select(ap, 1); 3150 if (classes[1] != ATA_DEV_NONE) 3151 ap->ops->dev_select(ap, 0); 3152 3153 /* bail out if no device is present */ 3154 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { 3155 DPRINTK("EXIT, no device\n"); 3156 return; 3157 } 3158 3159 /* set up device control */ 3160 if (ap->ioaddr.ctl_addr) { 3161 if (ap->flags & ATA_FLAG_MMIO) 3162 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr); 3163 else 3164 outb(ap->ctl, ap->ioaddr.ctl_addr); 3165 } 3166 3167 DPRINTK("EXIT\n"); 3168 } 3169 3170 /** 3171 * ata_dev_same_device - Determine whether new ID matches configured device 3172 * @dev: device to compare against 3173 * @new_class: class of the new device 3174 * @new_id: IDENTIFY page of the new device 3175 * 3176 * Compare @new_class and @new_id against @dev and determine 3177 * whether @dev is the device indicated by @new_class and 3178 * @new_id. 3179 * 3180 * LOCKING: 3181 * None. 3182 * 3183 * RETURNS: 3184 * 1 if @dev matches @new_class and @new_id, 0 otherwise. 3185 */ 3186 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class, 3187 const u16 *new_id) 3188 { 3189 const u16 *old_id = dev->id; 3190 unsigned char model[2][41], serial[2][21]; 3191 u64 new_n_sectors; 3192 3193 if (dev->class != new_class) { 3194 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n", 3195 dev->class, new_class); 3196 return 0; 3197 } 3198 3199 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0])); 3200 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1])); 3201 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0])); 3202 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1])); 3203 new_n_sectors = ata_id_n_sectors(new_id); 3204 3205 if (strcmp(model[0], model[1])) { 3206 ata_dev_printk(dev, KERN_INFO, "model number mismatch " 3207 "'%s' != '%s'\n", model[0], model[1]); 3208 return 0; 3209 } 3210 3211 if (strcmp(serial[0], serial[1])) { 3212 ata_dev_printk(dev, KERN_INFO, "serial number mismatch " 3213 "'%s' != '%s'\n", serial[0], serial[1]); 3214 return 0; 3215 } 3216 3217 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) { 3218 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch " 3219 "%llu != %llu\n", 3220 (unsigned long long)dev->n_sectors, 3221 (unsigned long long)new_n_sectors); 3222 return 0; 3223 } 3224 3225 return 1; 3226 } 3227 3228 /** 3229 * ata_dev_revalidate - Revalidate ATA device 3230 * @dev: device to revalidate 3231 * @readid_flags: read ID flags 3232 * 3233 * Re-read IDENTIFY page and make sure @dev is still attached to 3234 * the port. 3235 * 3236 * LOCKING: 3237 * Kernel thread context (may sleep) 3238 * 3239 * RETURNS: 3240 * 0 on success, negative errno otherwise 3241 */ 3242 int ata_dev_revalidate(struct ata_device *dev, unsigned int readid_flags) 3243 { 3244 unsigned int class = dev->class; 3245 u16 *id = (void *)dev->ap->sector_buf; 3246 int rc; 3247 3248 if (!ata_dev_enabled(dev)) { 3249 rc = -ENODEV; 3250 goto fail; 3251 } 3252 3253 /* read ID data */ 3254 rc = ata_dev_read_id(dev, &class, readid_flags, id); 3255 if (rc) 3256 goto fail; 3257 3258 /* is the device still there? */ 3259 if (!ata_dev_same_device(dev, class, id)) { 3260 rc = -ENODEV; 3261 goto fail; 3262 } 3263 3264 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS); 3265 3266 /* configure device according to the new ID */ 3267 rc = ata_dev_configure(dev); 3268 if (rc == 0) 3269 return 0; 3270 3271 fail: 3272 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc); 3273 return rc; 3274 } 3275 3276 struct ata_blacklist_entry { 3277 const char *model_num; 3278 const char *model_rev; 3279 unsigned long horkage; 3280 }; 3281 3282 static const struct ata_blacklist_entry ata_device_blacklist [] = { 3283 /* Devices with DMA related problems under Linux */ 3284 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA }, 3285 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA }, 3286 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA }, 3287 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA }, 3288 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA }, 3289 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA }, 3290 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA }, 3291 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA }, 3292 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA }, 3293 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA }, 3294 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA }, 3295 { "CRD-84", NULL, ATA_HORKAGE_NODMA }, 3296 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA }, 3297 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA }, 3298 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA }, 3299 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA }, 3300 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA }, 3301 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA }, 3302 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA }, 3303 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA }, 3304 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA }, 3305 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA }, 3306 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA }, 3307 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA }, 3308 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA }, 3309 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA }, 3310 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA }, 3311 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA }, 3312 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA }, 3313 { "SAMSUNG CD-ROM SN-124","N001", ATA_HORKAGE_NODMA }, 3314 3315 /* Devices we expect to fail diagnostics */ 3316 3317 /* Devices where NCQ should be avoided */ 3318 /* NCQ is slow */ 3319 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ }, 3320 3321 /* Devices with NCQ limits */ 3322 3323 /* End Marker */ 3324 { } 3325 }; 3326 3327 static int ata_strim(char *s, size_t len) 3328 { 3329 len = strnlen(s, len); 3330 3331 /* ATAPI specifies that empty space is blank-filled; remove blanks */ 3332 while ((len > 0) && (s[len - 1] == ' ')) { 3333 len--; 3334 s[len] = 0; 3335 } 3336 return len; 3337 } 3338 3339 unsigned long ata_device_blacklisted(const struct ata_device *dev) 3340 { 3341 unsigned char model_num[40]; 3342 unsigned char model_rev[16]; 3343 unsigned int nlen, rlen; 3344 const struct ata_blacklist_entry *ad = ata_device_blacklist; 3345 3346 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS, 3347 sizeof(model_num)); 3348 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS, 3349 sizeof(model_rev)); 3350 nlen = ata_strim(model_num, sizeof(model_num)); 3351 rlen = ata_strim(model_rev, sizeof(model_rev)); 3352 3353 while (ad->model_num) { 3354 if (!strncmp(ad->model_num, model_num, nlen)) { 3355 if (ad->model_rev == NULL) 3356 return ad->horkage; 3357 if (!strncmp(ad->model_rev, model_rev, rlen)) 3358 return ad->horkage; 3359 } 3360 ad++; 3361 } 3362 return 0; 3363 } 3364 3365 static int ata_dma_blacklisted(const struct ata_device *dev) 3366 { 3367 /* We don't support polling DMA. 3368 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO) 3369 * if the LLDD handles only interrupts in the HSM_ST_LAST state. 3370 */ 3371 if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) && 3372 (dev->flags & ATA_DFLAG_CDB_INTR)) 3373 return 1; 3374 return (ata_device_blacklisted(dev) & ATA_HORKAGE_NODMA) ? 1 : 0; 3375 } 3376 3377 /** 3378 * ata_dev_xfermask - Compute supported xfermask of the given device 3379 * @dev: Device to compute xfermask for 3380 * 3381 * Compute supported xfermask of @dev and store it in 3382 * dev->*_mask. This function is responsible for applying all 3383 * known limits including host controller limits, device 3384 * blacklist, etc... 3385 * 3386 * LOCKING: 3387 * None. 3388 */ 3389 static void ata_dev_xfermask(struct ata_device *dev) 3390 { 3391 struct ata_port *ap = dev->ap; 3392 struct ata_host *host = ap->host; 3393 unsigned long xfer_mask; 3394 3395 /* controller modes available */ 3396 xfer_mask = ata_pack_xfermask(ap->pio_mask, 3397 ap->mwdma_mask, ap->udma_mask); 3398 3399 /* Apply cable rule here. Don't apply it early because when 3400 * we handle hot plug the cable type can itself change. 3401 */ 3402 if (ap->cbl == ATA_CBL_PATA40) 3403 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA); 3404 /* Apply drive side cable rule. Unknown or 80 pin cables reported 3405 * host side are checked drive side as well. Cases where we know a 3406 * 40wire cable is used safely for 80 are not checked here. 3407 */ 3408 if (ata_drive_40wire(dev->id) && (ap->cbl == ATA_CBL_PATA_UNK || ap->cbl == ATA_CBL_PATA80)) 3409 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA); 3410 3411 3412 xfer_mask &= ata_pack_xfermask(dev->pio_mask, 3413 dev->mwdma_mask, dev->udma_mask); 3414 xfer_mask &= ata_id_xfermask(dev->id); 3415 3416 /* 3417 * CFA Advanced TrueIDE timings are not allowed on a shared 3418 * cable 3419 */ 3420 if (ata_dev_pair(dev)) { 3421 /* No PIO5 or PIO6 */ 3422 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5)); 3423 /* No MWDMA3 or MWDMA 4 */ 3424 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3)); 3425 } 3426 3427 if (ata_dma_blacklisted(dev)) { 3428 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); 3429 ata_dev_printk(dev, KERN_WARNING, 3430 "device is on DMA blacklist, disabling DMA\n"); 3431 } 3432 3433 if ((host->flags & ATA_HOST_SIMPLEX) && host->simplex_claimed) { 3434 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); 3435 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by " 3436 "other device, disabling DMA\n"); 3437 } 3438 3439 if (ap->ops->mode_filter) 3440 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask); 3441 3442 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, 3443 &dev->mwdma_mask, &dev->udma_mask); 3444 } 3445 3446 /** 3447 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command 3448 * @dev: Device to which command will be sent 3449 * 3450 * Issue SET FEATURES - XFER MODE command to device @dev 3451 * on port @ap. 3452 * 3453 * LOCKING: 3454 * PCI/etc. bus probe sem. 3455 * 3456 * RETURNS: 3457 * 0 on success, AC_ERR_* mask otherwise. 3458 */ 3459 3460 static unsigned int ata_dev_set_xfermode(struct ata_device *dev) 3461 { 3462 struct ata_taskfile tf; 3463 unsigned int err_mask; 3464 3465 /* set up set-features taskfile */ 3466 DPRINTK("set features - xfer mode\n"); 3467 3468 ata_tf_init(dev, &tf); 3469 tf.command = ATA_CMD_SET_FEATURES; 3470 tf.feature = SETFEATURES_XFER; 3471 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 3472 tf.protocol = ATA_PROT_NODATA; 3473 tf.nsect = dev->xfer_mode; 3474 3475 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); 3476 3477 DPRINTK("EXIT, err_mask=%x\n", err_mask); 3478 return err_mask; 3479 } 3480 3481 /** 3482 * ata_dev_init_params - Issue INIT DEV PARAMS command 3483 * @dev: Device to which command will be sent 3484 * @heads: Number of heads (taskfile parameter) 3485 * @sectors: Number of sectors (taskfile parameter) 3486 * 3487 * LOCKING: 3488 * Kernel thread context (may sleep) 3489 * 3490 * RETURNS: 3491 * 0 on success, AC_ERR_* mask otherwise. 3492 */ 3493 static unsigned int ata_dev_init_params(struct ata_device *dev, 3494 u16 heads, u16 sectors) 3495 { 3496 struct ata_taskfile tf; 3497 unsigned int err_mask; 3498 3499 /* Number of sectors per track 1-255. Number of heads 1-16 */ 3500 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16) 3501 return AC_ERR_INVALID; 3502 3503 /* set up init dev params taskfile */ 3504 DPRINTK("init dev params \n"); 3505 3506 ata_tf_init(dev, &tf); 3507 tf.command = ATA_CMD_INIT_DEV_PARAMS; 3508 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 3509 tf.protocol = ATA_PROT_NODATA; 3510 tf.nsect = sectors; 3511 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */ 3512 3513 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); 3514 3515 DPRINTK("EXIT, err_mask=%x\n", err_mask); 3516 return err_mask; 3517 } 3518 3519 /** 3520 * ata_sg_clean - Unmap DMA memory associated with command 3521 * @qc: Command containing DMA memory to be released 3522 * 3523 * Unmap all mapped DMA memory associated with this command. 3524 * 3525 * LOCKING: 3526 * spin_lock_irqsave(host lock) 3527 */ 3528 void ata_sg_clean(struct ata_queued_cmd *qc) 3529 { 3530 struct ata_port *ap = qc->ap; 3531 struct scatterlist *sg = qc->__sg; 3532 int dir = qc->dma_dir; 3533 void *pad_buf = NULL; 3534 3535 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP)); 3536 WARN_ON(sg == NULL); 3537 3538 if (qc->flags & ATA_QCFLAG_SINGLE) 3539 WARN_ON(qc->n_elem > 1); 3540 3541 VPRINTK("unmapping %u sg elements\n", qc->n_elem); 3542 3543 /* if we padded the buffer out to 32-bit bound, and data 3544 * xfer direction is from-device, we must copy from the 3545 * pad buffer back into the supplied buffer 3546 */ 3547 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE)) 3548 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); 3549 3550 if (qc->flags & ATA_QCFLAG_SG) { 3551 if (qc->n_elem) 3552 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir); 3553 /* restore last sg */ 3554 sg[qc->orig_n_elem - 1].length += qc->pad_len; 3555 if (pad_buf) { 3556 struct scatterlist *psg = &qc->pad_sgent; 3557 void *addr = kmap_atomic(psg->page, KM_IRQ0); 3558 memcpy(addr + psg->offset, pad_buf, qc->pad_len); 3559 kunmap_atomic(addr, KM_IRQ0); 3560 } 3561 } else { 3562 if (qc->n_elem) 3563 dma_unmap_single(ap->dev, 3564 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]), 3565 dir); 3566 /* restore sg */ 3567 sg->length += qc->pad_len; 3568 if (pad_buf) 3569 memcpy(qc->buf_virt + sg->length - qc->pad_len, 3570 pad_buf, qc->pad_len); 3571 } 3572 3573 qc->flags &= ~ATA_QCFLAG_DMAMAP; 3574 qc->__sg = NULL; 3575 } 3576 3577 /** 3578 * ata_fill_sg - Fill PCI IDE PRD table 3579 * @qc: Metadata associated with taskfile to be transferred 3580 * 3581 * Fill PCI IDE PRD (scatter-gather) table with segments 3582 * associated with the current disk command. 3583 * 3584 * LOCKING: 3585 * spin_lock_irqsave(host lock) 3586 * 3587 */ 3588 static void ata_fill_sg(struct ata_queued_cmd *qc) 3589 { 3590 struct ata_port *ap = qc->ap; 3591 struct scatterlist *sg; 3592 unsigned int idx; 3593 3594 WARN_ON(qc->__sg == NULL); 3595 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); 3596 3597 idx = 0; 3598 ata_for_each_sg(sg, qc) { 3599 u32 addr, offset; 3600 u32 sg_len, len; 3601 3602 /* determine if physical DMA addr spans 64K boundary. 3603 * Note h/w doesn't support 64-bit, so we unconditionally 3604 * truncate dma_addr_t to u32. 3605 */ 3606 addr = (u32) sg_dma_address(sg); 3607 sg_len = sg_dma_len(sg); 3608 3609 while (sg_len) { 3610 offset = addr & 0xffff; 3611 len = sg_len; 3612 if ((offset + sg_len) > 0x10000) 3613 len = 0x10000 - offset; 3614 3615 ap->prd[idx].addr = cpu_to_le32(addr); 3616 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); 3617 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); 3618 3619 idx++; 3620 sg_len -= len; 3621 addr += len; 3622 } 3623 } 3624 3625 if (idx) 3626 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); 3627 } 3628 /** 3629 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported 3630 * @qc: Metadata associated with taskfile to check 3631 * 3632 * Allow low-level driver to filter ATA PACKET commands, returning 3633 * a status indicating whether or not it is OK to use DMA for the 3634 * supplied PACKET command. 3635 * 3636 * LOCKING: 3637 * spin_lock_irqsave(host lock) 3638 * 3639 * RETURNS: 0 when ATAPI DMA can be used 3640 * nonzero otherwise 3641 */ 3642 int ata_check_atapi_dma(struct ata_queued_cmd *qc) 3643 { 3644 struct ata_port *ap = qc->ap; 3645 int rc = 0; /* Assume ATAPI DMA is OK by default */ 3646 3647 if (ap->ops->check_atapi_dma) 3648 rc = ap->ops->check_atapi_dma(qc); 3649 3650 return rc; 3651 } 3652 /** 3653 * ata_qc_prep - Prepare taskfile for submission 3654 * @qc: Metadata associated with taskfile to be prepared 3655 * 3656 * Prepare ATA taskfile for submission. 3657 * 3658 * LOCKING: 3659 * spin_lock_irqsave(host lock) 3660 */ 3661 void ata_qc_prep(struct ata_queued_cmd *qc) 3662 { 3663 if (!(qc->flags & ATA_QCFLAG_DMAMAP)) 3664 return; 3665 3666 ata_fill_sg(qc); 3667 } 3668 3669 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { } 3670 3671 /** 3672 * ata_sg_init_one - Associate command with memory buffer 3673 * @qc: Command to be associated 3674 * @buf: Memory buffer 3675 * @buflen: Length of memory buffer, in bytes. 3676 * 3677 * Initialize the data-related elements of queued_cmd @qc 3678 * to point to a single memory buffer, @buf of byte length @buflen. 3679 * 3680 * LOCKING: 3681 * spin_lock_irqsave(host lock) 3682 */ 3683 3684 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen) 3685 { 3686 qc->flags |= ATA_QCFLAG_SINGLE; 3687 3688 qc->__sg = &qc->sgent; 3689 qc->n_elem = 1; 3690 qc->orig_n_elem = 1; 3691 qc->buf_virt = buf; 3692 qc->nbytes = buflen; 3693 3694 sg_init_one(&qc->sgent, buf, buflen); 3695 } 3696 3697 /** 3698 * ata_sg_init - Associate command with scatter-gather table. 3699 * @qc: Command to be associated 3700 * @sg: Scatter-gather table. 3701 * @n_elem: Number of elements in s/g table. 3702 * 3703 * Initialize the data-related elements of queued_cmd @qc 3704 * to point to a scatter-gather table @sg, containing @n_elem 3705 * elements. 3706 * 3707 * LOCKING: 3708 * spin_lock_irqsave(host lock) 3709 */ 3710 3711 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, 3712 unsigned int n_elem) 3713 { 3714 qc->flags |= ATA_QCFLAG_SG; 3715 qc->__sg = sg; 3716 qc->n_elem = n_elem; 3717 qc->orig_n_elem = n_elem; 3718 } 3719 3720 /** 3721 * ata_sg_setup_one - DMA-map the memory buffer associated with a command. 3722 * @qc: Command with memory buffer to be mapped. 3723 * 3724 * DMA-map the memory buffer associated with queued_cmd @qc. 3725 * 3726 * LOCKING: 3727 * spin_lock_irqsave(host lock) 3728 * 3729 * RETURNS: 3730 * Zero on success, negative on error. 3731 */ 3732 3733 static int ata_sg_setup_one(struct ata_queued_cmd *qc) 3734 { 3735 struct ata_port *ap = qc->ap; 3736 int dir = qc->dma_dir; 3737 struct scatterlist *sg = qc->__sg; 3738 dma_addr_t dma_address; 3739 int trim_sg = 0; 3740 3741 /* we must lengthen transfers to end on a 32-bit boundary */ 3742 qc->pad_len = sg->length & 3; 3743 if (qc->pad_len) { 3744 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); 3745 struct scatterlist *psg = &qc->pad_sgent; 3746 3747 WARN_ON(qc->dev->class != ATA_DEV_ATAPI); 3748 3749 memset(pad_buf, 0, ATA_DMA_PAD_SZ); 3750 3751 if (qc->tf.flags & ATA_TFLAG_WRITE) 3752 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len, 3753 qc->pad_len); 3754 3755 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); 3756 sg_dma_len(psg) = ATA_DMA_PAD_SZ; 3757 /* trim sg */ 3758 sg->length -= qc->pad_len; 3759 if (sg->length == 0) 3760 trim_sg = 1; 3761 3762 DPRINTK("padding done, sg->length=%u pad_len=%u\n", 3763 sg->length, qc->pad_len); 3764 } 3765 3766 if (trim_sg) { 3767 qc->n_elem--; 3768 goto skip_map; 3769 } 3770 3771 dma_address = dma_map_single(ap->dev, qc->buf_virt, 3772 sg->length, dir); 3773 if (dma_mapping_error(dma_address)) { 3774 /* restore sg */ 3775 sg->length += qc->pad_len; 3776 return -1; 3777 } 3778 3779 sg_dma_address(sg) = dma_address; 3780 sg_dma_len(sg) = sg->length; 3781 3782 skip_map: 3783 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg), 3784 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); 3785 3786 return 0; 3787 } 3788 3789 /** 3790 * ata_sg_setup - DMA-map the scatter-gather table associated with a command. 3791 * @qc: Command with scatter-gather table to be mapped. 3792 * 3793 * DMA-map the scatter-gather table associated with queued_cmd @qc. 3794 * 3795 * LOCKING: 3796 * spin_lock_irqsave(host lock) 3797 * 3798 * RETURNS: 3799 * Zero on success, negative on error. 3800 * 3801 */ 3802 3803 static int ata_sg_setup(struct ata_queued_cmd *qc) 3804 { 3805 struct ata_port *ap = qc->ap; 3806 struct scatterlist *sg = qc->__sg; 3807 struct scatterlist *lsg = &sg[qc->n_elem - 1]; 3808 int n_elem, pre_n_elem, dir, trim_sg = 0; 3809 3810 VPRINTK("ENTER, ata%u\n", ap->id); 3811 WARN_ON(!(qc->flags & ATA_QCFLAG_SG)); 3812 3813 /* we must lengthen transfers to end on a 32-bit boundary */ 3814 qc->pad_len = lsg->length & 3; 3815 if (qc->pad_len) { 3816 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); 3817 struct scatterlist *psg = &qc->pad_sgent; 3818 unsigned int offset; 3819 3820 WARN_ON(qc->dev->class != ATA_DEV_ATAPI); 3821 3822 memset(pad_buf, 0, ATA_DMA_PAD_SZ); 3823 3824 /* 3825 * psg->page/offset are used to copy to-be-written 3826 * data in this function or read data in ata_sg_clean. 3827 */ 3828 offset = lsg->offset + lsg->length - qc->pad_len; 3829 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT); 3830 psg->offset = offset_in_page(offset); 3831 3832 if (qc->tf.flags & ATA_TFLAG_WRITE) { 3833 void *addr = kmap_atomic(psg->page, KM_IRQ0); 3834 memcpy(pad_buf, addr + psg->offset, qc->pad_len); 3835 kunmap_atomic(addr, KM_IRQ0); 3836 } 3837 3838 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); 3839 sg_dma_len(psg) = ATA_DMA_PAD_SZ; 3840 /* trim last sg */ 3841 lsg->length -= qc->pad_len; 3842 if (lsg->length == 0) 3843 trim_sg = 1; 3844 3845 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n", 3846 qc->n_elem - 1, lsg->length, qc->pad_len); 3847 } 3848 3849 pre_n_elem = qc->n_elem; 3850 if (trim_sg && pre_n_elem) 3851 pre_n_elem--; 3852 3853 if (!pre_n_elem) { 3854 n_elem = 0; 3855 goto skip_map; 3856 } 3857 3858 dir = qc->dma_dir; 3859 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir); 3860 if (n_elem < 1) { 3861 /* restore last sg */ 3862 lsg->length += qc->pad_len; 3863 return -1; 3864 } 3865 3866 DPRINTK("%d sg elements mapped\n", n_elem); 3867 3868 skip_map: 3869 qc->n_elem = n_elem; 3870 3871 return 0; 3872 } 3873 3874 /** 3875 * swap_buf_le16 - swap halves of 16-bit words in place 3876 * @buf: Buffer to swap 3877 * @buf_words: Number of 16-bit words in buffer. 3878 * 3879 * Swap halves of 16-bit words if needed to convert from 3880 * little-endian byte order to native cpu byte order, or 3881 * vice-versa. 3882 * 3883 * LOCKING: 3884 * Inherited from caller. 3885 */ 3886 void swap_buf_le16(u16 *buf, unsigned int buf_words) 3887 { 3888 #ifdef __BIG_ENDIAN 3889 unsigned int i; 3890 3891 for (i = 0; i < buf_words; i++) 3892 buf[i] = le16_to_cpu(buf[i]); 3893 #endif /* __BIG_ENDIAN */ 3894 } 3895 3896 /** 3897 * ata_mmio_data_xfer - Transfer data by MMIO 3898 * @adev: device for this I/O 3899 * @buf: data buffer 3900 * @buflen: buffer length 3901 * @write_data: read/write 3902 * 3903 * Transfer data from/to the device data register by MMIO. 3904 * 3905 * LOCKING: 3906 * Inherited from caller. 3907 */ 3908 3909 void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf, 3910 unsigned int buflen, int write_data) 3911 { 3912 struct ata_port *ap = adev->ap; 3913 unsigned int i; 3914 unsigned int words = buflen >> 1; 3915 u16 *buf16 = (u16 *) buf; 3916 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr; 3917 3918 /* Transfer multiple of 2 bytes */ 3919 if (write_data) { 3920 for (i = 0; i < words; i++) 3921 writew(le16_to_cpu(buf16[i]), mmio); 3922 } else { 3923 for (i = 0; i < words; i++) 3924 buf16[i] = cpu_to_le16(readw(mmio)); 3925 } 3926 3927 /* Transfer trailing 1 byte, if any. */ 3928 if (unlikely(buflen & 0x01)) { 3929 u16 align_buf[1] = { 0 }; 3930 unsigned char *trailing_buf = buf + buflen - 1; 3931 3932 if (write_data) { 3933 memcpy(align_buf, trailing_buf, 1); 3934 writew(le16_to_cpu(align_buf[0]), mmio); 3935 } else { 3936 align_buf[0] = cpu_to_le16(readw(mmio)); 3937 memcpy(trailing_buf, align_buf, 1); 3938 } 3939 } 3940 } 3941 3942 /** 3943 * ata_pio_data_xfer - Transfer data by PIO 3944 * @adev: device to target 3945 * @buf: data buffer 3946 * @buflen: buffer length 3947 * @write_data: read/write 3948 * 3949 * Transfer data from/to the device data register by PIO. 3950 * 3951 * LOCKING: 3952 * Inherited from caller. 3953 */ 3954 3955 void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf, 3956 unsigned int buflen, int write_data) 3957 { 3958 struct ata_port *ap = adev->ap; 3959 unsigned int words = buflen >> 1; 3960 3961 /* Transfer multiple of 2 bytes */ 3962 if (write_data) 3963 outsw(ap->ioaddr.data_addr, buf, words); 3964 else 3965 insw(ap->ioaddr.data_addr, buf, words); 3966 3967 /* Transfer trailing 1 byte, if any. */ 3968 if (unlikely(buflen & 0x01)) { 3969 u16 align_buf[1] = { 0 }; 3970 unsigned char *trailing_buf = buf + buflen - 1; 3971 3972 if (write_data) { 3973 memcpy(align_buf, trailing_buf, 1); 3974 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); 3975 } else { 3976 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr)); 3977 memcpy(trailing_buf, align_buf, 1); 3978 } 3979 } 3980 } 3981 3982 /** 3983 * ata_pio_data_xfer_noirq - Transfer data by PIO 3984 * @adev: device to target 3985 * @buf: data buffer 3986 * @buflen: buffer length 3987 * @write_data: read/write 3988 * 3989 * Transfer data from/to the device data register by PIO. Do the 3990 * transfer with interrupts disabled. 3991 * 3992 * LOCKING: 3993 * Inherited from caller. 3994 */ 3995 3996 void ata_pio_data_xfer_noirq(struct ata_device *adev, unsigned char *buf, 3997 unsigned int buflen, int write_data) 3998 { 3999 unsigned long flags; 4000 local_irq_save(flags); 4001 ata_pio_data_xfer(adev, buf, buflen, write_data); 4002 local_irq_restore(flags); 4003 } 4004 4005 4006 /** 4007 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data. 4008 * @qc: Command on going 4009 * 4010 * Transfer ATA_SECT_SIZE of data from/to the ATA device. 4011 * 4012 * LOCKING: 4013 * Inherited from caller. 4014 */ 4015 4016 static void ata_pio_sector(struct ata_queued_cmd *qc) 4017 { 4018 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); 4019 struct scatterlist *sg = qc->__sg; 4020 struct ata_port *ap = qc->ap; 4021 struct page *page; 4022 unsigned int offset; 4023 unsigned char *buf; 4024 4025 if (qc->cursect == (qc->nsect - 1)) 4026 ap->hsm_task_state = HSM_ST_LAST; 4027 4028 page = sg[qc->cursg].page; 4029 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE; 4030 4031 /* get the current page and offset */ 4032 page = nth_page(page, (offset >> PAGE_SHIFT)); 4033 offset %= PAGE_SIZE; 4034 4035 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); 4036 4037 if (PageHighMem(page)) { 4038 unsigned long flags; 4039 4040 /* FIXME: use a bounce buffer */ 4041 local_irq_save(flags); 4042 buf = kmap_atomic(page, KM_IRQ0); 4043 4044 /* do the actual data transfer */ 4045 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write); 4046 4047 kunmap_atomic(buf, KM_IRQ0); 4048 local_irq_restore(flags); 4049 } else { 4050 buf = page_address(page); 4051 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write); 4052 } 4053 4054 qc->cursect++; 4055 qc->cursg_ofs++; 4056 4057 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) { 4058 qc->cursg++; 4059 qc->cursg_ofs = 0; 4060 } 4061 } 4062 4063 /** 4064 * ata_pio_sectors - Transfer one or many 512-byte sectors. 4065 * @qc: Command on going 4066 * 4067 * Transfer one or many ATA_SECT_SIZE of data from/to the 4068 * ATA device for the DRQ request. 4069 * 4070 * LOCKING: 4071 * Inherited from caller. 4072 */ 4073 4074 static void ata_pio_sectors(struct ata_queued_cmd *qc) 4075 { 4076 if (is_multi_taskfile(&qc->tf)) { 4077 /* READ/WRITE MULTIPLE */ 4078 unsigned int nsect; 4079 4080 WARN_ON(qc->dev->multi_count == 0); 4081 4082 nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count); 4083 while (nsect--) 4084 ata_pio_sector(qc); 4085 } else 4086 ata_pio_sector(qc); 4087 } 4088 4089 /** 4090 * atapi_send_cdb - Write CDB bytes to hardware 4091 * @ap: Port to which ATAPI device is attached. 4092 * @qc: Taskfile currently active 4093 * 4094 * When device has indicated its readiness to accept 4095 * a CDB, this function is called. Send the CDB. 4096 * 4097 * LOCKING: 4098 * caller. 4099 */ 4100 4101 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc) 4102 { 4103 /* send SCSI cdb */ 4104 DPRINTK("send cdb\n"); 4105 WARN_ON(qc->dev->cdb_len < 12); 4106 4107 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1); 4108 ata_altstatus(ap); /* flush */ 4109 4110 switch (qc->tf.protocol) { 4111 case ATA_PROT_ATAPI: 4112 ap->hsm_task_state = HSM_ST; 4113 break; 4114 case ATA_PROT_ATAPI_NODATA: 4115 ap->hsm_task_state = HSM_ST_LAST; 4116 break; 4117 case ATA_PROT_ATAPI_DMA: 4118 ap->hsm_task_state = HSM_ST_LAST; 4119 /* initiate bmdma */ 4120 ap->ops->bmdma_start(qc); 4121 break; 4122 } 4123 } 4124 4125 /** 4126 * __atapi_pio_bytes - Transfer data from/to the ATAPI device. 4127 * @qc: Command on going 4128 * @bytes: number of bytes 4129 * 4130 * Transfer Transfer data from/to the ATAPI device. 4131 * 4132 * LOCKING: 4133 * Inherited from caller. 4134 * 4135 */ 4136 4137 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) 4138 { 4139 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); 4140 struct scatterlist *sg = qc->__sg; 4141 struct ata_port *ap = qc->ap; 4142 struct page *page; 4143 unsigned char *buf; 4144 unsigned int offset, count; 4145 4146 if (qc->curbytes + bytes >= qc->nbytes) 4147 ap->hsm_task_state = HSM_ST_LAST; 4148 4149 next_sg: 4150 if (unlikely(qc->cursg >= qc->n_elem)) { 4151 /* 4152 * The end of qc->sg is reached and the device expects 4153 * more data to transfer. In order not to overrun qc->sg 4154 * and fulfill length specified in the byte count register, 4155 * - for read case, discard trailing data from the device 4156 * - for write case, padding zero data to the device 4157 */ 4158 u16 pad_buf[1] = { 0 }; 4159 unsigned int words = bytes >> 1; 4160 unsigned int i; 4161 4162 if (words) /* warning if bytes > 1 */ 4163 ata_dev_printk(qc->dev, KERN_WARNING, 4164 "%u bytes trailing data\n", bytes); 4165 4166 for (i = 0; i < words; i++) 4167 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write); 4168 4169 ap->hsm_task_state = HSM_ST_LAST; 4170 return; 4171 } 4172 4173 sg = &qc->__sg[qc->cursg]; 4174 4175 page = sg->page; 4176 offset = sg->offset + qc->cursg_ofs; 4177 4178 /* get the current page and offset */ 4179 page = nth_page(page, (offset >> PAGE_SHIFT)); 4180 offset %= PAGE_SIZE; 4181 4182 /* don't overrun current sg */ 4183 count = min(sg->length - qc->cursg_ofs, bytes); 4184 4185 /* don't cross page boundaries */ 4186 count = min(count, (unsigned int)PAGE_SIZE - offset); 4187 4188 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); 4189 4190 if (PageHighMem(page)) { 4191 unsigned long flags; 4192 4193 /* FIXME: use bounce buffer */ 4194 local_irq_save(flags); 4195 buf = kmap_atomic(page, KM_IRQ0); 4196 4197 /* do the actual data transfer */ 4198 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); 4199 4200 kunmap_atomic(buf, KM_IRQ0); 4201 local_irq_restore(flags); 4202 } else { 4203 buf = page_address(page); 4204 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); 4205 } 4206 4207 bytes -= count; 4208 qc->curbytes += count; 4209 qc->cursg_ofs += count; 4210 4211 if (qc->cursg_ofs == sg->length) { 4212 qc->cursg++; 4213 qc->cursg_ofs = 0; 4214 } 4215 4216 if (bytes) 4217 goto next_sg; 4218 } 4219 4220 /** 4221 * atapi_pio_bytes - Transfer data from/to the ATAPI device. 4222 * @qc: Command on going 4223 * 4224 * Transfer Transfer data from/to the ATAPI device. 4225 * 4226 * LOCKING: 4227 * Inherited from caller. 4228 */ 4229 4230 static void atapi_pio_bytes(struct ata_queued_cmd *qc) 4231 { 4232 struct ata_port *ap = qc->ap; 4233 struct ata_device *dev = qc->dev; 4234 unsigned int ireason, bc_lo, bc_hi, bytes; 4235 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; 4236 4237 /* Abuse qc->result_tf for temp storage of intermediate TF 4238 * here to save some kernel stack usage. 4239 * For normal completion, qc->result_tf is not relevant. For 4240 * error, qc->result_tf is later overwritten by ata_qc_complete(). 4241 * So, the correctness of qc->result_tf is not affected. 4242 */ 4243 ap->ops->tf_read(ap, &qc->result_tf); 4244 ireason = qc->result_tf.nsect; 4245 bc_lo = qc->result_tf.lbam; 4246 bc_hi = qc->result_tf.lbah; 4247 bytes = (bc_hi << 8) | bc_lo; 4248 4249 /* shall be cleared to zero, indicating xfer of data */ 4250 if (ireason & (1 << 0)) 4251 goto err_out; 4252 4253 /* make sure transfer direction matches expected */ 4254 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; 4255 if (do_write != i_write) 4256 goto err_out; 4257 4258 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes); 4259 4260 __atapi_pio_bytes(qc, bytes); 4261 4262 return; 4263 4264 err_out: 4265 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n"); 4266 qc->err_mask |= AC_ERR_HSM; 4267 ap->hsm_task_state = HSM_ST_ERR; 4268 } 4269 4270 /** 4271 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue. 4272 * @ap: the target ata_port 4273 * @qc: qc on going 4274 * 4275 * RETURNS: 4276 * 1 if ok in workqueue, 0 otherwise. 4277 */ 4278 4279 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc) 4280 { 4281 if (qc->tf.flags & ATA_TFLAG_POLLING) 4282 return 1; 4283 4284 if (ap->hsm_task_state == HSM_ST_FIRST) { 4285 if (qc->tf.protocol == ATA_PROT_PIO && 4286 (qc->tf.flags & ATA_TFLAG_WRITE)) 4287 return 1; 4288 4289 if (is_atapi_taskfile(&qc->tf) && 4290 !(qc->dev->flags & ATA_DFLAG_CDB_INTR)) 4291 return 1; 4292 } 4293 4294 return 0; 4295 } 4296 4297 /** 4298 * ata_hsm_qc_complete - finish a qc running on standard HSM 4299 * @qc: Command to complete 4300 * @in_wq: 1 if called from workqueue, 0 otherwise 4301 * 4302 * Finish @qc which is running on standard HSM. 4303 * 4304 * LOCKING: 4305 * If @in_wq is zero, spin_lock_irqsave(host lock). 4306 * Otherwise, none on entry and grabs host lock. 4307 */ 4308 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq) 4309 { 4310 struct ata_port *ap = qc->ap; 4311 unsigned long flags; 4312 4313 if (ap->ops->error_handler) { 4314 if (in_wq) { 4315 spin_lock_irqsave(ap->lock, flags); 4316 4317 /* EH might have kicked in while host lock is 4318 * released. 4319 */ 4320 qc = ata_qc_from_tag(ap, qc->tag); 4321 if (qc) { 4322 if (likely(!(qc->err_mask & AC_ERR_HSM))) { 4323 ata_irq_on(ap); 4324 ata_qc_complete(qc); 4325 } else 4326 ata_port_freeze(ap); 4327 } 4328 4329 spin_unlock_irqrestore(ap->lock, flags); 4330 } else { 4331 if (likely(!(qc->err_mask & AC_ERR_HSM))) 4332 ata_qc_complete(qc); 4333 else 4334 ata_port_freeze(ap); 4335 } 4336 } else { 4337 if (in_wq) { 4338 spin_lock_irqsave(ap->lock, flags); 4339 ata_irq_on(ap); 4340 ata_qc_complete(qc); 4341 spin_unlock_irqrestore(ap->lock, flags); 4342 } else 4343 ata_qc_complete(qc); 4344 } 4345 4346 ata_altstatus(ap); /* flush */ 4347 } 4348 4349 /** 4350 * ata_hsm_move - move the HSM to the next state. 4351 * @ap: the target ata_port 4352 * @qc: qc on going 4353 * @status: current device status 4354 * @in_wq: 1 if called from workqueue, 0 otherwise 4355 * 4356 * RETURNS: 4357 * 1 when poll next status needed, 0 otherwise. 4358 */ 4359 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc, 4360 u8 status, int in_wq) 4361 { 4362 unsigned long flags = 0; 4363 int poll_next; 4364 4365 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0); 4366 4367 /* Make sure ata_qc_issue_prot() does not throw things 4368 * like DMA polling into the workqueue. Notice that 4369 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING). 4370 */ 4371 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc)); 4372 4373 fsm_start: 4374 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n", 4375 ap->id, qc->tf.protocol, ap->hsm_task_state, status); 4376 4377 switch (ap->hsm_task_state) { 4378 case HSM_ST_FIRST: 4379 /* Send first data block or PACKET CDB */ 4380 4381 /* If polling, we will stay in the work queue after 4382 * sending the data. Otherwise, interrupt handler 4383 * takes over after sending the data. 4384 */ 4385 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING); 4386 4387 /* check device status */ 4388 if (unlikely((status & ATA_DRQ) == 0)) { 4389 /* handle BSY=0, DRQ=0 as error */ 4390 if (likely(status & (ATA_ERR | ATA_DF))) 4391 /* device stops HSM for abort/error */ 4392 qc->err_mask |= AC_ERR_DEV; 4393 else 4394 /* HSM violation. Let EH handle this */ 4395 qc->err_mask |= AC_ERR_HSM; 4396 4397 ap->hsm_task_state = HSM_ST_ERR; 4398 goto fsm_start; 4399 } 4400 4401 /* Device should not ask for data transfer (DRQ=1) 4402 * when it finds something wrong. 4403 * We ignore DRQ here and stop the HSM by 4404 * changing hsm_task_state to HSM_ST_ERR and 4405 * let the EH abort the command or reset the device. 4406 */ 4407 if (unlikely(status & (ATA_ERR | ATA_DF))) { 4408 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n", 4409 ap->id, status); 4410 qc->err_mask |= AC_ERR_HSM; 4411 ap->hsm_task_state = HSM_ST_ERR; 4412 goto fsm_start; 4413 } 4414 4415 /* Send the CDB (atapi) or the first data block (ata pio out). 4416 * During the state transition, interrupt handler shouldn't 4417 * be invoked before the data transfer is complete and 4418 * hsm_task_state is changed. Hence, the following locking. 4419 */ 4420 if (in_wq) 4421 spin_lock_irqsave(ap->lock, flags); 4422 4423 if (qc->tf.protocol == ATA_PROT_PIO) { 4424 /* PIO data out protocol. 4425 * send first data block. 4426 */ 4427 4428 /* ata_pio_sectors() might change the state 4429 * to HSM_ST_LAST. so, the state is changed here 4430 * before ata_pio_sectors(). 4431 */ 4432 ap->hsm_task_state = HSM_ST; 4433 ata_pio_sectors(qc); 4434 ata_altstatus(ap); /* flush */ 4435 } else 4436 /* send CDB */ 4437 atapi_send_cdb(ap, qc); 4438 4439 if (in_wq) 4440 spin_unlock_irqrestore(ap->lock, flags); 4441 4442 /* if polling, ata_pio_task() handles the rest. 4443 * otherwise, interrupt handler takes over from here. 4444 */ 4445 break; 4446 4447 case HSM_ST: 4448 /* complete command or read/write the data register */ 4449 if (qc->tf.protocol == ATA_PROT_ATAPI) { 4450 /* ATAPI PIO protocol */ 4451 if ((status & ATA_DRQ) == 0) { 4452 /* No more data to transfer or device error. 4453 * Device error will be tagged in HSM_ST_LAST. 4454 */ 4455 ap->hsm_task_state = HSM_ST_LAST; 4456 goto fsm_start; 4457 } 4458 4459 /* Device should not ask for data transfer (DRQ=1) 4460 * when it finds something wrong. 4461 * We ignore DRQ here and stop the HSM by 4462 * changing hsm_task_state to HSM_ST_ERR and 4463 * let the EH abort the command or reset the device. 4464 */ 4465 if (unlikely(status & (ATA_ERR | ATA_DF))) { 4466 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n", 4467 ap->id, status); 4468 qc->err_mask |= AC_ERR_HSM; 4469 ap->hsm_task_state = HSM_ST_ERR; 4470 goto fsm_start; 4471 } 4472 4473 atapi_pio_bytes(qc); 4474 4475 if (unlikely(ap->hsm_task_state == HSM_ST_ERR)) 4476 /* bad ireason reported by device */ 4477 goto fsm_start; 4478 4479 } else { 4480 /* ATA PIO protocol */ 4481 if (unlikely((status & ATA_DRQ) == 0)) { 4482 /* handle BSY=0, DRQ=0 as error */ 4483 if (likely(status & (ATA_ERR | ATA_DF))) 4484 /* device stops HSM for abort/error */ 4485 qc->err_mask |= AC_ERR_DEV; 4486 else 4487 /* HSM violation. Let EH handle this. 4488 * Phantom devices also trigger this 4489 * condition. Mark hint. 4490 */ 4491 qc->err_mask |= AC_ERR_HSM | 4492 AC_ERR_NODEV_HINT; 4493 4494 ap->hsm_task_state = HSM_ST_ERR; 4495 goto fsm_start; 4496 } 4497 4498 /* For PIO reads, some devices may ask for 4499 * data transfer (DRQ=1) alone with ERR=1. 4500 * We respect DRQ here and transfer one 4501 * block of junk data before changing the 4502 * hsm_task_state to HSM_ST_ERR. 4503 * 4504 * For PIO writes, ERR=1 DRQ=1 doesn't make 4505 * sense since the data block has been 4506 * transferred to the device. 4507 */ 4508 if (unlikely(status & (ATA_ERR | ATA_DF))) { 4509 /* data might be corrputed */ 4510 qc->err_mask |= AC_ERR_DEV; 4511 4512 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) { 4513 ata_pio_sectors(qc); 4514 ata_altstatus(ap); 4515 status = ata_wait_idle(ap); 4516 } 4517 4518 if (status & (ATA_BUSY | ATA_DRQ)) 4519 qc->err_mask |= AC_ERR_HSM; 4520 4521 /* ata_pio_sectors() might change the 4522 * state to HSM_ST_LAST. so, the state 4523 * is changed after ata_pio_sectors(). 4524 */ 4525 ap->hsm_task_state = HSM_ST_ERR; 4526 goto fsm_start; 4527 } 4528 4529 ata_pio_sectors(qc); 4530 4531 if (ap->hsm_task_state == HSM_ST_LAST && 4532 (!(qc->tf.flags & ATA_TFLAG_WRITE))) { 4533 /* all data read */ 4534 ata_altstatus(ap); 4535 status = ata_wait_idle(ap); 4536 goto fsm_start; 4537 } 4538 } 4539 4540 ata_altstatus(ap); /* flush */ 4541 poll_next = 1; 4542 break; 4543 4544 case HSM_ST_LAST: 4545 if (unlikely(!ata_ok(status))) { 4546 qc->err_mask |= __ac_err_mask(status); 4547 ap->hsm_task_state = HSM_ST_ERR; 4548 goto fsm_start; 4549 } 4550 4551 /* no more data to transfer */ 4552 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n", 4553 ap->id, qc->dev->devno, status); 4554 4555 WARN_ON(qc->err_mask); 4556 4557 ap->hsm_task_state = HSM_ST_IDLE; 4558 4559 /* complete taskfile transaction */ 4560 ata_hsm_qc_complete(qc, in_wq); 4561 4562 poll_next = 0; 4563 break; 4564 4565 case HSM_ST_ERR: 4566 /* make sure qc->err_mask is available to 4567 * know what's wrong and recover 4568 */ 4569 WARN_ON(qc->err_mask == 0); 4570 4571 ap->hsm_task_state = HSM_ST_IDLE; 4572 4573 /* complete taskfile transaction */ 4574 ata_hsm_qc_complete(qc, in_wq); 4575 4576 poll_next = 0; 4577 break; 4578 default: 4579 poll_next = 0; 4580 BUG(); 4581 } 4582 4583 return poll_next; 4584 } 4585 4586 static void ata_pio_task(struct work_struct *work) 4587 { 4588 struct ata_port *ap = 4589 container_of(work, struct ata_port, port_task.work); 4590 struct ata_queued_cmd *qc = ap->port_task_data; 4591 u8 status; 4592 int poll_next; 4593 4594 fsm_start: 4595 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE); 4596 4597 /* 4598 * This is purely heuristic. This is a fast path. 4599 * Sometimes when we enter, BSY will be cleared in 4600 * a chk-status or two. If not, the drive is probably seeking 4601 * or something. Snooze for a couple msecs, then 4602 * chk-status again. If still busy, queue delayed work. 4603 */ 4604 status = ata_busy_wait(ap, ATA_BUSY, 5); 4605 if (status & ATA_BUSY) { 4606 msleep(2); 4607 status = ata_busy_wait(ap, ATA_BUSY, 10); 4608 if (status & ATA_BUSY) { 4609 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE); 4610 return; 4611 } 4612 } 4613 4614 /* move the HSM */ 4615 poll_next = ata_hsm_move(ap, qc, status, 1); 4616 4617 /* another command or interrupt handler 4618 * may be running at this point. 4619 */ 4620 if (poll_next) 4621 goto fsm_start; 4622 } 4623 4624 /** 4625 * ata_qc_new - Request an available ATA command, for queueing 4626 * @ap: Port associated with device @dev 4627 * @dev: Device from whom we request an available command structure 4628 * 4629 * LOCKING: 4630 * None. 4631 */ 4632 4633 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) 4634 { 4635 struct ata_queued_cmd *qc = NULL; 4636 unsigned int i; 4637 4638 /* no command while frozen */ 4639 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN)) 4640 return NULL; 4641 4642 /* the last tag is reserved for internal command. */ 4643 for (i = 0; i < ATA_MAX_QUEUE - 1; i++) 4644 if (!test_and_set_bit(i, &ap->qc_allocated)) { 4645 qc = __ata_qc_from_tag(ap, i); 4646 break; 4647 } 4648 4649 if (qc) 4650 qc->tag = i; 4651 4652 return qc; 4653 } 4654 4655 /** 4656 * ata_qc_new_init - Request an available ATA command, and initialize it 4657 * @dev: Device from whom we request an available command structure 4658 * 4659 * LOCKING: 4660 * None. 4661 */ 4662 4663 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev) 4664 { 4665 struct ata_port *ap = dev->ap; 4666 struct ata_queued_cmd *qc; 4667 4668 qc = ata_qc_new(ap); 4669 if (qc) { 4670 qc->scsicmd = NULL; 4671 qc->ap = ap; 4672 qc->dev = dev; 4673 4674 ata_qc_reinit(qc); 4675 } 4676 4677 return qc; 4678 } 4679 4680 /** 4681 * ata_qc_free - free unused ata_queued_cmd 4682 * @qc: Command to complete 4683 * 4684 * Designed to free unused ata_queued_cmd object 4685 * in case something prevents using it. 4686 * 4687 * LOCKING: 4688 * spin_lock_irqsave(host lock) 4689 */ 4690 void ata_qc_free(struct ata_queued_cmd *qc) 4691 { 4692 struct ata_port *ap = qc->ap; 4693 unsigned int tag; 4694 4695 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ 4696 4697 qc->flags = 0; 4698 tag = qc->tag; 4699 if (likely(ata_tag_valid(tag))) { 4700 qc->tag = ATA_TAG_POISON; 4701 clear_bit(tag, &ap->qc_allocated); 4702 } 4703 } 4704 4705 void __ata_qc_complete(struct ata_queued_cmd *qc) 4706 { 4707 struct ata_port *ap = qc->ap; 4708 4709 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ 4710 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE)); 4711 4712 if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) 4713 ata_sg_clean(qc); 4714 4715 /* command should be marked inactive atomically with qc completion */ 4716 if (qc->tf.protocol == ATA_PROT_NCQ) 4717 ap->sactive &= ~(1 << qc->tag); 4718 else 4719 ap->active_tag = ATA_TAG_POISON; 4720 4721 /* atapi: mark qc as inactive to prevent the interrupt handler 4722 * from completing the command twice later, before the error handler 4723 * is called. (when rc != 0 and atapi request sense is needed) 4724 */ 4725 qc->flags &= ~ATA_QCFLAG_ACTIVE; 4726 ap->qc_active &= ~(1 << qc->tag); 4727 4728 /* call completion callback */ 4729 qc->complete_fn(qc); 4730 } 4731 4732 static void fill_result_tf(struct ata_queued_cmd *qc) 4733 { 4734 struct ata_port *ap = qc->ap; 4735 4736 ap->ops->tf_read(ap, &qc->result_tf); 4737 qc->result_tf.flags = qc->tf.flags; 4738 } 4739 4740 /** 4741 * ata_qc_complete - Complete an active ATA command 4742 * @qc: Command to complete 4743 * @err_mask: ATA Status register contents 4744 * 4745 * Indicate to the mid and upper layers that an ATA 4746 * command has completed, with either an ok or not-ok status. 4747 * 4748 * LOCKING: 4749 * spin_lock_irqsave(host lock) 4750 */ 4751 void ata_qc_complete(struct ata_queued_cmd *qc) 4752 { 4753 struct ata_port *ap = qc->ap; 4754 4755 /* XXX: New EH and old EH use different mechanisms to 4756 * synchronize EH with regular execution path. 4757 * 4758 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED. 4759 * Normal execution path is responsible for not accessing a 4760 * failed qc. libata core enforces the rule by returning NULL 4761 * from ata_qc_from_tag() for failed qcs. 4762 * 4763 * Old EH depends on ata_qc_complete() nullifying completion 4764 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does 4765 * not synchronize with interrupt handler. Only PIO task is 4766 * taken care of. 4767 */ 4768 if (ap->ops->error_handler) { 4769 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN); 4770 4771 if (unlikely(qc->err_mask)) 4772 qc->flags |= ATA_QCFLAG_FAILED; 4773 4774 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) { 4775 if (!ata_tag_internal(qc->tag)) { 4776 /* always fill result TF for failed qc */ 4777 fill_result_tf(qc); 4778 ata_qc_schedule_eh(qc); 4779 return; 4780 } 4781 } 4782 4783 /* read result TF if requested */ 4784 if (qc->flags & ATA_QCFLAG_RESULT_TF) 4785 fill_result_tf(qc); 4786 4787 __ata_qc_complete(qc); 4788 } else { 4789 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED) 4790 return; 4791 4792 /* read result TF if failed or requested */ 4793 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF) 4794 fill_result_tf(qc); 4795 4796 __ata_qc_complete(qc); 4797 } 4798 } 4799 4800 /** 4801 * ata_qc_complete_multiple - Complete multiple qcs successfully 4802 * @ap: port in question 4803 * @qc_active: new qc_active mask 4804 * @finish_qc: LLDD callback invoked before completing a qc 4805 * 4806 * Complete in-flight commands. This functions is meant to be 4807 * called from low-level driver's interrupt routine to complete 4808 * requests normally. ap->qc_active and @qc_active is compared 4809 * and commands are completed accordingly. 4810 * 4811 * LOCKING: 4812 * spin_lock_irqsave(host lock) 4813 * 4814 * RETURNS: 4815 * Number of completed commands on success, -errno otherwise. 4816 */ 4817 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active, 4818 void (*finish_qc)(struct ata_queued_cmd *)) 4819 { 4820 int nr_done = 0; 4821 u32 done_mask; 4822 int i; 4823 4824 done_mask = ap->qc_active ^ qc_active; 4825 4826 if (unlikely(done_mask & qc_active)) { 4827 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition " 4828 "(%08x->%08x)\n", ap->qc_active, qc_active); 4829 return -EINVAL; 4830 } 4831 4832 for (i = 0; i < ATA_MAX_QUEUE; i++) { 4833 struct ata_queued_cmd *qc; 4834 4835 if (!(done_mask & (1 << i))) 4836 continue; 4837 4838 if ((qc = ata_qc_from_tag(ap, i))) { 4839 if (finish_qc) 4840 finish_qc(qc); 4841 ata_qc_complete(qc); 4842 nr_done++; 4843 } 4844 } 4845 4846 return nr_done; 4847 } 4848 4849 static inline int ata_should_dma_map(struct ata_queued_cmd *qc) 4850 { 4851 struct ata_port *ap = qc->ap; 4852 4853 switch (qc->tf.protocol) { 4854 case ATA_PROT_NCQ: 4855 case ATA_PROT_DMA: 4856 case ATA_PROT_ATAPI_DMA: 4857 return 1; 4858 4859 case ATA_PROT_ATAPI: 4860 case ATA_PROT_PIO: 4861 if (ap->flags & ATA_FLAG_PIO_DMA) 4862 return 1; 4863 4864 /* fall through */ 4865 4866 default: 4867 return 0; 4868 } 4869 4870 /* never reached */ 4871 } 4872 4873 /** 4874 * ata_qc_issue - issue taskfile to device 4875 * @qc: command to issue to device 4876 * 4877 * Prepare an ATA command to submission to device. 4878 * This includes mapping the data into a DMA-able 4879 * area, filling in the S/G table, and finally 4880 * writing the taskfile to hardware, starting the command. 4881 * 4882 * LOCKING: 4883 * spin_lock_irqsave(host lock) 4884 */ 4885 void ata_qc_issue(struct ata_queued_cmd *qc) 4886 { 4887 struct ata_port *ap = qc->ap; 4888 4889 /* Make sure only one non-NCQ command is outstanding. The 4890 * check is skipped for old EH because it reuses active qc to 4891 * request ATAPI sense. 4892 */ 4893 WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag)); 4894 4895 if (qc->tf.protocol == ATA_PROT_NCQ) { 4896 WARN_ON(ap->sactive & (1 << qc->tag)); 4897 ap->sactive |= 1 << qc->tag; 4898 } else { 4899 WARN_ON(ap->sactive); 4900 ap->active_tag = qc->tag; 4901 } 4902 4903 qc->flags |= ATA_QCFLAG_ACTIVE; 4904 ap->qc_active |= 1 << qc->tag; 4905 4906 if (ata_should_dma_map(qc)) { 4907 if (qc->flags & ATA_QCFLAG_SG) { 4908 if (ata_sg_setup(qc)) 4909 goto sg_err; 4910 } else if (qc->flags & ATA_QCFLAG_SINGLE) { 4911 if (ata_sg_setup_one(qc)) 4912 goto sg_err; 4913 } 4914 } else { 4915 qc->flags &= ~ATA_QCFLAG_DMAMAP; 4916 } 4917 4918 ap->ops->qc_prep(qc); 4919 4920 qc->err_mask |= ap->ops->qc_issue(qc); 4921 if (unlikely(qc->err_mask)) 4922 goto err; 4923 return; 4924 4925 sg_err: 4926 qc->flags &= ~ATA_QCFLAG_DMAMAP; 4927 qc->err_mask |= AC_ERR_SYSTEM; 4928 err: 4929 ata_qc_complete(qc); 4930 } 4931 4932 /** 4933 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner 4934 * @qc: command to issue to device 4935 * 4936 * Using various libata functions and hooks, this function 4937 * starts an ATA command. ATA commands are grouped into 4938 * classes called "protocols", and issuing each type of protocol 4939 * is slightly different. 4940 * 4941 * May be used as the qc_issue() entry in ata_port_operations. 4942 * 4943 * LOCKING: 4944 * spin_lock_irqsave(host lock) 4945 * 4946 * RETURNS: 4947 * Zero on success, AC_ERR_* mask on failure 4948 */ 4949 4950 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc) 4951 { 4952 struct ata_port *ap = qc->ap; 4953 4954 /* Use polling pio if the LLD doesn't handle 4955 * interrupt driven pio and atapi CDB interrupt. 4956 */ 4957 if (ap->flags & ATA_FLAG_PIO_POLLING) { 4958 switch (qc->tf.protocol) { 4959 case ATA_PROT_PIO: 4960 case ATA_PROT_NODATA: 4961 case ATA_PROT_ATAPI: 4962 case ATA_PROT_ATAPI_NODATA: 4963 qc->tf.flags |= ATA_TFLAG_POLLING; 4964 break; 4965 case ATA_PROT_ATAPI_DMA: 4966 if (qc->dev->flags & ATA_DFLAG_CDB_INTR) 4967 /* see ata_dma_blacklisted() */ 4968 BUG(); 4969 break; 4970 default: 4971 break; 4972 } 4973 } 4974 4975 /* Some controllers show flaky interrupt behavior after 4976 * setting xfer mode. Use polling instead. 4977 */ 4978 if (unlikely(qc->tf.command == ATA_CMD_SET_FEATURES && 4979 qc->tf.feature == SETFEATURES_XFER) && 4980 (ap->flags & ATA_FLAG_SETXFER_POLLING)) 4981 qc->tf.flags |= ATA_TFLAG_POLLING; 4982 4983 /* select the device */ 4984 ata_dev_select(ap, qc->dev->devno, 1, 0); 4985 4986 /* start the command */ 4987 switch (qc->tf.protocol) { 4988 case ATA_PROT_NODATA: 4989 if (qc->tf.flags & ATA_TFLAG_POLLING) 4990 ata_qc_set_polling(qc); 4991 4992 ata_tf_to_host(ap, &qc->tf); 4993 ap->hsm_task_state = HSM_ST_LAST; 4994 4995 if (qc->tf.flags & ATA_TFLAG_POLLING) 4996 ata_port_queue_task(ap, ata_pio_task, qc, 0); 4997 4998 break; 4999 5000 case ATA_PROT_DMA: 5001 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); 5002 5003 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ 5004 ap->ops->bmdma_setup(qc); /* set up bmdma */ 5005 ap->ops->bmdma_start(qc); /* initiate bmdma */ 5006 ap->hsm_task_state = HSM_ST_LAST; 5007 break; 5008 5009 case ATA_PROT_PIO: 5010 if (qc->tf.flags & ATA_TFLAG_POLLING) 5011 ata_qc_set_polling(qc); 5012 5013 ata_tf_to_host(ap, &qc->tf); 5014 5015 if (qc->tf.flags & ATA_TFLAG_WRITE) { 5016 /* PIO data out protocol */ 5017 ap->hsm_task_state = HSM_ST_FIRST; 5018 ata_port_queue_task(ap, ata_pio_task, qc, 0); 5019 5020 /* always send first data block using 5021 * the ata_pio_task() codepath. 5022 */ 5023 } else { 5024 /* PIO data in protocol */ 5025 ap->hsm_task_state = HSM_ST; 5026 5027 if (qc->tf.flags & ATA_TFLAG_POLLING) 5028 ata_port_queue_task(ap, ata_pio_task, qc, 0); 5029 5030 /* if polling, ata_pio_task() handles the rest. 5031 * otherwise, interrupt handler takes over from here. 5032 */ 5033 } 5034 5035 break; 5036 5037 case ATA_PROT_ATAPI: 5038 case ATA_PROT_ATAPI_NODATA: 5039 if (qc->tf.flags & ATA_TFLAG_POLLING) 5040 ata_qc_set_polling(qc); 5041 5042 ata_tf_to_host(ap, &qc->tf); 5043 5044 ap->hsm_task_state = HSM_ST_FIRST; 5045 5046 /* send cdb by polling if no cdb interrupt */ 5047 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) || 5048 (qc->tf.flags & ATA_TFLAG_POLLING)) 5049 ata_port_queue_task(ap, ata_pio_task, qc, 0); 5050 break; 5051 5052 case ATA_PROT_ATAPI_DMA: 5053 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); 5054 5055 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ 5056 ap->ops->bmdma_setup(qc); /* set up bmdma */ 5057 ap->hsm_task_state = HSM_ST_FIRST; 5058 5059 /* send cdb by polling if no cdb interrupt */ 5060 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) 5061 ata_port_queue_task(ap, ata_pio_task, qc, 0); 5062 break; 5063 5064 default: 5065 WARN_ON(1); 5066 return AC_ERR_SYSTEM; 5067 } 5068 5069 return 0; 5070 } 5071 5072 /** 5073 * ata_host_intr - Handle host interrupt for given (port, task) 5074 * @ap: Port on which interrupt arrived (possibly...) 5075 * @qc: Taskfile currently active in engine 5076 * 5077 * Handle host interrupt for given queued command. Currently, 5078 * only DMA interrupts are handled. All other commands are 5079 * handled via polling with interrupts disabled (nIEN bit). 5080 * 5081 * LOCKING: 5082 * spin_lock_irqsave(host lock) 5083 * 5084 * RETURNS: 5085 * One if interrupt was handled, zero if not (shared irq). 5086 */ 5087 5088 inline unsigned int ata_host_intr (struct ata_port *ap, 5089 struct ata_queued_cmd *qc) 5090 { 5091 struct ata_eh_info *ehi = &ap->eh_info; 5092 u8 status, host_stat = 0; 5093 5094 VPRINTK("ata%u: protocol %d task_state %d\n", 5095 ap->id, qc->tf.protocol, ap->hsm_task_state); 5096 5097 /* Check whether we are expecting interrupt in this state */ 5098 switch (ap->hsm_task_state) { 5099 case HSM_ST_FIRST: 5100 /* Some pre-ATAPI-4 devices assert INTRQ 5101 * at this state when ready to receive CDB. 5102 */ 5103 5104 /* Check the ATA_DFLAG_CDB_INTR flag is enough here. 5105 * The flag was turned on only for atapi devices. 5106 * No need to check is_atapi_taskfile(&qc->tf) again. 5107 */ 5108 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) 5109 goto idle_irq; 5110 break; 5111 case HSM_ST_LAST: 5112 if (qc->tf.protocol == ATA_PROT_DMA || 5113 qc->tf.protocol == ATA_PROT_ATAPI_DMA) { 5114 /* check status of DMA engine */ 5115 host_stat = ap->ops->bmdma_status(ap); 5116 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat); 5117 5118 /* if it's not our irq... */ 5119 if (!(host_stat & ATA_DMA_INTR)) 5120 goto idle_irq; 5121 5122 /* before we do anything else, clear DMA-Start bit */ 5123 ap->ops->bmdma_stop(qc); 5124 5125 if (unlikely(host_stat & ATA_DMA_ERR)) { 5126 /* error when transfering data to/from memory */ 5127 qc->err_mask |= AC_ERR_HOST_BUS; 5128 ap->hsm_task_state = HSM_ST_ERR; 5129 } 5130 } 5131 break; 5132 case HSM_ST: 5133 break; 5134 default: 5135 goto idle_irq; 5136 } 5137 5138 /* check altstatus */ 5139 status = ata_altstatus(ap); 5140 if (status & ATA_BUSY) 5141 goto idle_irq; 5142 5143 /* check main status, clearing INTRQ */ 5144 status = ata_chk_status(ap); 5145 if (unlikely(status & ATA_BUSY)) 5146 goto idle_irq; 5147 5148 /* ack bmdma irq events */ 5149 ap->ops->irq_clear(ap); 5150 5151 ata_hsm_move(ap, qc, status, 0); 5152 5153 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA || 5154 qc->tf.protocol == ATA_PROT_ATAPI_DMA)) 5155 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat); 5156 5157 return 1; /* irq handled */ 5158 5159 idle_irq: 5160 ap->stats.idle_irq++; 5161 5162 #ifdef ATA_IRQ_TRAP 5163 if ((ap->stats.idle_irq % 1000) == 0) { 5164 ata_irq_ack(ap, 0); /* debug trap */ 5165 ata_port_printk(ap, KERN_WARNING, "irq trap\n"); 5166 return 1; 5167 } 5168 #endif 5169 return 0; /* irq not handled */ 5170 } 5171 5172 /** 5173 * ata_interrupt - Default ATA host interrupt handler 5174 * @irq: irq line (unused) 5175 * @dev_instance: pointer to our ata_host information structure 5176 * 5177 * Default interrupt handler for PCI IDE devices. Calls 5178 * ata_host_intr() for each port that is not disabled. 5179 * 5180 * LOCKING: 5181 * Obtains host lock during operation. 5182 * 5183 * RETURNS: 5184 * IRQ_NONE or IRQ_HANDLED. 5185 */ 5186 5187 irqreturn_t ata_interrupt (int irq, void *dev_instance) 5188 { 5189 struct ata_host *host = dev_instance; 5190 unsigned int i; 5191 unsigned int handled = 0; 5192 unsigned long flags; 5193 5194 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ 5195 spin_lock_irqsave(&host->lock, flags); 5196 5197 for (i = 0; i < host->n_ports; i++) { 5198 struct ata_port *ap; 5199 5200 ap = host->ports[i]; 5201 if (ap && 5202 !(ap->flags & ATA_FLAG_DISABLED)) { 5203 struct ata_queued_cmd *qc; 5204 5205 qc = ata_qc_from_tag(ap, ap->active_tag); 5206 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && 5207 (qc->flags & ATA_QCFLAG_ACTIVE)) 5208 handled |= ata_host_intr(ap, qc); 5209 } 5210 } 5211 5212 spin_unlock_irqrestore(&host->lock, flags); 5213 5214 return IRQ_RETVAL(handled); 5215 } 5216 5217 /** 5218 * sata_scr_valid - test whether SCRs are accessible 5219 * @ap: ATA port to test SCR accessibility for 5220 * 5221 * Test whether SCRs are accessible for @ap. 5222 * 5223 * LOCKING: 5224 * None. 5225 * 5226 * RETURNS: 5227 * 1 if SCRs are accessible, 0 otherwise. 5228 */ 5229 int sata_scr_valid(struct ata_port *ap) 5230 { 5231 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read; 5232 } 5233 5234 /** 5235 * sata_scr_read - read SCR register of the specified port 5236 * @ap: ATA port to read SCR for 5237 * @reg: SCR to read 5238 * @val: Place to store read value 5239 * 5240 * Read SCR register @reg of @ap into *@val. This function is 5241 * guaranteed to succeed if the cable type of the port is SATA 5242 * and the port implements ->scr_read. 5243 * 5244 * LOCKING: 5245 * None. 5246 * 5247 * RETURNS: 5248 * 0 on success, negative errno on failure. 5249 */ 5250 int sata_scr_read(struct ata_port *ap, int reg, u32 *val) 5251 { 5252 if (sata_scr_valid(ap)) { 5253 *val = ap->ops->scr_read(ap, reg); 5254 return 0; 5255 } 5256 return -EOPNOTSUPP; 5257 } 5258 5259 /** 5260 * sata_scr_write - write SCR register of the specified port 5261 * @ap: ATA port to write SCR for 5262 * @reg: SCR to write 5263 * @val: value to write 5264 * 5265 * Write @val to SCR register @reg of @ap. This function is 5266 * guaranteed to succeed if the cable type of the port is SATA 5267 * and the port implements ->scr_read. 5268 * 5269 * LOCKING: 5270 * None. 5271 * 5272 * RETURNS: 5273 * 0 on success, negative errno on failure. 5274 */ 5275 int sata_scr_write(struct ata_port *ap, int reg, u32 val) 5276 { 5277 if (sata_scr_valid(ap)) { 5278 ap->ops->scr_write(ap, reg, val); 5279 return 0; 5280 } 5281 return -EOPNOTSUPP; 5282 } 5283 5284 /** 5285 * sata_scr_write_flush - write SCR register of the specified port and flush 5286 * @ap: ATA port to write SCR for 5287 * @reg: SCR to write 5288 * @val: value to write 5289 * 5290 * This function is identical to sata_scr_write() except that this 5291 * function performs flush after writing to the register. 5292 * 5293 * LOCKING: 5294 * None. 5295 * 5296 * RETURNS: 5297 * 0 on success, negative errno on failure. 5298 */ 5299 int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val) 5300 { 5301 if (sata_scr_valid(ap)) { 5302 ap->ops->scr_write(ap, reg, val); 5303 ap->ops->scr_read(ap, reg); 5304 return 0; 5305 } 5306 return -EOPNOTSUPP; 5307 } 5308 5309 /** 5310 * ata_port_online - test whether the given port is online 5311 * @ap: ATA port to test 5312 * 5313 * Test whether @ap is online. Note that this function returns 0 5314 * if online status of @ap cannot be obtained, so 5315 * ata_port_online(ap) != !ata_port_offline(ap). 5316 * 5317 * LOCKING: 5318 * None. 5319 * 5320 * RETURNS: 5321 * 1 if the port online status is available and online. 5322 */ 5323 int ata_port_online(struct ata_port *ap) 5324 { 5325 u32 sstatus; 5326 5327 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3) 5328 return 1; 5329 return 0; 5330 } 5331 5332 /** 5333 * ata_port_offline - test whether the given port is offline 5334 * @ap: ATA port to test 5335 * 5336 * Test whether @ap is offline. Note that this function returns 5337 * 0 if offline status of @ap cannot be obtained, so 5338 * ata_port_online(ap) != !ata_port_offline(ap). 5339 * 5340 * LOCKING: 5341 * None. 5342 * 5343 * RETURNS: 5344 * 1 if the port offline status is available and offline. 5345 */ 5346 int ata_port_offline(struct ata_port *ap) 5347 { 5348 u32 sstatus; 5349 5350 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3) 5351 return 1; 5352 return 0; 5353 } 5354 5355 int ata_flush_cache(struct ata_device *dev) 5356 { 5357 unsigned int err_mask; 5358 u8 cmd; 5359 5360 if (!ata_try_flush_cache(dev)) 5361 return 0; 5362 5363 if (dev->flags & ATA_DFLAG_FLUSH_EXT) 5364 cmd = ATA_CMD_FLUSH_EXT; 5365 else 5366 cmd = ATA_CMD_FLUSH; 5367 5368 err_mask = ata_do_simple_cmd(dev, cmd); 5369 if (err_mask) { 5370 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n"); 5371 return -EIO; 5372 } 5373 5374 return 0; 5375 } 5376 5377 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg, 5378 unsigned int action, unsigned int ehi_flags, 5379 int wait) 5380 { 5381 unsigned long flags; 5382 int i, rc; 5383 5384 for (i = 0; i < host->n_ports; i++) { 5385 struct ata_port *ap = host->ports[i]; 5386 5387 /* Previous resume operation might still be in 5388 * progress. Wait for PM_PENDING to clear. 5389 */ 5390 if (ap->pflags & ATA_PFLAG_PM_PENDING) { 5391 ata_port_wait_eh(ap); 5392 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); 5393 } 5394 5395 /* request PM ops to EH */ 5396 spin_lock_irqsave(ap->lock, flags); 5397 5398 ap->pm_mesg = mesg; 5399 if (wait) { 5400 rc = 0; 5401 ap->pm_result = &rc; 5402 } 5403 5404 ap->pflags |= ATA_PFLAG_PM_PENDING; 5405 ap->eh_info.action |= action; 5406 ap->eh_info.flags |= ehi_flags; 5407 5408 ata_port_schedule_eh(ap); 5409 5410 spin_unlock_irqrestore(ap->lock, flags); 5411 5412 /* wait and check result */ 5413 if (wait) { 5414 ata_port_wait_eh(ap); 5415 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); 5416 if (rc) 5417 return rc; 5418 } 5419 } 5420 5421 return 0; 5422 } 5423 5424 /** 5425 * ata_host_suspend - suspend host 5426 * @host: host to suspend 5427 * @mesg: PM message 5428 * 5429 * Suspend @host. Actual operation is performed by EH. This 5430 * function requests EH to perform PM operations and waits for EH 5431 * to finish. 5432 * 5433 * LOCKING: 5434 * Kernel thread context (may sleep). 5435 * 5436 * RETURNS: 5437 * 0 on success, -errno on failure. 5438 */ 5439 int ata_host_suspend(struct ata_host *host, pm_message_t mesg) 5440 { 5441 int i, j, rc; 5442 5443 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1); 5444 if (rc) 5445 goto fail; 5446 5447 /* EH is quiescent now. Fail if we have any ready device. 5448 * This happens if hotplug occurs between completion of device 5449 * suspension and here. 5450 */ 5451 for (i = 0; i < host->n_ports; i++) { 5452 struct ata_port *ap = host->ports[i]; 5453 5454 for (j = 0; j < ATA_MAX_DEVICES; j++) { 5455 struct ata_device *dev = &ap->device[j]; 5456 5457 if (ata_dev_ready(dev)) { 5458 ata_port_printk(ap, KERN_WARNING, 5459 "suspend failed, device %d " 5460 "still active\n", dev->devno); 5461 rc = -EBUSY; 5462 goto fail; 5463 } 5464 } 5465 } 5466 5467 host->dev->power.power_state = mesg; 5468 return 0; 5469 5470 fail: 5471 ata_host_resume(host); 5472 return rc; 5473 } 5474 5475 /** 5476 * ata_host_resume - resume host 5477 * @host: host to resume 5478 * 5479 * Resume @host. Actual operation is performed by EH. This 5480 * function requests EH to perform PM operations and returns. 5481 * Note that all resume operations are performed parallely. 5482 * 5483 * LOCKING: 5484 * Kernel thread context (may sleep). 5485 */ 5486 void ata_host_resume(struct ata_host *host) 5487 { 5488 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET, 5489 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0); 5490 host->dev->power.power_state = PMSG_ON; 5491 } 5492 5493 /** 5494 * ata_port_start - Set port up for dma. 5495 * @ap: Port to initialize 5496 * 5497 * Called just after data structures for each port are 5498 * initialized. Allocates space for PRD table. 5499 * 5500 * May be used as the port_start() entry in ata_port_operations. 5501 * 5502 * LOCKING: 5503 * Inherited from caller. 5504 */ 5505 5506 int ata_port_start (struct ata_port *ap) 5507 { 5508 struct device *dev = ap->dev; 5509 int rc; 5510 5511 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL); 5512 if (!ap->prd) 5513 return -ENOMEM; 5514 5515 rc = ata_pad_alloc(ap, dev); 5516 if (rc) { 5517 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); 5518 return rc; 5519 } 5520 5521 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma); 5522 5523 return 0; 5524 } 5525 5526 5527 /** 5528 * ata_port_stop - Undo ata_port_start() 5529 * @ap: Port to shut down 5530 * 5531 * Frees the PRD table. 5532 * 5533 * May be used as the port_stop() entry in ata_port_operations. 5534 * 5535 * LOCKING: 5536 * Inherited from caller. 5537 */ 5538 5539 void ata_port_stop (struct ata_port *ap) 5540 { 5541 struct device *dev = ap->dev; 5542 5543 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); 5544 ata_pad_free(ap, dev); 5545 } 5546 5547 void ata_host_stop (struct ata_host *host) 5548 { 5549 if (host->mmio_base) 5550 iounmap(host->mmio_base); 5551 } 5552 5553 /** 5554 * ata_dev_init - Initialize an ata_device structure 5555 * @dev: Device structure to initialize 5556 * 5557 * Initialize @dev in preparation for probing. 5558 * 5559 * LOCKING: 5560 * Inherited from caller. 5561 */ 5562 void ata_dev_init(struct ata_device *dev) 5563 { 5564 struct ata_port *ap = dev->ap; 5565 unsigned long flags; 5566 5567 /* SATA spd limit is bound to the first device */ 5568 ap->sata_spd_limit = ap->hw_sata_spd_limit; 5569 5570 /* High bits of dev->flags are used to record warm plug 5571 * requests which occur asynchronously. Synchronize using 5572 * host lock. 5573 */ 5574 spin_lock_irqsave(ap->lock, flags); 5575 dev->flags &= ~ATA_DFLAG_INIT_MASK; 5576 spin_unlock_irqrestore(ap->lock, flags); 5577 5578 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0, 5579 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET); 5580 dev->pio_mask = UINT_MAX; 5581 dev->mwdma_mask = UINT_MAX; 5582 dev->udma_mask = UINT_MAX; 5583 } 5584 5585 /** 5586 * ata_port_init - Initialize an ata_port structure 5587 * @ap: Structure to initialize 5588 * @host: Collection of hosts to which @ap belongs 5589 * @ent: Probe information provided by low-level driver 5590 * @port_no: Port number associated with this ata_port 5591 * 5592 * Initialize a new ata_port structure. 5593 * 5594 * LOCKING: 5595 * Inherited from caller. 5596 */ 5597 void ata_port_init(struct ata_port *ap, struct ata_host *host, 5598 const struct ata_probe_ent *ent, unsigned int port_no) 5599 { 5600 unsigned int i; 5601 5602 ap->lock = &host->lock; 5603 ap->flags = ATA_FLAG_DISABLED; 5604 ap->id = ata_unique_id++; 5605 ap->ctl = ATA_DEVCTL_OBS; 5606 ap->host = host; 5607 ap->dev = ent->dev; 5608 ap->port_no = port_no; 5609 if (port_no == 1 && ent->pinfo2) { 5610 ap->pio_mask = ent->pinfo2->pio_mask; 5611 ap->mwdma_mask = ent->pinfo2->mwdma_mask; 5612 ap->udma_mask = ent->pinfo2->udma_mask; 5613 ap->flags |= ent->pinfo2->flags; 5614 ap->ops = ent->pinfo2->port_ops; 5615 } else { 5616 ap->pio_mask = ent->pio_mask; 5617 ap->mwdma_mask = ent->mwdma_mask; 5618 ap->udma_mask = ent->udma_mask; 5619 ap->flags |= ent->port_flags; 5620 ap->ops = ent->port_ops; 5621 } 5622 ap->hw_sata_spd_limit = UINT_MAX; 5623 ap->active_tag = ATA_TAG_POISON; 5624 ap->last_ctl = 0xFF; 5625 5626 #if defined(ATA_VERBOSE_DEBUG) 5627 /* turn on all debugging levels */ 5628 ap->msg_enable = 0x00FF; 5629 #elif defined(ATA_DEBUG) 5630 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR; 5631 #else 5632 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN; 5633 #endif 5634 5635 INIT_DELAYED_WORK(&ap->port_task, NULL); 5636 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug); 5637 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan); 5638 INIT_LIST_HEAD(&ap->eh_done_q); 5639 init_waitqueue_head(&ap->eh_wait_q); 5640 5641 /* set cable type */ 5642 ap->cbl = ATA_CBL_NONE; 5643 if (ap->flags & ATA_FLAG_SATA) 5644 ap->cbl = ATA_CBL_SATA; 5645 5646 for (i = 0; i < ATA_MAX_DEVICES; i++) { 5647 struct ata_device *dev = &ap->device[i]; 5648 dev->ap = ap; 5649 dev->devno = i; 5650 ata_dev_init(dev); 5651 } 5652 5653 #ifdef ATA_IRQ_TRAP 5654 ap->stats.unhandled_irq = 1; 5655 ap->stats.idle_irq = 1; 5656 #endif 5657 5658 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports)); 5659 } 5660 5661 /** 5662 * ata_port_init_shost - Initialize SCSI host associated with ATA port 5663 * @ap: ATA port to initialize SCSI host for 5664 * @shost: SCSI host associated with @ap 5665 * 5666 * Initialize SCSI host @shost associated with ATA port @ap. 5667 * 5668 * LOCKING: 5669 * Inherited from caller. 5670 */ 5671 static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost) 5672 { 5673 ap->scsi_host = shost; 5674 5675 shost->unique_id = ap->id; 5676 shost->max_id = 16; 5677 shost->max_lun = 1; 5678 shost->max_channel = 1; 5679 shost->max_cmd_len = 12; 5680 } 5681 5682 /** 5683 * ata_port_add - Attach low-level ATA driver to system 5684 * @ent: Information provided by low-level driver 5685 * @host: Collections of ports to which we add 5686 * @port_no: Port number associated with this host 5687 * 5688 * Attach low-level ATA driver to system. 5689 * 5690 * LOCKING: 5691 * PCI/etc. bus probe sem. 5692 * 5693 * RETURNS: 5694 * New ata_port on success, for NULL on error. 5695 */ 5696 static struct ata_port * ata_port_add(const struct ata_probe_ent *ent, 5697 struct ata_host *host, 5698 unsigned int port_no) 5699 { 5700 struct Scsi_Host *shost; 5701 struct ata_port *ap; 5702 5703 DPRINTK("ENTER\n"); 5704 5705 if (!ent->port_ops->error_handler && 5706 !(ent->port_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) { 5707 printk(KERN_ERR "ata%u: no reset mechanism available\n", 5708 port_no); 5709 return NULL; 5710 } 5711 5712 shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port)); 5713 if (!shost) 5714 return NULL; 5715 5716 shost->transportt = &ata_scsi_transport_template; 5717 5718 ap = ata_shost_to_port(shost); 5719 5720 ata_port_init(ap, host, ent, port_no); 5721 ata_port_init_shost(ap, shost); 5722 5723 return ap; 5724 } 5725 5726 /** 5727 * ata_sas_host_init - Initialize a host struct 5728 * @host: host to initialize 5729 * @dev: device host is attached to 5730 * @flags: host flags 5731 * @ops: port_ops 5732 * 5733 * LOCKING: 5734 * PCI/etc. bus probe sem. 5735 * 5736 */ 5737 5738 void ata_host_init(struct ata_host *host, struct device *dev, 5739 unsigned long flags, const struct ata_port_operations *ops) 5740 { 5741 spin_lock_init(&host->lock); 5742 host->dev = dev; 5743 host->flags = flags; 5744 host->ops = ops; 5745 } 5746 5747 /** 5748 * ata_device_add - Register hardware device with ATA and SCSI layers 5749 * @ent: Probe information describing hardware device to be registered 5750 * 5751 * This function processes the information provided in the probe 5752 * information struct @ent, allocates the necessary ATA and SCSI 5753 * host information structures, initializes them, and registers 5754 * everything with requisite kernel subsystems. 5755 * 5756 * This function requests irqs, probes the ATA bus, and probes 5757 * the SCSI bus. 5758 * 5759 * LOCKING: 5760 * PCI/etc. bus probe sem. 5761 * 5762 * RETURNS: 5763 * Number of ports registered. Zero on error (no ports registered). 5764 */ 5765 int ata_device_add(const struct ata_probe_ent *ent) 5766 { 5767 unsigned int i; 5768 struct device *dev = ent->dev; 5769 struct ata_host *host; 5770 int rc; 5771 5772 DPRINTK("ENTER\n"); 5773 5774 if (ent->irq == 0) { 5775 dev_printk(KERN_ERR, dev, "is not available: No interrupt assigned.\n"); 5776 return 0; 5777 } 5778 /* alloc a container for our list of ATA ports (buses) */ 5779 host = kzalloc(sizeof(struct ata_host) + 5780 (ent->n_ports * sizeof(void *)), GFP_KERNEL); 5781 if (!host) 5782 return 0; 5783 5784 ata_host_init(host, dev, ent->_host_flags, ent->port_ops); 5785 host->n_ports = ent->n_ports; 5786 host->irq = ent->irq; 5787 host->irq2 = ent->irq2; 5788 host->mmio_base = ent->mmio_base; 5789 host->private_data = ent->private_data; 5790 5791 /* register each port bound to this device */ 5792 for (i = 0; i < host->n_ports; i++) { 5793 struct ata_port *ap; 5794 unsigned long xfer_mode_mask; 5795 int irq_line = ent->irq; 5796 5797 ap = ata_port_add(ent, host, i); 5798 host->ports[i] = ap; 5799 if (!ap) 5800 goto err_out; 5801 5802 /* dummy? */ 5803 if (ent->dummy_port_mask & (1 << i)) { 5804 ata_port_printk(ap, KERN_INFO, "DUMMY\n"); 5805 ap->ops = &ata_dummy_port_ops; 5806 continue; 5807 } 5808 5809 /* start port */ 5810 rc = ap->ops->port_start(ap); 5811 if (rc) { 5812 host->ports[i] = NULL; 5813 scsi_host_put(ap->scsi_host); 5814 goto err_out; 5815 } 5816 5817 /* Report the secondary IRQ for second channel legacy */ 5818 if (i == 1 && ent->irq2) 5819 irq_line = ent->irq2; 5820 5821 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) | 5822 (ap->mwdma_mask << ATA_SHIFT_MWDMA) | 5823 (ap->pio_mask << ATA_SHIFT_PIO); 5824 5825 /* print per-port info to dmesg */ 5826 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX " 5827 "ctl 0x%lX bmdma 0x%lX irq %d\n", 5828 ap->flags & ATA_FLAG_SATA ? 'S' : 'P', 5829 ata_mode_string(xfer_mode_mask), 5830 ap->ioaddr.cmd_addr, 5831 ap->ioaddr.ctl_addr, 5832 ap->ioaddr.bmdma_addr, 5833 irq_line); 5834 5835 /* freeze port before requesting IRQ */ 5836 ata_eh_freeze_port(ap); 5837 } 5838 5839 /* obtain irq, that may be shared between channels */ 5840 rc = request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags, 5841 DRV_NAME, host); 5842 if (rc) { 5843 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n", 5844 ent->irq, rc); 5845 goto err_out; 5846 } 5847 5848 /* do we have a second IRQ for the other channel, eg legacy mode */ 5849 if (ent->irq2) { 5850 /* We will get weird core code crashes later if this is true 5851 so trap it now */ 5852 BUG_ON(ent->irq == ent->irq2); 5853 5854 rc = request_irq(ent->irq2, ent->port_ops->irq_handler, ent->irq_flags, 5855 DRV_NAME, host); 5856 if (rc) { 5857 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n", 5858 ent->irq2, rc); 5859 goto err_out_free_irq; 5860 } 5861 } 5862 5863 /* perform each probe synchronously */ 5864 DPRINTK("probe begin\n"); 5865 for (i = 0; i < host->n_ports; i++) { 5866 struct ata_port *ap = host->ports[i]; 5867 u32 scontrol; 5868 int rc; 5869 5870 /* init sata_spd_limit to the current value */ 5871 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) { 5872 int spd = (scontrol >> 4) & 0xf; 5873 ap->hw_sata_spd_limit &= (1 << spd) - 1; 5874 } 5875 ap->sata_spd_limit = ap->hw_sata_spd_limit; 5876 5877 rc = scsi_add_host(ap->scsi_host, dev); 5878 if (rc) { 5879 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n"); 5880 /* FIXME: do something useful here */ 5881 /* FIXME: handle unconditional calls to 5882 * scsi_scan_host and ata_host_remove, below, 5883 * at the very least 5884 */ 5885 } 5886 5887 if (ap->ops->error_handler) { 5888 struct ata_eh_info *ehi = &ap->eh_info; 5889 unsigned long flags; 5890 5891 ata_port_probe(ap); 5892 5893 /* kick EH for boot probing */ 5894 spin_lock_irqsave(ap->lock, flags); 5895 5896 ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1; 5897 ehi->action |= ATA_EH_SOFTRESET; 5898 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET; 5899 5900 ap->pflags |= ATA_PFLAG_LOADING; 5901 ata_port_schedule_eh(ap); 5902 5903 spin_unlock_irqrestore(ap->lock, flags); 5904 5905 /* wait for EH to finish */ 5906 ata_port_wait_eh(ap); 5907 } else { 5908 DPRINTK("ata%u: bus probe begin\n", ap->id); 5909 rc = ata_bus_probe(ap); 5910 DPRINTK("ata%u: bus probe end\n", ap->id); 5911 5912 if (rc) { 5913 /* FIXME: do something useful here? 5914 * Current libata behavior will 5915 * tear down everything when 5916 * the module is removed 5917 * or the h/w is unplugged. 5918 */ 5919 } 5920 } 5921 } 5922 5923 /* probes are done, now scan each port's disk(s) */ 5924 DPRINTK("host probe begin\n"); 5925 for (i = 0; i < host->n_ports; i++) { 5926 struct ata_port *ap = host->ports[i]; 5927 5928 ata_scsi_scan_host(ap); 5929 } 5930 5931 dev_set_drvdata(dev, host); 5932 5933 VPRINTK("EXIT, returning %u\n", ent->n_ports); 5934 return ent->n_ports; /* success */ 5935 5936 err_out_free_irq: 5937 free_irq(ent->irq, host); 5938 err_out: 5939 for (i = 0; i < host->n_ports; i++) { 5940 struct ata_port *ap = host->ports[i]; 5941 if (ap) { 5942 ap->ops->port_stop(ap); 5943 scsi_host_put(ap->scsi_host); 5944 } 5945 } 5946 5947 kfree(host); 5948 VPRINTK("EXIT, returning 0\n"); 5949 return 0; 5950 } 5951 5952 /** 5953 * ata_port_detach - Detach ATA port in prepration of device removal 5954 * @ap: ATA port to be detached 5955 * 5956 * Detach all ATA devices and the associated SCSI devices of @ap; 5957 * then, remove the associated SCSI host. @ap is guaranteed to 5958 * be quiescent on return from this function. 5959 * 5960 * LOCKING: 5961 * Kernel thread context (may sleep). 5962 */ 5963 void ata_port_detach(struct ata_port *ap) 5964 { 5965 unsigned long flags; 5966 int i; 5967 5968 if (!ap->ops->error_handler) 5969 goto skip_eh; 5970 5971 /* tell EH we're leaving & flush EH */ 5972 spin_lock_irqsave(ap->lock, flags); 5973 ap->pflags |= ATA_PFLAG_UNLOADING; 5974 spin_unlock_irqrestore(ap->lock, flags); 5975 5976 ata_port_wait_eh(ap); 5977 5978 /* EH is now guaranteed to see UNLOADING, so no new device 5979 * will be attached. Disable all existing devices. 5980 */ 5981 spin_lock_irqsave(ap->lock, flags); 5982 5983 for (i = 0; i < ATA_MAX_DEVICES; i++) 5984 ata_dev_disable(&ap->device[i]); 5985 5986 spin_unlock_irqrestore(ap->lock, flags); 5987 5988 /* Final freeze & EH. All in-flight commands are aborted. EH 5989 * will be skipped and retrials will be terminated with bad 5990 * target. 5991 */ 5992 spin_lock_irqsave(ap->lock, flags); 5993 ata_port_freeze(ap); /* won't be thawed */ 5994 spin_unlock_irqrestore(ap->lock, flags); 5995 5996 ata_port_wait_eh(ap); 5997 5998 /* Flush hotplug task. The sequence is similar to 5999 * ata_port_flush_task(). 6000 */ 6001 flush_workqueue(ata_aux_wq); 6002 cancel_delayed_work(&ap->hotplug_task); 6003 flush_workqueue(ata_aux_wq); 6004 6005 skip_eh: 6006 /* remove the associated SCSI host */ 6007 scsi_remove_host(ap->scsi_host); 6008 } 6009 6010 /** 6011 * ata_host_remove - PCI layer callback for device removal 6012 * @host: ATA host set that was removed 6013 * 6014 * Unregister all objects associated with this host set. Free those 6015 * objects. 6016 * 6017 * LOCKING: 6018 * Inherited from calling layer (may sleep). 6019 */ 6020 6021 void ata_host_remove(struct ata_host *host) 6022 { 6023 unsigned int i; 6024 6025 for (i = 0; i < host->n_ports; i++) 6026 ata_port_detach(host->ports[i]); 6027 6028 free_irq(host->irq, host); 6029 if (host->irq2) 6030 free_irq(host->irq2, host); 6031 6032 for (i = 0; i < host->n_ports; i++) { 6033 struct ata_port *ap = host->ports[i]; 6034 6035 ata_scsi_release(ap->scsi_host); 6036 6037 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) { 6038 struct ata_ioports *ioaddr = &ap->ioaddr; 6039 6040 /* FIXME: Add -ac IDE pci mods to remove these special cases */ 6041 if (ioaddr->cmd_addr == ATA_PRIMARY_CMD) 6042 release_region(ATA_PRIMARY_CMD, 8); 6043 else if (ioaddr->cmd_addr == ATA_SECONDARY_CMD) 6044 release_region(ATA_SECONDARY_CMD, 8); 6045 } 6046 6047 scsi_host_put(ap->scsi_host); 6048 } 6049 6050 if (host->ops->host_stop) 6051 host->ops->host_stop(host); 6052 6053 kfree(host); 6054 } 6055 6056 /** 6057 * ata_scsi_release - SCSI layer callback hook for host unload 6058 * @shost: libata host to be unloaded 6059 * 6060 * Performs all duties necessary to shut down a libata port... 6061 * Kill port kthread, disable port, and release resources. 6062 * 6063 * LOCKING: 6064 * Inherited from SCSI layer. 6065 * 6066 * RETURNS: 6067 * One. 6068 */ 6069 6070 int ata_scsi_release(struct Scsi_Host *shost) 6071 { 6072 struct ata_port *ap = ata_shost_to_port(shost); 6073 6074 DPRINTK("ENTER\n"); 6075 6076 ap->ops->port_disable(ap); 6077 ap->ops->port_stop(ap); 6078 6079 DPRINTK("EXIT\n"); 6080 return 1; 6081 } 6082 6083 struct ata_probe_ent * 6084 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port) 6085 { 6086 struct ata_probe_ent *probe_ent; 6087 6088 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL); 6089 if (!probe_ent) { 6090 printk(KERN_ERR DRV_NAME "(%s): out of memory\n", 6091 kobject_name(&(dev->kobj))); 6092 return NULL; 6093 } 6094 6095 INIT_LIST_HEAD(&probe_ent->node); 6096 probe_ent->dev = dev; 6097 6098 probe_ent->sht = port->sht; 6099 probe_ent->port_flags = port->flags; 6100 probe_ent->pio_mask = port->pio_mask; 6101 probe_ent->mwdma_mask = port->mwdma_mask; 6102 probe_ent->udma_mask = port->udma_mask; 6103 probe_ent->port_ops = port->port_ops; 6104 probe_ent->private_data = port->private_data; 6105 6106 return probe_ent; 6107 } 6108 6109 /** 6110 * ata_std_ports - initialize ioaddr with standard port offsets. 6111 * @ioaddr: IO address structure to be initialized 6112 * 6113 * Utility function which initializes data_addr, error_addr, 6114 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, 6115 * device_addr, status_addr, and command_addr to standard offsets 6116 * relative to cmd_addr. 6117 * 6118 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. 6119 */ 6120 6121 void ata_std_ports(struct ata_ioports *ioaddr) 6122 { 6123 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; 6124 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; 6125 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; 6126 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; 6127 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; 6128 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; 6129 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; 6130 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; 6131 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; 6132 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; 6133 } 6134 6135 6136 #ifdef CONFIG_PCI 6137 6138 void ata_pci_host_stop (struct ata_host *host) 6139 { 6140 struct pci_dev *pdev = to_pci_dev(host->dev); 6141 6142 pci_iounmap(pdev, host->mmio_base); 6143 } 6144 6145 /** 6146 * ata_pci_remove_one - PCI layer callback for device removal 6147 * @pdev: PCI device that was removed 6148 * 6149 * PCI layer indicates to libata via this hook that 6150 * hot-unplug or module unload event has occurred. 6151 * Handle this by unregistering all objects associated 6152 * with this PCI device. Free those objects. Then finally 6153 * release PCI resources and disable device. 6154 * 6155 * LOCKING: 6156 * Inherited from PCI layer (may sleep). 6157 */ 6158 6159 void ata_pci_remove_one (struct pci_dev *pdev) 6160 { 6161 struct device *dev = pci_dev_to_dev(pdev); 6162 struct ata_host *host = dev_get_drvdata(dev); 6163 6164 ata_host_remove(host); 6165 6166 pci_release_regions(pdev); 6167 pci_disable_device(pdev); 6168 dev_set_drvdata(dev, NULL); 6169 } 6170 6171 /* move to PCI subsystem */ 6172 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits) 6173 { 6174 unsigned long tmp = 0; 6175 6176 switch (bits->width) { 6177 case 1: { 6178 u8 tmp8 = 0; 6179 pci_read_config_byte(pdev, bits->reg, &tmp8); 6180 tmp = tmp8; 6181 break; 6182 } 6183 case 2: { 6184 u16 tmp16 = 0; 6185 pci_read_config_word(pdev, bits->reg, &tmp16); 6186 tmp = tmp16; 6187 break; 6188 } 6189 case 4: { 6190 u32 tmp32 = 0; 6191 pci_read_config_dword(pdev, bits->reg, &tmp32); 6192 tmp = tmp32; 6193 break; 6194 } 6195 6196 default: 6197 return -EINVAL; 6198 } 6199 6200 tmp &= bits->mask; 6201 6202 return (tmp == bits->val) ? 1 : 0; 6203 } 6204 6205 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg) 6206 { 6207 pci_save_state(pdev); 6208 6209 if (mesg.event == PM_EVENT_SUSPEND) { 6210 pci_disable_device(pdev); 6211 pci_set_power_state(pdev, PCI_D3hot); 6212 } 6213 } 6214 6215 void ata_pci_device_do_resume(struct pci_dev *pdev) 6216 { 6217 pci_set_power_state(pdev, PCI_D0); 6218 pci_restore_state(pdev); 6219 pci_enable_device(pdev); 6220 pci_set_master(pdev); 6221 } 6222 6223 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) 6224 { 6225 struct ata_host *host = dev_get_drvdata(&pdev->dev); 6226 int rc = 0; 6227 6228 rc = ata_host_suspend(host, mesg); 6229 if (rc) 6230 return rc; 6231 6232 ata_pci_device_do_suspend(pdev, mesg); 6233 6234 return 0; 6235 } 6236 6237 int ata_pci_device_resume(struct pci_dev *pdev) 6238 { 6239 struct ata_host *host = dev_get_drvdata(&pdev->dev); 6240 6241 ata_pci_device_do_resume(pdev); 6242 ata_host_resume(host); 6243 return 0; 6244 } 6245 #endif /* CONFIG_PCI */ 6246 6247 6248 static int __init ata_init(void) 6249 { 6250 ata_probe_timeout *= HZ; 6251 ata_wq = create_workqueue("ata"); 6252 if (!ata_wq) 6253 return -ENOMEM; 6254 6255 ata_aux_wq = create_singlethread_workqueue("ata_aux"); 6256 if (!ata_aux_wq) { 6257 destroy_workqueue(ata_wq); 6258 return -ENOMEM; 6259 } 6260 6261 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); 6262 return 0; 6263 } 6264 6265 static void __exit ata_exit(void) 6266 { 6267 destroy_workqueue(ata_wq); 6268 destroy_workqueue(ata_aux_wq); 6269 } 6270 6271 subsys_initcall(ata_init); 6272 module_exit(ata_exit); 6273 6274 static unsigned long ratelimit_time; 6275 static DEFINE_SPINLOCK(ata_ratelimit_lock); 6276 6277 int ata_ratelimit(void) 6278 { 6279 int rc; 6280 unsigned long flags; 6281 6282 spin_lock_irqsave(&ata_ratelimit_lock, flags); 6283 6284 if (time_after(jiffies, ratelimit_time)) { 6285 rc = 1; 6286 ratelimit_time = jiffies + (HZ/5); 6287 } else 6288 rc = 0; 6289 6290 spin_unlock_irqrestore(&ata_ratelimit_lock, flags); 6291 6292 return rc; 6293 } 6294 6295 /** 6296 * ata_wait_register - wait until register value changes 6297 * @reg: IO-mapped register 6298 * @mask: Mask to apply to read register value 6299 * @val: Wait condition 6300 * @interval_msec: polling interval in milliseconds 6301 * @timeout_msec: timeout in milliseconds 6302 * 6303 * Waiting for some bits of register to change is a common 6304 * operation for ATA controllers. This function reads 32bit LE 6305 * IO-mapped register @reg and tests for the following condition. 6306 * 6307 * (*@reg & mask) != val 6308 * 6309 * If the condition is met, it returns; otherwise, the process is 6310 * repeated after @interval_msec until timeout. 6311 * 6312 * LOCKING: 6313 * Kernel thread context (may sleep) 6314 * 6315 * RETURNS: 6316 * The final register value. 6317 */ 6318 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, 6319 unsigned long interval_msec, 6320 unsigned long timeout_msec) 6321 { 6322 unsigned long timeout; 6323 u32 tmp; 6324 6325 tmp = ioread32(reg); 6326 6327 /* Calculate timeout _after_ the first read to make sure 6328 * preceding writes reach the controller before starting to 6329 * eat away the timeout. 6330 */ 6331 timeout = jiffies + (timeout_msec * HZ) / 1000; 6332 6333 while ((tmp & mask) == val && time_before(jiffies, timeout)) { 6334 msleep(interval_msec); 6335 tmp = ioread32(reg); 6336 } 6337 6338 return tmp; 6339 } 6340 6341 /* 6342 * Dummy port_ops 6343 */ 6344 static void ata_dummy_noret(struct ata_port *ap) { } 6345 static int ata_dummy_ret0(struct ata_port *ap) { return 0; } 6346 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { } 6347 6348 static u8 ata_dummy_check_status(struct ata_port *ap) 6349 { 6350 return ATA_DRDY; 6351 } 6352 6353 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc) 6354 { 6355 return AC_ERR_SYSTEM; 6356 } 6357 6358 const struct ata_port_operations ata_dummy_port_ops = { 6359 .port_disable = ata_port_disable, 6360 .check_status = ata_dummy_check_status, 6361 .check_altstatus = ata_dummy_check_status, 6362 .dev_select = ata_noop_dev_select, 6363 .qc_prep = ata_noop_qc_prep, 6364 .qc_issue = ata_dummy_qc_issue, 6365 .freeze = ata_dummy_noret, 6366 .thaw = ata_dummy_noret, 6367 .error_handler = ata_dummy_noret, 6368 .post_internal_cmd = ata_dummy_qc_noret, 6369 .irq_clear = ata_dummy_noret, 6370 .port_start = ata_dummy_ret0, 6371 .port_stop = ata_dummy_noret, 6372 }; 6373 6374 /* 6375 * libata is essentially a library of internal helper functions for 6376 * low-level ATA host controller drivers. As such, the API/ABI is 6377 * likely to change as new drivers are added and updated. 6378 * Do not depend on ABI/API stability. 6379 */ 6380 6381 EXPORT_SYMBOL_GPL(sata_deb_timing_normal); 6382 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug); 6383 EXPORT_SYMBOL_GPL(sata_deb_timing_long); 6384 EXPORT_SYMBOL_GPL(ata_dummy_port_ops); 6385 EXPORT_SYMBOL_GPL(ata_std_bios_param); 6386 EXPORT_SYMBOL_GPL(ata_std_ports); 6387 EXPORT_SYMBOL_GPL(ata_host_init); 6388 EXPORT_SYMBOL_GPL(ata_device_add); 6389 EXPORT_SYMBOL_GPL(ata_port_detach); 6390 EXPORT_SYMBOL_GPL(ata_host_remove); 6391 EXPORT_SYMBOL_GPL(ata_sg_init); 6392 EXPORT_SYMBOL_GPL(ata_sg_init_one); 6393 EXPORT_SYMBOL_GPL(ata_hsm_move); 6394 EXPORT_SYMBOL_GPL(ata_qc_complete); 6395 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple); 6396 EXPORT_SYMBOL_GPL(ata_qc_issue_prot); 6397 EXPORT_SYMBOL_GPL(ata_tf_load); 6398 EXPORT_SYMBOL_GPL(ata_tf_read); 6399 EXPORT_SYMBOL_GPL(ata_noop_dev_select); 6400 EXPORT_SYMBOL_GPL(ata_std_dev_select); 6401 EXPORT_SYMBOL_GPL(ata_tf_to_fis); 6402 EXPORT_SYMBOL_GPL(ata_tf_from_fis); 6403 EXPORT_SYMBOL_GPL(ata_check_status); 6404 EXPORT_SYMBOL_GPL(ata_altstatus); 6405 EXPORT_SYMBOL_GPL(ata_exec_command); 6406 EXPORT_SYMBOL_GPL(ata_port_start); 6407 EXPORT_SYMBOL_GPL(ata_port_stop); 6408 EXPORT_SYMBOL_GPL(ata_host_stop); 6409 EXPORT_SYMBOL_GPL(ata_interrupt); 6410 EXPORT_SYMBOL_GPL(ata_mmio_data_xfer); 6411 EXPORT_SYMBOL_GPL(ata_pio_data_xfer); 6412 EXPORT_SYMBOL_GPL(ata_pio_data_xfer_noirq); 6413 EXPORT_SYMBOL_GPL(ata_qc_prep); 6414 EXPORT_SYMBOL_GPL(ata_noop_qc_prep); 6415 EXPORT_SYMBOL_GPL(ata_bmdma_setup); 6416 EXPORT_SYMBOL_GPL(ata_bmdma_start); 6417 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); 6418 EXPORT_SYMBOL_GPL(ata_bmdma_status); 6419 EXPORT_SYMBOL_GPL(ata_bmdma_stop); 6420 EXPORT_SYMBOL_GPL(ata_bmdma_freeze); 6421 EXPORT_SYMBOL_GPL(ata_bmdma_thaw); 6422 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh); 6423 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler); 6424 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd); 6425 EXPORT_SYMBOL_GPL(ata_port_probe); 6426 EXPORT_SYMBOL_GPL(sata_set_spd); 6427 EXPORT_SYMBOL_GPL(sata_phy_debounce); 6428 EXPORT_SYMBOL_GPL(sata_phy_resume); 6429 EXPORT_SYMBOL_GPL(sata_phy_reset); 6430 EXPORT_SYMBOL_GPL(__sata_phy_reset); 6431 EXPORT_SYMBOL_GPL(ata_bus_reset); 6432 EXPORT_SYMBOL_GPL(ata_std_prereset); 6433 EXPORT_SYMBOL_GPL(ata_std_softreset); 6434 EXPORT_SYMBOL_GPL(sata_port_hardreset); 6435 EXPORT_SYMBOL_GPL(sata_std_hardreset); 6436 EXPORT_SYMBOL_GPL(ata_std_postreset); 6437 EXPORT_SYMBOL_GPL(ata_dev_classify); 6438 EXPORT_SYMBOL_GPL(ata_dev_pair); 6439 EXPORT_SYMBOL_GPL(ata_port_disable); 6440 EXPORT_SYMBOL_GPL(ata_ratelimit); 6441 EXPORT_SYMBOL_GPL(ata_wait_register); 6442 EXPORT_SYMBOL_GPL(ata_busy_sleep); 6443 EXPORT_SYMBOL_GPL(ata_port_queue_task); 6444 EXPORT_SYMBOL_GPL(ata_scsi_ioctl); 6445 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); 6446 EXPORT_SYMBOL_GPL(ata_scsi_slave_config); 6447 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy); 6448 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth); 6449 EXPORT_SYMBOL_GPL(ata_scsi_release); 6450 EXPORT_SYMBOL_GPL(ata_host_intr); 6451 EXPORT_SYMBOL_GPL(sata_scr_valid); 6452 EXPORT_SYMBOL_GPL(sata_scr_read); 6453 EXPORT_SYMBOL_GPL(sata_scr_write); 6454 EXPORT_SYMBOL_GPL(sata_scr_write_flush); 6455 EXPORT_SYMBOL_GPL(ata_port_online); 6456 EXPORT_SYMBOL_GPL(ata_port_offline); 6457 EXPORT_SYMBOL_GPL(ata_host_suspend); 6458 EXPORT_SYMBOL_GPL(ata_host_resume); 6459 EXPORT_SYMBOL_GPL(ata_id_string); 6460 EXPORT_SYMBOL_GPL(ata_id_c_string); 6461 EXPORT_SYMBOL_GPL(ata_device_blacklisted); 6462 EXPORT_SYMBOL_GPL(ata_scsi_simulate); 6463 6464 EXPORT_SYMBOL_GPL(ata_pio_need_iordy); 6465 EXPORT_SYMBOL_GPL(ata_timing_compute); 6466 EXPORT_SYMBOL_GPL(ata_timing_merge); 6467 6468 #ifdef CONFIG_PCI 6469 EXPORT_SYMBOL_GPL(pci_test_config_bits); 6470 EXPORT_SYMBOL_GPL(ata_pci_host_stop); 6471 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode); 6472 EXPORT_SYMBOL_GPL(ata_pci_init_one); 6473 EXPORT_SYMBOL_GPL(ata_pci_remove_one); 6474 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend); 6475 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume); 6476 EXPORT_SYMBOL_GPL(ata_pci_device_suspend); 6477 EXPORT_SYMBOL_GPL(ata_pci_device_resume); 6478 EXPORT_SYMBOL_GPL(ata_pci_default_filter); 6479 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex); 6480 #endif /* CONFIG_PCI */ 6481 6482 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend); 6483 EXPORT_SYMBOL_GPL(ata_scsi_device_resume); 6484 6485 EXPORT_SYMBOL_GPL(ata_eng_timeout); 6486 EXPORT_SYMBOL_GPL(ata_port_schedule_eh); 6487 EXPORT_SYMBOL_GPL(ata_port_abort); 6488 EXPORT_SYMBOL_GPL(ata_port_freeze); 6489 EXPORT_SYMBOL_GPL(ata_eh_freeze_port); 6490 EXPORT_SYMBOL_GPL(ata_eh_thaw_port); 6491 EXPORT_SYMBOL_GPL(ata_eh_qc_complete); 6492 EXPORT_SYMBOL_GPL(ata_eh_qc_retry); 6493 EXPORT_SYMBOL_GPL(ata_do_eh); 6494