1 /* 2 * libata-core.c - helper library for ATA 3 * 4 * Maintained by: Jeff Garzik <jgarzik@pobox.com> 5 * Please ALWAYS copy linux-ide@vger.kernel.org 6 * on emails. 7 * 8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved. 9 * Copyright 2003-2004 Jeff Garzik 10 * 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2, or (at your option) 15 * any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; see the file COPYING. If not, write to 24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 25 * 26 * 27 * libata documentation is available via 'make {ps|pdf}docs', 28 * as Documentation/DocBook/libata.* 29 * 30 * Hardware documentation available from http://www.t13.org/ and 31 * http://www.sata-io.org/ 32 * 33 */ 34 35 #include <linux/kernel.h> 36 #include <linux/module.h> 37 #include <linux/pci.h> 38 #include <linux/init.h> 39 #include <linux/list.h> 40 #include <linux/mm.h> 41 #include <linux/highmem.h> 42 #include <linux/spinlock.h> 43 #include <linux/blkdev.h> 44 #include <linux/delay.h> 45 #include <linux/timer.h> 46 #include <linux/interrupt.h> 47 #include <linux/completion.h> 48 #include <linux/suspend.h> 49 #include <linux/workqueue.h> 50 #include <linux/jiffies.h> 51 #include <linux/scatterlist.h> 52 #include <linux/io.h> 53 #include <scsi/scsi.h> 54 #include <scsi/scsi_cmnd.h> 55 #include <scsi/scsi_host.h> 56 #include <linux/libata.h> 57 #include <asm/semaphore.h> 58 #include <asm/byteorder.h> 59 60 #include "libata.h" 61 62 63 /* debounce timing parameters in msecs { interval, duration, timeout } */ 64 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 }; 65 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 }; 66 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 }; 67 68 static unsigned int ata_dev_init_params(struct ata_device *dev, 69 u16 heads, u16 sectors); 70 static unsigned int ata_dev_set_xfermode(struct ata_device *dev); 71 static unsigned int ata_dev_set_feature(struct ata_device *dev, 72 u8 enable, u8 feature); 73 static void ata_dev_xfermask(struct ata_device *dev); 74 static unsigned long ata_dev_blacklisted(const struct ata_device *dev); 75 76 unsigned int ata_print_id = 1; 77 static struct workqueue_struct *ata_wq; 78 79 struct workqueue_struct *ata_aux_wq; 80 81 int atapi_enabled = 1; 82 module_param(atapi_enabled, int, 0444); 83 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); 84 85 int atapi_dmadir = 0; 86 module_param(atapi_dmadir, int, 0444); 87 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)"); 88 89 int atapi_passthru16 = 1; 90 module_param(atapi_passthru16, int, 0444); 91 MODULE_PARM_DESC(atapi_passthru16, "Enable ATA_16 passthru for ATAPI devices; on by default (0=off, 1=on)"); 92 93 int libata_fua = 0; 94 module_param_named(fua, libata_fua, int, 0444); 95 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)"); 96 97 static int ata_ignore_hpa; 98 module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644); 99 MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)"); 100 101 static int libata_dma_mask = ATA_DMA_MASK_ATA|ATA_DMA_MASK_ATAPI|ATA_DMA_MASK_CFA; 102 module_param_named(dma, libata_dma_mask, int, 0444); 103 MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)"); 104 105 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ; 106 module_param(ata_probe_timeout, int, 0444); 107 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)"); 108 109 int libata_noacpi = 0; 110 module_param_named(noacpi, libata_noacpi, int, 0444); 111 MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in probe/suspend/resume when set"); 112 113 MODULE_AUTHOR("Jeff Garzik"); 114 MODULE_DESCRIPTION("Library module for ATA devices"); 115 MODULE_LICENSE("GPL"); 116 MODULE_VERSION(DRV_VERSION); 117 118 119 /** 120 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure 121 * @tf: Taskfile to convert 122 * @pmp: Port multiplier port 123 * @is_cmd: This FIS is for command 124 * @fis: Buffer into which data will output 125 * 126 * Converts a standard ATA taskfile to a Serial ATA 127 * FIS structure (Register - Host to Device). 128 * 129 * LOCKING: 130 * Inherited from caller. 131 */ 132 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis) 133 { 134 fis[0] = 0x27; /* Register - Host to Device FIS */ 135 fis[1] = pmp & 0xf; /* Port multiplier number*/ 136 if (is_cmd) 137 fis[1] |= (1 << 7); /* bit 7 indicates Command FIS */ 138 139 fis[2] = tf->command; 140 fis[3] = tf->feature; 141 142 fis[4] = tf->lbal; 143 fis[5] = tf->lbam; 144 fis[6] = tf->lbah; 145 fis[7] = tf->device; 146 147 fis[8] = tf->hob_lbal; 148 fis[9] = tf->hob_lbam; 149 fis[10] = tf->hob_lbah; 150 fis[11] = tf->hob_feature; 151 152 fis[12] = tf->nsect; 153 fis[13] = tf->hob_nsect; 154 fis[14] = 0; 155 fis[15] = tf->ctl; 156 157 fis[16] = 0; 158 fis[17] = 0; 159 fis[18] = 0; 160 fis[19] = 0; 161 } 162 163 /** 164 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile 165 * @fis: Buffer from which data will be input 166 * @tf: Taskfile to output 167 * 168 * Converts a serial ATA FIS structure to a standard ATA taskfile. 169 * 170 * LOCKING: 171 * Inherited from caller. 172 */ 173 174 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf) 175 { 176 tf->command = fis[2]; /* status */ 177 tf->feature = fis[3]; /* error */ 178 179 tf->lbal = fis[4]; 180 tf->lbam = fis[5]; 181 tf->lbah = fis[6]; 182 tf->device = fis[7]; 183 184 tf->hob_lbal = fis[8]; 185 tf->hob_lbam = fis[9]; 186 tf->hob_lbah = fis[10]; 187 188 tf->nsect = fis[12]; 189 tf->hob_nsect = fis[13]; 190 } 191 192 static const u8 ata_rw_cmds[] = { 193 /* pio multi */ 194 ATA_CMD_READ_MULTI, 195 ATA_CMD_WRITE_MULTI, 196 ATA_CMD_READ_MULTI_EXT, 197 ATA_CMD_WRITE_MULTI_EXT, 198 0, 199 0, 200 0, 201 ATA_CMD_WRITE_MULTI_FUA_EXT, 202 /* pio */ 203 ATA_CMD_PIO_READ, 204 ATA_CMD_PIO_WRITE, 205 ATA_CMD_PIO_READ_EXT, 206 ATA_CMD_PIO_WRITE_EXT, 207 0, 208 0, 209 0, 210 0, 211 /* dma */ 212 ATA_CMD_READ, 213 ATA_CMD_WRITE, 214 ATA_CMD_READ_EXT, 215 ATA_CMD_WRITE_EXT, 216 0, 217 0, 218 0, 219 ATA_CMD_WRITE_FUA_EXT 220 }; 221 222 /** 223 * ata_rwcmd_protocol - set taskfile r/w commands and protocol 224 * @tf: command to examine and configure 225 * @dev: device tf belongs to 226 * 227 * Examine the device configuration and tf->flags to calculate 228 * the proper read/write commands and protocol to use. 229 * 230 * LOCKING: 231 * caller. 232 */ 233 static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev) 234 { 235 u8 cmd; 236 237 int index, fua, lba48, write; 238 239 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0; 240 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0; 241 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0; 242 243 if (dev->flags & ATA_DFLAG_PIO) { 244 tf->protocol = ATA_PROT_PIO; 245 index = dev->multi_count ? 0 : 8; 246 } else if (lba48 && (dev->link->ap->flags & ATA_FLAG_PIO_LBA48)) { 247 /* Unable to use DMA due to host limitation */ 248 tf->protocol = ATA_PROT_PIO; 249 index = dev->multi_count ? 0 : 8; 250 } else { 251 tf->protocol = ATA_PROT_DMA; 252 index = 16; 253 } 254 255 cmd = ata_rw_cmds[index + fua + lba48 + write]; 256 if (cmd) { 257 tf->command = cmd; 258 return 0; 259 } 260 return -1; 261 } 262 263 /** 264 * ata_tf_read_block - Read block address from ATA taskfile 265 * @tf: ATA taskfile of interest 266 * @dev: ATA device @tf belongs to 267 * 268 * LOCKING: 269 * None. 270 * 271 * Read block address from @tf. This function can handle all 272 * three address formats - LBA, LBA48 and CHS. tf->protocol and 273 * flags select the address format to use. 274 * 275 * RETURNS: 276 * Block address read from @tf. 277 */ 278 u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev) 279 { 280 u64 block = 0; 281 282 if (tf->flags & ATA_TFLAG_LBA) { 283 if (tf->flags & ATA_TFLAG_LBA48) { 284 block |= (u64)tf->hob_lbah << 40; 285 block |= (u64)tf->hob_lbam << 32; 286 block |= tf->hob_lbal << 24; 287 } else 288 block |= (tf->device & 0xf) << 24; 289 290 block |= tf->lbah << 16; 291 block |= tf->lbam << 8; 292 block |= tf->lbal; 293 } else { 294 u32 cyl, head, sect; 295 296 cyl = tf->lbam | (tf->lbah << 8); 297 head = tf->device & 0xf; 298 sect = tf->lbal; 299 300 block = (cyl * dev->heads + head) * dev->sectors + sect; 301 } 302 303 return block; 304 } 305 306 /** 307 * ata_build_rw_tf - Build ATA taskfile for given read/write request 308 * @tf: Target ATA taskfile 309 * @dev: ATA device @tf belongs to 310 * @block: Block address 311 * @n_block: Number of blocks 312 * @tf_flags: RW/FUA etc... 313 * @tag: tag 314 * 315 * LOCKING: 316 * None. 317 * 318 * Build ATA taskfile @tf for read/write request described by 319 * @block, @n_block, @tf_flags and @tag on @dev. 320 * 321 * RETURNS: 322 * 323 * 0 on success, -ERANGE if the request is too large for @dev, 324 * -EINVAL if the request is invalid. 325 */ 326 int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev, 327 u64 block, u32 n_block, unsigned int tf_flags, 328 unsigned int tag) 329 { 330 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 331 tf->flags |= tf_flags; 332 333 if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) { 334 /* yay, NCQ */ 335 if (!lba_48_ok(block, n_block)) 336 return -ERANGE; 337 338 tf->protocol = ATA_PROT_NCQ; 339 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48; 340 341 if (tf->flags & ATA_TFLAG_WRITE) 342 tf->command = ATA_CMD_FPDMA_WRITE; 343 else 344 tf->command = ATA_CMD_FPDMA_READ; 345 346 tf->nsect = tag << 3; 347 tf->hob_feature = (n_block >> 8) & 0xff; 348 tf->feature = n_block & 0xff; 349 350 tf->hob_lbah = (block >> 40) & 0xff; 351 tf->hob_lbam = (block >> 32) & 0xff; 352 tf->hob_lbal = (block >> 24) & 0xff; 353 tf->lbah = (block >> 16) & 0xff; 354 tf->lbam = (block >> 8) & 0xff; 355 tf->lbal = block & 0xff; 356 357 tf->device = 1 << 6; 358 if (tf->flags & ATA_TFLAG_FUA) 359 tf->device |= 1 << 7; 360 } else if (dev->flags & ATA_DFLAG_LBA) { 361 tf->flags |= ATA_TFLAG_LBA; 362 363 if (lba_28_ok(block, n_block)) { 364 /* use LBA28 */ 365 tf->device |= (block >> 24) & 0xf; 366 } else if (lba_48_ok(block, n_block)) { 367 if (!(dev->flags & ATA_DFLAG_LBA48)) 368 return -ERANGE; 369 370 /* use LBA48 */ 371 tf->flags |= ATA_TFLAG_LBA48; 372 373 tf->hob_nsect = (n_block >> 8) & 0xff; 374 375 tf->hob_lbah = (block >> 40) & 0xff; 376 tf->hob_lbam = (block >> 32) & 0xff; 377 tf->hob_lbal = (block >> 24) & 0xff; 378 } else 379 /* request too large even for LBA48 */ 380 return -ERANGE; 381 382 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0)) 383 return -EINVAL; 384 385 tf->nsect = n_block & 0xff; 386 387 tf->lbah = (block >> 16) & 0xff; 388 tf->lbam = (block >> 8) & 0xff; 389 tf->lbal = block & 0xff; 390 391 tf->device |= ATA_LBA; 392 } else { 393 /* CHS */ 394 u32 sect, head, cyl, track; 395 396 /* The request -may- be too large for CHS addressing. */ 397 if (!lba_28_ok(block, n_block)) 398 return -ERANGE; 399 400 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0)) 401 return -EINVAL; 402 403 /* Convert LBA to CHS */ 404 track = (u32)block / dev->sectors; 405 cyl = track / dev->heads; 406 head = track % dev->heads; 407 sect = (u32)block % dev->sectors + 1; 408 409 DPRINTK("block %u track %u cyl %u head %u sect %u\n", 410 (u32)block, track, cyl, head, sect); 411 412 /* Check whether the converted CHS can fit. 413 Cylinder: 0-65535 414 Head: 0-15 415 Sector: 1-255*/ 416 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect)) 417 return -ERANGE; 418 419 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */ 420 tf->lbal = sect; 421 tf->lbam = cyl; 422 tf->lbah = cyl >> 8; 423 tf->device |= head; 424 } 425 426 return 0; 427 } 428 429 /** 430 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask 431 * @pio_mask: pio_mask 432 * @mwdma_mask: mwdma_mask 433 * @udma_mask: udma_mask 434 * 435 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single 436 * unsigned int xfer_mask. 437 * 438 * LOCKING: 439 * None. 440 * 441 * RETURNS: 442 * Packed xfer_mask. 443 */ 444 static unsigned int ata_pack_xfermask(unsigned int pio_mask, 445 unsigned int mwdma_mask, 446 unsigned int udma_mask) 447 { 448 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) | 449 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) | 450 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA); 451 } 452 453 /** 454 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks 455 * @xfer_mask: xfer_mask to unpack 456 * @pio_mask: resulting pio_mask 457 * @mwdma_mask: resulting mwdma_mask 458 * @udma_mask: resulting udma_mask 459 * 460 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask. 461 * Any NULL distination masks will be ignored. 462 */ 463 static void ata_unpack_xfermask(unsigned int xfer_mask, 464 unsigned int *pio_mask, 465 unsigned int *mwdma_mask, 466 unsigned int *udma_mask) 467 { 468 if (pio_mask) 469 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO; 470 if (mwdma_mask) 471 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA; 472 if (udma_mask) 473 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA; 474 } 475 476 static const struct ata_xfer_ent { 477 int shift, bits; 478 u8 base; 479 } ata_xfer_tbl[] = { 480 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 }, 481 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 }, 482 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 }, 483 { -1, }, 484 }; 485 486 /** 487 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask 488 * @xfer_mask: xfer_mask of interest 489 * 490 * Return matching XFER_* value for @xfer_mask. Only the highest 491 * bit of @xfer_mask is considered. 492 * 493 * LOCKING: 494 * None. 495 * 496 * RETURNS: 497 * Matching XFER_* value, 0 if no match found. 498 */ 499 static u8 ata_xfer_mask2mode(unsigned int xfer_mask) 500 { 501 int highbit = fls(xfer_mask) - 1; 502 const struct ata_xfer_ent *ent; 503 504 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) 505 if (highbit >= ent->shift && highbit < ent->shift + ent->bits) 506 return ent->base + highbit - ent->shift; 507 return 0; 508 } 509 510 /** 511 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_* 512 * @xfer_mode: XFER_* of interest 513 * 514 * Return matching xfer_mask for @xfer_mode. 515 * 516 * LOCKING: 517 * None. 518 * 519 * RETURNS: 520 * Matching xfer_mask, 0 if no match found. 521 */ 522 static unsigned int ata_xfer_mode2mask(u8 xfer_mode) 523 { 524 const struct ata_xfer_ent *ent; 525 526 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) 527 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) 528 return 1 << (ent->shift + xfer_mode - ent->base); 529 return 0; 530 } 531 532 /** 533 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_* 534 * @xfer_mode: XFER_* of interest 535 * 536 * Return matching xfer_shift for @xfer_mode. 537 * 538 * LOCKING: 539 * None. 540 * 541 * RETURNS: 542 * Matching xfer_shift, -1 if no match found. 543 */ 544 static int ata_xfer_mode2shift(unsigned int xfer_mode) 545 { 546 const struct ata_xfer_ent *ent; 547 548 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) 549 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) 550 return ent->shift; 551 return -1; 552 } 553 554 /** 555 * ata_mode_string - convert xfer_mask to string 556 * @xfer_mask: mask of bits supported; only highest bit counts. 557 * 558 * Determine string which represents the highest speed 559 * (highest bit in @modemask). 560 * 561 * LOCKING: 562 * None. 563 * 564 * RETURNS: 565 * Constant C string representing highest speed listed in 566 * @mode_mask, or the constant C string "<n/a>". 567 */ 568 static const char *ata_mode_string(unsigned int xfer_mask) 569 { 570 static const char * const xfer_mode_str[] = { 571 "PIO0", 572 "PIO1", 573 "PIO2", 574 "PIO3", 575 "PIO4", 576 "PIO5", 577 "PIO6", 578 "MWDMA0", 579 "MWDMA1", 580 "MWDMA2", 581 "MWDMA3", 582 "MWDMA4", 583 "UDMA/16", 584 "UDMA/25", 585 "UDMA/33", 586 "UDMA/44", 587 "UDMA/66", 588 "UDMA/100", 589 "UDMA/133", 590 "UDMA7", 591 }; 592 int highbit; 593 594 highbit = fls(xfer_mask) - 1; 595 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str)) 596 return xfer_mode_str[highbit]; 597 return "<n/a>"; 598 } 599 600 static const char *sata_spd_string(unsigned int spd) 601 { 602 static const char * const spd_str[] = { 603 "1.5 Gbps", 604 "3.0 Gbps", 605 }; 606 607 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str)) 608 return "<unknown>"; 609 return spd_str[spd - 1]; 610 } 611 612 void ata_dev_disable(struct ata_device *dev) 613 { 614 if (ata_dev_enabled(dev)) { 615 if (ata_msg_drv(dev->link->ap)) 616 ata_dev_printk(dev, KERN_WARNING, "disabled\n"); 617 ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO0 | 618 ATA_DNXFER_QUIET); 619 dev->class++; 620 } 621 } 622 623 static int ata_dev_set_dipm(struct ata_device *dev, enum link_pm policy) 624 { 625 struct ata_link *link = dev->link; 626 struct ata_port *ap = link->ap; 627 u32 scontrol; 628 unsigned int err_mask; 629 int rc; 630 631 /* 632 * disallow DIPM for drivers which haven't set 633 * ATA_FLAG_IPM. This is because when DIPM is enabled, 634 * phy ready will be set in the interrupt status on 635 * state changes, which will cause some drivers to 636 * think there are errors - additionally drivers will 637 * need to disable hot plug. 638 */ 639 if (!(ap->flags & ATA_FLAG_IPM) || !ata_dev_enabled(dev)) { 640 ap->pm_policy = NOT_AVAILABLE; 641 return -EINVAL; 642 } 643 644 /* 645 * For DIPM, we will only enable it for the 646 * min_power setting. 647 * 648 * Why? Because Disks are too stupid to know that 649 * If the host rejects a request to go to SLUMBER 650 * they should retry at PARTIAL, and instead it 651 * just would give up. So, for medium_power to 652 * work at all, we need to only allow HIPM. 653 */ 654 rc = sata_scr_read(link, SCR_CONTROL, &scontrol); 655 if (rc) 656 return rc; 657 658 switch (policy) { 659 case MIN_POWER: 660 /* no restrictions on IPM transitions */ 661 scontrol &= ~(0x3 << 8); 662 rc = sata_scr_write(link, SCR_CONTROL, scontrol); 663 if (rc) 664 return rc; 665 666 /* enable DIPM */ 667 if (dev->flags & ATA_DFLAG_DIPM) 668 err_mask = ata_dev_set_feature(dev, 669 SETFEATURES_SATA_ENABLE, SATA_DIPM); 670 break; 671 case MEDIUM_POWER: 672 /* allow IPM to PARTIAL */ 673 scontrol &= ~(0x1 << 8); 674 scontrol |= (0x2 << 8); 675 rc = sata_scr_write(link, SCR_CONTROL, scontrol); 676 if (rc) 677 return rc; 678 679 /* 680 * we don't have to disable DIPM since IPM flags 681 * disallow transitions to SLUMBER, which effectively 682 * disable DIPM if it does not support PARTIAL 683 */ 684 break; 685 case NOT_AVAILABLE: 686 case MAX_PERFORMANCE: 687 /* disable all IPM transitions */ 688 scontrol |= (0x3 << 8); 689 rc = sata_scr_write(link, SCR_CONTROL, scontrol); 690 if (rc) 691 return rc; 692 693 /* 694 * we don't have to disable DIPM since IPM flags 695 * disallow all transitions which effectively 696 * disable DIPM anyway. 697 */ 698 break; 699 } 700 701 /* FIXME: handle SET FEATURES failure */ 702 (void) err_mask; 703 704 return 0; 705 } 706 707 /** 708 * ata_dev_enable_pm - enable SATA interface power management 709 * @dev: device to enable power management 710 * @policy: the link power management policy 711 * 712 * Enable SATA Interface power management. This will enable 713 * Device Interface Power Management (DIPM) for min_power 714 * policy, and then call driver specific callbacks for 715 * enabling Host Initiated Power management. 716 * 717 * Locking: Caller. 718 * Returns: -EINVAL if IPM is not supported, 0 otherwise. 719 */ 720 void ata_dev_enable_pm(struct ata_device *dev, enum link_pm policy) 721 { 722 int rc = 0; 723 struct ata_port *ap = dev->link->ap; 724 725 /* set HIPM first, then DIPM */ 726 if (ap->ops->enable_pm) 727 rc = ap->ops->enable_pm(ap, policy); 728 if (rc) 729 goto enable_pm_out; 730 rc = ata_dev_set_dipm(dev, policy); 731 732 enable_pm_out: 733 if (rc) 734 ap->pm_policy = MAX_PERFORMANCE; 735 else 736 ap->pm_policy = policy; 737 return /* rc */; /* hopefully we can use 'rc' eventually */ 738 } 739 740 #ifdef CONFIG_PM 741 /** 742 * ata_dev_disable_pm - disable SATA interface power management 743 * @dev: device to disable power management 744 * 745 * Disable SATA Interface power management. This will disable 746 * Device Interface Power Management (DIPM) without changing 747 * policy, call driver specific callbacks for disabling Host 748 * Initiated Power management. 749 * 750 * Locking: Caller. 751 * Returns: void 752 */ 753 static void ata_dev_disable_pm(struct ata_device *dev) 754 { 755 struct ata_port *ap = dev->link->ap; 756 757 ata_dev_set_dipm(dev, MAX_PERFORMANCE); 758 if (ap->ops->disable_pm) 759 ap->ops->disable_pm(ap); 760 } 761 #endif /* CONFIG_PM */ 762 763 void ata_lpm_schedule(struct ata_port *ap, enum link_pm policy) 764 { 765 ap->pm_policy = policy; 766 ap->link.eh_info.action |= ATA_EHI_LPM; 767 ap->link.eh_info.flags |= ATA_EHI_NO_AUTOPSY; 768 ata_port_schedule_eh(ap); 769 } 770 771 #ifdef CONFIG_PM 772 static void ata_lpm_enable(struct ata_host *host) 773 { 774 struct ata_link *link; 775 struct ata_port *ap; 776 struct ata_device *dev; 777 int i; 778 779 for (i = 0; i < host->n_ports; i++) { 780 ap = host->ports[i]; 781 ata_port_for_each_link(link, ap) { 782 ata_link_for_each_dev(dev, link) 783 ata_dev_disable_pm(dev); 784 } 785 } 786 } 787 788 static void ata_lpm_disable(struct ata_host *host) 789 { 790 int i; 791 792 for (i = 0; i < host->n_ports; i++) { 793 struct ata_port *ap = host->ports[i]; 794 ata_lpm_schedule(ap, ap->pm_policy); 795 } 796 } 797 #endif /* CONFIG_PM */ 798 799 800 /** 801 * ata_devchk - PATA device presence detection 802 * @ap: ATA channel to examine 803 * @device: Device to examine (starting at zero) 804 * 805 * This technique was originally described in 806 * Hale Landis's ATADRVR (www.ata-atapi.com), and 807 * later found its way into the ATA/ATAPI spec. 808 * 809 * Write a pattern to the ATA shadow registers, 810 * and if a device is present, it will respond by 811 * correctly storing and echoing back the 812 * ATA shadow register contents. 813 * 814 * LOCKING: 815 * caller. 816 */ 817 818 static unsigned int ata_devchk(struct ata_port *ap, unsigned int device) 819 { 820 struct ata_ioports *ioaddr = &ap->ioaddr; 821 u8 nsect, lbal; 822 823 ap->ops->dev_select(ap, device); 824 825 iowrite8(0x55, ioaddr->nsect_addr); 826 iowrite8(0xaa, ioaddr->lbal_addr); 827 828 iowrite8(0xaa, ioaddr->nsect_addr); 829 iowrite8(0x55, ioaddr->lbal_addr); 830 831 iowrite8(0x55, ioaddr->nsect_addr); 832 iowrite8(0xaa, ioaddr->lbal_addr); 833 834 nsect = ioread8(ioaddr->nsect_addr); 835 lbal = ioread8(ioaddr->lbal_addr); 836 837 if ((nsect == 0x55) && (lbal == 0xaa)) 838 return 1; /* we found a device */ 839 840 return 0; /* nothing found */ 841 } 842 843 /** 844 * ata_dev_classify - determine device type based on ATA-spec signature 845 * @tf: ATA taskfile register set for device to be identified 846 * 847 * Determine from taskfile register contents whether a device is 848 * ATA or ATAPI, as per "Signature and persistence" section 849 * of ATA/PI spec (volume 1, sect 5.14). 850 * 851 * LOCKING: 852 * None. 853 * 854 * RETURNS: 855 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, %ATA_DEV_PMP or 856 * %ATA_DEV_UNKNOWN the event of failure. 857 */ 858 unsigned int ata_dev_classify(const struct ata_taskfile *tf) 859 { 860 /* Apple's open source Darwin code hints that some devices only 861 * put a proper signature into the LBA mid/high registers, 862 * So, we only check those. It's sufficient for uniqueness. 863 * 864 * ATA/ATAPI-7 (d1532v1r1: Feb. 19, 2003) specified separate 865 * signatures for ATA and ATAPI devices attached on SerialATA, 866 * 0x3c/0xc3 and 0x69/0x96 respectively. However, SerialATA 867 * spec has never mentioned about using different signatures 868 * for ATA/ATAPI devices. Then, Serial ATA II: Port 869 * Multiplier specification began to use 0x69/0x96 to identify 870 * port multpliers and 0x3c/0xc3 to identify SEMB device. 871 * ATA/ATAPI-7 dropped descriptions about 0x3c/0xc3 and 872 * 0x69/0x96 shortly and described them as reserved for 873 * SerialATA. 874 * 875 * We follow the current spec and consider that 0x69/0x96 876 * identifies a port multiplier and 0x3c/0xc3 a SEMB device. 877 */ 878 if ((tf->lbam == 0) && (tf->lbah == 0)) { 879 DPRINTK("found ATA device by sig\n"); 880 return ATA_DEV_ATA; 881 } 882 883 if ((tf->lbam == 0x14) && (tf->lbah == 0xeb)) { 884 DPRINTK("found ATAPI device by sig\n"); 885 return ATA_DEV_ATAPI; 886 } 887 888 if ((tf->lbam == 0x69) && (tf->lbah == 0x96)) { 889 DPRINTK("found PMP device by sig\n"); 890 return ATA_DEV_PMP; 891 } 892 893 if ((tf->lbam == 0x3c) && (tf->lbah == 0xc3)) { 894 printk(KERN_INFO "ata: SEMB device ignored\n"); 895 return ATA_DEV_SEMB_UNSUP; /* not yet */ 896 } 897 898 DPRINTK("unknown device\n"); 899 return ATA_DEV_UNKNOWN; 900 } 901 902 /** 903 * ata_dev_try_classify - Parse returned ATA device signature 904 * @dev: ATA device to classify (starting at zero) 905 * @present: device seems present 906 * @r_err: Value of error register on completion 907 * 908 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, 909 * an ATA/ATAPI-defined set of values is placed in the ATA 910 * shadow registers, indicating the results of device detection 911 * and diagnostics. 912 * 913 * Select the ATA device, and read the values from the ATA shadow 914 * registers. Then parse according to the Error register value, 915 * and the spec-defined values examined by ata_dev_classify(). 916 * 917 * LOCKING: 918 * caller. 919 * 920 * RETURNS: 921 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE. 922 */ 923 unsigned int ata_dev_try_classify(struct ata_device *dev, int present, 924 u8 *r_err) 925 { 926 struct ata_port *ap = dev->link->ap; 927 struct ata_taskfile tf; 928 unsigned int class; 929 u8 err; 930 931 ap->ops->dev_select(ap, dev->devno); 932 933 memset(&tf, 0, sizeof(tf)); 934 935 ap->ops->tf_read(ap, &tf); 936 err = tf.feature; 937 if (r_err) 938 *r_err = err; 939 940 /* see if device passed diags: if master then continue and warn later */ 941 if (err == 0 && dev->devno == 0) 942 /* diagnostic fail : do nothing _YET_ */ 943 dev->horkage |= ATA_HORKAGE_DIAGNOSTIC; 944 else if (err == 1) 945 /* do nothing */ ; 946 else if ((dev->devno == 0) && (err == 0x81)) 947 /* do nothing */ ; 948 else 949 return ATA_DEV_NONE; 950 951 /* determine if device is ATA or ATAPI */ 952 class = ata_dev_classify(&tf); 953 954 if (class == ATA_DEV_UNKNOWN) { 955 /* If the device failed diagnostic, it's likely to 956 * have reported incorrect device signature too. 957 * Assume ATA device if the device seems present but 958 * device signature is invalid with diagnostic 959 * failure. 960 */ 961 if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC)) 962 class = ATA_DEV_ATA; 963 else 964 class = ATA_DEV_NONE; 965 } else if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) 966 class = ATA_DEV_NONE; 967 968 return class; 969 } 970 971 /** 972 * ata_id_string - Convert IDENTIFY DEVICE page into string 973 * @id: IDENTIFY DEVICE results we will examine 974 * @s: string into which data is output 975 * @ofs: offset into identify device page 976 * @len: length of string to return. must be an even number. 977 * 978 * The strings in the IDENTIFY DEVICE page are broken up into 979 * 16-bit chunks. Run through the string, and output each 980 * 8-bit chunk linearly, regardless of platform. 981 * 982 * LOCKING: 983 * caller. 984 */ 985 986 void ata_id_string(const u16 *id, unsigned char *s, 987 unsigned int ofs, unsigned int len) 988 { 989 unsigned int c; 990 991 while (len > 0) { 992 c = id[ofs] >> 8; 993 *s = c; 994 s++; 995 996 c = id[ofs] & 0xff; 997 *s = c; 998 s++; 999 1000 ofs++; 1001 len -= 2; 1002 } 1003 } 1004 1005 /** 1006 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string 1007 * @id: IDENTIFY DEVICE results we will examine 1008 * @s: string into which data is output 1009 * @ofs: offset into identify device page 1010 * @len: length of string to return. must be an odd number. 1011 * 1012 * This function is identical to ata_id_string except that it 1013 * trims trailing spaces and terminates the resulting string with 1014 * null. @len must be actual maximum length (even number) + 1. 1015 * 1016 * LOCKING: 1017 * caller. 1018 */ 1019 void ata_id_c_string(const u16 *id, unsigned char *s, 1020 unsigned int ofs, unsigned int len) 1021 { 1022 unsigned char *p; 1023 1024 WARN_ON(!(len & 1)); 1025 1026 ata_id_string(id, s, ofs, len - 1); 1027 1028 p = s + strnlen(s, len - 1); 1029 while (p > s && p[-1] == ' ') 1030 p--; 1031 *p = '\0'; 1032 } 1033 1034 static u64 ata_id_n_sectors(const u16 *id) 1035 { 1036 if (ata_id_has_lba(id)) { 1037 if (ata_id_has_lba48(id)) 1038 return ata_id_u64(id, 100); 1039 else 1040 return ata_id_u32(id, 60); 1041 } else { 1042 if (ata_id_current_chs_valid(id)) 1043 return ata_id_u32(id, 57); 1044 else 1045 return id[1] * id[3] * id[6]; 1046 } 1047 } 1048 1049 static u64 ata_tf_to_lba48(struct ata_taskfile *tf) 1050 { 1051 u64 sectors = 0; 1052 1053 sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40; 1054 sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32; 1055 sectors |= (tf->hob_lbal & 0xff) << 24; 1056 sectors |= (tf->lbah & 0xff) << 16; 1057 sectors |= (tf->lbam & 0xff) << 8; 1058 sectors |= (tf->lbal & 0xff); 1059 1060 return ++sectors; 1061 } 1062 1063 static u64 ata_tf_to_lba(struct ata_taskfile *tf) 1064 { 1065 u64 sectors = 0; 1066 1067 sectors |= (tf->device & 0x0f) << 24; 1068 sectors |= (tf->lbah & 0xff) << 16; 1069 sectors |= (tf->lbam & 0xff) << 8; 1070 sectors |= (tf->lbal & 0xff); 1071 1072 return ++sectors; 1073 } 1074 1075 /** 1076 * ata_read_native_max_address - Read native max address 1077 * @dev: target device 1078 * @max_sectors: out parameter for the result native max address 1079 * 1080 * Perform an LBA48 or LBA28 native size query upon the device in 1081 * question. 1082 * 1083 * RETURNS: 1084 * 0 on success, -EACCES if command is aborted by the drive. 1085 * -EIO on other errors. 1086 */ 1087 static int ata_read_native_max_address(struct ata_device *dev, u64 *max_sectors) 1088 { 1089 unsigned int err_mask; 1090 struct ata_taskfile tf; 1091 int lba48 = ata_id_has_lba48(dev->id); 1092 1093 ata_tf_init(dev, &tf); 1094 1095 /* always clear all address registers */ 1096 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR; 1097 1098 if (lba48) { 1099 tf.command = ATA_CMD_READ_NATIVE_MAX_EXT; 1100 tf.flags |= ATA_TFLAG_LBA48; 1101 } else 1102 tf.command = ATA_CMD_READ_NATIVE_MAX; 1103 1104 tf.protocol |= ATA_PROT_NODATA; 1105 tf.device |= ATA_LBA; 1106 1107 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); 1108 if (err_mask) { 1109 ata_dev_printk(dev, KERN_WARNING, "failed to read native " 1110 "max address (err_mask=0x%x)\n", err_mask); 1111 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED)) 1112 return -EACCES; 1113 return -EIO; 1114 } 1115 1116 if (lba48) 1117 *max_sectors = ata_tf_to_lba48(&tf); 1118 else 1119 *max_sectors = ata_tf_to_lba(&tf); 1120 if (dev->horkage & ATA_HORKAGE_HPA_SIZE) 1121 (*max_sectors)--; 1122 return 0; 1123 } 1124 1125 /** 1126 * ata_set_max_sectors - Set max sectors 1127 * @dev: target device 1128 * @new_sectors: new max sectors value to set for the device 1129 * 1130 * Set max sectors of @dev to @new_sectors. 1131 * 1132 * RETURNS: 1133 * 0 on success, -EACCES if command is aborted or denied (due to 1134 * previous non-volatile SET_MAX) by the drive. -EIO on other 1135 * errors. 1136 */ 1137 static int ata_set_max_sectors(struct ata_device *dev, u64 new_sectors) 1138 { 1139 unsigned int err_mask; 1140 struct ata_taskfile tf; 1141 int lba48 = ata_id_has_lba48(dev->id); 1142 1143 new_sectors--; 1144 1145 ata_tf_init(dev, &tf); 1146 1147 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR; 1148 1149 if (lba48) { 1150 tf.command = ATA_CMD_SET_MAX_EXT; 1151 tf.flags |= ATA_TFLAG_LBA48; 1152 1153 tf.hob_lbal = (new_sectors >> 24) & 0xff; 1154 tf.hob_lbam = (new_sectors >> 32) & 0xff; 1155 tf.hob_lbah = (new_sectors >> 40) & 0xff; 1156 } else { 1157 tf.command = ATA_CMD_SET_MAX; 1158 1159 tf.device |= (new_sectors >> 24) & 0xf; 1160 } 1161 1162 tf.protocol |= ATA_PROT_NODATA; 1163 tf.device |= ATA_LBA; 1164 1165 tf.lbal = (new_sectors >> 0) & 0xff; 1166 tf.lbam = (new_sectors >> 8) & 0xff; 1167 tf.lbah = (new_sectors >> 16) & 0xff; 1168 1169 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); 1170 if (err_mask) { 1171 ata_dev_printk(dev, KERN_WARNING, "failed to set " 1172 "max address (err_mask=0x%x)\n", err_mask); 1173 if (err_mask == AC_ERR_DEV && 1174 (tf.feature & (ATA_ABORTED | ATA_IDNF))) 1175 return -EACCES; 1176 return -EIO; 1177 } 1178 1179 return 0; 1180 } 1181 1182 /** 1183 * ata_hpa_resize - Resize a device with an HPA set 1184 * @dev: Device to resize 1185 * 1186 * Read the size of an LBA28 or LBA48 disk with HPA features and resize 1187 * it if required to the full size of the media. The caller must check 1188 * the drive has the HPA feature set enabled. 1189 * 1190 * RETURNS: 1191 * 0 on success, -errno on failure. 1192 */ 1193 static int ata_hpa_resize(struct ata_device *dev) 1194 { 1195 struct ata_eh_context *ehc = &dev->link->eh_context; 1196 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO; 1197 u64 sectors = ata_id_n_sectors(dev->id); 1198 u64 native_sectors; 1199 int rc; 1200 1201 /* do we need to do it? */ 1202 if (dev->class != ATA_DEV_ATA || 1203 !ata_id_has_lba(dev->id) || !ata_id_hpa_enabled(dev->id) || 1204 (dev->horkage & ATA_HORKAGE_BROKEN_HPA)) 1205 return 0; 1206 1207 /* read native max address */ 1208 rc = ata_read_native_max_address(dev, &native_sectors); 1209 if (rc) { 1210 /* If HPA isn't going to be unlocked, skip HPA 1211 * resizing from the next try. 1212 */ 1213 if (!ata_ignore_hpa) { 1214 ata_dev_printk(dev, KERN_WARNING, "HPA support seems " 1215 "broken, will skip HPA handling\n"); 1216 dev->horkage |= ATA_HORKAGE_BROKEN_HPA; 1217 1218 /* we can continue if device aborted the command */ 1219 if (rc == -EACCES) 1220 rc = 0; 1221 } 1222 1223 return rc; 1224 } 1225 1226 /* nothing to do? */ 1227 if (native_sectors <= sectors || !ata_ignore_hpa) { 1228 if (!print_info || native_sectors == sectors) 1229 return 0; 1230 1231 if (native_sectors > sectors) 1232 ata_dev_printk(dev, KERN_INFO, 1233 "HPA detected: current %llu, native %llu\n", 1234 (unsigned long long)sectors, 1235 (unsigned long long)native_sectors); 1236 else if (native_sectors < sectors) 1237 ata_dev_printk(dev, KERN_WARNING, 1238 "native sectors (%llu) is smaller than " 1239 "sectors (%llu)\n", 1240 (unsigned long long)native_sectors, 1241 (unsigned long long)sectors); 1242 return 0; 1243 } 1244 1245 /* let's unlock HPA */ 1246 rc = ata_set_max_sectors(dev, native_sectors); 1247 if (rc == -EACCES) { 1248 /* if device aborted the command, skip HPA resizing */ 1249 ata_dev_printk(dev, KERN_WARNING, "device aborted resize " 1250 "(%llu -> %llu), skipping HPA handling\n", 1251 (unsigned long long)sectors, 1252 (unsigned long long)native_sectors); 1253 dev->horkage |= ATA_HORKAGE_BROKEN_HPA; 1254 return 0; 1255 } else if (rc) 1256 return rc; 1257 1258 /* re-read IDENTIFY data */ 1259 rc = ata_dev_reread_id(dev, 0); 1260 if (rc) { 1261 ata_dev_printk(dev, KERN_ERR, "failed to re-read IDENTIFY " 1262 "data after HPA resizing\n"); 1263 return rc; 1264 } 1265 1266 if (print_info) { 1267 u64 new_sectors = ata_id_n_sectors(dev->id); 1268 ata_dev_printk(dev, KERN_INFO, 1269 "HPA unlocked: %llu -> %llu, native %llu\n", 1270 (unsigned long long)sectors, 1271 (unsigned long long)new_sectors, 1272 (unsigned long long)native_sectors); 1273 } 1274 1275 return 0; 1276 } 1277 1278 /** 1279 * ata_id_to_dma_mode - Identify DMA mode from id block 1280 * @dev: device to identify 1281 * @unknown: mode to assume if we cannot tell 1282 * 1283 * Set up the timing values for the device based upon the identify 1284 * reported values for the DMA mode. This function is used by drivers 1285 * which rely upon firmware configured modes, but wish to report the 1286 * mode correctly when possible. 1287 * 1288 * In addition we emit similarly formatted messages to the default 1289 * ata_dev_set_mode handler, in order to provide consistency of 1290 * presentation. 1291 */ 1292 1293 void ata_id_to_dma_mode(struct ata_device *dev, u8 unknown) 1294 { 1295 unsigned int mask; 1296 u8 mode; 1297 1298 /* Pack the DMA modes */ 1299 mask = ((dev->id[63] >> 8) << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA; 1300 if (dev->id[53] & 0x04) 1301 mask |= ((dev->id[88] >> 8) << ATA_SHIFT_UDMA) & ATA_MASK_UDMA; 1302 1303 /* Select the mode in use */ 1304 mode = ata_xfer_mask2mode(mask); 1305 1306 if (mode != 0) { 1307 ata_dev_printk(dev, KERN_INFO, "configured for %s\n", 1308 ata_mode_string(mask)); 1309 } else { 1310 /* SWDMA perhaps ? */ 1311 mode = unknown; 1312 ata_dev_printk(dev, KERN_INFO, "configured for DMA\n"); 1313 } 1314 1315 /* Configure the device reporting */ 1316 dev->xfer_mode = mode; 1317 dev->xfer_shift = ata_xfer_mode2shift(mode); 1318 } 1319 1320 /** 1321 * ata_noop_dev_select - Select device 0/1 on ATA bus 1322 * @ap: ATA channel to manipulate 1323 * @device: ATA device (numbered from zero) to select 1324 * 1325 * This function performs no actual function. 1326 * 1327 * May be used as the dev_select() entry in ata_port_operations. 1328 * 1329 * LOCKING: 1330 * caller. 1331 */ 1332 void ata_noop_dev_select(struct ata_port *ap, unsigned int device) 1333 { 1334 } 1335 1336 1337 /** 1338 * ata_std_dev_select - Select device 0/1 on ATA bus 1339 * @ap: ATA channel to manipulate 1340 * @device: ATA device (numbered from zero) to select 1341 * 1342 * Use the method defined in the ATA specification to 1343 * make either device 0, or device 1, active on the 1344 * ATA channel. Works with both PIO and MMIO. 1345 * 1346 * May be used as the dev_select() entry in ata_port_operations. 1347 * 1348 * LOCKING: 1349 * caller. 1350 */ 1351 1352 void ata_std_dev_select(struct ata_port *ap, unsigned int device) 1353 { 1354 u8 tmp; 1355 1356 if (device == 0) 1357 tmp = ATA_DEVICE_OBS; 1358 else 1359 tmp = ATA_DEVICE_OBS | ATA_DEV1; 1360 1361 iowrite8(tmp, ap->ioaddr.device_addr); 1362 ata_pause(ap); /* needed; also flushes, for mmio */ 1363 } 1364 1365 /** 1366 * ata_dev_select - Select device 0/1 on ATA bus 1367 * @ap: ATA channel to manipulate 1368 * @device: ATA device (numbered from zero) to select 1369 * @wait: non-zero to wait for Status register BSY bit to clear 1370 * @can_sleep: non-zero if context allows sleeping 1371 * 1372 * Use the method defined in the ATA specification to 1373 * make either device 0, or device 1, active on the 1374 * ATA channel. 1375 * 1376 * This is a high-level version of ata_std_dev_select(), 1377 * which additionally provides the services of inserting 1378 * the proper pauses and status polling, where needed. 1379 * 1380 * LOCKING: 1381 * caller. 1382 */ 1383 1384 void ata_dev_select(struct ata_port *ap, unsigned int device, 1385 unsigned int wait, unsigned int can_sleep) 1386 { 1387 if (ata_msg_probe(ap)) 1388 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, " 1389 "device %u, wait %u\n", device, wait); 1390 1391 if (wait) 1392 ata_wait_idle(ap); 1393 1394 ap->ops->dev_select(ap, device); 1395 1396 if (wait) { 1397 if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI) 1398 msleep(150); 1399 ata_wait_idle(ap); 1400 } 1401 } 1402 1403 /** 1404 * ata_dump_id - IDENTIFY DEVICE info debugging output 1405 * @id: IDENTIFY DEVICE page to dump 1406 * 1407 * Dump selected 16-bit words from the given IDENTIFY DEVICE 1408 * page. 1409 * 1410 * LOCKING: 1411 * caller. 1412 */ 1413 1414 static inline void ata_dump_id(const u16 *id) 1415 { 1416 DPRINTK("49==0x%04x " 1417 "53==0x%04x " 1418 "63==0x%04x " 1419 "64==0x%04x " 1420 "75==0x%04x \n", 1421 id[49], 1422 id[53], 1423 id[63], 1424 id[64], 1425 id[75]); 1426 DPRINTK("80==0x%04x " 1427 "81==0x%04x " 1428 "82==0x%04x " 1429 "83==0x%04x " 1430 "84==0x%04x \n", 1431 id[80], 1432 id[81], 1433 id[82], 1434 id[83], 1435 id[84]); 1436 DPRINTK("88==0x%04x " 1437 "93==0x%04x\n", 1438 id[88], 1439 id[93]); 1440 } 1441 1442 /** 1443 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data 1444 * @id: IDENTIFY data to compute xfer mask from 1445 * 1446 * Compute the xfermask for this device. This is not as trivial 1447 * as it seems if we must consider early devices correctly. 1448 * 1449 * FIXME: pre IDE drive timing (do we care ?). 1450 * 1451 * LOCKING: 1452 * None. 1453 * 1454 * RETURNS: 1455 * Computed xfermask 1456 */ 1457 static unsigned int ata_id_xfermask(const u16 *id) 1458 { 1459 unsigned int pio_mask, mwdma_mask, udma_mask; 1460 1461 /* Usual case. Word 53 indicates word 64 is valid */ 1462 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) { 1463 pio_mask = id[ATA_ID_PIO_MODES] & 0x03; 1464 pio_mask <<= 3; 1465 pio_mask |= 0x7; 1466 } else { 1467 /* If word 64 isn't valid then Word 51 high byte holds 1468 * the PIO timing number for the maximum. Turn it into 1469 * a mask. 1470 */ 1471 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF; 1472 if (mode < 5) /* Valid PIO range */ 1473 pio_mask = (2 << mode) - 1; 1474 else 1475 pio_mask = 1; 1476 1477 /* But wait.. there's more. Design your standards by 1478 * committee and you too can get a free iordy field to 1479 * process. However its the speeds not the modes that 1480 * are supported... Note drivers using the timing API 1481 * will get this right anyway 1482 */ 1483 } 1484 1485 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07; 1486 1487 if (ata_id_is_cfa(id)) { 1488 /* 1489 * Process compact flash extended modes 1490 */ 1491 int pio = id[163] & 0x7; 1492 int dma = (id[163] >> 3) & 7; 1493 1494 if (pio) 1495 pio_mask |= (1 << 5); 1496 if (pio > 1) 1497 pio_mask |= (1 << 6); 1498 if (dma) 1499 mwdma_mask |= (1 << 3); 1500 if (dma > 1) 1501 mwdma_mask |= (1 << 4); 1502 } 1503 1504 udma_mask = 0; 1505 if (id[ATA_ID_FIELD_VALID] & (1 << 2)) 1506 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff; 1507 1508 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); 1509 } 1510 1511 /** 1512 * ata_port_queue_task - Queue port_task 1513 * @ap: The ata_port to queue port_task for 1514 * @fn: workqueue function to be scheduled 1515 * @data: data for @fn to use 1516 * @delay: delay time for workqueue function 1517 * 1518 * Schedule @fn(@data) for execution after @delay jiffies using 1519 * port_task. There is one port_task per port and it's the 1520 * user(low level driver)'s responsibility to make sure that only 1521 * one task is active at any given time. 1522 * 1523 * libata core layer takes care of synchronization between 1524 * port_task and EH. ata_port_queue_task() may be ignored for EH 1525 * synchronization. 1526 * 1527 * LOCKING: 1528 * Inherited from caller. 1529 */ 1530 void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data, 1531 unsigned long delay) 1532 { 1533 PREPARE_DELAYED_WORK(&ap->port_task, fn); 1534 ap->port_task_data = data; 1535 1536 /* may fail if ata_port_flush_task() in progress */ 1537 queue_delayed_work(ata_wq, &ap->port_task, delay); 1538 } 1539 1540 /** 1541 * ata_port_flush_task - Flush port_task 1542 * @ap: The ata_port to flush port_task for 1543 * 1544 * After this function completes, port_task is guranteed not to 1545 * be running or scheduled. 1546 * 1547 * LOCKING: 1548 * Kernel thread context (may sleep) 1549 */ 1550 void ata_port_flush_task(struct ata_port *ap) 1551 { 1552 DPRINTK("ENTER\n"); 1553 1554 cancel_rearming_delayed_work(&ap->port_task); 1555 1556 if (ata_msg_ctl(ap)) 1557 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__); 1558 } 1559 1560 static void ata_qc_complete_internal(struct ata_queued_cmd *qc) 1561 { 1562 struct completion *waiting = qc->private_data; 1563 1564 complete(waiting); 1565 } 1566 1567 /** 1568 * ata_exec_internal_sg - execute libata internal command 1569 * @dev: Device to which the command is sent 1570 * @tf: Taskfile registers for the command and the result 1571 * @cdb: CDB for packet command 1572 * @dma_dir: Data tranfer direction of the command 1573 * @sgl: sg list for the data buffer of the command 1574 * @n_elem: Number of sg entries 1575 * @timeout: Timeout in msecs (0 for default) 1576 * 1577 * Executes libata internal command with timeout. @tf contains 1578 * command on entry and result on return. Timeout and error 1579 * conditions are reported via return value. No recovery action 1580 * is taken after a command times out. It's caller's duty to 1581 * clean up after timeout. 1582 * 1583 * LOCKING: 1584 * None. Should be called with kernel context, might sleep. 1585 * 1586 * RETURNS: 1587 * Zero on success, AC_ERR_* mask on failure 1588 */ 1589 unsigned ata_exec_internal_sg(struct ata_device *dev, 1590 struct ata_taskfile *tf, const u8 *cdb, 1591 int dma_dir, struct scatterlist *sgl, 1592 unsigned int n_elem, unsigned long timeout) 1593 { 1594 struct ata_link *link = dev->link; 1595 struct ata_port *ap = link->ap; 1596 u8 command = tf->command; 1597 struct ata_queued_cmd *qc; 1598 unsigned int tag, preempted_tag; 1599 u32 preempted_sactive, preempted_qc_active; 1600 int preempted_nr_active_links; 1601 DECLARE_COMPLETION_ONSTACK(wait); 1602 unsigned long flags; 1603 unsigned int err_mask; 1604 int rc; 1605 1606 spin_lock_irqsave(ap->lock, flags); 1607 1608 /* no internal command while frozen */ 1609 if (ap->pflags & ATA_PFLAG_FROZEN) { 1610 spin_unlock_irqrestore(ap->lock, flags); 1611 return AC_ERR_SYSTEM; 1612 } 1613 1614 /* initialize internal qc */ 1615 1616 /* XXX: Tag 0 is used for drivers with legacy EH as some 1617 * drivers choke if any other tag is given. This breaks 1618 * ata_tag_internal() test for those drivers. Don't use new 1619 * EH stuff without converting to it. 1620 */ 1621 if (ap->ops->error_handler) 1622 tag = ATA_TAG_INTERNAL; 1623 else 1624 tag = 0; 1625 1626 if (test_and_set_bit(tag, &ap->qc_allocated)) 1627 BUG(); 1628 qc = __ata_qc_from_tag(ap, tag); 1629 1630 qc->tag = tag; 1631 qc->scsicmd = NULL; 1632 qc->ap = ap; 1633 qc->dev = dev; 1634 ata_qc_reinit(qc); 1635 1636 preempted_tag = link->active_tag; 1637 preempted_sactive = link->sactive; 1638 preempted_qc_active = ap->qc_active; 1639 preempted_nr_active_links = ap->nr_active_links; 1640 link->active_tag = ATA_TAG_POISON; 1641 link->sactive = 0; 1642 ap->qc_active = 0; 1643 ap->nr_active_links = 0; 1644 1645 /* prepare & issue qc */ 1646 qc->tf = *tf; 1647 if (cdb) 1648 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN); 1649 qc->flags |= ATA_QCFLAG_RESULT_TF; 1650 qc->dma_dir = dma_dir; 1651 if (dma_dir != DMA_NONE) { 1652 unsigned int i, buflen = 0; 1653 struct scatterlist *sg; 1654 1655 for_each_sg(sgl, sg, n_elem, i) 1656 buflen += sg->length; 1657 1658 ata_sg_init(qc, sgl, n_elem); 1659 qc->nbytes = buflen; 1660 } 1661 1662 qc->private_data = &wait; 1663 qc->complete_fn = ata_qc_complete_internal; 1664 1665 ata_qc_issue(qc); 1666 1667 spin_unlock_irqrestore(ap->lock, flags); 1668 1669 if (!timeout) 1670 timeout = ata_probe_timeout * 1000 / HZ; 1671 1672 rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout)); 1673 1674 ata_port_flush_task(ap); 1675 1676 if (!rc) { 1677 spin_lock_irqsave(ap->lock, flags); 1678 1679 /* We're racing with irq here. If we lose, the 1680 * following test prevents us from completing the qc 1681 * twice. If we win, the port is frozen and will be 1682 * cleaned up by ->post_internal_cmd(). 1683 */ 1684 if (qc->flags & ATA_QCFLAG_ACTIVE) { 1685 qc->err_mask |= AC_ERR_TIMEOUT; 1686 1687 if (ap->ops->error_handler) 1688 ata_port_freeze(ap); 1689 else 1690 ata_qc_complete(qc); 1691 1692 if (ata_msg_warn(ap)) 1693 ata_dev_printk(dev, KERN_WARNING, 1694 "qc timeout (cmd 0x%x)\n", command); 1695 } 1696 1697 spin_unlock_irqrestore(ap->lock, flags); 1698 } 1699 1700 /* do post_internal_cmd */ 1701 if (ap->ops->post_internal_cmd) 1702 ap->ops->post_internal_cmd(qc); 1703 1704 /* perform minimal error analysis */ 1705 if (qc->flags & ATA_QCFLAG_FAILED) { 1706 if (qc->result_tf.command & (ATA_ERR | ATA_DF)) 1707 qc->err_mask |= AC_ERR_DEV; 1708 1709 if (!qc->err_mask) 1710 qc->err_mask |= AC_ERR_OTHER; 1711 1712 if (qc->err_mask & ~AC_ERR_OTHER) 1713 qc->err_mask &= ~AC_ERR_OTHER; 1714 } 1715 1716 /* finish up */ 1717 spin_lock_irqsave(ap->lock, flags); 1718 1719 *tf = qc->result_tf; 1720 err_mask = qc->err_mask; 1721 1722 ata_qc_free(qc); 1723 link->active_tag = preempted_tag; 1724 link->sactive = preempted_sactive; 1725 ap->qc_active = preempted_qc_active; 1726 ap->nr_active_links = preempted_nr_active_links; 1727 1728 /* XXX - Some LLDDs (sata_mv) disable port on command failure. 1729 * Until those drivers are fixed, we detect the condition 1730 * here, fail the command with AC_ERR_SYSTEM and reenable the 1731 * port. 1732 * 1733 * Note that this doesn't change any behavior as internal 1734 * command failure results in disabling the device in the 1735 * higher layer for LLDDs without new reset/EH callbacks. 1736 * 1737 * Kill the following code as soon as those drivers are fixed. 1738 */ 1739 if (ap->flags & ATA_FLAG_DISABLED) { 1740 err_mask |= AC_ERR_SYSTEM; 1741 ata_port_probe(ap); 1742 } 1743 1744 spin_unlock_irqrestore(ap->lock, flags); 1745 1746 return err_mask; 1747 } 1748 1749 /** 1750 * ata_exec_internal - execute libata internal command 1751 * @dev: Device to which the command is sent 1752 * @tf: Taskfile registers for the command and the result 1753 * @cdb: CDB for packet command 1754 * @dma_dir: Data tranfer direction of the command 1755 * @buf: Data buffer of the command 1756 * @buflen: Length of data buffer 1757 * @timeout: Timeout in msecs (0 for default) 1758 * 1759 * Wrapper around ata_exec_internal_sg() which takes simple 1760 * buffer instead of sg list. 1761 * 1762 * LOCKING: 1763 * None. Should be called with kernel context, might sleep. 1764 * 1765 * RETURNS: 1766 * Zero on success, AC_ERR_* mask on failure 1767 */ 1768 unsigned ata_exec_internal(struct ata_device *dev, 1769 struct ata_taskfile *tf, const u8 *cdb, 1770 int dma_dir, void *buf, unsigned int buflen, 1771 unsigned long timeout) 1772 { 1773 struct scatterlist *psg = NULL, sg; 1774 unsigned int n_elem = 0; 1775 1776 if (dma_dir != DMA_NONE) { 1777 WARN_ON(!buf); 1778 sg_init_one(&sg, buf, buflen); 1779 psg = &sg; 1780 n_elem++; 1781 } 1782 1783 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem, 1784 timeout); 1785 } 1786 1787 /** 1788 * ata_do_simple_cmd - execute simple internal command 1789 * @dev: Device to which the command is sent 1790 * @cmd: Opcode to execute 1791 * 1792 * Execute a 'simple' command, that only consists of the opcode 1793 * 'cmd' itself, without filling any other registers 1794 * 1795 * LOCKING: 1796 * Kernel thread context (may sleep). 1797 * 1798 * RETURNS: 1799 * Zero on success, AC_ERR_* mask on failure 1800 */ 1801 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd) 1802 { 1803 struct ata_taskfile tf; 1804 1805 ata_tf_init(dev, &tf); 1806 1807 tf.command = cmd; 1808 tf.flags |= ATA_TFLAG_DEVICE; 1809 tf.protocol = ATA_PROT_NODATA; 1810 1811 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); 1812 } 1813 1814 /** 1815 * ata_pio_need_iordy - check if iordy needed 1816 * @adev: ATA device 1817 * 1818 * Check if the current speed of the device requires IORDY. Used 1819 * by various controllers for chip configuration. 1820 */ 1821 1822 unsigned int ata_pio_need_iordy(const struct ata_device *adev) 1823 { 1824 /* Controller doesn't support IORDY. Probably a pointless check 1825 as the caller should know this */ 1826 if (adev->link->ap->flags & ATA_FLAG_NO_IORDY) 1827 return 0; 1828 /* PIO3 and higher it is mandatory */ 1829 if (adev->pio_mode > XFER_PIO_2) 1830 return 1; 1831 /* We turn it on when possible */ 1832 if (ata_id_has_iordy(adev->id)) 1833 return 1; 1834 return 0; 1835 } 1836 1837 /** 1838 * ata_pio_mask_no_iordy - Return the non IORDY mask 1839 * @adev: ATA device 1840 * 1841 * Compute the highest mode possible if we are not using iordy. Return 1842 * -1 if no iordy mode is available. 1843 */ 1844 1845 static u32 ata_pio_mask_no_iordy(const struct ata_device *adev) 1846 { 1847 /* If we have no drive specific rule, then PIO 2 is non IORDY */ 1848 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */ 1849 u16 pio = adev->id[ATA_ID_EIDE_PIO]; 1850 /* Is the speed faster than the drive allows non IORDY ? */ 1851 if (pio) { 1852 /* This is cycle times not frequency - watch the logic! */ 1853 if (pio > 240) /* PIO2 is 240nS per cycle */ 1854 return 3 << ATA_SHIFT_PIO; 1855 return 7 << ATA_SHIFT_PIO; 1856 } 1857 } 1858 return 3 << ATA_SHIFT_PIO; 1859 } 1860 1861 /** 1862 * ata_dev_read_id - Read ID data from the specified device 1863 * @dev: target device 1864 * @p_class: pointer to class of the target device (may be changed) 1865 * @flags: ATA_READID_* flags 1866 * @id: buffer to read IDENTIFY data into 1867 * 1868 * Read ID data from the specified device. ATA_CMD_ID_ATA is 1869 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI 1870 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS 1871 * for pre-ATA4 drives. 1872 * 1873 * FIXME: ATA_CMD_ID_ATA is optional for early drives and right 1874 * now we abort if we hit that case. 1875 * 1876 * LOCKING: 1877 * Kernel thread context (may sleep) 1878 * 1879 * RETURNS: 1880 * 0 on success, -errno otherwise. 1881 */ 1882 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class, 1883 unsigned int flags, u16 *id) 1884 { 1885 struct ata_port *ap = dev->link->ap; 1886 unsigned int class = *p_class; 1887 struct ata_taskfile tf; 1888 unsigned int err_mask = 0; 1889 const char *reason; 1890 int may_fallback = 1, tried_spinup = 0; 1891 int rc; 1892 1893 if (ata_msg_ctl(ap)) 1894 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__); 1895 1896 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */ 1897 retry: 1898 ata_tf_init(dev, &tf); 1899 1900 switch (class) { 1901 case ATA_DEV_ATA: 1902 tf.command = ATA_CMD_ID_ATA; 1903 break; 1904 case ATA_DEV_ATAPI: 1905 tf.command = ATA_CMD_ID_ATAPI; 1906 break; 1907 default: 1908 rc = -ENODEV; 1909 reason = "unsupported class"; 1910 goto err_out; 1911 } 1912 1913 tf.protocol = ATA_PROT_PIO; 1914 1915 /* Some devices choke if TF registers contain garbage. Make 1916 * sure those are properly initialized. 1917 */ 1918 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 1919 1920 /* Device presence detection is unreliable on some 1921 * controllers. Always poll IDENTIFY if available. 1922 */ 1923 tf.flags |= ATA_TFLAG_POLLING; 1924 1925 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE, 1926 id, sizeof(id[0]) * ATA_ID_WORDS, 0); 1927 if (err_mask) { 1928 if (err_mask & AC_ERR_NODEV_HINT) { 1929 DPRINTK("ata%u.%d: NODEV after polling detection\n", 1930 ap->print_id, dev->devno); 1931 return -ENOENT; 1932 } 1933 1934 /* Device or controller might have reported the wrong 1935 * device class. Give a shot at the other IDENTIFY if 1936 * the current one is aborted by the device. 1937 */ 1938 if (may_fallback && 1939 (err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) { 1940 may_fallback = 0; 1941 1942 if (class == ATA_DEV_ATA) 1943 class = ATA_DEV_ATAPI; 1944 else 1945 class = ATA_DEV_ATA; 1946 goto retry; 1947 } 1948 1949 rc = -EIO; 1950 reason = "I/O error"; 1951 goto err_out; 1952 } 1953 1954 /* Falling back doesn't make sense if ID data was read 1955 * successfully at least once. 1956 */ 1957 may_fallback = 0; 1958 1959 swap_buf_le16(id, ATA_ID_WORDS); 1960 1961 /* sanity check */ 1962 rc = -EINVAL; 1963 reason = "device reports invalid type"; 1964 1965 if (class == ATA_DEV_ATA) { 1966 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id)) 1967 goto err_out; 1968 } else { 1969 if (ata_id_is_ata(id)) 1970 goto err_out; 1971 } 1972 1973 if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) { 1974 tried_spinup = 1; 1975 /* 1976 * Drive powered-up in standby mode, and requires a specific 1977 * SET_FEATURES spin-up subcommand before it will accept 1978 * anything other than the original IDENTIFY command. 1979 */ 1980 err_mask = ata_dev_set_feature(dev, SETFEATURES_SPINUP, 0); 1981 if (err_mask && id[2] != 0x738c) { 1982 rc = -EIO; 1983 reason = "SPINUP failed"; 1984 goto err_out; 1985 } 1986 /* 1987 * If the drive initially returned incomplete IDENTIFY info, 1988 * we now must reissue the IDENTIFY command. 1989 */ 1990 if (id[2] == 0x37c8) 1991 goto retry; 1992 } 1993 1994 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) { 1995 /* 1996 * The exact sequence expected by certain pre-ATA4 drives is: 1997 * SRST RESET 1998 * IDENTIFY (optional in early ATA) 1999 * INITIALIZE DEVICE PARAMETERS (later IDE and ATA) 2000 * anything else.. 2001 * Some drives were very specific about that exact sequence. 2002 * 2003 * Note that ATA4 says lba is mandatory so the second check 2004 * shoud never trigger. 2005 */ 2006 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) { 2007 err_mask = ata_dev_init_params(dev, id[3], id[6]); 2008 if (err_mask) { 2009 rc = -EIO; 2010 reason = "INIT_DEV_PARAMS failed"; 2011 goto err_out; 2012 } 2013 2014 /* current CHS translation info (id[53-58]) might be 2015 * changed. reread the identify device info. 2016 */ 2017 flags &= ~ATA_READID_POSTRESET; 2018 goto retry; 2019 } 2020 } 2021 2022 *p_class = class; 2023 2024 return 0; 2025 2026 err_out: 2027 if (ata_msg_warn(ap)) 2028 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY " 2029 "(%s, err_mask=0x%x)\n", reason, err_mask); 2030 return rc; 2031 } 2032 2033 static inline u8 ata_dev_knobble(struct ata_device *dev) 2034 { 2035 struct ata_port *ap = dev->link->ap; 2036 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id))); 2037 } 2038 2039 static void ata_dev_config_ncq(struct ata_device *dev, 2040 char *desc, size_t desc_sz) 2041 { 2042 struct ata_port *ap = dev->link->ap; 2043 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id); 2044 2045 if (!ata_id_has_ncq(dev->id)) { 2046 desc[0] = '\0'; 2047 return; 2048 } 2049 if (dev->horkage & ATA_HORKAGE_NONCQ) { 2050 snprintf(desc, desc_sz, "NCQ (not used)"); 2051 return; 2052 } 2053 if (ap->flags & ATA_FLAG_NCQ) { 2054 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1); 2055 dev->flags |= ATA_DFLAG_NCQ; 2056 } 2057 2058 if (hdepth >= ddepth) 2059 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth); 2060 else 2061 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth); 2062 } 2063 2064 /** 2065 * ata_dev_configure - Configure the specified ATA/ATAPI device 2066 * @dev: Target device to configure 2067 * 2068 * Configure @dev according to @dev->id. Generic and low-level 2069 * driver specific fixups are also applied. 2070 * 2071 * LOCKING: 2072 * Kernel thread context (may sleep) 2073 * 2074 * RETURNS: 2075 * 0 on success, -errno otherwise 2076 */ 2077 int ata_dev_configure(struct ata_device *dev) 2078 { 2079 struct ata_port *ap = dev->link->ap; 2080 struct ata_eh_context *ehc = &dev->link->eh_context; 2081 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO; 2082 const u16 *id = dev->id; 2083 unsigned int xfer_mask; 2084 char revbuf[7]; /* XYZ-99\0 */ 2085 char fwrevbuf[ATA_ID_FW_REV_LEN+1]; 2086 char modelbuf[ATA_ID_PROD_LEN+1]; 2087 int rc; 2088 2089 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) { 2090 ata_dev_printk(dev, KERN_INFO, "%s: ENTER/EXIT -- nodev\n", 2091 __FUNCTION__); 2092 return 0; 2093 } 2094 2095 if (ata_msg_probe(ap)) 2096 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__); 2097 2098 /* set horkage */ 2099 dev->horkage |= ata_dev_blacklisted(dev); 2100 2101 /* let ACPI work its magic */ 2102 rc = ata_acpi_on_devcfg(dev); 2103 if (rc) 2104 return rc; 2105 2106 /* massage HPA, do it early as it might change IDENTIFY data */ 2107 rc = ata_hpa_resize(dev); 2108 if (rc) 2109 return rc; 2110 2111 /* print device capabilities */ 2112 if (ata_msg_probe(ap)) 2113 ata_dev_printk(dev, KERN_DEBUG, 2114 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x " 2115 "85:%04x 86:%04x 87:%04x 88:%04x\n", 2116 __FUNCTION__, 2117 id[49], id[82], id[83], id[84], 2118 id[85], id[86], id[87], id[88]); 2119 2120 /* initialize to-be-configured parameters */ 2121 dev->flags &= ~ATA_DFLAG_CFG_MASK; 2122 dev->max_sectors = 0; 2123 dev->cdb_len = 0; 2124 dev->n_sectors = 0; 2125 dev->cylinders = 0; 2126 dev->heads = 0; 2127 dev->sectors = 0; 2128 2129 /* 2130 * common ATA, ATAPI feature tests 2131 */ 2132 2133 /* find max transfer mode; for printk only */ 2134 xfer_mask = ata_id_xfermask(id); 2135 2136 if (ata_msg_probe(ap)) 2137 ata_dump_id(id); 2138 2139 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */ 2140 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV, 2141 sizeof(fwrevbuf)); 2142 2143 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD, 2144 sizeof(modelbuf)); 2145 2146 /* ATA-specific feature tests */ 2147 if (dev->class == ATA_DEV_ATA) { 2148 if (ata_id_is_cfa(id)) { 2149 if (id[162] & 1) /* CPRM may make this media unusable */ 2150 ata_dev_printk(dev, KERN_WARNING, 2151 "supports DRM functions and may " 2152 "not be fully accessable.\n"); 2153 snprintf(revbuf, 7, "CFA"); 2154 } else 2155 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id)); 2156 2157 dev->n_sectors = ata_id_n_sectors(id); 2158 2159 if (dev->id[59] & 0x100) 2160 dev->multi_count = dev->id[59] & 0xff; 2161 2162 if (ata_id_has_lba(id)) { 2163 const char *lba_desc; 2164 char ncq_desc[20]; 2165 2166 lba_desc = "LBA"; 2167 dev->flags |= ATA_DFLAG_LBA; 2168 if (ata_id_has_lba48(id)) { 2169 dev->flags |= ATA_DFLAG_LBA48; 2170 lba_desc = "LBA48"; 2171 2172 if (dev->n_sectors >= (1UL << 28) && 2173 ata_id_has_flush_ext(id)) 2174 dev->flags |= ATA_DFLAG_FLUSH_EXT; 2175 } 2176 2177 /* config NCQ */ 2178 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc)); 2179 2180 /* print device info to dmesg */ 2181 if (ata_msg_drv(ap) && print_info) { 2182 ata_dev_printk(dev, KERN_INFO, 2183 "%s: %s, %s, max %s\n", 2184 revbuf, modelbuf, fwrevbuf, 2185 ata_mode_string(xfer_mask)); 2186 ata_dev_printk(dev, KERN_INFO, 2187 "%Lu sectors, multi %u: %s %s\n", 2188 (unsigned long long)dev->n_sectors, 2189 dev->multi_count, lba_desc, ncq_desc); 2190 } 2191 } else { 2192 /* CHS */ 2193 2194 /* Default translation */ 2195 dev->cylinders = id[1]; 2196 dev->heads = id[3]; 2197 dev->sectors = id[6]; 2198 2199 if (ata_id_current_chs_valid(id)) { 2200 /* Current CHS translation is valid. */ 2201 dev->cylinders = id[54]; 2202 dev->heads = id[55]; 2203 dev->sectors = id[56]; 2204 } 2205 2206 /* print device info to dmesg */ 2207 if (ata_msg_drv(ap) && print_info) { 2208 ata_dev_printk(dev, KERN_INFO, 2209 "%s: %s, %s, max %s\n", 2210 revbuf, modelbuf, fwrevbuf, 2211 ata_mode_string(xfer_mask)); 2212 ata_dev_printk(dev, KERN_INFO, 2213 "%Lu sectors, multi %u, CHS %u/%u/%u\n", 2214 (unsigned long long)dev->n_sectors, 2215 dev->multi_count, dev->cylinders, 2216 dev->heads, dev->sectors); 2217 } 2218 } 2219 2220 dev->cdb_len = 16; 2221 } 2222 2223 /* ATAPI-specific feature tests */ 2224 else if (dev->class == ATA_DEV_ATAPI) { 2225 const char *cdb_intr_string = ""; 2226 const char *atapi_an_string = ""; 2227 u32 sntf; 2228 2229 rc = atapi_cdb_len(id); 2230 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { 2231 if (ata_msg_warn(ap)) 2232 ata_dev_printk(dev, KERN_WARNING, 2233 "unsupported CDB len\n"); 2234 rc = -EINVAL; 2235 goto err_out_nosup; 2236 } 2237 dev->cdb_len = (unsigned int) rc; 2238 2239 /* Enable ATAPI AN if both the host and device have 2240 * the support. If PMP is attached, SNTF is required 2241 * to enable ATAPI AN to discern between PHY status 2242 * changed notifications and ATAPI ANs. 2243 */ 2244 if ((ap->flags & ATA_FLAG_AN) && ata_id_has_atapi_AN(id) && 2245 (!ap->nr_pmp_links || 2246 sata_scr_read(&ap->link, SCR_NOTIFICATION, &sntf) == 0)) { 2247 unsigned int err_mask; 2248 2249 /* issue SET feature command to turn this on */ 2250 err_mask = ata_dev_set_feature(dev, 2251 SETFEATURES_SATA_ENABLE, SATA_AN); 2252 if (err_mask) 2253 ata_dev_printk(dev, KERN_ERR, 2254 "failed to enable ATAPI AN " 2255 "(err_mask=0x%x)\n", err_mask); 2256 else { 2257 dev->flags |= ATA_DFLAG_AN; 2258 atapi_an_string = ", ATAPI AN"; 2259 } 2260 } 2261 2262 if (ata_id_cdb_intr(dev->id)) { 2263 dev->flags |= ATA_DFLAG_CDB_INTR; 2264 cdb_intr_string = ", CDB intr"; 2265 } 2266 2267 /* print device info to dmesg */ 2268 if (ata_msg_drv(ap) && print_info) 2269 ata_dev_printk(dev, KERN_INFO, 2270 "ATAPI: %s, %s, max %s%s%s\n", 2271 modelbuf, fwrevbuf, 2272 ata_mode_string(xfer_mask), 2273 cdb_intr_string, atapi_an_string); 2274 } 2275 2276 /* determine max_sectors */ 2277 dev->max_sectors = ATA_MAX_SECTORS; 2278 if (dev->flags & ATA_DFLAG_LBA48) 2279 dev->max_sectors = ATA_MAX_SECTORS_LBA48; 2280 2281 if (!(dev->horkage & ATA_HORKAGE_IPM)) { 2282 if (ata_id_has_hipm(dev->id)) 2283 dev->flags |= ATA_DFLAG_HIPM; 2284 if (ata_id_has_dipm(dev->id)) 2285 dev->flags |= ATA_DFLAG_DIPM; 2286 } 2287 2288 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) { 2289 /* Let the user know. We don't want to disallow opens for 2290 rescue purposes, or in case the vendor is just a blithering 2291 idiot */ 2292 if (print_info) { 2293 ata_dev_printk(dev, KERN_WARNING, 2294 "Drive reports diagnostics failure. This may indicate a drive\n"); 2295 ata_dev_printk(dev, KERN_WARNING, 2296 "fault or invalid emulation. Contact drive vendor for information.\n"); 2297 } 2298 } 2299 2300 /* limit bridge transfers to udma5, 200 sectors */ 2301 if (ata_dev_knobble(dev)) { 2302 if (ata_msg_drv(ap) && print_info) 2303 ata_dev_printk(dev, KERN_INFO, 2304 "applying bridge limits\n"); 2305 dev->udma_mask &= ATA_UDMA5; 2306 dev->max_sectors = ATA_MAX_SECTORS; 2307 } 2308 2309 if ((dev->class == ATA_DEV_ATAPI) && 2310 (atapi_command_packet_set(id) == TYPE_TAPE)) 2311 dev->max_sectors = ATA_MAX_SECTORS_TAPE; 2312 2313 if (dev->horkage & ATA_HORKAGE_MAX_SEC_128) 2314 dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128, 2315 dev->max_sectors); 2316 2317 if (ata_dev_blacklisted(dev) & ATA_HORKAGE_IPM) { 2318 dev->horkage |= ATA_HORKAGE_IPM; 2319 2320 /* reset link pm_policy for this port to no pm */ 2321 ap->pm_policy = MAX_PERFORMANCE; 2322 } 2323 2324 if (ap->ops->dev_config) 2325 ap->ops->dev_config(dev); 2326 2327 if (ata_msg_probe(ap)) 2328 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n", 2329 __FUNCTION__, ata_chk_status(ap)); 2330 return 0; 2331 2332 err_out_nosup: 2333 if (ata_msg_probe(ap)) 2334 ata_dev_printk(dev, KERN_DEBUG, 2335 "%s: EXIT, err\n", __FUNCTION__); 2336 return rc; 2337 } 2338 2339 /** 2340 * ata_cable_40wire - return 40 wire cable type 2341 * @ap: port 2342 * 2343 * Helper method for drivers which want to hardwire 40 wire cable 2344 * detection. 2345 */ 2346 2347 int ata_cable_40wire(struct ata_port *ap) 2348 { 2349 return ATA_CBL_PATA40; 2350 } 2351 2352 /** 2353 * ata_cable_80wire - return 80 wire cable type 2354 * @ap: port 2355 * 2356 * Helper method for drivers which want to hardwire 80 wire cable 2357 * detection. 2358 */ 2359 2360 int ata_cable_80wire(struct ata_port *ap) 2361 { 2362 return ATA_CBL_PATA80; 2363 } 2364 2365 /** 2366 * ata_cable_unknown - return unknown PATA cable. 2367 * @ap: port 2368 * 2369 * Helper method for drivers which have no PATA cable detection. 2370 */ 2371 2372 int ata_cable_unknown(struct ata_port *ap) 2373 { 2374 return ATA_CBL_PATA_UNK; 2375 } 2376 2377 /** 2378 * ata_cable_sata - return SATA cable type 2379 * @ap: port 2380 * 2381 * Helper method for drivers which have SATA cables 2382 */ 2383 2384 int ata_cable_sata(struct ata_port *ap) 2385 { 2386 return ATA_CBL_SATA; 2387 } 2388 2389 /** 2390 * ata_bus_probe - Reset and probe ATA bus 2391 * @ap: Bus to probe 2392 * 2393 * Master ATA bus probing function. Initiates a hardware-dependent 2394 * bus reset, then attempts to identify any devices found on 2395 * the bus. 2396 * 2397 * LOCKING: 2398 * PCI/etc. bus probe sem. 2399 * 2400 * RETURNS: 2401 * Zero on success, negative errno otherwise. 2402 */ 2403 2404 int ata_bus_probe(struct ata_port *ap) 2405 { 2406 unsigned int classes[ATA_MAX_DEVICES]; 2407 int tries[ATA_MAX_DEVICES]; 2408 int rc; 2409 struct ata_device *dev; 2410 2411 ata_port_probe(ap); 2412 2413 ata_link_for_each_dev(dev, &ap->link) 2414 tries[dev->devno] = ATA_PROBE_MAX_TRIES; 2415 2416 retry: 2417 ata_link_for_each_dev(dev, &ap->link) { 2418 /* If we issue an SRST then an ATA drive (not ATAPI) 2419 * may change configuration and be in PIO0 timing. If 2420 * we do a hard reset (or are coming from power on) 2421 * this is true for ATA or ATAPI. Until we've set a 2422 * suitable controller mode we should not touch the 2423 * bus as we may be talking too fast. 2424 */ 2425 dev->pio_mode = XFER_PIO_0; 2426 2427 /* If the controller has a pio mode setup function 2428 * then use it to set the chipset to rights. Don't 2429 * touch the DMA setup as that will be dealt with when 2430 * configuring devices. 2431 */ 2432 if (ap->ops->set_piomode) 2433 ap->ops->set_piomode(ap, dev); 2434 } 2435 2436 /* reset and determine device classes */ 2437 ap->ops->phy_reset(ap); 2438 2439 ata_link_for_each_dev(dev, &ap->link) { 2440 if (!(ap->flags & ATA_FLAG_DISABLED) && 2441 dev->class != ATA_DEV_UNKNOWN) 2442 classes[dev->devno] = dev->class; 2443 else 2444 classes[dev->devno] = ATA_DEV_NONE; 2445 2446 dev->class = ATA_DEV_UNKNOWN; 2447 } 2448 2449 ata_port_probe(ap); 2450 2451 /* read IDENTIFY page and configure devices. We have to do the identify 2452 specific sequence bass-ackwards so that PDIAG- is released by 2453 the slave device */ 2454 2455 ata_link_for_each_dev(dev, &ap->link) { 2456 if (tries[dev->devno]) 2457 dev->class = classes[dev->devno]; 2458 2459 if (!ata_dev_enabled(dev)) 2460 continue; 2461 2462 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET, 2463 dev->id); 2464 if (rc) 2465 goto fail; 2466 } 2467 2468 /* Now ask for the cable type as PDIAG- should have been released */ 2469 if (ap->ops->cable_detect) 2470 ap->cbl = ap->ops->cable_detect(ap); 2471 2472 /* We may have SATA bridge glue hiding here irrespective of the 2473 reported cable types and sensed types */ 2474 ata_link_for_each_dev(dev, &ap->link) { 2475 if (!ata_dev_enabled(dev)) 2476 continue; 2477 /* SATA drives indicate we have a bridge. We don't know which 2478 end of the link the bridge is which is a problem */ 2479 if (ata_id_is_sata(dev->id)) 2480 ap->cbl = ATA_CBL_SATA; 2481 } 2482 2483 /* After the identify sequence we can now set up the devices. We do 2484 this in the normal order so that the user doesn't get confused */ 2485 2486 ata_link_for_each_dev(dev, &ap->link) { 2487 if (!ata_dev_enabled(dev)) 2488 continue; 2489 2490 ap->link.eh_context.i.flags |= ATA_EHI_PRINTINFO; 2491 rc = ata_dev_configure(dev); 2492 ap->link.eh_context.i.flags &= ~ATA_EHI_PRINTINFO; 2493 if (rc) 2494 goto fail; 2495 } 2496 2497 /* configure transfer mode */ 2498 rc = ata_set_mode(&ap->link, &dev); 2499 if (rc) 2500 goto fail; 2501 2502 ata_link_for_each_dev(dev, &ap->link) 2503 if (ata_dev_enabled(dev)) 2504 return 0; 2505 2506 /* no device present, disable port */ 2507 ata_port_disable(ap); 2508 return -ENODEV; 2509 2510 fail: 2511 tries[dev->devno]--; 2512 2513 switch (rc) { 2514 case -EINVAL: 2515 /* eeek, something went very wrong, give up */ 2516 tries[dev->devno] = 0; 2517 break; 2518 2519 case -ENODEV: 2520 /* give it just one more chance */ 2521 tries[dev->devno] = min(tries[dev->devno], 1); 2522 case -EIO: 2523 if (tries[dev->devno] == 1) { 2524 /* This is the last chance, better to slow 2525 * down than lose it. 2526 */ 2527 sata_down_spd_limit(&ap->link); 2528 ata_down_xfermask_limit(dev, ATA_DNXFER_PIO); 2529 } 2530 } 2531 2532 if (!tries[dev->devno]) 2533 ata_dev_disable(dev); 2534 2535 goto retry; 2536 } 2537 2538 /** 2539 * ata_port_probe - Mark port as enabled 2540 * @ap: Port for which we indicate enablement 2541 * 2542 * Modify @ap data structure such that the system 2543 * thinks that the entire port is enabled. 2544 * 2545 * LOCKING: host lock, or some other form of 2546 * serialization. 2547 */ 2548 2549 void ata_port_probe(struct ata_port *ap) 2550 { 2551 ap->flags &= ~ATA_FLAG_DISABLED; 2552 } 2553 2554 /** 2555 * sata_print_link_status - Print SATA link status 2556 * @link: SATA link to printk link status about 2557 * 2558 * This function prints link speed and status of a SATA link. 2559 * 2560 * LOCKING: 2561 * None. 2562 */ 2563 void sata_print_link_status(struct ata_link *link) 2564 { 2565 u32 sstatus, scontrol, tmp; 2566 2567 if (sata_scr_read(link, SCR_STATUS, &sstatus)) 2568 return; 2569 sata_scr_read(link, SCR_CONTROL, &scontrol); 2570 2571 if (ata_link_online(link)) { 2572 tmp = (sstatus >> 4) & 0xf; 2573 ata_link_printk(link, KERN_INFO, 2574 "SATA link up %s (SStatus %X SControl %X)\n", 2575 sata_spd_string(tmp), sstatus, scontrol); 2576 } else { 2577 ata_link_printk(link, KERN_INFO, 2578 "SATA link down (SStatus %X SControl %X)\n", 2579 sstatus, scontrol); 2580 } 2581 } 2582 2583 /** 2584 * __sata_phy_reset - Wake/reset a low-level SATA PHY 2585 * @ap: SATA port associated with target SATA PHY. 2586 * 2587 * This function issues commands to standard SATA Sxxx 2588 * PHY registers, to wake up the phy (and device), and 2589 * clear any reset condition. 2590 * 2591 * LOCKING: 2592 * PCI/etc. bus probe sem. 2593 * 2594 */ 2595 void __sata_phy_reset(struct ata_port *ap) 2596 { 2597 struct ata_link *link = &ap->link; 2598 unsigned long timeout = jiffies + (HZ * 5); 2599 u32 sstatus; 2600 2601 if (ap->flags & ATA_FLAG_SATA_RESET) { 2602 /* issue phy wake/reset */ 2603 sata_scr_write_flush(link, SCR_CONTROL, 0x301); 2604 /* Couldn't find anything in SATA I/II specs, but 2605 * AHCI-1.1 10.4.2 says at least 1 ms. */ 2606 mdelay(1); 2607 } 2608 /* phy wake/clear reset */ 2609 sata_scr_write_flush(link, SCR_CONTROL, 0x300); 2610 2611 /* wait for phy to become ready, if necessary */ 2612 do { 2613 msleep(200); 2614 sata_scr_read(link, SCR_STATUS, &sstatus); 2615 if ((sstatus & 0xf) != 1) 2616 break; 2617 } while (time_before(jiffies, timeout)); 2618 2619 /* print link status */ 2620 sata_print_link_status(link); 2621 2622 /* TODO: phy layer with polling, timeouts, etc. */ 2623 if (!ata_link_offline(link)) 2624 ata_port_probe(ap); 2625 else 2626 ata_port_disable(ap); 2627 2628 if (ap->flags & ATA_FLAG_DISABLED) 2629 return; 2630 2631 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { 2632 ata_port_disable(ap); 2633 return; 2634 } 2635 2636 ap->cbl = ATA_CBL_SATA; 2637 } 2638 2639 /** 2640 * sata_phy_reset - Reset SATA bus. 2641 * @ap: SATA port associated with target SATA PHY. 2642 * 2643 * This function resets the SATA bus, and then probes 2644 * the bus for devices. 2645 * 2646 * LOCKING: 2647 * PCI/etc. bus probe sem. 2648 * 2649 */ 2650 void sata_phy_reset(struct ata_port *ap) 2651 { 2652 __sata_phy_reset(ap); 2653 if (ap->flags & ATA_FLAG_DISABLED) 2654 return; 2655 ata_bus_reset(ap); 2656 } 2657 2658 /** 2659 * ata_dev_pair - return other device on cable 2660 * @adev: device 2661 * 2662 * Obtain the other device on the same cable, or if none is 2663 * present NULL is returned 2664 */ 2665 2666 struct ata_device *ata_dev_pair(struct ata_device *adev) 2667 { 2668 struct ata_link *link = adev->link; 2669 struct ata_device *pair = &link->device[1 - adev->devno]; 2670 if (!ata_dev_enabled(pair)) 2671 return NULL; 2672 return pair; 2673 } 2674 2675 /** 2676 * ata_port_disable - Disable port. 2677 * @ap: Port to be disabled. 2678 * 2679 * Modify @ap data structure such that the system 2680 * thinks that the entire port is disabled, and should 2681 * never attempt to probe or communicate with devices 2682 * on this port. 2683 * 2684 * LOCKING: host lock, or some other form of 2685 * serialization. 2686 */ 2687 2688 void ata_port_disable(struct ata_port *ap) 2689 { 2690 ap->link.device[0].class = ATA_DEV_NONE; 2691 ap->link.device[1].class = ATA_DEV_NONE; 2692 ap->flags |= ATA_FLAG_DISABLED; 2693 } 2694 2695 /** 2696 * sata_down_spd_limit - adjust SATA spd limit downward 2697 * @link: Link to adjust SATA spd limit for 2698 * 2699 * Adjust SATA spd limit of @link downward. Note that this 2700 * function only adjusts the limit. The change must be applied 2701 * using sata_set_spd(). 2702 * 2703 * LOCKING: 2704 * Inherited from caller. 2705 * 2706 * RETURNS: 2707 * 0 on success, negative errno on failure 2708 */ 2709 int sata_down_spd_limit(struct ata_link *link) 2710 { 2711 u32 sstatus, spd, mask; 2712 int rc, highbit; 2713 2714 if (!sata_scr_valid(link)) 2715 return -EOPNOTSUPP; 2716 2717 /* If SCR can be read, use it to determine the current SPD. 2718 * If not, use cached value in link->sata_spd. 2719 */ 2720 rc = sata_scr_read(link, SCR_STATUS, &sstatus); 2721 if (rc == 0) 2722 spd = (sstatus >> 4) & 0xf; 2723 else 2724 spd = link->sata_spd; 2725 2726 mask = link->sata_spd_limit; 2727 if (mask <= 1) 2728 return -EINVAL; 2729 2730 /* unconditionally mask off the highest bit */ 2731 highbit = fls(mask) - 1; 2732 mask &= ~(1 << highbit); 2733 2734 /* Mask off all speeds higher than or equal to the current 2735 * one. Force 1.5Gbps if current SPD is not available. 2736 */ 2737 if (spd > 1) 2738 mask &= (1 << (spd - 1)) - 1; 2739 else 2740 mask &= 1; 2741 2742 /* were we already at the bottom? */ 2743 if (!mask) 2744 return -EINVAL; 2745 2746 link->sata_spd_limit = mask; 2747 2748 ata_link_printk(link, KERN_WARNING, "limiting SATA link speed to %s\n", 2749 sata_spd_string(fls(mask))); 2750 2751 return 0; 2752 } 2753 2754 static int __sata_set_spd_needed(struct ata_link *link, u32 *scontrol) 2755 { 2756 struct ata_link *host_link = &link->ap->link; 2757 u32 limit, target, spd; 2758 2759 limit = link->sata_spd_limit; 2760 2761 /* Don't configure downstream link faster than upstream link. 2762 * It doesn't speed up anything and some PMPs choke on such 2763 * configuration. 2764 */ 2765 if (!ata_is_host_link(link) && host_link->sata_spd) 2766 limit &= (1 << host_link->sata_spd) - 1; 2767 2768 if (limit == UINT_MAX) 2769 target = 0; 2770 else 2771 target = fls(limit); 2772 2773 spd = (*scontrol >> 4) & 0xf; 2774 *scontrol = (*scontrol & ~0xf0) | ((target & 0xf) << 4); 2775 2776 return spd != target; 2777 } 2778 2779 /** 2780 * sata_set_spd_needed - is SATA spd configuration needed 2781 * @link: Link in question 2782 * 2783 * Test whether the spd limit in SControl matches 2784 * @link->sata_spd_limit. This function is used to determine 2785 * whether hardreset is necessary to apply SATA spd 2786 * configuration. 2787 * 2788 * LOCKING: 2789 * Inherited from caller. 2790 * 2791 * RETURNS: 2792 * 1 if SATA spd configuration is needed, 0 otherwise. 2793 */ 2794 int sata_set_spd_needed(struct ata_link *link) 2795 { 2796 u32 scontrol; 2797 2798 if (sata_scr_read(link, SCR_CONTROL, &scontrol)) 2799 return 1; 2800 2801 return __sata_set_spd_needed(link, &scontrol); 2802 } 2803 2804 /** 2805 * sata_set_spd - set SATA spd according to spd limit 2806 * @link: Link to set SATA spd for 2807 * 2808 * Set SATA spd of @link according to sata_spd_limit. 2809 * 2810 * LOCKING: 2811 * Inherited from caller. 2812 * 2813 * RETURNS: 2814 * 0 if spd doesn't need to be changed, 1 if spd has been 2815 * changed. Negative errno if SCR registers are inaccessible. 2816 */ 2817 int sata_set_spd(struct ata_link *link) 2818 { 2819 u32 scontrol; 2820 int rc; 2821 2822 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) 2823 return rc; 2824 2825 if (!__sata_set_spd_needed(link, &scontrol)) 2826 return 0; 2827 2828 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol))) 2829 return rc; 2830 2831 return 1; 2832 } 2833 2834 /* 2835 * This mode timing computation functionality is ported over from 2836 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik 2837 */ 2838 /* 2839 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds). 2840 * These were taken from ATA/ATAPI-6 standard, rev 0a, except 2841 * for UDMA6, which is currently supported only by Maxtor drives. 2842 * 2843 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0. 2844 */ 2845 2846 static const struct ata_timing ata_timing[] = { 2847 2848 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 }, 2849 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 }, 2850 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 }, 2851 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 }, 2852 2853 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 }, 2854 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 }, 2855 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 }, 2856 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 }, 2857 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 }, 2858 2859 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */ 2860 2861 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 }, 2862 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 }, 2863 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 }, 2864 2865 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 }, 2866 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 }, 2867 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 }, 2868 2869 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 }, 2870 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 }, 2871 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 }, 2872 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 }, 2873 2874 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 }, 2875 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 }, 2876 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 }, 2877 2878 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */ 2879 2880 { 0xFF } 2881 }; 2882 2883 #define ENOUGH(v, unit) (((v)-1)/(unit)+1) 2884 #define EZ(v, unit) ((v)?ENOUGH(v, unit):0) 2885 2886 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT) 2887 { 2888 q->setup = EZ(t->setup * 1000, T); 2889 q->act8b = EZ(t->act8b * 1000, T); 2890 q->rec8b = EZ(t->rec8b * 1000, T); 2891 q->cyc8b = EZ(t->cyc8b * 1000, T); 2892 q->active = EZ(t->active * 1000, T); 2893 q->recover = EZ(t->recover * 1000, T); 2894 q->cycle = EZ(t->cycle * 1000, T); 2895 q->udma = EZ(t->udma * 1000, UT); 2896 } 2897 2898 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b, 2899 struct ata_timing *m, unsigned int what) 2900 { 2901 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup); 2902 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b); 2903 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b); 2904 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b); 2905 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active); 2906 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover); 2907 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle); 2908 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma); 2909 } 2910 2911 static const struct ata_timing *ata_timing_find_mode(unsigned short speed) 2912 { 2913 const struct ata_timing *t; 2914 2915 for (t = ata_timing; t->mode != speed; t++) 2916 if (t->mode == 0xFF) 2917 return NULL; 2918 return t; 2919 } 2920 2921 int ata_timing_compute(struct ata_device *adev, unsigned short speed, 2922 struct ata_timing *t, int T, int UT) 2923 { 2924 const struct ata_timing *s; 2925 struct ata_timing p; 2926 2927 /* 2928 * Find the mode. 2929 */ 2930 2931 if (!(s = ata_timing_find_mode(speed))) 2932 return -EINVAL; 2933 2934 memcpy(t, s, sizeof(*s)); 2935 2936 /* 2937 * If the drive is an EIDE drive, it can tell us it needs extended 2938 * PIO/MW_DMA cycle timing. 2939 */ 2940 2941 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ 2942 memset(&p, 0, sizeof(p)); 2943 if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) { 2944 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO]; 2945 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY]; 2946 } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) { 2947 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN]; 2948 } 2949 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B); 2950 } 2951 2952 /* 2953 * Convert the timing to bus clock counts. 2954 */ 2955 2956 ata_timing_quantize(t, t, T, UT); 2957 2958 /* 2959 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, 2960 * S.M.A.R.T * and some other commands. We have to ensure that the 2961 * DMA cycle timing is slower/equal than the fastest PIO timing. 2962 */ 2963 2964 if (speed > XFER_PIO_6) { 2965 ata_timing_compute(adev, adev->pio_mode, &p, T, UT); 2966 ata_timing_merge(&p, t, t, ATA_TIMING_ALL); 2967 } 2968 2969 /* 2970 * Lengthen active & recovery time so that cycle time is correct. 2971 */ 2972 2973 if (t->act8b + t->rec8b < t->cyc8b) { 2974 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; 2975 t->rec8b = t->cyc8b - t->act8b; 2976 } 2977 2978 if (t->active + t->recover < t->cycle) { 2979 t->active += (t->cycle - (t->active + t->recover)) / 2; 2980 t->recover = t->cycle - t->active; 2981 } 2982 2983 /* In a few cases quantisation may produce enough errors to 2984 leave t->cycle too low for the sum of active and recovery 2985 if so we must correct this */ 2986 if (t->active + t->recover > t->cycle) 2987 t->cycle = t->active + t->recover; 2988 2989 return 0; 2990 } 2991 2992 /** 2993 * ata_down_xfermask_limit - adjust dev xfer masks downward 2994 * @dev: Device to adjust xfer masks 2995 * @sel: ATA_DNXFER_* selector 2996 * 2997 * Adjust xfer masks of @dev downward. Note that this function 2998 * does not apply the change. Invoking ata_set_mode() afterwards 2999 * will apply the limit. 3000 * 3001 * LOCKING: 3002 * Inherited from caller. 3003 * 3004 * RETURNS: 3005 * 0 on success, negative errno on failure 3006 */ 3007 int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel) 3008 { 3009 char buf[32]; 3010 unsigned int orig_mask, xfer_mask; 3011 unsigned int pio_mask, mwdma_mask, udma_mask; 3012 int quiet, highbit; 3013 3014 quiet = !!(sel & ATA_DNXFER_QUIET); 3015 sel &= ~ATA_DNXFER_QUIET; 3016 3017 xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask, 3018 dev->mwdma_mask, 3019 dev->udma_mask); 3020 ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask); 3021 3022 switch (sel) { 3023 case ATA_DNXFER_PIO: 3024 highbit = fls(pio_mask) - 1; 3025 pio_mask &= ~(1 << highbit); 3026 break; 3027 3028 case ATA_DNXFER_DMA: 3029 if (udma_mask) { 3030 highbit = fls(udma_mask) - 1; 3031 udma_mask &= ~(1 << highbit); 3032 if (!udma_mask) 3033 return -ENOENT; 3034 } else if (mwdma_mask) { 3035 highbit = fls(mwdma_mask) - 1; 3036 mwdma_mask &= ~(1 << highbit); 3037 if (!mwdma_mask) 3038 return -ENOENT; 3039 } 3040 break; 3041 3042 case ATA_DNXFER_40C: 3043 udma_mask &= ATA_UDMA_MASK_40C; 3044 break; 3045 3046 case ATA_DNXFER_FORCE_PIO0: 3047 pio_mask &= 1; 3048 case ATA_DNXFER_FORCE_PIO: 3049 mwdma_mask = 0; 3050 udma_mask = 0; 3051 break; 3052 3053 default: 3054 BUG(); 3055 } 3056 3057 xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); 3058 3059 if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask) 3060 return -ENOENT; 3061 3062 if (!quiet) { 3063 if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA)) 3064 snprintf(buf, sizeof(buf), "%s:%s", 3065 ata_mode_string(xfer_mask), 3066 ata_mode_string(xfer_mask & ATA_MASK_PIO)); 3067 else 3068 snprintf(buf, sizeof(buf), "%s", 3069 ata_mode_string(xfer_mask)); 3070 3071 ata_dev_printk(dev, KERN_WARNING, 3072 "limiting speed to %s\n", buf); 3073 } 3074 3075 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask, 3076 &dev->udma_mask); 3077 3078 return 0; 3079 } 3080 3081 static int ata_dev_set_mode(struct ata_device *dev) 3082 { 3083 struct ata_eh_context *ehc = &dev->link->eh_context; 3084 unsigned int err_mask; 3085 int rc; 3086 3087 dev->flags &= ~ATA_DFLAG_PIO; 3088 if (dev->xfer_shift == ATA_SHIFT_PIO) 3089 dev->flags |= ATA_DFLAG_PIO; 3090 3091 err_mask = ata_dev_set_xfermode(dev); 3092 3093 /* Old CFA may refuse this command, which is just fine */ 3094 if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id)) 3095 err_mask &= ~AC_ERR_DEV; 3096 3097 /* Some very old devices and some bad newer ones fail any kind of 3098 SET_XFERMODE request but support PIO0-2 timings and no IORDY */ 3099 if (dev->xfer_shift == ATA_SHIFT_PIO && !ata_id_has_iordy(dev->id) && 3100 dev->pio_mode <= XFER_PIO_2) 3101 err_mask &= ~AC_ERR_DEV; 3102 3103 /* Early MWDMA devices do DMA but don't allow DMA mode setting. 3104 Don't fail an MWDMA0 set IFF the device indicates it is in MWDMA0 */ 3105 if (dev->xfer_shift == ATA_SHIFT_MWDMA && 3106 dev->dma_mode == XFER_MW_DMA_0 && 3107 (dev->id[63] >> 8) & 1) 3108 err_mask &= ~AC_ERR_DEV; 3109 3110 if (err_mask) { 3111 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode " 3112 "(err_mask=0x%x)\n", err_mask); 3113 return -EIO; 3114 } 3115 3116 ehc->i.flags |= ATA_EHI_POST_SETMODE; 3117 rc = ata_dev_revalidate(dev, ATA_DEV_UNKNOWN, 0); 3118 ehc->i.flags &= ~ATA_EHI_POST_SETMODE; 3119 if (rc) 3120 return rc; 3121 3122 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n", 3123 dev->xfer_shift, (int)dev->xfer_mode); 3124 3125 ata_dev_printk(dev, KERN_INFO, "configured for %s\n", 3126 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode))); 3127 return 0; 3128 } 3129 3130 /** 3131 * ata_do_set_mode - Program timings and issue SET FEATURES - XFER 3132 * @link: link on which timings will be programmed 3133 * @r_failed_dev: out paramter for failed device 3134 * 3135 * Standard implementation of the function used to tune and set 3136 * ATA device disk transfer mode (PIO3, UDMA6, etc.). If 3137 * ata_dev_set_mode() fails, pointer to the failing device is 3138 * returned in @r_failed_dev. 3139 * 3140 * LOCKING: 3141 * PCI/etc. bus probe sem. 3142 * 3143 * RETURNS: 3144 * 0 on success, negative errno otherwise 3145 */ 3146 3147 int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev) 3148 { 3149 struct ata_port *ap = link->ap; 3150 struct ata_device *dev; 3151 int rc = 0, used_dma = 0, found = 0; 3152 3153 /* step 1: calculate xfer_mask */ 3154 ata_link_for_each_dev(dev, link) { 3155 unsigned int pio_mask, dma_mask; 3156 unsigned int mode_mask; 3157 3158 if (!ata_dev_enabled(dev)) 3159 continue; 3160 3161 mode_mask = ATA_DMA_MASK_ATA; 3162 if (dev->class == ATA_DEV_ATAPI) 3163 mode_mask = ATA_DMA_MASK_ATAPI; 3164 else if (ata_id_is_cfa(dev->id)) 3165 mode_mask = ATA_DMA_MASK_CFA; 3166 3167 ata_dev_xfermask(dev); 3168 3169 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0); 3170 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask); 3171 3172 if (libata_dma_mask & mode_mask) 3173 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask); 3174 else 3175 dma_mask = 0; 3176 3177 dev->pio_mode = ata_xfer_mask2mode(pio_mask); 3178 dev->dma_mode = ata_xfer_mask2mode(dma_mask); 3179 3180 found = 1; 3181 if (dev->dma_mode) 3182 used_dma = 1; 3183 } 3184 if (!found) 3185 goto out; 3186 3187 /* step 2: always set host PIO timings */ 3188 ata_link_for_each_dev(dev, link) { 3189 if (!ata_dev_enabled(dev)) 3190 continue; 3191 3192 if (!dev->pio_mode) { 3193 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n"); 3194 rc = -EINVAL; 3195 goto out; 3196 } 3197 3198 dev->xfer_mode = dev->pio_mode; 3199 dev->xfer_shift = ATA_SHIFT_PIO; 3200 if (ap->ops->set_piomode) 3201 ap->ops->set_piomode(ap, dev); 3202 } 3203 3204 /* step 3: set host DMA timings */ 3205 ata_link_for_each_dev(dev, link) { 3206 if (!ata_dev_enabled(dev) || !dev->dma_mode) 3207 continue; 3208 3209 dev->xfer_mode = dev->dma_mode; 3210 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode); 3211 if (ap->ops->set_dmamode) 3212 ap->ops->set_dmamode(ap, dev); 3213 } 3214 3215 /* step 4: update devices' xfer mode */ 3216 ata_link_for_each_dev(dev, link) { 3217 /* don't update suspended devices' xfer mode */ 3218 if (!ata_dev_enabled(dev)) 3219 continue; 3220 3221 rc = ata_dev_set_mode(dev); 3222 if (rc) 3223 goto out; 3224 } 3225 3226 /* Record simplex status. If we selected DMA then the other 3227 * host channels are not permitted to do so. 3228 */ 3229 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX)) 3230 ap->host->simplex_claimed = ap; 3231 3232 out: 3233 if (rc) 3234 *r_failed_dev = dev; 3235 return rc; 3236 } 3237 3238 /** 3239 * ata_set_mode - Program timings and issue SET FEATURES - XFER 3240 * @link: link on which timings will be programmed 3241 * @r_failed_dev: out paramter for failed device 3242 * 3243 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If 3244 * ata_set_mode() fails, pointer to the failing device is 3245 * returned in @r_failed_dev. 3246 * 3247 * LOCKING: 3248 * PCI/etc. bus probe sem. 3249 * 3250 * RETURNS: 3251 * 0 on success, negative errno otherwise 3252 */ 3253 int ata_set_mode(struct ata_link *link, struct ata_device **r_failed_dev) 3254 { 3255 struct ata_port *ap = link->ap; 3256 3257 /* has private set_mode? */ 3258 if (ap->ops->set_mode) 3259 return ap->ops->set_mode(link, r_failed_dev); 3260 return ata_do_set_mode(link, r_failed_dev); 3261 } 3262 3263 /** 3264 * ata_tf_to_host - issue ATA taskfile to host controller 3265 * @ap: port to which command is being issued 3266 * @tf: ATA taskfile register set 3267 * 3268 * Issues ATA taskfile register set to ATA host controller, 3269 * with proper synchronization with interrupt handler and 3270 * other threads. 3271 * 3272 * LOCKING: 3273 * spin_lock_irqsave(host lock) 3274 */ 3275 3276 static inline void ata_tf_to_host(struct ata_port *ap, 3277 const struct ata_taskfile *tf) 3278 { 3279 ap->ops->tf_load(ap, tf); 3280 ap->ops->exec_command(ap, tf); 3281 } 3282 3283 /** 3284 * ata_busy_sleep - sleep until BSY clears, or timeout 3285 * @ap: port containing status register to be polled 3286 * @tmout_pat: impatience timeout 3287 * @tmout: overall timeout 3288 * 3289 * Sleep until ATA Status register bit BSY clears, 3290 * or a timeout occurs. 3291 * 3292 * LOCKING: 3293 * Kernel thread context (may sleep). 3294 * 3295 * RETURNS: 3296 * 0 on success, -errno otherwise. 3297 */ 3298 int ata_busy_sleep(struct ata_port *ap, 3299 unsigned long tmout_pat, unsigned long tmout) 3300 { 3301 unsigned long timer_start, timeout; 3302 u8 status; 3303 3304 status = ata_busy_wait(ap, ATA_BUSY, 300); 3305 timer_start = jiffies; 3306 timeout = timer_start + tmout_pat; 3307 while (status != 0xff && (status & ATA_BUSY) && 3308 time_before(jiffies, timeout)) { 3309 msleep(50); 3310 status = ata_busy_wait(ap, ATA_BUSY, 3); 3311 } 3312 3313 if (status != 0xff && (status & ATA_BUSY)) 3314 ata_port_printk(ap, KERN_WARNING, 3315 "port is slow to respond, please be patient " 3316 "(Status 0x%x)\n", status); 3317 3318 timeout = timer_start + tmout; 3319 while (status != 0xff && (status & ATA_BUSY) && 3320 time_before(jiffies, timeout)) { 3321 msleep(50); 3322 status = ata_chk_status(ap); 3323 } 3324 3325 if (status == 0xff) 3326 return -ENODEV; 3327 3328 if (status & ATA_BUSY) { 3329 ata_port_printk(ap, KERN_ERR, "port failed to respond " 3330 "(%lu secs, Status 0x%x)\n", 3331 tmout / HZ, status); 3332 return -EBUSY; 3333 } 3334 3335 return 0; 3336 } 3337 3338 /** 3339 * ata_wait_after_reset - wait before checking status after reset 3340 * @ap: port containing status register to be polled 3341 * @deadline: deadline jiffies for the operation 3342 * 3343 * After reset, we need to pause a while before reading status. 3344 * Also, certain combination of controller and device report 0xff 3345 * for some duration (e.g. until SATA PHY is up and running) 3346 * which is interpreted as empty port in ATA world. This 3347 * function also waits for such devices to get out of 0xff 3348 * status. 3349 * 3350 * LOCKING: 3351 * Kernel thread context (may sleep). 3352 */ 3353 void ata_wait_after_reset(struct ata_port *ap, unsigned long deadline) 3354 { 3355 unsigned long until = jiffies + ATA_TMOUT_FF_WAIT; 3356 3357 if (time_before(until, deadline)) 3358 deadline = until; 3359 3360 /* Spec mandates ">= 2ms" before checking status. We wait 3361 * 150ms, because that was the magic delay used for ATAPI 3362 * devices in Hale Landis's ATADRVR, for the period of time 3363 * between when the ATA command register is written, and then 3364 * status is checked. Because waiting for "a while" before 3365 * checking status is fine, post SRST, we perform this magic 3366 * delay here as well. 3367 * 3368 * Old drivers/ide uses the 2mS rule and then waits for ready. 3369 */ 3370 msleep(150); 3371 3372 /* Wait for 0xff to clear. Some SATA devices take a long time 3373 * to clear 0xff after reset. For example, HHD424020F7SV00 3374 * iVDR needs >= 800ms while. Quantum GoVault needs even more 3375 * than that. 3376 */ 3377 while (1) { 3378 u8 status = ata_chk_status(ap); 3379 3380 if (status != 0xff || time_after(jiffies, deadline)) 3381 return; 3382 3383 msleep(50); 3384 } 3385 } 3386 3387 /** 3388 * ata_wait_ready - sleep until BSY clears, or timeout 3389 * @ap: port containing status register to be polled 3390 * @deadline: deadline jiffies for the operation 3391 * 3392 * Sleep until ATA Status register bit BSY clears, or timeout 3393 * occurs. 3394 * 3395 * LOCKING: 3396 * Kernel thread context (may sleep). 3397 * 3398 * RETURNS: 3399 * 0 on success, -errno otherwise. 3400 */ 3401 int ata_wait_ready(struct ata_port *ap, unsigned long deadline) 3402 { 3403 unsigned long start = jiffies; 3404 int warned = 0; 3405 3406 while (1) { 3407 u8 status = ata_chk_status(ap); 3408 unsigned long now = jiffies; 3409 3410 if (!(status & ATA_BUSY)) 3411 return 0; 3412 if (!ata_link_online(&ap->link) && status == 0xff) 3413 return -ENODEV; 3414 if (time_after(now, deadline)) 3415 return -EBUSY; 3416 3417 if (!warned && time_after(now, start + 5 * HZ) && 3418 (deadline - now > 3 * HZ)) { 3419 ata_port_printk(ap, KERN_WARNING, 3420 "port is slow to respond, please be patient " 3421 "(Status 0x%x)\n", status); 3422 warned = 1; 3423 } 3424 3425 msleep(50); 3426 } 3427 } 3428 3429 static int ata_bus_post_reset(struct ata_port *ap, unsigned int devmask, 3430 unsigned long deadline) 3431 { 3432 struct ata_ioports *ioaddr = &ap->ioaddr; 3433 unsigned int dev0 = devmask & (1 << 0); 3434 unsigned int dev1 = devmask & (1 << 1); 3435 int rc, ret = 0; 3436 3437 /* if device 0 was found in ata_devchk, wait for its 3438 * BSY bit to clear 3439 */ 3440 if (dev0) { 3441 rc = ata_wait_ready(ap, deadline); 3442 if (rc) { 3443 if (rc != -ENODEV) 3444 return rc; 3445 ret = rc; 3446 } 3447 } 3448 3449 /* if device 1 was found in ata_devchk, wait for register 3450 * access briefly, then wait for BSY to clear. 3451 */ 3452 if (dev1) { 3453 int i; 3454 3455 ap->ops->dev_select(ap, 1); 3456 3457 /* Wait for register access. Some ATAPI devices fail 3458 * to set nsect/lbal after reset, so don't waste too 3459 * much time on it. We're gonna wait for !BSY anyway. 3460 */ 3461 for (i = 0; i < 2; i++) { 3462 u8 nsect, lbal; 3463 3464 nsect = ioread8(ioaddr->nsect_addr); 3465 lbal = ioread8(ioaddr->lbal_addr); 3466 if ((nsect == 1) && (lbal == 1)) 3467 break; 3468 msleep(50); /* give drive a breather */ 3469 } 3470 3471 rc = ata_wait_ready(ap, deadline); 3472 if (rc) { 3473 if (rc != -ENODEV) 3474 return rc; 3475 ret = rc; 3476 } 3477 } 3478 3479 /* is all this really necessary? */ 3480 ap->ops->dev_select(ap, 0); 3481 if (dev1) 3482 ap->ops->dev_select(ap, 1); 3483 if (dev0) 3484 ap->ops->dev_select(ap, 0); 3485 3486 return ret; 3487 } 3488 3489 static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask, 3490 unsigned long deadline) 3491 { 3492 struct ata_ioports *ioaddr = &ap->ioaddr; 3493 3494 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id); 3495 3496 /* software reset. causes dev0 to be selected */ 3497 iowrite8(ap->ctl, ioaddr->ctl_addr); 3498 udelay(20); /* FIXME: flush */ 3499 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr); 3500 udelay(20); /* FIXME: flush */ 3501 iowrite8(ap->ctl, ioaddr->ctl_addr); 3502 3503 /* wait a while before checking status */ 3504 ata_wait_after_reset(ap, deadline); 3505 3506 /* Before we perform post reset processing we want to see if 3507 * the bus shows 0xFF because the odd clown forgets the D7 3508 * pulldown resistor. 3509 */ 3510 if (ata_chk_status(ap) == 0xFF) 3511 return -ENODEV; 3512 3513 return ata_bus_post_reset(ap, devmask, deadline); 3514 } 3515 3516 /** 3517 * ata_bus_reset - reset host port and associated ATA channel 3518 * @ap: port to reset 3519 * 3520 * This is typically the first time we actually start issuing 3521 * commands to the ATA channel. We wait for BSY to clear, then 3522 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its 3523 * result. Determine what devices, if any, are on the channel 3524 * by looking at the device 0/1 error register. Look at the signature 3525 * stored in each device's taskfile registers, to determine if 3526 * the device is ATA or ATAPI. 3527 * 3528 * LOCKING: 3529 * PCI/etc. bus probe sem. 3530 * Obtains host lock. 3531 * 3532 * SIDE EFFECTS: 3533 * Sets ATA_FLAG_DISABLED if bus reset fails. 3534 */ 3535 3536 void ata_bus_reset(struct ata_port *ap) 3537 { 3538 struct ata_device *device = ap->link.device; 3539 struct ata_ioports *ioaddr = &ap->ioaddr; 3540 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; 3541 u8 err; 3542 unsigned int dev0, dev1 = 0, devmask = 0; 3543 int rc; 3544 3545 DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no); 3546 3547 /* determine if device 0/1 are present */ 3548 if (ap->flags & ATA_FLAG_SATA_RESET) 3549 dev0 = 1; 3550 else { 3551 dev0 = ata_devchk(ap, 0); 3552 if (slave_possible) 3553 dev1 = ata_devchk(ap, 1); 3554 } 3555 3556 if (dev0) 3557 devmask |= (1 << 0); 3558 if (dev1) 3559 devmask |= (1 << 1); 3560 3561 /* select device 0 again */ 3562 ap->ops->dev_select(ap, 0); 3563 3564 /* issue bus reset */ 3565 if (ap->flags & ATA_FLAG_SRST) { 3566 rc = ata_bus_softreset(ap, devmask, jiffies + 40 * HZ); 3567 if (rc && rc != -ENODEV) 3568 goto err_out; 3569 } 3570 3571 /* 3572 * determine by signature whether we have ATA or ATAPI devices 3573 */ 3574 device[0].class = ata_dev_try_classify(&device[0], dev0, &err); 3575 if ((slave_possible) && (err != 0x81)) 3576 device[1].class = ata_dev_try_classify(&device[1], dev1, &err); 3577 3578 /* is double-select really necessary? */ 3579 if (device[1].class != ATA_DEV_NONE) 3580 ap->ops->dev_select(ap, 1); 3581 if (device[0].class != ATA_DEV_NONE) 3582 ap->ops->dev_select(ap, 0); 3583 3584 /* if no devices were detected, disable this port */ 3585 if ((device[0].class == ATA_DEV_NONE) && 3586 (device[1].class == ATA_DEV_NONE)) 3587 goto err_out; 3588 3589 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { 3590 /* set up device control for ATA_FLAG_SATA_RESET */ 3591 iowrite8(ap->ctl, ioaddr->ctl_addr); 3592 } 3593 3594 DPRINTK("EXIT\n"); 3595 return; 3596 3597 err_out: 3598 ata_port_printk(ap, KERN_ERR, "disabling port\n"); 3599 ata_port_disable(ap); 3600 3601 DPRINTK("EXIT\n"); 3602 } 3603 3604 /** 3605 * sata_link_debounce - debounce SATA phy status 3606 * @link: ATA link to debounce SATA phy status for 3607 * @params: timing parameters { interval, duratinon, timeout } in msec 3608 * @deadline: deadline jiffies for the operation 3609 * 3610 * Make sure SStatus of @link reaches stable state, determined by 3611 * holding the same value where DET is not 1 for @duration polled 3612 * every @interval, before @timeout. Timeout constraints the 3613 * beginning of the stable state. Because DET gets stuck at 1 on 3614 * some controllers after hot unplugging, this functions waits 3615 * until timeout then returns 0 if DET is stable at 1. 3616 * 3617 * @timeout is further limited by @deadline. The sooner of the 3618 * two is used. 3619 * 3620 * LOCKING: 3621 * Kernel thread context (may sleep) 3622 * 3623 * RETURNS: 3624 * 0 on success, -errno on failure. 3625 */ 3626 int sata_link_debounce(struct ata_link *link, const unsigned long *params, 3627 unsigned long deadline) 3628 { 3629 unsigned long interval_msec = params[0]; 3630 unsigned long duration = msecs_to_jiffies(params[1]); 3631 unsigned long last_jiffies, t; 3632 u32 last, cur; 3633 int rc; 3634 3635 t = jiffies + msecs_to_jiffies(params[2]); 3636 if (time_before(t, deadline)) 3637 deadline = t; 3638 3639 if ((rc = sata_scr_read(link, SCR_STATUS, &cur))) 3640 return rc; 3641 cur &= 0xf; 3642 3643 last = cur; 3644 last_jiffies = jiffies; 3645 3646 while (1) { 3647 msleep(interval_msec); 3648 if ((rc = sata_scr_read(link, SCR_STATUS, &cur))) 3649 return rc; 3650 cur &= 0xf; 3651 3652 /* DET stable? */ 3653 if (cur == last) { 3654 if (cur == 1 && time_before(jiffies, deadline)) 3655 continue; 3656 if (time_after(jiffies, last_jiffies + duration)) 3657 return 0; 3658 continue; 3659 } 3660 3661 /* unstable, start over */ 3662 last = cur; 3663 last_jiffies = jiffies; 3664 3665 /* Check deadline. If debouncing failed, return 3666 * -EPIPE to tell upper layer to lower link speed. 3667 */ 3668 if (time_after(jiffies, deadline)) 3669 return -EPIPE; 3670 } 3671 } 3672 3673 /** 3674 * sata_link_resume - resume SATA link 3675 * @link: ATA link to resume SATA 3676 * @params: timing parameters { interval, duratinon, timeout } in msec 3677 * @deadline: deadline jiffies for the operation 3678 * 3679 * Resume SATA phy @link and debounce it. 3680 * 3681 * LOCKING: 3682 * Kernel thread context (may sleep) 3683 * 3684 * RETURNS: 3685 * 0 on success, -errno on failure. 3686 */ 3687 int sata_link_resume(struct ata_link *link, const unsigned long *params, 3688 unsigned long deadline) 3689 { 3690 u32 scontrol; 3691 int rc; 3692 3693 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) 3694 return rc; 3695 3696 scontrol = (scontrol & 0x0f0) | 0x300; 3697 3698 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol))) 3699 return rc; 3700 3701 /* Some PHYs react badly if SStatus is pounded immediately 3702 * after resuming. Delay 200ms before debouncing. 3703 */ 3704 msleep(200); 3705 3706 return sata_link_debounce(link, params, deadline); 3707 } 3708 3709 /** 3710 * ata_std_prereset - prepare for reset 3711 * @link: ATA link to be reset 3712 * @deadline: deadline jiffies for the operation 3713 * 3714 * @link is about to be reset. Initialize it. Failure from 3715 * prereset makes libata abort whole reset sequence and give up 3716 * that port, so prereset should be best-effort. It does its 3717 * best to prepare for reset sequence but if things go wrong, it 3718 * should just whine, not fail. 3719 * 3720 * LOCKING: 3721 * Kernel thread context (may sleep) 3722 * 3723 * RETURNS: 3724 * 0 on success, -errno otherwise. 3725 */ 3726 int ata_std_prereset(struct ata_link *link, unsigned long deadline) 3727 { 3728 struct ata_port *ap = link->ap; 3729 struct ata_eh_context *ehc = &link->eh_context; 3730 const unsigned long *timing = sata_ehc_deb_timing(ehc); 3731 int rc; 3732 3733 /* handle link resume */ 3734 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) && 3735 (link->flags & ATA_LFLAG_HRST_TO_RESUME)) 3736 ehc->i.action |= ATA_EH_HARDRESET; 3737 3738 /* Some PMPs don't work with only SRST, force hardreset if PMP 3739 * is supported. 3740 */ 3741 if (ap->flags & ATA_FLAG_PMP) 3742 ehc->i.action |= ATA_EH_HARDRESET; 3743 3744 /* if we're about to do hardreset, nothing more to do */ 3745 if (ehc->i.action & ATA_EH_HARDRESET) 3746 return 0; 3747 3748 /* if SATA, resume link */ 3749 if (ap->flags & ATA_FLAG_SATA) { 3750 rc = sata_link_resume(link, timing, deadline); 3751 /* whine about phy resume failure but proceed */ 3752 if (rc && rc != -EOPNOTSUPP) 3753 ata_link_printk(link, KERN_WARNING, "failed to resume " 3754 "link for reset (errno=%d)\n", rc); 3755 } 3756 3757 /* Wait for !BSY if the controller can wait for the first D2H 3758 * Reg FIS and we don't know that no device is attached. 3759 */ 3760 if (!(link->flags & ATA_LFLAG_SKIP_D2H_BSY) && !ata_link_offline(link)) { 3761 rc = ata_wait_ready(ap, deadline); 3762 if (rc && rc != -ENODEV) { 3763 ata_link_printk(link, KERN_WARNING, "device not ready " 3764 "(errno=%d), forcing hardreset\n", rc); 3765 ehc->i.action |= ATA_EH_HARDRESET; 3766 } 3767 } 3768 3769 return 0; 3770 } 3771 3772 /** 3773 * ata_std_softreset - reset host port via ATA SRST 3774 * @link: ATA link to reset 3775 * @classes: resulting classes of attached devices 3776 * @deadline: deadline jiffies for the operation 3777 * 3778 * Reset host port using ATA SRST. 3779 * 3780 * LOCKING: 3781 * Kernel thread context (may sleep) 3782 * 3783 * RETURNS: 3784 * 0 on success, -errno otherwise. 3785 */ 3786 int ata_std_softreset(struct ata_link *link, unsigned int *classes, 3787 unsigned long deadline) 3788 { 3789 struct ata_port *ap = link->ap; 3790 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; 3791 unsigned int devmask = 0; 3792 int rc; 3793 u8 err; 3794 3795 DPRINTK("ENTER\n"); 3796 3797 if (ata_link_offline(link)) { 3798 classes[0] = ATA_DEV_NONE; 3799 goto out; 3800 } 3801 3802 /* determine if device 0/1 are present */ 3803 if (ata_devchk(ap, 0)) 3804 devmask |= (1 << 0); 3805 if (slave_possible && ata_devchk(ap, 1)) 3806 devmask |= (1 << 1); 3807 3808 /* select device 0 again */ 3809 ap->ops->dev_select(ap, 0); 3810 3811 /* issue bus reset */ 3812 DPRINTK("about to softreset, devmask=%x\n", devmask); 3813 rc = ata_bus_softreset(ap, devmask, deadline); 3814 /* if link is occupied, -ENODEV too is an error */ 3815 if (rc && (rc != -ENODEV || sata_scr_valid(link))) { 3816 ata_link_printk(link, KERN_ERR, "SRST failed (errno=%d)\n", rc); 3817 return rc; 3818 } 3819 3820 /* determine by signature whether we have ATA or ATAPI devices */ 3821 classes[0] = ata_dev_try_classify(&link->device[0], 3822 devmask & (1 << 0), &err); 3823 if (slave_possible && err != 0x81) 3824 classes[1] = ata_dev_try_classify(&link->device[1], 3825 devmask & (1 << 1), &err); 3826 3827 out: 3828 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]); 3829 return 0; 3830 } 3831 3832 /** 3833 * sata_link_hardreset - reset link via SATA phy reset 3834 * @link: link to reset 3835 * @timing: timing parameters { interval, duratinon, timeout } in msec 3836 * @deadline: deadline jiffies for the operation 3837 * 3838 * SATA phy-reset @link using DET bits of SControl register. 3839 * 3840 * LOCKING: 3841 * Kernel thread context (may sleep) 3842 * 3843 * RETURNS: 3844 * 0 on success, -errno otherwise. 3845 */ 3846 int sata_link_hardreset(struct ata_link *link, const unsigned long *timing, 3847 unsigned long deadline) 3848 { 3849 u32 scontrol; 3850 int rc; 3851 3852 DPRINTK("ENTER\n"); 3853 3854 if (sata_set_spd_needed(link)) { 3855 /* SATA spec says nothing about how to reconfigure 3856 * spd. To be on the safe side, turn off phy during 3857 * reconfiguration. This works for at least ICH7 AHCI 3858 * and Sil3124. 3859 */ 3860 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) 3861 goto out; 3862 3863 scontrol = (scontrol & 0x0f0) | 0x304; 3864 3865 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol))) 3866 goto out; 3867 3868 sata_set_spd(link); 3869 } 3870 3871 /* issue phy wake/reset */ 3872 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) 3873 goto out; 3874 3875 scontrol = (scontrol & 0x0f0) | 0x301; 3876 3877 if ((rc = sata_scr_write_flush(link, SCR_CONTROL, scontrol))) 3878 goto out; 3879 3880 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1 3881 * 10.4.2 says at least 1 ms. 3882 */ 3883 msleep(1); 3884 3885 /* bring link back */ 3886 rc = sata_link_resume(link, timing, deadline); 3887 out: 3888 DPRINTK("EXIT, rc=%d\n", rc); 3889 return rc; 3890 } 3891 3892 /** 3893 * sata_std_hardreset - reset host port via SATA phy reset 3894 * @link: link to reset 3895 * @class: resulting class of attached device 3896 * @deadline: deadline jiffies for the operation 3897 * 3898 * SATA phy-reset host port using DET bits of SControl register, 3899 * wait for !BSY and classify the attached device. 3900 * 3901 * LOCKING: 3902 * Kernel thread context (may sleep) 3903 * 3904 * RETURNS: 3905 * 0 on success, -errno otherwise. 3906 */ 3907 int sata_std_hardreset(struct ata_link *link, unsigned int *class, 3908 unsigned long deadline) 3909 { 3910 struct ata_port *ap = link->ap; 3911 const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context); 3912 int rc; 3913 3914 DPRINTK("ENTER\n"); 3915 3916 /* do hardreset */ 3917 rc = sata_link_hardreset(link, timing, deadline); 3918 if (rc) { 3919 ata_link_printk(link, KERN_ERR, 3920 "COMRESET failed (errno=%d)\n", rc); 3921 return rc; 3922 } 3923 3924 /* TODO: phy layer with polling, timeouts, etc. */ 3925 if (ata_link_offline(link)) { 3926 *class = ATA_DEV_NONE; 3927 DPRINTK("EXIT, link offline\n"); 3928 return 0; 3929 } 3930 3931 /* wait a while before checking status */ 3932 ata_wait_after_reset(ap, deadline); 3933 3934 /* If PMP is supported, we have to do follow-up SRST. Note 3935 * that some PMPs don't send D2H Reg FIS after hardreset at 3936 * all if the first port is empty. Wait for it just for a 3937 * second and request follow-up SRST. 3938 */ 3939 if (ap->flags & ATA_FLAG_PMP) { 3940 ata_wait_ready(ap, jiffies + HZ); 3941 return -EAGAIN; 3942 } 3943 3944 rc = ata_wait_ready(ap, deadline); 3945 /* link occupied, -ENODEV too is an error */ 3946 if (rc) { 3947 ata_link_printk(link, KERN_ERR, 3948 "COMRESET failed (errno=%d)\n", rc); 3949 return rc; 3950 } 3951 3952 ap->ops->dev_select(ap, 0); /* probably unnecessary */ 3953 3954 *class = ata_dev_try_classify(link->device, 1, NULL); 3955 3956 DPRINTK("EXIT, class=%u\n", *class); 3957 return 0; 3958 } 3959 3960 /** 3961 * ata_std_postreset - standard postreset callback 3962 * @link: the target ata_link 3963 * @classes: classes of attached devices 3964 * 3965 * This function is invoked after a successful reset. Note that 3966 * the device might have been reset more than once using 3967 * different reset methods before postreset is invoked. 3968 * 3969 * LOCKING: 3970 * Kernel thread context (may sleep) 3971 */ 3972 void ata_std_postreset(struct ata_link *link, unsigned int *classes) 3973 { 3974 struct ata_port *ap = link->ap; 3975 u32 serror; 3976 3977 DPRINTK("ENTER\n"); 3978 3979 /* print link status */ 3980 sata_print_link_status(link); 3981 3982 /* clear SError */ 3983 if (sata_scr_read(link, SCR_ERROR, &serror) == 0) 3984 sata_scr_write(link, SCR_ERROR, serror); 3985 3986 /* is double-select really necessary? */ 3987 if (classes[0] != ATA_DEV_NONE) 3988 ap->ops->dev_select(ap, 1); 3989 if (classes[1] != ATA_DEV_NONE) 3990 ap->ops->dev_select(ap, 0); 3991 3992 /* bail out if no device is present */ 3993 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { 3994 DPRINTK("EXIT, no device\n"); 3995 return; 3996 } 3997 3998 /* set up device control */ 3999 if (ap->ioaddr.ctl_addr) 4000 iowrite8(ap->ctl, ap->ioaddr.ctl_addr); 4001 4002 DPRINTK("EXIT\n"); 4003 } 4004 4005 /** 4006 * ata_dev_same_device - Determine whether new ID matches configured device 4007 * @dev: device to compare against 4008 * @new_class: class of the new device 4009 * @new_id: IDENTIFY page of the new device 4010 * 4011 * Compare @new_class and @new_id against @dev and determine 4012 * whether @dev is the device indicated by @new_class and 4013 * @new_id. 4014 * 4015 * LOCKING: 4016 * None. 4017 * 4018 * RETURNS: 4019 * 1 if @dev matches @new_class and @new_id, 0 otherwise. 4020 */ 4021 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class, 4022 const u16 *new_id) 4023 { 4024 const u16 *old_id = dev->id; 4025 unsigned char model[2][ATA_ID_PROD_LEN + 1]; 4026 unsigned char serial[2][ATA_ID_SERNO_LEN + 1]; 4027 4028 if (dev->class != new_class) { 4029 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n", 4030 dev->class, new_class); 4031 return 0; 4032 } 4033 4034 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0])); 4035 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1])); 4036 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0])); 4037 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1])); 4038 4039 if (strcmp(model[0], model[1])) { 4040 ata_dev_printk(dev, KERN_INFO, "model number mismatch " 4041 "'%s' != '%s'\n", model[0], model[1]); 4042 return 0; 4043 } 4044 4045 if (strcmp(serial[0], serial[1])) { 4046 ata_dev_printk(dev, KERN_INFO, "serial number mismatch " 4047 "'%s' != '%s'\n", serial[0], serial[1]); 4048 return 0; 4049 } 4050 4051 return 1; 4052 } 4053 4054 /** 4055 * ata_dev_reread_id - Re-read IDENTIFY data 4056 * @dev: target ATA device 4057 * @readid_flags: read ID flags 4058 * 4059 * Re-read IDENTIFY page and make sure @dev is still attached to 4060 * the port. 4061 * 4062 * LOCKING: 4063 * Kernel thread context (may sleep) 4064 * 4065 * RETURNS: 4066 * 0 on success, negative errno otherwise 4067 */ 4068 int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags) 4069 { 4070 unsigned int class = dev->class; 4071 u16 *id = (void *)dev->link->ap->sector_buf; 4072 int rc; 4073 4074 /* read ID data */ 4075 rc = ata_dev_read_id(dev, &class, readid_flags, id); 4076 if (rc) 4077 return rc; 4078 4079 /* is the device still there? */ 4080 if (!ata_dev_same_device(dev, class, id)) 4081 return -ENODEV; 4082 4083 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS); 4084 return 0; 4085 } 4086 4087 /** 4088 * ata_dev_revalidate - Revalidate ATA device 4089 * @dev: device to revalidate 4090 * @new_class: new class code 4091 * @readid_flags: read ID flags 4092 * 4093 * Re-read IDENTIFY page, make sure @dev is still attached to the 4094 * port and reconfigure it according to the new IDENTIFY page. 4095 * 4096 * LOCKING: 4097 * Kernel thread context (may sleep) 4098 * 4099 * RETURNS: 4100 * 0 on success, negative errno otherwise 4101 */ 4102 int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class, 4103 unsigned int readid_flags) 4104 { 4105 u64 n_sectors = dev->n_sectors; 4106 int rc; 4107 4108 if (!ata_dev_enabled(dev)) 4109 return -ENODEV; 4110 4111 /* fail early if !ATA && !ATAPI to avoid issuing [P]IDENTIFY to PMP */ 4112 if (ata_class_enabled(new_class) && 4113 new_class != ATA_DEV_ATA && new_class != ATA_DEV_ATAPI) { 4114 ata_dev_printk(dev, KERN_INFO, "class mismatch %u != %u\n", 4115 dev->class, new_class); 4116 rc = -ENODEV; 4117 goto fail; 4118 } 4119 4120 /* re-read ID */ 4121 rc = ata_dev_reread_id(dev, readid_flags); 4122 if (rc) 4123 goto fail; 4124 4125 /* configure device according to the new ID */ 4126 rc = ata_dev_configure(dev); 4127 if (rc) 4128 goto fail; 4129 4130 /* verify n_sectors hasn't changed */ 4131 if (dev->class == ATA_DEV_ATA && n_sectors && 4132 dev->n_sectors != n_sectors) { 4133 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch " 4134 "%llu != %llu\n", 4135 (unsigned long long)n_sectors, 4136 (unsigned long long)dev->n_sectors); 4137 4138 /* restore original n_sectors */ 4139 dev->n_sectors = n_sectors; 4140 4141 rc = -ENODEV; 4142 goto fail; 4143 } 4144 4145 return 0; 4146 4147 fail: 4148 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc); 4149 return rc; 4150 } 4151 4152 struct ata_blacklist_entry { 4153 const char *model_num; 4154 const char *model_rev; 4155 unsigned long horkage; 4156 }; 4157 4158 static const struct ata_blacklist_entry ata_device_blacklist [] = { 4159 /* Devices with DMA related problems under Linux */ 4160 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA }, 4161 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA }, 4162 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA }, 4163 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA }, 4164 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA }, 4165 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA }, 4166 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA }, 4167 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA }, 4168 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA }, 4169 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA }, 4170 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA }, 4171 { "CRD-84", NULL, ATA_HORKAGE_NODMA }, 4172 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA }, 4173 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA }, 4174 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA }, 4175 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA }, 4176 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA }, 4177 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA }, 4178 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA }, 4179 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA }, 4180 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA }, 4181 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA }, 4182 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA }, 4183 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA }, 4184 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA }, 4185 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA }, 4186 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA }, 4187 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA }, 4188 { "SAMSUNG CD-ROM SN-124", "N001", ATA_HORKAGE_NODMA }, 4189 { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA }, 4190 /* Odd clown on sil3726/4726 PMPs */ 4191 { "Config Disk", NULL, ATA_HORKAGE_NODMA | 4192 ATA_HORKAGE_SKIP_PM }, 4193 4194 /* Weird ATAPI devices */ 4195 { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 }, 4196 4197 /* Devices we expect to fail diagnostics */ 4198 4199 /* Devices where NCQ should be avoided */ 4200 /* NCQ is slow */ 4201 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ }, 4202 /* http://thread.gmane.org/gmane.linux.ide/14907 */ 4203 { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ }, 4204 /* NCQ is broken */ 4205 { "Maxtor *", "BANC*", ATA_HORKAGE_NONCQ }, 4206 { "Maxtor 7V300F0", "VA111630", ATA_HORKAGE_NONCQ }, 4207 { "HITACHI HDS7250SASUN500G*", NULL, ATA_HORKAGE_NONCQ }, 4208 { "HITACHI HDS7225SBSUN250G*", NULL, ATA_HORKAGE_NONCQ }, 4209 { "ST380817AS", "3.42", ATA_HORKAGE_NONCQ }, 4210 4211 /* Blacklist entries taken from Silicon Image 3124/3132 4212 Windows driver .inf file - also several Linux problem reports */ 4213 { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, }, 4214 { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, }, 4215 { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, }, 4216 /* Drives which do spurious command completion */ 4217 { "HTS541680J9SA00", "SB2IC7EP", ATA_HORKAGE_NONCQ, }, 4218 { "HTS541612J9SA00", "SBDIC7JP", ATA_HORKAGE_NONCQ, }, 4219 { "HDT722516DLA380", "V43OA96A", ATA_HORKAGE_NONCQ, }, 4220 { "Hitachi HTS541616J9SA00", "SB4OC70P", ATA_HORKAGE_NONCQ, }, 4221 { "Hitachi HTS542525K9SA00", "BBFOC31P", ATA_HORKAGE_NONCQ, }, 4222 { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, }, 4223 { "WDC WD3200AAJS-00RYA0", "12.01B01", ATA_HORKAGE_NONCQ, }, 4224 { "FUJITSU MHV2080BH", "00840028", ATA_HORKAGE_NONCQ, }, 4225 { "ST9120822AS", "3.CLF", ATA_HORKAGE_NONCQ, }, 4226 { "ST9160821AS", "3.CLF", ATA_HORKAGE_NONCQ, }, 4227 { "ST9160821AS", "3.ALD", ATA_HORKAGE_NONCQ, }, 4228 { "ST9160821AS", "3.CCD", ATA_HORKAGE_NONCQ, }, 4229 { "ST3160812AS", "3.ADJ", ATA_HORKAGE_NONCQ, }, 4230 { "ST980813AS", "3.ADB", ATA_HORKAGE_NONCQ, }, 4231 { "SAMSUNG HD401LJ", "ZZ100-15", ATA_HORKAGE_NONCQ, }, 4232 { "Maxtor 7V300F0", "VA111900", ATA_HORKAGE_NONCQ, }, 4233 4234 /* devices which puke on READ_NATIVE_MAX */ 4235 { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, }, 4236 { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA }, 4237 { "WDC WD2500JD-00HBB0", "WD-WMAL71490727", ATA_HORKAGE_BROKEN_HPA }, 4238 { "MAXTOR 6L080L4", "A93.0500", ATA_HORKAGE_BROKEN_HPA }, 4239 4240 /* Devices which report 1 sector over size HPA */ 4241 { "ST340823A", NULL, ATA_HORKAGE_HPA_SIZE, }, 4242 { "ST320413A", NULL, ATA_HORKAGE_HPA_SIZE, }, 4243 4244 /* Devices which get the IVB wrong */ 4245 { "QUANTUM FIREBALLlct10 05", "A03.0900", ATA_HORKAGE_IVB, }, 4246 { "TSSTcorp CDDVDW SH-S202J", "SB00", ATA_HORKAGE_IVB, }, 4247 4248 /* End Marker */ 4249 { } 4250 }; 4251 4252 static int strn_pattern_cmp(const char *patt, const char *name, int wildchar) 4253 { 4254 const char *p; 4255 int len; 4256 4257 /* 4258 * check for trailing wildcard: *\0 4259 */ 4260 p = strchr(patt, wildchar); 4261 if (p && ((*(p + 1)) == 0)) 4262 len = p - patt; 4263 else { 4264 len = strlen(name); 4265 if (!len) { 4266 if (!*patt) 4267 return 0; 4268 return -1; 4269 } 4270 } 4271 4272 return strncmp(patt, name, len); 4273 } 4274 4275 static unsigned long ata_dev_blacklisted(const struct ata_device *dev) 4276 { 4277 unsigned char model_num[ATA_ID_PROD_LEN + 1]; 4278 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1]; 4279 const struct ata_blacklist_entry *ad = ata_device_blacklist; 4280 4281 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num)); 4282 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev)); 4283 4284 while (ad->model_num) { 4285 if (!strn_pattern_cmp(ad->model_num, model_num, '*')) { 4286 if (ad->model_rev == NULL) 4287 return ad->horkage; 4288 if (!strn_pattern_cmp(ad->model_rev, model_rev, '*')) 4289 return ad->horkage; 4290 } 4291 ad++; 4292 } 4293 return 0; 4294 } 4295 4296 static int ata_dma_blacklisted(const struct ata_device *dev) 4297 { 4298 /* We don't support polling DMA. 4299 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO) 4300 * if the LLDD handles only interrupts in the HSM_ST_LAST state. 4301 */ 4302 if ((dev->link->ap->flags & ATA_FLAG_PIO_POLLING) && 4303 (dev->flags & ATA_DFLAG_CDB_INTR)) 4304 return 1; 4305 return (dev->horkage & ATA_HORKAGE_NODMA) ? 1 : 0; 4306 } 4307 4308 /** 4309 * ata_is_40wire - check drive side detection 4310 * @dev: device 4311 * 4312 * Perform drive side detection decoding, allowing for device vendors 4313 * who can't follow the documentation. 4314 */ 4315 4316 static int ata_is_40wire(struct ata_device *dev) 4317 { 4318 if (dev->horkage & ATA_HORKAGE_IVB) 4319 return ata_drive_40wire_relaxed(dev->id); 4320 return ata_drive_40wire(dev->id); 4321 } 4322 4323 /** 4324 * ata_dev_xfermask - Compute supported xfermask of the given device 4325 * @dev: Device to compute xfermask for 4326 * 4327 * Compute supported xfermask of @dev and store it in 4328 * dev->*_mask. This function is responsible for applying all 4329 * known limits including host controller limits, device 4330 * blacklist, etc... 4331 * 4332 * LOCKING: 4333 * None. 4334 */ 4335 static void ata_dev_xfermask(struct ata_device *dev) 4336 { 4337 struct ata_link *link = dev->link; 4338 struct ata_port *ap = link->ap; 4339 struct ata_host *host = ap->host; 4340 unsigned long xfer_mask; 4341 4342 /* controller modes available */ 4343 xfer_mask = ata_pack_xfermask(ap->pio_mask, 4344 ap->mwdma_mask, ap->udma_mask); 4345 4346 /* drive modes available */ 4347 xfer_mask &= ata_pack_xfermask(dev->pio_mask, 4348 dev->mwdma_mask, dev->udma_mask); 4349 xfer_mask &= ata_id_xfermask(dev->id); 4350 4351 /* 4352 * CFA Advanced TrueIDE timings are not allowed on a shared 4353 * cable 4354 */ 4355 if (ata_dev_pair(dev)) { 4356 /* No PIO5 or PIO6 */ 4357 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5)); 4358 /* No MWDMA3 or MWDMA 4 */ 4359 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3)); 4360 } 4361 4362 if (ata_dma_blacklisted(dev)) { 4363 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); 4364 ata_dev_printk(dev, KERN_WARNING, 4365 "device is on DMA blacklist, disabling DMA\n"); 4366 } 4367 4368 if ((host->flags & ATA_HOST_SIMPLEX) && 4369 host->simplex_claimed && host->simplex_claimed != ap) { 4370 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); 4371 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by " 4372 "other device, disabling DMA\n"); 4373 } 4374 4375 if (ap->flags & ATA_FLAG_NO_IORDY) 4376 xfer_mask &= ata_pio_mask_no_iordy(dev); 4377 4378 if (ap->ops->mode_filter) 4379 xfer_mask = ap->ops->mode_filter(dev, xfer_mask); 4380 4381 /* Apply cable rule here. Don't apply it early because when 4382 * we handle hot plug the cable type can itself change. 4383 * Check this last so that we know if the transfer rate was 4384 * solely limited by the cable. 4385 * Unknown or 80 wire cables reported host side are checked 4386 * drive side as well. Cases where we know a 40wire cable 4387 * is used safely for 80 are not checked here. 4388 */ 4389 if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA)) 4390 /* UDMA/44 or higher would be available */ 4391 if ((ap->cbl == ATA_CBL_PATA40) || 4392 (ata_is_40wire(dev) && 4393 (ap->cbl == ATA_CBL_PATA_UNK || 4394 ap->cbl == ATA_CBL_PATA80))) { 4395 ata_dev_printk(dev, KERN_WARNING, 4396 "limited to UDMA/33 due to 40-wire cable\n"); 4397 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA); 4398 } 4399 4400 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, 4401 &dev->mwdma_mask, &dev->udma_mask); 4402 } 4403 4404 /** 4405 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command 4406 * @dev: Device to which command will be sent 4407 * 4408 * Issue SET FEATURES - XFER MODE command to device @dev 4409 * on port @ap. 4410 * 4411 * LOCKING: 4412 * PCI/etc. bus probe sem. 4413 * 4414 * RETURNS: 4415 * 0 on success, AC_ERR_* mask otherwise. 4416 */ 4417 4418 static unsigned int ata_dev_set_xfermode(struct ata_device *dev) 4419 { 4420 struct ata_taskfile tf; 4421 unsigned int err_mask; 4422 4423 /* set up set-features taskfile */ 4424 DPRINTK("set features - xfer mode\n"); 4425 4426 /* Some controllers and ATAPI devices show flaky interrupt 4427 * behavior after setting xfer mode. Use polling instead. 4428 */ 4429 ata_tf_init(dev, &tf); 4430 tf.command = ATA_CMD_SET_FEATURES; 4431 tf.feature = SETFEATURES_XFER; 4432 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING; 4433 tf.protocol = ATA_PROT_NODATA; 4434 tf.nsect = dev->xfer_mode; 4435 4436 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); 4437 4438 DPRINTK("EXIT, err_mask=%x\n", err_mask); 4439 return err_mask; 4440 } 4441 /** 4442 * ata_dev_set_feature - Issue SET FEATURES - SATA FEATURES 4443 * @dev: Device to which command will be sent 4444 * @enable: Whether to enable or disable the feature 4445 * @feature: The sector count represents the feature to set 4446 * 4447 * Issue SET FEATURES - SATA FEATURES command to device @dev 4448 * on port @ap with sector count 4449 * 4450 * LOCKING: 4451 * PCI/etc. bus probe sem. 4452 * 4453 * RETURNS: 4454 * 0 on success, AC_ERR_* mask otherwise. 4455 */ 4456 static unsigned int ata_dev_set_feature(struct ata_device *dev, u8 enable, 4457 u8 feature) 4458 { 4459 struct ata_taskfile tf; 4460 unsigned int err_mask; 4461 4462 /* set up set-features taskfile */ 4463 DPRINTK("set features - SATA features\n"); 4464 4465 ata_tf_init(dev, &tf); 4466 tf.command = ATA_CMD_SET_FEATURES; 4467 tf.feature = enable; 4468 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 4469 tf.protocol = ATA_PROT_NODATA; 4470 tf.nsect = feature; 4471 4472 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); 4473 4474 DPRINTK("EXIT, err_mask=%x\n", err_mask); 4475 return err_mask; 4476 } 4477 4478 /** 4479 * ata_dev_init_params - Issue INIT DEV PARAMS command 4480 * @dev: Device to which command will be sent 4481 * @heads: Number of heads (taskfile parameter) 4482 * @sectors: Number of sectors (taskfile parameter) 4483 * 4484 * LOCKING: 4485 * Kernel thread context (may sleep) 4486 * 4487 * RETURNS: 4488 * 0 on success, AC_ERR_* mask otherwise. 4489 */ 4490 static unsigned int ata_dev_init_params(struct ata_device *dev, 4491 u16 heads, u16 sectors) 4492 { 4493 struct ata_taskfile tf; 4494 unsigned int err_mask; 4495 4496 /* Number of sectors per track 1-255. Number of heads 1-16 */ 4497 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16) 4498 return AC_ERR_INVALID; 4499 4500 /* set up init dev params taskfile */ 4501 DPRINTK("init dev params \n"); 4502 4503 ata_tf_init(dev, &tf); 4504 tf.command = ATA_CMD_INIT_DEV_PARAMS; 4505 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 4506 tf.protocol = ATA_PROT_NODATA; 4507 tf.nsect = sectors; 4508 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */ 4509 4510 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); 4511 /* A clean abort indicates an original or just out of spec drive 4512 and we should continue as we issue the setup based on the 4513 drive reported working geometry */ 4514 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED)) 4515 err_mask = 0; 4516 4517 DPRINTK("EXIT, err_mask=%x\n", err_mask); 4518 return err_mask; 4519 } 4520 4521 /** 4522 * ata_sg_clean - Unmap DMA memory associated with command 4523 * @qc: Command containing DMA memory to be released 4524 * 4525 * Unmap all mapped DMA memory associated with this command. 4526 * 4527 * LOCKING: 4528 * spin_lock_irqsave(host lock) 4529 */ 4530 void ata_sg_clean(struct ata_queued_cmd *qc) 4531 { 4532 struct ata_port *ap = qc->ap; 4533 struct scatterlist *sg = qc->__sg; 4534 int dir = qc->dma_dir; 4535 void *pad_buf = NULL; 4536 4537 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP)); 4538 WARN_ON(sg == NULL); 4539 4540 if (qc->flags & ATA_QCFLAG_SINGLE) 4541 WARN_ON(qc->n_elem > 1); 4542 4543 VPRINTK("unmapping %u sg elements\n", qc->n_elem); 4544 4545 /* if we padded the buffer out to 32-bit bound, and data 4546 * xfer direction is from-device, we must copy from the 4547 * pad buffer back into the supplied buffer 4548 */ 4549 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE)) 4550 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); 4551 4552 if (qc->flags & ATA_QCFLAG_SG) { 4553 if (qc->n_elem) 4554 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir); 4555 /* restore last sg */ 4556 sg_last(sg, qc->orig_n_elem)->length += qc->pad_len; 4557 if (pad_buf) { 4558 struct scatterlist *psg = &qc->pad_sgent; 4559 void *addr = kmap_atomic(sg_page(psg), KM_IRQ0); 4560 memcpy(addr + psg->offset, pad_buf, qc->pad_len); 4561 kunmap_atomic(addr, KM_IRQ0); 4562 } 4563 } else { 4564 if (qc->n_elem) 4565 dma_unmap_single(ap->dev, 4566 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]), 4567 dir); 4568 /* restore sg */ 4569 sg->length += qc->pad_len; 4570 if (pad_buf) 4571 memcpy(qc->buf_virt + sg->length - qc->pad_len, 4572 pad_buf, qc->pad_len); 4573 } 4574 4575 qc->flags &= ~ATA_QCFLAG_DMAMAP; 4576 qc->__sg = NULL; 4577 } 4578 4579 /** 4580 * ata_fill_sg - Fill PCI IDE PRD table 4581 * @qc: Metadata associated with taskfile to be transferred 4582 * 4583 * Fill PCI IDE PRD (scatter-gather) table with segments 4584 * associated with the current disk command. 4585 * 4586 * LOCKING: 4587 * spin_lock_irqsave(host lock) 4588 * 4589 */ 4590 static void ata_fill_sg(struct ata_queued_cmd *qc) 4591 { 4592 struct ata_port *ap = qc->ap; 4593 struct scatterlist *sg; 4594 unsigned int idx; 4595 4596 WARN_ON(qc->__sg == NULL); 4597 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); 4598 4599 idx = 0; 4600 ata_for_each_sg(sg, qc) { 4601 u32 addr, offset; 4602 u32 sg_len, len; 4603 4604 /* determine if physical DMA addr spans 64K boundary. 4605 * Note h/w doesn't support 64-bit, so we unconditionally 4606 * truncate dma_addr_t to u32. 4607 */ 4608 addr = (u32) sg_dma_address(sg); 4609 sg_len = sg_dma_len(sg); 4610 4611 while (sg_len) { 4612 offset = addr & 0xffff; 4613 len = sg_len; 4614 if ((offset + sg_len) > 0x10000) 4615 len = 0x10000 - offset; 4616 4617 ap->prd[idx].addr = cpu_to_le32(addr); 4618 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); 4619 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); 4620 4621 idx++; 4622 sg_len -= len; 4623 addr += len; 4624 } 4625 } 4626 4627 if (idx) 4628 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); 4629 } 4630 4631 /** 4632 * ata_fill_sg_dumb - Fill PCI IDE PRD table 4633 * @qc: Metadata associated with taskfile to be transferred 4634 * 4635 * Fill PCI IDE PRD (scatter-gather) table with segments 4636 * associated with the current disk command. Perform the fill 4637 * so that we avoid writing any length 64K records for 4638 * controllers that don't follow the spec. 4639 * 4640 * LOCKING: 4641 * spin_lock_irqsave(host lock) 4642 * 4643 */ 4644 static void ata_fill_sg_dumb(struct ata_queued_cmd *qc) 4645 { 4646 struct ata_port *ap = qc->ap; 4647 struct scatterlist *sg; 4648 unsigned int idx; 4649 4650 WARN_ON(qc->__sg == NULL); 4651 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); 4652 4653 idx = 0; 4654 ata_for_each_sg(sg, qc) { 4655 u32 addr, offset; 4656 u32 sg_len, len, blen; 4657 4658 /* determine if physical DMA addr spans 64K boundary. 4659 * Note h/w doesn't support 64-bit, so we unconditionally 4660 * truncate dma_addr_t to u32. 4661 */ 4662 addr = (u32) sg_dma_address(sg); 4663 sg_len = sg_dma_len(sg); 4664 4665 while (sg_len) { 4666 offset = addr & 0xffff; 4667 len = sg_len; 4668 if ((offset + sg_len) > 0x10000) 4669 len = 0x10000 - offset; 4670 4671 blen = len & 0xffff; 4672 ap->prd[idx].addr = cpu_to_le32(addr); 4673 if (blen == 0) { 4674 /* Some PATA chipsets like the CS5530 can't 4675 cope with 0x0000 meaning 64K as the spec says */ 4676 ap->prd[idx].flags_len = cpu_to_le32(0x8000); 4677 blen = 0x8000; 4678 ap->prd[++idx].addr = cpu_to_le32(addr + 0x8000); 4679 } 4680 ap->prd[idx].flags_len = cpu_to_le32(blen); 4681 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); 4682 4683 idx++; 4684 sg_len -= len; 4685 addr += len; 4686 } 4687 } 4688 4689 if (idx) 4690 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); 4691 } 4692 4693 /** 4694 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported 4695 * @qc: Metadata associated with taskfile to check 4696 * 4697 * Allow low-level driver to filter ATA PACKET commands, returning 4698 * a status indicating whether or not it is OK to use DMA for the 4699 * supplied PACKET command. 4700 * 4701 * LOCKING: 4702 * spin_lock_irqsave(host lock) 4703 * 4704 * RETURNS: 0 when ATAPI DMA can be used 4705 * nonzero otherwise 4706 */ 4707 int ata_check_atapi_dma(struct ata_queued_cmd *qc) 4708 { 4709 struct ata_port *ap = qc->ap; 4710 4711 /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a 4712 * few ATAPI devices choke on such DMA requests. 4713 */ 4714 if (unlikely(qc->nbytes & 15)) 4715 return 1; 4716 4717 if (ap->ops->check_atapi_dma) 4718 return ap->ops->check_atapi_dma(qc); 4719 4720 return 0; 4721 } 4722 4723 /** 4724 * ata_std_qc_defer - Check whether a qc needs to be deferred 4725 * @qc: ATA command in question 4726 * 4727 * Non-NCQ commands cannot run with any other command, NCQ or 4728 * not. As upper layer only knows the queue depth, we are 4729 * responsible for maintaining exclusion. This function checks 4730 * whether a new command @qc can be issued. 4731 * 4732 * LOCKING: 4733 * spin_lock_irqsave(host lock) 4734 * 4735 * RETURNS: 4736 * ATA_DEFER_* if deferring is needed, 0 otherwise. 4737 */ 4738 int ata_std_qc_defer(struct ata_queued_cmd *qc) 4739 { 4740 struct ata_link *link = qc->dev->link; 4741 4742 if (qc->tf.protocol == ATA_PROT_NCQ) { 4743 if (!ata_tag_valid(link->active_tag)) 4744 return 0; 4745 } else { 4746 if (!ata_tag_valid(link->active_tag) && !link->sactive) 4747 return 0; 4748 } 4749 4750 return ATA_DEFER_LINK; 4751 } 4752 4753 /** 4754 * ata_qc_prep - Prepare taskfile for submission 4755 * @qc: Metadata associated with taskfile to be prepared 4756 * 4757 * Prepare ATA taskfile for submission. 4758 * 4759 * LOCKING: 4760 * spin_lock_irqsave(host lock) 4761 */ 4762 void ata_qc_prep(struct ata_queued_cmd *qc) 4763 { 4764 if (!(qc->flags & ATA_QCFLAG_DMAMAP)) 4765 return; 4766 4767 ata_fill_sg(qc); 4768 } 4769 4770 /** 4771 * ata_dumb_qc_prep - Prepare taskfile for submission 4772 * @qc: Metadata associated with taskfile to be prepared 4773 * 4774 * Prepare ATA taskfile for submission. 4775 * 4776 * LOCKING: 4777 * spin_lock_irqsave(host lock) 4778 */ 4779 void ata_dumb_qc_prep(struct ata_queued_cmd *qc) 4780 { 4781 if (!(qc->flags & ATA_QCFLAG_DMAMAP)) 4782 return; 4783 4784 ata_fill_sg_dumb(qc); 4785 } 4786 4787 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { } 4788 4789 /** 4790 * ata_sg_init_one - Associate command with memory buffer 4791 * @qc: Command to be associated 4792 * @buf: Memory buffer 4793 * @buflen: Length of memory buffer, in bytes. 4794 * 4795 * Initialize the data-related elements of queued_cmd @qc 4796 * to point to a single memory buffer, @buf of byte length @buflen. 4797 * 4798 * LOCKING: 4799 * spin_lock_irqsave(host lock) 4800 */ 4801 4802 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen) 4803 { 4804 qc->flags |= ATA_QCFLAG_SINGLE; 4805 4806 qc->__sg = &qc->sgent; 4807 qc->n_elem = 1; 4808 qc->orig_n_elem = 1; 4809 qc->buf_virt = buf; 4810 qc->nbytes = buflen; 4811 qc->cursg = qc->__sg; 4812 4813 sg_init_one(&qc->sgent, buf, buflen); 4814 } 4815 4816 /** 4817 * ata_sg_init - Associate command with scatter-gather table. 4818 * @qc: Command to be associated 4819 * @sg: Scatter-gather table. 4820 * @n_elem: Number of elements in s/g table. 4821 * 4822 * Initialize the data-related elements of queued_cmd @qc 4823 * to point to a scatter-gather table @sg, containing @n_elem 4824 * elements. 4825 * 4826 * LOCKING: 4827 * spin_lock_irqsave(host lock) 4828 */ 4829 4830 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, 4831 unsigned int n_elem) 4832 { 4833 qc->flags |= ATA_QCFLAG_SG; 4834 qc->__sg = sg; 4835 qc->n_elem = n_elem; 4836 qc->orig_n_elem = n_elem; 4837 qc->cursg = qc->__sg; 4838 } 4839 4840 /** 4841 * ata_sg_setup_one - DMA-map the memory buffer associated with a command. 4842 * @qc: Command with memory buffer to be mapped. 4843 * 4844 * DMA-map the memory buffer associated with queued_cmd @qc. 4845 * 4846 * LOCKING: 4847 * spin_lock_irqsave(host lock) 4848 * 4849 * RETURNS: 4850 * Zero on success, negative on error. 4851 */ 4852 4853 static int ata_sg_setup_one(struct ata_queued_cmd *qc) 4854 { 4855 struct ata_port *ap = qc->ap; 4856 int dir = qc->dma_dir; 4857 struct scatterlist *sg = qc->__sg; 4858 dma_addr_t dma_address; 4859 int trim_sg = 0; 4860 4861 /* we must lengthen transfers to end on a 32-bit boundary */ 4862 qc->pad_len = sg->length & 3; 4863 if (qc->pad_len) { 4864 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); 4865 struct scatterlist *psg = &qc->pad_sgent; 4866 4867 WARN_ON(qc->dev->class != ATA_DEV_ATAPI); 4868 4869 memset(pad_buf, 0, ATA_DMA_PAD_SZ); 4870 4871 if (qc->tf.flags & ATA_TFLAG_WRITE) 4872 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len, 4873 qc->pad_len); 4874 4875 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); 4876 sg_dma_len(psg) = ATA_DMA_PAD_SZ; 4877 /* trim sg */ 4878 sg->length -= qc->pad_len; 4879 if (sg->length == 0) 4880 trim_sg = 1; 4881 4882 DPRINTK("padding done, sg->length=%u pad_len=%u\n", 4883 sg->length, qc->pad_len); 4884 } 4885 4886 if (trim_sg) { 4887 qc->n_elem--; 4888 goto skip_map; 4889 } 4890 4891 dma_address = dma_map_single(ap->dev, qc->buf_virt, 4892 sg->length, dir); 4893 if (dma_mapping_error(dma_address)) { 4894 /* restore sg */ 4895 sg->length += qc->pad_len; 4896 return -1; 4897 } 4898 4899 sg_dma_address(sg) = dma_address; 4900 sg_dma_len(sg) = sg->length; 4901 4902 skip_map: 4903 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg), 4904 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); 4905 4906 return 0; 4907 } 4908 4909 /** 4910 * ata_sg_setup - DMA-map the scatter-gather table associated with a command. 4911 * @qc: Command with scatter-gather table to be mapped. 4912 * 4913 * DMA-map the scatter-gather table associated with queued_cmd @qc. 4914 * 4915 * LOCKING: 4916 * spin_lock_irqsave(host lock) 4917 * 4918 * RETURNS: 4919 * Zero on success, negative on error. 4920 * 4921 */ 4922 4923 static int ata_sg_setup(struct ata_queued_cmd *qc) 4924 { 4925 struct ata_port *ap = qc->ap; 4926 struct scatterlist *sg = qc->__sg; 4927 struct scatterlist *lsg = sg_last(qc->__sg, qc->n_elem); 4928 int n_elem, pre_n_elem, dir, trim_sg = 0; 4929 4930 VPRINTK("ENTER, ata%u\n", ap->print_id); 4931 WARN_ON(!(qc->flags & ATA_QCFLAG_SG)); 4932 4933 /* we must lengthen transfers to end on a 32-bit boundary */ 4934 qc->pad_len = lsg->length & 3; 4935 if (qc->pad_len) { 4936 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); 4937 struct scatterlist *psg = &qc->pad_sgent; 4938 unsigned int offset; 4939 4940 WARN_ON(qc->dev->class != ATA_DEV_ATAPI); 4941 4942 memset(pad_buf, 0, ATA_DMA_PAD_SZ); 4943 4944 /* 4945 * psg->page/offset are used to copy to-be-written 4946 * data in this function or read data in ata_sg_clean. 4947 */ 4948 offset = lsg->offset + lsg->length - qc->pad_len; 4949 sg_init_table(psg, 1); 4950 sg_set_page(psg, nth_page(sg_page(lsg), offset >> PAGE_SHIFT), 4951 qc->pad_len, offset_in_page(offset)); 4952 4953 if (qc->tf.flags & ATA_TFLAG_WRITE) { 4954 void *addr = kmap_atomic(sg_page(psg), KM_IRQ0); 4955 memcpy(pad_buf, addr + psg->offset, qc->pad_len); 4956 kunmap_atomic(addr, KM_IRQ0); 4957 } 4958 4959 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); 4960 sg_dma_len(psg) = ATA_DMA_PAD_SZ; 4961 /* trim last sg */ 4962 lsg->length -= qc->pad_len; 4963 if (lsg->length == 0) 4964 trim_sg = 1; 4965 4966 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n", 4967 qc->n_elem - 1, lsg->length, qc->pad_len); 4968 } 4969 4970 pre_n_elem = qc->n_elem; 4971 if (trim_sg && pre_n_elem) 4972 pre_n_elem--; 4973 4974 if (!pre_n_elem) { 4975 n_elem = 0; 4976 goto skip_map; 4977 } 4978 4979 dir = qc->dma_dir; 4980 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir); 4981 if (n_elem < 1) { 4982 /* restore last sg */ 4983 lsg->length += qc->pad_len; 4984 return -1; 4985 } 4986 4987 DPRINTK("%d sg elements mapped\n", n_elem); 4988 4989 skip_map: 4990 qc->n_elem = n_elem; 4991 4992 return 0; 4993 } 4994 4995 /** 4996 * swap_buf_le16 - swap halves of 16-bit words in place 4997 * @buf: Buffer to swap 4998 * @buf_words: Number of 16-bit words in buffer. 4999 * 5000 * Swap halves of 16-bit words if needed to convert from 5001 * little-endian byte order to native cpu byte order, or 5002 * vice-versa. 5003 * 5004 * LOCKING: 5005 * Inherited from caller. 5006 */ 5007 void swap_buf_le16(u16 *buf, unsigned int buf_words) 5008 { 5009 #ifdef __BIG_ENDIAN 5010 unsigned int i; 5011 5012 for (i = 0; i < buf_words; i++) 5013 buf[i] = le16_to_cpu(buf[i]); 5014 #endif /* __BIG_ENDIAN */ 5015 } 5016 5017 /** 5018 * ata_data_xfer - Transfer data by PIO 5019 * @adev: device to target 5020 * @buf: data buffer 5021 * @buflen: buffer length 5022 * @write_data: read/write 5023 * 5024 * Transfer data from/to the device data register by PIO. 5025 * 5026 * LOCKING: 5027 * Inherited from caller. 5028 */ 5029 void ata_data_xfer(struct ata_device *adev, unsigned char *buf, 5030 unsigned int buflen, int write_data) 5031 { 5032 struct ata_port *ap = adev->link->ap; 5033 unsigned int words = buflen >> 1; 5034 5035 /* Transfer multiple of 2 bytes */ 5036 if (write_data) 5037 iowrite16_rep(ap->ioaddr.data_addr, buf, words); 5038 else 5039 ioread16_rep(ap->ioaddr.data_addr, buf, words); 5040 5041 /* Transfer trailing 1 byte, if any. */ 5042 if (unlikely(buflen & 0x01)) { 5043 u16 align_buf[1] = { 0 }; 5044 unsigned char *trailing_buf = buf + buflen - 1; 5045 5046 if (write_data) { 5047 memcpy(align_buf, trailing_buf, 1); 5048 iowrite16(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); 5049 } else { 5050 align_buf[0] = cpu_to_le16(ioread16(ap->ioaddr.data_addr)); 5051 memcpy(trailing_buf, align_buf, 1); 5052 } 5053 } 5054 } 5055 5056 /** 5057 * ata_data_xfer_noirq - Transfer data by PIO 5058 * @adev: device to target 5059 * @buf: data buffer 5060 * @buflen: buffer length 5061 * @write_data: read/write 5062 * 5063 * Transfer data from/to the device data register by PIO. Do the 5064 * transfer with interrupts disabled. 5065 * 5066 * LOCKING: 5067 * Inherited from caller. 5068 */ 5069 void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf, 5070 unsigned int buflen, int write_data) 5071 { 5072 unsigned long flags; 5073 local_irq_save(flags); 5074 ata_data_xfer(adev, buf, buflen, write_data); 5075 local_irq_restore(flags); 5076 } 5077 5078 5079 /** 5080 * ata_pio_sector - Transfer a sector of data. 5081 * @qc: Command on going 5082 * 5083 * Transfer qc->sect_size bytes of data from/to the ATA device. 5084 * 5085 * LOCKING: 5086 * Inherited from caller. 5087 */ 5088 5089 static void ata_pio_sector(struct ata_queued_cmd *qc) 5090 { 5091 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); 5092 struct ata_port *ap = qc->ap; 5093 struct page *page; 5094 unsigned int offset; 5095 unsigned char *buf; 5096 5097 if (qc->curbytes == qc->nbytes - qc->sect_size) 5098 ap->hsm_task_state = HSM_ST_LAST; 5099 5100 page = sg_page(qc->cursg); 5101 offset = qc->cursg->offset + qc->cursg_ofs; 5102 5103 /* get the current page and offset */ 5104 page = nth_page(page, (offset >> PAGE_SHIFT)); 5105 offset %= PAGE_SIZE; 5106 5107 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); 5108 5109 if (PageHighMem(page)) { 5110 unsigned long flags; 5111 5112 /* FIXME: use a bounce buffer */ 5113 local_irq_save(flags); 5114 buf = kmap_atomic(page, KM_IRQ0); 5115 5116 /* do the actual data transfer */ 5117 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write); 5118 5119 kunmap_atomic(buf, KM_IRQ0); 5120 local_irq_restore(flags); 5121 } else { 5122 buf = page_address(page); 5123 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write); 5124 } 5125 5126 qc->curbytes += qc->sect_size; 5127 qc->cursg_ofs += qc->sect_size; 5128 5129 if (qc->cursg_ofs == qc->cursg->length) { 5130 qc->cursg = sg_next(qc->cursg); 5131 qc->cursg_ofs = 0; 5132 } 5133 } 5134 5135 /** 5136 * ata_pio_sectors - Transfer one or many sectors. 5137 * @qc: Command on going 5138 * 5139 * Transfer one or many sectors of data from/to the 5140 * ATA device for the DRQ request. 5141 * 5142 * LOCKING: 5143 * Inherited from caller. 5144 */ 5145 5146 static void ata_pio_sectors(struct ata_queued_cmd *qc) 5147 { 5148 if (is_multi_taskfile(&qc->tf)) { 5149 /* READ/WRITE MULTIPLE */ 5150 unsigned int nsect; 5151 5152 WARN_ON(qc->dev->multi_count == 0); 5153 5154 nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size, 5155 qc->dev->multi_count); 5156 while (nsect--) 5157 ata_pio_sector(qc); 5158 } else 5159 ata_pio_sector(qc); 5160 5161 ata_altstatus(qc->ap); /* flush */ 5162 } 5163 5164 /** 5165 * atapi_send_cdb - Write CDB bytes to hardware 5166 * @ap: Port to which ATAPI device is attached. 5167 * @qc: Taskfile currently active 5168 * 5169 * When device has indicated its readiness to accept 5170 * a CDB, this function is called. Send the CDB. 5171 * 5172 * LOCKING: 5173 * caller. 5174 */ 5175 5176 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc) 5177 { 5178 /* send SCSI cdb */ 5179 DPRINTK("send cdb\n"); 5180 WARN_ON(qc->dev->cdb_len < 12); 5181 5182 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1); 5183 ata_altstatus(ap); /* flush */ 5184 5185 switch (qc->tf.protocol) { 5186 case ATA_PROT_ATAPI: 5187 ap->hsm_task_state = HSM_ST; 5188 break; 5189 case ATA_PROT_ATAPI_NODATA: 5190 ap->hsm_task_state = HSM_ST_LAST; 5191 break; 5192 case ATA_PROT_ATAPI_DMA: 5193 ap->hsm_task_state = HSM_ST_LAST; 5194 /* initiate bmdma */ 5195 ap->ops->bmdma_start(qc); 5196 break; 5197 } 5198 } 5199 5200 /** 5201 * __atapi_pio_bytes - Transfer data from/to the ATAPI device. 5202 * @qc: Command on going 5203 * @bytes: number of bytes 5204 * 5205 * Transfer Transfer data from/to the ATAPI device. 5206 * 5207 * LOCKING: 5208 * Inherited from caller. 5209 * 5210 */ 5211 5212 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) 5213 { 5214 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); 5215 struct scatterlist *sg = qc->__sg; 5216 struct scatterlist *lsg = sg_last(qc->__sg, qc->n_elem); 5217 struct ata_port *ap = qc->ap; 5218 struct page *page; 5219 unsigned char *buf; 5220 unsigned int offset, count; 5221 int no_more_sg = 0; 5222 5223 if (qc->curbytes + bytes >= qc->nbytes) 5224 ap->hsm_task_state = HSM_ST_LAST; 5225 5226 next_sg: 5227 if (unlikely(no_more_sg)) { 5228 /* 5229 * The end of qc->sg is reached and the device expects 5230 * more data to transfer. In order not to overrun qc->sg 5231 * and fulfill length specified in the byte count register, 5232 * - for read case, discard trailing data from the device 5233 * - for write case, padding zero data to the device 5234 */ 5235 u16 pad_buf[1] = { 0 }; 5236 unsigned int words = bytes >> 1; 5237 unsigned int i; 5238 5239 if (words) /* warning if bytes > 1 */ 5240 ata_dev_printk(qc->dev, KERN_WARNING, 5241 "%u bytes trailing data\n", bytes); 5242 5243 for (i = 0; i < words; i++) 5244 ap->ops->data_xfer(qc->dev, (unsigned char *)pad_buf, 2, do_write); 5245 5246 ap->hsm_task_state = HSM_ST_LAST; 5247 return; 5248 } 5249 5250 sg = qc->cursg; 5251 5252 page = sg_page(sg); 5253 offset = sg->offset + qc->cursg_ofs; 5254 5255 /* get the current page and offset */ 5256 page = nth_page(page, (offset >> PAGE_SHIFT)); 5257 offset %= PAGE_SIZE; 5258 5259 /* don't overrun current sg */ 5260 count = min(sg->length - qc->cursg_ofs, bytes); 5261 5262 /* don't cross page boundaries */ 5263 count = min(count, (unsigned int)PAGE_SIZE - offset); 5264 5265 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); 5266 5267 if (PageHighMem(page)) { 5268 unsigned long flags; 5269 5270 /* FIXME: use bounce buffer */ 5271 local_irq_save(flags); 5272 buf = kmap_atomic(page, KM_IRQ0); 5273 5274 /* do the actual data transfer */ 5275 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); 5276 5277 kunmap_atomic(buf, KM_IRQ0); 5278 local_irq_restore(flags); 5279 } else { 5280 buf = page_address(page); 5281 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); 5282 } 5283 5284 bytes -= count; 5285 qc->curbytes += count; 5286 qc->cursg_ofs += count; 5287 5288 if (qc->cursg_ofs == sg->length) { 5289 if (qc->cursg == lsg) 5290 no_more_sg = 1; 5291 5292 qc->cursg = sg_next(qc->cursg); 5293 qc->cursg_ofs = 0; 5294 } 5295 5296 if (bytes) 5297 goto next_sg; 5298 } 5299 5300 /** 5301 * atapi_pio_bytes - Transfer data from/to the ATAPI device. 5302 * @qc: Command on going 5303 * 5304 * Transfer Transfer data from/to the ATAPI device. 5305 * 5306 * LOCKING: 5307 * Inherited from caller. 5308 */ 5309 5310 static void atapi_pio_bytes(struct ata_queued_cmd *qc) 5311 { 5312 struct ata_port *ap = qc->ap; 5313 struct ata_device *dev = qc->dev; 5314 unsigned int ireason, bc_lo, bc_hi, bytes; 5315 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; 5316 5317 /* Abuse qc->result_tf for temp storage of intermediate TF 5318 * here to save some kernel stack usage. 5319 * For normal completion, qc->result_tf is not relevant. For 5320 * error, qc->result_tf is later overwritten by ata_qc_complete(). 5321 * So, the correctness of qc->result_tf is not affected. 5322 */ 5323 ap->ops->tf_read(ap, &qc->result_tf); 5324 ireason = qc->result_tf.nsect; 5325 bc_lo = qc->result_tf.lbam; 5326 bc_hi = qc->result_tf.lbah; 5327 bytes = (bc_hi << 8) | bc_lo; 5328 5329 /* shall be cleared to zero, indicating xfer of data */ 5330 if (ireason & (1 << 0)) 5331 goto err_out; 5332 5333 /* make sure transfer direction matches expected */ 5334 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; 5335 if (do_write != i_write) 5336 goto err_out; 5337 5338 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes); 5339 5340 __atapi_pio_bytes(qc, bytes); 5341 ata_altstatus(ap); /* flush */ 5342 5343 return; 5344 5345 err_out: 5346 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n"); 5347 qc->err_mask |= AC_ERR_HSM; 5348 ap->hsm_task_state = HSM_ST_ERR; 5349 } 5350 5351 /** 5352 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue. 5353 * @ap: the target ata_port 5354 * @qc: qc on going 5355 * 5356 * RETURNS: 5357 * 1 if ok in workqueue, 0 otherwise. 5358 */ 5359 5360 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc) 5361 { 5362 if (qc->tf.flags & ATA_TFLAG_POLLING) 5363 return 1; 5364 5365 if (ap->hsm_task_state == HSM_ST_FIRST) { 5366 if (qc->tf.protocol == ATA_PROT_PIO && 5367 (qc->tf.flags & ATA_TFLAG_WRITE)) 5368 return 1; 5369 5370 if (is_atapi_taskfile(&qc->tf) && 5371 !(qc->dev->flags & ATA_DFLAG_CDB_INTR)) 5372 return 1; 5373 } 5374 5375 return 0; 5376 } 5377 5378 /** 5379 * ata_hsm_qc_complete - finish a qc running on standard HSM 5380 * @qc: Command to complete 5381 * @in_wq: 1 if called from workqueue, 0 otherwise 5382 * 5383 * Finish @qc which is running on standard HSM. 5384 * 5385 * LOCKING: 5386 * If @in_wq is zero, spin_lock_irqsave(host lock). 5387 * Otherwise, none on entry and grabs host lock. 5388 */ 5389 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq) 5390 { 5391 struct ata_port *ap = qc->ap; 5392 unsigned long flags; 5393 5394 if (ap->ops->error_handler) { 5395 if (in_wq) { 5396 spin_lock_irqsave(ap->lock, flags); 5397 5398 /* EH might have kicked in while host lock is 5399 * released. 5400 */ 5401 qc = ata_qc_from_tag(ap, qc->tag); 5402 if (qc) { 5403 if (likely(!(qc->err_mask & AC_ERR_HSM))) { 5404 ap->ops->irq_on(ap); 5405 ata_qc_complete(qc); 5406 } else 5407 ata_port_freeze(ap); 5408 } 5409 5410 spin_unlock_irqrestore(ap->lock, flags); 5411 } else { 5412 if (likely(!(qc->err_mask & AC_ERR_HSM))) 5413 ata_qc_complete(qc); 5414 else 5415 ata_port_freeze(ap); 5416 } 5417 } else { 5418 if (in_wq) { 5419 spin_lock_irqsave(ap->lock, flags); 5420 ap->ops->irq_on(ap); 5421 ata_qc_complete(qc); 5422 spin_unlock_irqrestore(ap->lock, flags); 5423 } else 5424 ata_qc_complete(qc); 5425 } 5426 } 5427 5428 /** 5429 * ata_hsm_move - move the HSM to the next state. 5430 * @ap: the target ata_port 5431 * @qc: qc on going 5432 * @status: current device status 5433 * @in_wq: 1 if called from workqueue, 0 otherwise 5434 * 5435 * RETURNS: 5436 * 1 when poll next status needed, 0 otherwise. 5437 */ 5438 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc, 5439 u8 status, int in_wq) 5440 { 5441 unsigned long flags = 0; 5442 int poll_next; 5443 5444 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0); 5445 5446 /* Make sure ata_qc_issue_prot() does not throw things 5447 * like DMA polling into the workqueue. Notice that 5448 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING). 5449 */ 5450 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc)); 5451 5452 fsm_start: 5453 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n", 5454 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status); 5455 5456 switch (ap->hsm_task_state) { 5457 case HSM_ST_FIRST: 5458 /* Send first data block or PACKET CDB */ 5459 5460 /* If polling, we will stay in the work queue after 5461 * sending the data. Otherwise, interrupt handler 5462 * takes over after sending the data. 5463 */ 5464 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING); 5465 5466 /* check device status */ 5467 if (unlikely((status & ATA_DRQ) == 0)) { 5468 /* handle BSY=0, DRQ=0 as error */ 5469 if (likely(status & (ATA_ERR | ATA_DF))) 5470 /* device stops HSM for abort/error */ 5471 qc->err_mask |= AC_ERR_DEV; 5472 else 5473 /* HSM violation. Let EH handle this */ 5474 qc->err_mask |= AC_ERR_HSM; 5475 5476 ap->hsm_task_state = HSM_ST_ERR; 5477 goto fsm_start; 5478 } 5479 5480 /* Device should not ask for data transfer (DRQ=1) 5481 * when it finds something wrong. 5482 * We ignore DRQ here and stop the HSM by 5483 * changing hsm_task_state to HSM_ST_ERR and 5484 * let the EH abort the command or reset the device. 5485 */ 5486 if (unlikely(status & (ATA_ERR | ATA_DF))) { 5487 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with device " 5488 "error, dev_stat 0x%X\n", status); 5489 qc->err_mask |= AC_ERR_HSM; 5490 ap->hsm_task_state = HSM_ST_ERR; 5491 goto fsm_start; 5492 } 5493 5494 /* Send the CDB (atapi) or the first data block (ata pio out). 5495 * During the state transition, interrupt handler shouldn't 5496 * be invoked before the data transfer is complete and 5497 * hsm_task_state is changed. Hence, the following locking. 5498 */ 5499 if (in_wq) 5500 spin_lock_irqsave(ap->lock, flags); 5501 5502 if (qc->tf.protocol == ATA_PROT_PIO) { 5503 /* PIO data out protocol. 5504 * send first data block. 5505 */ 5506 5507 /* ata_pio_sectors() might change the state 5508 * to HSM_ST_LAST. so, the state is changed here 5509 * before ata_pio_sectors(). 5510 */ 5511 ap->hsm_task_state = HSM_ST; 5512 ata_pio_sectors(qc); 5513 } else 5514 /* send CDB */ 5515 atapi_send_cdb(ap, qc); 5516 5517 if (in_wq) 5518 spin_unlock_irqrestore(ap->lock, flags); 5519 5520 /* if polling, ata_pio_task() handles the rest. 5521 * otherwise, interrupt handler takes over from here. 5522 */ 5523 break; 5524 5525 case HSM_ST: 5526 /* complete command or read/write the data register */ 5527 if (qc->tf.protocol == ATA_PROT_ATAPI) { 5528 /* ATAPI PIO protocol */ 5529 if ((status & ATA_DRQ) == 0) { 5530 /* No more data to transfer or device error. 5531 * Device error will be tagged in HSM_ST_LAST. 5532 */ 5533 ap->hsm_task_state = HSM_ST_LAST; 5534 goto fsm_start; 5535 } 5536 5537 /* Device should not ask for data transfer (DRQ=1) 5538 * when it finds something wrong. 5539 * We ignore DRQ here and stop the HSM by 5540 * changing hsm_task_state to HSM_ST_ERR and 5541 * let the EH abort the command or reset the device. 5542 */ 5543 if (unlikely(status & (ATA_ERR | ATA_DF))) { 5544 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with " 5545 "device error, dev_stat 0x%X\n", 5546 status); 5547 qc->err_mask |= AC_ERR_HSM; 5548 ap->hsm_task_state = HSM_ST_ERR; 5549 goto fsm_start; 5550 } 5551 5552 atapi_pio_bytes(qc); 5553 5554 if (unlikely(ap->hsm_task_state == HSM_ST_ERR)) 5555 /* bad ireason reported by device */ 5556 goto fsm_start; 5557 5558 } else { 5559 /* ATA PIO protocol */ 5560 if (unlikely((status & ATA_DRQ) == 0)) { 5561 /* handle BSY=0, DRQ=0 as error */ 5562 if (likely(status & (ATA_ERR | ATA_DF))) 5563 /* device stops HSM for abort/error */ 5564 qc->err_mask |= AC_ERR_DEV; 5565 else 5566 /* HSM violation. Let EH handle this. 5567 * Phantom devices also trigger this 5568 * condition. Mark hint. 5569 */ 5570 qc->err_mask |= AC_ERR_HSM | 5571 AC_ERR_NODEV_HINT; 5572 5573 ap->hsm_task_state = HSM_ST_ERR; 5574 goto fsm_start; 5575 } 5576 5577 /* For PIO reads, some devices may ask for 5578 * data transfer (DRQ=1) alone with ERR=1. 5579 * We respect DRQ here and transfer one 5580 * block of junk data before changing the 5581 * hsm_task_state to HSM_ST_ERR. 5582 * 5583 * For PIO writes, ERR=1 DRQ=1 doesn't make 5584 * sense since the data block has been 5585 * transferred to the device. 5586 */ 5587 if (unlikely(status & (ATA_ERR | ATA_DF))) { 5588 /* data might be corrputed */ 5589 qc->err_mask |= AC_ERR_DEV; 5590 5591 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) { 5592 ata_pio_sectors(qc); 5593 status = ata_wait_idle(ap); 5594 } 5595 5596 if (status & (ATA_BUSY | ATA_DRQ)) 5597 qc->err_mask |= AC_ERR_HSM; 5598 5599 /* ata_pio_sectors() might change the 5600 * state to HSM_ST_LAST. so, the state 5601 * is changed after ata_pio_sectors(). 5602 */ 5603 ap->hsm_task_state = HSM_ST_ERR; 5604 goto fsm_start; 5605 } 5606 5607 ata_pio_sectors(qc); 5608 5609 if (ap->hsm_task_state == HSM_ST_LAST && 5610 (!(qc->tf.flags & ATA_TFLAG_WRITE))) { 5611 /* all data read */ 5612 status = ata_wait_idle(ap); 5613 goto fsm_start; 5614 } 5615 } 5616 5617 poll_next = 1; 5618 break; 5619 5620 case HSM_ST_LAST: 5621 if (unlikely(!ata_ok(status))) { 5622 qc->err_mask |= __ac_err_mask(status); 5623 ap->hsm_task_state = HSM_ST_ERR; 5624 goto fsm_start; 5625 } 5626 5627 /* no more data to transfer */ 5628 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n", 5629 ap->print_id, qc->dev->devno, status); 5630 5631 WARN_ON(qc->err_mask); 5632 5633 ap->hsm_task_state = HSM_ST_IDLE; 5634 5635 /* complete taskfile transaction */ 5636 ata_hsm_qc_complete(qc, in_wq); 5637 5638 poll_next = 0; 5639 break; 5640 5641 case HSM_ST_ERR: 5642 /* make sure qc->err_mask is available to 5643 * know what's wrong and recover 5644 */ 5645 WARN_ON(qc->err_mask == 0); 5646 5647 ap->hsm_task_state = HSM_ST_IDLE; 5648 5649 /* complete taskfile transaction */ 5650 ata_hsm_qc_complete(qc, in_wq); 5651 5652 poll_next = 0; 5653 break; 5654 default: 5655 poll_next = 0; 5656 BUG(); 5657 } 5658 5659 return poll_next; 5660 } 5661 5662 static void ata_pio_task(struct work_struct *work) 5663 { 5664 struct ata_port *ap = 5665 container_of(work, struct ata_port, port_task.work); 5666 struct ata_queued_cmd *qc = ap->port_task_data; 5667 u8 status; 5668 int poll_next; 5669 5670 fsm_start: 5671 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE); 5672 5673 /* 5674 * This is purely heuristic. This is a fast path. 5675 * Sometimes when we enter, BSY will be cleared in 5676 * a chk-status or two. If not, the drive is probably seeking 5677 * or something. Snooze for a couple msecs, then 5678 * chk-status again. If still busy, queue delayed work. 5679 */ 5680 status = ata_busy_wait(ap, ATA_BUSY, 5); 5681 if (status & ATA_BUSY) { 5682 msleep(2); 5683 status = ata_busy_wait(ap, ATA_BUSY, 10); 5684 if (status & ATA_BUSY) { 5685 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE); 5686 return; 5687 } 5688 } 5689 5690 /* move the HSM */ 5691 poll_next = ata_hsm_move(ap, qc, status, 1); 5692 5693 /* another command or interrupt handler 5694 * may be running at this point. 5695 */ 5696 if (poll_next) 5697 goto fsm_start; 5698 } 5699 5700 /** 5701 * ata_qc_new - Request an available ATA command, for queueing 5702 * @ap: Port associated with device @dev 5703 * @dev: Device from whom we request an available command structure 5704 * 5705 * LOCKING: 5706 * None. 5707 */ 5708 5709 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) 5710 { 5711 struct ata_queued_cmd *qc = NULL; 5712 unsigned int i; 5713 5714 /* no command while frozen */ 5715 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN)) 5716 return NULL; 5717 5718 /* the last tag is reserved for internal command. */ 5719 for (i = 0; i < ATA_MAX_QUEUE - 1; i++) 5720 if (!test_and_set_bit(i, &ap->qc_allocated)) { 5721 qc = __ata_qc_from_tag(ap, i); 5722 break; 5723 } 5724 5725 if (qc) 5726 qc->tag = i; 5727 5728 return qc; 5729 } 5730 5731 /** 5732 * ata_qc_new_init - Request an available ATA command, and initialize it 5733 * @dev: Device from whom we request an available command structure 5734 * 5735 * LOCKING: 5736 * None. 5737 */ 5738 5739 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev) 5740 { 5741 struct ata_port *ap = dev->link->ap; 5742 struct ata_queued_cmd *qc; 5743 5744 qc = ata_qc_new(ap); 5745 if (qc) { 5746 qc->scsicmd = NULL; 5747 qc->ap = ap; 5748 qc->dev = dev; 5749 5750 ata_qc_reinit(qc); 5751 } 5752 5753 return qc; 5754 } 5755 5756 /** 5757 * ata_qc_free - free unused ata_queued_cmd 5758 * @qc: Command to complete 5759 * 5760 * Designed to free unused ata_queued_cmd object 5761 * in case something prevents using it. 5762 * 5763 * LOCKING: 5764 * spin_lock_irqsave(host lock) 5765 */ 5766 void ata_qc_free(struct ata_queued_cmd *qc) 5767 { 5768 struct ata_port *ap = qc->ap; 5769 unsigned int tag; 5770 5771 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ 5772 5773 qc->flags = 0; 5774 tag = qc->tag; 5775 if (likely(ata_tag_valid(tag))) { 5776 qc->tag = ATA_TAG_POISON; 5777 clear_bit(tag, &ap->qc_allocated); 5778 } 5779 } 5780 5781 void __ata_qc_complete(struct ata_queued_cmd *qc) 5782 { 5783 struct ata_port *ap = qc->ap; 5784 struct ata_link *link = qc->dev->link; 5785 5786 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ 5787 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE)); 5788 5789 if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) 5790 ata_sg_clean(qc); 5791 5792 /* command should be marked inactive atomically with qc completion */ 5793 if (qc->tf.protocol == ATA_PROT_NCQ) { 5794 link->sactive &= ~(1 << qc->tag); 5795 if (!link->sactive) 5796 ap->nr_active_links--; 5797 } else { 5798 link->active_tag = ATA_TAG_POISON; 5799 ap->nr_active_links--; 5800 } 5801 5802 /* clear exclusive status */ 5803 if (unlikely(qc->flags & ATA_QCFLAG_CLEAR_EXCL && 5804 ap->excl_link == link)) 5805 ap->excl_link = NULL; 5806 5807 /* atapi: mark qc as inactive to prevent the interrupt handler 5808 * from completing the command twice later, before the error handler 5809 * is called. (when rc != 0 and atapi request sense is needed) 5810 */ 5811 qc->flags &= ~ATA_QCFLAG_ACTIVE; 5812 ap->qc_active &= ~(1 << qc->tag); 5813 5814 /* call completion callback */ 5815 qc->complete_fn(qc); 5816 } 5817 5818 static void fill_result_tf(struct ata_queued_cmd *qc) 5819 { 5820 struct ata_port *ap = qc->ap; 5821 5822 qc->result_tf.flags = qc->tf.flags; 5823 ap->ops->tf_read(ap, &qc->result_tf); 5824 } 5825 5826 /** 5827 * ata_qc_complete - Complete an active ATA command 5828 * @qc: Command to complete 5829 * @err_mask: ATA Status register contents 5830 * 5831 * Indicate to the mid and upper layers that an ATA 5832 * command has completed, with either an ok or not-ok status. 5833 * 5834 * LOCKING: 5835 * spin_lock_irqsave(host lock) 5836 */ 5837 void ata_qc_complete(struct ata_queued_cmd *qc) 5838 { 5839 struct ata_port *ap = qc->ap; 5840 5841 /* XXX: New EH and old EH use different mechanisms to 5842 * synchronize EH with regular execution path. 5843 * 5844 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED. 5845 * Normal execution path is responsible for not accessing a 5846 * failed qc. libata core enforces the rule by returning NULL 5847 * from ata_qc_from_tag() for failed qcs. 5848 * 5849 * Old EH depends on ata_qc_complete() nullifying completion 5850 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does 5851 * not synchronize with interrupt handler. Only PIO task is 5852 * taken care of. 5853 */ 5854 if (ap->ops->error_handler) { 5855 struct ata_device *dev = qc->dev; 5856 struct ata_eh_info *ehi = &dev->link->eh_info; 5857 5858 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN); 5859 5860 if (unlikely(qc->err_mask)) 5861 qc->flags |= ATA_QCFLAG_FAILED; 5862 5863 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) { 5864 if (!ata_tag_internal(qc->tag)) { 5865 /* always fill result TF for failed qc */ 5866 fill_result_tf(qc); 5867 ata_qc_schedule_eh(qc); 5868 return; 5869 } 5870 } 5871 5872 /* read result TF if requested */ 5873 if (qc->flags & ATA_QCFLAG_RESULT_TF) 5874 fill_result_tf(qc); 5875 5876 /* Some commands need post-processing after successful 5877 * completion. 5878 */ 5879 switch (qc->tf.command) { 5880 case ATA_CMD_SET_FEATURES: 5881 if (qc->tf.feature != SETFEATURES_WC_ON && 5882 qc->tf.feature != SETFEATURES_WC_OFF) 5883 break; 5884 /* fall through */ 5885 case ATA_CMD_INIT_DEV_PARAMS: /* CHS translation changed */ 5886 case ATA_CMD_SET_MULTI: /* multi_count changed */ 5887 /* revalidate device */ 5888 ehi->dev_action[dev->devno] |= ATA_EH_REVALIDATE; 5889 ata_port_schedule_eh(ap); 5890 break; 5891 5892 case ATA_CMD_SLEEP: 5893 dev->flags |= ATA_DFLAG_SLEEPING; 5894 break; 5895 } 5896 5897 __ata_qc_complete(qc); 5898 } else { 5899 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED) 5900 return; 5901 5902 /* read result TF if failed or requested */ 5903 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF) 5904 fill_result_tf(qc); 5905 5906 __ata_qc_complete(qc); 5907 } 5908 } 5909 5910 /** 5911 * ata_qc_complete_multiple - Complete multiple qcs successfully 5912 * @ap: port in question 5913 * @qc_active: new qc_active mask 5914 * @finish_qc: LLDD callback invoked before completing a qc 5915 * 5916 * Complete in-flight commands. This functions is meant to be 5917 * called from low-level driver's interrupt routine to complete 5918 * requests normally. ap->qc_active and @qc_active is compared 5919 * and commands are completed accordingly. 5920 * 5921 * LOCKING: 5922 * spin_lock_irqsave(host lock) 5923 * 5924 * RETURNS: 5925 * Number of completed commands on success, -errno otherwise. 5926 */ 5927 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active, 5928 void (*finish_qc)(struct ata_queued_cmd *)) 5929 { 5930 int nr_done = 0; 5931 u32 done_mask; 5932 int i; 5933 5934 done_mask = ap->qc_active ^ qc_active; 5935 5936 if (unlikely(done_mask & qc_active)) { 5937 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition " 5938 "(%08x->%08x)\n", ap->qc_active, qc_active); 5939 return -EINVAL; 5940 } 5941 5942 for (i = 0; i < ATA_MAX_QUEUE; i++) { 5943 struct ata_queued_cmd *qc; 5944 5945 if (!(done_mask & (1 << i))) 5946 continue; 5947 5948 if ((qc = ata_qc_from_tag(ap, i))) { 5949 if (finish_qc) 5950 finish_qc(qc); 5951 ata_qc_complete(qc); 5952 nr_done++; 5953 } 5954 } 5955 5956 return nr_done; 5957 } 5958 5959 static inline int ata_should_dma_map(struct ata_queued_cmd *qc) 5960 { 5961 struct ata_port *ap = qc->ap; 5962 5963 switch (qc->tf.protocol) { 5964 case ATA_PROT_NCQ: 5965 case ATA_PROT_DMA: 5966 case ATA_PROT_ATAPI_DMA: 5967 return 1; 5968 5969 case ATA_PROT_ATAPI: 5970 case ATA_PROT_PIO: 5971 if (ap->flags & ATA_FLAG_PIO_DMA) 5972 return 1; 5973 5974 /* fall through */ 5975 5976 default: 5977 return 0; 5978 } 5979 5980 /* never reached */ 5981 } 5982 5983 /** 5984 * ata_qc_issue - issue taskfile to device 5985 * @qc: command to issue to device 5986 * 5987 * Prepare an ATA command to submission to device. 5988 * This includes mapping the data into a DMA-able 5989 * area, filling in the S/G table, and finally 5990 * writing the taskfile to hardware, starting the command. 5991 * 5992 * LOCKING: 5993 * spin_lock_irqsave(host lock) 5994 */ 5995 void ata_qc_issue(struct ata_queued_cmd *qc) 5996 { 5997 struct ata_port *ap = qc->ap; 5998 struct ata_link *link = qc->dev->link; 5999 6000 /* Make sure only one non-NCQ command is outstanding. The 6001 * check is skipped for old EH because it reuses active qc to 6002 * request ATAPI sense. 6003 */ 6004 WARN_ON(ap->ops->error_handler && ata_tag_valid(link->active_tag)); 6005 6006 if (qc->tf.protocol == ATA_PROT_NCQ) { 6007 WARN_ON(link->sactive & (1 << qc->tag)); 6008 6009 if (!link->sactive) 6010 ap->nr_active_links++; 6011 link->sactive |= 1 << qc->tag; 6012 } else { 6013 WARN_ON(link->sactive); 6014 6015 ap->nr_active_links++; 6016 link->active_tag = qc->tag; 6017 } 6018 6019 qc->flags |= ATA_QCFLAG_ACTIVE; 6020 ap->qc_active |= 1 << qc->tag; 6021 6022 if (ata_should_dma_map(qc)) { 6023 if (qc->flags & ATA_QCFLAG_SG) { 6024 if (ata_sg_setup(qc)) 6025 goto sg_err; 6026 } else if (qc->flags & ATA_QCFLAG_SINGLE) { 6027 if (ata_sg_setup_one(qc)) 6028 goto sg_err; 6029 } 6030 } else { 6031 qc->flags &= ~ATA_QCFLAG_DMAMAP; 6032 } 6033 6034 /* if device is sleeping, schedule softreset and abort the link */ 6035 if (unlikely(qc->dev->flags & ATA_DFLAG_SLEEPING)) { 6036 link->eh_info.action |= ATA_EH_SOFTRESET; 6037 ata_ehi_push_desc(&link->eh_info, "waking up from sleep"); 6038 ata_link_abort(link); 6039 return; 6040 } 6041 6042 ap->ops->qc_prep(qc); 6043 6044 qc->err_mask |= ap->ops->qc_issue(qc); 6045 if (unlikely(qc->err_mask)) 6046 goto err; 6047 return; 6048 6049 sg_err: 6050 qc->flags &= ~ATA_QCFLAG_DMAMAP; 6051 qc->err_mask |= AC_ERR_SYSTEM; 6052 err: 6053 ata_qc_complete(qc); 6054 } 6055 6056 /** 6057 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner 6058 * @qc: command to issue to device 6059 * 6060 * Using various libata functions and hooks, this function 6061 * starts an ATA command. ATA commands are grouped into 6062 * classes called "protocols", and issuing each type of protocol 6063 * is slightly different. 6064 * 6065 * May be used as the qc_issue() entry in ata_port_operations. 6066 * 6067 * LOCKING: 6068 * spin_lock_irqsave(host lock) 6069 * 6070 * RETURNS: 6071 * Zero on success, AC_ERR_* mask on failure 6072 */ 6073 6074 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc) 6075 { 6076 struct ata_port *ap = qc->ap; 6077 6078 /* Use polling pio if the LLD doesn't handle 6079 * interrupt driven pio and atapi CDB interrupt. 6080 */ 6081 if (ap->flags & ATA_FLAG_PIO_POLLING) { 6082 switch (qc->tf.protocol) { 6083 case ATA_PROT_PIO: 6084 case ATA_PROT_NODATA: 6085 case ATA_PROT_ATAPI: 6086 case ATA_PROT_ATAPI_NODATA: 6087 qc->tf.flags |= ATA_TFLAG_POLLING; 6088 break; 6089 case ATA_PROT_ATAPI_DMA: 6090 if (qc->dev->flags & ATA_DFLAG_CDB_INTR) 6091 /* see ata_dma_blacklisted() */ 6092 BUG(); 6093 break; 6094 default: 6095 break; 6096 } 6097 } 6098 6099 /* select the device */ 6100 ata_dev_select(ap, qc->dev->devno, 1, 0); 6101 6102 /* start the command */ 6103 switch (qc->tf.protocol) { 6104 case ATA_PROT_NODATA: 6105 if (qc->tf.flags & ATA_TFLAG_POLLING) 6106 ata_qc_set_polling(qc); 6107 6108 ata_tf_to_host(ap, &qc->tf); 6109 ap->hsm_task_state = HSM_ST_LAST; 6110 6111 if (qc->tf.flags & ATA_TFLAG_POLLING) 6112 ata_port_queue_task(ap, ata_pio_task, qc, 0); 6113 6114 break; 6115 6116 case ATA_PROT_DMA: 6117 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); 6118 6119 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ 6120 ap->ops->bmdma_setup(qc); /* set up bmdma */ 6121 ap->ops->bmdma_start(qc); /* initiate bmdma */ 6122 ap->hsm_task_state = HSM_ST_LAST; 6123 break; 6124 6125 case ATA_PROT_PIO: 6126 if (qc->tf.flags & ATA_TFLAG_POLLING) 6127 ata_qc_set_polling(qc); 6128 6129 ata_tf_to_host(ap, &qc->tf); 6130 6131 if (qc->tf.flags & ATA_TFLAG_WRITE) { 6132 /* PIO data out protocol */ 6133 ap->hsm_task_state = HSM_ST_FIRST; 6134 ata_port_queue_task(ap, ata_pio_task, qc, 0); 6135 6136 /* always send first data block using 6137 * the ata_pio_task() codepath. 6138 */ 6139 } else { 6140 /* PIO data in protocol */ 6141 ap->hsm_task_state = HSM_ST; 6142 6143 if (qc->tf.flags & ATA_TFLAG_POLLING) 6144 ata_port_queue_task(ap, ata_pio_task, qc, 0); 6145 6146 /* if polling, ata_pio_task() handles the rest. 6147 * otherwise, interrupt handler takes over from here. 6148 */ 6149 } 6150 6151 break; 6152 6153 case ATA_PROT_ATAPI: 6154 case ATA_PROT_ATAPI_NODATA: 6155 if (qc->tf.flags & ATA_TFLAG_POLLING) 6156 ata_qc_set_polling(qc); 6157 6158 ata_tf_to_host(ap, &qc->tf); 6159 6160 ap->hsm_task_state = HSM_ST_FIRST; 6161 6162 /* send cdb by polling if no cdb interrupt */ 6163 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) || 6164 (qc->tf.flags & ATA_TFLAG_POLLING)) 6165 ata_port_queue_task(ap, ata_pio_task, qc, 0); 6166 break; 6167 6168 case ATA_PROT_ATAPI_DMA: 6169 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); 6170 6171 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ 6172 ap->ops->bmdma_setup(qc); /* set up bmdma */ 6173 ap->hsm_task_state = HSM_ST_FIRST; 6174 6175 /* send cdb by polling if no cdb interrupt */ 6176 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) 6177 ata_port_queue_task(ap, ata_pio_task, qc, 0); 6178 break; 6179 6180 default: 6181 WARN_ON(1); 6182 return AC_ERR_SYSTEM; 6183 } 6184 6185 return 0; 6186 } 6187 6188 /** 6189 * ata_host_intr - Handle host interrupt for given (port, task) 6190 * @ap: Port on which interrupt arrived (possibly...) 6191 * @qc: Taskfile currently active in engine 6192 * 6193 * Handle host interrupt for given queued command. Currently, 6194 * only DMA interrupts are handled. All other commands are 6195 * handled via polling with interrupts disabled (nIEN bit). 6196 * 6197 * LOCKING: 6198 * spin_lock_irqsave(host lock) 6199 * 6200 * RETURNS: 6201 * One if interrupt was handled, zero if not (shared irq). 6202 */ 6203 6204 inline unsigned int ata_host_intr(struct ata_port *ap, 6205 struct ata_queued_cmd *qc) 6206 { 6207 struct ata_eh_info *ehi = &ap->link.eh_info; 6208 u8 status, host_stat = 0; 6209 6210 VPRINTK("ata%u: protocol %d task_state %d\n", 6211 ap->print_id, qc->tf.protocol, ap->hsm_task_state); 6212 6213 /* Check whether we are expecting interrupt in this state */ 6214 switch (ap->hsm_task_state) { 6215 case HSM_ST_FIRST: 6216 /* Some pre-ATAPI-4 devices assert INTRQ 6217 * at this state when ready to receive CDB. 6218 */ 6219 6220 /* Check the ATA_DFLAG_CDB_INTR flag is enough here. 6221 * The flag was turned on only for atapi devices. 6222 * No need to check is_atapi_taskfile(&qc->tf) again. 6223 */ 6224 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) 6225 goto idle_irq; 6226 break; 6227 case HSM_ST_LAST: 6228 if (qc->tf.protocol == ATA_PROT_DMA || 6229 qc->tf.protocol == ATA_PROT_ATAPI_DMA) { 6230 /* check status of DMA engine */ 6231 host_stat = ap->ops->bmdma_status(ap); 6232 VPRINTK("ata%u: host_stat 0x%X\n", 6233 ap->print_id, host_stat); 6234 6235 /* if it's not our irq... */ 6236 if (!(host_stat & ATA_DMA_INTR)) 6237 goto idle_irq; 6238 6239 /* before we do anything else, clear DMA-Start bit */ 6240 ap->ops->bmdma_stop(qc); 6241 6242 if (unlikely(host_stat & ATA_DMA_ERR)) { 6243 /* error when transfering data to/from memory */ 6244 qc->err_mask |= AC_ERR_HOST_BUS; 6245 ap->hsm_task_state = HSM_ST_ERR; 6246 } 6247 } 6248 break; 6249 case HSM_ST: 6250 break; 6251 default: 6252 goto idle_irq; 6253 } 6254 6255 /* check altstatus */ 6256 status = ata_altstatus(ap); 6257 if (status & ATA_BUSY) 6258 goto idle_irq; 6259 6260 /* check main status, clearing INTRQ */ 6261 status = ata_chk_status(ap); 6262 if (unlikely(status & ATA_BUSY)) 6263 goto idle_irq; 6264 6265 /* ack bmdma irq events */ 6266 ap->ops->irq_clear(ap); 6267 6268 ata_hsm_move(ap, qc, status, 0); 6269 6270 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA || 6271 qc->tf.protocol == ATA_PROT_ATAPI_DMA)) 6272 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat); 6273 6274 return 1; /* irq handled */ 6275 6276 idle_irq: 6277 ap->stats.idle_irq++; 6278 6279 #ifdef ATA_IRQ_TRAP 6280 if ((ap->stats.idle_irq % 1000) == 0) { 6281 ata_chk_status(ap); 6282 ap->ops->irq_clear(ap); 6283 ata_port_printk(ap, KERN_WARNING, "irq trap\n"); 6284 return 1; 6285 } 6286 #endif 6287 return 0; /* irq not handled */ 6288 } 6289 6290 /** 6291 * ata_interrupt - Default ATA host interrupt handler 6292 * @irq: irq line (unused) 6293 * @dev_instance: pointer to our ata_host information structure 6294 * 6295 * Default interrupt handler for PCI IDE devices. Calls 6296 * ata_host_intr() for each port that is not disabled. 6297 * 6298 * LOCKING: 6299 * Obtains host lock during operation. 6300 * 6301 * RETURNS: 6302 * IRQ_NONE or IRQ_HANDLED. 6303 */ 6304 6305 irqreturn_t ata_interrupt(int irq, void *dev_instance) 6306 { 6307 struct ata_host *host = dev_instance; 6308 unsigned int i; 6309 unsigned int handled = 0; 6310 unsigned long flags; 6311 6312 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ 6313 spin_lock_irqsave(&host->lock, flags); 6314 6315 for (i = 0; i < host->n_ports; i++) { 6316 struct ata_port *ap; 6317 6318 ap = host->ports[i]; 6319 if (ap && 6320 !(ap->flags & ATA_FLAG_DISABLED)) { 6321 struct ata_queued_cmd *qc; 6322 6323 qc = ata_qc_from_tag(ap, ap->link.active_tag); 6324 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && 6325 (qc->flags & ATA_QCFLAG_ACTIVE)) 6326 handled |= ata_host_intr(ap, qc); 6327 } 6328 } 6329 6330 spin_unlock_irqrestore(&host->lock, flags); 6331 6332 return IRQ_RETVAL(handled); 6333 } 6334 6335 /** 6336 * sata_scr_valid - test whether SCRs are accessible 6337 * @link: ATA link to test SCR accessibility for 6338 * 6339 * Test whether SCRs are accessible for @link. 6340 * 6341 * LOCKING: 6342 * None. 6343 * 6344 * RETURNS: 6345 * 1 if SCRs are accessible, 0 otherwise. 6346 */ 6347 int sata_scr_valid(struct ata_link *link) 6348 { 6349 struct ata_port *ap = link->ap; 6350 6351 return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read; 6352 } 6353 6354 /** 6355 * sata_scr_read - read SCR register of the specified port 6356 * @link: ATA link to read SCR for 6357 * @reg: SCR to read 6358 * @val: Place to store read value 6359 * 6360 * Read SCR register @reg of @link into *@val. This function is 6361 * guaranteed to succeed if @link is ap->link, the cable type of 6362 * the port is SATA and the port implements ->scr_read. 6363 * 6364 * LOCKING: 6365 * None if @link is ap->link. Kernel thread context otherwise. 6366 * 6367 * RETURNS: 6368 * 0 on success, negative errno on failure. 6369 */ 6370 int sata_scr_read(struct ata_link *link, int reg, u32 *val) 6371 { 6372 if (ata_is_host_link(link)) { 6373 struct ata_port *ap = link->ap; 6374 6375 if (sata_scr_valid(link)) 6376 return ap->ops->scr_read(ap, reg, val); 6377 return -EOPNOTSUPP; 6378 } 6379 6380 return sata_pmp_scr_read(link, reg, val); 6381 } 6382 6383 /** 6384 * sata_scr_write - write SCR register of the specified port 6385 * @link: ATA link to write SCR for 6386 * @reg: SCR to write 6387 * @val: value to write 6388 * 6389 * Write @val to SCR register @reg of @link. This function is 6390 * guaranteed to succeed if @link is ap->link, the cable type of 6391 * the port is SATA and the port implements ->scr_read. 6392 * 6393 * LOCKING: 6394 * None if @link is ap->link. Kernel thread context otherwise. 6395 * 6396 * RETURNS: 6397 * 0 on success, negative errno on failure. 6398 */ 6399 int sata_scr_write(struct ata_link *link, int reg, u32 val) 6400 { 6401 if (ata_is_host_link(link)) { 6402 struct ata_port *ap = link->ap; 6403 6404 if (sata_scr_valid(link)) 6405 return ap->ops->scr_write(ap, reg, val); 6406 return -EOPNOTSUPP; 6407 } 6408 6409 return sata_pmp_scr_write(link, reg, val); 6410 } 6411 6412 /** 6413 * sata_scr_write_flush - write SCR register of the specified port and flush 6414 * @link: ATA link to write SCR for 6415 * @reg: SCR to write 6416 * @val: value to write 6417 * 6418 * This function is identical to sata_scr_write() except that this 6419 * function performs flush after writing to the register. 6420 * 6421 * LOCKING: 6422 * None if @link is ap->link. Kernel thread context otherwise. 6423 * 6424 * RETURNS: 6425 * 0 on success, negative errno on failure. 6426 */ 6427 int sata_scr_write_flush(struct ata_link *link, int reg, u32 val) 6428 { 6429 if (ata_is_host_link(link)) { 6430 struct ata_port *ap = link->ap; 6431 int rc; 6432 6433 if (sata_scr_valid(link)) { 6434 rc = ap->ops->scr_write(ap, reg, val); 6435 if (rc == 0) 6436 rc = ap->ops->scr_read(ap, reg, &val); 6437 return rc; 6438 } 6439 return -EOPNOTSUPP; 6440 } 6441 6442 return sata_pmp_scr_write(link, reg, val); 6443 } 6444 6445 /** 6446 * ata_link_online - test whether the given link is online 6447 * @link: ATA link to test 6448 * 6449 * Test whether @link is online. Note that this function returns 6450 * 0 if online status of @link cannot be obtained, so 6451 * ata_link_online(link) != !ata_link_offline(link). 6452 * 6453 * LOCKING: 6454 * None. 6455 * 6456 * RETURNS: 6457 * 1 if the port online status is available and online. 6458 */ 6459 int ata_link_online(struct ata_link *link) 6460 { 6461 u32 sstatus; 6462 6463 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 && 6464 (sstatus & 0xf) == 0x3) 6465 return 1; 6466 return 0; 6467 } 6468 6469 /** 6470 * ata_link_offline - test whether the given link is offline 6471 * @link: ATA link to test 6472 * 6473 * Test whether @link is offline. Note that this function 6474 * returns 0 if offline status of @link cannot be obtained, so 6475 * ata_link_online(link) != !ata_link_offline(link). 6476 * 6477 * LOCKING: 6478 * None. 6479 * 6480 * RETURNS: 6481 * 1 if the port offline status is available and offline. 6482 */ 6483 int ata_link_offline(struct ata_link *link) 6484 { 6485 u32 sstatus; 6486 6487 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 && 6488 (sstatus & 0xf) != 0x3) 6489 return 1; 6490 return 0; 6491 } 6492 6493 int ata_flush_cache(struct ata_device *dev) 6494 { 6495 unsigned int err_mask; 6496 u8 cmd; 6497 6498 if (!ata_try_flush_cache(dev)) 6499 return 0; 6500 6501 if (dev->flags & ATA_DFLAG_FLUSH_EXT) 6502 cmd = ATA_CMD_FLUSH_EXT; 6503 else 6504 cmd = ATA_CMD_FLUSH; 6505 6506 /* This is wrong. On a failed flush we get back the LBA of the lost 6507 sector and we should (assuming it wasn't aborted as unknown) issue 6508 a further flush command to continue the writeback until it 6509 does not error */ 6510 err_mask = ata_do_simple_cmd(dev, cmd); 6511 if (err_mask) { 6512 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n"); 6513 return -EIO; 6514 } 6515 6516 return 0; 6517 } 6518 6519 #ifdef CONFIG_PM 6520 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg, 6521 unsigned int action, unsigned int ehi_flags, 6522 int wait) 6523 { 6524 unsigned long flags; 6525 int i, rc; 6526 6527 for (i = 0; i < host->n_ports; i++) { 6528 struct ata_port *ap = host->ports[i]; 6529 struct ata_link *link; 6530 6531 /* Previous resume operation might still be in 6532 * progress. Wait for PM_PENDING to clear. 6533 */ 6534 if (ap->pflags & ATA_PFLAG_PM_PENDING) { 6535 ata_port_wait_eh(ap); 6536 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); 6537 } 6538 6539 /* request PM ops to EH */ 6540 spin_lock_irqsave(ap->lock, flags); 6541 6542 ap->pm_mesg = mesg; 6543 if (wait) { 6544 rc = 0; 6545 ap->pm_result = &rc; 6546 } 6547 6548 ap->pflags |= ATA_PFLAG_PM_PENDING; 6549 __ata_port_for_each_link(link, ap) { 6550 link->eh_info.action |= action; 6551 link->eh_info.flags |= ehi_flags; 6552 } 6553 6554 ata_port_schedule_eh(ap); 6555 6556 spin_unlock_irqrestore(ap->lock, flags); 6557 6558 /* wait and check result */ 6559 if (wait) { 6560 ata_port_wait_eh(ap); 6561 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); 6562 if (rc) 6563 return rc; 6564 } 6565 } 6566 6567 return 0; 6568 } 6569 6570 /** 6571 * ata_host_suspend - suspend host 6572 * @host: host to suspend 6573 * @mesg: PM message 6574 * 6575 * Suspend @host. Actual operation is performed by EH. This 6576 * function requests EH to perform PM operations and waits for EH 6577 * to finish. 6578 * 6579 * LOCKING: 6580 * Kernel thread context (may sleep). 6581 * 6582 * RETURNS: 6583 * 0 on success, -errno on failure. 6584 */ 6585 int ata_host_suspend(struct ata_host *host, pm_message_t mesg) 6586 { 6587 int rc; 6588 6589 /* 6590 * disable link pm on all ports before requesting 6591 * any pm activity 6592 */ 6593 ata_lpm_enable(host); 6594 6595 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1); 6596 if (rc == 0) 6597 host->dev->power.power_state = mesg; 6598 return rc; 6599 } 6600 6601 /** 6602 * ata_host_resume - resume host 6603 * @host: host to resume 6604 * 6605 * Resume @host. Actual operation is performed by EH. This 6606 * function requests EH to perform PM operations and returns. 6607 * Note that all resume operations are performed parallely. 6608 * 6609 * LOCKING: 6610 * Kernel thread context (may sleep). 6611 */ 6612 void ata_host_resume(struct ata_host *host) 6613 { 6614 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET, 6615 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0); 6616 host->dev->power.power_state = PMSG_ON; 6617 6618 /* reenable link pm */ 6619 ata_lpm_disable(host); 6620 } 6621 #endif 6622 6623 /** 6624 * ata_port_start - Set port up for dma. 6625 * @ap: Port to initialize 6626 * 6627 * Called just after data structures for each port are 6628 * initialized. Allocates space for PRD table. 6629 * 6630 * May be used as the port_start() entry in ata_port_operations. 6631 * 6632 * LOCKING: 6633 * Inherited from caller. 6634 */ 6635 int ata_port_start(struct ata_port *ap) 6636 { 6637 struct device *dev = ap->dev; 6638 int rc; 6639 6640 ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, 6641 GFP_KERNEL); 6642 if (!ap->prd) 6643 return -ENOMEM; 6644 6645 rc = ata_pad_alloc(ap, dev); 6646 if (rc) 6647 return rc; 6648 6649 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, 6650 (unsigned long long)ap->prd_dma); 6651 return 0; 6652 } 6653 6654 /** 6655 * ata_dev_init - Initialize an ata_device structure 6656 * @dev: Device structure to initialize 6657 * 6658 * Initialize @dev in preparation for probing. 6659 * 6660 * LOCKING: 6661 * Inherited from caller. 6662 */ 6663 void ata_dev_init(struct ata_device *dev) 6664 { 6665 struct ata_link *link = dev->link; 6666 struct ata_port *ap = link->ap; 6667 unsigned long flags; 6668 6669 /* SATA spd limit is bound to the first device */ 6670 link->sata_spd_limit = link->hw_sata_spd_limit; 6671 link->sata_spd = 0; 6672 6673 /* High bits of dev->flags are used to record warm plug 6674 * requests which occur asynchronously. Synchronize using 6675 * host lock. 6676 */ 6677 spin_lock_irqsave(ap->lock, flags); 6678 dev->flags &= ~ATA_DFLAG_INIT_MASK; 6679 dev->horkage = 0; 6680 spin_unlock_irqrestore(ap->lock, flags); 6681 6682 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0, 6683 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET); 6684 dev->pio_mask = UINT_MAX; 6685 dev->mwdma_mask = UINT_MAX; 6686 dev->udma_mask = UINT_MAX; 6687 } 6688 6689 /** 6690 * ata_link_init - Initialize an ata_link structure 6691 * @ap: ATA port link is attached to 6692 * @link: Link structure to initialize 6693 * @pmp: Port multiplier port number 6694 * 6695 * Initialize @link. 6696 * 6697 * LOCKING: 6698 * Kernel thread context (may sleep) 6699 */ 6700 void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp) 6701 { 6702 int i; 6703 6704 /* clear everything except for devices */ 6705 memset(link, 0, offsetof(struct ata_link, device[0])); 6706 6707 link->ap = ap; 6708 link->pmp = pmp; 6709 link->active_tag = ATA_TAG_POISON; 6710 link->hw_sata_spd_limit = UINT_MAX; 6711 6712 /* can't use iterator, ap isn't initialized yet */ 6713 for (i = 0; i < ATA_MAX_DEVICES; i++) { 6714 struct ata_device *dev = &link->device[i]; 6715 6716 dev->link = link; 6717 dev->devno = dev - link->device; 6718 ata_dev_init(dev); 6719 } 6720 } 6721 6722 /** 6723 * sata_link_init_spd - Initialize link->sata_spd_limit 6724 * @link: Link to configure sata_spd_limit for 6725 * 6726 * Initialize @link->[hw_]sata_spd_limit to the currently 6727 * configured value. 6728 * 6729 * LOCKING: 6730 * Kernel thread context (may sleep). 6731 * 6732 * RETURNS: 6733 * 0 on success, -errno on failure. 6734 */ 6735 int sata_link_init_spd(struct ata_link *link) 6736 { 6737 u32 scontrol, spd; 6738 int rc; 6739 6740 rc = sata_scr_read(link, SCR_CONTROL, &scontrol); 6741 if (rc) 6742 return rc; 6743 6744 spd = (scontrol >> 4) & 0xf; 6745 if (spd) 6746 link->hw_sata_spd_limit &= (1 << spd) - 1; 6747 6748 link->sata_spd_limit = link->hw_sata_spd_limit; 6749 6750 return 0; 6751 } 6752 6753 /** 6754 * ata_port_alloc - allocate and initialize basic ATA port resources 6755 * @host: ATA host this allocated port belongs to 6756 * 6757 * Allocate and initialize basic ATA port resources. 6758 * 6759 * RETURNS: 6760 * Allocate ATA port on success, NULL on failure. 6761 * 6762 * LOCKING: 6763 * Inherited from calling layer (may sleep). 6764 */ 6765 struct ata_port *ata_port_alloc(struct ata_host *host) 6766 { 6767 struct ata_port *ap; 6768 6769 DPRINTK("ENTER\n"); 6770 6771 ap = kzalloc(sizeof(*ap), GFP_KERNEL); 6772 if (!ap) 6773 return NULL; 6774 6775 ap->pflags |= ATA_PFLAG_INITIALIZING; 6776 ap->lock = &host->lock; 6777 ap->flags = ATA_FLAG_DISABLED; 6778 ap->print_id = -1; 6779 ap->ctl = ATA_DEVCTL_OBS; 6780 ap->host = host; 6781 ap->dev = host->dev; 6782 ap->last_ctl = 0xFF; 6783 6784 #if defined(ATA_VERBOSE_DEBUG) 6785 /* turn on all debugging levels */ 6786 ap->msg_enable = 0x00FF; 6787 #elif defined(ATA_DEBUG) 6788 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR; 6789 #else 6790 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN; 6791 #endif 6792 6793 INIT_DELAYED_WORK(&ap->port_task, NULL); 6794 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug); 6795 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan); 6796 INIT_LIST_HEAD(&ap->eh_done_q); 6797 init_waitqueue_head(&ap->eh_wait_q); 6798 init_timer_deferrable(&ap->fastdrain_timer); 6799 ap->fastdrain_timer.function = ata_eh_fastdrain_timerfn; 6800 ap->fastdrain_timer.data = (unsigned long)ap; 6801 6802 ap->cbl = ATA_CBL_NONE; 6803 6804 ata_link_init(ap, &ap->link, 0); 6805 6806 #ifdef ATA_IRQ_TRAP 6807 ap->stats.unhandled_irq = 1; 6808 ap->stats.idle_irq = 1; 6809 #endif 6810 return ap; 6811 } 6812 6813 static void ata_host_release(struct device *gendev, void *res) 6814 { 6815 struct ata_host *host = dev_get_drvdata(gendev); 6816 int i; 6817 6818 for (i = 0; i < host->n_ports; i++) { 6819 struct ata_port *ap = host->ports[i]; 6820 6821 if (!ap) 6822 continue; 6823 6824 if ((host->flags & ATA_HOST_STARTED) && ap->ops->port_stop) 6825 ap->ops->port_stop(ap); 6826 } 6827 6828 if ((host->flags & ATA_HOST_STARTED) && host->ops->host_stop) 6829 host->ops->host_stop(host); 6830 6831 for (i = 0; i < host->n_ports; i++) { 6832 struct ata_port *ap = host->ports[i]; 6833 6834 if (!ap) 6835 continue; 6836 6837 if (ap->scsi_host) 6838 scsi_host_put(ap->scsi_host); 6839 6840 kfree(ap->pmp_link); 6841 kfree(ap); 6842 host->ports[i] = NULL; 6843 } 6844 6845 dev_set_drvdata(gendev, NULL); 6846 } 6847 6848 /** 6849 * ata_host_alloc - allocate and init basic ATA host resources 6850 * @dev: generic device this host is associated with 6851 * @max_ports: maximum number of ATA ports associated with this host 6852 * 6853 * Allocate and initialize basic ATA host resources. LLD calls 6854 * this function to allocate a host, initializes it fully and 6855 * attaches it using ata_host_register(). 6856 * 6857 * @max_ports ports are allocated and host->n_ports is 6858 * initialized to @max_ports. The caller is allowed to decrease 6859 * host->n_ports before calling ata_host_register(). The unused 6860 * ports will be automatically freed on registration. 6861 * 6862 * RETURNS: 6863 * Allocate ATA host on success, NULL on failure. 6864 * 6865 * LOCKING: 6866 * Inherited from calling layer (may sleep). 6867 */ 6868 struct ata_host *ata_host_alloc(struct device *dev, int max_ports) 6869 { 6870 struct ata_host *host; 6871 size_t sz; 6872 int i; 6873 6874 DPRINTK("ENTER\n"); 6875 6876 if (!devres_open_group(dev, NULL, GFP_KERNEL)) 6877 return NULL; 6878 6879 /* alloc a container for our list of ATA ports (buses) */ 6880 sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *); 6881 /* alloc a container for our list of ATA ports (buses) */ 6882 host = devres_alloc(ata_host_release, sz, GFP_KERNEL); 6883 if (!host) 6884 goto err_out; 6885 6886 devres_add(dev, host); 6887 dev_set_drvdata(dev, host); 6888 6889 spin_lock_init(&host->lock); 6890 host->dev = dev; 6891 host->n_ports = max_ports; 6892 6893 /* allocate ports bound to this host */ 6894 for (i = 0; i < max_ports; i++) { 6895 struct ata_port *ap; 6896 6897 ap = ata_port_alloc(host); 6898 if (!ap) 6899 goto err_out; 6900 6901 ap->port_no = i; 6902 host->ports[i] = ap; 6903 } 6904 6905 devres_remove_group(dev, NULL); 6906 return host; 6907 6908 err_out: 6909 devres_release_group(dev, NULL); 6910 return NULL; 6911 } 6912 6913 /** 6914 * ata_host_alloc_pinfo - alloc host and init with port_info array 6915 * @dev: generic device this host is associated with 6916 * @ppi: array of ATA port_info to initialize host with 6917 * @n_ports: number of ATA ports attached to this host 6918 * 6919 * Allocate ATA host and initialize with info from @ppi. If NULL 6920 * terminated, @ppi may contain fewer entries than @n_ports. The 6921 * last entry will be used for the remaining ports. 6922 * 6923 * RETURNS: 6924 * Allocate ATA host on success, NULL on failure. 6925 * 6926 * LOCKING: 6927 * Inherited from calling layer (may sleep). 6928 */ 6929 struct ata_host *ata_host_alloc_pinfo(struct device *dev, 6930 const struct ata_port_info * const * ppi, 6931 int n_ports) 6932 { 6933 const struct ata_port_info *pi; 6934 struct ata_host *host; 6935 int i, j; 6936 6937 host = ata_host_alloc(dev, n_ports); 6938 if (!host) 6939 return NULL; 6940 6941 for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) { 6942 struct ata_port *ap = host->ports[i]; 6943 6944 if (ppi[j]) 6945 pi = ppi[j++]; 6946 6947 ap->pio_mask = pi->pio_mask; 6948 ap->mwdma_mask = pi->mwdma_mask; 6949 ap->udma_mask = pi->udma_mask; 6950 ap->flags |= pi->flags; 6951 ap->link.flags |= pi->link_flags; 6952 ap->ops = pi->port_ops; 6953 6954 if (!host->ops && (pi->port_ops != &ata_dummy_port_ops)) 6955 host->ops = pi->port_ops; 6956 if (!host->private_data && pi->private_data) 6957 host->private_data = pi->private_data; 6958 } 6959 6960 return host; 6961 } 6962 6963 /** 6964 * ata_host_start - start and freeze ports of an ATA host 6965 * @host: ATA host to start ports for 6966 * 6967 * Start and then freeze ports of @host. Started status is 6968 * recorded in host->flags, so this function can be called 6969 * multiple times. Ports are guaranteed to get started only 6970 * once. If host->ops isn't initialized yet, its set to the 6971 * first non-dummy port ops. 6972 * 6973 * LOCKING: 6974 * Inherited from calling layer (may sleep). 6975 * 6976 * RETURNS: 6977 * 0 if all ports are started successfully, -errno otherwise. 6978 */ 6979 int ata_host_start(struct ata_host *host) 6980 { 6981 int i, rc; 6982 6983 if (host->flags & ATA_HOST_STARTED) 6984 return 0; 6985 6986 for (i = 0; i < host->n_ports; i++) { 6987 struct ata_port *ap = host->ports[i]; 6988 6989 if (!host->ops && !ata_port_is_dummy(ap)) 6990 host->ops = ap->ops; 6991 6992 if (ap->ops->port_start) { 6993 rc = ap->ops->port_start(ap); 6994 if (rc) { 6995 ata_port_printk(ap, KERN_ERR, "failed to " 6996 "start port (errno=%d)\n", rc); 6997 goto err_out; 6998 } 6999 } 7000 7001 ata_eh_freeze_port(ap); 7002 } 7003 7004 host->flags |= ATA_HOST_STARTED; 7005 return 0; 7006 7007 err_out: 7008 while (--i >= 0) { 7009 struct ata_port *ap = host->ports[i]; 7010 7011 if (ap->ops->port_stop) 7012 ap->ops->port_stop(ap); 7013 } 7014 return rc; 7015 } 7016 7017 /** 7018 * ata_sas_host_init - Initialize a host struct 7019 * @host: host to initialize 7020 * @dev: device host is attached to 7021 * @flags: host flags 7022 * @ops: port_ops 7023 * 7024 * LOCKING: 7025 * PCI/etc. bus probe sem. 7026 * 7027 */ 7028 /* KILLME - the only user left is ipr */ 7029 void ata_host_init(struct ata_host *host, struct device *dev, 7030 unsigned long flags, const struct ata_port_operations *ops) 7031 { 7032 spin_lock_init(&host->lock); 7033 host->dev = dev; 7034 host->flags = flags; 7035 host->ops = ops; 7036 } 7037 7038 /** 7039 * ata_host_register - register initialized ATA host 7040 * @host: ATA host to register 7041 * @sht: template for SCSI host 7042 * 7043 * Register initialized ATA host. @host is allocated using 7044 * ata_host_alloc() and fully initialized by LLD. This function 7045 * starts ports, registers @host with ATA and SCSI layers and 7046 * probe registered devices. 7047 * 7048 * LOCKING: 7049 * Inherited from calling layer (may sleep). 7050 * 7051 * RETURNS: 7052 * 0 on success, -errno otherwise. 7053 */ 7054 int ata_host_register(struct ata_host *host, struct scsi_host_template *sht) 7055 { 7056 int i, rc; 7057 7058 /* host must have been started */ 7059 if (!(host->flags & ATA_HOST_STARTED)) { 7060 dev_printk(KERN_ERR, host->dev, 7061 "BUG: trying to register unstarted host\n"); 7062 WARN_ON(1); 7063 return -EINVAL; 7064 } 7065 7066 /* Blow away unused ports. This happens when LLD can't 7067 * determine the exact number of ports to allocate at 7068 * allocation time. 7069 */ 7070 for (i = host->n_ports; host->ports[i]; i++) 7071 kfree(host->ports[i]); 7072 7073 /* give ports names and add SCSI hosts */ 7074 for (i = 0; i < host->n_ports; i++) 7075 host->ports[i]->print_id = ata_print_id++; 7076 7077 rc = ata_scsi_add_hosts(host, sht); 7078 if (rc) 7079 return rc; 7080 7081 /* associate with ACPI nodes */ 7082 ata_acpi_associate(host); 7083 7084 /* set cable, sata_spd_limit and report */ 7085 for (i = 0; i < host->n_ports; i++) { 7086 struct ata_port *ap = host->ports[i]; 7087 unsigned long xfer_mask; 7088 7089 /* set SATA cable type if still unset */ 7090 if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA)) 7091 ap->cbl = ATA_CBL_SATA; 7092 7093 /* init sata_spd_limit to the current value */ 7094 sata_link_init_spd(&ap->link); 7095 7096 /* print per-port info to dmesg */ 7097 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask, 7098 ap->udma_mask); 7099 7100 if (!ata_port_is_dummy(ap)) { 7101 ata_port_printk(ap, KERN_INFO, 7102 "%cATA max %s %s\n", 7103 (ap->flags & ATA_FLAG_SATA) ? 'S' : 'P', 7104 ata_mode_string(xfer_mask), 7105 ap->link.eh_info.desc); 7106 ata_ehi_clear_desc(&ap->link.eh_info); 7107 } else 7108 ata_port_printk(ap, KERN_INFO, "DUMMY\n"); 7109 } 7110 7111 /* perform each probe synchronously */ 7112 DPRINTK("probe begin\n"); 7113 for (i = 0; i < host->n_ports; i++) { 7114 struct ata_port *ap = host->ports[i]; 7115 int rc; 7116 7117 /* probe */ 7118 if (ap->ops->error_handler) { 7119 struct ata_eh_info *ehi = &ap->link.eh_info; 7120 unsigned long flags; 7121 7122 ata_port_probe(ap); 7123 7124 /* kick EH for boot probing */ 7125 spin_lock_irqsave(ap->lock, flags); 7126 7127 ehi->probe_mask = 7128 (1 << ata_link_max_devices(&ap->link)) - 1; 7129 ehi->action |= ATA_EH_SOFTRESET; 7130 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET; 7131 7132 ap->pflags &= ~ATA_PFLAG_INITIALIZING; 7133 ap->pflags |= ATA_PFLAG_LOADING; 7134 ata_port_schedule_eh(ap); 7135 7136 spin_unlock_irqrestore(ap->lock, flags); 7137 7138 /* wait for EH to finish */ 7139 ata_port_wait_eh(ap); 7140 } else { 7141 DPRINTK("ata%u: bus probe begin\n", ap->print_id); 7142 rc = ata_bus_probe(ap); 7143 DPRINTK("ata%u: bus probe end\n", ap->print_id); 7144 7145 if (rc) { 7146 /* FIXME: do something useful here? 7147 * Current libata behavior will 7148 * tear down everything when 7149 * the module is removed 7150 * or the h/w is unplugged. 7151 */ 7152 } 7153 } 7154 } 7155 7156 /* probes are done, now scan each port's disk(s) */ 7157 DPRINTK("host probe begin\n"); 7158 for (i = 0; i < host->n_ports; i++) { 7159 struct ata_port *ap = host->ports[i]; 7160 7161 ata_scsi_scan_host(ap, 1); 7162 ata_lpm_schedule(ap, ap->pm_policy); 7163 } 7164 7165 return 0; 7166 } 7167 7168 /** 7169 * ata_host_activate - start host, request IRQ and register it 7170 * @host: target ATA host 7171 * @irq: IRQ to request 7172 * @irq_handler: irq_handler used when requesting IRQ 7173 * @irq_flags: irq_flags used when requesting IRQ 7174 * @sht: scsi_host_template to use when registering the host 7175 * 7176 * After allocating an ATA host and initializing it, most libata 7177 * LLDs perform three steps to activate the host - start host, 7178 * request IRQ and register it. This helper takes necessasry 7179 * arguments and performs the three steps in one go. 7180 * 7181 * LOCKING: 7182 * Inherited from calling layer (may sleep). 7183 * 7184 * RETURNS: 7185 * 0 on success, -errno otherwise. 7186 */ 7187 int ata_host_activate(struct ata_host *host, int irq, 7188 irq_handler_t irq_handler, unsigned long irq_flags, 7189 struct scsi_host_template *sht) 7190 { 7191 int i, rc; 7192 7193 rc = ata_host_start(host); 7194 if (rc) 7195 return rc; 7196 7197 rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags, 7198 dev_driver_string(host->dev), host); 7199 if (rc) 7200 return rc; 7201 7202 for (i = 0; i < host->n_ports; i++) 7203 ata_port_desc(host->ports[i], "irq %d", irq); 7204 7205 rc = ata_host_register(host, sht); 7206 /* if failed, just free the IRQ and leave ports alone */ 7207 if (rc) 7208 devm_free_irq(host->dev, irq, host); 7209 7210 return rc; 7211 } 7212 7213 /** 7214 * ata_port_detach - Detach ATA port in prepration of device removal 7215 * @ap: ATA port to be detached 7216 * 7217 * Detach all ATA devices and the associated SCSI devices of @ap; 7218 * then, remove the associated SCSI host. @ap is guaranteed to 7219 * be quiescent on return from this function. 7220 * 7221 * LOCKING: 7222 * Kernel thread context (may sleep). 7223 */ 7224 static void ata_port_detach(struct ata_port *ap) 7225 { 7226 unsigned long flags; 7227 struct ata_link *link; 7228 struct ata_device *dev; 7229 7230 if (!ap->ops->error_handler) 7231 goto skip_eh; 7232 7233 /* tell EH we're leaving & flush EH */ 7234 spin_lock_irqsave(ap->lock, flags); 7235 ap->pflags |= ATA_PFLAG_UNLOADING; 7236 spin_unlock_irqrestore(ap->lock, flags); 7237 7238 ata_port_wait_eh(ap); 7239 7240 /* EH is now guaranteed to see UNLOADING, so no new device 7241 * will be attached. Disable all existing devices. 7242 */ 7243 spin_lock_irqsave(ap->lock, flags); 7244 7245 ata_port_for_each_link(link, ap) { 7246 ata_link_for_each_dev(dev, link) 7247 ata_dev_disable(dev); 7248 } 7249 7250 spin_unlock_irqrestore(ap->lock, flags); 7251 7252 /* Final freeze & EH. All in-flight commands are aborted. EH 7253 * will be skipped and retrials will be terminated with bad 7254 * target. 7255 */ 7256 spin_lock_irqsave(ap->lock, flags); 7257 ata_port_freeze(ap); /* won't be thawed */ 7258 spin_unlock_irqrestore(ap->lock, flags); 7259 7260 ata_port_wait_eh(ap); 7261 cancel_rearming_delayed_work(&ap->hotplug_task); 7262 7263 skip_eh: 7264 /* remove the associated SCSI host */ 7265 scsi_remove_host(ap->scsi_host); 7266 } 7267 7268 /** 7269 * ata_host_detach - Detach all ports of an ATA host 7270 * @host: Host to detach 7271 * 7272 * Detach all ports of @host. 7273 * 7274 * LOCKING: 7275 * Kernel thread context (may sleep). 7276 */ 7277 void ata_host_detach(struct ata_host *host) 7278 { 7279 int i; 7280 7281 for (i = 0; i < host->n_ports; i++) 7282 ata_port_detach(host->ports[i]); 7283 } 7284 7285 /** 7286 * ata_std_ports - initialize ioaddr with standard port offsets. 7287 * @ioaddr: IO address structure to be initialized 7288 * 7289 * Utility function which initializes data_addr, error_addr, 7290 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, 7291 * device_addr, status_addr, and command_addr to standard offsets 7292 * relative to cmd_addr. 7293 * 7294 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. 7295 */ 7296 7297 void ata_std_ports(struct ata_ioports *ioaddr) 7298 { 7299 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; 7300 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; 7301 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; 7302 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; 7303 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; 7304 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; 7305 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; 7306 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; 7307 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; 7308 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; 7309 } 7310 7311 7312 #ifdef CONFIG_PCI 7313 7314 /** 7315 * ata_pci_remove_one - PCI layer callback for device removal 7316 * @pdev: PCI device that was removed 7317 * 7318 * PCI layer indicates to libata via this hook that hot-unplug or 7319 * module unload event has occurred. Detach all ports. Resource 7320 * release is handled via devres. 7321 * 7322 * LOCKING: 7323 * Inherited from PCI layer (may sleep). 7324 */ 7325 void ata_pci_remove_one(struct pci_dev *pdev) 7326 { 7327 struct device *dev = &pdev->dev; 7328 struct ata_host *host = dev_get_drvdata(dev); 7329 7330 ata_host_detach(host); 7331 } 7332 7333 /* move to PCI subsystem */ 7334 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits) 7335 { 7336 unsigned long tmp = 0; 7337 7338 switch (bits->width) { 7339 case 1: { 7340 u8 tmp8 = 0; 7341 pci_read_config_byte(pdev, bits->reg, &tmp8); 7342 tmp = tmp8; 7343 break; 7344 } 7345 case 2: { 7346 u16 tmp16 = 0; 7347 pci_read_config_word(pdev, bits->reg, &tmp16); 7348 tmp = tmp16; 7349 break; 7350 } 7351 case 4: { 7352 u32 tmp32 = 0; 7353 pci_read_config_dword(pdev, bits->reg, &tmp32); 7354 tmp = tmp32; 7355 break; 7356 } 7357 7358 default: 7359 return -EINVAL; 7360 } 7361 7362 tmp &= bits->mask; 7363 7364 return (tmp == bits->val) ? 1 : 0; 7365 } 7366 7367 #ifdef CONFIG_PM 7368 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg) 7369 { 7370 pci_save_state(pdev); 7371 pci_disable_device(pdev); 7372 7373 if (mesg.event == PM_EVENT_SUSPEND) 7374 pci_set_power_state(pdev, PCI_D3hot); 7375 } 7376 7377 int ata_pci_device_do_resume(struct pci_dev *pdev) 7378 { 7379 int rc; 7380 7381 pci_set_power_state(pdev, PCI_D0); 7382 pci_restore_state(pdev); 7383 7384 rc = pcim_enable_device(pdev); 7385 if (rc) { 7386 dev_printk(KERN_ERR, &pdev->dev, 7387 "failed to enable device after resume (%d)\n", rc); 7388 return rc; 7389 } 7390 7391 pci_set_master(pdev); 7392 return 0; 7393 } 7394 7395 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) 7396 { 7397 struct ata_host *host = dev_get_drvdata(&pdev->dev); 7398 int rc = 0; 7399 7400 rc = ata_host_suspend(host, mesg); 7401 if (rc) 7402 return rc; 7403 7404 ata_pci_device_do_suspend(pdev, mesg); 7405 7406 return 0; 7407 } 7408 7409 int ata_pci_device_resume(struct pci_dev *pdev) 7410 { 7411 struct ata_host *host = dev_get_drvdata(&pdev->dev); 7412 int rc; 7413 7414 rc = ata_pci_device_do_resume(pdev); 7415 if (rc == 0) 7416 ata_host_resume(host); 7417 return rc; 7418 } 7419 #endif /* CONFIG_PM */ 7420 7421 #endif /* CONFIG_PCI */ 7422 7423 7424 static int __init ata_init(void) 7425 { 7426 ata_probe_timeout *= HZ; 7427 ata_wq = create_workqueue("ata"); 7428 if (!ata_wq) 7429 return -ENOMEM; 7430 7431 ata_aux_wq = create_singlethread_workqueue("ata_aux"); 7432 if (!ata_aux_wq) { 7433 destroy_workqueue(ata_wq); 7434 return -ENOMEM; 7435 } 7436 7437 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); 7438 return 0; 7439 } 7440 7441 static void __exit ata_exit(void) 7442 { 7443 destroy_workqueue(ata_wq); 7444 destroy_workqueue(ata_aux_wq); 7445 } 7446 7447 subsys_initcall(ata_init); 7448 module_exit(ata_exit); 7449 7450 static unsigned long ratelimit_time; 7451 static DEFINE_SPINLOCK(ata_ratelimit_lock); 7452 7453 int ata_ratelimit(void) 7454 { 7455 int rc; 7456 unsigned long flags; 7457 7458 spin_lock_irqsave(&ata_ratelimit_lock, flags); 7459 7460 if (time_after(jiffies, ratelimit_time)) { 7461 rc = 1; 7462 ratelimit_time = jiffies + (HZ/5); 7463 } else 7464 rc = 0; 7465 7466 spin_unlock_irqrestore(&ata_ratelimit_lock, flags); 7467 7468 return rc; 7469 } 7470 7471 /** 7472 * ata_wait_register - wait until register value changes 7473 * @reg: IO-mapped register 7474 * @mask: Mask to apply to read register value 7475 * @val: Wait condition 7476 * @interval_msec: polling interval in milliseconds 7477 * @timeout_msec: timeout in milliseconds 7478 * 7479 * Waiting for some bits of register to change is a common 7480 * operation for ATA controllers. This function reads 32bit LE 7481 * IO-mapped register @reg and tests for the following condition. 7482 * 7483 * (*@reg & mask) != val 7484 * 7485 * If the condition is met, it returns; otherwise, the process is 7486 * repeated after @interval_msec until timeout. 7487 * 7488 * LOCKING: 7489 * Kernel thread context (may sleep) 7490 * 7491 * RETURNS: 7492 * The final register value. 7493 */ 7494 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, 7495 unsigned long interval_msec, 7496 unsigned long timeout_msec) 7497 { 7498 unsigned long timeout; 7499 u32 tmp; 7500 7501 tmp = ioread32(reg); 7502 7503 /* Calculate timeout _after_ the first read to make sure 7504 * preceding writes reach the controller before starting to 7505 * eat away the timeout. 7506 */ 7507 timeout = jiffies + (timeout_msec * HZ) / 1000; 7508 7509 while ((tmp & mask) == val && time_before(jiffies, timeout)) { 7510 msleep(interval_msec); 7511 tmp = ioread32(reg); 7512 } 7513 7514 return tmp; 7515 } 7516 7517 /* 7518 * Dummy port_ops 7519 */ 7520 static void ata_dummy_noret(struct ata_port *ap) { } 7521 static int ata_dummy_ret0(struct ata_port *ap) { return 0; } 7522 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { } 7523 7524 static u8 ata_dummy_check_status(struct ata_port *ap) 7525 { 7526 return ATA_DRDY; 7527 } 7528 7529 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc) 7530 { 7531 return AC_ERR_SYSTEM; 7532 } 7533 7534 const struct ata_port_operations ata_dummy_port_ops = { 7535 .check_status = ata_dummy_check_status, 7536 .check_altstatus = ata_dummy_check_status, 7537 .dev_select = ata_noop_dev_select, 7538 .qc_prep = ata_noop_qc_prep, 7539 .qc_issue = ata_dummy_qc_issue, 7540 .freeze = ata_dummy_noret, 7541 .thaw = ata_dummy_noret, 7542 .error_handler = ata_dummy_noret, 7543 .post_internal_cmd = ata_dummy_qc_noret, 7544 .irq_clear = ata_dummy_noret, 7545 .port_start = ata_dummy_ret0, 7546 .port_stop = ata_dummy_noret, 7547 }; 7548 7549 const struct ata_port_info ata_dummy_port_info = { 7550 .port_ops = &ata_dummy_port_ops, 7551 }; 7552 7553 /* 7554 * libata is essentially a library of internal helper functions for 7555 * low-level ATA host controller drivers. As such, the API/ABI is 7556 * likely to change as new drivers are added and updated. 7557 * Do not depend on ABI/API stability. 7558 */ 7559 EXPORT_SYMBOL_GPL(sata_deb_timing_normal); 7560 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug); 7561 EXPORT_SYMBOL_GPL(sata_deb_timing_long); 7562 EXPORT_SYMBOL_GPL(ata_dummy_port_ops); 7563 EXPORT_SYMBOL_GPL(ata_dummy_port_info); 7564 EXPORT_SYMBOL_GPL(ata_std_bios_param); 7565 EXPORT_SYMBOL_GPL(ata_std_ports); 7566 EXPORT_SYMBOL_GPL(ata_host_init); 7567 EXPORT_SYMBOL_GPL(ata_host_alloc); 7568 EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo); 7569 EXPORT_SYMBOL_GPL(ata_host_start); 7570 EXPORT_SYMBOL_GPL(ata_host_register); 7571 EXPORT_SYMBOL_GPL(ata_host_activate); 7572 EXPORT_SYMBOL_GPL(ata_host_detach); 7573 EXPORT_SYMBOL_GPL(ata_sg_init); 7574 EXPORT_SYMBOL_GPL(ata_sg_init_one); 7575 EXPORT_SYMBOL_GPL(ata_hsm_move); 7576 EXPORT_SYMBOL_GPL(ata_qc_complete); 7577 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple); 7578 EXPORT_SYMBOL_GPL(ata_qc_issue_prot); 7579 EXPORT_SYMBOL_GPL(ata_tf_load); 7580 EXPORT_SYMBOL_GPL(ata_tf_read); 7581 EXPORT_SYMBOL_GPL(ata_noop_dev_select); 7582 EXPORT_SYMBOL_GPL(ata_std_dev_select); 7583 EXPORT_SYMBOL_GPL(sata_print_link_status); 7584 EXPORT_SYMBOL_GPL(ata_tf_to_fis); 7585 EXPORT_SYMBOL_GPL(ata_tf_from_fis); 7586 EXPORT_SYMBOL_GPL(ata_check_status); 7587 EXPORT_SYMBOL_GPL(ata_altstatus); 7588 EXPORT_SYMBOL_GPL(ata_exec_command); 7589 EXPORT_SYMBOL_GPL(ata_port_start); 7590 EXPORT_SYMBOL_GPL(ata_sff_port_start); 7591 EXPORT_SYMBOL_GPL(ata_interrupt); 7592 EXPORT_SYMBOL_GPL(ata_do_set_mode); 7593 EXPORT_SYMBOL_GPL(ata_data_xfer); 7594 EXPORT_SYMBOL_GPL(ata_data_xfer_noirq); 7595 EXPORT_SYMBOL_GPL(ata_std_qc_defer); 7596 EXPORT_SYMBOL_GPL(ata_qc_prep); 7597 EXPORT_SYMBOL_GPL(ata_dumb_qc_prep); 7598 EXPORT_SYMBOL_GPL(ata_noop_qc_prep); 7599 EXPORT_SYMBOL_GPL(ata_bmdma_setup); 7600 EXPORT_SYMBOL_GPL(ata_bmdma_start); 7601 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); 7602 EXPORT_SYMBOL_GPL(ata_bmdma_status); 7603 EXPORT_SYMBOL_GPL(ata_bmdma_stop); 7604 EXPORT_SYMBOL_GPL(ata_bmdma_freeze); 7605 EXPORT_SYMBOL_GPL(ata_bmdma_thaw); 7606 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh); 7607 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler); 7608 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd); 7609 EXPORT_SYMBOL_GPL(ata_port_probe); 7610 EXPORT_SYMBOL_GPL(ata_dev_disable); 7611 EXPORT_SYMBOL_GPL(sata_set_spd); 7612 EXPORT_SYMBOL_GPL(sata_link_debounce); 7613 EXPORT_SYMBOL_GPL(sata_link_resume); 7614 EXPORT_SYMBOL_GPL(sata_phy_reset); 7615 EXPORT_SYMBOL_GPL(__sata_phy_reset); 7616 EXPORT_SYMBOL_GPL(ata_bus_reset); 7617 EXPORT_SYMBOL_GPL(ata_std_prereset); 7618 EXPORT_SYMBOL_GPL(ata_std_softreset); 7619 EXPORT_SYMBOL_GPL(sata_link_hardreset); 7620 EXPORT_SYMBOL_GPL(sata_std_hardreset); 7621 EXPORT_SYMBOL_GPL(ata_std_postreset); 7622 EXPORT_SYMBOL_GPL(ata_dev_classify); 7623 EXPORT_SYMBOL_GPL(ata_dev_pair); 7624 EXPORT_SYMBOL_GPL(ata_port_disable); 7625 EXPORT_SYMBOL_GPL(ata_ratelimit); 7626 EXPORT_SYMBOL_GPL(ata_wait_register); 7627 EXPORT_SYMBOL_GPL(ata_busy_sleep); 7628 EXPORT_SYMBOL_GPL(ata_wait_after_reset); 7629 EXPORT_SYMBOL_GPL(ata_wait_ready); 7630 EXPORT_SYMBOL_GPL(ata_port_queue_task); 7631 EXPORT_SYMBOL_GPL(ata_scsi_ioctl); 7632 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); 7633 EXPORT_SYMBOL_GPL(ata_scsi_slave_config); 7634 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy); 7635 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth); 7636 EXPORT_SYMBOL_GPL(ata_host_intr); 7637 EXPORT_SYMBOL_GPL(sata_scr_valid); 7638 EXPORT_SYMBOL_GPL(sata_scr_read); 7639 EXPORT_SYMBOL_GPL(sata_scr_write); 7640 EXPORT_SYMBOL_GPL(sata_scr_write_flush); 7641 EXPORT_SYMBOL_GPL(ata_link_online); 7642 EXPORT_SYMBOL_GPL(ata_link_offline); 7643 #ifdef CONFIG_PM 7644 EXPORT_SYMBOL_GPL(ata_host_suspend); 7645 EXPORT_SYMBOL_GPL(ata_host_resume); 7646 #endif /* CONFIG_PM */ 7647 EXPORT_SYMBOL_GPL(ata_id_string); 7648 EXPORT_SYMBOL_GPL(ata_id_c_string); 7649 EXPORT_SYMBOL_GPL(ata_id_to_dma_mode); 7650 EXPORT_SYMBOL_GPL(ata_scsi_simulate); 7651 7652 EXPORT_SYMBOL_GPL(ata_pio_need_iordy); 7653 EXPORT_SYMBOL_GPL(ata_timing_compute); 7654 EXPORT_SYMBOL_GPL(ata_timing_merge); 7655 7656 #ifdef CONFIG_PCI 7657 EXPORT_SYMBOL_GPL(pci_test_config_bits); 7658 EXPORT_SYMBOL_GPL(ata_pci_init_sff_host); 7659 EXPORT_SYMBOL_GPL(ata_pci_init_bmdma); 7660 EXPORT_SYMBOL_GPL(ata_pci_prepare_sff_host); 7661 EXPORT_SYMBOL_GPL(ata_pci_init_one); 7662 EXPORT_SYMBOL_GPL(ata_pci_remove_one); 7663 #ifdef CONFIG_PM 7664 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend); 7665 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume); 7666 EXPORT_SYMBOL_GPL(ata_pci_device_suspend); 7667 EXPORT_SYMBOL_GPL(ata_pci_device_resume); 7668 #endif /* CONFIG_PM */ 7669 EXPORT_SYMBOL_GPL(ata_pci_default_filter); 7670 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex); 7671 #endif /* CONFIG_PCI */ 7672 7673 EXPORT_SYMBOL_GPL(sata_pmp_qc_defer_cmd_switch); 7674 EXPORT_SYMBOL_GPL(sata_pmp_std_prereset); 7675 EXPORT_SYMBOL_GPL(sata_pmp_std_hardreset); 7676 EXPORT_SYMBOL_GPL(sata_pmp_std_postreset); 7677 EXPORT_SYMBOL_GPL(sata_pmp_do_eh); 7678 7679 EXPORT_SYMBOL_GPL(__ata_ehi_push_desc); 7680 EXPORT_SYMBOL_GPL(ata_ehi_push_desc); 7681 EXPORT_SYMBOL_GPL(ata_ehi_clear_desc); 7682 EXPORT_SYMBOL_GPL(ata_port_desc); 7683 #ifdef CONFIG_PCI 7684 EXPORT_SYMBOL_GPL(ata_port_pbar_desc); 7685 #endif /* CONFIG_PCI */ 7686 EXPORT_SYMBOL_GPL(ata_eng_timeout); 7687 EXPORT_SYMBOL_GPL(ata_port_schedule_eh); 7688 EXPORT_SYMBOL_GPL(ata_link_abort); 7689 EXPORT_SYMBOL_GPL(ata_port_abort); 7690 EXPORT_SYMBOL_GPL(ata_port_freeze); 7691 EXPORT_SYMBOL_GPL(sata_async_notification); 7692 EXPORT_SYMBOL_GPL(ata_eh_freeze_port); 7693 EXPORT_SYMBOL_GPL(ata_eh_thaw_port); 7694 EXPORT_SYMBOL_GPL(ata_eh_qc_complete); 7695 EXPORT_SYMBOL_GPL(ata_eh_qc_retry); 7696 EXPORT_SYMBOL_GPL(ata_do_eh); 7697 EXPORT_SYMBOL_GPL(ata_irq_on); 7698 EXPORT_SYMBOL_GPL(ata_dev_try_classify); 7699 7700 EXPORT_SYMBOL_GPL(ata_cable_40wire); 7701 EXPORT_SYMBOL_GPL(ata_cable_80wire); 7702 EXPORT_SYMBOL_GPL(ata_cable_unknown); 7703 EXPORT_SYMBOL_GPL(ata_cable_sata); 7704