1 /* 2 * libata-core.c - helper library for ATA 3 * 4 * Maintained by: Jeff Garzik <jgarzik@pobox.com> 5 * Please ALWAYS copy linux-ide@vger.kernel.org 6 * on emails. 7 * 8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved. 9 * Copyright 2003-2004 Jeff Garzik 10 * 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2, or (at your option) 15 * any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; see the file COPYING. If not, write to 24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 25 * 26 * 27 * libata documentation is available via 'make {ps|pdf}docs', 28 * as Documentation/DocBook/libata.* 29 * 30 * Hardware documentation available from http://www.t13.org/ and 31 * http://www.sata-io.org/ 32 * 33 * Standards documents from: 34 * http://www.t13.org (ATA standards, PCI DMA IDE spec) 35 * http://www.t10.org (SCSI MMC - for ATAPI MMC) 36 * http://www.sata-io.org (SATA) 37 * http://www.compactflash.org (CF) 38 * http://www.qic.org (QIC157 - Tape and DSC) 39 * http://www.ce-ata.org (CE-ATA: not supported) 40 * 41 */ 42 43 #include <linux/kernel.h> 44 #include <linux/module.h> 45 #include <linux/pci.h> 46 #include <linux/init.h> 47 #include <linux/list.h> 48 #include <linux/mm.h> 49 #include <linux/highmem.h> 50 #include <linux/spinlock.h> 51 #include <linux/blkdev.h> 52 #include <linux/delay.h> 53 #include <linux/timer.h> 54 #include <linux/interrupt.h> 55 #include <linux/completion.h> 56 #include <linux/suspend.h> 57 #include <linux/workqueue.h> 58 #include <linux/jiffies.h> 59 #include <linux/scatterlist.h> 60 #include <linux/io.h> 61 #include <scsi/scsi.h> 62 #include <scsi/scsi_cmnd.h> 63 #include <scsi/scsi_host.h> 64 #include <linux/libata.h> 65 #include <asm/semaphore.h> 66 #include <asm/byteorder.h> 67 #include <linux/cdrom.h> 68 69 #include "libata.h" 70 71 72 /* debounce timing parameters in msecs { interval, duration, timeout } */ 73 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 }; 74 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 }; 75 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 }; 76 77 static unsigned int ata_dev_init_params(struct ata_device *dev, 78 u16 heads, u16 sectors); 79 static unsigned int ata_dev_set_xfermode(struct ata_device *dev); 80 static unsigned int ata_dev_set_feature(struct ata_device *dev, 81 u8 enable, u8 feature); 82 static void ata_dev_xfermask(struct ata_device *dev); 83 static unsigned long ata_dev_blacklisted(const struct ata_device *dev); 84 85 unsigned int ata_print_id = 1; 86 static struct workqueue_struct *ata_wq; 87 88 struct workqueue_struct *ata_aux_wq; 89 90 int atapi_enabled = 1; 91 module_param(atapi_enabled, int, 0444); 92 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); 93 94 int atapi_dmadir = 0; 95 module_param(atapi_dmadir, int, 0444); 96 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)"); 97 98 int atapi_passthru16 = 1; 99 module_param(atapi_passthru16, int, 0444); 100 MODULE_PARM_DESC(atapi_passthru16, "Enable ATA_16 passthru for ATAPI devices; on by default (0=off, 1=on)"); 101 102 int libata_fua = 0; 103 module_param_named(fua, libata_fua, int, 0444); 104 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)"); 105 106 static int ata_ignore_hpa; 107 module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644); 108 MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)"); 109 110 static int libata_dma_mask = ATA_DMA_MASK_ATA|ATA_DMA_MASK_ATAPI|ATA_DMA_MASK_CFA; 111 module_param_named(dma, libata_dma_mask, int, 0444); 112 MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)"); 113 114 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ; 115 module_param(ata_probe_timeout, int, 0444); 116 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)"); 117 118 int libata_noacpi = 0; 119 module_param_named(noacpi, libata_noacpi, int, 0444); 120 MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in probe/suspend/resume when set"); 121 122 int libata_allow_tpm = 0; 123 module_param_named(allow_tpm, libata_allow_tpm, int, 0444); 124 MODULE_PARM_DESC(allow_tpm, "Permit the use of TPM commands"); 125 126 MODULE_AUTHOR("Jeff Garzik"); 127 MODULE_DESCRIPTION("Library module for ATA devices"); 128 MODULE_LICENSE("GPL"); 129 MODULE_VERSION(DRV_VERSION); 130 131 132 /** 133 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure 134 * @tf: Taskfile to convert 135 * @pmp: Port multiplier port 136 * @is_cmd: This FIS is for command 137 * @fis: Buffer into which data will output 138 * 139 * Converts a standard ATA taskfile to a Serial ATA 140 * FIS structure (Register - Host to Device). 141 * 142 * LOCKING: 143 * Inherited from caller. 144 */ 145 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis) 146 { 147 fis[0] = 0x27; /* Register - Host to Device FIS */ 148 fis[1] = pmp & 0xf; /* Port multiplier number*/ 149 if (is_cmd) 150 fis[1] |= (1 << 7); /* bit 7 indicates Command FIS */ 151 152 fis[2] = tf->command; 153 fis[3] = tf->feature; 154 155 fis[4] = tf->lbal; 156 fis[5] = tf->lbam; 157 fis[6] = tf->lbah; 158 fis[7] = tf->device; 159 160 fis[8] = tf->hob_lbal; 161 fis[9] = tf->hob_lbam; 162 fis[10] = tf->hob_lbah; 163 fis[11] = tf->hob_feature; 164 165 fis[12] = tf->nsect; 166 fis[13] = tf->hob_nsect; 167 fis[14] = 0; 168 fis[15] = tf->ctl; 169 170 fis[16] = 0; 171 fis[17] = 0; 172 fis[18] = 0; 173 fis[19] = 0; 174 } 175 176 /** 177 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile 178 * @fis: Buffer from which data will be input 179 * @tf: Taskfile to output 180 * 181 * Converts a serial ATA FIS structure to a standard ATA taskfile. 182 * 183 * LOCKING: 184 * Inherited from caller. 185 */ 186 187 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf) 188 { 189 tf->command = fis[2]; /* status */ 190 tf->feature = fis[3]; /* error */ 191 192 tf->lbal = fis[4]; 193 tf->lbam = fis[5]; 194 tf->lbah = fis[6]; 195 tf->device = fis[7]; 196 197 tf->hob_lbal = fis[8]; 198 tf->hob_lbam = fis[9]; 199 tf->hob_lbah = fis[10]; 200 201 tf->nsect = fis[12]; 202 tf->hob_nsect = fis[13]; 203 } 204 205 static const u8 ata_rw_cmds[] = { 206 /* pio multi */ 207 ATA_CMD_READ_MULTI, 208 ATA_CMD_WRITE_MULTI, 209 ATA_CMD_READ_MULTI_EXT, 210 ATA_CMD_WRITE_MULTI_EXT, 211 0, 212 0, 213 0, 214 ATA_CMD_WRITE_MULTI_FUA_EXT, 215 /* pio */ 216 ATA_CMD_PIO_READ, 217 ATA_CMD_PIO_WRITE, 218 ATA_CMD_PIO_READ_EXT, 219 ATA_CMD_PIO_WRITE_EXT, 220 0, 221 0, 222 0, 223 0, 224 /* dma */ 225 ATA_CMD_READ, 226 ATA_CMD_WRITE, 227 ATA_CMD_READ_EXT, 228 ATA_CMD_WRITE_EXT, 229 0, 230 0, 231 0, 232 ATA_CMD_WRITE_FUA_EXT 233 }; 234 235 /** 236 * ata_rwcmd_protocol - set taskfile r/w commands and protocol 237 * @tf: command to examine and configure 238 * @dev: device tf belongs to 239 * 240 * Examine the device configuration and tf->flags to calculate 241 * the proper read/write commands and protocol to use. 242 * 243 * LOCKING: 244 * caller. 245 */ 246 static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev) 247 { 248 u8 cmd; 249 250 int index, fua, lba48, write; 251 252 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0; 253 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0; 254 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0; 255 256 if (dev->flags & ATA_DFLAG_PIO) { 257 tf->protocol = ATA_PROT_PIO; 258 index = dev->multi_count ? 0 : 8; 259 } else if (lba48 && (dev->link->ap->flags & ATA_FLAG_PIO_LBA48)) { 260 /* Unable to use DMA due to host limitation */ 261 tf->protocol = ATA_PROT_PIO; 262 index = dev->multi_count ? 0 : 8; 263 } else { 264 tf->protocol = ATA_PROT_DMA; 265 index = 16; 266 } 267 268 cmd = ata_rw_cmds[index + fua + lba48 + write]; 269 if (cmd) { 270 tf->command = cmd; 271 return 0; 272 } 273 return -1; 274 } 275 276 /** 277 * ata_tf_read_block - Read block address from ATA taskfile 278 * @tf: ATA taskfile of interest 279 * @dev: ATA device @tf belongs to 280 * 281 * LOCKING: 282 * None. 283 * 284 * Read block address from @tf. This function can handle all 285 * three address formats - LBA, LBA48 and CHS. tf->protocol and 286 * flags select the address format to use. 287 * 288 * RETURNS: 289 * Block address read from @tf. 290 */ 291 u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev) 292 { 293 u64 block = 0; 294 295 if (tf->flags & ATA_TFLAG_LBA) { 296 if (tf->flags & ATA_TFLAG_LBA48) { 297 block |= (u64)tf->hob_lbah << 40; 298 block |= (u64)tf->hob_lbam << 32; 299 block |= tf->hob_lbal << 24; 300 } else 301 block |= (tf->device & 0xf) << 24; 302 303 block |= tf->lbah << 16; 304 block |= tf->lbam << 8; 305 block |= tf->lbal; 306 } else { 307 u32 cyl, head, sect; 308 309 cyl = tf->lbam | (tf->lbah << 8); 310 head = tf->device & 0xf; 311 sect = tf->lbal; 312 313 block = (cyl * dev->heads + head) * dev->sectors + sect; 314 } 315 316 return block; 317 } 318 319 /** 320 * ata_build_rw_tf - Build ATA taskfile for given read/write request 321 * @tf: Target ATA taskfile 322 * @dev: ATA device @tf belongs to 323 * @block: Block address 324 * @n_block: Number of blocks 325 * @tf_flags: RW/FUA etc... 326 * @tag: tag 327 * 328 * LOCKING: 329 * None. 330 * 331 * Build ATA taskfile @tf for read/write request described by 332 * @block, @n_block, @tf_flags and @tag on @dev. 333 * 334 * RETURNS: 335 * 336 * 0 on success, -ERANGE if the request is too large for @dev, 337 * -EINVAL if the request is invalid. 338 */ 339 int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev, 340 u64 block, u32 n_block, unsigned int tf_flags, 341 unsigned int tag) 342 { 343 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 344 tf->flags |= tf_flags; 345 346 if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) { 347 /* yay, NCQ */ 348 if (!lba_48_ok(block, n_block)) 349 return -ERANGE; 350 351 tf->protocol = ATA_PROT_NCQ; 352 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48; 353 354 if (tf->flags & ATA_TFLAG_WRITE) 355 tf->command = ATA_CMD_FPDMA_WRITE; 356 else 357 tf->command = ATA_CMD_FPDMA_READ; 358 359 tf->nsect = tag << 3; 360 tf->hob_feature = (n_block >> 8) & 0xff; 361 tf->feature = n_block & 0xff; 362 363 tf->hob_lbah = (block >> 40) & 0xff; 364 tf->hob_lbam = (block >> 32) & 0xff; 365 tf->hob_lbal = (block >> 24) & 0xff; 366 tf->lbah = (block >> 16) & 0xff; 367 tf->lbam = (block >> 8) & 0xff; 368 tf->lbal = block & 0xff; 369 370 tf->device = 1 << 6; 371 if (tf->flags & ATA_TFLAG_FUA) 372 tf->device |= 1 << 7; 373 } else if (dev->flags & ATA_DFLAG_LBA) { 374 tf->flags |= ATA_TFLAG_LBA; 375 376 if (lba_28_ok(block, n_block)) { 377 /* use LBA28 */ 378 tf->device |= (block >> 24) & 0xf; 379 } else if (lba_48_ok(block, n_block)) { 380 if (!(dev->flags & ATA_DFLAG_LBA48)) 381 return -ERANGE; 382 383 /* use LBA48 */ 384 tf->flags |= ATA_TFLAG_LBA48; 385 386 tf->hob_nsect = (n_block >> 8) & 0xff; 387 388 tf->hob_lbah = (block >> 40) & 0xff; 389 tf->hob_lbam = (block >> 32) & 0xff; 390 tf->hob_lbal = (block >> 24) & 0xff; 391 } else 392 /* request too large even for LBA48 */ 393 return -ERANGE; 394 395 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0)) 396 return -EINVAL; 397 398 tf->nsect = n_block & 0xff; 399 400 tf->lbah = (block >> 16) & 0xff; 401 tf->lbam = (block >> 8) & 0xff; 402 tf->lbal = block & 0xff; 403 404 tf->device |= ATA_LBA; 405 } else { 406 /* CHS */ 407 u32 sect, head, cyl, track; 408 409 /* The request -may- be too large for CHS addressing. */ 410 if (!lba_28_ok(block, n_block)) 411 return -ERANGE; 412 413 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0)) 414 return -EINVAL; 415 416 /* Convert LBA to CHS */ 417 track = (u32)block / dev->sectors; 418 cyl = track / dev->heads; 419 head = track % dev->heads; 420 sect = (u32)block % dev->sectors + 1; 421 422 DPRINTK("block %u track %u cyl %u head %u sect %u\n", 423 (u32)block, track, cyl, head, sect); 424 425 /* Check whether the converted CHS can fit. 426 Cylinder: 0-65535 427 Head: 0-15 428 Sector: 1-255*/ 429 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect)) 430 return -ERANGE; 431 432 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */ 433 tf->lbal = sect; 434 tf->lbam = cyl; 435 tf->lbah = cyl >> 8; 436 tf->device |= head; 437 } 438 439 return 0; 440 } 441 442 /** 443 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask 444 * @pio_mask: pio_mask 445 * @mwdma_mask: mwdma_mask 446 * @udma_mask: udma_mask 447 * 448 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single 449 * unsigned int xfer_mask. 450 * 451 * LOCKING: 452 * None. 453 * 454 * RETURNS: 455 * Packed xfer_mask. 456 */ 457 unsigned long ata_pack_xfermask(unsigned long pio_mask, 458 unsigned long mwdma_mask, 459 unsigned long udma_mask) 460 { 461 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) | 462 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) | 463 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA); 464 } 465 466 /** 467 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks 468 * @xfer_mask: xfer_mask to unpack 469 * @pio_mask: resulting pio_mask 470 * @mwdma_mask: resulting mwdma_mask 471 * @udma_mask: resulting udma_mask 472 * 473 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask. 474 * Any NULL distination masks will be ignored. 475 */ 476 void ata_unpack_xfermask(unsigned long xfer_mask, unsigned long *pio_mask, 477 unsigned long *mwdma_mask, unsigned long *udma_mask) 478 { 479 if (pio_mask) 480 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO; 481 if (mwdma_mask) 482 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA; 483 if (udma_mask) 484 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA; 485 } 486 487 static const struct ata_xfer_ent { 488 int shift, bits; 489 u8 base; 490 } ata_xfer_tbl[] = { 491 { ATA_SHIFT_PIO, ATA_NR_PIO_MODES, XFER_PIO_0 }, 492 { ATA_SHIFT_MWDMA, ATA_NR_MWDMA_MODES, XFER_MW_DMA_0 }, 493 { ATA_SHIFT_UDMA, ATA_NR_UDMA_MODES, XFER_UDMA_0 }, 494 { -1, }, 495 }; 496 497 /** 498 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask 499 * @xfer_mask: xfer_mask of interest 500 * 501 * Return matching XFER_* value for @xfer_mask. Only the highest 502 * bit of @xfer_mask is considered. 503 * 504 * LOCKING: 505 * None. 506 * 507 * RETURNS: 508 * Matching XFER_* value, 0xff if no match found. 509 */ 510 u8 ata_xfer_mask2mode(unsigned long xfer_mask) 511 { 512 int highbit = fls(xfer_mask) - 1; 513 const struct ata_xfer_ent *ent; 514 515 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) 516 if (highbit >= ent->shift && highbit < ent->shift + ent->bits) 517 return ent->base + highbit - ent->shift; 518 return 0xff; 519 } 520 521 /** 522 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_* 523 * @xfer_mode: XFER_* of interest 524 * 525 * Return matching xfer_mask for @xfer_mode. 526 * 527 * LOCKING: 528 * None. 529 * 530 * RETURNS: 531 * Matching xfer_mask, 0 if no match found. 532 */ 533 unsigned long ata_xfer_mode2mask(u8 xfer_mode) 534 { 535 const struct ata_xfer_ent *ent; 536 537 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) 538 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) 539 return ((2 << (ent->shift + xfer_mode - ent->base)) - 1) 540 & ~((1 << ent->shift) - 1); 541 return 0; 542 } 543 544 /** 545 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_* 546 * @xfer_mode: XFER_* of interest 547 * 548 * Return matching xfer_shift for @xfer_mode. 549 * 550 * LOCKING: 551 * None. 552 * 553 * RETURNS: 554 * Matching xfer_shift, -1 if no match found. 555 */ 556 int ata_xfer_mode2shift(unsigned long xfer_mode) 557 { 558 const struct ata_xfer_ent *ent; 559 560 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) 561 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) 562 return ent->shift; 563 return -1; 564 } 565 566 /** 567 * ata_mode_string - convert xfer_mask to string 568 * @xfer_mask: mask of bits supported; only highest bit counts. 569 * 570 * Determine string which represents the highest speed 571 * (highest bit in @modemask). 572 * 573 * LOCKING: 574 * None. 575 * 576 * RETURNS: 577 * Constant C string representing highest speed listed in 578 * @mode_mask, or the constant C string "<n/a>". 579 */ 580 const char *ata_mode_string(unsigned long xfer_mask) 581 { 582 static const char * const xfer_mode_str[] = { 583 "PIO0", 584 "PIO1", 585 "PIO2", 586 "PIO3", 587 "PIO4", 588 "PIO5", 589 "PIO6", 590 "MWDMA0", 591 "MWDMA1", 592 "MWDMA2", 593 "MWDMA3", 594 "MWDMA4", 595 "UDMA/16", 596 "UDMA/25", 597 "UDMA/33", 598 "UDMA/44", 599 "UDMA/66", 600 "UDMA/100", 601 "UDMA/133", 602 "UDMA7", 603 }; 604 int highbit; 605 606 highbit = fls(xfer_mask) - 1; 607 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str)) 608 return xfer_mode_str[highbit]; 609 return "<n/a>"; 610 } 611 612 static const char *sata_spd_string(unsigned int spd) 613 { 614 static const char * const spd_str[] = { 615 "1.5 Gbps", 616 "3.0 Gbps", 617 }; 618 619 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str)) 620 return "<unknown>"; 621 return spd_str[spd - 1]; 622 } 623 624 void ata_dev_disable(struct ata_device *dev) 625 { 626 if (ata_dev_enabled(dev)) { 627 if (ata_msg_drv(dev->link->ap)) 628 ata_dev_printk(dev, KERN_WARNING, "disabled\n"); 629 ata_acpi_on_disable(dev); 630 ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO0 | 631 ATA_DNXFER_QUIET); 632 dev->class++; 633 } 634 } 635 636 static int ata_dev_set_dipm(struct ata_device *dev, enum link_pm policy) 637 { 638 struct ata_link *link = dev->link; 639 struct ata_port *ap = link->ap; 640 u32 scontrol; 641 unsigned int err_mask; 642 int rc; 643 644 /* 645 * disallow DIPM for drivers which haven't set 646 * ATA_FLAG_IPM. This is because when DIPM is enabled, 647 * phy ready will be set in the interrupt status on 648 * state changes, which will cause some drivers to 649 * think there are errors - additionally drivers will 650 * need to disable hot plug. 651 */ 652 if (!(ap->flags & ATA_FLAG_IPM) || !ata_dev_enabled(dev)) { 653 ap->pm_policy = NOT_AVAILABLE; 654 return -EINVAL; 655 } 656 657 /* 658 * For DIPM, we will only enable it for the 659 * min_power setting. 660 * 661 * Why? Because Disks are too stupid to know that 662 * If the host rejects a request to go to SLUMBER 663 * they should retry at PARTIAL, and instead it 664 * just would give up. So, for medium_power to 665 * work at all, we need to only allow HIPM. 666 */ 667 rc = sata_scr_read(link, SCR_CONTROL, &scontrol); 668 if (rc) 669 return rc; 670 671 switch (policy) { 672 case MIN_POWER: 673 /* no restrictions on IPM transitions */ 674 scontrol &= ~(0x3 << 8); 675 rc = sata_scr_write(link, SCR_CONTROL, scontrol); 676 if (rc) 677 return rc; 678 679 /* enable DIPM */ 680 if (dev->flags & ATA_DFLAG_DIPM) 681 err_mask = ata_dev_set_feature(dev, 682 SETFEATURES_SATA_ENABLE, SATA_DIPM); 683 break; 684 case MEDIUM_POWER: 685 /* allow IPM to PARTIAL */ 686 scontrol &= ~(0x1 << 8); 687 scontrol |= (0x2 << 8); 688 rc = sata_scr_write(link, SCR_CONTROL, scontrol); 689 if (rc) 690 return rc; 691 692 /* 693 * we don't have to disable DIPM since IPM flags 694 * disallow transitions to SLUMBER, which effectively 695 * disable DIPM if it does not support PARTIAL 696 */ 697 break; 698 case NOT_AVAILABLE: 699 case MAX_PERFORMANCE: 700 /* disable all IPM transitions */ 701 scontrol |= (0x3 << 8); 702 rc = sata_scr_write(link, SCR_CONTROL, scontrol); 703 if (rc) 704 return rc; 705 706 /* 707 * we don't have to disable DIPM since IPM flags 708 * disallow all transitions which effectively 709 * disable DIPM anyway. 710 */ 711 break; 712 } 713 714 /* FIXME: handle SET FEATURES failure */ 715 (void) err_mask; 716 717 return 0; 718 } 719 720 /** 721 * ata_dev_enable_pm - enable SATA interface power management 722 * @dev: device to enable power management 723 * @policy: the link power management policy 724 * 725 * Enable SATA Interface power management. This will enable 726 * Device Interface Power Management (DIPM) for min_power 727 * policy, and then call driver specific callbacks for 728 * enabling Host Initiated Power management. 729 * 730 * Locking: Caller. 731 * Returns: -EINVAL if IPM is not supported, 0 otherwise. 732 */ 733 void ata_dev_enable_pm(struct ata_device *dev, enum link_pm policy) 734 { 735 int rc = 0; 736 struct ata_port *ap = dev->link->ap; 737 738 /* set HIPM first, then DIPM */ 739 if (ap->ops->enable_pm) 740 rc = ap->ops->enable_pm(ap, policy); 741 if (rc) 742 goto enable_pm_out; 743 rc = ata_dev_set_dipm(dev, policy); 744 745 enable_pm_out: 746 if (rc) 747 ap->pm_policy = MAX_PERFORMANCE; 748 else 749 ap->pm_policy = policy; 750 return /* rc */; /* hopefully we can use 'rc' eventually */ 751 } 752 753 #ifdef CONFIG_PM 754 /** 755 * ata_dev_disable_pm - disable SATA interface power management 756 * @dev: device to disable power management 757 * 758 * Disable SATA Interface power management. This will disable 759 * Device Interface Power Management (DIPM) without changing 760 * policy, call driver specific callbacks for disabling Host 761 * Initiated Power management. 762 * 763 * Locking: Caller. 764 * Returns: void 765 */ 766 static void ata_dev_disable_pm(struct ata_device *dev) 767 { 768 struct ata_port *ap = dev->link->ap; 769 770 ata_dev_set_dipm(dev, MAX_PERFORMANCE); 771 if (ap->ops->disable_pm) 772 ap->ops->disable_pm(ap); 773 } 774 #endif /* CONFIG_PM */ 775 776 void ata_lpm_schedule(struct ata_port *ap, enum link_pm policy) 777 { 778 ap->pm_policy = policy; 779 ap->link.eh_info.action |= ATA_EHI_LPM; 780 ap->link.eh_info.flags |= ATA_EHI_NO_AUTOPSY; 781 ata_port_schedule_eh(ap); 782 } 783 784 #ifdef CONFIG_PM 785 static void ata_lpm_enable(struct ata_host *host) 786 { 787 struct ata_link *link; 788 struct ata_port *ap; 789 struct ata_device *dev; 790 int i; 791 792 for (i = 0; i < host->n_ports; i++) { 793 ap = host->ports[i]; 794 ata_port_for_each_link(link, ap) { 795 ata_link_for_each_dev(dev, link) 796 ata_dev_disable_pm(dev); 797 } 798 } 799 } 800 801 static void ata_lpm_disable(struct ata_host *host) 802 { 803 int i; 804 805 for (i = 0; i < host->n_ports; i++) { 806 struct ata_port *ap = host->ports[i]; 807 ata_lpm_schedule(ap, ap->pm_policy); 808 } 809 } 810 #endif /* CONFIG_PM */ 811 812 813 /** 814 * ata_devchk - PATA device presence detection 815 * @ap: ATA channel to examine 816 * @device: Device to examine (starting at zero) 817 * 818 * This technique was originally described in 819 * Hale Landis's ATADRVR (www.ata-atapi.com), and 820 * later found its way into the ATA/ATAPI spec. 821 * 822 * Write a pattern to the ATA shadow registers, 823 * and if a device is present, it will respond by 824 * correctly storing and echoing back the 825 * ATA shadow register contents. 826 * 827 * LOCKING: 828 * caller. 829 */ 830 831 static unsigned int ata_devchk(struct ata_port *ap, unsigned int device) 832 { 833 struct ata_ioports *ioaddr = &ap->ioaddr; 834 u8 nsect, lbal; 835 836 ap->ops->dev_select(ap, device); 837 838 iowrite8(0x55, ioaddr->nsect_addr); 839 iowrite8(0xaa, ioaddr->lbal_addr); 840 841 iowrite8(0xaa, ioaddr->nsect_addr); 842 iowrite8(0x55, ioaddr->lbal_addr); 843 844 iowrite8(0x55, ioaddr->nsect_addr); 845 iowrite8(0xaa, ioaddr->lbal_addr); 846 847 nsect = ioread8(ioaddr->nsect_addr); 848 lbal = ioread8(ioaddr->lbal_addr); 849 850 if ((nsect == 0x55) && (lbal == 0xaa)) 851 return 1; /* we found a device */ 852 853 return 0; /* nothing found */ 854 } 855 856 /** 857 * ata_dev_classify - determine device type based on ATA-spec signature 858 * @tf: ATA taskfile register set for device to be identified 859 * 860 * Determine from taskfile register contents whether a device is 861 * ATA or ATAPI, as per "Signature and persistence" section 862 * of ATA/PI spec (volume 1, sect 5.14). 863 * 864 * LOCKING: 865 * None. 866 * 867 * RETURNS: 868 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, %ATA_DEV_PMP or 869 * %ATA_DEV_UNKNOWN the event of failure. 870 */ 871 unsigned int ata_dev_classify(const struct ata_taskfile *tf) 872 { 873 /* Apple's open source Darwin code hints that some devices only 874 * put a proper signature into the LBA mid/high registers, 875 * So, we only check those. It's sufficient for uniqueness. 876 * 877 * ATA/ATAPI-7 (d1532v1r1: Feb. 19, 2003) specified separate 878 * signatures for ATA and ATAPI devices attached on SerialATA, 879 * 0x3c/0xc3 and 0x69/0x96 respectively. However, SerialATA 880 * spec has never mentioned about using different signatures 881 * for ATA/ATAPI devices. Then, Serial ATA II: Port 882 * Multiplier specification began to use 0x69/0x96 to identify 883 * port multpliers and 0x3c/0xc3 to identify SEMB device. 884 * ATA/ATAPI-7 dropped descriptions about 0x3c/0xc3 and 885 * 0x69/0x96 shortly and described them as reserved for 886 * SerialATA. 887 * 888 * We follow the current spec and consider that 0x69/0x96 889 * identifies a port multiplier and 0x3c/0xc3 a SEMB device. 890 */ 891 if ((tf->lbam == 0) && (tf->lbah == 0)) { 892 DPRINTK("found ATA device by sig\n"); 893 return ATA_DEV_ATA; 894 } 895 896 if ((tf->lbam == 0x14) && (tf->lbah == 0xeb)) { 897 DPRINTK("found ATAPI device by sig\n"); 898 return ATA_DEV_ATAPI; 899 } 900 901 if ((tf->lbam == 0x69) && (tf->lbah == 0x96)) { 902 DPRINTK("found PMP device by sig\n"); 903 return ATA_DEV_PMP; 904 } 905 906 if ((tf->lbam == 0x3c) && (tf->lbah == 0xc3)) { 907 printk(KERN_INFO "ata: SEMB device ignored\n"); 908 return ATA_DEV_SEMB_UNSUP; /* not yet */ 909 } 910 911 DPRINTK("unknown device\n"); 912 return ATA_DEV_UNKNOWN; 913 } 914 915 /** 916 * ata_dev_try_classify - Parse returned ATA device signature 917 * @dev: ATA device to classify (starting at zero) 918 * @present: device seems present 919 * @r_err: Value of error register on completion 920 * 921 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, 922 * an ATA/ATAPI-defined set of values is placed in the ATA 923 * shadow registers, indicating the results of device detection 924 * and diagnostics. 925 * 926 * Select the ATA device, and read the values from the ATA shadow 927 * registers. Then parse according to the Error register value, 928 * and the spec-defined values examined by ata_dev_classify(). 929 * 930 * LOCKING: 931 * caller. 932 * 933 * RETURNS: 934 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE. 935 */ 936 unsigned int ata_dev_try_classify(struct ata_device *dev, int present, 937 u8 *r_err) 938 { 939 struct ata_port *ap = dev->link->ap; 940 struct ata_taskfile tf; 941 unsigned int class; 942 u8 err; 943 944 ap->ops->dev_select(ap, dev->devno); 945 946 memset(&tf, 0, sizeof(tf)); 947 948 ap->ops->tf_read(ap, &tf); 949 err = tf.feature; 950 if (r_err) 951 *r_err = err; 952 953 /* see if device passed diags: continue and warn later */ 954 if (err == 0) 955 /* diagnostic fail : do nothing _YET_ */ 956 dev->horkage |= ATA_HORKAGE_DIAGNOSTIC; 957 else if (err == 1) 958 /* do nothing */ ; 959 else if ((dev->devno == 0) && (err == 0x81)) 960 /* do nothing */ ; 961 else 962 return ATA_DEV_NONE; 963 964 /* determine if device is ATA or ATAPI */ 965 class = ata_dev_classify(&tf); 966 967 if (class == ATA_DEV_UNKNOWN) { 968 /* If the device failed diagnostic, it's likely to 969 * have reported incorrect device signature too. 970 * Assume ATA device if the device seems present but 971 * device signature is invalid with diagnostic 972 * failure. 973 */ 974 if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC)) 975 class = ATA_DEV_ATA; 976 else 977 class = ATA_DEV_NONE; 978 } else if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) 979 class = ATA_DEV_NONE; 980 981 return class; 982 } 983 984 /** 985 * ata_id_string - Convert IDENTIFY DEVICE page into string 986 * @id: IDENTIFY DEVICE results we will examine 987 * @s: string into which data is output 988 * @ofs: offset into identify device page 989 * @len: length of string to return. must be an even number. 990 * 991 * The strings in the IDENTIFY DEVICE page are broken up into 992 * 16-bit chunks. Run through the string, and output each 993 * 8-bit chunk linearly, regardless of platform. 994 * 995 * LOCKING: 996 * caller. 997 */ 998 999 void ata_id_string(const u16 *id, unsigned char *s, 1000 unsigned int ofs, unsigned int len) 1001 { 1002 unsigned int c; 1003 1004 while (len > 0) { 1005 c = id[ofs] >> 8; 1006 *s = c; 1007 s++; 1008 1009 c = id[ofs] & 0xff; 1010 *s = c; 1011 s++; 1012 1013 ofs++; 1014 len -= 2; 1015 } 1016 } 1017 1018 /** 1019 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string 1020 * @id: IDENTIFY DEVICE results we will examine 1021 * @s: string into which data is output 1022 * @ofs: offset into identify device page 1023 * @len: length of string to return. must be an odd number. 1024 * 1025 * This function is identical to ata_id_string except that it 1026 * trims trailing spaces and terminates the resulting string with 1027 * null. @len must be actual maximum length (even number) + 1. 1028 * 1029 * LOCKING: 1030 * caller. 1031 */ 1032 void ata_id_c_string(const u16 *id, unsigned char *s, 1033 unsigned int ofs, unsigned int len) 1034 { 1035 unsigned char *p; 1036 1037 WARN_ON(!(len & 1)); 1038 1039 ata_id_string(id, s, ofs, len - 1); 1040 1041 p = s + strnlen(s, len - 1); 1042 while (p > s && p[-1] == ' ') 1043 p--; 1044 *p = '\0'; 1045 } 1046 1047 static u64 ata_id_n_sectors(const u16 *id) 1048 { 1049 if (ata_id_has_lba(id)) { 1050 if (ata_id_has_lba48(id)) 1051 return ata_id_u64(id, 100); 1052 else 1053 return ata_id_u32(id, 60); 1054 } else { 1055 if (ata_id_current_chs_valid(id)) 1056 return ata_id_u32(id, 57); 1057 else 1058 return id[1] * id[3] * id[6]; 1059 } 1060 } 1061 1062 static u64 ata_tf_to_lba48(struct ata_taskfile *tf) 1063 { 1064 u64 sectors = 0; 1065 1066 sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40; 1067 sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32; 1068 sectors |= (tf->hob_lbal & 0xff) << 24; 1069 sectors |= (tf->lbah & 0xff) << 16; 1070 sectors |= (tf->lbam & 0xff) << 8; 1071 sectors |= (tf->lbal & 0xff); 1072 1073 return ++sectors; 1074 } 1075 1076 static u64 ata_tf_to_lba(struct ata_taskfile *tf) 1077 { 1078 u64 sectors = 0; 1079 1080 sectors |= (tf->device & 0x0f) << 24; 1081 sectors |= (tf->lbah & 0xff) << 16; 1082 sectors |= (tf->lbam & 0xff) << 8; 1083 sectors |= (tf->lbal & 0xff); 1084 1085 return ++sectors; 1086 } 1087 1088 /** 1089 * ata_read_native_max_address - Read native max address 1090 * @dev: target device 1091 * @max_sectors: out parameter for the result native max address 1092 * 1093 * Perform an LBA48 or LBA28 native size query upon the device in 1094 * question. 1095 * 1096 * RETURNS: 1097 * 0 on success, -EACCES if command is aborted by the drive. 1098 * -EIO on other errors. 1099 */ 1100 static int ata_read_native_max_address(struct ata_device *dev, u64 *max_sectors) 1101 { 1102 unsigned int err_mask; 1103 struct ata_taskfile tf; 1104 int lba48 = ata_id_has_lba48(dev->id); 1105 1106 ata_tf_init(dev, &tf); 1107 1108 /* always clear all address registers */ 1109 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR; 1110 1111 if (lba48) { 1112 tf.command = ATA_CMD_READ_NATIVE_MAX_EXT; 1113 tf.flags |= ATA_TFLAG_LBA48; 1114 } else 1115 tf.command = ATA_CMD_READ_NATIVE_MAX; 1116 1117 tf.protocol |= ATA_PROT_NODATA; 1118 tf.device |= ATA_LBA; 1119 1120 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); 1121 if (err_mask) { 1122 ata_dev_printk(dev, KERN_WARNING, "failed to read native " 1123 "max address (err_mask=0x%x)\n", err_mask); 1124 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED)) 1125 return -EACCES; 1126 return -EIO; 1127 } 1128 1129 if (lba48) 1130 *max_sectors = ata_tf_to_lba48(&tf); 1131 else 1132 *max_sectors = ata_tf_to_lba(&tf); 1133 if (dev->horkage & ATA_HORKAGE_HPA_SIZE) 1134 (*max_sectors)--; 1135 return 0; 1136 } 1137 1138 /** 1139 * ata_set_max_sectors - Set max sectors 1140 * @dev: target device 1141 * @new_sectors: new max sectors value to set for the device 1142 * 1143 * Set max sectors of @dev to @new_sectors. 1144 * 1145 * RETURNS: 1146 * 0 on success, -EACCES if command is aborted or denied (due to 1147 * previous non-volatile SET_MAX) by the drive. -EIO on other 1148 * errors. 1149 */ 1150 static int ata_set_max_sectors(struct ata_device *dev, u64 new_sectors) 1151 { 1152 unsigned int err_mask; 1153 struct ata_taskfile tf; 1154 int lba48 = ata_id_has_lba48(dev->id); 1155 1156 new_sectors--; 1157 1158 ata_tf_init(dev, &tf); 1159 1160 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR; 1161 1162 if (lba48) { 1163 tf.command = ATA_CMD_SET_MAX_EXT; 1164 tf.flags |= ATA_TFLAG_LBA48; 1165 1166 tf.hob_lbal = (new_sectors >> 24) & 0xff; 1167 tf.hob_lbam = (new_sectors >> 32) & 0xff; 1168 tf.hob_lbah = (new_sectors >> 40) & 0xff; 1169 } else { 1170 tf.command = ATA_CMD_SET_MAX; 1171 1172 tf.device |= (new_sectors >> 24) & 0xf; 1173 } 1174 1175 tf.protocol |= ATA_PROT_NODATA; 1176 tf.device |= ATA_LBA; 1177 1178 tf.lbal = (new_sectors >> 0) & 0xff; 1179 tf.lbam = (new_sectors >> 8) & 0xff; 1180 tf.lbah = (new_sectors >> 16) & 0xff; 1181 1182 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); 1183 if (err_mask) { 1184 ata_dev_printk(dev, KERN_WARNING, "failed to set " 1185 "max address (err_mask=0x%x)\n", err_mask); 1186 if (err_mask == AC_ERR_DEV && 1187 (tf.feature & (ATA_ABORTED | ATA_IDNF))) 1188 return -EACCES; 1189 return -EIO; 1190 } 1191 1192 return 0; 1193 } 1194 1195 /** 1196 * ata_hpa_resize - Resize a device with an HPA set 1197 * @dev: Device to resize 1198 * 1199 * Read the size of an LBA28 or LBA48 disk with HPA features and resize 1200 * it if required to the full size of the media. The caller must check 1201 * the drive has the HPA feature set enabled. 1202 * 1203 * RETURNS: 1204 * 0 on success, -errno on failure. 1205 */ 1206 static int ata_hpa_resize(struct ata_device *dev) 1207 { 1208 struct ata_eh_context *ehc = &dev->link->eh_context; 1209 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO; 1210 u64 sectors = ata_id_n_sectors(dev->id); 1211 u64 native_sectors; 1212 int rc; 1213 1214 /* do we need to do it? */ 1215 if (dev->class != ATA_DEV_ATA || 1216 !ata_id_has_lba(dev->id) || !ata_id_hpa_enabled(dev->id) || 1217 (dev->horkage & ATA_HORKAGE_BROKEN_HPA)) 1218 return 0; 1219 1220 /* read native max address */ 1221 rc = ata_read_native_max_address(dev, &native_sectors); 1222 if (rc) { 1223 /* If HPA isn't going to be unlocked, skip HPA 1224 * resizing from the next try. 1225 */ 1226 if (!ata_ignore_hpa) { 1227 ata_dev_printk(dev, KERN_WARNING, "HPA support seems " 1228 "broken, will skip HPA handling\n"); 1229 dev->horkage |= ATA_HORKAGE_BROKEN_HPA; 1230 1231 /* we can continue if device aborted the command */ 1232 if (rc == -EACCES) 1233 rc = 0; 1234 } 1235 1236 return rc; 1237 } 1238 1239 /* nothing to do? */ 1240 if (native_sectors <= sectors || !ata_ignore_hpa) { 1241 if (!print_info || native_sectors == sectors) 1242 return 0; 1243 1244 if (native_sectors > sectors) 1245 ata_dev_printk(dev, KERN_INFO, 1246 "HPA detected: current %llu, native %llu\n", 1247 (unsigned long long)sectors, 1248 (unsigned long long)native_sectors); 1249 else if (native_sectors < sectors) 1250 ata_dev_printk(dev, KERN_WARNING, 1251 "native sectors (%llu) is smaller than " 1252 "sectors (%llu)\n", 1253 (unsigned long long)native_sectors, 1254 (unsigned long long)sectors); 1255 return 0; 1256 } 1257 1258 /* let's unlock HPA */ 1259 rc = ata_set_max_sectors(dev, native_sectors); 1260 if (rc == -EACCES) { 1261 /* if device aborted the command, skip HPA resizing */ 1262 ata_dev_printk(dev, KERN_WARNING, "device aborted resize " 1263 "(%llu -> %llu), skipping HPA handling\n", 1264 (unsigned long long)sectors, 1265 (unsigned long long)native_sectors); 1266 dev->horkage |= ATA_HORKAGE_BROKEN_HPA; 1267 return 0; 1268 } else if (rc) 1269 return rc; 1270 1271 /* re-read IDENTIFY data */ 1272 rc = ata_dev_reread_id(dev, 0); 1273 if (rc) { 1274 ata_dev_printk(dev, KERN_ERR, "failed to re-read IDENTIFY " 1275 "data after HPA resizing\n"); 1276 return rc; 1277 } 1278 1279 if (print_info) { 1280 u64 new_sectors = ata_id_n_sectors(dev->id); 1281 ata_dev_printk(dev, KERN_INFO, 1282 "HPA unlocked: %llu -> %llu, native %llu\n", 1283 (unsigned long long)sectors, 1284 (unsigned long long)new_sectors, 1285 (unsigned long long)native_sectors); 1286 } 1287 1288 return 0; 1289 } 1290 1291 /** 1292 * ata_noop_dev_select - Select device 0/1 on ATA bus 1293 * @ap: ATA channel to manipulate 1294 * @device: ATA device (numbered from zero) to select 1295 * 1296 * This function performs no actual function. 1297 * 1298 * May be used as the dev_select() entry in ata_port_operations. 1299 * 1300 * LOCKING: 1301 * caller. 1302 */ 1303 void ata_noop_dev_select(struct ata_port *ap, unsigned int device) 1304 { 1305 } 1306 1307 1308 /** 1309 * ata_std_dev_select - Select device 0/1 on ATA bus 1310 * @ap: ATA channel to manipulate 1311 * @device: ATA device (numbered from zero) to select 1312 * 1313 * Use the method defined in the ATA specification to 1314 * make either device 0, or device 1, active on the 1315 * ATA channel. Works with both PIO and MMIO. 1316 * 1317 * May be used as the dev_select() entry in ata_port_operations. 1318 * 1319 * LOCKING: 1320 * caller. 1321 */ 1322 1323 void ata_std_dev_select(struct ata_port *ap, unsigned int device) 1324 { 1325 u8 tmp; 1326 1327 if (device == 0) 1328 tmp = ATA_DEVICE_OBS; 1329 else 1330 tmp = ATA_DEVICE_OBS | ATA_DEV1; 1331 1332 iowrite8(tmp, ap->ioaddr.device_addr); 1333 ata_pause(ap); /* needed; also flushes, for mmio */ 1334 } 1335 1336 /** 1337 * ata_dev_select - Select device 0/1 on ATA bus 1338 * @ap: ATA channel to manipulate 1339 * @device: ATA device (numbered from zero) to select 1340 * @wait: non-zero to wait for Status register BSY bit to clear 1341 * @can_sleep: non-zero if context allows sleeping 1342 * 1343 * Use the method defined in the ATA specification to 1344 * make either device 0, or device 1, active on the 1345 * ATA channel. 1346 * 1347 * This is a high-level version of ata_std_dev_select(), 1348 * which additionally provides the services of inserting 1349 * the proper pauses and status polling, where needed. 1350 * 1351 * LOCKING: 1352 * caller. 1353 */ 1354 1355 void ata_dev_select(struct ata_port *ap, unsigned int device, 1356 unsigned int wait, unsigned int can_sleep) 1357 { 1358 if (ata_msg_probe(ap)) 1359 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, " 1360 "device %u, wait %u\n", device, wait); 1361 1362 if (wait) 1363 ata_wait_idle(ap); 1364 1365 ap->ops->dev_select(ap, device); 1366 1367 if (wait) { 1368 if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI) 1369 msleep(150); 1370 ata_wait_idle(ap); 1371 } 1372 } 1373 1374 /** 1375 * ata_dump_id - IDENTIFY DEVICE info debugging output 1376 * @id: IDENTIFY DEVICE page to dump 1377 * 1378 * Dump selected 16-bit words from the given IDENTIFY DEVICE 1379 * page. 1380 * 1381 * LOCKING: 1382 * caller. 1383 */ 1384 1385 static inline void ata_dump_id(const u16 *id) 1386 { 1387 DPRINTK("49==0x%04x " 1388 "53==0x%04x " 1389 "63==0x%04x " 1390 "64==0x%04x " 1391 "75==0x%04x \n", 1392 id[49], 1393 id[53], 1394 id[63], 1395 id[64], 1396 id[75]); 1397 DPRINTK("80==0x%04x " 1398 "81==0x%04x " 1399 "82==0x%04x " 1400 "83==0x%04x " 1401 "84==0x%04x \n", 1402 id[80], 1403 id[81], 1404 id[82], 1405 id[83], 1406 id[84]); 1407 DPRINTK("88==0x%04x " 1408 "93==0x%04x\n", 1409 id[88], 1410 id[93]); 1411 } 1412 1413 /** 1414 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data 1415 * @id: IDENTIFY data to compute xfer mask from 1416 * 1417 * Compute the xfermask for this device. This is not as trivial 1418 * as it seems if we must consider early devices correctly. 1419 * 1420 * FIXME: pre IDE drive timing (do we care ?). 1421 * 1422 * LOCKING: 1423 * None. 1424 * 1425 * RETURNS: 1426 * Computed xfermask 1427 */ 1428 unsigned long ata_id_xfermask(const u16 *id) 1429 { 1430 unsigned long pio_mask, mwdma_mask, udma_mask; 1431 1432 /* Usual case. Word 53 indicates word 64 is valid */ 1433 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) { 1434 pio_mask = id[ATA_ID_PIO_MODES] & 0x03; 1435 pio_mask <<= 3; 1436 pio_mask |= 0x7; 1437 } else { 1438 /* If word 64 isn't valid then Word 51 high byte holds 1439 * the PIO timing number for the maximum. Turn it into 1440 * a mask. 1441 */ 1442 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF; 1443 if (mode < 5) /* Valid PIO range */ 1444 pio_mask = (2 << mode) - 1; 1445 else 1446 pio_mask = 1; 1447 1448 /* But wait.. there's more. Design your standards by 1449 * committee and you too can get a free iordy field to 1450 * process. However its the speeds not the modes that 1451 * are supported... Note drivers using the timing API 1452 * will get this right anyway 1453 */ 1454 } 1455 1456 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07; 1457 1458 if (ata_id_is_cfa(id)) { 1459 /* 1460 * Process compact flash extended modes 1461 */ 1462 int pio = id[163] & 0x7; 1463 int dma = (id[163] >> 3) & 7; 1464 1465 if (pio) 1466 pio_mask |= (1 << 5); 1467 if (pio > 1) 1468 pio_mask |= (1 << 6); 1469 if (dma) 1470 mwdma_mask |= (1 << 3); 1471 if (dma > 1) 1472 mwdma_mask |= (1 << 4); 1473 } 1474 1475 udma_mask = 0; 1476 if (id[ATA_ID_FIELD_VALID] & (1 << 2)) 1477 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff; 1478 1479 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); 1480 } 1481 1482 /** 1483 * ata_pio_queue_task - Queue port_task 1484 * @ap: The ata_port to queue port_task for 1485 * @fn: workqueue function to be scheduled 1486 * @data: data for @fn to use 1487 * @delay: delay time for workqueue function 1488 * 1489 * Schedule @fn(@data) for execution after @delay jiffies using 1490 * port_task. There is one port_task per port and it's the 1491 * user(low level driver)'s responsibility to make sure that only 1492 * one task is active at any given time. 1493 * 1494 * libata core layer takes care of synchronization between 1495 * port_task and EH. ata_pio_queue_task() may be ignored for EH 1496 * synchronization. 1497 * 1498 * LOCKING: 1499 * Inherited from caller. 1500 */ 1501 static void ata_pio_queue_task(struct ata_port *ap, void *data, 1502 unsigned long delay) 1503 { 1504 ap->port_task_data = data; 1505 1506 /* may fail if ata_port_flush_task() in progress */ 1507 queue_delayed_work(ata_wq, &ap->port_task, delay); 1508 } 1509 1510 /** 1511 * ata_port_flush_task - Flush port_task 1512 * @ap: The ata_port to flush port_task for 1513 * 1514 * After this function completes, port_task is guranteed not to 1515 * be running or scheduled. 1516 * 1517 * LOCKING: 1518 * Kernel thread context (may sleep) 1519 */ 1520 void ata_port_flush_task(struct ata_port *ap) 1521 { 1522 DPRINTK("ENTER\n"); 1523 1524 cancel_rearming_delayed_work(&ap->port_task); 1525 1526 if (ata_msg_ctl(ap)) 1527 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__); 1528 } 1529 1530 static void ata_qc_complete_internal(struct ata_queued_cmd *qc) 1531 { 1532 struct completion *waiting = qc->private_data; 1533 1534 complete(waiting); 1535 } 1536 1537 /** 1538 * ata_exec_internal_sg - execute libata internal command 1539 * @dev: Device to which the command is sent 1540 * @tf: Taskfile registers for the command and the result 1541 * @cdb: CDB for packet command 1542 * @dma_dir: Data tranfer direction of the command 1543 * @sgl: sg list for the data buffer of the command 1544 * @n_elem: Number of sg entries 1545 * @timeout: Timeout in msecs (0 for default) 1546 * 1547 * Executes libata internal command with timeout. @tf contains 1548 * command on entry and result on return. Timeout and error 1549 * conditions are reported via return value. No recovery action 1550 * is taken after a command times out. It's caller's duty to 1551 * clean up after timeout. 1552 * 1553 * LOCKING: 1554 * None. Should be called with kernel context, might sleep. 1555 * 1556 * RETURNS: 1557 * Zero on success, AC_ERR_* mask on failure 1558 */ 1559 unsigned ata_exec_internal_sg(struct ata_device *dev, 1560 struct ata_taskfile *tf, const u8 *cdb, 1561 int dma_dir, struct scatterlist *sgl, 1562 unsigned int n_elem, unsigned long timeout) 1563 { 1564 struct ata_link *link = dev->link; 1565 struct ata_port *ap = link->ap; 1566 u8 command = tf->command; 1567 struct ata_queued_cmd *qc; 1568 unsigned int tag, preempted_tag; 1569 u32 preempted_sactive, preempted_qc_active; 1570 int preempted_nr_active_links; 1571 DECLARE_COMPLETION_ONSTACK(wait); 1572 unsigned long flags; 1573 unsigned int err_mask; 1574 int rc; 1575 1576 spin_lock_irqsave(ap->lock, flags); 1577 1578 /* no internal command while frozen */ 1579 if (ap->pflags & ATA_PFLAG_FROZEN) { 1580 spin_unlock_irqrestore(ap->lock, flags); 1581 return AC_ERR_SYSTEM; 1582 } 1583 1584 /* initialize internal qc */ 1585 1586 /* XXX: Tag 0 is used for drivers with legacy EH as some 1587 * drivers choke if any other tag is given. This breaks 1588 * ata_tag_internal() test for those drivers. Don't use new 1589 * EH stuff without converting to it. 1590 */ 1591 if (ap->ops->error_handler) 1592 tag = ATA_TAG_INTERNAL; 1593 else 1594 tag = 0; 1595 1596 if (test_and_set_bit(tag, &ap->qc_allocated)) 1597 BUG(); 1598 qc = __ata_qc_from_tag(ap, tag); 1599 1600 qc->tag = tag; 1601 qc->scsicmd = NULL; 1602 qc->ap = ap; 1603 qc->dev = dev; 1604 ata_qc_reinit(qc); 1605 1606 preempted_tag = link->active_tag; 1607 preempted_sactive = link->sactive; 1608 preempted_qc_active = ap->qc_active; 1609 preempted_nr_active_links = ap->nr_active_links; 1610 link->active_tag = ATA_TAG_POISON; 1611 link->sactive = 0; 1612 ap->qc_active = 0; 1613 ap->nr_active_links = 0; 1614 1615 /* prepare & issue qc */ 1616 qc->tf = *tf; 1617 if (cdb) 1618 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN); 1619 qc->flags |= ATA_QCFLAG_RESULT_TF; 1620 qc->dma_dir = dma_dir; 1621 if (dma_dir != DMA_NONE) { 1622 unsigned int i, buflen = 0; 1623 struct scatterlist *sg; 1624 1625 for_each_sg(sgl, sg, n_elem, i) 1626 buflen += sg->length; 1627 1628 ata_sg_init(qc, sgl, n_elem); 1629 qc->nbytes = buflen; 1630 } 1631 1632 qc->private_data = &wait; 1633 qc->complete_fn = ata_qc_complete_internal; 1634 1635 ata_qc_issue(qc); 1636 1637 spin_unlock_irqrestore(ap->lock, flags); 1638 1639 if (!timeout) 1640 timeout = ata_probe_timeout * 1000 / HZ; 1641 1642 rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout)); 1643 1644 ata_port_flush_task(ap); 1645 1646 if (!rc) { 1647 spin_lock_irqsave(ap->lock, flags); 1648 1649 /* We're racing with irq here. If we lose, the 1650 * following test prevents us from completing the qc 1651 * twice. If we win, the port is frozen and will be 1652 * cleaned up by ->post_internal_cmd(). 1653 */ 1654 if (qc->flags & ATA_QCFLAG_ACTIVE) { 1655 qc->err_mask |= AC_ERR_TIMEOUT; 1656 1657 if (ap->ops->error_handler) 1658 ata_port_freeze(ap); 1659 else 1660 ata_qc_complete(qc); 1661 1662 if (ata_msg_warn(ap)) 1663 ata_dev_printk(dev, KERN_WARNING, 1664 "qc timeout (cmd 0x%x)\n", command); 1665 } 1666 1667 spin_unlock_irqrestore(ap->lock, flags); 1668 } 1669 1670 /* do post_internal_cmd */ 1671 if (ap->ops->post_internal_cmd) 1672 ap->ops->post_internal_cmd(qc); 1673 1674 /* perform minimal error analysis */ 1675 if (qc->flags & ATA_QCFLAG_FAILED) { 1676 if (qc->result_tf.command & (ATA_ERR | ATA_DF)) 1677 qc->err_mask |= AC_ERR_DEV; 1678 1679 if (!qc->err_mask) 1680 qc->err_mask |= AC_ERR_OTHER; 1681 1682 if (qc->err_mask & ~AC_ERR_OTHER) 1683 qc->err_mask &= ~AC_ERR_OTHER; 1684 } 1685 1686 /* finish up */ 1687 spin_lock_irqsave(ap->lock, flags); 1688 1689 *tf = qc->result_tf; 1690 err_mask = qc->err_mask; 1691 1692 ata_qc_free(qc); 1693 link->active_tag = preempted_tag; 1694 link->sactive = preempted_sactive; 1695 ap->qc_active = preempted_qc_active; 1696 ap->nr_active_links = preempted_nr_active_links; 1697 1698 /* XXX - Some LLDDs (sata_mv) disable port on command failure. 1699 * Until those drivers are fixed, we detect the condition 1700 * here, fail the command with AC_ERR_SYSTEM and reenable the 1701 * port. 1702 * 1703 * Note that this doesn't change any behavior as internal 1704 * command failure results in disabling the device in the 1705 * higher layer for LLDDs without new reset/EH callbacks. 1706 * 1707 * Kill the following code as soon as those drivers are fixed. 1708 */ 1709 if (ap->flags & ATA_FLAG_DISABLED) { 1710 err_mask |= AC_ERR_SYSTEM; 1711 ata_port_probe(ap); 1712 } 1713 1714 spin_unlock_irqrestore(ap->lock, flags); 1715 1716 return err_mask; 1717 } 1718 1719 /** 1720 * ata_exec_internal - execute libata internal command 1721 * @dev: Device to which the command is sent 1722 * @tf: Taskfile registers for the command and the result 1723 * @cdb: CDB for packet command 1724 * @dma_dir: Data tranfer direction of the command 1725 * @buf: Data buffer of the command 1726 * @buflen: Length of data buffer 1727 * @timeout: Timeout in msecs (0 for default) 1728 * 1729 * Wrapper around ata_exec_internal_sg() which takes simple 1730 * buffer instead of sg list. 1731 * 1732 * LOCKING: 1733 * None. Should be called with kernel context, might sleep. 1734 * 1735 * RETURNS: 1736 * Zero on success, AC_ERR_* mask on failure 1737 */ 1738 unsigned ata_exec_internal(struct ata_device *dev, 1739 struct ata_taskfile *tf, const u8 *cdb, 1740 int dma_dir, void *buf, unsigned int buflen, 1741 unsigned long timeout) 1742 { 1743 struct scatterlist *psg = NULL, sg; 1744 unsigned int n_elem = 0; 1745 1746 if (dma_dir != DMA_NONE) { 1747 WARN_ON(!buf); 1748 sg_init_one(&sg, buf, buflen); 1749 psg = &sg; 1750 n_elem++; 1751 } 1752 1753 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem, 1754 timeout); 1755 } 1756 1757 /** 1758 * ata_do_simple_cmd - execute simple internal command 1759 * @dev: Device to which the command is sent 1760 * @cmd: Opcode to execute 1761 * 1762 * Execute a 'simple' command, that only consists of the opcode 1763 * 'cmd' itself, without filling any other registers 1764 * 1765 * LOCKING: 1766 * Kernel thread context (may sleep). 1767 * 1768 * RETURNS: 1769 * Zero on success, AC_ERR_* mask on failure 1770 */ 1771 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd) 1772 { 1773 struct ata_taskfile tf; 1774 1775 ata_tf_init(dev, &tf); 1776 1777 tf.command = cmd; 1778 tf.flags |= ATA_TFLAG_DEVICE; 1779 tf.protocol = ATA_PROT_NODATA; 1780 1781 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); 1782 } 1783 1784 /** 1785 * ata_pio_need_iordy - check if iordy needed 1786 * @adev: ATA device 1787 * 1788 * Check if the current speed of the device requires IORDY. Used 1789 * by various controllers for chip configuration. 1790 */ 1791 1792 unsigned int ata_pio_need_iordy(const struct ata_device *adev) 1793 { 1794 /* Controller doesn't support IORDY. Probably a pointless check 1795 as the caller should know this */ 1796 if (adev->link->ap->flags & ATA_FLAG_NO_IORDY) 1797 return 0; 1798 /* PIO3 and higher it is mandatory */ 1799 if (adev->pio_mode > XFER_PIO_2) 1800 return 1; 1801 /* We turn it on when possible */ 1802 if (ata_id_has_iordy(adev->id)) 1803 return 1; 1804 return 0; 1805 } 1806 1807 /** 1808 * ata_pio_mask_no_iordy - Return the non IORDY mask 1809 * @adev: ATA device 1810 * 1811 * Compute the highest mode possible if we are not using iordy. Return 1812 * -1 if no iordy mode is available. 1813 */ 1814 1815 static u32 ata_pio_mask_no_iordy(const struct ata_device *adev) 1816 { 1817 /* If we have no drive specific rule, then PIO 2 is non IORDY */ 1818 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */ 1819 u16 pio = adev->id[ATA_ID_EIDE_PIO]; 1820 /* Is the speed faster than the drive allows non IORDY ? */ 1821 if (pio) { 1822 /* This is cycle times not frequency - watch the logic! */ 1823 if (pio > 240) /* PIO2 is 240nS per cycle */ 1824 return 3 << ATA_SHIFT_PIO; 1825 return 7 << ATA_SHIFT_PIO; 1826 } 1827 } 1828 return 3 << ATA_SHIFT_PIO; 1829 } 1830 1831 /** 1832 * ata_dev_read_id - Read ID data from the specified device 1833 * @dev: target device 1834 * @p_class: pointer to class of the target device (may be changed) 1835 * @flags: ATA_READID_* flags 1836 * @id: buffer to read IDENTIFY data into 1837 * 1838 * Read ID data from the specified device. ATA_CMD_ID_ATA is 1839 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI 1840 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS 1841 * for pre-ATA4 drives. 1842 * 1843 * FIXME: ATA_CMD_ID_ATA is optional for early drives and right 1844 * now we abort if we hit that case. 1845 * 1846 * LOCKING: 1847 * Kernel thread context (may sleep) 1848 * 1849 * RETURNS: 1850 * 0 on success, -errno otherwise. 1851 */ 1852 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class, 1853 unsigned int flags, u16 *id) 1854 { 1855 struct ata_port *ap = dev->link->ap; 1856 unsigned int class = *p_class; 1857 struct ata_taskfile tf; 1858 unsigned int err_mask = 0; 1859 const char *reason; 1860 int may_fallback = 1, tried_spinup = 0; 1861 int rc; 1862 1863 if (ata_msg_ctl(ap)) 1864 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__); 1865 1866 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */ 1867 retry: 1868 ata_tf_init(dev, &tf); 1869 1870 switch (class) { 1871 case ATA_DEV_ATA: 1872 tf.command = ATA_CMD_ID_ATA; 1873 break; 1874 case ATA_DEV_ATAPI: 1875 tf.command = ATA_CMD_ID_ATAPI; 1876 break; 1877 default: 1878 rc = -ENODEV; 1879 reason = "unsupported class"; 1880 goto err_out; 1881 } 1882 1883 tf.protocol = ATA_PROT_PIO; 1884 1885 /* Some devices choke if TF registers contain garbage. Make 1886 * sure those are properly initialized. 1887 */ 1888 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 1889 1890 /* Device presence detection is unreliable on some 1891 * controllers. Always poll IDENTIFY if available. 1892 */ 1893 tf.flags |= ATA_TFLAG_POLLING; 1894 1895 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE, 1896 id, sizeof(id[0]) * ATA_ID_WORDS, 0); 1897 if (err_mask) { 1898 if (err_mask & AC_ERR_NODEV_HINT) { 1899 DPRINTK("ata%u.%d: NODEV after polling detection\n", 1900 ap->print_id, dev->devno); 1901 return -ENOENT; 1902 } 1903 1904 /* Device or controller might have reported the wrong 1905 * device class. Give a shot at the other IDENTIFY if 1906 * the current one is aborted by the device. 1907 */ 1908 if (may_fallback && 1909 (err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) { 1910 may_fallback = 0; 1911 1912 if (class == ATA_DEV_ATA) 1913 class = ATA_DEV_ATAPI; 1914 else 1915 class = ATA_DEV_ATA; 1916 goto retry; 1917 } 1918 1919 rc = -EIO; 1920 reason = "I/O error"; 1921 goto err_out; 1922 } 1923 1924 /* Falling back doesn't make sense if ID data was read 1925 * successfully at least once. 1926 */ 1927 may_fallback = 0; 1928 1929 swap_buf_le16(id, ATA_ID_WORDS); 1930 1931 /* sanity check */ 1932 rc = -EINVAL; 1933 reason = "device reports invalid type"; 1934 1935 if (class == ATA_DEV_ATA) { 1936 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id)) 1937 goto err_out; 1938 } else { 1939 if (ata_id_is_ata(id)) 1940 goto err_out; 1941 } 1942 1943 if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) { 1944 tried_spinup = 1; 1945 /* 1946 * Drive powered-up in standby mode, and requires a specific 1947 * SET_FEATURES spin-up subcommand before it will accept 1948 * anything other than the original IDENTIFY command. 1949 */ 1950 err_mask = ata_dev_set_feature(dev, SETFEATURES_SPINUP, 0); 1951 if (err_mask && id[2] != 0x738c) { 1952 rc = -EIO; 1953 reason = "SPINUP failed"; 1954 goto err_out; 1955 } 1956 /* 1957 * If the drive initially returned incomplete IDENTIFY info, 1958 * we now must reissue the IDENTIFY command. 1959 */ 1960 if (id[2] == 0x37c8) 1961 goto retry; 1962 } 1963 1964 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) { 1965 /* 1966 * The exact sequence expected by certain pre-ATA4 drives is: 1967 * SRST RESET 1968 * IDENTIFY (optional in early ATA) 1969 * INITIALIZE DEVICE PARAMETERS (later IDE and ATA) 1970 * anything else.. 1971 * Some drives were very specific about that exact sequence. 1972 * 1973 * Note that ATA4 says lba is mandatory so the second check 1974 * shoud never trigger. 1975 */ 1976 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) { 1977 err_mask = ata_dev_init_params(dev, id[3], id[6]); 1978 if (err_mask) { 1979 rc = -EIO; 1980 reason = "INIT_DEV_PARAMS failed"; 1981 goto err_out; 1982 } 1983 1984 /* current CHS translation info (id[53-58]) might be 1985 * changed. reread the identify device info. 1986 */ 1987 flags &= ~ATA_READID_POSTRESET; 1988 goto retry; 1989 } 1990 } 1991 1992 *p_class = class; 1993 1994 return 0; 1995 1996 err_out: 1997 if (ata_msg_warn(ap)) 1998 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY " 1999 "(%s, err_mask=0x%x)\n", reason, err_mask); 2000 return rc; 2001 } 2002 2003 static inline u8 ata_dev_knobble(struct ata_device *dev) 2004 { 2005 struct ata_port *ap = dev->link->ap; 2006 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id))); 2007 } 2008 2009 static void ata_dev_config_ncq(struct ata_device *dev, 2010 char *desc, size_t desc_sz) 2011 { 2012 struct ata_port *ap = dev->link->ap; 2013 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id); 2014 2015 if (!ata_id_has_ncq(dev->id)) { 2016 desc[0] = '\0'; 2017 return; 2018 } 2019 if (dev->horkage & ATA_HORKAGE_NONCQ) { 2020 snprintf(desc, desc_sz, "NCQ (not used)"); 2021 return; 2022 } 2023 if (ap->flags & ATA_FLAG_NCQ) { 2024 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1); 2025 dev->flags |= ATA_DFLAG_NCQ; 2026 } 2027 2028 if (hdepth >= ddepth) 2029 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth); 2030 else 2031 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth); 2032 } 2033 2034 /** 2035 * ata_dev_configure - Configure the specified ATA/ATAPI device 2036 * @dev: Target device to configure 2037 * 2038 * Configure @dev according to @dev->id. Generic and low-level 2039 * driver specific fixups are also applied. 2040 * 2041 * LOCKING: 2042 * Kernel thread context (may sleep) 2043 * 2044 * RETURNS: 2045 * 0 on success, -errno otherwise 2046 */ 2047 int ata_dev_configure(struct ata_device *dev) 2048 { 2049 struct ata_port *ap = dev->link->ap; 2050 struct ata_eh_context *ehc = &dev->link->eh_context; 2051 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO; 2052 const u16 *id = dev->id; 2053 unsigned long xfer_mask; 2054 char revbuf[7]; /* XYZ-99\0 */ 2055 char fwrevbuf[ATA_ID_FW_REV_LEN+1]; 2056 char modelbuf[ATA_ID_PROD_LEN+1]; 2057 int rc; 2058 2059 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) { 2060 ata_dev_printk(dev, KERN_INFO, "%s: ENTER/EXIT -- nodev\n", 2061 __FUNCTION__); 2062 return 0; 2063 } 2064 2065 if (ata_msg_probe(ap)) 2066 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__); 2067 2068 /* set horkage */ 2069 dev->horkage |= ata_dev_blacklisted(dev); 2070 2071 /* let ACPI work its magic */ 2072 rc = ata_acpi_on_devcfg(dev); 2073 if (rc) 2074 return rc; 2075 2076 /* massage HPA, do it early as it might change IDENTIFY data */ 2077 rc = ata_hpa_resize(dev); 2078 if (rc) 2079 return rc; 2080 2081 /* print device capabilities */ 2082 if (ata_msg_probe(ap)) 2083 ata_dev_printk(dev, KERN_DEBUG, 2084 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x " 2085 "85:%04x 86:%04x 87:%04x 88:%04x\n", 2086 __FUNCTION__, 2087 id[49], id[82], id[83], id[84], 2088 id[85], id[86], id[87], id[88]); 2089 2090 /* initialize to-be-configured parameters */ 2091 dev->flags &= ~ATA_DFLAG_CFG_MASK; 2092 dev->max_sectors = 0; 2093 dev->cdb_len = 0; 2094 dev->n_sectors = 0; 2095 dev->cylinders = 0; 2096 dev->heads = 0; 2097 dev->sectors = 0; 2098 2099 /* 2100 * common ATA, ATAPI feature tests 2101 */ 2102 2103 /* find max transfer mode; for printk only */ 2104 xfer_mask = ata_id_xfermask(id); 2105 2106 if (ata_msg_probe(ap)) 2107 ata_dump_id(id); 2108 2109 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */ 2110 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV, 2111 sizeof(fwrevbuf)); 2112 2113 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD, 2114 sizeof(modelbuf)); 2115 2116 /* ATA-specific feature tests */ 2117 if (dev->class == ATA_DEV_ATA) { 2118 if (ata_id_is_cfa(id)) { 2119 if (id[162] & 1) /* CPRM may make this media unusable */ 2120 ata_dev_printk(dev, KERN_WARNING, 2121 "supports DRM functions and may " 2122 "not be fully accessable.\n"); 2123 snprintf(revbuf, 7, "CFA"); 2124 } else { 2125 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id)); 2126 /* Warn the user if the device has TPM extensions */ 2127 if (ata_id_has_tpm(id)) 2128 ata_dev_printk(dev, KERN_WARNING, 2129 "supports DRM functions and may " 2130 "not be fully accessable.\n"); 2131 } 2132 2133 dev->n_sectors = ata_id_n_sectors(id); 2134 2135 if (dev->id[59] & 0x100) 2136 dev->multi_count = dev->id[59] & 0xff; 2137 2138 if (ata_id_has_lba(id)) { 2139 const char *lba_desc; 2140 char ncq_desc[20]; 2141 2142 lba_desc = "LBA"; 2143 dev->flags |= ATA_DFLAG_LBA; 2144 if (ata_id_has_lba48(id)) { 2145 dev->flags |= ATA_DFLAG_LBA48; 2146 lba_desc = "LBA48"; 2147 2148 if (dev->n_sectors >= (1UL << 28) && 2149 ata_id_has_flush_ext(id)) 2150 dev->flags |= ATA_DFLAG_FLUSH_EXT; 2151 } 2152 2153 /* config NCQ */ 2154 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc)); 2155 2156 /* print device info to dmesg */ 2157 if (ata_msg_drv(ap) && print_info) { 2158 ata_dev_printk(dev, KERN_INFO, 2159 "%s: %s, %s, max %s\n", 2160 revbuf, modelbuf, fwrevbuf, 2161 ata_mode_string(xfer_mask)); 2162 ata_dev_printk(dev, KERN_INFO, 2163 "%Lu sectors, multi %u: %s %s\n", 2164 (unsigned long long)dev->n_sectors, 2165 dev->multi_count, lba_desc, ncq_desc); 2166 } 2167 } else { 2168 /* CHS */ 2169 2170 /* Default translation */ 2171 dev->cylinders = id[1]; 2172 dev->heads = id[3]; 2173 dev->sectors = id[6]; 2174 2175 if (ata_id_current_chs_valid(id)) { 2176 /* Current CHS translation is valid. */ 2177 dev->cylinders = id[54]; 2178 dev->heads = id[55]; 2179 dev->sectors = id[56]; 2180 } 2181 2182 /* print device info to dmesg */ 2183 if (ata_msg_drv(ap) && print_info) { 2184 ata_dev_printk(dev, KERN_INFO, 2185 "%s: %s, %s, max %s\n", 2186 revbuf, modelbuf, fwrevbuf, 2187 ata_mode_string(xfer_mask)); 2188 ata_dev_printk(dev, KERN_INFO, 2189 "%Lu sectors, multi %u, CHS %u/%u/%u\n", 2190 (unsigned long long)dev->n_sectors, 2191 dev->multi_count, dev->cylinders, 2192 dev->heads, dev->sectors); 2193 } 2194 } 2195 2196 dev->cdb_len = 16; 2197 } 2198 2199 /* ATAPI-specific feature tests */ 2200 else if (dev->class == ATA_DEV_ATAPI) { 2201 const char *cdb_intr_string = ""; 2202 const char *atapi_an_string = ""; 2203 u32 sntf; 2204 2205 rc = atapi_cdb_len(id); 2206 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { 2207 if (ata_msg_warn(ap)) 2208 ata_dev_printk(dev, KERN_WARNING, 2209 "unsupported CDB len\n"); 2210 rc = -EINVAL; 2211 goto err_out_nosup; 2212 } 2213 dev->cdb_len = (unsigned int) rc; 2214 2215 /* Enable ATAPI AN if both the host and device have 2216 * the support. If PMP is attached, SNTF is required 2217 * to enable ATAPI AN to discern between PHY status 2218 * changed notifications and ATAPI ANs. 2219 */ 2220 if ((ap->flags & ATA_FLAG_AN) && ata_id_has_atapi_AN(id) && 2221 (!ap->nr_pmp_links || 2222 sata_scr_read(&ap->link, SCR_NOTIFICATION, &sntf) == 0)) { 2223 unsigned int err_mask; 2224 2225 /* issue SET feature command to turn this on */ 2226 err_mask = ata_dev_set_feature(dev, 2227 SETFEATURES_SATA_ENABLE, SATA_AN); 2228 if (err_mask) 2229 ata_dev_printk(dev, KERN_ERR, 2230 "failed to enable ATAPI AN " 2231 "(err_mask=0x%x)\n", err_mask); 2232 else { 2233 dev->flags |= ATA_DFLAG_AN; 2234 atapi_an_string = ", ATAPI AN"; 2235 } 2236 } 2237 2238 if (ata_id_cdb_intr(dev->id)) { 2239 dev->flags |= ATA_DFLAG_CDB_INTR; 2240 cdb_intr_string = ", CDB intr"; 2241 } 2242 2243 /* print device info to dmesg */ 2244 if (ata_msg_drv(ap) && print_info) 2245 ata_dev_printk(dev, KERN_INFO, 2246 "ATAPI: %s, %s, max %s%s%s\n", 2247 modelbuf, fwrevbuf, 2248 ata_mode_string(xfer_mask), 2249 cdb_intr_string, atapi_an_string); 2250 } 2251 2252 /* determine max_sectors */ 2253 dev->max_sectors = ATA_MAX_SECTORS; 2254 if (dev->flags & ATA_DFLAG_LBA48) 2255 dev->max_sectors = ATA_MAX_SECTORS_LBA48; 2256 2257 if (!(dev->horkage & ATA_HORKAGE_IPM)) { 2258 if (ata_id_has_hipm(dev->id)) 2259 dev->flags |= ATA_DFLAG_HIPM; 2260 if (ata_id_has_dipm(dev->id)) 2261 dev->flags |= ATA_DFLAG_DIPM; 2262 } 2263 2264 /* Limit PATA drive on SATA cable bridge transfers to udma5, 2265 200 sectors */ 2266 if (ata_dev_knobble(dev)) { 2267 if (ata_msg_drv(ap) && print_info) 2268 ata_dev_printk(dev, KERN_INFO, 2269 "applying bridge limits\n"); 2270 dev->udma_mask &= ATA_UDMA5; 2271 dev->max_sectors = ATA_MAX_SECTORS; 2272 } 2273 2274 if ((dev->class == ATA_DEV_ATAPI) && 2275 (atapi_command_packet_set(id) == TYPE_TAPE)) { 2276 dev->max_sectors = ATA_MAX_SECTORS_TAPE; 2277 dev->horkage |= ATA_HORKAGE_STUCK_ERR; 2278 } 2279 2280 if (dev->horkage & ATA_HORKAGE_MAX_SEC_128) 2281 dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128, 2282 dev->max_sectors); 2283 2284 if (ata_dev_blacklisted(dev) & ATA_HORKAGE_IPM) { 2285 dev->horkage |= ATA_HORKAGE_IPM; 2286 2287 /* reset link pm_policy for this port to no pm */ 2288 ap->pm_policy = MAX_PERFORMANCE; 2289 } 2290 2291 if (ap->ops->dev_config) 2292 ap->ops->dev_config(dev); 2293 2294 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) { 2295 /* Let the user know. We don't want to disallow opens for 2296 rescue purposes, or in case the vendor is just a blithering 2297 idiot. Do this after the dev_config call as some controllers 2298 with buggy firmware may want to avoid reporting false device 2299 bugs */ 2300 2301 if (print_info) { 2302 ata_dev_printk(dev, KERN_WARNING, 2303 "Drive reports diagnostics failure. This may indicate a drive\n"); 2304 ata_dev_printk(dev, KERN_WARNING, 2305 "fault or invalid emulation. Contact drive vendor for information.\n"); 2306 } 2307 } 2308 2309 if (ata_msg_probe(ap)) 2310 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n", 2311 __FUNCTION__, ata_chk_status(ap)); 2312 return 0; 2313 2314 err_out_nosup: 2315 if (ata_msg_probe(ap)) 2316 ata_dev_printk(dev, KERN_DEBUG, 2317 "%s: EXIT, err\n", __FUNCTION__); 2318 return rc; 2319 } 2320 2321 /** 2322 * ata_cable_40wire - return 40 wire cable type 2323 * @ap: port 2324 * 2325 * Helper method for drivers which want to hardwire 40 wire cable 2326 * detection. 2327 */ 2328 2329 int ata_cable_40wire(struct ata_port *ap) 2330 { 2331 return ATA_CBL_PATA40; 2332 } 2333 2334 /** 2335 * ata_cable_80wire - return 80 wire cable type 2336 * @ap: port 2337 * 2338 * Helper method for drivers which want to hardwire 80 wire cable 2339 * detection. 2340 */ 2341 2342 int ata_cable_80wire(struct ata_port *ap) 2343 { 2344 return ATA_CBL_PATA80; 2345 } 2346 2347 /** 2348 * ata_cable_unknown - return unknown PATA cable. 2349 * @ap: port 2350 * 2351 * Helper method for drivers which have no PATA cable detection. 2352 */ 2353 2354 int ata_cable_unknown(struct ata_port *ap) 2355 { 2356 return ATA_CBL_PATA_UNK; 2357 } 2358 2359 /** 2360 * ata_cable_ignore - return ignored PATA cable. 2361 * @ap: port 2362 * 2363 * Helper method for drivers which don't use cable type to limit 2364 * transfer mode. 2365 */ 2366 int ata_cable_ignore(struct ata_port *ap) 2367 { 2368 return ATA_CBL_PATA_IGN; 2369 } 2370 2371 /** 2372 * ata_cable_sata - return SATA cable type 2373 * @ap: port 2374 * 2375 * Helper method for drivers which have SATA cables 2376 */ 2377 2378 int ata_cable_sata(struct ata_port *ap) 2379 { 2380 return ATA_CBL_SATA; 2381 } 2382 2383 /** 2384 * ata_bus_probe - Reset and probe ATA bus 2385 * @ap: Bus to probe 2386 * 2387 * Master ATA bus probing function. Initiates a hardware-dependent 2388 * bus reset, then attempts to identify any devices found on 2389 * the bus. 2390 * 2391 * LOCKING: 2392 * PCI/etc. bus probe sem. 2393 * 2394 * RETURNS: 2395 * Zero on success, negative errno otherwise. 2396 */ 2397 2398 int ata_bus_probe(struct ata_port *ap) 2399 { 2400 unsigned int classes[ATA_MAX_DEVICES]; 2401 int tries[ATA_MAX_DEVICES]; 2402 int rc; 2403 struct ata_device *dev; 2404 2405 ata_port_probe(ap); 2406 2407 ata_link_for_each_dev(dev, &ap->link) 2408 tries[dev->devno] = ATA_PROBE_MAX_TRIES; 2409 2410 retry: 2411 ata_link_for_each_dev(dev, &ap->link) { 2412 /* If we issue an SRST then an ATA drive (not ATAPI) 2413 * may change configuration and be in PIO0 timing. If 2414 * we do a hard reset (or are coming from power on) 2415 * this is true for ATA or ATAPI. Until we've set a 2416 * suitable controller mode we should not touch the 2417 * bus as we may be talking too fast. 2418 */ 2419 dev->pio_mode = XFER_PIO_0; 2420 2421 /* If the controller has a pio mode setup function 2422 * then use it to set the chipset to rights. Don't 2423 * touch the DMA setup as that will be dealt with when 2424 * configuring devices. 2425 */ 2426 if (ap->ops->set_piomode) 2427 ap->ops->set_piomode(ap, dev); 2428 } 2429 2430 /* reset and determine device classes */ 2431 ap->ops->phy_reset(ap); 2432 2433 ata_link_for_each_dev(dev, &ap->link) { 2434 if (!(ap->flags & ATA_FLAG_DISABLED) && 2435 dev->class != ATA_DEV_UNKNOWN) 2436 classes[dev->devno] = dev->class; 2437 else 2438 classes[dev->devno] = ATA_DEV_NONE; 2439 2440 dev->class = ATA_DEV_UNKNOWN; 2441 } 2442 2443 ata_port_probe(ap); 2444 2445 /* read IDENTIFY page and configure devices. We have to do the identify 2446 specific sequence bass-ackwards so that PDIAG- is released by 2447 the slave device */ 2448 2449 ata_link_for_each_dev(dev, &ap->link) { 2450 if (tries[dev->devno]) 2451 dev->class = classes[dev->devno]; 2452 2453 if (!ata_dev_enabled(dev)) 2454 continue; 2455 2456 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET, 2457 dev->id); 2458 if (rc) 2459 goto fail; 2460 } 2461 2462 /* Now ask for the cable type as PDIAG- should have been released */ 2463 if (ap->ops->cable_detect) 2464 ap->cbl = ap->ops->cable_detect(ap); 2465 2466 /* We may have SATA bridge glue hiding here irrespective of the 2467 reported cable types and sensed types */ 2468 ata_link_for_each_dev(dev, &ap->link) { 2469 if (!ata_dev_enabled(dev)) 2470 continue; 2471 /* SATA drives indicate we have a bridge. We don't know which 2472 end of the link the bridge is which is a problem */ 2473 if (ata_id_is_sata(dev->id)) 2474 ap->cbl = ATA_CBL_SATA; 2475 } 2476 2477 /* After the identify sequence we can now set up the devices. We do 2478 this in the normal order so that the user doesn't get confused */ 2479 2480 ata_link_for_each_dev(dev, &ap->link) { 2481 if (!ata_dev_enabled(dev)) 2482 continue; 2483 2484 ap->link.eh_context.i.flags |= ATA_EHI_PRINTINFO; 2485 rc = ata_dev_configure(dev); 2486 ap->link.eh_context.i.flags &= ~ATA_EHI_PRINTINFO; 2487 if (rc) 2488 goto fail; 2489 } 2490 2491 /* configure transfer mode */ 2492 rc = ata_set_mode(&ap->link, &dev); 2493 if (rc) 2494 goto fail; 2495 2496 ata_link_for_each_dev(dev, &ap->link) 2497 if (ata_dev_enabled(dev)) 2498 return 0; 2499 2500 /* no device present, disable port */ 2501 ata_port_disable(ap); 2502 return -ENODEV; 2503 2504 fail: 2505 tries[dev->devno]--; 2506 2507 switch (rc) { 2508 case -EINVAL: 2509 /* eeek, something went very wrong, give up */ 2510 tries[dev->devno] = 0; 2511 break; 2512 2513 case -ENODEV: 2514 /* give it just one more chance */ 2515 tries[dev->devno] = min(tries[dev->devno], 1); 2516 case -EIO: 2517 if (tries[dev->devno] == 1) { 2518 /* This is the last chance, better to slow 2519 * down than lose it. 2520 */ 2521 sata_down_spd_limit(&ap->link); 2522 ata_down_xfermask_limit(dev, ATA_DNXFER_PIO); 2523 } 2524 } 2525 2526 if (!tries[dev->devno]) 2527 ata_dev_disable(dev); 2528 2529 goto retry; 2530 } 2531 2532 /** 2533 * ata_port_probe - Mark port as enabled 2534 * @ap: Port for which we indicate enablement 2535 * 2536 * Modify @ap data structure such that the system 2537 * thinks that the entire port is enabled. 2538 * 2539 * LOCKING: host lock, or some other form of 2540 * serialization. 2541 */ 2542 2543 void ata_port_probe(struct ata_port *ap) 2544 { 2545 ap->flags &= ~ATA_FLAG_DISABLED; 2546 } 2547 2548 /** 2549 * sata_print_link_status - Print SATA link status 2550 * @link: SATA link to printk link status about 2551 * 2552 * This function prints link speed and status of a SATA link. 2553 * 2554 * LOCKING: 2555 * None. 2556 */ 2557 void sata_print_link_status(struct ata_link *link) 2558 { 2559 u32 sstatus, scontrol, tmp; 2560 2561 if (sata_scr_read(link, SCR_STATUS, &sstatus)) 2562 return; 2563 sata_scr_read(link, SCR_CONTROL, &scontrol); 2564 2565 if (ata_link_online(link)) { 2566 tmp = (sstatus >> 4) & 0xf; 2567 ata_link_printk(link, KERN_INFO, 2568 "SATA link up %s (SStatus %X SControl %X)\n", 2569 sata_spd_string(tmp), sstatus, scontrol); 2570 } else { 2571 ata_link_printk(link, KERN_INFO, 2572 "SATA link down (SStatus %X SControl %X)\n", 2573 sstatus, scontrol); 2574 } 2575 } 2576 2577 /** 2578 * ata_dev_pair - return other device on cable 2579 * @adev: device 2580 * 2581 * Obtain the other device on the same cable, or if none is 2582 * present NULL is returned 2583 */ 2584 2585 struct ata_device *ata_dev_pair(struct ata_device *adev) 2586 { 2587 struct ata_link *link = adev->link; 2588 struct ata_device *pair = &link->device[1 - adev->devno]; 2589 if (!ata_dev_enabled(pair)) 2590 return NULL; 2591 return pair; 2592 } 2593 2594 /** 2595 * ata_port_disable - Disable port. 2596 * @ap: Port to be disabled. 2597 * 2598 * Modify @ap data structure such that the system 2599 * thinks that the entire port is disabled, and should 2600 * never attempt to probe or communicate with devices 2601 * on this port. 2602 * 2603 * LOCKING: host lock, or some other form of 2604 * serialization. 2605 */ 2606 2607 void ata_port_disable(struct ata_port *ap) 2608 { 2609 ap->link.device[0].class = ATA_DEV_NONE; 2610 ap->link.device[1].class = ATA_DEV_NONE; 2611 ap->flags |= ATA_FLAG_DISABLED; 2612 } 2613 2614 /** 2615 * sata_down_spd_limit - adjust SATA spd limit downward 2616 * @link: Link to adjust SATA spd limit for 2617 * 2618 * Adjust SATA spd limit of @link downward. Note that this 2619 * function only adjusts the limit. The change must be applied 2620 * using sata_set_spd(). 2621 * 2622 * LOCKING: 2623 * Inherited from caller. 2624 * 2625 * RETURNS: 2626 * 0 on success, negative errno on failure 2627 */ 2628 int sata_down_spd_limit(struct ata_link *link) 2629 { 2630 u32 sstatus, spd, mask; 2631 int rc, highbit; 2632 2633 if (!sata_scr_valid(link)) 2634 return -EOPNOTSUPP; 2635 2636 /* If SCR can be read, use it to determine the current SPD. 2637 * If not, use cached value in link->sata_spd. 2638 */ 2639 rc = sata_scr_read(link, SCR_STATUS, &sstatus); 2640 if (rc == 0) 2641 spd = (sstatus >> 4) & 0xf; 2642 else 2643 spd = link->sata_spd; 2644 2645 mask = link->sata_spd_limit; 2646 if (mask <= 1) 2647 return -EINVAL; 2648 2649 /* unconditionally mask off the highest bit */ 2650 highbit = fls(mask) - 1; 2651 mask &= ~(1 << highbit); 2652 2653 /* Mask off all speeds higher than or equal to the current 2654 * one. Force 1.5Gbps if current SPD is not available. 2655 */ 2656 if (spd > 1) 2657 mask &= (1 << (spd - 1)) - 1; 2658 else 2659 mask &= 1; 2660 2661 /* were we already at the bottom? */ 2662 if (!mask) 2663 return -EINVAL; 2664 2665 link->sata_spd_limit = mask; 2666 2667 ata_link_printk(link, KERN_WARNING, "limiting SATA link speed to %s\n", 2668 sata_spd_string(fls(mask))); 2669 2670 return 0; 2671 } 2672 2673 static int __sata_set_spd_needed(struct ata_link *link, u32 *scontrol) 2674 { 2675 struct ata_link *host_link = &link->ap->link; 2676 u32 limit, target, spd; 2677 2678 limit = link->sata_spd_limit; 2679 2680 /* Don't configure downstream link faster than upstream link. 2681 * It doesn't speed up anything and some PMPs choke on such 2682 * configuration. 2683 */ 2684 if (!ata_is_host_link(link) && host_link->sata_spd) 2685 limit &= (1 << host_link->sata_spd) - 1; 2686 2687 if (limit == UINT_MAX) 2688 target = 0; 2689 else 2690 target = fls(limit); 2691 2692 spd = (*scontrol >> 4) & 0xf; 2693 *scontrol = (*scontrol & ~0xf0) | ((target & 0xf) << 4); 2694 2695 return spd != target; 2696 } 2697 2698 /** 2699 * sata_set_spd_needed - is SATA spd configuration needed 2700 * @link: Link in question 2701 * 2702 * Test whether the spd limit in SControl matches 2703 * @link->sata_spd_limit. This function is used to determine 2704 * whether hardreset is necessary to apply SATA spd 2705 * configuration. 2706 * 2707 * LOCKING: 2708 * Inherited from caller. 2709 * 2710 * RETURNS: 2711 * 1 if SATA spd configuration is needed, 0 otherwise. 2712 */ 2713 int sata_set_spd_needed(struct ata_link *link) 2714 { 2715 u32 scontrol; 2716 2717 if (sata_scr_read(link, SCR_CONTROL, &scontrol)) 2718 return 1; 2719 2720 return __sata_set_spd_needed(link, &scontrol); 2721 } 2722 2723 /** 2724 * sata_set_spd - set SATA spd according to spd limit 2725 * @link: Link to set SATA spd for 2726 * 2727 * Set SATA spd of @link according to sata_spd_limit. 2728 * 2729 * LOCKING: 2730 * Inherited from caller. 2731 * 2732 * RETURNS: 2733 * 0 if spd doesn't need to be changed, 1 if spd has been 2734 * changed. Negative errno if SCR registers are inaccessible. 2735 */ 2736 int sata_set_spd(struct ata_link *link) 2737 { 2738 u32 scontrol; 2739 int rc; 2740 2741 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) 2742 return rc; 2743 2744 if (!__sata_set_spd_needed(link, &scontrol)) 2745 return 0; 2746 2747 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol))) 2748 return rc; 2749 2750 return 1; 2751 } 2752 2753 /* 2754 * This mode timing computation functionality is ported over from 2755 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik 2756 */ 2757 /* 2758 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds). 2759 * These were taken from ATA/ATAPI-6 standard, rev 0a, except 2760 * for UDMA6, which is currently supported only by Maxtor drives. 2761 * 2762 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0. 2763 */ 2764 2765 static const struct ata_timing ata_timing[] = { 2766 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */ 2767 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 }, 2768 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 }, 2769 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 }, 2770 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 }, 2771 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 }, 2772 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 }, 2773 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 }, 2774 2775 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 }, 2776 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 }, 2777 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 }, 2778 2779 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 }, 2780 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 }, 2781 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 }, 2782 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 }, 2783 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 }, 2784 2785 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */ 2786 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 }, 2787 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 }, 2788 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 }, 2789 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 }, 2790 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 }, 2791 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 }, 2792 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 }, 2793 2794 { 0xFF } 2795 }; 2796 2797 #define ENOUGH(v, unit) (((v)-1)/(unit)+1) 2798 #define EZ(v, unit) ((v)?ENOUGH(v, unit):0) 2799 2800 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT) 2801 { 2802 q->setup = EZ(t->setup * 1000, T); 2803 q->act8b = EZ(t->act8b * 1000, T); 2804 q->rec8b = EZ(t->rec8b * 1000, T); 2805 q->cyc8b = EZ(t->cyc8b * 1000, T); 2806 q->active = EZ(t->active * 1000, T); 2807 q->recover = EZ(t->recover * 1000, T); 2808 q->cycle = EZ(t->cycle * 1000, T); 2809 q->udma = EZ(t->udma * 1000, UT); 2810 } 2811 2812 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b, 2813 struct ata_timing *m, unsigned int what) 2814 { 2815 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup); 2816 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b); 2817 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b); 2818 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b); 2819 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active); 2820 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover); 2821 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle); 2822 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma); 2823 } 2824 2825 const struct ata_timing *ata_timing_find_mode(u8 xfer_mode) 2826 { 2827 const struct ata_timing *t = ata_timing; 2828 2829 while (xfer_mode > t->mode) 2830 t++; 2831 2832 if (xfer_mode == t->mode) 2833 return t; 2834 return NULL; 2835 } 2836 2837 int ata_timing_compute(struct ata_device *adev, unsigned short speed, 2838 struct ata_timing *t, int T, int UT) 2839 { 2840 const struct ata_timing *s; 2841 struct ata_timing p; 2842 2843 /* 2844 * Find the mode. 2845 */ 2846 2847 if (!(s = ata_timing_find_mode(speed))) 2848 return -EINVAL; 2849 2850 memcpy(t, s, sizeof(*s)); 2851 2852 /* 2853 * If the drive is an EIDE drive, it can tell us it needs extended 2854 * PIO/MW_DMA cycle timing. 2855 */ 2856 2857 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ 2858 memset(&p, 0, sizeof(p)); 2859 if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) { 2860 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO]; 2861 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY]; 2862 } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) { 2863 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN]; 2864 } 2865 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B); 2866 } 2867 2868 /* 2869 * Convert the timing to bus clock counts. 2870 */ 2871 2872 ata_timing_quantize(t, t, T, UT); 2873 2874 /* 2875 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, 2876 * S.M.A.R.T * and some other commands. We have to ensure that the 2877 * DMA cycle timing is slower/equal than the fastest PIO timing. 2878 */ 2879 2880 if (speed > XFER_PIO_6) { 2881 ata_timing_compute(adev, adev->pio_mode, &p, T, UT); 2882 ata_timing_merge(&p, t, t, ATA_TIMING_ALL); 2883 } 2884 2885 /* 2886 * Lengthen active & recovery time so that cycle time is correct. 2887 */ 2888 2889 if (t->act8b + t->rec8b < t->cyc8b) { 2890 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; 2891 t->rec8b = t->cyc8b - t->act8b; 2892 } 2893 2894 if (t->active + t->recover < t->cycle) { 2895 t->active += (t->cycle - (t->active + t->recover)) / 2; 2896 t->recover = t->cycle - t->active; 2897 } 2898 2899 /* In a few cases quantisation may produce enough errors to 2900 leave t->cycle too low for the sum of active and recovery 2901 if so we must correct this */ 2902 if (t->active + t->recover > t->cycle) 2903 t->cycle = t->active + t->recover; 2904 2905 return 0; 2906 } 2907 2908 /** 2909 * ata_timing_cycle2mode - find xfer mode for the specified cycle duration 2910 * @xfer_shift: ATA_SHIFT_* value for transfer type to examine. 2911 * @cycle: cycle duration in ns 2912 * 2913 * Return matching xfer mode for @cycle. The returned mode is of 2914 * the transfer type specified by @xfer_shift. If @cycle is too 2915 * slow for @xfer_shift, 0xff is returned. If @cycle is faster 2916 * than the fastest known mode, the fasted mode is returned. 2917 * 2918 * LOCKING: 2919 * None. 2920 * 2921 * RETURNS: 2922 * Matching xfer_mode, 0xff if no match found. 2923 */ 2924 u8 ata_timing_cycle2mode(unsigned int xfer_shift, int cycle) 2925 { 2926 u8 base_mode = 0xff, last_mode = 0xff; 2927 const struct ata_xfer_ent *ent; 2928 const struct ata_timing *t; 2929 2930 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) 2931 if (ent->shift == xfer_shift) 2932 base_mode = ent->base; 2933 2934 for (t = ata_timing_find_mode(base_mode); 2935 t && ata_xfer_mode2shift(t->mode) == xfer_shift; t++) { 2936 unsigned short this_cycle; 2937 2938 switch (xfer_shift) { 2939 case ATA_SHIFT_PIO: 2940 case ATA_SHIFT_MWDMA: 2941 this_cycle = t->cycle; 2942 break; 2943 case ATA_SHIFT_UDMA: 2944 this_cycle = t->udma; 2945 break; 2946 default: 2947 return 0xff; 2948 } 2949 2950 if (cycle > this_cycle) 2951 break; 2952 2953 last_mode = t->mode; 2954 } 2955 2956 return last_mode; 2957 } 2958 2959 /** 2960 * ata_down_xfermask_limit - adjust dev xfer masks downward 2961 * @dev: Device to adjust xfer masks 2962 * @sel: ATA_DNXFER_* selector 2963 * 2964 * Adjust xfer masks of @dev downward. Note that this function 2965 * does not apply the change. Invoking ata_set_mode() afterwards 2966 * will apply the limit. 2967 * 2968 * LOCKING: 2969 * Inherited from caller. 2970 * 2971 * RETURNS: 2972 * 0 on success, negative errno on failure 2973 */ 2974 int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel) 2975 { 2976 char buf[32]; 2977 unsigned long orig_mask, xfer_mask; 2978 unsigned long pio_mask, mwdma_mask, udma_mask; 2979 int quiet, highbit; 2980 2981 quiet = !!(sel & ATA_DNXFER_QUIET); 2982 sel &= ~ATA_DNXFER_QUIET; 2983 2984 xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask, 2985 dev->mwdma_mask, 2986 dev->udma_mask); 2987 ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask); 2988 2989 switch (sel) { 2990 case ATA_DNXFER_PIO: 2991 highbit = fls(pio_mask) - 1; 2992 pio_mask &= ~(1 << highbit); 2993 break; 2994 2995 case ATA_DNXFER_DMA: 2996 if (udma_mask) { 2997 highbit = fls(udma_mask) - 1; 2998 udma_mask &= ~(1 << highbit); 2999 if (!udma_mask) 3000 return -ENOENT; 3001 } else if (mwdma_mask) { 3002 highbit = fls(mwdma_mask) - 1; 3003 mwdma_mask &= ~(1 << highbit); 3004 if (!mwdma_mask) 3005 return -ENOENT; 3006 } 3007 break; 3008 3009 case ATA_DNXFER_40C: 3010 udma_mask &= ATA_UDMA_MASK_40C; 3011 break; 3012 3013 case ATA_DNXFER_FORCE_PIO0: 3014 pio_mask &= 1; 3015 case ATA_DNXFER_FORCE_PIO: 3016 mwdma_mask = 0; 3017 udma_mask = 0; 3018 break; 3019 3020 default: 3021 BUG(); 3022 } 3023 3024 xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); 3025 3026 if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask) 3027 return -ENOENT; 3028 3029 if (!quiet) { 3030 if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA)) 3031 snprintf(buf, sizeof(buf), "%s:%s", 3032 ata_mode_string(xfer_mask), 3033 ata_mode_string(xfer_mask & ATA_MASK_PIO)); 3034 else 3035 snprintf(buf, sizeof(buf), "%s", 3036 ata_mode_string(xfer_mask)); 3037 3038 ata_dev_printk(dev, KERN_WARNING, 3039 "limiting speed to %s\n", buf); 3040 } 3041 3042 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask, 3043 &dev->udma_mask); 3044 3045 return 0; 3046 } 3047 3048 static int ata_dev_set_mode(struct ata_device *dev) 3049 { 3050 struct ata_eh_context *ehc = &dev->link->eh_context; 3051 unsigned int err_mask; 3052 int rc; 3053 3054 dev->flags &= ~ATA_DFLAG_PIO; 3055 if (dev->xfer_shift == ATA_SHIFT_PIO) 3056 dev->flags |= ATA_DFLAG_PIO; 3057 3058 err_mask = ata_dev_set_xfermode(dev); 3059 3060 /* Old CFA may refuse this command, which is just fine */ 3061 if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id)) 3062 err_mask &= ~AC_ERR_DEV; 3063 3064 /* Some very old devices and some bad newer ones fail any kind of 3065 SET_XFERMODE request but support PIO0-2 timings and no IORDY */ 3066 if (dev->xfer_shift == ATA_SHIFT_PIO && !ata_id_has_iordy(dev->id) && 3067 dev->pio_mode <= XFER_PIO_2) 3068 err_mask &= ~AC_ERR_DEV; 3069 3070 /* Early MWDMA devices do DMA but don't allow DMA mode setting. 3071 Don't fail an MWDMA0 set IFF the device indicates it is in MWDMA0 */ 3072 if (dev->xfer_shift == ATA_SHIFT_MWDMA && 3073 dev->dma_mode == XFER_MW_DMA_0 && 3074 (dev->id[63] >> 8) & 1) 3075 err_mask &= ~AC_ERR_DEV; 3076 3077 if (err_mask) { 3078 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode " 3079 "(err_mask=0x%x)\n", err_mask); 3080 return -EIO; 3081 } 3082 3083 ehc->i.flags |= ATA_EHI_POST_SETMODE; 3084 rc = ata_dev_revalidate(dev, ATA_DEV_UNKNOWN, 0); 3085 ehc->i.flags &= ~ATA_EHI_POST_SETMODE; 3086 if (rc) 3087 return rc; 3088 3089 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n", 3090 dev->xfer_shift, (int)dev->xfer_mode); 3091 3092 ata_dev_printk(dev, KERN_INFO, "configured for %s\n", 3093 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode))); 3094 return 0; 3095 } 3096 3097 /** 3098 * ata_do_set_mode - Program timings and issue SET FEATURES - XFER 3099 * @link: link on which timings will be programmed 3100 * @r_failed_dev: out paramter for failed device 3101 * 3102 * Standard implementation of the function used to tune and set 3103 * ATA device disk transfer mode (PIO3, UDMA6, etc.). If 3104 * ata_dev_set_mode() fails, pointer to the failing device is 3105 * returned in @r_failed_dev. 3106 * 3107 * LOCKING: 3108 * PCI/etc. bus probe sem. 3109 * 3110 * RETURNS: 3111 * 0 on success, negative errno otherwise 3112 */ 3113 3114 int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev) 3115 { 3116 struct ata_port *ap = link->ap; 3117 struct ata_device *dev; 3118 int rc = 0, used_dma = 0, found = 0; 3119 3120 /* step 1: calculate xfer_mask */ 3121 ata_link_for_each_dev(dev, link) { 3122 unsigned long pio_mask, dma_mask; 3123 unsigned int mode_mask; 3124 3125 if (!ata_dev_enabled(dev)) 3126 continue; 3127 3128 mode_mask = ATA_DMA_MASK_ATA; 3129 if (dev->class == ATA_DEV_ATAPI) 3130 mode_mask = ATA_DMA_MASK_ATAPI; 3131 else if (ata_id_is_cfa(dev->id)) 3132 mode_mask = ATA_DMA_MASK_CFA; 3133 3134 ata_dev_xfermask(dev); 3135 3136 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0); 3137 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask); 3138 3139 if (libata_dma_mask & mode_mask) 3140 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask); 3141 else 3142 dma_mask = 0; 3143 3144 dev->pio_mode = ata_xfer_mask2mode(pio_mask); 3145 dev->dma_mode = ata_xfer_mask2mode(dma_mask); 3146 3147 found = 1; 3148 if (dev->dma_mode != 0xff) 3149 used_dma = 1; 3150 } 3151 if (!found) 3152 goto out; 3153 3154 /* step 2: always set host PIO timings */ 3155 ata_link_for_each_dev(dev, link) { 3156 if (!ata_dev_enabled(dev)) 3157 continue; 3158 3159 if (dev->pio_mode == 0xff) { 3160 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n"); 3161 rc = -EINVAL; 3162 goto out; 3163 } 3164 3165 dev->xfer_mode = dev->pio_mode; 3166 dev->xfer_shift = ATA_SHIFT_PIO; 3167 if (ap->ops->set_piomode) 3168 ap->ops->set_piomode(ap, dev); 3169 } 3170 3171 /* step 3: set host DMA timings */ 3172 ata_link_for_each_dev(dev, link) { 3173 if (!ata_dev_enabled(dev) || dev->dma_mode == 0xff) 3174 continue; 3175 3176 dev->xfer_mode = dev->dma_mode; 3177 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode); 3178 if (ap->ops->set_dmamode) 3179 ap->ops->set_dmamode(ap, dev); 3180 } 3181 3182 /* step 4: update devices' xfer mode */ 3183 ata_link_for_each_dev(dev, link) { 3184 /* don't update suspended devices' xfer mode */ 3185 if (!ata_dev_enabled(dev)) 3186 continue; 3187 3188 rc = ata_dev_set_mode(dev); 3189 if (rc) 3190 goto out; 3191 } 3192 3193 /* Record simplex status. If we selected DMA then the other 3194 * host channels are not permitted to do so. 3195 */ 3196 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX)) 3197 ap->host->simplex_claimed = ap; 3198 3199 out: 3200 if (rc) 3201 *r_failed_dev = dev; 3202 return rc; 3203 } 3204 3205 /** 3206 * ata_tf_to_host - issue ATA taskfile to host controller 3207 * @ap: port to which command is being issued 3208 * @tf: ATA taskfile register set 3209 * 3210 * Issues ATA taskfile register set to ATA host controller, 3211 * with proper synchronization with interrupt handler and 3212 * other threads. 3213 * 3214 * LOCKING: 3215 * spin_lock_irqsave(host lock) 3216 */ 3217 3218 static inline void ata_tf_to_host(struct ata_port *ap, 3219 const struct ata_taskfile *tf) 3220 { 3221 ap->ops->tf_load(ap, tf); 3222 ap->ops->exec_command(ap, tf); 3223 } 3224 3225 /** 3226 * ata_busy_sleep - sleep until BSY clears, or timeout 3227 * @ap: port containing status register to be polled 3228 * @tmout_pat: impatience timeout 3229 * @tmout: overall timeout 3230 * 3231 * Sleep until ATA Status register bit BSY clears, 3232 * or a timeout occurs. 3233 * 3234 * LOCKING: 3235 * Kernel thread context (may sleep). 3236 * 3237 * RETURNS: 3238 * 0 on success, -errno otherwise. 3239 */ 3240 int ata_busy_sleep(struct ata_port *ap, 3241 unsigned long tmout_pat, unsigned long tmout) 3242 { 3243 unsigned long timer_start, timeout; 3244 u8 status; 3245 3246 status = ata_busy_wait(ap, ATA_BUSY, 300); 3247 timer_start = jiffies; 3248 timeout = timer_start + tmout_pat; 3249 while (status != 0xff && (status & ATA_BUSY) && 3250 time_before(jiffies, timeout)) { 3251 msleep(50); 3252 status = ata_busy_wait(ap, ATA_BUSY, 3); 3253 } 3254 3255 if (status != 0xff && (status & ATA_BUSY)) 3256 ata_port_printk(ap, KERN_WARNING, 3257 "port is slow to respond, please be patient " 3258 "(Status 0x%x)\n", status); 3259 3260 timeout = timer_start + tmout; 3261 while (status != 0xff && (status & ATA_BUSY) && 3262 time_before(jiffies, timeout)) { 3263 msleep(50); 3264 status = ata_chk_status(ap); 3265 } 3266 3267 if (status == 0xff) 3268 return -ENODEV; 3269 3270 if (status & ATA_BUSY) { 3271 ata_port_printk(ap, KERN_ERR, "port failed to respond " 3272 "(%lu secs, Status 0x%x)\n", 3273 tmout / HZ, status); 3274 return -EBUSY; 3275 } 3276 3277 return 0; 3278 } 3279 3280 /** 3281 * ata_wait_after_reset - wait before checking status after reset 3282 * @ap: port containing status register to be polled 3283 * @deadline: deadline jiffies for the operation 3284 * 3285 * After reset, we need to pause a while before reading status. 3286 * Also, certain combination of controller and device report 0xff 3287 * for some duration (e.g. until SATA PHY is up and running) 3288 * which is interpreted as empty port in ATA world. This 3289 * function also waits for such devices to get out of 0xff 3290 * status. 3291 * 3292 * LOCKING: 3293 * Kernel thread context (may sleep). 3294 */ 3295 void ata_wait_after_reset(struct ata_port *ap, unsigned long deadline) 3296 { 3297 unsigned long until = jiffies + ATA_TMOUT_FF_WAIT; 3298 3299 if (time_before(until, deadline)) 3300 deadline = until; 3301 3302 /* Spec mandates ">= 2ms" before checking status. We wait 3303 * 150ms, because that was the magic delay used for ATAPI 3304 * devices in Hale Landis's ATADRVR, for the period of time 3305 * between when the ATA command register is written, and then 3306 * status is checked. Because waiting for "a while" before 3307 * checking status is fine, post SRST, we perform this magic 3308 * delay here as well. 3309 * 3310 * Old drivers/ide uses the 2mS rule and then waits for ready. 3311 */ 3312 msleep(150); 3313 3314 /* Wait for 0xff to clear. Some SATA devices take a long time 3315 * to clear 0xff after reset. For example, HHD424020F7SV00 3316 * iVDR needs >= 800ms while. Quantum GoVault needs even more 3317 * than that. 3318 * 3319 * Note that some PATA controllers (pata_ali) explode if 3320 * status register is read more than once when there's no 3321 * device attached. 3322 */ 3323 if (ap->flags & ATA_FLAG_SATA) { 3324 while (1) { 3325 u8 status = ata_chk_status(ap); 3326 3327 if (status != 0xff || time_after(jiffies, deadline)) 3328 return; 3329 3330 msleep(50); 3331 } 3332 } 3333 } 3334 3335 /** 3336 * ata_wait_ready - sleep until BSY clears, or timeout 3337 * @ap: port containing status register to be polled 3338 * @deadline: deadline jiffies for the operation 3339 * 3340 * Sleep until ATA Status register bit BSY clears, or timeout 3341 * occurs. 3342 * 3343 * LOCKING: 3344 * Kernel thread context (may sleep). 3345 * 3346 * RETURNS: 3347 * 0 on success, -errno otherwise. 3348 */ 3349 int ata_wait_ready(struct ata_port *ap, unsigned long deadline) 3350 { 3351 unsigned long start = jiffies; 3352 int warned = 0; 3353 3354 while (1) { 3355 u8 status = ata_chk_status(ap); 3356 unsigned long now = jiffies; 3357 3358 if (!(status & ATA_BUSY)) 3359 return 0; 3360 if (!ata_link_online(&ap->link) && status == 0xff) 3361 return -ENODEV; 3362 if (time_after(now, deadline)) 3363 return -EBUSY; 3364 3365 if (!warned && time_after(now, start + 5 * HZ) && 3366 (deadline - now > 3 * HZ)) { 3367 ata_port_printk(ap, KERN_WARNING, 3368 "port is slow to respond, please be patient " 3369 "(Status 0x%x)\n", status); 3370 warned = 1; 3371 } 3372 3373 msleep(50); 3374 } 3375 } 3376 3377 static int ata_bus_post_reset(struct ata_port *ap, unsigned int devmask, 3378 unsigned long deadline) 3379 { 3380 struct ata_ioports *ioaddr = &ap->ioaddr; 3381 unsigned int dev0 = devmask & (1 << 0); 3382 unsigned int dev1 = devmask & (1 << 1); 3383 int rc, ret = 0; 3384 3385 /* if device 0 was found in ata_devchk, wait for its 3386 * BSY bit to clear 3387 */ 3388 if (dev0) { 3389 rc = ata_wait_ready(ap, deadline); 3390 if (rc) { 3391 if (rc != -ENODEV) 3392 return rc; 3393 ret = rc; 3394 } 3395 } 3396 3397 /* if device 1 was found in ata_devchk, wait for register 3398 * access briefly, then wait for BSY to clear. 3399 */ 3400 if (dev1) { 3401 int i; 3402 3403 ap->ops->dev_select(ap, 1); 3404 3405 /* Wait for register access. Some ATAPI devices fail 3406 * to set nsect/lbal after reset, so don't waste too 3407 * much time on it. We're gonna wait for !BSY anyway. 3408 */ 3409 for (i = 0; i < 2; i++) { 3410 u8 nsect, lbal; 3411 3412 nsect = ioread8(ioaddr->nsect_addr); 3413 lbal = ioread8(ioaddr->lbal_addr); 3414 if ((nsect == 1) && (lbal == 1)) 3415 break; 3416 msleep(50); /* give drive a breather */ 3417 } 3418 3419 rc = ata_wait_ready(ap, deadline); 3420 if (rc) { 3421 if (rc != -ENODEV) 3422 return rc; 3423 ret = rc; 3424 } 3425 } 3426 3427 /* is all this really necessary? */ 3428 ap->ops->dev_select(ap, 0); 3429 if (dev1) 3430 ap->ops->dev_select(ap, 1); 3431 if (dev0) 3432 ap->ops->dev_select(ap, 0); 3433 3434 return ret; 3435 } 3436 3437 static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask, 3438 unsigned long deadline) 3439 { 3440 struct ata_ioports *ioaddr = &ap->ioaddr; 3441 3442 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id); 3443 3444 /* software reset. causes dev0 to be selected */ 3445 iowrite8(ap->ctl, ioaddr->ctl_addr); 3446 udelay(20); /* FIXME: flush */ 3447 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr); 3448 udelay(20); /* FIXME: flush */ 3449 iowrite8(ap->ctl, ioaddr->ctl_addr); 3450 3451 /* wait a while before checking status */ 3452 ata_wait_after_reset(ap, deadline); 3453 3454 /* Before we perform post reset processing we want to see if 3455 * the bus shows 0xFF because the odd clown forgets the D7 3456 * pulldown resistor. 3457 */ 3458 if (ata_chk_status(ap) == 0xFF) 3459 return -ENODEV; 3460 3461 return ata_bus_post_reset(ap, devmask, deadline); 3462 } 3463 3464 /** 3465 * ata_bus_reset - reset host port and associated ATA channel 3466 * @ap: port to reset 3467 * 3468 * This is typically the first time we actually start issuing 3469 * commands to the ATA channel. We wait for BSY to clear, then 3470 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its 3471 * result. Determine what devices, if any, are on the channel 3472 * by looking at the device 0/1 error register. Look at the signature 3473 * stored in each device's taskfile registers, to determine if 3474 * the device is ATA or ATAPI. 3475 * 3476 * LOCKING: 3477 * PCI/etc. bus probe sem. 3478 * Obtains host lock. 3479 * 3480 * SIDE EFFECTS: 3481 * Sets ATA_FLAG_DISABLED if bus reset fails. 3482 */ 3483 3484 void ata_bus_reset(struct ata_port *ap) 3485 { 3486 struct ata_device *device = ap->link.device; 3487 struct ata_ioports *ioaddr = &ap->ioaddr; 3488 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; 3489 u8 err; 3490 unsigned int dev0, dev1 = 0, devmask = 0; 3491 int rc; 3492 3493 DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no); 3494 3495 /* determine if device 0/1 are present */ 3496 if (ap->flags & ATA_FLAG_SATA_RESET) 3497 dev0 = 1; 3498 else { 3499 dev0 = ata_devchk(ap, 0); 3500 if (slave_possible) 3501 dev1 = ata_devchk(ap, 1); 3502 } 3503 3504 if (dev0) 3505 devmask |= (1 << 0); 3506 if (dev1) 3507 devmask |= (1 << 1); 3508 3509 /* select device 0 again */ 3510 ap->ops->dev_select(ap, 0); 3511 3512 /* issue bus reset */ 3513 if (ap->flags & ATA_FLAG_SRST) { 3514 rc = ata_bus_softreset(ap, devmask, jiffies + 40 * HZ); 3515 if (rc && rc != -ENODEV) 3516 goto err_out; 3517 } 3518 3519 /* 3520 * determine by signature whether we have ATA or ATAPI devices 3521 */ 3522 device[0].class = ata_dev_try_classify(&device[0], dev0, &err); 3523 if ((slave_possible) && (err != 0x81)) 3524 device[1].class = ata_dev_try_classify(&device[1], dev1, &err); 3525 3526 /* is double-select really necessary? */ 3527 if (device[1].class != ATA_DEV_NONE) 3528 ap->ops->dev_select(ap, 1); 3529 if (device[0].class != ATA_DEV_NONE) 3530 ap->ops->dev_select(ap, 0); 3531 3532 /* if no devices were detected, disable this port */ 3533 if ((device[0].class == ATA_DEV_NONE) && 3534 (device[1].class == ATA_DEV_NONE)) 3535 goto err_out; 3536 3537 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { 3538 /* set up device control for ATA_FLAG_SATA_RESET */ 3539 iowrite8(ap->ctl, ioaddr->ctl_addr); 3540 } 3541 3542 DPRINTK("EXIT\n"); 3543 return; 3544 3545 err_out: 3546 ata_port_printk(ap, KERN_ERR, "disabling port\n"); 3547 ata_port_disable(ap); 3548 3549 DPRINTK("EXIT\n"); 3550 } 3551 3552 /** 3553 * sata_link_debounce - debounce SATA phy status 3554 * @link: ATA link to debounce SATA phy status for 3555 * @params: timing parameters { interval, duratinon, timeout } in msec 3556 * @deadline: deadline jiffies for the operation 3557 * 3558 * Make sure SStatus of @link reaches stable state, determined by 3559 * holding the same value where DET is not 1 for @duration polled 3560 * every @interval, before @timeout. Timeout constraints the 3561 * beginning of the stable state. Because DET gets stuck at 1 on 3562 * some controllers after hot unplugging, this functions waits 3563 * until timeout then returns 0 if DET is stable at 1. 3564 * 3565 * @timeout is further limited by @deadline. The sooner of the 3566 * two is used. 3567 * 3568 * LOCKING: 3569 * Kernel thread context (may sleep) 3570 * 3571 * RETURNS: 3572 * 0 on success, -errno on failure. 3573 */ 3574 int sata_link_debounce(struct ata_link *link, const unsigned long *params, 3575 unsigned long deadline) 3576 { 3577 unsigned long interval_msec = params[0]; 3578 unsigned long duration = msecs_to_jiffies(params[1]); 3579 unsigned long last_jiffies, t; 3580 u32 last, cur; 3581 int rc; 3582 3583 t = jiffies + msecs_to_jiffies(params[2]); 3584 if (time_before(t, deadline)) 3585 deadline = t; 3586 3587 if ((rc = sata_scr_read(link, SCR_STATUS, &cur))) 3588 return rc; 3589 cur &= 0xf; 3590 3591 last = cur; 3592 last_jiffies = jiffies; 3593 3594 while (1) { 3595 msleep(interval_msec); 3596 if ((rc = sata_scr_read(link, SCR_STATUS, &cur))) 3597 return rc; 3598 cur &= 0xf; 3599 3600 /* DET stable? */ 3601 if (cur == last) { 3602 if (cur == 1 && time_before(jiffies, deadline)) 3603 continue; 3604 if (time_after(jiffies, last_jiffies + duration)) 3605 return 0; 3606 continue; 3607 } 3608 3609 /* unstable, start over */ 3610 last = cur; 3611 last_jiffies = jiffies; 3612 3613 /* Check deadline. If debouncing failed, return 3614 * -EPIPE to tell upper layer to lower link speed. 3615 */ 3616 if (time_after(jiffies, deadline)) 3617 return -EPIPE; 3618 } 3619 } 3620 3621 /** 3622 * sata_link_resume - resume SATA link 3623 * @link: ATA link to resume SATA 3624 * @params: timing parameters { interval, duratinon, timeout } in msec 3625 * @deadline: deadline jiffies for the operation 3626 * 3627 * Resume SATA phy @link and debounce it. 3628 * 3629 * LOCKING: 3630 * Kernel thread context (may sleep) 3631 * 3632 * RETURNS: 3633 * 0 on success, -errno on failure. 3634 */ 3635 int sata_link_resume(struct ata_link *link, const unsigned long *params, 3636 unsigned long deadline) 3637 { 3638 u32 scontrol; 3639 int rc; 3640 3641 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) 3642 return rc; 3643 3644 scontrol = (scontrol & 0x0f0) | 0x300; 3645 3646 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol))) 3647 return rc; 3648 3649 /* Some PHYs react badly if SStatus is pounded immediately 3650 * after resuming. Delay 200ms before debouncing. 3651 */ 3652 msleep(200); 3653 3654 return sata_link_debounce(link, params, deadline); 3655 } 3656 3657 /** 3658 * ata_std_prereset - prepare for reset 3659 * @link: ATA link to be reset 3660 * @deadline: deadline jiffies for the operation 3661 * 3662 * @link is about to be reset. Initialize it. Failure from 3663 * prereset makes libata abort whole reset sequence and give up 3664 * that port, so prereset should be best-effort. It does its 3665 * best to prepare for reset sequence but if things go wrong, it 3666 * should just whine, not fail. 3667 * 3668 * LOCKING: 3669 * Kernel thread context (may sleep) 3670 * 3671 * RETURNS: 3672 * 0 on success, -errno otherwise. 3673 */ 3674 int ata_std_prereset(struct ata_link *link, unsigned long deadline) 3675 { 3676 struct ata_port *ap = link->ap; 3677 struct ata_eh_context *ehc = &link->eh_context; 3678 const unsigned long *timing = sata_ehc_deb_timing(ehc); 3679 int rc; 3680 3681 /* handle link resume */ 3682 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) && 3683 (link->flags & ATA_LFLAG_HRST_TO_RESUME)) 3684 ehc->i.action |= ATA_EH_HARDRESET; 3685 3686 /* Some PMPs don't work with only SRST, force hardreset if PMP 3687 * is supported. 3688 */ 3689 if (ap->flags & ATA_FLAG_PMP) 3690 ehc->i.action |= ATA_EH_HARDRESET; 3691 3692 /* if we're about to do hardreset, nothing more to do */ 3693 if (ehc->i.action & ATA_EH_HARDRESET) 3694 return 0; 3695 3696 /* if SATA, resume link */ 3697 if (ap->flags & ATA_FLAG_SATA) { 3698 rc = sata_link_resume(link, timing, deadline); 3699 /* whine about phy resume failure but proceed */ 3700 if (rc && rc != -EOPNOTSUPP) 3701 ata_link_printk(link, KERN_WARNING, "failed to resume " 3702 "link for reset (errno=%d)\n", rc); 3703 } 3704 3705 /* Wait for !BSY if the controller can wait for the first D2H 3706 * Reg FIS and we don't know that no device is attached. 3707 */ 3708 if (!(link->flags & ATA_LFLAG_SKIP_D2H_BSY) && !ata_link_offline(link)) { 3709 rc = ata_wait_ready(ap, deadline); 3710 if (rc && rc != -ENODEV) { 3711 ata_link_printk(link, KERN_WARNING, "device not ready " 3712 "(errno=%d), forcing hardreset\n", rc); 3713 ehc->i.action |= ATA_EH_HARDRESET; 3714 } 3715 } 3716 3717 return 0; 3718 } 3719 3720 /** 3721 * ata_std_softreset - reset host port via ATA SRST 3722 * @link: ATA link to reset 3723 * @classes: resulting classes of attached devices 3724 * @deadline: deadline jiffies for the operation 3725 * 3726 * Reset host port using ATA SRST. 3727 * 3728 * LOCKING: 3729 * Kernel thread context (may sleep) 3730 * 3731 * RETURNS: 3732 * 0 on success, -errno otherwise. 3733 */ 3734 int ata_std_softreset(struct ata_link *link, unsigned int *classes, 3735 unsigned long deadline) 3736 { 3737 struct ata_port *ap = link->ap; 3738 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; 3739 unsigned int devmask = 0; 3740 int rc; 3741 u8 err; 3742 3743 DPRINTK("ENTER\n"); 3744 3745 if (ata_link_offline(link)) { 3746 classes[0] = ATA_DEV_NONE; 3747 goto out; 3748 } 3749 3750 /* determine if device 0/1 are present */ 3751 if (ata_devchk(ap, 0)) 3752 devmask |= (1 << 0); 3753 if (slave_possible && ata_devchk(ap, 1)) 3754 devmask |= (1 << 1); 3755 3756 /* select device 0 again */ 3757 ap->ops->dev_select(ap, 0); 3758 3759 /* issue bus reset */ 3760 DPRINTK("about to softreset, devmask=%x\n", devmask); 3761 rc = ata_bus_softreset(ap, devmask, deadline); 3762 /* if link is occupied, -ENODEV too is an error */ 3763 if (rc && (rc != -ENODEV || sata_scr_valid(link))) { 3764 ata_link_printk(link, KERN_ERR, "SRST failed (errno=%d)\n", rc); 3765 return rc; 3766 } 3767 3768 /* determine by signature whether we have ATA or ATAPI devices */ 3769 classes[0] = ata_dev_try_classify(&link->device[0], 3770 devmask & (1 << 0), &err); 3771 if (slave_possible && err != 0x81) 3772 classes[1] = ata_dev_try_classify(&link->device[1], 3773 devmask & (1 << 1), &err); 3774 3775 out: 3776 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]); 3777 return 0; 3778 } 3779 3780 /** 3781 * sata_link_hardreset - reset link via SATA phy reset 3782 * @link: link to reset 3783 * @timing: timing parameters { interval, duratinon, timeout } in msec 3784 * @deadline: deadline jiffies for the operation 3785 * 3786 * SATA phy-reset @link using DET bits of SControl register. 3787 * 3788 * LOCKING: 3789 * Kernel thread context (may sleep) 3790 * 3791 * RETURNS: 3792 * 0 on success, -errno otherwise. 3793 */ 3794 int sata_link_hardreset(struct ata_link *link, const unsigned long *timing, 3795 unsigned long deadline) 3796 { 3797 u32 scontrol; 3798 int rc; 3799 3800 DPRINTK("ENTER\n"); 3801 3802 if (sata_set_spd_needed(link)) { 3803 /* SATA spec says nothing about how to reconfigure 3804 * spd. To be on the safe side, turn off phy during 3805 * reconfiguration. This works for at least ICH7 AHCI 3806 * and Sil3124. 3807 */ 3808 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) 3809 goto out; 3810 3811 scontrol = (scontrol & 0x0f0) | 0x304; 3812 3813 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol))) 3814 goto out; 3815 3816 sata_set_spd(link); 3817 } 3818 3819 /* issue phy wake/reset */ 3820 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) 3821 goto out; 3822 3823 scontrol = (scontrol & 0x0f0) | 0x301; 3824 3825 if ((rc = sata_scr_write_flush(link, SCR_CONTROL, scontrol))) 3826 goto out; 3827 3828 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1 3829 * 10.4.2 says at least 1 ms. 3830 */ 3831 msleep(1); 3832 3833 /* bring link back */ 3834 rc = sata_link_resume(link, timing, deadline); 3835 out: 3836 DPRINTK("EXIT, rc=%d\n", rc); 3837 return rc; 3838 } 3839 3840 /** 3841 * sata_std_hardreset - reset host port via SATA phy reset 3842 * @link: link to reset 3843 * @class: resulting class of attached device 3844 * @deadline: deadline jiffies for the operation 3845 * 3846 * SATA phy-reset host port using DET bits of SControl register, 3847 * wait for !BSY and classify the attached device. 3848 * 3849 * LOCKING: 3850 * Kernel thread context (may sleep) 3851 * 3852 * RETURNS: 3853 * 0 on success, -errno otherwise. 3854 */ 3855 int sata_std_hardreset(struct ata_link *link, unsigned int *class, 3856 unsigned long deadline) 3857 { 3858 struct ata_port *ap = link->ap; 3859 const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context); 3860 int rc; 3861 3862 DPRINTK("ENTER\n"); 3863 3864 /* do hardreset */ 3865 rc = sata_link_hardreset(link, timing, deadline); 3866 if (rc) { 3867 ata_link_printk(link, KERN_ERR, 3868 "COMRESET failed (errno=%d)\n", rc); 3869 return rc; 3870 } 3871 3872 /* TODO: phy layer with polling, timeouts, etc. */ 3873 if (ata_link_offline(link)) { 3874 *class = ATA_DEV_NONE; 3875 DPRINTK("EXIT, link offline\n"); 3876 return 0; 3877 } 3878 3879 /* wait a while before checking status */ 3880 ata_wait_after_reset(ap, deadline); 3881 3882 /* If PMP is supported, we have to do follow-up SRST. Note 3883 * that some PMPs don't send D2H Reg FIS after hardreset at 3884 * all if the first port is empty. Wait for it just for a 3885 * second and request follow-up SRST. 3886 */ 3887 if (ap->flags & ATA_FLAG_PMP) { 3888 ata_wait_ready(ap, jiffies + HZ); 3889 return -EAGAIN; 3890 } 3891 3892 rc = ata_wait_ready(ap, deadline); 3893 /* link occupied, -ENODEV too is an error */ 3894 if (rc) { 3895 ata_link_printk(link, KERN_ERR, 3896 "COMRESET failed (errno=%d)\n", rc); 3897 return rc; 3898 } 3899 3900 ap->ops->dev_select(ap, 0); /* probably unnecessary */ 3901 3902 *class = ata_dev_try_classify(link->device, 1, NULL); 3903 3904 DPRINTK("EXIT, class=%u\n", *class); 3905 return 0; 3906 } 3907 3908 /** 3909 * ata_std_postreset - standard postreset callback 3910 * @link: the target ata_link 3911 * @classes: classes of attached devices 3912 * 3913 * This function is invoked after a successful reset. Note that 3914 * the device might have been reset more than once using 3915 * different reset methods before postreset is invoked. 3916 * 3917 * LOCKING: 3918 * Kernel thread context (may sleep) 3919 */ 3920 void ata_std_postreset(struct ata_link *link, unsigned int *classes) 3921 { 3922 struct ata_port *ap = link->ap; 3923 u32 serror; 3924 3925 DPRINTK("ENTER\n"); 3926 3927 /* print link status */ 3928 sata_print_link_status(link); 3929 3930 /* clear SError */ 3931 if (sata_scr_read(link, SCR_ERROR, &serror) == 0) 3932 sata_scr_write(link, SCR_ERROR, serror); 3933 link->eh_info.serror = 0; 3934 3935 /* is double-select really necessary? */ 3936 if (classes[0] != ATA_DEV_NONE) 3937 ap->ops->dev_select(ap, 1); 3938 if (classes[1] != ATA_DEV_NONE) 3939 ap->ops->dev_select(ap, 0); 3940 3941 /* bail out if no device is present */ 3942 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { 3943 DPRINTK("EXIT, no device\n"); 3944 return; 3945 } 3946 3947 /* set up device control */ 3948 if (ap->ioaddr.ctl_addr) 3949 iowrite8(ap->ctl, ap->ioaddr.ctl_addr); 3950 3951 DPRINTK("EXIT\n"); 3952 } 3953 3954 /** 3955 * ata_dev_same_device - Determine whether new ID matches configured device 3956 * @dev: device to compare against 3957 * @new_class: class of the new device 3958 * @new_id: IDENTIFY page of the new device 3959 * 3960 * Compare @new_class and @new_id against @dev and determine 3961 * whether @dev is the device indicated by @new_class and 3962 * @new_id. 3963 * 3964 * LOCKING: 3965 * None. 3966 * 3967 * RETURNS: 3968 * 1 if @dev matches @new_class and @new_id, 0 otherwise. 3969 */ 3970 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class, 3971 const u16 *new_id) 3972 { 3973 const u16 *old_id = dev->id; 3974 unsigned char model[2][ATA_ID_PROD_LEN + 1]; 3975 unsigned char serial[2][ATA_ID_SERNO_LEN + 1]; 3976 3977 if (dev->class != new_class) { 3978 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n", 3979 dev->class, new_class); 3980 return 0; 3981 } 3982 3983 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0])); 3984 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1])); 3985 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0])); 3986 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1])); 3987 3988 if (strcmp(model[0], model[1])) { 3989 ata_dev_printk(dev, KERN_INFO, "model number mismatch " 3990 "'%s' != '%s'\n", model[0], model[1]); 3991 return 0; 3992 } 3993 3994 if (strcmp(serial[0], serial[1])) { 3995 ata_dev_printk(dev, KERN_INFO, "serial number mismatch " 3996 "'%s' != '%s'\n", serial[0], serial[1]); 3997 return 0; 3998 } 3999 4000 return 1; 4001 } 4002 4003 /** 4004 * ata_dev_reread_id - Re-read IDENTIFY data 4005 * @dev: target ATA device 4006 * @readid_flags: read ID flags 4007 * 4008 * Re-read IDENTIFY page and make sure @dev is still attached to 4009 * the port. 4010 * 4011 * LOCKING: 4012 * Kernel thread context (may sleep) 4013 * 4014 * RETURNS: 4015 * 0 on success, negative errno otherwise 4016 */ 4017 int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags) 4018 { 4019 unsigned int class = dev->class; 4020 u16 *id = (void *)dev->link->ap->sector_buf; 4021 int rc; 4022 4023 /* read ID data */ 4024 rc = ata_dev_read_id(dev, &class, readid_flags, id); 4025 if (rc) 4026 return rc; 4027 4028 /* is the device still there? */ 4029 if (!ata_dev_same_device(dev, class, id)) 4030 return -ENODEV; 4031 4032 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS); 4033 return 0; 4034 } 4035 4036 /** 4037 * ata_dev_revalidate - Revalidate ATA device 4038 * @dev: device to revalidate 4039 * @new_class: new class code 4040 * @readid_flags: read ID flags 4041 * 4042 * Re-read IDENTIFY page, make sure @dev is still attached to the 4043 * port and reconfigure it according to the new IDENTIFY page. 4044 * 4045 * LOCKING: 4046 * Kernel thread context (may sleep) 4047 * 4048 * RETURNS: 4049 * 0 on success, negative errno otherwise 4050 */ 4051 int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class, 4052 unsigned int readid_flags) 4053 { 4054 u64 n_sectors = dev->n_sectors; 4055 int rc; 4056 4057 if (!ata_dev_enabled(dev)) 4058 return -ENODEV; 4059 4060 /* fail early if !ATA && !ATAPI to avoid issuing [P]IDENTIFY to PMP */ 4061 if (ata_class_enabled(new_class) && 4062 new_class != ATA_DEV_ATA && new_class != ATA_DEV_ATAPI) { 4063 ata_dev_printk(dev, KERN_INFO, "class mismatch %u != %u\n", 4064 dev->class, new_class); 4065 rc = -ENODEV; 4066 goto fail; 4067 } 4068 4069 /* re-read ID */ 4070 rc = ata_dev_reread_id(dev, readid_flags); 4071 if (rc) 4072 goto fail; 4073 4074 /* configure device according to the new ID */ 4075 rc = ata_dev_configure(dev); 4076 if (rc) 4077 goto fail; 4078 4079 /* verify n_sectors hasn't changed */ 4080 if (dev->class == ATA_DEV_ATA && n_sectors && 4081 dev->n_sectors != n_sectors) { 4082 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch " 4083 "%llu != %llu\n", 4084 (unsigned long long)n_sectors, 4085 (unsigned long long)dev->n_sectors); 4086 4087 /* restore original n_sectors */ 4088 dev->n_sectors = n_sectors; 4089 4090 rc = -ENODEV; 4091 goto fail; 4092 } 4093 4094 return 0; 4095 4096 fail: 4097 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc); 4098 return rc; 4099 } 4100 4101 struct ata_blacklist_entry { 4102 const char *model_num; 4103 const char *model_rev; 4104 unsigned long horkage; 4105 }; 4106 4107 static const struct ata_blacklist_entry ata_device_blacklist [] = { 4108 /* Devices with DMA related problems under Linux */ 4109 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA }, 4110 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA }, 4111 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA }, 4112 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA }, 4113 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA }, 4114 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA }, 4115 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA }, 4116 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA }, 4117 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA }, 4118 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA }, 4119 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA }, 4120 { "CRD-84", NULL, ATA_HORKAGE_NODMA }, 4121 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA }, 4122 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA }, 4123 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA }, 4124 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA }, 4125 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA }, 4126 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA }, 4127 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA }, 4128 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA }, 4129 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA }, 4130 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA }, 4131 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA }, 4132 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA }, 4133 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA }, 4134 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA }, 4135 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA }, 4136 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA }, 4137 { "SAMSUNG CD-ROM SN-124", "N001", ATA_HORKAGE_NODMA }, 4138 { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA }, 4139 /* Odd clown on sil3726/4726 PMPs */ 4140 { "Config Disk", NULL, ATA_HORKAGE_NODMA | 4141 ATA_HORKAGE_SKIP_PM }, 4142 4143 /* Weird ATAPI devices */ 4144 { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 }, 4145 4146 /* Devices we expect to fail diagnostics */ 4147 4148 /* Devices where NCQ should be avoided */ 4149 /* NCQ is slow */ 4150 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ }, 4151 { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, }, 4152 /* http://thread.gmane.org/gmane.linux.ide/14907 */ 4153 { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ }, 4154 /* NCQ is broken */ 4155 { "Maxtor *", "BANC*", ATA_HORKAGE_NONCQ }, 4156 { "Maxtor 7V300F0", "VA111630", ATA_HORKAGE_NONCQ }, 4157 { "HITACHI HDS7250SASUN500G*", NULL, ATA_HORKAGE_NONCQ }, 4158 { "HITACHI HDS7225SBSUN250G*", NULL, ATA_HORKAGE_NONCQ }, 4159 { "ST380817AS", "3.42", ATA_HORKAGE_NONCQ }, 4160 { "ST3160023AS", "3.42", ATA_HORKAGE_NONCQ }, 4161 4162 /* Blacklist entries taken from Silicon Image 3124/3132 4163 Windows driver .inf file - also several Linux problem reports */ 4164 { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, }, 4165 { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, }, 4166 { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, }, 4167 4168 /* devices which puke on READ_NATIVE_MAX */ 4169 { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, }, 4170 { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA }, 4171 { "WDC WD2500JD-00HBB0", "WD-WMAL71490727", ATA_HORKAGE_BROKEN_HPA }, 4172 { "MAXTOR 6L080L4", "A93.0500", ATA_HORKAGE_BROKEN_HPA }, 4173 4174 /* Devices which report 1 sector over size HPA */ 4175 { "ST340823A", NULL, ATA_HORKAGE_HPA_SIZE, }, 4176 { "ST320413A", NULL, ATA_HORKAGE_HPA_SIZE, }, 4177 4178 /* Devices which get the IVB wrong */ 4179 { "QUANTUM FIREBALLlct10 05", "A03.0900", ATA_HORKAGE_IVB, }, 4180 { "TSSTcorp CDDVDW SH-S202J", "SB00", ATA_HORKAGE_IVB, }, 4181 { "TSSTcorp CDDVDW SH-S202J", "SB01", ATA_HORKAGE_IVB, }, 4182 { "TSSTcorp CDDVDW SH-S202N", "SB00", ATA_HORKAGE_IVB, }, 4183 { "TSSTcorp CDDVDW SH-S202N", "SB01", ATA_HORKAGE_IVB, }, 4184 4185 /* End Marker */ 4186 { } 4187 }; 4188 4189 static int strn_pattern_cmp(const char *patt, const char *name, int wildchar) 4190 { 4191 const char *p; 4192 int len; 4193 4194 /* 4195 * check for trailing wildcard: *\0 4196 */ 4197 p = strchr(patt, wildchar); 4198 if (p && ((*(p + 1)) == 0)) 4199 len = p - patt; 4200 else { 4201 len = strlen(name); 4202 if (!len) { 4203 if (!*patt) 4204 return 0; 4205 return -1; 4206 } 4207 } 4208 4209 return strncmp(patt, name, len); 4210 } 4211 4212 static unsigned long ata_dev_blacklisted(const struct ata_device *dev) 4213 { 4214 unsigned char model_num[ATA_ID_PROD_LEN + 1]; 4215 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1]; 4216 const struct ata_blacklist_entry *ad = ata_device_blacklist; 4217 4218 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num)); 4219 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev)); 4220 4221 while (ad->model_num) { 4222 if (!strn_pattern_cmp(ad->model_num, model_num, '*')) { 4223 if (ad->model_rev == NULL) 4224 return ad->horkage; 4225 if (!strn_pattern_cmp(ad->model_rev, model_rev, '*')) 4226 return ad->horkage; 4227 } 4228 ad++; 4229 } 4230 return 0; 4231 } 4232 4233 static int ata_dma_blacklisted(const struct ata_device *dev) 4234 { 4235 /* We don't support polling DMA. 4236 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO) 4237 * if the LLDD handles only interrupts in the HSM_ST_LAST state. 4238 */ 4239 if ((dev->link->ap->flags & ATA_FLAG_PIO_POLLING) && 4240 (dev->flags & ATA_DFLAG_CDB_INTR)) 4241 return 1; 4242 return (dev->horkage & ATA_HORKAGE_NODMA) ? 1 : 0; 4243 } 4244 4245 /** 4246 * ata_is_40wire - check drive side detection 4247 * @dev: device 4248 * 4249 * Perform drive side detection decoding, allowing for device vendors 4250 * who can't follow the documentation. 4251 */ 4252 4253 static int ata_is_40wire(struct ata_device *dev) 4254 { 4255 if (dev->horkage & ATA_HORKAGE_IVB) 4256 return ata_drive_40wire_relaxed(dev->id); 4257 return ata_drive_40wire(dev->id); 4258 } 4259 4260 /** 4261 * ata_dev_xfermask - Compute supported xfermask of the given device 4262 * @dev: Device to compute xfermask for 4263 * 4264 * Compute supported xfermask of @dev and store it in 4265 * dev->*_mask. This function is responsible for applying all 4266 * known limits including host controller limits, device 4267 * blacklist, etc... 4268 * 4269 * LOCKING: 4270 * None. 4271 */ 4272 static void ata_dev_xfermask(struct ata_device *dev) 4273 { 4274 struct ata_link *link = dev->link; 4275 struct ata_port *ap = link->ap; 4276 struct ata_host *host = ap->host; 4277 unsigned long xfer_mask; 4278 4279 /* controller modes available */ 4280 xfer_mask = ata_pack_xfermask(ap->pio_mask, 4281 ap->mwdma_mask, ap->udma_mask); 4282 4283 /* drive modes available */ 4284 xfer_mask &= ata_pack_xfermask(dev->pio_mask, 4285 dev->mwdma_mask, dev->udma_mask); 4286 xfer_mask &= ata_id_xfermask(dev->id); 4287 4288 /* 4289 * CFA Advanced TrueIDE timings are not allowed on a shared 4290 * cable 4291 */ 4292 if (ata_dev_pair(dev)) { 4293 /* No PIO5 or PIO6 */ 4294 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5)); 4295 /* No MWDMA3 or MWDMA 4 */ 4296 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3)); 4297 } 4298 4299 if (ata_dma_blacklisted(dev)) { 4300 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); 4301 ata_dev_printk(dev, KERN_WARNING, 4302 "device is on DMA blacklist, disabling DMA\n"); 4303 } 4304 4305 if ((host->flags & ATA_HOST_SIMPLEX) && 4306 host->simplex_claimed && host->simplex_claimed != ap) { 4307 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); 4308 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by " 4309 "other device, disabling DMA\n"); 4310 } 4311 4312 if (ap->flags & ATA_FLAG_NO_IORDY) 4313 xfer_mask &= ata_pio_mask_no_iordy(dev); 4314 4315 if (ap->ops->mode_filter) 4316 xfer_mask = ap->ops->mode_filter(dev, xfer_mask); 4317 4318 /* Apply cable rule here. Don't apply it early because when 4319 * we handle hot plug the cable type can itself change. 4320 * Check this last so that we know if the transfer rate was 4321 * solely limited by the cable. 4322 * Unknown or 80 wire cables reported host side are checked 4323 * drive side as well. Cases where we know a 40wire cable 4324 * is used safely for 80 are not checked here. 4325 */ 4326 if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA)) 4327 /* UDMA/44 or higher would be available */ 4328 if ((ap->cbl == ATA_CBL_PATA40) || 4329 (ata_is_40wire(dev) && 4330 (ap->cbl == ATA_CBL_PATA_UNK || 4331 ap->cbl == ATA_CBL_PATA80))) { 4332 ata_dev_printk(dev, KERN_WARNING, 4333 "limited to UDMA/33 due to 40-wire cable\n"); 4334 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA); 4335 } 4336 4337 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, 4338 &dev->mwdma_mask, &dev->udma_mask); 4339 } 4340 4341 /** 4342 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command 4343 * @dev: Device to which command will be sent 4344 * 4345 * Issue SET FEATURES - XFER MODE command to device @dev 4346 * on port @ap. 4347 * 4348 * LOCKING: 4349 * PCI/etc. bus probe sem. 4350 * 4351 * RETURNS: 4352 * 0 on success, AC_ERR_* mask otherwise. 4353 */ 4354 4355 static unsigned int ata_dev_set_xfermode(struct ata_device *dev) 4356 { 4357 struct ata_taskfile tf; 4358 unsigned int err_mask; 4359 4360 /* set up set-features taskfile */ 4361 DPRINTK("set features - xfer mode\n"); 4362 4363 /* Some controllers and ATAPI devices show flaky interrupt 4364 * behavior after setting xfer mode. Use polling instead. 4365 */ 4366 ata_tf_init(dev, &tf); 4367 tf.command = ATA_CMD_SET_FEATURES; 4368 tf.feature = SETFEATURES_XFER; 4369 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING; 4370 tf.protocol = ATA_PROT_NODATA; 4371 /* If we are using IORDY we must send the mode setting command */ 4372 if (ata_pio_need_iordy(dev)) 4373 tf.nsect = dev->xfer_mode; 4374 /* If the device has IORDY and the controller does not - turn it off */ 4375 else if (ata_id_has_iordy(dev->id)) 4376 tf.nsect = 0x01; 4377 else /* In the ancient relic department - skip all of this */ 4378 return 0; 4379 4380 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); 4381 4382 DPRINTK("EXIT, err_mask=%x\n", err_mask); 4383 return err_mask; 4384 } 4385 /** 4386 * ata_dev_set_feature - Issue SET FEATURES - SATA FEATURES 4387 * @dev: Device to which command will be sent 4388 * @enable: Whether to enable or disable the feature 4389 * @feature: The sector count represents the feature to set 4390 * 4391 * Issue SET FEATURES - SATA FEATURES command to device @dev 4392 * on port @ap with sector count 4393 * 4394 * LOCKING: 4395 * PCI/etc. bus probe sem. 4396 * 4397 * RETURNS: 4398 * 0 on success, AC_ERR_* mask otherwise. 4399 */ 4400 static unsigned int ata_dev_set_feature(struct ata_device *dev, u8 enable, 4401 u8 feature) 4402 { 4403 struct ata_taskfile tf; 4404 unsigned int err_mask; 4405 4406 /* set up set-features taskfile */ 4407 DPRINTK("set features - SATA features\n"); 4408 4409 ata_tf_init(dev, &tf); 4410 tf.command = ATA_CMD_SET_FEATURES; 4411 tf.feature = enable; 4412 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 4413 tf.protocol = ATA_PROT_NODATA; 4414 tf.nsect = feature; 4415 4416 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); 4417 4418 DPRINTK("EXIT, err_mask=%x\n", err_mask); 4419 return err_mask; 4420 } 4421 4422 /** 4423 * ata_dev_init_params - Issue INIT DEV PARAMS command 4424 * @dev: Device to which command will be sent 4425 * @heads: Number of heads (taskfile parameter) 4426 * @sectors: Number of sectors (taskfile parameter) 4427 * 4428 * LOCKING: 4429 * Kernel thread context (may sleep) 4430 * 4431 * RETURNS: 4432 * 0 on success, AC_ERR_* mask otherwise. 4433 */ 4434 static unsigned int ata_dev_init_params(struct ata_device *dev, 4435 u16 heads, u16 sectors) 4436 { 4437 struct ata_taskfile tf; 4438 unsigned int err_mask; 4439 4440 /* Number of sectors per track 1-255. Number of heads 1-16 */ 4441 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16) 4442 return AC_ERR_INVALID; 4443 4444 /* set up init dev params taskfile */ 4445 DPRINTK("init dev params \n"); 4446 4447 ata_tf_init(dev, &tf); 4448 tf.command = ATA_CMD_INIT_DEV_PARAMS; 4449 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 4450 tf.protocol = ATA_PROT_NODATA; 4451 tf.nsect = sectors; 4452 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */ 4453 4454 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); 4455 /* A clean abort indicates an original or just out of spec drive 4456 and we should continue as we issue the setup based on the 4457 drive reported working geometry */ 4458 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED)) 4459 err_mask = 0; 4460 4461 DPRINTK("EXIT, err_mask=%x\n", err_mask); 4462 return err_mask; 4463 } 4464 4465 /** 4466 * ata_sg_clean - Unmap DMA memory associated with command 4467 * @qc: Command containing DMA memory to be released 4468 * 4469 * Unmap all mapped DMA memory associated with this command. 4470 * 4471 * LOCKING: 4472 * spin_lock_irqsave(host lock) 4473 */ 4474 void ata_sg_clean(struct ata_queued_cmd *qc) 4475 { 4476 struct ata_port *ap = qc->ap; 4477 struct scatterlist *sg = qc->sg; 4478 int dir = qc->dma_dir; 4479 void *pad_buf = NULL; 4480 4481 WARN_ON(sg == NULL); 4482 4483 VPRINTK("unmapping %u sg elements\n", qc->mapped_n_elem); 4484 4485 /* if we padded the buffer out to 32-bit bound, and data 4486 * xfer direction is from-device, we must copy from the 4487 * pad buffer back into the supplied buffer 4488 */ 4489 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE)) 4490 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); 4491 4492 if (qc->mapped_n_elem) 4493 dma_unmap_sg(ap->dev, sg, qc->mapped_n_elem, dir); 4494 /* restore last sg */ 4495 if (qc->last_sg) 4496 *qc->last_sg = qc->saved_last_sg; 4497 if (pad_buf) { 4498 struct scatterlist *psg = &qc->extra_sg[1]; 4499 void *addr = kmap_atomic(sg_page(psg), KM_IRQ0); 4500 memcpy(addr + psg->offset, pad_buf, qc->pad_len); 4501 kunmap_atomic(addr, KM_IRQ0); 4502 } 4503 4504 qc->flags &= ~ATA_QCFLAG_DMAMAP; 4505 qc->sg = NULL; 4506 } 4507 4508 /** 4509 * ata_fill_sg - Fill PCI IDE PRD table 4510 * @qc: Metadata associated with taskfile to be transferred 4511 * 4512 * Fill PCI IDE PRD (scatter-gather) table with segments 4513 * associated with the current disk command. 4514 * 4515 * LOCKING: 4516 * spin_lock_irqsave(host lock) 4517 * 4518 */ 4519 static void ata_fill_sg(struct ata_queued_cmd *qc) 4520 { 4521 struct ata_port *ap = qc->ap; 4522 struct scatterlist *sg; 4523 unsigned int si, pi; 4524 4525 pi = 0; 4526 for_each_sg(qc->sg, sg, qc->n_elem, si) { 4527 u32 addr, offset; 4528 u32 sg_len, len; 4529 4530 /* determine if physical DMA addr spans 64K boundary. 4531 * Note h/w doesn't support 64-bit, so we unconditionally 4532 * truncate dma_addr_t to u32. 4533 */ 4534 addr = (u32) sg_dma_address(sg); 4535 sg_len = sg_dma_len(sg); 4536 4537 while (sg_len) { 4538 offset = addr & 0xffff; 4539 len = sg_len; 4540 if ((offset + sg_len) > 0x10000) 4541 len = 0x10000 - offset; 4542 4543 ap->prd[pi].addr = cpu_to_le32(addr); 4544 ap->prd[pi].flags_len = cpu_to_le32(len & 0xffff); 4545 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len); 4546 4547 pi++; 4548 sg_len -= len; 4549 addr += len; 4550 } 4551 } 4552 4553 ap->prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); 4554 } 4555 4556 /** 4557 * ata_fill_sg_dumb - Fill PCI IDE PRD table 4558 * @qc: Metadata associated with taskfile to be transferred 4559 * 4560 * Fill PCI IDE PRD (scatter-gather) table with segments 4561 * associated with the current disk command. Perform the fill 4562 * so that we avoid writing any length 64K records for 4563 * controllers that don't follow the spec. 4564 * 4565 * LOCKING: 4566 * spin_lock_irqsave(host lock) 4567 * 4568 */ 4569 static void ata_fill_sg_dumb(struct ata_queued_cmd *qc) 4570 { 4571 struct ata_port *ap = qc->ap; 4572 struct scatterlist *sg; 4573 unsigned int si, pi; 4574 4575 pi = 0; 4576 for_each_sg(qc->sg, sg, qc->n_elem, si) { 4577 u32 addr, offset; 4578 u32 sg_len, len, blen; 4579 4580 /* determine if physical DMA addr spans 64K boundary. 4581 * Note h/w doesn't support 64-bit, so we unconditionally 4582 * truncate dma_addr_t to u32. 4583 */ 4584 addr = (u32) sg_dma_address(sg); 4585 sg_len = sg_dma_len(sg); 4586 4587 while (sg_len) { 4588 offset = addr & 0xffff; 4589 len = sg_len; 4590 if ((offset + sg_len) > 0x10000) 4591 len = 0x10000 - offset; 4592 4593 blen = len & 0xffff; 4594 ap->prd[pi].addr = cpu_to_le32(addr); 4595 if (blen == 0) { 4596 /* Some PATA chipsets like the CS5530 can't 4597 cope with 0x0000 meaning 64K as the spec says */ 4598 ap->prd[pi].flags_len = cpu_to_le32(0x8000); 4599 blen = 0x8000; 4600 ap->prd[++pi].addr = cpu_to_le32(addr + 0x8000); 4601 } 4602 ap->prd[pi].flags_len = cpu_to_le32(blen); 4603 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len); 4604 4605 pi++; 4606 sg_len -= len; 4607 addr += len; 4608 } 4609 } 4610 4611 ap->prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); 4612 } 4613 4614 /** 4615 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported 4616 * @qc: Metadata associated with taskfile to check 4617 * 4618 * Allow low-level driver to filter ATA PACKET commands, returning 4619 * a status indicating whether or not it is OK to use DMA for the 4620 * supplied PACKET command. 4621 * 4622 * LOCKING: 4623 * spin_lock_irqsave(host lock) 4624 * 4625 * RETURNS: 0 when ATAPI DMA can be used 4626 * nonzero otherwise 4627 */ 4628 int ata_check_atapi_dma(struct ata_queued_cmd *qc) 4629 { 4630 struct ata_port *ap = qc->ap; 4631 4632 /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a 4633 * few ATAPI devices choke on such DMA requests. 4634 */ 4635 if (unlikely(qc->nbytes & 15)) 4636 return 1; 4637 4638 if (ap->ops->check_atapi_dma) 4639 return ap->ops->check_atapi_dma(qc); 4640 4641 return 0; 4642 } 4643 4644 /** 4645 * atapi_qc_may_overflow - Check whether data transfer may overflow 4646 * @qc: ATA command in question 4647 * 4648 * ATAPI commands which transfer variable length data to host 4649 * might overflow due to application error or hardare bug. This 4650 * function checks whether overflow should be drained and ignored 4651 * for @qc. 4652 * 4653 * LOCKING: 4654 * None. 4655 * 4656 * RETURNS: 4657 * 1 if @qc may overflow; otherwise, 0. 4658 */ 4659 static int atapi_qc_may_overflow(struct ata_queued_cmd *qc) 4660 { 4661 if (qc->tf.protocol != ATAPI_PROT_PIO && 4662 qc->tf.protocol != ATAPI_PROT_DMA) 4663 return 0; 4664 4665 if (qc->tf.flags & ATA_TFLAG_WRITE) 4666 return 0; 4667 4668 switch (qc->cdb[0]) { 4669 case READ_10: 4670 case READ_12: 4671 case WRITE_10: 4672 case WRITE_12: 4673 case GPCMD_READ_CD: 4674 case GPCMD_READ_CD_MSF: 4675 return 0; 4676 } 4677 4678 return 1; 4679 } 4680 4681 /** 4682 * ata_std_qc_defer - Check whether a qc needs to be deferred 4683 * @qc: ATA command in question 4684 * 4685 * Non-NCQ commands cannot run with any other command, NCQ or 4686 * not. As upper layer only knows the queue depth, we are 4687 * responsible for maintaining exclusion. This function checks 4688 * whether a new command @qc can be issued. 4689 * 4690 * LOCKING: 4691 * spin_lock_irqsave(host lock) 4692 * 4693 * RETURNS: 4694 * ATA_DEFER_* if deferring is needed, 0 otherwise. 4695 */ 4696 int ata_std_qc_defer(struct ata_queued_cmd *qc) 4697 { 4698 struct ata_link *link = qc->dev->link; 4699 4700 if (qc->tf.protocol == ATA_PROT_NCQ) { 4701 if (!ata_tag_valid(link->active_tag)) 4702 return 0; 4703 } else { 4704 if (!ata_tag_valid(link->active_tag) && !link->sactive) 4705 return 0; 4706 } 4707 4708 return ATA_DEFER_LINK; 4709 } 4710 4711 /** 4712 * ata_qc_prep - Prepare taskfile for submission 4713 * @qc: Metadata associated with taskfile to be prepared 4714 * 4715 * Prepare ATA taskfile for submission. 4716 * 4717 * LOCKING: 4718 * spin_lock_irqsave(host lock) 4719 */ 4720 void ata_qc_prep(struct ata_queued_cmd *qc) 4721 { 4722 if (!(qc->flags & ATA_QCFLAG_DMAMAP)) 4723 return; 4724 4725 ata_fill_sg(qc); 4726 } 4727 4728 /** 4729 * ata_dumb_qc_prep - Prepare taskfile for submission 4730 * @qc: Metadata associated with taskfile to be prepared 4731 * 4732 * Prepare ATA taskfile for submission. 4733 * 4734 * LOCKING: 4735 * spin_lock_irqsave(host lock) 4736 */ 4737 void ata_dumb_qc_prep(struct ata_queued_cmd *qc) 4738 { 4739 if (!(qc->flags & ATA_QCFLAG_DMAMAP)) 4740 return; 4741 4742 ata_fill_sg_dumb(qc); 4743 } 4744 4745 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { } 4746 4747 /** 4748 * ata_sg_init - Associate command with scatter-gather table. 4749 * @qc: Command to be associated 4750 * @sg: Scatter-gather table. 4751 * @n_elem: Number of elements in s/g table. 4752 * 4753 * Initialize the data-related elements of queued_cmd @qc 4754 * to point to a scatter-gather table @sg, containing @n_elem 4755 * elements. 4756 * 4757 * LOCKING: 4758 * spin_lock_irqsave(host lock) 4759 */ 4760 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, 4761 unsigned int n_elem) 4762 { 4763 qc->sg = sg; 4764 qc->n_elem = n_elem; 4765 qc->cursg = qc->sg; 4766 } 4767 4768 static unsigned int ata_sg_setup_extra(struct ata_queued_cmd *qc, 4769 unsigned int *n_elem_extra, 4770 unsigned int *nbytes_extra) 4771 { 4772 struct ata_port *ap = qc->ap; 4773 unsigned int n_elem = qc->n_elem; 4774 struct scatterlist *lsg, *copy_lsg = NULL, *tsg = NULL, *esg = NULL; 4775 4776 *n_elem_extra = 0; 4777 *nbytes_extra = 0; 4778 4779 /* needs padding? */ 4780 qc->pad_len = qc->nbytes & 3; 4781 4782 if (likely(!qc->pad_len)) 4783 return n_elem; 4784 4785 /* locate last sg and save it */ 4786 lsg = sg_last(qc->sg, n_elem); 4787 qc->last_sg = lsg; 4788 qc->saved_last_sg = *lsg; 4789 4790 sg_init_table(qc->extra_sg, ARRAY_SIZE(qc->extra_sg)); 4791 4792 if (qc->pad_len) { 4793 struct scatterlist *psg = &qc->extra_sg[1]; 4794 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); 4795 unsigned int offset; 4796 4797 WARN_ON(qc->dev->class != ATA_DEV_ATAPI); 4798 4799 memset(pad_buf, 0, ATA_DMA_PAD_SZ); 4800 4801 /* psg->page/offset are used to copy to-be-written 4802 * data in this function or read data in ata_sg_clean. 4803 */ 4804 offset = lsg->offset + lsg->length - qc->pad_len; 4805 sg_set_page(psg, nth_page(sg_page(lsg), offset >> PAGE_SHIFT), 4806 qc->pad_len, offset_in_page(offset)); 4807 4808 if (qc->tf.flags & ATA_TFLAG_WRITE) { 4809 void *addr = kmap_atomic(sg_page(psg), KM_IRQ0); 4810 memcpy(pad_buf, addr + psg->offset, qc->pad_len); 4811 kunmap_atomic(addr, KM_IRQ0); 4812 } 4813 4814 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); 4815 sg_dma_len(psg) = ATA_DMA_PAD_SZ; 4816 4817 /* Trim the last sg entry and chain the original and 4818 * padding sg lists. 4819 * 4820 * Because chaining consumes one sg entry, one extra 4821 * sg entry is allocated and the last sg entry is 4822 * copied to it if the length isn't zero after padded 4823 * amount is removed. 4824 * 4825 * If the last sg entry is completely replaced by 4826 * padding sg entry, the first sg entry is skipped 4827 * while chaining. 4828 */ 4829 lsg->length -= qc->pad_len; 4830 if (lsg->length) { 4831 copy_lsg = &qc->extra_sg[0]; 4832 tsg = &qc->extra_sg[0]; 4833 } else { 4834 n_elem--; 4835 tsg = &qc->extra_sg[1]; 4836 } 4837 4838 esg = &qc->extra_sg[1]; 4839 4840 (*n_elem_extra)++; 4841 (*nbytes_extra) += 4 - qc->pad_len; 4842 } 4843 4844 if (copy_lsg) 4845 sg_set_page(copy_lsg, sg_page(lsg), lsg->length, lsg->offset); 4846 4847 sg_chain(lsg, 1, tsg); 4848 sg_mark_end(esg); 4849 4850 /* sglist can't start with chaining sg entry, fast forward */ 4851 if (qc->sg == lsg) { 4852 qc->sg = tsg; 4853 qc->cursg = tsg; 4854 } 4855 4856 return n_elem; 4857 } 4858 4859 /** 4860 * ata_sg_setup - DMA-map the scatter-gather table associated with a command. 4861 * @qc: Command with scatter-gather table to be mapped. 4862 * 4863 * DMA-map the scatter-gather table associated with queued_cmd @qc. 4864 * 4865 * LOCKING: 4866 * spin_lock_irqsave(host lock) 4867 * 4868 * RETURNS: 4869 * Zero on success, negative on error. 4870 * 4871 */ 4872 static int ata_sg_setup(struct ata_queued_cmd *qc) 4873 { 4874 struct ata_port *ap = qc->ap; 4875 unsigned int n_elem, n_elem_extra, nbytes_extra; 4876 4877 VPRINTK("ENTER, ata%u\n", ap->print_id); 4878 4879 n_elem = ata_sg_setup_extra(qc, &n_elem_extra, &nbytes_extra); 4880 4881 if (n_elem) { 4882 n_elem = dma_map_sg(ap->dev, qc->sg, n_elem, qc->dma_dir); 4883 if (n_elem < 1) { 4884 /* restore last sg */ 4885 if (qc->last_sg) 4886 *qc->last_sg = qc->saved_last_sg; 4887 return -1; 4888 } 4889 DPRINTK("%d sg elements mapped\n", n_elem); 4890 } 4891 4892 qc->n_elem = qc->mapped_n_elem = n_elem; 4893 qc->n_elem += n_elem_extra; 4894 qc->nbytes += nbytes_extra; 4895 qc->flags |= ATA_QCFLAG_DMAMAP; 4896 4897 return 0; 4898 } 4899 4900 /** 4901 * swap_buf_le16 - swap halves of 16-bit words in place 4902 * @buf: Buffer to swap 4903 * @buf_words: Number of 16-bit words in buffer. 4904 * 4905 * Swap halves of 16-bit words if needed to convert from 4906 * little-endian byte order to native cpu byte order, or 4907 * vice-versa. 4908 * 4909 * LOCKING: 4910 * Inherited from caller. 4911 */ 4912 void swap_buf_le16(u16 *buf, unsigned int buf_words) 4913 { 4914 #ifdef __BIG_ENDIAN 4915 unsigned int i; 4916 4917 for (i = 0; i < buf_words; i++) 4918 buf[i] = le16_to_cpu(buf[i]); 4919 #endif /* __BIG_ENDIAN */ 4920 } 4921 4922 /** 4923 * ata_data_xfer - Transfer data by PIO 4924 * @dev: device to target 4925 * @buf: data buffer 4926 * @buflen: buffer length 4927 * @write_data: read/write 4928 * 4929 * Transfer data from/to the device data register by PIO. 4930 * 4931 * LOCKING: 4932 * Inherited from caller. 4933 * 4934 * RETURNS: 4935 * Bytes consumed. 4936 */ 4937 unsigned int ata_data_xfer(struct ata_device *dev, unsigned char *buf, 4938 unsigned int buflen, int rw) 4939 { 4940 struct ata_port *ap = dev->link->ap; 4941 void __iomem *data_addr = ap->ioaddr.data_addr; 4942 unsigned int words = buflen >> 1; 4943 4944 /* Transfer multiple of 2 bytes */ 4945 if (rw == READ) 4946 ioread16_rep(data_addr, buf, words); 4947 else 4948 iowrite16_rep(data_addr, buf, words); 4949 4950 /* Transfer trailing 1 byte, if any. */ 4951 if (unlikely(buflen & 0x01)) { 4952 __le16 align_buf[1] = { 0 }; 4953 unsigned char *trailing_buf = buf + buflen - 1; 4954 4955 if (rw == READ) { 4956 align_buf[0] = cpu_to_le16(ioread16(data_addr)); 4957 memcpy(trailing_buf, align_buf, 1); 4958 } else { 4959 memcpy(align_buf, trailing_buf, 1); 4960 iowrite16(le16_to_cpu(align_buf[0]), data_addr); 4961 } 4962 words++; 4963 } 4964 4965 return words << 1; 4966 } 4967 4968 /** 4969 * ata_data_xfer_noirq - Transfer data by PIO 4970 * @dev: device to target 4971 * @buf: data buffer 4972 * @buflen: buffer length 4973 * @write_data: read/write 4974 * 4975 * Transfer data from/to the device data register by PIO. Do the 4976 * transfer with interrupts disabled. 4977 * 4978 * LOCKING: 4979 * Inherited from caller. 4980 * 4981 * RETURNS: 4982 * Bytes consumed. 4983 */ 4984 unsigned int ata_data_xfer_noirq(struct ata_device *dev, unsigned char *buf, 4985 unsigned int buflen, int rw) 4986 { 4987 unsigned long flags; 4988 unsigned int consumed; 4989 4990 local_irq_save(flags); 4991 consumed = ata_data_xfer(dev, buf, buflen, rw); 4992 local_irq_restore(flags); 4993 4994 return consumed; 4995 } 4996 4997 4998 /** 4999 * ata_pio_sector - Transfer a sector of data. 5000 * @qc: Command on going 5001 * 5002 * Transfer qc->sect_size bytes of data from/to the ATA device. 5003 * 5004 * LOCKING: 5005 * Inherited from caller. 5006 */ 5007 5008 static void ata_pio_sector(struct ata_queued_cmd *qc) 5009 { 5010 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); 5011 struct ata_port *ap = qc->ap; 5012 struct page *page; 5013 unsigned int offset; 5014 unsigned char *buf; 5015 5016 if (qc->curbytes == qc->nbytes - qc->sect_size) 5017 ap->hsm_task_state = HSM_ST_LAST; 5018 5019 page = sg_page(qc->cursg); 5020 offset = qc->cursg->offset + qc->cursg_ofs; 5021 5022 /* get the current page and offset */ 5023 page = nth_page(page, (offset >> PAGE_SHIFT)); 5024 offset %= PAGE_SIZE; 5025 5026 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); 5027 5028 if (PageHighMem(page)) { 5029 unsigned long flags; 5030 5031 /* FIXME: use a bounce buffer */ 5032 local_irq_save(flags); 5033 buf = kmap_atomic(page, KM_IRQ0); 5034 5035 /* do the actual data transfer */ 5036 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write); 5037 5038 kunmap_atomic(buf, KM_IRQ0); 5039 local_irq_restore(flags); 5040 } else { 5041 buf = page_address(page); 5042 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write); 5043 } 5044 5045 qc->curbytes += qc->sect_size; 5046 qc->cursg_ofs += qc->sect_size; 5047 5048 if (qc->cursg_ofs == qc->cursg->length) { 5049 qc->cursg = sg_next(qc->cursg); 5050 qc->cursg_ofs = 0; 5051 } 5052 } 5053 5054 /** 5055 * ata_pio_sectors - Transfer one or many sectors. 5056 * @qc: Command on going 5057 * 5058 * Transfer one or many sectors of data from/to the 5059 * ATA device for the DRQ request. 5060 * 5061 * LOCKING: 5062 * Inherited from caller. 5063 */ 5064 5065 static void ata_pio_sectors(struct ata_queued_cmd *qc) 5066 { 5067 if (is_multi_taskfile(&qc->tf)) { 5068 /* READ/WRITE MULTIPLE */ 5069 unsigned int nsect; 5070 5071 WARN_ON(qc->dev->multi_count == 0); 5072 5073 nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size, 5074 qc->dev->multi_count); 5075 while (nsect--) 5076 ata_pio_sector(qc); 5077 } else 5078 ata_pio_sector(qc); 5079 5080 ata_altstatus(qc->ap); /* flush */ 5081 } 5082 5083 /** 5084 * atapi_send_cdb - Write CDB bytes to hardware 5085 * @ap: Port to which ATAPI device is attached. 5086 * @qc: Taskfile currently active 5087 * 5088 * When device has indicated its readiness to accept 5089 * a CDB, this function is called. Send the CDB. 5090 * 5091 * LOCKING: 5092 * caller. 5093 */ 5094 5095 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc) 5096 { 5097 /* send SCSI cdb */ 5098 DPRINTK("send cdb\n"); 5099 WARN_ON(qc->dev->cdb_len < 12); 5100 5101 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1); 5102 ata_altstatus(ap); /* flush */ 5103 5104 switch (qc->tf.protocol) { 5105 case ATAPI_PROT_PIO: 5106 ap->hsm_task_state = HSM_ST; 5107 break; 5108 case ATAPI_PROT_NODATA: 5109 ap->hsm_task_state = HSM_ST_LAST; 5110 break; 5111 case ATAPI_PROT_DMA: 5112 ap->hsm_task_state = HSM_ST_LAST; 5113 /* initiate bmdma */ 5114 ap->ops->bmdma_start(qc); 5115 break; 5116 } 5117 } 5118 5119 /** 5120 * __atapi_pio_bytes - Transfer data from/to the ATAPI device. 5121 * @qc: Command on going 5122 * @bytes: number of bytes 5123 * 5124 * Transfer Transfer data from/to the ATAPI device. 5125 * 5126 * LOCKING: 5127 * Inherited from caller. 5128 * 5129 */ 5130 static int __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) 5131 { 5132 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); 5133 struct ata_port *ap = qc->ap; 5134 struct ata_eh_info *ehi = &qc->dev->link->eh_info; 5135 struct scatterlist *sg; 5136 struct page *page; 5137 unsigned char *buf; 5138 unsigned int offset, count; 5139 5140 next_sg: 5141 sg = qc->cursg; 5142 if (unlikely(!sg)) { 5143 /* 5144 * The end of qc->sg is reached and the device expects 5145 * more data to transfer. In order not to overrun qc->sg 5146 * and fulfill length specified in the byte count register, 5147 * - for read case, discard trailing data from the device 5148 * - for write case, padding zero data to the device 5149 */ 5150 u16 pad_buf[1] = { 0 }; 5151 unsigned int i; 5152 5153 if (bytes > qc->curbytes - qc->nbytes + ATAPI_MAX_DRAIN) { 5154 ata_ehi_push_desc(ehi, "too much trailing data " 5155 "buf=%u cur=%u bytes=%u", 5156 qc->nbytes, qc->curbytes, bytes); 5157 return -1; 5158 } 5159 5160 /* overflow is exptected for misc ATAPI commands */ 5161 if (bytes && !atapi_qc_may_overflow(qc)) 5162 ata_dev_printk(qc->dev, KERN_WARNING, "ATAPI %u bytes " 5163 "trailing data (cdb=%02x nbytes=%u)\n", 5164 bytes, qc->cdb[0], qc->nbytes); 5165 5166 for (i = 0; i < (bytes + 1) / 2; i++) 5167 ap->ops->data_xfer(qc->dev, (unsigned char *)pad_buf, 2, do_write); 5168 5169 qc->curbytes += bytes; 5170 5171 return 0; 5172 } 5173 5174 page = sg_page(sg); 5175 offset = sg->offset + qc->cursg_ofs; 5176 5177 /* get the current page and offset */ 5178 page = nth_page(page, (offset >> PAGE_SHIFT)); 5179 offset %= PAGE_SIZE; 5180 5181 /* don't overrun current sg */ 5182 count = min(sg->length - qc->cursg_ofs, bytes); 5183 5184 /* don't cross page boundaries */ 5185 count = min(count, (unsigned int)PAGE_SIZE - offset); 5186 5187 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); 5188 5189 if (PageHighMem(page)) { 5190 unsigned long flags; 5191 5192 /* FIXME: use bounce buffer */ 5193 local_irq_save(flags); 5194 buf = kmap_atomic(page, KM_IRQ0); 5195 5196 /* do the actual data transfer */ 5197 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); 5198 5199 kunmap_atomic(buf, KM_IRQ0); 5200 local_irq_restore(flags); 5201 } else { 5202 buf = page_address(page); 5203 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); 5204 } 5205 5206 bytes -= count; 5207 if ((count & 1) && bytes) 5208 bytes--; 5209 qc->curbytes += count; 5210 qc->cursg_ofs += count; 5211 5212 if (qc->cursg_ofs == sg->length) { 5213 qc->cursg = sg_next(qc->cursg); 5214 qc->cursg_ofs = 0; 5215 } 5216 5217 if (bytes) 5218 goto next_sg; 5219 5220 return 0; 5221 } 5222 5223 /** 5224 * atapi_pio_bytes - Transfer data from/to the ATAPI device. 5225 * @qc: Command on going 5226 * 5227 * Transfer Transfer data from/to the ATAPI device. 5228 * 5229 * LOCKING: 5230 * Inherited from caller. 5231 */ 5232 5233 static void atapi_pio_bytes(struct ata_queued_cmd *qc) 5234 { 5235 struct ata_port *ap = qc->ap; 5236 struct ata_device *dev = qc->dev; 5237 unsigned int ireason, bc_lo, bc_hi, bytes; 5238 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; 5239 5240 /* Abuse qc->result_tf for temp storage of intermediate TF 5241 * here to save some kernel stack usage. 5242 * For normal completion, qc->result_tf is not relevant. For 5243 * error, qc->result_tf is later overwritten by ata_qc_complete(). 5244 * So, the correctness of qc->result_tf is not affected. 5245 */ 5246 ap->ops->tf_read(ap, &qc->result_tf); 5247 ireason = qc->result_tf.nsect; 5248 bc_lo = qc->result_tf.lbam; 5249 bc_hi = qc->result_tf.lbah; 5250 bytes = (bc_hi << 8) | bc_lo; 5251 5252 /* shall be cleared to zero, indicating xfer of data */ 5253 if (unlikely(ireason & (1 << 0))) 5254 goto err_out; 5255 5256 /* make sure transfer direction matches expected */ 5257 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; 5258 if (unlikely(do_write != i_write)) 5259 goto err_out; 5260 5261 if (unlikely(!bytes)) 5262 goto err_out; 5263 5264 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes); 5265 5266 if (__atapi_pio_bytes(qc, bytes)) 5267 goto err_out; 5268 ata_altstatus(ap); /* flush */ 5269 5270 return; 5271 5272 err_out: 5273 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n"); 5274 qc->err_mask |= AC_ERR_HSM; 5275 ap->hsm_task_state = HSM_ST_ERR; 5276 } 5277 5278 /** 5279 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue. 5280 * @ap: the target ata_port 5281 * @qc: qc on going 5282 * 5283 * RETURNS: 5284 * 1 if ok in workqueue, 0 otherwise. 5285 */ 5286 5287 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc) 5288 { 5289 if (qc->tf.flags & ATA_TFLAG_POLLING) 5290 return 1; 5291 5292 if (ap->hsm_task_state == HSM_ST_FIRST) { 5293 if (qc->tf.protocol == ATA_PROT_PIO && 5294 (qc->tf.flags & ATA_TFLAG_WRITE)) 5295 return 1; 5296 5297 if (ata_is_atapi(qc->tf.protocol) && 5298 !(qc->dev->flags & ATA_DFLAG_CDB_INTR)) 5299 return 1; 5300 } 5301 5302 return 0; 5303 } 5304 5305 /** 5306 * ata_hsm_qc_complete - finish a qc running on standard HSM 5307 * @qc: Command to complete 5308 * @in_wq: 1 if called from workqueue, 0 otherwise 5309 * 5310 * Finish @qc which is running on standard HSM. 5311 * 5312 * LOCKING: 5313 * If @in_wq is zero, spin_lock_irqsave(host lock). 5314 * Otherwise, none on entry and grabs host lock. 5315 */ 5316 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq) 5317 { 5318 struct ata_port *ap = qc->ap; 5319 unsigned long flags; 5320 5321 if (ap->ops->error_handler) { 5322 if (in_wq) { 5323 spin_lock_irqsave(ap->lock, flags); 5324 5325 /* EH might have kicked in while host lock is 5326 * released. 5327 */ 5328 qc = ata_qc_from_tag(ap, qc->tag); 5329 if (qc) { 5330 if (likely(!(qc->err_mask & AC_ERR_HSM))) { 5331 ap->ops->irq_on(ap); 5332 ata_qc_complete(qc); 5333 } else 5334 ata_port_freeze(ap); 5335 } 5336 5337 spin_unlock_irqrestore(ap->lock, flags); 5338 } else { 5339 if (likely(!(qc->err_mask & AC_ERR_HSM))) 5340 ata_qc_complete(qc); 5341 else 5342 ata_port_freeze(ap); 5343 } 5344 } else { 5345 if (in_wq) { 5346 spin_lock_irqsave(ap->lock, flags); 5347 ap->ops->irq_on(ap); 5348 ata_qc_complete(qc); 5349 spin_unlock_irqrestore(ap->lock, flags); 5350 } else 5351 ata_qc_complete(qc); 5352 } 5353 } 5354 5355 /** 5356 * ata_hsm_move - move the HSM to the next state. 5357 * @ap: the target ata_port 5358 * @qc: qc on going 5359 * @status: current device status 5360 * @in_wq: 1 if called from workqueue, 0 otherwise 5361 * 5362 * RETURNS: 5363 * 1 when poll next status needed, 0 otherwise. 5364 */ 5365 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc, 5366 u8 status, int in_wq) 5367 { 5368 unsigned long flags = 0; 5369 int poll_next; 5370 5371 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0); 5372 5373 /* Make sure ata_qc_issue_prot() does not throw things 5374 * like DMA polling into the workqueue. Notice that 5375 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING). 5376 */ 5377 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc)); 5378 5379 fsm_start: 5380 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n", 5381 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status); 5382 5383 switch (ap->hsm_task_state) { 5384 case HSM_ST_FIRST: 5385 /* Send first data block or PACKET CDB */ 5386 5387 /* If polling, we will stay in the work queue after 5388 * sending the data. Otherwise, interrupt handler 5389 * takes over after sending the data. 5390 */ 5391 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING); 5392 5393 /* check device status */ 5394 if (unlikely((status & ATA_DRQ) == 0)) { 5395 /* handle BSY=0, DRQ=0 as error */ 5396 if (likely(status & (ATA_ERR | ATA_DF))) 5397 /* device stops HSM for abort/error */ 5398 qc->err_mask |= AC_ERR_DEV; 5399 else 5400 /* HSM violation. Let EH handle this */ 5401 qc->err_mask |= AC_ERR_HSM; 5402 5403 ap->hsm_task_state = HSM_ST_ERR; 5404 goto fsm_start; 5405 } 5406 5407 /* Device should not ask for data transfer (DRQ=1) 5408 * when it finds something wrong. 5409 * We ignore DRQ here and stop the HSM by 5410 * changing hsm_task_state to HSM_ST_ERR and 5411 * let the EH abort the command or reset the device. 5412 */ 5413 if (unlikely(status & (ATA_ERR | ATA_DF))) { 5414 /* Some ATAPI tape drives forget to clear the ERR bit 5415 * when doing the next command (mostly request sense). 5416 * We ignore ERR here to workaround and proceed sending 5417 * the CDB. 5418 */ 5419 if (!(qc->dev->horkage & ATA_HORKAGE_STUCK_ERR)) { 5420 ata_port_printk(ap, KERN_WARNING, 5421 "DRQ=1 with device error, " 5422 "dev_stat 0x%X\n", status); 5423 qc->err_mask |= AC_ERR_HSM; 5424 ap->hsm_task_state = HSM_ST_ERR; 5425 goto fsm_start; 5426 } 5427 } 5428 5429 /* Send the CDB (atapi) or the first data block (ata pio out). 5430 * During the state transition, interrupt handler shouldn't 5431 * be invoked before the data transfer is complete and 5432 * hsm_task_state is changed. Hence, the following locking. 5433 */ 5434 if (in_wq) 5435 spin_lock_irqsave(ap->lock, flags); 5436 5437 if (qc->tf.protocol == ATA_PROT_PIO) { 5438 /* PIO data out protocol. 5439 * send first data block. 5440 */ 5441 5442 /* ata_pio_sectors() might change the state 5443 * to HSM_ST_LAST. so, the state is changed here 5444 * before ata_pio_sectors(). 5445 */ 5446 ap->hsm_task_state = HSM_ST; 5447 ata_pio_sectors(qc); 5448 } else 5449 /* send CDB */ 5450 atapi_send_cdb(ap, qc); 5451 5452 if (in_wq) 5453 spin_unlock_irqrestore(ap->lock, flags); 5454 5455 /* if polling, ata_pio_task() handles the rest. 5456 * otherwise, interrupt handler takes over from here. 5457 */ 5458 break; 5459 5460 case HSM_ST: 5461 /* complete command or read/write the data register */ 5462 if (qc->tf.protocol == ATAPI_PROT_PIO) { 5463 /* ATAPI PIO protocol */ 5464 if ((status & ATA_DRQ) == 0) { 5465 /* No more data to transfer or device error. 5466 * Device error will be tagged in HSM_ST_LAST. 5467 */ 5468 ap->hsm_task_state = HSM_ST_LAST; 5469 goto fsm_start; 5470 } 5471 5472 /* Device should not ask for data transfer (DRQ=1) 5473 * when it finds something wrong. 5474 * We ignore DRQ here and stop the HSM by 5475 * changing hsm_task_state to HSM_ST_ERR and 5476 * let the EH abort the command or reset the device. 5477 */ 5478 if (unlikely(status & (ATA_ERR | ATA_DF))) { 5479 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with " 5480 "device error, dev_stat 0x%X\n", 5481 status); 5482 qc->err_mask |= AC_ERR_HSM; 5483 ap->hsm_task_state = HSM_ST_ERR; 5484 goto fsm_start; 5485 } 5486 5487 atapi_pio_bytes(qc); 5488 5489 if (unlikely(ap->hsm_task_state == HSM_ST_ERR)) 5490 /* bad ireason reported by device */ 5491 goto fsm_start; 5492 5493 } else { 5494 /* ATA PIO protocol */ 5495 if (unlikely((status & ATA_DRQ) == 0)) { 5496 /* handle BSY=0, DRQ=0 as error */ 5497 if (likely(status & (ATA_ERR | ATA_DF))) 5498 /* device stops HSM for abort/error */ 5499 qc->err_mask |= AC_ERR_DEV; 5500 else 5501 /* HSM violation. Let EH handle this. 5502 * Phantom devices also trigger this 5503 * condition. Mark hint. 5504 */ 5505 qc->err_mask |= AC_ERR_HSM | 5506 AC_ERR_NODEV_HINT; 5507 5508 ap->hsm_task_state = HSM_ST_ERR; 5509 goto fsm_start; 5510 } 5511 5512 /* For PIO reads, some devices may ask for 5513 * data transfer (DRQ=1) alone with ERR=1. 5514 * We respect DRQ here and transfer one 5515 * block of junk data before changing the 5516 * hsm_task_state to HSM_ST_ERR. 5517 * 5518 * For PIO writes, ERR=1 DRQ=1 doesn't make 5519 * sense since the data block has been 5520 * transferred to the device. 5521 */ 5522 if (unlikely(status & (ATA_ERR | ATA_DF))) { 5523 /* data might be corrputed */ 5524 qc->err_mask |= AC_ERR_DEV; 5525 5526 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) { 5527 ata_pio_sectors(qc); 5528 status = ata_wait_idle(ap); 5529 } 5530 5531 if (status & (ATA_BUSY | ATA_DRQ)) 5532 qc->err_mask |= AC_ERR_HSM; 5533 5534 /* ata_pio_sectors() might change the 5535 * state to HSM_ST_LAST. so, the state 5536 * is changed after ata_pio_sectors(). 5537 */ 5538 ap->hsm_task_state = HSM_ST_ERR; 5539 goto fsm_start; 5540 } 5541 5542 ata_pio_sectors(qc); 5543 5544 if (ap->hsm_task_state == HSM_ST_LAST && 5545 (!(qc->tf.flags & ATA_TFLAG_WRITE))) { 5546 /* all data read */ 5547 status = ata_wait_idle(ap); 5548 goto fsm_start; 5549 } 5550 } 5551 5552 poll_next = 1; 5553 break; 5554 5555 case HSM_ST_LAST: 5556 if (unlikely(!ata_ok(status))) { 5557 qc->err_mask |= __ac_err_mask(status); 5558 ap->hsm_task_state = HSM_ST_ERR; 5559 goto fsm_start; 5560 } 5561 5562 /* no more data to transfer */ 5563 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n", 5564 ap->print_id, qc->dev->devno, status); 5565 5566 WARN_ON(qc->err_mask); 5567 5568 ap->hsm_task_state = HSM_ST_IDLE; 5569 5570 /* complete taskfile transaction */ 5571 ata_hsm_qc_complete(qc, in_wq); 5572 5573 poll_next = 0; 5574 break; 5575 5576 case HSM_ST_ERR: 5577 /* make sure qc->err_mask is available to 5578 * know what's wrong and recover 5579 */ 5580 WARN_ON(qc->err_mask == 0); 5581 5582 ap->hsm_task_state = HSM_ST_IDLE; 5583 5584 /* complete taskfile transaction */ 5585 ata_hsm_qc_complete(qc, in_wq); 5586 5587 poll_next = 0; 5588 break; 5589 default: 5590 poll_next = 0; 5591 BUG(); 5592 } 5593 5594 return poll_next; 5595 } 5596 5597 static void ata_pio_task(struct work_struct *work) 5598 { 5599 struct ata_port *ap = 5600 container_of(work, struct ata_port, port_task.work); 5601 struct ata_queued_cmd *qc = ap->port_task_data; 5602 u8 status; 5603 int poll_next; 5604 5605 fsm_start: 5606 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE); 5607 5608 /* 5609 * This is purely heuristic. This is a fast path. 5610 * Sometimes when we enter, BSY will be cleared in 5611 * a chk-status or two. If not, the drive is probably seeking 5612 * or something. Snooze for a couple msecs, then 5613 * chk-status again. If still busy, queue delayed work. 5614 */ 5615 status = ata_busy_wait(ap, ATA_BUSY, 5); 5616 if (status & ATA_BUSY) { 5617 msleep(2); 5618 status = ata_busy_wait(ap, ATA_BUSY, 10); 5619 if (status & ATA_BUSY) { 5620 ata_pio_queue_task(ap, qc, ATA_SHORT_PAUSE); 5621 return; 5622 } 5623 } 5624 5625 /* move the HSM */ 5626 poll_next = ata_hsm_move(ap, qc, status, 1); 5627 5628 /* another command or interrupt handler 5629 * may be running at this point. 5630 */ 5631 if (poll_next) 5632 goto fsm_start; 5633 } 5634 5635 /** 5636 * ata_qc_new - Request an available ATA command, for queueing 5637 * @ap: Port associated with device @dev 5638 * @dev: Device from whom we request an available command structure 5639 * 5640 * LOCKING: 5641 * None. 5642 */ 5643 5644 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) 5645 { 5646 struct ata_queued_cmd *qc = NULL; 5647 unsigned int i; 5648 5649 /* no command while frozen */ 5650 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN)) 5651 return NULL; 5652 5653 /* the last tag is reserved for internal command. */ 5654 for (i = 0; i < ATA_MAX_QUEUE - 1; i++) 5655 if (!test_and_set_bit(i, &ap->qc_allocated)) { 5656 qc = __ata_qc_from_tag(ap, i); 5657 break; 5658 } 5659 5660 if (qc) 5661 qc->tag = i; 5662 5663 return qc; 5664 } 5665 5666 /** 5667 * ata_qc_new_init - Request an available ATA command, and initialize it 5668 * @dev: Device from whom we request an available command structure 5669 * 5670 * LOCKING: 5671 * None. 5672 */ 5673 5674 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev) 5675 { 5676 struct ata_port *ap = dev->link->ap; 5677 struct ata_queued_cmd *qc; 5678 5679 qc = ata_qc_new(ap); 5680 if (qc) { 5681 qc->scsicmd = NULL; 5682 qc->ap = ap; 5683 qc->dev = dev; 5684 5685 ata_qc_reinit(qc); 5686 } 5687 5688 return qc; 5689 } 5690 5691 /** 5692 * ata_qc_free - free unused ata_queued_cmd 5693 * @qc: Command to complete 5694 * 5695 * Designed to free unused ata_queued_cmd object 5696 * in case something prevents using it. 5697 * 5698 * LOCKING: 5699 * spin_lock_irqsave(host lock) 5700 */ 5701 void ata_qc_free(struct ata_queued_cmd *qc) 5702 { 5703 struct ata_port *ap = qc->ap; 5704 unsigned int tag; 5705 5706 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ 5707 5708 qc->flags = 0; 5709 tag = qc->tag; 5710 if (likely(ata_tag_valid(tag))) { 5711 qc->tag = ATA_TAG_POISON; 5712 clear_bit(tag, &ap->qc_allocated); 5713 } 5714 } 5715 5716 void __ata_qc_complete(struct ata_queued_cmd *qc) 5717 { 5718 struct ata_port *ap = qc->ap; 5719 struct ata_link *link = qc->dev->link; 5720 5721 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ 5722 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE)); 5723 5724 if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) 5725 ata_sg_clean(qc); 5726 5727 /* command should be marked inactive atomically with qc completion */ 5728 if (qc->tf.protocol == ATA_PROT_NCQ) { 5729 link->sactive &= ~(1 << qc->tag); 5730 if (!link->sactive) 5731 ap->nr_active_links--; 5732 } else { 5733 link->active_tag = ATA_TAG_POISON; 5734 ap->nr_active_links--; 5735 } 5736 5737 /* clear exclusive status */ 5738 if (unlikely(qc->flags & ATA_QCFLAG_CLEAR_EXCL && 5739 ap->excl_link == link)) 5740 ap->excl_link = NULL; 5741 5742 /* atapi: mark qc as inactive to prevent the interrupt handler 5743 * from completing the command twice later, before the error handler 5744 * is called. (when rc != 0 and atapi request sense is needed) 5745 */ 5746 qc->flags &= ~ATA_QCFLAG_ACTIVE; 5747 ap->qc_active &= ~(1 << qc->tag); 5748 5749 /* call completion callback */ 5750 qc->complete_fn(qc); 5751 } 5752 5753 static void fill_result_tf(struct ata_queued_cmd *qc) 5754 { 5755 struct ata_port *ap = qc->ap; 5756 5757 qc->result_tf.flags = qc->tf.flags; 5758 ap->ops->tf_read(ap, &qc->result_tf); 5759 } 5760 5761 static void ata_verify_xfer(struct ata_queued_cmd *qc) 5762 { 5763 struct ata_device *dev = qc->dev; 5764 5765 if (ata_tag_internal(qc->tag)) 5766 return; 5767 5768 if (ata_is_nodata(qc->tf.protocol)) 5769 return; 5770 5771 if ((dev->mwdma_mask || dev->udma_mask) && ata_is_pio(qc->tf.protocol)) 5772 return; 5773 5774 dev->flags &= ~ATA_DFLAG_DUBIOUS_XFER; 5775 } 5776 5777 /** 5778 * ata_qc_complete - Complete an active ATA command 5779 * @qc: Command to complete 5780 * @err_mask: ATA Status register contents 5781 * 5782 * Indicate to the mid and upper layers that an ATA 5783 * command has completed, with either an ok or not-ok status. 5784 * 5785 * LOCKING: 5786 * spin_lock_irqsave(host lock) 5787 */ 5788 void ata_qc_complete(struct ata_queued_cmd *qc) 5789 { 5790 struct ata_port *ap = qc->ap; 5791 5792 /* XXX: New EH and old EH use different mechanisms to 5793 * synchronize EH with regular execution path. 5794 * 5795 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED. 5796 * Normal execution path is responsible for not accessing a 5797 * failed qc. libata core enforces the rule by returning NULL 5798 * from ata_qc_from_tag() for failed qcs. 5799 * 5800 * Old EH depends on ata_qc_complete() nullifying completion 5801 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does 5802 * not synchronize with interrupt handler. Only PIO task is 5803 * taken care of. 5804 */ 5805 if (ap->ops->error_handler) { 5806 struct ata_device *dev = qc->dev; 5807 struct ata_eh_info *ehi = &dev->link->eh_info; 5808 5809 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN); 5810 5811 if (unlikely(qc->err_mask)) 5812 qc->flags |= ATA_QCFLAG_FAILED; 5813 5814 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) { 5815 if (!ata_tag_internal(qc->tag)) { 5816 /* always fill result TF for failed qc */ 5817 fill_result_tf(qc); 5818 ata_qc_schedule_eh(qc); 5819 return; 5820 } 5821 } 5822 5823 /* read result TF if requested */ 5824 if (qc->flags & ATA_QCFLAG_RESULT_TF) 5825 fill_result_tf(qc); 5826 5827 /* Some commands need post-processing after successful 5828 * completion. 5829 */ 5830 switch (qc->tf.command) { 5831 case ATA_CMD_SET_FEATURES: 5832 if (qc->tf.feature != SETFEATURES_WC_ON && 5833 qc->tf.feature != SETFEATURES_WC_OFF) 5834 break; 5835 /* fall through */ 5836 case ATA_CMD_INIT_DEV_PARAMS: /* CHS translation changed */ 5837 case ATA_CMD_SET_MULTI: /* multi_count changed */ 5838 /* revalidate device */ 5839 ehi->dev_action[dev->devno] |= ATA_EH_REVALIDATE; 5840 ata_port_schedule_eh(ap); 5841 break; 5842 5843 case ATA_CMD_SLEEP: 5844 dev->flags |= ATA_DFLAG_SLEEPING; 5845 break; 5846 } 5847 5848 if (unlikely(dev->flags & ATA_DFLAG_DUBIOUS_XFER)) 5849 ata_verify_xfer(qc); 5850 5851 __ata_qc_complete(qc); 5852 } else { 5853 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED) 5854 return; 5855 5856 /* read result TF if failed or requested */ 5857 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF) 5858 fill_result_tf(qc); 5859 5860 __ata_qc_complete(qc); 5861 } 5862 } 5863 5864 /** 5865 * ata_qc_complete_multiple - Complete multiple qcs successfully 5866 * @ap: port in question 5867 * @qc_active: new qc_active mask 5868 * @finish_qc: LLDD callback invoked before completing a qc 5869 * 5870 * Complete in-flight commands. This functions is meant to be 5871 * called from low-level driver's interrupt routine to complete 5872 * requests normally. ap->qc_active and @qc_active is compared 5873 * and commands are completed accordingly. 5874 * 5875 * LOCKING: 5876 * spin_lock_irqsave(host lock) 5877 * 5878 * RETURNS: 5879 * Number of completed commands on success, -errno otherwise. 5880 */ 5881 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active, 5882 void (*finish_qc)(struct ata_queued_cmd *)) 5883 { 5884 int nr_done = 0; 5885 u32 done_mask; 5886 int i; 5887 5888 done_mask = ap->qc_active ^ qc_active; 5889 5890 if (unlikely(done_mask & qc_active)) { 5891 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition " 5892 "(%08x->%08x)\n", ap->qc_active, qc_active); 5893 return -EINVAL; 5894 } 5895 5896 for (i = 0; i < ATA_MAX_QUEUE; i++) { 5897 struct ata_queued_cmd *qc; 5898 5899 if (!(done_mask & (1 << i))) 5900 continue; 5901 5902 if ((qc = ata_qc_from_tag(ap, i))) { 5903 if (finish_qc) 5904 finish_qc(qc); 5905 ata_qc_complete(qc); 5906 nr_done++; 5907 } 5908 } 5909 5910 return nr_done; 5911 } 5912 5913 /** 5914 * ata_qc_issue - issue taskfile to device 5915 * @qc: command to issue to device 5916 * 5917 * Prepare an ATA command to submission to device. 5918 * This includes mapping the data into a DMA-able 5919 * area, filling in the S/G table, and finally 5920 * writing the taskfile to hardware, starting the command. 5921 * 5922 * LOCKING: 5923 * spin_lock_irqsave(host lock) 5924 */ 5925 void ata_qc_issue(struct ata_queued_cmd *qc) 5926 { 5927 struct ata_port *ap = qc->ap; 5928 struct ata_link *link = qc->dev->link; 5929 u8 prot = qc->tf.protocol; 5930 5931 /* Make sure only one non-NCQ command is outstanding. The 5932 * check is skipped for old EH because it reuses active qc to 5933 * request ATAPI sense. 5934 */ 5935 WARN_ON(ap->ops->error_handler && ata_tag_valid(link->active_tag)); 5936 5937 if (ata_is_ncq(prot)) { 5938 WARN_ON(link->sactive & (1 << qc->tag)); 5939 5940 if (!link->sactive) 5941 ap->nr_active_links++; 5942 link->sactive |= 1 << qc->tag; 5943 } else { 5944 WARN_ON(link->sactive); 5945 5946 ap->nr_active_links++; 5947 link->active_tag = qc->tag; 5948 } 5949 5950 qc->flags |= ATA_QCFLAG_ACTIVE; 5951 ap->qc_active |= 1 << qc->tag; 5952 5953 /* We guarantee to LLDs that they will have at least one 5954 * non-zero sg if the command is a data command. 5955 */ 5956 BUG_ON(ata_is_data(prot) && (!qc->sg || !qc->n_elem || !qc->nbytes)); 5957 5958 /* ata_sg_setup() may update nbytes */ 5959 qc->raw_nbytes = qc->nbytes; 5960 5961 if (ata_is_dma(prot) || (ata_is_pio(prot) && 5962 (ap->flags & ATA_FLAG_PIO_DMA))) 5963 if (ata_sg_setup(qc)) 5964 goto sg_err; 5965 5966 /* if device is sleeping, schedule softreset and abort the link */ 5967 if (unlikely(qc->dev->flags & ATA_DFLAG_SLEEPING)) { 5968 link->eh_info.action |= ATA_EH_SOFTRESET; 5969 ata_ehi_push_desc(&link->eh_info, "waking up from sleep"); 5970 ata_link_abort(link); 5971 return; 5972 } 5973 5974 ap->ops->qc_prep(qc); 5975 5976 qc->err_mask |= ap->ops->qc_issue(qc); 5977 if (unlikely(qc->err_mask)) 5978 goto err; 5979 return; 5980 5981 sg_err: 5982 qc->err_mask |= AC_ERR_SYSTEM; 5983 err: 5984 ata_qc_complete(qc); 5985 } 5986 5987 /** 5988 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner 5989 * @qc: command to issue to device 5990 * 5991 * Using various libata functions and hooks, this function 5992 * starts an ATA command. ATA commands are grouped into 5993 * classes called "protocols", and issuing each type of protocol 5994 * is slightly different. 5995 * 5996 * May be used as the qc_issue() entry in ata_port_operations. 5997 * 5998 * LOCKING: 5999 * spin_lock_irqsave(host lock) 6000 * 6001 * RETURNS: 6002 * Zero on success, AC_ERR_* mask on failure 6003 */ 6004 6005 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc) 6006 { 6007 struct ata_port *ap = qc->ap; 6008 6009 /* Use polling pio if the LLD doesn't handle 6010 * interrupt driven pio and atapi CDB interrupt. 6011 */ 6012 if (ap->flags & ATA_FLAG_PIO_POLLING) { 6013 switch (qc->tf.protocol) { 6014 case ATA_PROT_PIO: 6015 case ATA_PROT_NODATA: 6016 case ATAPI_PROT_PIO: 6017 case ATAPI_PROT_NODATA: 6018 qc->tf.flags |= ATA_TFLAG_POLLING; 6019 break; 6020 case ATAPI_PROT_DMA: 6021 if (qc->dev->flags & ATA_DFLAG_CDB_INTR) 6022 /* see ata_dma_blacklisted() */ 6023 BUG(); 6024 break; 6025 default: 6026 break; 6027 } 6028 } 6029 6030 /* select the device */ 6031 ata_dev_select(ap, qc->dev->devno, 1, 0); 6032 6033 /* start the command */ 6034 switch (qc->tf.protocol) { 6035 case ATA_PROT_NODATA: 6036 if (qc->tf.flags & ATA_TFLAG_POLLING) 6037 ata_qc_set_polling(qc); 6038 6039 ata_tf_to_host(ap, &qc->tf); 6040 ap->hsm_task_state = HSM_ST_LAST; 6041 6042 if (qc->tf.flags & ATA_TFLAG_POLLING) 6043 ata_pio_queue_task(ap, qc, 0); 6044 6045 break; 6046 6047 case ATA_PROT_DMA: 6048 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); 6049 6050 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ 6051 ap->ops->bmdma_setup(qc); /* set up bmdma */ 6052 ap->ops->bmdma_start(qc); /* initiate bmdma */ 6053 ap->hsm_task_state = HSM_ST_LAST; 6054 break; 6055 6056 case ATA_PROT_PIO: 6057 if (qc->tf.flags & ATA_TFLAG_POLLING) 6058 ata_qc_set_polling(qc); 6059 6060 ata_tf_to_host(ap, &qc->tf); 6061 6062 if (qc->tf.flags & ATA_TFLAG_WRITE) { 6063 /* PIO data out protocol */ 6064 ap->hsm_task_state = HSM_ST_FIRST; 6065 ata_pio_queue_task(ap, qc, 0); 6066 6067 /* always send first data block using 6068 * the ata_pio_task() codepath. 6069 */ 6070 } else { 6071 /* PIO data in protocol */ 6072 ap->hsm_task_state = HSM_ST; 6073 6074 if (qc->tf.flags & ATA_TFLAG_POLLING) 6075 ata_pio_queue_task(ap, qc, 0); 6076 6077 /* if polling, ata_pio_task() handles the rest. 6078 * otherwise, interrupt handler takes over from here. 6079 */ 6080 } 6081 6082 break; 6083 6084 case ATAPI_PROT_PIO: 6085 case ATAPI_PROT_NODATA: 6086 if (qc->tf.flags & ATA_TFLAG_POLLING) 6087 ata_qc_set_polling(qc); 6088 6089 ata_tf_to_host(ap, &qc->tf); 6090 6091 ap->hsm_task_state = HSM_ST_FIRST; 6092 6093 /* send cdb by polling if no cdb interrupt */ 6094 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) || 6095 (qc->tf.flags & ATA_TFLAG_POLLING)) 6096 ata_pio_queue_task(ap, qc, 0); 6097 break; 6098 6099 case ATAPI_PROT_DMA: 6100 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); 6101 6102 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ 6103 ap->ops->bmdma_setup(qc); /* set up bmdma */ 6104 ap->hsm_task_state = HSM_ST_FIRST; 6105 6106 /* send cdb by polling if no cdb interrupt */ 6107 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) 6108 ata_pio_queue_task(ap, qc, 0); 6109 break; 6110 6111 default: 6112 WARN_ON(1); 6113 return AC_ERR_SYSTEM; 6114 } 6115 6116 return 0; 6117 } 6118 6119 /** 6120 * ata_host_intr - Handle host interrupt for given (port, task) 6121 * @ap: Port on which interrupt arrived (possibly...) 6122 * @qc: Taskfile currently active in engine 6123 * 6124 * Handle host interrupt for given queued command. Currently, 6125 * only DMA interrupts are handled. All other commands are 6126 * handled via polling with interrupts disabled (nIEN bit). 6127 * 6128 * LOCKING: 6129 * spin_lock_irqsave(host lock) 6130 * 6131 * RETURNS: 6132 * One if interrupt was handled, zero if not (shared irq). 6133 */ 6134 6135 inline unsigned int ata_host_intr(struct ata_port *ap, 6136 struct ata_queued_cmd *qc) 6137 { 6138 struct ata_eh_info *ehi = &ap->link.eh_info; 6139 u8 status, host_stat = 0; 6140 6141 VPRINTK("ata%u: protocol %d task_state %d\n", 6142 ap->print_id, qc->tf.protocol, ap->hsm_task_state); 6143 6144 /* Check whether we are expecting interrupt in this state */ 6145 switch (ap->hsm_task_state) { 6146 case HSM_ST_FIRST: 6147 /* Some pre-ATAPI-4 devices assert INTRQ 6148 * at this state when ready to receive CDB. 6149 */ 6150 6151 /* Check the ATA_DFLAG_CDB_INTR flag is enough here. 6152 * The flag was turned on only for atapi devices. No 6153 * need to check ata_is_atapi(qc->tf.protocol) again. 6154 */ 6155 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) 6156 goto idle_irq; 6157 break; 6158 case HSM_ST_LAST: 6159 if (qc->tf.protocol == ATA_PROT_DMA || 6160 qc->tf.protocol == ATAPI_PROT_DMA) { 6161 /* check status of DMA engine */ 6162 host_stat = ap->ops->bmdma_status(ap); 6163 VPRINTK("ata%u: host_stat 0x%X\n", 6164 ap->print_id, host_stat); 6165 6166 /* if it's not our irq... */ 6167 if (!(host_stat & ATA_DMA_INTR)) 6168 goto idle_irq; 6169 6170 /* before we do anything else, clear DMA-Start bit */ 6171 ap->ops->bmdma_stop(qc); 6172 6173 if (unlikely(host_stat & ATA_DMA_ERR)) { 6174 /* error when transfering data to/from memory */ 6175 qc->err_mask |= AC_ERR_HOST_BUS; 6176 ap->hsm_task_state = HSM_ST_ERR; 6177 } 6178 } 6179 break; 6180 case HSM_ST: 6181 break; 6182 default: 6183 goto idle_irq; 6184 } 6185 6186 /* check altstatus */ 6187 status = ata_altstatus(ap); 6188 if (status & ATA_BUSY) 6189 goto idle_irq; 6190 6191 /* check main status, clearing INTRQ */ 6192 status = ata_chk_status(ap); 6193 if (unlikely(status & ATA_BUSY)) 6194 goto idle_irq; 6195 6196 /* ack bmdma irq events */ 6197 ap->ops->irq_clear(ap); 6198 6199 ata_hsm_move(ap, qc, status, 0); 6200 6201 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA || 6202 qc->tf.protocol == ATAPI_PROT_DMA)) 6203 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat); 6204 6205 return 1; /* irq handled */ 6206 6207 idle_irq: 6208 ap->stats.idle_irq++; 6209 6210 #ifdef ATA_IRQ_TRAP 6211 if ((ap->stats.idle_irq % 1000) == 0) { 6212 ata_chk_status(ap); 6213 ap->ops->irq_clear(ap); 6214 ata_port_printk(ap, KERN_WARNING, "irq trap\n"); 6215 return 1; 6216 } 6217 #endif 6218 return 0; /* irq not handled */ 6219 } 6220 6221 /** 6222 * ata_interrupt - Default ATA host interrupt handler 6223 * @irq: irq line (unused) 6224 * @dev_instance: pointer to our ata_host information structure 6225 * 6226 * Default interrupt handler for PCI IDE devices. Calls 6227 * ata_host_intr() for each port that is not disabled. 6228 * 6229 * LOCKING: 6230 * Obtains host lock during operation. 6231 * 6232 * RETURNS: 6233 * IRQ_NONE or IRQ_HANDLED. 6234 */ 6235 6236 irqreturn_t ata_interrupt(int irq, void *dev_instance) 6237 { 6238 struct ata_host *host = dev_instance; 6239 unsigned int i; 6240 unsigned int handled = 0; 6241 unsigned long flags; 6242 6243 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ 6244 spin_lock_irqsave(&host->lock, flags); 6245 6246 for (i = 0; i < host->n_ports; i++) { 6247 struct ata_port *ap; 6248 6249 ap = host->ports[i]; 6250 if (ap && 6251 !(ap->flags & ATA_FLAG_DISABLED)) { 6252 struct ata_queued_cmd *qc; 6253 6254 qc = ata_qc_from_tag(ap, ap->link.active_tag); 6255 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && 6256 (qc->flags & ATA_QCFLAG_ACTIVE)) 6257 handled |= ata_host_intr(ap, qc); 6258 } 6259 } 6260 6261 spin_unlock_irqrestore(&host->lock, flags); 6262 6263 return IRQ_RETVAL(handled); 6264 } 6265 6266 /** 6267 * sata_scr_valid - test whether SCRs are accessible 6268 * @link: ATA link to test SCR accessibility for 6269 * 6270 * Test whether SCRs are accessible for @link. 6271 * 6272 * LOCKING: 6273 * None. 6274 * 6275 * RETURNS: 6276 * 1 if SCRs are accessible, 0 otherwise. 6277 */ 6278 int sata_scr_valid(struct ata_link *link) 6279 { 6280 struct ata_port *ap = link->ap; 6281 6282 return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read; 6283 } 6284 6285 /** 6286 * sata_scr_read - read SCR register of the specified port 6287 * @link: ATA link to read SCR for 6288 * @reg: SCR to read 6289 * @val: Place to store read value 6290 * 6291 * Read SCR register @reg of @link into *@val. This function is 6292 * guaranteed to succeed if @link is ap->link, the cable type of 6293 * the port is SATA and the port implements ->scr_read. 6294 * 6295 * LOCKING: 6296 * None if @link is ap->link. Kernel thread context otherwise. 6297 * 6298 * RETURNS: 6299 * 0 on success, negative errno on failure. 6300 */ 6301 int sata_scr_read(struct ata_link *link, int reg, u32 *val) 6302 { 6303 if (ata_is_host_link(link)) { 6304 struct ata_port *ap = link->ap; 6305 6306 if (sata_scr_valid(link)) 6307 return ap->ops->scr_read(ap, reg, val); 6308 return -EOPNOTSUPP; 6309 } 6310 6311 return sata_pmp_scr_read(link, reg, val); 6312 } 6313 6314 /** 6315 * sata_scr_write - write SCR register of the specified port 6316 * @link: ATA link to write SCR for 6317 * @reg: SCR to write 6318 * @val: value to write 6319 * 6320 * Write @val to SCR register @reg of @link. This function is 6321 * guaranteed to succeed if @link is ap->link, the cable type of 6322 * the port is SATA and the port implements ->scr_read. 6323 * 6324 * LOCKING: 6325 * None if @link is ap->link. Kernel thread context otherwise. 6326 * 6327 * RETURNS: 6328 * 0 on success, negative errno on failure. 6329 */ 6330 int sata_scr_write(struct ata_link *link, int reg, u32 val) 6331 { 6332 if (ata_is_host_link(link)) { 6333 struct ata_port *ap = link->ap; 6334 6335 if (sata_scr_valid(link)) 6336 return ap->ops->scr_write(ap, reg, val); 6337 return -EOPNOTSUPP; 6338 } 6339 6340 return sata_pmp_scr_write(link, reg, val); 6341 } 6342 6343 /** 6344 * sata_scr_write_flush - write SCR register of the specified port and flush 6345 * @link: ATA link to write SCR for 6346 * @reg: SCR to write 6347 * @val: value to write 6348 * 6349 * This function is identical to sata_scr_write() except that this 6350 * function performs flush after writing to the register. 6351 * 6352 * LOCKING: 6353 * None if @link is ap->link. Kernel thread context otherwise. 6354 * 6355 * RETURNS: 6356 * 0 on success, negative errno on failure. 6357 */ 6358 int sata_scr_write_flush(struct ata_link *link, int reg, u32 val) 6359 { 6360 if (ata_is_host_link(link)) { 6361 struct ata_port *ap = link->ap; 6362 int rc; 6363 6364 if (sata_scr_valid(link)) { 6365 rc = ap->ops->scr_write(ap, reg, val); 6366 if (rc == 0) 6367 rc = ap->ops->scr_read(ap, reg, &val); 6368 return rc; 6369 } 6370 return -EOPNOTSUPP; 6371 } 6372 6373 return sata_pmp_scr_write(link, reg, val); 6374 } 6375 6376 /** 6377 * ata_link_online - test whether the given link is online 6378 * @link: ATA link to test 6379 * 6380 * Test whether @link is online. Note that this function returns 6381 * 0 if online status of @link cannot be obtained, so 6382 * ata_link_online(link) != !ata_link_offline(link). 6383 * 6384 * LOCKING: 6385 * None. 6386 * 6387 * RETURNS: 6388 * 1 if the port online status is available and online. 6389 */ 6390 int ata_link_online(struct ata_link *link) 6391 { 6392 u32 sstatus; 6393 6394 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 && 6395 (sstatus & 0xf) == 0x3) 6396 return 1; 6397 return 0; 6398 } 6399 6400 /** 6401 * ata_link_offline - test whether the given link is offline 6402 * @link: ATA link to test 6403 * 6404 * Test whether @link is offline. Note that this function 6405 * returns 0 if offline status of @link cannot be obtained, so 6406 * ata_link_online(link) != !ata_link_offline(link). 6407 * 6408 * LOCKING: 6409 * None. 6410 * 6411 * RETURNS: 6412 * 1 if the port offline status is available and offline. 6413 */ 6414 int ata_link_offline(struct ata_link *link) 6415 { 6416 u32 sstatus; 6417 6418 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 && 6419 (sstatus & 0xf) != 0x3) 6420 return 1; 6421 return 0; 6422 } 6423 6424 int ata_flush_cache(struct ata_device *dev) 6425 { 6426 unsigned int err_mask; 6427 u8 cmd; 6428 6429 if (!ata_try_flush_cache(dev)) 6430 return 0; 6431 6432 if (dev->flags & ATA_DFLAG_FLUSH_EXT) 6433 cmd = ATA_CMD_FLUSH_EXT; 6434 else 6435 cmd = ATA_CMD_FLUSH; 6436 6437 /* This is wrong. On a failed flush we get back the LBA of the lost 6438 sector and we should (assuming it wasn't aborted as unknown) issue 6439 a further flush command to continue the writeback until it 6440 does not error */ 6441 err_mask = ata_do_simple_cmd(dev, cmd); 6442 if (err_mask) { 6443 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n"); 6444 return -EIO; 6445 } 6446 6447 return 0; 6448 } 6449 6450 #ifdef CONFIG_PM 6451 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg, 6452 unsigned int action, unsigned int ehi_flags, 6453 int wait) 6454 { 6455 unsigned long flags; 6456 int i, rc; 6457 6458 for (i = 0; i < host->n_ports; i++) { 6459 struct ata_port *ap = host->ports[i]; 6460 struct ata_link *link; 6461 6462 /* Previous resume operation might still be in 6463 * progress. Wait for PM_PENDING to clear. 6464 */ 6465 if (ap->pflags & ATA_PFLAG_PM_PENDING) { 6466 ata_port_wait_eh(ap); 6467 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); 6468 } 6469 6470 /* request PM ops to EH */ 6471 spin_lock_irqsave(ap->lock, flags); 6472 6473 ap->pm_mesg = mesg; 6474 if (wait) { 6475 rc = 0; 6476 ap->pm_result = &rc; 6477 } 6478 6479 ap->pflags |= ATA_PFLAG_PM_PENDING; 6480 __ata_port_for_each_link(link, ap) { 6481 link->eh_info.action |= action; 6482 link->eh_info.flags |= ehi_flags; 6483 } 6484 6485 ata_port_schedule_eh(ap); 6486 6487 spin_unlock_irqrestore(ap->lock, flags); 6488 6489 /* wait and check result */ 6490 if (wait) { 6491 ata_port_wait_eh(ap); 6492 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); 6493 if (rc) 6494 return rc; 6495 } 6496 } 6497 6498 return 0; 6499 } 6500 6501 /** 6502 * ata_host_suspend - suspend host 6503 * @host: host to suspend 6504 * @mesg: PM message 6505 * 6506 * Suspend @host. Actual operation is performed by EH. This 6507 * function requests EH to perform PM operations and waits for EH 6508 * to finish. 6509 * 6510 * LOCKING: 6511 * Kernel thread context (may sleep). 6512 * 6513 * RETURNS: 6514 * 0 on success, -errno on failure. 6515 */ 6516 int ata_host_suspend(struct ata_host *host, pm_message_t mesg) 6517 { 6518 int rc; 6519 6520 /* 6521 * disable link pm on all ports before requesting 6522 * any pm activity 6523 */ 6524 ata_lpm_enable(host); 6525 6526 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1); 6527 if (rc == 0) 6528 host->dev->power.power_state = mesg; 6529 return rc; 6530 } 6531 6532 /** 6533 * ata_host_resume - resume host 6534 * @host: host to resume 6535 * 6536 * Resume @host. Actual operation is performed by EH. This 6537 * function requests EH to perform PM operations and returns. 6538 * Note that all resume operations are performed parallely. 6539 * 6540 * LOCKING: 6541 * Kernel thread context (may sleep). 6542 */ 6543 void ata_host_resume(struct ata_host *host) 6544 { 6545 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET, 6546 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0); 6547 host->dev->power.power_state = PMSG_ON; 6548 6549 /* reenable link pm */ 6550 ata_lpm_disable(host); 6551 } 6552 #endif 6553 6554 /** 6555 * ata_port_start - Set port up for dma. 6556 * @ap: Port to initialize 6557 * 6558 * Called just after data structures for each port are 6559 * initialized. Allocates space for PRD table. 6560 * 6561 * May be used as the port_start() entry in ata_port_operations. 6562 * 6563 * LOCKING: 6564 * Inherited from caller. 6565 */ 6566 int ata_port_start(struct ata_port *ap) 6567 { 6568 struct device *dev = ap->dev; 6569 int rc; 6570 6571 ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, 6572 GFP_KERNEL); 6573 if (!ap->prd) 6574 return -ENOMEM; 6575 6576 rc = ata_pad_alloc(ap, dev); 6577 if (rc) 6578 return rc; 6579 6580 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, 6581 (unsigned long long)ap->prd_dma); 6582 return 0; 6583 } 6584 6585 /** 6586 * ata_dev_init - Initialize an ata_device structure 6587 * @dev: Device structure to initialize 6588 * 6589 * Initialize @dev in preparation for probing. 6590 * 6591 * LOCKING: 6592 * Inherited from caller. 6593 */ 6594 void ata_dev_init(struct ata_device *dev) 6595 { 6596 struct ata_link *link = dev->link; 6597 struct ata_port *ap = link->ap; 6598 unsigned long flags; 6599 6600 /* SATA spd limit is bound to the first device */ 6601 link->sata_spd_limit = link->hw_sata_spd_limit; 6602 link->sata_spd = 0; 6603 6604 /* High bits of dev->flags are used to record warm plug 6605 * requests which occur asynchronously. Synchronize using 6606 * host lock. 6607 */ 6608 spin_lock_irqsave(ap->lock, flags); 6609 dev->flags &= ~ATA_DFLAG_INIT_MASK; 6610 dev->horkage = 0; 6611 spin_unlock_irqrestore(ap->lock, flags); 6612 6613 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0, 6614 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET); 6615 dev->pio_mask = UINT_MAX; 6616 dev->mwdma_mask = UINT_MAX; 6617 dev->udma_mask = UINT_MAX; 6618 } 6619 6620 /** 6621 * ata_link_init - Initialize an ata_link structure 6622 * @ap: ATA port link is attached to 6623 * @link: Link structure to initialize 6624 * @pmp: Port multiplier port number 6625 * 6626 * Initialize @link. 6627 * 6628 * LOCKING: 6629 * Kernel thread context (may sleep) 6630 */ 6631 void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp) 6632 { 6633 int i; 6634 6635 /* clear everything except for devices */ 6636 memset(link, 0, offsetof(struct ata_link, device[0])); 6637 6638 link->ap = ap; 6639 link->pmp = pmp; 6640 link->active_tag = ATA_TAG_POISON; 6641 link->hw_sata_spd_limit = UINT_MAX; 6642 6643 /* can't use iterator, ap isn't initialized yet */ 6644 for (i = 0; i < ATA_MAX_DEVICES; i++) { 6645 struct ata_device *dev = &link->device[i]; 6646 6647 dev->link = link; 6648 dev->devno = dev - link->device; 6649 ata_dev_init(dev); 6650 } 6651 } 6652 6653 /** 6654 * sata_link_init_spd - Initialize link->sata_spd_limit 6655 * @link: Link to configure sata_spd_limit for 6656 * 6657 * Initialize @link->[hw_]sata_spd_limit to the currently 6658 * configured value. 6659 * 6660 * LOCKING: 6661 * Kernel thread context (may sleep). 6662 * 6663 * RETURNS: 6664 * 0 on success, -errno on failure. 6665 */ 6666 int sata_link_init_spd(struct ata_link *link) 6667 { 6668 u32 scontrol, spd; 6669 int rc; 6670 6671 rc = sata_scr_read(link, SCR_CONTROL, &scontrol); 6672 if (rc) 6673 return rc; 6674 6675 spd = (scontrol >> 4) & 0xf; 6676 if (spd) 6677 link->hw_sata_spd_limit &= (1 << spd) - 1; 6678 6679 link->sata_spd_limit = link->hw_sata_spd_limit; 6680 6681 return 0; 6682 } 6683 6684 /** 6685 * ata_port_alloc - allocate and initialize basic ATA port resources 6686 * @host: ATA host this allocated port belongs to 6687 * 6688 * Allocate and initialize basic ATA port resources. 6689 * 6690 * RETURNS: 6691 * Allocate ATA port on success, NULL on failure. 6692 * 6693 * LOCKING: 6694 * Inherited from calling layer (may sleep). 6695 */ 6696 struct ata_port *ata_port_alloc(struct ata_host *host) 6697 { 6698 struct ata_port *ap; 6699 6700 DPRINTK("ENTER\n"); 6701 6702 ap = kzalloc(sizeof(*ap), GFP_KERNEL); 6703 if (!ap) 6704 return NULL; 6705 6706 ap->pflags |= ATA_PFLAG_INITIALIZING; 6707 ap->lock = &host->lock; 6708 ap->flags = ATA_FLAG_DISABLED; 6709 ap->print_id = -1; 6710 ap->ctl = ATA_DEVCTL_OBS; 6711 ap->host = host; 6712 ap->dev = host->dev; 6713 ap->last_ctl = 0xFF; 6714 6715 #if defined(ATA_VERBOSE_DEBUG) 6716 /* turn on all debugging levels */ 6717 ap->msg_enable = 0x00FF; 6718 #elif defined(ATA_DEBUG) 6719 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR; 6720 #else 6721 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN; 6722 #endif 6723 6724 INIT_DELAYED_WORK(&ap->port_task, ata_pio_task); 6725 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug); 6726 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan); 6727 INIT_LIST_HEAD(&ap->eh_done_q); 6728 init_waitqueue_head(&ap->eh_wait_q); 6729 init_timer_deferrable(&ap->fastdrain_timer); 6730 ap->fastdrain_timer.function = ata_eh_fastdrain_timerfn; 6731 ap->fastdrain_timer.data = (unsigned long)ap; 6732 6733 ap->cbl = ATA_CBL_NONE; 6734 6735 ata_link_init(ap, &ap->link, 0); 6736 6737 #ifdef ATA_IRQ_TRAP 6738 ap->stats.unhandled_irq = 1; 6739 ap->stats.idle_irq = 1; 6740 #endif 6741 return ap; 6742 } 6743 6744 static void ata_host_release(struct device *gendev, void *res) 6745 { 6746 struct ata_host *host = dev_get_drvdata(gendev); 6747 int i; 6748 6749 for (i = 0; i < host->n_ports; i++) { 6750 struct ata_port *ap = host->ports[i]; 6751 6752 if (!ap) 6753 continue; 6754 6755 if (ap->scsi_host) 6756 scsi_host_put(ap->scsi_host); 6757 6758 kfree(ap->pmp_link); 6759 kfree(ap); 6760 host->ports[i] = NULL; 6761 } 6762 6763 dev_set_drvdata(gendev, NULL); 6764 } 6765 6766 /** 6767 * ata_host_alloc - allocate and init basic ATA host resources 6768 * @dev: generic device this host is associated with 6769 * @max_ports: maximum number of ATA ports associated with this host 6770 * 6771 * Allocate and initialize basic ATA host resources. LLD calls 6772 * this function to allocate a host, initializes it fully and 6773 * attaches it using ata_host_register(). 6774 * 6775 * @max_ports ports are allocated and host->n_ports is 6776 * initialized to @max_ports. The caller is allowed to decrease 6777 * host->n_ports before calling ata_host_register(). The unused 6778 * ports will be automatically freed on registration. 6779 * 6780 * RETURNS: 6781 * Allocate ATA host on success, NULL on failure. 6782 * 6783 * LOCKING: 6784 * Inherited from calling layer (may sleep). 6785 */ 6786 struct ata_host *ata_host_alloc(struct device *dev, int max_ports) 6787 { 6788 struct ata_host *host; 6789 size_t sz; 6790 int i; 6791 6792 DPRINTK("ENTER\n"); 6793 6794 if (!devres_open_group(dev, NULL, GFP_KERNEL)) 6795 return NULL; 6796 6797 /* alloc a container for our list of ATA ports (buses) */ 6798 sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *); 6799 /* alloc a container for our list of ATA ports (buses) */ 6800 host = devres_alloc(ata_host_release, sz, GFP_KERNEL); 6801 if (!host) 6802 goto err_out; 6803 6804 devres_add(dev, host); 6805 dev_set_drvdata(dev, host); 6806 6807 spin_lock_init(&host->lock); 6808 host->dev = dev; 6809 host->n_ports = max_ports; 6810 6811 /* allocate ports bound to this host */ 6812 for (i = 0; i < max_ports; i++) { 6813 struct ata_port *ap; 6814 6815 ap = ata_port_alloc(host); 6816 if (!ap) 6817 goto err_out; 6818 6819 ap->port_no = i; 6820 host->ports[i] = ap; 6821 } 6822 6823 devres_remove_group(dev, NULL); 6824 return host; 6825 6826 err_out: 6827 devres_release_group(dev, NULL); 6828 return NULL; 6829 } 6830 6831 /** 6832 * ata_host_alloc_pinfo - alloc host and init with port_info array 6833 * @dev: generic device this host is associated with 6834 * @ppi: array of ATA port_info to initialize host with 6835 * @n_ports: number of ATA ports attached to this host 6836 * 6837 * Allocate ATA host and initialize with info from @ppi. If NULL 6838 * terminated, @ppi may contain fewer entries than @n_ports. The 6839 * last entry will be used for the remaining ports. 6840 * 6841 * RETURNS: 6842 * Allocate ATA host on success, NULL on failure. 6843 * 6844 * LOCKING: 6845 * Inherited from calling layer (may sleep). 6846 */ 6847 struct ata_host *ata_host_alloc_pinfo(struct device *dev, 6848 const struct ata_port_info * const * ppi, 6849 int n_ports) 6850 { 6851 const struct ata_port_info *pi; 6852 struct ata_host *host; 6853 int i, j; 6854 6855 host = ata_host_alloc(dev, n_ports); 6856 if (!host) 6857 return NULL; 6858 6859 for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) { 6860 struct ata_port *ap = host->ports[i]; 6861 6862 if (ppi[j]) 6863 pi = ppi[j++]; 6864 6865 ap->pio_mask = pi->pio_mask; 6866 ap->mwdma_mask = pi->mwdma_mask; 6867 ap->udma_mask = pi->udma_mask; 6868 ap->flags |= pi->flags; 6869 ap->link.flags |= pi->link_flags; 6870 ap->ops = pi->port_ops; 6871 6872 if (!host->ops && (pi->port_ops != &ata_dummy_port_ops)) 6873 host->ops = pi->port_ops; 6874 if (!host->private_data && pi->private_data) 6875 host->private_data = pi->private_data; 6876 } 6877 6878 return host; 6879 } 6880 6881 static void ata_host_stop(struct device *gendev, void *res) 6882 { 6883 struct ata_host *host = dev_get_drvdata(gendev); 6884 int i; 6885 6886 WARN_ON(!(host->flags & ATA_HOST_STARTED)); 6887 6888 for (i = 0; i < host->n_ports; i++) { 6889 struct ata_port *ap = host->ports[i]; 6890 6891 if (ap->ops->port_stop) 6892 ap->ops->port_stop(ap); 6893 } 6894 6895 if (host->ops->host_stop) 6896 host->ops->host_stop(host); 6897 } 6898 6899 /** 6900 * ata_host_start - start and freeze ports of an ATA host 6901 * @host: ATA host to start ports for 6902 * 6903 * Start and then freeze ports of @host. Started status is 6904 * recorded in host->flags, so this function can be called 6905 * multiple times. Ports are guaranteed to get started only 6906 * once. If host->ops isn't initialized yet, its set to the 6907 * first non-dummy port ops. 6908 * 6909 * LOCKING: 6910 * Inherited from calling layer (may sleep). 6911 * 6912 * RETURNS: 6913 * 0 if all ports are started successfully, -errno otherwise. 6914 */ 6915 int ata_host_start(struct ata_host *host) 6916 { 6917 int have_stop = 0; 6918 void *start_dr = NULL; 6919 int i, rc; 6920 6921 if (host->flags & ATA_HOST_STARTED) 6922 return 0; 6923 6924 for (i = 0; i < host->n_ports; i++) { 6925 struct ata_port *ap = host->ports[i]; 6926 6927 if (!host->ops && !ata_port_is_dummy(ap)) 6928 host->ops = ap->ops; 6929 6930 if (ap->ops->port_stop) 6931 have_stop = 1; 6932 } 6933 6934 if (host->ops->host_stop) 6935 have_stop = 1; 6936 6937 if (have_stop) { 6938 start_dr = devres_alloc(ata_host_stop, 0, GFP_KERNEL); 6939 if (!start_dr) 6940 return -ENOMEM; 6941 } 6942 6943 for (i = 0; i < host->n_ports; i++) { 6944 struct ata_port *ap = host->ports[i]; 6945 6946 if (ap->ops->port_start) { 6947 rc = ap->ops->port_start(ap); 6948 if (rc) { 6949 if (rc != -ENODEV) 6950 dev_printk(KERN_ERR, host->dev, 6951 "failed to start port %d " 6952 "(errno=%d)\n", i, rc); 6953 goto err_out; 6954 } 6955 } 6956 ata_eh_freeze_port(ap); 6957 } 6958 6959 if (start_dr) 6960 devres_add(host->dev, start_dr); 6961 host->flags |= ATA_HOST_STARTED; 6962 return 0; 6963 6964 err_out: 6965 while (--i >= 0) { 6966 struct ata_port *ap = host->ports[i]; 6967 6968 if (ap->ops->port_stop) 6969 ap->ops->port_stop(ap); 6970 } 6971 devres_free(start_dr); 6972 return rc; 6973 } 6974 6975 /** 6976 * ata_sas_host_init - Initialize a host struct 6977 * @host: host to initialize 6978 * @dev: device host is attached to 6979 * @flags: host flags 6980 * @ops: port_ops 6981 * 6982 * LOCKING: 6983 * PCI/etc. bus probe sem. 6984 * 6985 */ 6986 /* KILLME - the only user left is ipr */ 6987 void ata_host_init(struct ata_host *host, struct device *dev, 6988 unsigned long flags, const struct ata_port_operations *ops) 6989 { 6990 spin_lock_init(&host->lock); 6991 host->dev = dev; 6992 host->flags = flags; 6993 host->ops = ops; 6994 } 6995 6996 /** 6997 * ata_host_register - register initialized ATA host 6998 * @host: ATA host to register 6999 * @sht: template for SCSI host 7000 * 7001 * Register initialized ATA host. @host is allocated using 7002 * ata_host_alloc() and fully initialized by LLD. This function 7003 * starts ports, registers @host with ATA and SCSI layers and 7004 * probe registered devices. 7005 * 7006 * LOCKING: 7007 * Inherited from calling layer (may sleep). 7008 * 7009 * RETURNS: 7010 * 0 on success, -errno otherwise. 7011 */ 7012 int ata_host_register(struct ata_host *host, struct scsi_host_template *sht) 7013 { 7014 int i, rc; 7015 7016 /* host must have been started */ 7017 if (!(host->flags & ATA_HOST_STARTED)) { 7018 dev_printk(KERN_ERR, host->dev, 7019 "BUG: trying to register unstarted host\n"); 7020 WARN_ON(1); 7021 return -EINVAL; 7022 } 7023 7024 /* Blow away unused ports. This happens when LLD can't 7025 * determine the exact number of ports to allocate at 7026 * allocation time. 7027 */ 7028 for (i = host->n_ports; host->ports[i]; i++) 7029 kfree(host->ports[i]); 7030 7031 /* give ports names and add SCSI hosts */ 7032 for (i = 0; i < host->n_ports; i++) 7033 host->ports[i]->print_id = ata_print_id++; 7034 7035 rc = ata_scsi_add_hosts(host, sht); 7036 if (rc) 7037 return rc; 7038 7039 /* associate with ACPI nodes */ 7040 ata_acpi_associate(host); 7041 7042 /* set cable, sata_spd_limit and report */ 7043 for (i = 0; i < host->n_ports; i++) { 7044 struct ata_port *ap = host->ports[i]; 7045 unsigned long xfer_mask; 7046 7047 /* set SATA cable type if still unset */ 7048 if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA)) 7049 ap->cbl = ATA_CBL_SATA; 7050 7051 /* init sata_spd_limit to the current value */ 7052 sata_link_init_spd(&ap->link); 7053 7054 /* print per-port info to dmesg */ 7055 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask, 7056 ap->udma_mask); 7057 7058 if (!ata_port_is_dummy(ap)) { 7059 ata_port_printk(ap, KERN_INFO, 7060 "%cATA max %s %s\n", 7061 (ap->flags & ATA_FLAG_SATA) ? 'S' : 'P', 7062 ata_mode_string(xfer_mask), 7063 ap->link.eh_info.desc); 7064 ata_ehi_clear_desc(&ap->link.eh_info); 7065 } else 7066 ata_port_printk(ap, KERN_INFO, "DUMMY\n"); 7067 } 7068 7069 /* perform each probe synchronously */ 7070 DPRINTK("probe begin\n"); 7071 for (i = 0; i < host->n_ports; i++) { 7072 struct ata_port *ap = host->ports[i]; 7073 int rc; 7074 7075 /* probe */ 7076 if (ap->ops->error_handler) { 7077 struct ata_eh_info *ehi = &ap->link.eh_info; 7078 unsigned long flags; 7079 7080 ata_port_probe(ap); 7081 7082 /* kick EH for boot probing */ 7083 spin_lock_irqsave(ap->lock, flags); 7084 7085 ehi->probe_mask = 7086 (1 << ata_link_max_devices(&ap->link)) - 1; 7087 ehi->action |= ATA_EH_SOFTRESET; 7088 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET; 7089 7090 ap->pflags &= ~ATA_PFLAG_INITIALIZING; 7091 ap->pflags |= ATA_PFLAG_LOADING; 7092 ata_port_schedule_eh(ap); 7093 7094 spin_unlock_irqrestore(ap->lock, flags); 7095 7096 /* wait for EH to finish */ 7097 ata_port_wait_eh(ap); 7098 } else { 7099 DPRINTK("ata%u: bus probe begin\n", ap->print_id); 7100 rc = ata_bus_probe(ap); 7101 DPRINTK("ata%u: bus probe end\n", ap->print_id); 7102 7103 if (rc) { 7104 /* FIXME: do something useful here? 7105 * Current libata behavior will 7106 * tear down everything when 7107 * the module is removed 7108 * or the h/w is unplugged. 7109 */ 7110 } 7111 } 7112 } 7113 7114 /* probes are done, now scan each port's disk(s) */ 7115 DPRINTK("host probe begin\n"); 7116 for (i = 0; i < host->n_ports; i++) { 7117 struct ata_port *ap = host->ports[i]; 7118 7119 ata_scsi_scan_host(ap, 1); 7120 ata_lpm_schedule(ap, ap->pm_policy); 7121 } 7122 7123 return 0; 7124 } 7125 7126 /** 7127 * ata_host_activate - start host, request IRQ and register it 7128 * @host: target ATA host 7129 * @irq: IRQ to request 7130 * @irq_handler: irq_handler used when requesting IRQ 7131 * @irq_flags: irq_flags used when requesting IRQ 7132 * @sht: scsi_host_template to use when registering the host 7133 * 7134 * After allocating an ATA host and initializing it, most libata 7135 * LLDs perform three steps to activate the host - start host, 7136 * request IRQ and register it. This helper takes necessasry 7137 * arguments and performs the three steps in one go. 7138 * 7139 * An invalid IRQ skips the IRQ registration and expects the host to 7140 * have set polling mode on the port. In this case, @irq_handler 7141 * should be NULL. 7142 * 7143 * LOCKING: 7144 * Inherited from calling layer (may sleep). 7145 * 7146 * RETURNS: 7147 * 0 on success, -errno otherwise. 7148 */ 7149 int ata_host_activate(struct ata_host *host, int irq, 7150 irq_handler_t irq_handler, unsigned long irq_flags, 7151 struct scsi_host_template *sht) 7152 { 7153 int i, rc; 7154 7155 rc = ata_host_start(host); 7156 if (rc) 7157 return rc; 7158 7159 /* Special case for polling mode */ 7160 if (!irq) { 7161 WARN_ON(irq_handler); 7162 return ata_host_register(host, sht); 7163 } 7164 7165 rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags, 7166 dev_driver_string(host->dev), host); 7167 if (rc) 7168 return rc; 7169 7170 for (i = 0; i < host->n_ports; i++) 7171 ata_port_desc(host->ports[i], "irq %d", irq); 7172 7173 rc = ata_host_register(host, sht); 7174 /* if failed, just free the IRQ and leave ports alone */ 7175 if (rc) 7176 devm_free_irq(host->dev, irq, host); 7177 7178 return rc; 7179 } 7180 7181 /** 7182 * ata_port_detach - Detach ATA port in prepration of device removal 7183 * @ap: ATA port to be detached 7184 * 7185 * Detach all ATA devices and the associated SCSI devices of @ap; 7186 * then, remove the associated SCSI host. @ap is guaranteed to 7187 * be quiescent on return from this function. 7188 * 7189 * LOCKING: 7190 * Kernel thread context (may sleep). 7191 */ 7192 static void ata_port_detach(struct ata_port *ap) 7193 { 7194 unsigned long flags; 7195 struct ata_link *link; 7196 struct ata_device *dev; 7197 7198 if (!ap->ops->error_handler) 7199 goto skip_eh; 7200 7201 /* tell EH we're leaving & flush EH */ 7202 spin_lock_irqsave(ap->lock, flags); 7203 ap->pflags |= ATA_PFLAG_UNLOADING; 7204 spin_unlock_irqrestore(ap->lock, flags); 7205 7206 ata_port_wait_eh(ap); 7207 7208 /* EH is now guaranteed to see UNLOADING - EH context belongs 7209 * to us. Disable all existing devices. 7210 */ 7211 ata_port_for_each_link(link, ap) { 7212 ata_link_for_each_dev(dev, link) 7213 ata_dev_disable(dev); 7214 } 7215 7216 /* Final freeze & EH. All in-flight commands are aborted. EH 7217 * will be skipped and retrials will be terminated with bad 7218 * target. 7219 */ 7220 spin_lock_irqsave(ap->lock, flags); 7221 ata_port_freeze(ap); /* won't be thawed */ 7222 spin_unlock_irqrestore(ap->lock, flags); 7223 7224 ata_port_wait_eh(ap); 7225 cancel_rearming_delayed_work(&ap->hotplug_task); 7226 7227 skip_eh: 7228 /* remove the associated SCSI host */ 7229 scsi_remove_host(ap->scsi_host); 7230 } 7231 7232 /** 7233 * ata_host_detach - Detach all ports of an ATA host 7234 * @host: Host to detach 7235 * 7236 * Detach all ports of @host. 7237 * 7238 * LOCKING: 7239 * Kernel thread context (may sleep). 7240 */ 7241 void ata_host_detach(struct ata_host *host) 7242 { 7243 int i; 7244 7245 for (i = 0; i < host->n_ports; i++) 7246 ata_port_detach(host->ports[i]); 7247 7248 /* the host is dead now, dissociate ACPI */ 7249 ata_acpi_dissociate(host); 7250 } 7251 7252 /** 7253 * ata_std_ports - initialize ioaddr with standard port offsets. 7254 * @ioaddr: IO address structure to be initialized 7255 * 7256 * Utility function which initializes data_addr, error_addr, 7257 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, 7258 * device_addr, status_addr, and command_addr to standard offsets 7259 * relative to cmd_addr. 7260 * 7261 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. 7262 */ 7263 7264 void ata_std_ports(struct ata_ioports *ioaddr) 7265 { 7266 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; 7267 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; 7268 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; 7269 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; 7270 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; 7271 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; 7272 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; 7273 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; 7274 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; 7275 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; 7276 } 7277 7278 7279 #ifdef CONFIG_PCI 7280 7281 /** 7282 * ata_pci_remove_one - PCI layer callback for device removal 7283 * @pdev: PCI device that was removed 7284 * 7285 * PCI layer indicates to libata via this hook that hot-unplug or 7286 * module unload event has occurred. Detach all ports. Resource 7287 * release is handled via devres. 7288 * 7289 * LOCKING: 7290 * Inherited from PCI layer (may sleep). 7291 */ 7292 void ata_pci_remove_one(struct pci_dev *pdev) 7293 { 7294 struct device *dev = &pdev->dev; 7295 struct ata_host *host = dev_get_drvdata(dev); 7296 7297 ata_host_detach(host); 7298 } 7299 7300 /* move to PCI subsystem */ 7301 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits) 7302 { 7303 unsigned long tmp = 0; 7304 7305 switch (bits->width) { 7306 case 1: { 7307 u8 tmp8 = 0; 7308 pci_read_config_byte(pdev, bits->reg, &tmp8); 7309 tmp = tmp8; 7310 break; 7311 } 7312 case 2: { 7313 u16 tmp16 = 0; 7314 pci_read_config_word(pdev, bits->reg, &tmp16); 7315 tmp = tmp16; 7316 break; 7317 } 7318 case 4: { 7319 u32 tmp32 = 0; 7320 pci_read_config_dword(pdev, bits->reg, &tmp32); 7321 tmp = tmp32; 7322 break; 7323 } 7324 7325 default: 7326 return -EINVAL; 7327 } 7328 7329 tmp &= bits->mask; 7330 7331 return (tmp == bits->val) ? 1 : 0; 7332 } 7333 7334 #ifdef CONFIG_PM 7335 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg) 7336 { 7337 pci_save_state(pdev); 7338 pci_disable_device(pdev); 7339 7340 if (mesg.event == PM_EVENT_SUSPEND) 7341 pci_set_power_state(pdev, PCI_D3hot); 7342 } 7343 7344 int ata_pci_device_do_resume(struct pci_dev *pdev) 7345 { 7346 int rc; 7347 7348 pci_set_power_state(pdev, PCI_D0); 7349 pci_restore_state(pdev); 7350 7351 rc = pcim_enable_device(pdev); 7352 if (rc) { 7353 dev_printk(KERN_ERR, &pdev->dev, 7354 "failed to enable device after resume (%d)\n", rc); 7355 return rc; 7356 } 7357 7358 pci_set_master(pdev); 7359 return 0; 7360 } 7361 7362 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) 7363 { 7364 struct ata_host *host = dev_get_drvdata(&pdev->dev); 7365 int rc = 0; 7366 7367 rc = ata_host_suspend(host, mesg); 7368 if (rc) 7369 return rc; 7370 7371 ata_pci_device_do_suspend(pdev, mesg); 7372 7373 return 0; 7374 } 7375 7376 int ata_pci_device_resume(struct pci_dev *pdev) 7377 { 7378 struct ata_host *host = dev_get_drvdata(&pdev->dev); 7379 int rc; 7380 7381 rc = ata_pci_device_do_resume(pdev); 7382 if (rc == 0) 7383 ata_host_resume(host); 7384 return rc; 7385 } 7386 #endif /* CONFIG_PM */ 7387 7388 #endif /* CONFIG_PCI */ 7389 7390 7391 static int __init ata_init(void) 7392 { 7393 ata_probe_timeout *= HZ; 7394 ata_wq = create_workqueue("ata"); 7395 if (!ata_wq) 7396 return -ENOMEM; 7397 7398 ata_aux_wq = create_singlethread_workqueue("ata_aux"); 7399 if (!ata_aux_wq) { 7400 destroy_workqueue(ata_wq); 7401 return -ENOMEM; 7402 } 7403 7404 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); 7405 return 0; 7406 } 7407 7408 static void __exit ata_exit(void) 7409 { 7410 destroy_workqueue(ata_wq); 7411 destroy_workqueue(ata_aux_wq); 7412 } 7413 7414 subsys_initcall(ata_init); 7415 module_exit(ata_exit); 7416 7417 static unsigned long ratelimit_time; 7418 static DEFINE_SPINLOCK(ata_ratelimit_lock); 7419 7420 int ata_ratelimit(void) 7421 { 7422 int rc; 7423 unsigned long flags; 7424 7425 spin_lock_irqsave(&ata_ratelimit_lock, flags); 7426 7427 if (time_after(jiffies, ratelimit_time)) { 7428 rc = 1; 7429 ratelimit_time = jiffies + (HZ/5); 7430 } else 7431 rc = 0; 7432 7433 spin_unlock_irqrestore(&ata_ratelimit_lock, flags); 7434 7435 return rc; 7436 } 7437 7438 /** 7439 * ata_wait_register - wait until register value changes 7440 * @reg: IO-mapped register 7441 * @mask: Mask to apply to read register value 7442 * @val: Wait condition 7443 * @interval_msec: polling interval in milliseconds 7444 * @timeout_msec: timeout in milliseconds 7445 * 7446 * Waiting for some bits of register to change is a common 7447 * operation for ATA controllers. This function reads 32bit LE 7448 * IO-mapped register @reg and tests for the following condition. 7449 * 7450 * (*@reg & mask) != val 7451 * 7452 * If the condition is met, it returns; otherwise, the process is 7453 * repeated after @interval_msec until timeout. 7454 * 7455 * LOCKING: 7456 * Kernel thread context (may sleep) 7457 * 7458 * RETURNS: 7459 * The final register value. 7460 */ 7461 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, 7462 unsigned long interval_msec, 7463 unsigned long timeout_msec) 7464 { 7465 unsigned long timeout; 7466 u32 tmp; 7467 7468 tmp = ioread32(reg); 7469 7470 /* Calculate timeout _after_ the first read to make sure 7471 * preceding writes reach the controller before starting to 7472 * eat away the timeout. 7473 */ 7474 timeout = jiffies + (timeout_msec * HZ) / 1000; 7475 7476 while ((tmp & mask) == val && time_before(jiffies, timeout)) { 7477 msleep(interval_msec); 7478 tmp = ioread32(reg); 7479 } 7480 7481 return tmp; 7482 } 7483 7484 /* 7485 * Dummy port_ops 7486 */ 7487 static void ata_dummy_noret(struct ata_port *ap) { } 7488 static int ata_dummy_ret0(struct ata_port *ap) { return 0; } 7489 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { } 7490 7491 static u8 ata_dummy_check_status(struct ata_port *ap) 7492 { 7493 return ATA_DRDY; 7494 } 7495 7496 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc) 7497 { 7498 return AC_ERR_SYSTEM; 7499 } 7500 7501 const struct ata_port_operations ata_dummy_port_ops = { 7502 .check_status = ata_dummy_check_status, 7503 .check_altstatus = ata_dummy_check_status, 7504 .dev_select = ata_noop_dev_select, 7505 .qc_prep = ata_noop_qc_prep, 7506 .qc_issue = ata_dummy_qc_issue, 7507 .freeze = ata_dummy_noret, 7508 .thaw = ata_dummy_noret, 7509 .error_handler = ata_dummy_noret, 7510 .post_internal_cmd = ata_dummy_qc_noret, 7511 .irq_clear = ata_dummy_noret, 7512 .port_start = ata_dummy_ret0, 7513 .port_stop = ata_dummy_noret, 7514 }; 7515 7516 const struct ata_port_info ata_dummy_port_info = { 7517 .port_ops = &ata_dummy_port_ops, 7518 }; 7519 7520 /* 7521 * libata is essentially a library of internal helper functions for 7522 * low-level ATA host controller drivers. As such, the API/ABI is 7523 * likely to change as new drivers are added and updated. 7524 * Do not depend on ABI/API stability. 7525 */ 7526 EXPORT_SYMBOL_GPL(sata_deb_timing_normal); 7527 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug); 7528 EXPORT_SYMBOL_GPL(sata_deb_timing_long); 7529 EXPORT_SYMBOL_GPL(ata_dummy_port_ops); 7530 EXPORT_SYMBOL_GPL(ata_dummy_port_info); 7531 EXPORT_SYMBOL_GPL(ata_std_bios_param); 7532 EXPORT_SYMBOL_GPL(ata_std_ports); 7533 EXPORT_SYMBOL_GPL(ata_host_init); 7534 EXPORT_SYMBOL_GPL(ata_host_alloc); 7535 EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo); 7536 EXPORT_SYMBOL_GPL(ata_host_start); 7537 EXPORT_SYMBOL_GPL(ata_host_register); 7538 EXPORT_SYMBOL_GPL(ata_host_activate); 7539 EXPORT_SYMBOL_GPL(ata_host_detach); 7540 EXPORT_SYMBOL_GPL(ata_sg_init); 7541 EXPORT_SYMBOL_GPL(ata_hsm_move); 7542 EXPORT_SYMBOL_GPL(ata_qc_complete); 7543 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple); 7544 EXPORT_SYMBOL_GPL(ata_qc_issue_prot); 7545 EXPORT_SYMBOL_GPL(ata_tf_load); 7546 EXPORT_SYMBOL_GPL(ata_tf_read); 7547 EXPORT_SYMBOL_GPL(ata_noop_dev_select); 7548 EXPORT_SYMBOL_GPL(ata_std_dev_select); 7549 EXPORT_SYMBOL_GPL(sata_print_link_status); 7550 EXPORT_SYMBOL_GPL(ata_tf_to_fis); 7551 EXPORT_SYMBOL_GPL(ata_tf_from_fis); 7552 EXPORT_SYMBOL_GPL(ata_pack_xfermask); 7553 EXPORT_SYMBOL_GPL(ata_unpack_xfermask); 7554 EXPORT_SYMBOL_GPL(ata_xfer_mask2mode); 7555 EXPORT_SYMBOL_GPL(ata_xfer_mode2mask); 7556 EXPORT_SYMBOL_GPL(ata_xfer_mode2shift); 7557 EXPORT_SYMBOL_GPL(ata_mode_string); 7558 EXPORT_SYMBOL_GPL(ata_id_xfermask); 7559 EXPORT_SYMBOL_GPL(ata_check_status); 7560 EXPORT_SYMBOL_GPL(ata_altstatus); 7561 EXPORT_SYMBOL_GPL(ata_exec_command); 7562 EXPORT_SYMBOL_GPL(ata_port_start); 7563 EXPORT_SYMBOL_GPL(ata_sff_port_start); 7564 EXPORT_SYMBOL_GPL(ata_interrupt); 7565 EXPORT_SYMBOL_GPL(ata_do_set_mode); 7566 EXPORT_SYMBOL_GPL(ata_data_xfer); 7567 EXPORT_SYMBOL_GPL(ata_data_xfer_noirq); 7568 EXPORT_SYMBOL_GPL(ata_std_qc_defer); 7569 EXPORT_SYMBOL_GPL(ata_qc_prep); 7570 EXPORT_SYMBOL_GPL(ata_dumb_qc_prep); 7571 EXPORT_SYMBOL_GPL(ata_noop_qc_prep); 7572 EXPORT_SYMBOL_GPL(ata_bmdma_setup); 7573 EXPORT_SYMBOL_GPL(ata_bmdma_start); 7574 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); 7575 EXPORT_SYMBOL_GPL(ata_bmdma_status); 7576 EXPORT_SYMBOL_GPL(ata_bmdma_stop); 7577 EXPORT_SYMBOL_GPL(ata_bmdma_freeze); 7578 EXPORT_SYMBOL_GPL(ata_bmdma_thaw); 7579 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh); 7580 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler); 7581 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd); 7582 EXPORT_SYMBOL_GPL(ata_port_probe); 7583 EXPORT_SYMBOL_GPL(ata_dev_disable); 7584 EXPORT_SYMBOL_GPL(sata_set_spd); 7585 EXPORT_SYMBOL_GPL(sata_link_debounce); 7586 EXPORT_SYMBOL_GPL(sata_link_resume); 7587 EXPORT_SYMBOL_GPL(ata_bus_reset); 7588 EXPORT_SYMBOL_GPL(ata_std_prereset); 7589 EXPORT_SYMBOL_GPL(ata_std_softreset); 7590 EXPORT_SYMBOL_GPL(sata_link_hardreset); 7591 EXPORT_SYMBOL_GPL(sata_std_hardreset); 7592 EXPORT_SYMBOL_GPL(ata_std_postreset); 7593 EXPORT_SYMBOL_GPL(ata_dev_classify); 7594 EXPORT_SYMBOL_GPL(ata_dev_pair); 7595 EXPORT_SYMBOL_GPL(ata_port_disable); 7596 EXPORT_SYMBOL_GPL(ata_ratelimit); 7597 EXPORT_SYMBOL_GPL(ata_wait_register); 7598 EXPORT_SYMBOL_GPL(ata_busy_sleep); 7599 EXPORT_SYMBOL_GPL(ata_wait_after_reset); 7600 EXPORT_SYMBOL_GPL(ata_wait_ready); 7601 EXPORT_SYMBOL_GPL(ata_scsi_ioctl); 7602 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); 7603 EXPORT_SYMBOL_GPL(ata_scsi_slave_config); 7604 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy); 7605 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth); 7606 EXPORT_SYMBOL_GPL(ata_host_intr); 7607 EXPORT_SYMBOL_GPL(sata_scr_valid); 7608 EXPORT_SYMBOL_GPL(sata_scr_read); 7609 EXPORT_SYMBOL_GPL(sata_scr_write); 7610 EXPORT_SYMBOL_GPL(sata_scr_write_flush); 7611 EXPORT_SYMBOL_GPL(ata_link_online); 7612 EXPORT_SYMBOL_GPL(ata_link_offline); 7613 #ifdef CONFIG_PM 7614 EXPORT_SYMBOL_GPL(ata_host_suspend); 7615 EXPORT_SYMBOL_GPL(ata_host_resume); 7616 #endif /* CONFIG_PM */ 7617 EXPORT_SYMBOL_GPL(ata_id_string); 7618 EXPORT_SYMBOL_GPL(ata_id_c_string); 7619 EXPORT_SYMBOL_GPL(ata_scsi_simulate); 7620 7621 EXPORT_SYMBOL_GPL(ata_pio_need_iordy); 7622 EXPORT_SYMBOL_GPL(ata_timing_find_mode); 7623 EXPORT_SYMBOL_GPL(ata_timing_compute); 7624 EXPORT_SYMBOL_GPL(ata_timing_merge); 7625 EXPORT_SYMBOL_GPL(ata_timing_cycle2mode); 7626 7627 #ifdef CONFIG_PCI 7628 EXPORT_SYMBOL_GPL(pci_test_config_bits); 7629 EXPORT_SYMBOL_GPL(ata_pci_init_sff_host); 7630 EXPORT_SYMBOL_GPL(ata_pci_init_bmdma); 7631 EXPORT_SYMBOL_GPL(ata_pci_prepare_sff_host); 7632 EXPORT_SYMBOL_GPL(ata_pci_activate_sff_host); 7633 EXPORT_SYMBOL_GPL(ata_pci_init_one); 7634 EXPORT_SYMBOL_GPL(ata_pci_remove_one); 7635 #ifdef CONFIG_PM 7636 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend); 7637 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume); 7638 EXPORT_SYMBOL_GPL(ata_pci_device_suspend); 7639 EXPORT_SYMBOL_GPL(ata_pci_device_resume); 7640 #endif /* CONFIG_PM */ 7641 EXPORT_SYMBOL_GPL(ata_pci_default_filter); 7642 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex); 7643 #endif /* CONFIG_PCI */ 7644 7645 EXPORT_SYMBOL_GPL(sata_pmp_qc_defer_cmd_switch); 7646 EXPORT_SYMBOL_GPL(sata_pmp_std_prereset); 7647 EXPORT_SYMBOL_GPL(sata_pmp_std_hardreset); 7648 EXPORT_SYMBOL_GPL(sata_pmp_std_postreset); 7649 EXPORT_SYMBOL_GPL(sata_pmp_do_eh); 7650 7651 EXPORT_SYMBOL_GPL(__ata_ehi_push_desc); 7652 EXPORT_SYMBOL_GPL(ata_ehi_push_desc); 7653 EXPORT_SYMBOL_GPL(ata_ehi_clear_desc); 7654 EXPORT_SYMBOL_GPL(ata_port_desc); 7655 #ifdef CONFIG_PCI 7656 EXPORT_SYMBOL_GPL(ata_port_pbar_desc); 7657 #endif /* CONFIG_PCI */ 7658 EXPORT_SYMBOL_GPL(ata_port_schedule_eh); 7659 EXPORT_SYMBOL_GPL(ata_link_abort); 7660 EXPORT_SYMBOL_GPL(ata_port_abort); 7661 EXPORT_SYMBOL_GPL(ata_port_freeze); 7662 EXPORT_SYMBOL_GPL(sata_async_notification); 7663 EXPORT_SYMBOL_GPL(ata_eh_freeze_port); 7664 EXPORT_SYMBOL_GPL(ata_eh_thaw_port); 7665 EXPORT_SYMBOL_GPL(ata_eh_qc_complete); 7666 EXPORT_SYMBOL_GPL(ata_eh_qc_retry); 7667 EXPORT_SYMBOL_GPL(ata_do_eh); 7668 EXPORT_SYMBOL_GPL(ata_irq_on); 7669 EXPORT_SYMBOL_GPL(ata_dev_try_classify); 7670 7671 EXPORT_SYMBOL_GPL(ata_cable_40wire); 7672 EXPORT_SYMBOL_GPL(ata_cable_80wire); 7673 EXPORT_SYMBOL_GPL(ata_cable_unknown); 7674 EXPORT_SYMBOL_GPL(ata_cable_ignore); 7675 EXPORT_SYMBOL_GPL(ata_cable_sata); 7676