1 /* 2 * libata-core.c - helper library for ATA 3 * 4 * Maintained by: Jeff Garzik <jgarzik@pobox.com> 5 * Please ALWAYS copy linux-ide@vger.kernel.org 6 * on emails. 7 * 8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved. 9 * Copyright 2003-2004 Jeff Garzik 10 * 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2, or (at your option) 15 * any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; see the file COPYING. If not, write to 24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 25 * 26 * 27 * libata documentation is available via 'make {ps|pdf}docs', 28 * as Documentation/DocBook/libata.* 29 * 30 * Hardware documentation available from http://www.t13.org/ and 31 * http://www.sata-io.org/ 32 * 33 * Standards documents from: 34 * http://www.t13.org (ATA standards, PCI DMA IDE spec) 35 * http://www.t10.org (SCSI MMC - for ATAPI MMC) 36 * http://www.sata-io.org (SATA) 37 * http://www.compactflash.org (CF) 38 * http://www.qic.org (QIC157 - Tape and DSC) 39 * http://www.ce-ata.org (CE-ATA: not supported) 40 * 41 */ 42 43 #include <linux/kernel.h> 44 #include <linux/module.h> 45 #include <linux/pci.h> 46 #include <linux/init.h> 47 #include <linux/list.h> 48 #include <linux/mm.h> 49 #include <linux/highmem.h> 50 #include <linux/spinlock.h> 51 #include <linux/blkdev.h> 52 #include <linux/delay.h> 53 #include <linux/timer.h> 54 #include <linux/interrupt.h> 55 #include <linux/completion.h> 56 #include <linux/suspend.h> 57 #include <linux/workqueue.h> 58 #include <linux/jiffies.h> 59 #include <linux/scatterlist.h> 60 #include <linux/io.h> 61 #include <scsi/scsi.h> 62 #include <scsi/scsi_cmnd.h> 63 #include <scsi/scsi_host.h> 64 #include <linux/libata.h> 65 #include <asm/semaphore.h> 66 #include <asm/byteorder.h> 67 #include <linux/cdrom.h> 68 69 #include "libata.h" 70 71 72 /* debounce timing parameters in msecs { interval, duration, timeout } */ 73 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 }; 74 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 }; 75 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 }; 76 77 static unsigned int ata_dev_init_params(struct ata_device *dev, 78 u16 heads, u16 sectors); 79 static unsigned int ata_dev_set_xfermode(struct ata_device *dev); 80 static unsigned int ata_dev_set_feature(struct ata_device *dev, 81 u8 enable, u8 feature); 82 static void ata_dev_xfermask(struct ata_device *dev); 83 static unsigned long ata_dev_blacklisted(const struct ata_device *dev); 84 85 unsigned int ata_print_id = 1; 86 static struct workqueue_struct *ata_wq; 87 88 struct workqueue_struct *ata_aux_wq; 89 90 int atapi_enabled = 1; 91 module_param(atapi_enabled, int, 0444); 92 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); 93 94 int atapi_dmadir = 0; 95 module_param(atapi_dmadir, int, 0444); 96 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)"); 97 98 int atapi_passthru16 = 1; 99 module_param(atapi_passthru16, int, 0444); 100 MODULE_PARM_DESC(atapi_passthru16, "Enable ATA_16 passthru for ATAPI devices; on by default (0=off, 1=on)"); 101 102 int libata_fua = 0; 103 module_param_named(fua, libata_fua, int, 0444); 104 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)"); 105 106 static int ata_ignore_hpa; 107 module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644); 108 MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)"); 109 110 static int libata_dma_mask = ATA_DMA_MASK_ATA|ATA_DMA_MASK_ATAPI|ATA_DMA_MASK_CFA; 111 module_param_named(dma, libata_dma_mask, int, 0444); 112 MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)"); 113 114 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ; 115 module_param(ata_probe_timeout, int, 0444); 116 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)"); 117 118 int libata_noacpi = 0; 119 module_param_named(noacpi, libata_noacpi, int, 0444); 120 MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in probe/suspend/resume when set"); 121 122 MODULE_AUTHOR("Jeff Garzik"); 123 MODULE_DESCRIPTION("Library module for ATA devices"); 124 MODULE_LICENSE("GPL"); 125 MODULE_VERSION(DRV_VERSION); 126 127 128 /** 129 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure 130 * @tf: Taskfile to convert 131 * @pmp: Port multiplier port 132 * @is_cmd: This FIS is for command 133 * @fis: Buffer into which data will output 134 * 135 * Converts a standard ATA taskfile to a Serial ATA 136 * FIS structure (Register - Host to Device). 137 * 138 * LOCKING: 139 * Inherited from caller. 140 */ 141 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis) 142 { 143 fis[0] = 0x27; /* Register - Host to Device FIS */ 144 fis[1] = pmp & 0xf; /* Port multiplier number*/ 145 if (is_cmd) 146 fis[1] |= (1 << 7); /* bit 7 indicates Command FIS */ 147 148 fis[2] = tf->command; 149 fis[3] = tf->feature; 150 151 fis[4] = tf->lbal; 152 fis[5] = tf->lbam; 153 fis[6] = tf->lbah; 154 fis[7] = tf->device; 155 156 fis[8] = tf->hob_lbal; 157 fis[9] = tf->hob_lbam; 158 fis[10] = tf->hob_lbah; 159 fis[11] = tf->hob_feature; 160 161 fis[12] = tf->nsect; 162 fis[13] = tf->hob_nsect; 163 fis[14] = 0; 164 fis[15] = tf->ctl; 165 166 fis[16] = 0; 167 fis[17] = 0; 168 fis[18] = 0; 169 fis[19] = 0; 170 } 171 172 /** 173 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile 174 * @fis: Buffer from which data will be input 175 * @tf: Taskfile to output 176 * 177 * Converts a serial ATA FIS structure to a standard ATA taskfile. 178 * 179 * LOCKING: 180 * Inherited from caller. 181 */ 182 183 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf) 184 { 185 tf->command = fis[2]; /* status */ 186 tf->feature = fis[3]; /* error */ 187 188 tf->lbal = fis[4]; 189 tf->lbam = fis[5]; 190 tf->lbah = fis[6]; 191 tf->device = fis[7]; 192 193 tf->hob_lbal = fis[8]; 194 tf->hob_lbam = fis[9]; 195 tf->hob_lbah = fis[10]; 196 197 tf->nsect = fis[12]; 198 tf->hob_nsect = fis[13]; 199 } 200 201 static const u8 ata_rw_cmds[] = { 202 /* pio multi */ 203 ATA_CMD_READ_MULTI, 204 ATA_CMD_WRITE_MULTI, 205 ATA_CMD_READ_MULTI_EXT, 206 ATA_CMD_WRITE_MULTI_EXT, 207 0, 208 0, 209 0, 210 ATA_CMD_WRITE_MULTI_FUA_EXT, 211 /* pio */ 212 ATA_CMD_PIO_READ, 213 ATA_CMD_PIO_WRITE, 214 ATA_CMD_PIO_READ_EXT, 215 ATA_CMD_PIO_WRITE_EXT, 216 0, 217 0, 218 0, 219 0, 220 /* dma */ 221 ATA_CMD_READ, 222 ATA_CMD_WRITE, 223 ATA_CMD_READ_EXT, 224 ATA_CMD_WRITE_EXT, 225 0, 226 0, 227 0, 228 ATA_CMD_WRITE_FUA_EXT 229 }; 230 231 /** 232 * ata_rwcmd_protocol - set taskfile r/w commands and protocol 233 * @tf: command to examine and configure 234 * @dev: device tf belongs to 235 * 236 * Examine the device configuration and tf->flags to calculate 237 * the proper read/write commands and protocol to use. 238 * 239 * LOCKING: 240 * caller. 241 */ 242 static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev) 243 { 244 u8 cmd; 245 246 int index, fua, lba48, write; 247 248 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0; 249 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0; 250 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0; 251 252 if (dev->flags & ATA_DFLAG_PIO) { 253 tf->protocol = ATA_PROT_PIO; 254 index = dev->multi_count ? 0 : 8; 255 } else if (lba48 && (dev->link->ap->flags & ATA_FLAG_PIO_LBA48)) { 256 /* Unable to use DMA due to host limitation */ 257 tf->protocol = ATA_PROT_PIO; 258 index = dev->multi_count ? 0 : 8; 259 } else { 260 tf->protocol = ATA_PROT_DMA; 261 index = 16; 262 } 263 264 cmd = ata_rw_cmds[index + fua + lba48 + write]; 265 if (cmd) { 266 tf->command = cmd; 267 return 0; 268 } 269 return -1; 270 } 271 272 /** 273 * ata_tf_read_block - Read block address from ATA taskfile 274 * @tf: ATA taskfile of interest 275 * @dev: ATA device @tf belongs to 276 * 277 * LOCKING: 278 * None. 279 * 280 * Read block address from @tf. This function can handle all 281 * three address formats - LBA, LBA48 and CHS. tf->protocol and 282 * flags select the address format to use. 283 * 284 * RETURNS: 285 * Block address read from @tf. 286 */ 287 u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev) 288 { 289 u64 block = 0; 290 291 if (tf->flags & ATA_TFLAG_LBA) { 292 if (tf->flags & ATA_TFLAG_LBA48) { 293 block |= (u64)tf->hob_lbah << 40; 294 block |= (u64)tf->hob_lbam << 32; 295 block |= tf->hob_lbal << 24; 296 } else 297 block |= (tf->device & 0xf) << 24; 298 299 block |= tf->lbah << 16; 300 block |= tf->lbam << 8; 301 block |= tf->lbal; 302 } else { 303 u32 cyl, head, sect; 304 305 cyl = tf->lbam | (tf->lbah << 8); 306 head = tf->device & 0xf; 307 sect = tf->lbal; 308 309 block = (cyl * dev->heads + head) * dev->sectors + sect; 310 } 311 312 return block; 313 } 314 315 /** 316 * ata_build_rw_tf - Build ATA taskfile for given read/write request 317 * @tf: Target ATA taskfile 318 * @dev: ATA device @tf belongs to 319 * @block: Block address 320 * @n_block: Number of blocks 321 * @tf_flags: RW/FUA etc... 322 * @tag: tag 323 * 324 * LOCKING: 325 * None. 326 * 327 * Build ATA taskfile @tf for read/write request described by 328 * @block, @n_block, @tf_flags and @tag on @dev. 329 * 330 * RETURNS: 331 * 332 * 0 on success, -ERANGE if the request is too large for @dev, 333 * -EINVAL if the request is invalid. 334 */ 335 int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev, 336 u64 block, u32 n_block, unsigned int tf_flags, 337 unsigned int tag) 338 { 339 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 340 tf->flags |= tf_flags; 341 342 if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) { 343 /* yay, NCQ */ 344 if (!lba_48_ok(block, n_block)) 345 return -ERANGE; 346 347 tf->protocol = ATA_PROT_NCQ; 348 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48; 349 350 if (tf->flags & ATA_TFLAG_WRITE) 351 tf->command = ATA_CMD_FPDMA_WRITE; 352 else 353 tf->command = ATA_CMD_FPDMA_READ; 354 355 tf->nsect = tag << 3; 356 tf->hob_feature = (n_block >> 8) & 0xff; 357 tf->feature = n_block & 0xff; 358 359 tf->hob_lbah = (block >> 40) & 0xff; 360 tf->hob_lbam = (block >> 32) & 0xff; 361 tf->hob_lbal = (block >> 24) & 0xff; 362 tf->lbah = (block >> 16) & 0xff; 363 tf->lbam = (block >> 8) & 0xff; 364 tf->lbal = block & 0xff; 365 366 tf->device = 1 << 6; 367 if (tf->flags & ATA_TFLAG_FUA) 368 tf->device |= 1 << 7; 369 } else if (dev->flags & ATA_DFLAG_LBA) { 370 tf->flags |= ATA_TFLAG_LBA; 371 372 if (lba_28_ok(block, n_block)) { 373 /* use LBA28 */ 374 tf->device |= (block >> 24) & 0xf; 375 } else if (lba_48_ok(block, n_block)) { 376 if (!(dev->flags & ATA_DFLAG_LBA48)) 377 return -ERANGE; 378 379 /* use LBA48 */ 380 tf->flags |= ATA_TFLAG_LBA48; 381 382 tf->hob_nsect = (n_block >> 8) & 0xff; 383 384 tf->hob_lbah = (block >> 40) & 0xff; 385 tf->hob_lbam = (block >> 32) & 0xff; 386 tf->hob_lbal = (block >> 24) & 0xff; 387 } else 388 /* request too large even for LBA48 */ 389 return -ERANGE; 390 391 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0)) 392 return -EINVAL; 393 394 tf->nsect = n_block & 0xff; 395 396 tf->lbah = (block >> 16) & 0xff; 397 tf->lbam = (block >> 8) & 0xff; 398 tf->lbal = block & 0xff; 399 400 tf->device |= ATA_LBA; 401 } else { 402 /* CHS */ 403 u32 sect, head, cyl, track; 404 405 /* The request -may- be too large for CHS addressing. */ 406 if (!lba_28_ok(block, n_block)) 407 return -ERANGE; 408 409 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0)) 410 return -EINVAL; 411 412 /* Convert LBA to CHS */ 413 track = (u32)block / dev->sectors; 414 cyl = track / dev->heads; 415 head = track % dev->heads; 416 sect = (u32)block % dev->sectors + 1; 417 418 DPRINTK("block %u track %u cyl %u head %u sect %u\n", 419 (u32)block, track, cyl, head, sect); 420 421 /* Check whether the converted CHS can fit. 422 Cylinder: 0-65535 423 Head: 0-15 424 Sector: 1-255*/ 425 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect)) 426 return -ERANGE; 427 428 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */ 429 tf->lbal = sect; 430 tf->lbam = cyl; 431 tf->lbah = cyl >> 8; 432 tf->device |= head; 433 } 434 435 return 0; 436 } 437 438 /** 439 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask 440 * @pio_mask: pio_mask 441 * @mwdma_mask: mwdma_mask 442 * @udma_mask: udma_mask 443 * 444 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single 445 * unsigned int xfer_mask. 446 * 447 * LOCKING: 448 * None. 449 * 450 * RETURNS: 451 * Packed xfer_mask. 452 */ 453 static unsigned int ata_pack_xfermask(unsigned int pio_mask, 454 unsigned int mwdma_mask, 455 unsigned int udma_mask) 456 { 457 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) | 458 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) | 459 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA); 460 } 461 462 /** 463 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks 464 * @xfer_mask: xfer_mask to unpack 465 * @pio_mask: resulting pio_mask 466 * @mwdma_mask: resulting mwdma_mask 467 * @udma_mask: resulting udma_mask 468 * 469 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask. 470 * Any NULL distination masks will be ignored. 471 */ 472 static void ata_unpack_xfermask(unsigned int xfer_mask, 473 unsigned int *pio_mask, 474 unsigned int *mwdma_mask, 475 unsigned int *udma_mask) 476 { 477 if (pio_mask) 478 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO; 479 if (mwdma_mask) 480 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA; 481 if (udma_mask) 482 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA; 483 } 484 485 static const struct ata_xfer_ent { 486 int shift, bits; 487 u8 base; 488 } ata_xfer_tbl[] = { 489 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 }, 490 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 }, 491 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 }, 492 { -1, }, 493 }; 494 495 /** 496 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask 497 * @xfer_mask: xfer_mask of interest 498 * 499 * Return matching XFER_* value for @xfer_mask. Only the highest 500 * bit of @xfer_mask is considered. 501 * 502 * LOCKING: 503 * None. 504 * 505 * RETURNS: 506 * Matching XFER_* value, 0 if no match found. 507 */ 508 static u8 ata_xfer_mask2mode(unsigned int xfer_mask) 509 { 510 int highbit = fls(xfer_mask) - 1; 511 const struct ata_xfer_ent *ent; 512 513 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) 514 if (highbit >= ent->shift && highbit < ent->shift + ent->bits) 515 return ent->base + highbit - ent->shift; 516 return 0; 517 } 518 519 /** 520 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_* 521 * @xfer_mode: XFER_* of interest 522 * 523 * Return matching xfer_mask for @xfer_mode. 524 * 525 * LOCKING: 526 * None. 527 * 528 * RETURNS: 529 * Matching xfer_mask, 0 if no match found. 530 */ 531 static unsigned int ata_xfer_mode2mask(u8 xfer_mode) 532 { 533 const struct ata_xfer_ent *ent; 534 535 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) 536 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) 537 return 1 << (ent->shift + xfer_mode - ent->base); 538 return 0; 539 } 540 541 /** 542 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_* 543 * @xfer_mode: XFER_* of interest 544 * 545 * Return matching xfer_shift for @xfer_mode. 546 * 547 * LOCKING: 548 * None. 549 * 550 * RETURNS: 551 * Matching xfer_shift, -1 if no match found. 552 */ 553 static int ata_xfer_mode2shift(unsigned int xfer_mode) 554 { 555 const struct ata_xfer_ent *ent; 556 557 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) 558 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) 559 return ent->shift; 560 return -1; 561 } 562 563 /** 564 * ata_mode_string - convert xfer_mask to string 565 * @xfer_mask: mask of bits supported; only highest bit counts. 566 * 567 * Determine string which represents the highest speed 568 * (highest bit in @modemask). 569 * 570 * LOCKING: 571 * None. 572 * 573 * RETURNS: 574 * Constant C string representing highest speed listed in 575 * @mode_mask, or the constant C string "<n/a>". 576 */ 577 static const char *ata_mode_string(unsigned int xfer_mask) 578 { 579 static const char * const xfer_mode_str[] = { 580 "PIO0", 581 "PIO1", 582 "PIO2", 583 "PIO3", 584 "PIO4", 585 "PIO5", 586 "PIO6", 587 "MWDMA0", 588 "MWDMA1", 589 "MWDMA2", 590 "MWDMA3", 591 "MWDMA4", 592 "UDMA/16", 593 "UDMA/25", 594 "UDMA/33", 595 "UDMA/44", 596 "UDMA/66", 597 "UDMA/100", 598 "UDMA/133", 599 "UDMA7", 600 }; 601 int highbit; 602 603 highbit = fls(xfer_mask) - 1; 604 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str)) 605 return xfer_mode_str[highbit]; 606 return "<n/a>"; 607 } 608 609 static const char *sata_spd_string(unsigned int spd) 610 { 611 static const char * const spd_str[] = { 612 "1.5 Gbps", 613 "3.0 Gbps", 614 }; 615 616 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str)) 617 return "<unknown>"; 618 return spd_str[spd - 1]; 619 } 620 621 void ata_dev_disable(struct ata_device *dev) 622 { 623 if (ata_dev_enabled(dev)) { 624 if (ata_msg_drv(dev->link->ap)) 625 ata_dev_printk(dev, KERN_WARNING, "disabled\n"); 626 ata_acpi_on_disable(dev); 627 ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO0 | 628 ATA_DNXFER_QUIET); 629 dev->class++; 630 } 631 } 632 633 static int ata_dev_set_dipm(struct ata_device *dev, enum link_pm policy) 634 { 635 struct ata_link *link = dev->link; 636 struct ata_port *ap = link->ap; 637 u32 scontrol; 638 unsigned int err_mask; 639 int rc; 640 641 /* 642 * disallow DIPM for drivers which haven't set 643 * ATA_FLAG_IPM. This is because when DIPM is enabled, 644 * phy ready will be set in the interrupt status on 645 * state changes, which will cause some drivers to 646 * think there are errors - additionally drivers will 647 * need to disable hot plug. 648 */ 649 if (!(ap->flags & ATA_FLAG_IPM) || !ata_dev_enabled(dev)) { 650 ap->pm_policy = NOT_AVAILABLE; 651 return -EINVAL; 652 } 653 654 /* 655 * For DIPM, we will only enable it for the 656 * min_power setting. 657 * 658 * Why? Because Disks are too stupid to know that 659 * If the host rejects a request to go to SLUMBER 660 * they should retry at PARTIAL, and instead it 661 * just would give up. So, for medium_power to 662 * work at all, we need to only allow HIPM. 663 */ 664 rc = sata_scr_read(link, SCR_CONTROL, &scontrol); 665 if (rc) 666 return rc; 667 668 switch (policy) { 669 case MIN_POWER: 670 /* no restrictions on IPM transitions */ 671 scontrol &= ~(0x3 << 8); 672 rc = sata_scr_write(link, SCR_CONTROL, scontrol); 673 if (rc) 674 return rc; 675 676 /* enable DIPM */ 677 if (dev->flags & ATA_DFLAG_DIPM) 678 err_mask = ata_dev_set_feature(dev, 679 SETFEATURES_SATA_ENABLE, SATA_DIPM); 680 break; 681 case MEDIUM_POWER: 682 /* allow IPM to PARTIAL */ 683 scontrol &= ~(0x1 << 8); 684 scontrol |= (0x2 << 8); 685 rc = sata_scr_write(link, SCR_CONTROL, scontrol); 686 if (rc) 687 return rc; 688 689 /* 690 * we don't have to disable DIPM since IPM flags 691 * disallow transitions to SLUMBER, which effectively 692 * disable DIPM if it does not support PARTIAL 693 */ 694 break; 695 case NOT_AVAILABLE: 696 case MAX_PERFORMANCE: 697 /* disable all IPM transitions */ 698 scontrol |= (0x3 << 8); 699 rc = sata_scr_write(link, SCR_CONTROL, scontrol); 700 if (rc) 701 return rc; 702 703 /* 704 * we don't have to disable DIPM since IPM flags 705 * disallow all transitions which effectively 706 * disable DIPM anyway. 707 */ 708 break; 709 } 710 711 /* FIXME: handle SET FEATURES failure */ 712 (void) err_mask; 713 714 return 0; 715 } 716 717 /** 718 * ata_dev_enable_pm - enable SATA interface power management 719 * @dev: device to enable power management 720 * @policy: the link power management policy 721 * 722 * Enable SATA Interface power management. This will enable 723 * Device Interface Power Management (DIPM) for min_power 724 * policy, and then call driver specific callbacks for 725 * enabling Host Initiated Power management. 726 * 727 * Locking: Caller. 728 * Returns: -EINVAL if IPM is not supported, 0 otherwise. 729 */ 730 void ata_dev_enable_pm(struct ata_device *dev, enum link_pm policy) 731 { 732 int rc = 0; 733 struct ata_port *ap = dev->link->ap; 734 735 /* set HIPM first, then DIPM */ 736 if (ap->ops->enable_pm) 737 rc = ap->ops->enable_pm(ap, policy); 738 if (rc) 739 goto enable_pm_out; 740 rc = ata_dev_set_dipm(dev, policy); 741 742 enable_pm_out: 743 if (rc) 744 ap->pm_policy = MAX_PERFORMANCE; 745 else 746 ap->pm_policy = policy; 747 return /* rc */; /* hopefully we can use 'rc' eventually */ 748 } 749 750 #ifdef CONFIG_PM 751 /** 752 * ata_dev_disable_pm - disable SATA interface power management 753 * @dev: device to disable power management 754 * 755 * Disable SATA Interface power management. This will disable 756 * Device Interface Power Management (DIPM) without changing 757 * policy, call driver specific callbacks for disabling Host 758 * Initiated Power management. 759 * 760 * Locking: Caller. 761 * Returns: void 762 */ 763 static void ata_dev_disable_pm(struct ata_device *dev) 764 { 765 struct ata_port *ap = dev->link->ap; 766 767 ata_dev_set_dipm(dev, MAX_PERFORMANCE); 768 if (ap->ops->disable_pm) 769 ap->ops->disable_pm(ap); 770 } 771 #endif /* CONFIG_PM */ 772 773 void ata_lpm_schedule(struct ata_port *ap, enum link_pm policy) 774 { 775 ap->pm_policy = policy; 776 ap->link.eh_info.action |= ATA_EHI_LPM; 777 ap->link.eh_info.flags |= ATA_EHI_NO_AUTOPSY; 778 ata_port_schedule_eh(ap); 779 } 780 781 #ifdef CONFIG_PM 782 static void ata_lpm_enable(struct ata_host *host) 783 { 784 struct ata_link *link; 785 struct ata_port *ap; 786 struct ata_device *dev; 787 int i; 788 789 for (i = 0; i < host->n_ports; i++) { 790 ap = host->ports[i]; 791 ata_port_for_each_link(link, ap) { 792 ata_link_for_each_dev(dev, link) 793 ata_dev_disable_pm(dev); 794 } 795 } 796 } 797 798 static void ata_lpm_disable(struct ata_host *host) 799 { 800 int i; 801 802 for (i = 0; i < host->n_ports; i++) { 803 struct ata_port *ap = host->ports[i]; 804 ata_lpm_schedule(ap, ap->pm_policy); 805 } 806 } 807 #endif /* CONFIG_PM */ 808 809 810 /** 811 * ata_devchk - PATA device presence detection 812 * @ap: ATA channel to examine 813 * @device: Device to examine (starting at zero) 814 * 815 * This technique was originally described in 816 * Hale Landis's ATADRVR (www.ata-atapi.com), and 817 * later found its way into the ATA/ATAPI spec. 818 * 819 * Write a pattern to the ATA shadow registers, 820 * and if a device is present, it will respond by 821 * correctly storing and echoing back the 822 * ATA shadow register contents. 823 * 824 * LOCKING: 825 * caller. 826 */ 827 828 static unsigned int ata_devchk(struct ata_port *ap, unsigned int device) 829 { 830 struct ata_ioports *ioaddr = &ap->ioaddr; 831 u8 nsect, lbal; 832 833 ap->ops->dev_select(ap, device); 834 835 iowrite8(0x55, ioaddr->nsect_addr); 836 iowrite8(0xaa, ioaddr->lbal_addr); 837 838 iowrite8(0xaa, ioaddr->nsect_addr); 839 iowrite8(0x55, ioaddr->lbal_addr); 840 841 iowrite8(0x55, ioaddr->nsect_addr); 842 iowrite8(0xaa, ioaddr->lbal_addr); 843 844 nsect = ioread8(ioaddr->nsect_addr); 845 lbal = ioread8(ioaddr->lbal_addr); 846 847 if ((nsect == 0x55) && (lbal == 0xaa)) 848 return 1; /* we found a device */ 849 850 return 0; /* nothing found */ 851 } 852 853 /** 854 * ata_dev_classify - determine device type based on ATA-spec signature 855 * @tf: ATA taskfile register set for device to be identified 856 * 857 * Determine from taskfile register contents whether a device is 858 * ATA or ATAPI, as per "Signature and persistence" section 859 * of ATA/PI spec (volume 1, sect 5.14). 860 * 861 * LOCKING: 862 * None. 863 * 864 * RETURNS: 865 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, %ATA_DEV_PMP or 866 * %ATA_DEV_UNKNOWN the event of failure. 867 */ 868 unsigned int ata_dev_classify(const struct ata_taskfile *tf) 869 { 870 /* Apple's open source Darwin code hints that some devices only 871 * put a proper signature into the LBA mid/high registers, 872 * So, we only check those. It's sufficient for uniqueness. 873 * 874 * ATA/ATAPI-7 (d1532v1r1: Feb. 19, 2003) specified separate 875 * signatures for ATA and ATAPI devices attached on SerialATA, 876 * 0x3c/0xc3 and 0x69/0x96 respectively. However, SerialATA 877 * spec has never mentioned about using different signatures 878 * for ATA/ATAPI devices. Then, Serial ATA II: Port 879 * Multiplier specification began to use 0x69/0x96 to identify 880 * port multpliers and 0x3c/0xc3 to identify SEMB device. 881 * ATA/ATAPI-7 dropped descriptions about 0x3c/0xc3 and 882 * 0x69/0x96 shortly and described them as reserved for 883 * SerialATA. 884 * 885 * We follow the current spec and consider that 0x69/0x96 886 * identifies a port multiplier and 0x3c/0xc3 a SEMB device. 887 */ 888 if ((tf->lbam == 0) && (tf->lbah == 0)) { 889 DPRINTK("found ATA device by sig\n"); 890 return ATA_DEV_ATA; 891 } 892 893 if ((tf->lbam == 0x14) && (tf->lbah == 0xeb)) { 894 DPRINTK("found ATAPI device by sig\n"); 895 return ATA_DEV_ATAPI; 896 } 897 898 if ((tf->lbam == 0x69) && (tf->lbah == 0x96)) { 899 DPRINTK("found PMP device by sig\n"); 900 return ATA_DEV_PMP; 901 } 902 903 if ((tf->lbam == 0x3c) && (tf->lbah == 0xc3)) { 904 printk(KERN_INFO "ata: SEMB device ignored\n"); 905 return ATA_DEV_SEMB_UNSUP; /* not yet */ 906 } 907 908 DPRINTK("unknown device\n"); 909 return ATA_DEV_UNKNOWN; 910 } 911 912 /** 913 * ata_dev_try_classify - Parse returned ATA device signature 914 * @dev: ATA device to classify (starting at zero) 915 * @present: device seems present 916 * @r_err: Value of error register on completion 917 * 918 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, 919 * an ATA/ATAPI-defined set of values is placed in the ATA 920 * shadow registers, indicating the results of device detection 921 * and diagnostics. 922 * 923 * Select the ATA device, and read the values from the ATA shadow 924 * registers. Then parse according to the Error register value, 925 * and the spec-defined values examined by ata_dev_classify(). 926 * 927 * LOCKING: 928 * caller. 929 * 930 * RETURNS: 931 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE. 932 */ 933 unsigned int ata_dev_try_classify(struct ata_device *dev, int present, 934 u8 *r_err) 935 { 936 struct ata_port *ap = dev->link->ap; 937 struct ata_taskfile tf; 938 unsigned int class; 939 u8 err; 940 941 ap->ops->dev_select(ap, dev->devno); 942 943 memset(&tf, 0, sizeof(tf)); 944 945 ap->ops->tf_read(ap, &tf); 946 err = tf.feature; 947 if (r_err) 948 *r_err = err; 949 950 /* see if device passed diags: if master then continue and warn later */ 951 if (err == 0 && dev->devno == 0) 952 /* diagnostic fail : do nothing _YET_ */ 953 dev->horkage |= ATA_HORKAGE_DIAGNOSTIC; 954 else if (err == 1) 955 /* do nothing */ ; 956 else if ((dev->devno == 0) && (err == 0x81)) 957 /* do nothing */ ; 958 else 959 return ATA_DEV_NONE; 960 961 /* determine if device is ATA or ATAPI */ 962 class = ata_dev_classify(&tf); 963 964 if (class == ATA_DEV_UNKNOWN) { 965 /* If the device failed diagnostic, it's likely to 966 * have reported incorrect device signature too. 967 * Assume ATA device if the device seems present but 968 * device signature is invalid with diagnostic 969 * failure. 970 */ 971 if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC)) 972 class = ATA_DEV_ATA; 973 else 974 class = ATA_DEV_NONE; 975 } else if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) 976 class = ATA_DEV_NONE; 977 978 return class; 979 } 980 981 /** 982 * ata_id_string - Convert IDENTIFY DEVICE page into string 983 * @id: IDENTIFY DEVICE results we will examine 984 * @s: string into which data is output 985 * @ofs: offset into identify device page 986 * @len: length of string to return. must be an even number. 987 * 988 * The strings in the IDENTIFY DEVICE page are broken up into 989 * 16-bit chunks. Run through the string, and output each 990 * 8-bit chunk linearly, regardless of platform. 991 * 992 * LOCKING: 993 * caller. 994 */ 995 996 void ata_id_string(const u16 *id, unsigned char *s, 997 unsigned int ofs, unsigned int len) 998 { 999 unsigned int c; 1000 1001 while (len > 0) { 1002 c = id[ofs] >> 8; 1003 *s = c; 1004 s++; 1005 1006 c = id[ofs] & 0xff; 1007 *s = c; 1008 s++; 1009 1010 ofs++; 1011 len -= 2; 1012 } 1013 } 1014 1015 /** 1016 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string 1017 * @id: IDENTIFY DEVICE results we will examine 1018 * @s: string into which data is output 1019 * @ofs: offset into identify device page 1020 * @len: length of string to return. must be an odd number. 1021 * 1022 * This function is identical to ata_id_string except that it 1023 * trims trailing spaces and terminates the resulting string with 1024 * null. @len must be actual maximum length (even number) + 1. 1025 * 1026 * LOCKING: 1027 * caller. 1028 */ 1029 void ata_id_c_string(const u16 *id, unsigned char *s, 1030 unsigned int ofs, unsigned int len) 1031 { 1032 unsigned char *p; 1033 1034 WARN_ON(!(len & 1)); 1035 1036 ata_id_string(id, s, ofs, len - 1); 1037 1038 p = s + strnlen(s, len - 1); 1039 while (p > s && p[-1] == ' ') 1040 p--; 1041 *p = '\0'; 1042 } 1043 1044 static u64 ata_id_n_sectors(const u16 *id) 1045 { 1046 if (ata_id_has_lba(id)) { 1047 if (ata_id_has_lba48(id)) 1048 return ata_id_u64(id, 100); 1049 else 1050 return ata_id_u32(id, 60); 1051 } else { 1052 if (ata_id_current_chs_valid(id)) 1053 return ata_id_u32(id, 57); 1054 else 1055 return id[1] * id[3] * id[6]; 1056 } 1057 } 1058 1059 static u64 ata_tf_to_lba48(struct ata_taskfile *tf) 1060 { 1061 u64 sectors = 0; 1062 1063 sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40; 1064 sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32; 1065 sectors |= (tf->hob_lbal & 0xff) << 24; 1066 sectors |= (tf->lbah & 0xff) << 16; 1067 sectors |= (tf->lbam & 0xff) << 8; 1068 sectors |= (tf->lbal & 0xff); 1069 1070 return ++sectors; 1071 } 1072 1073 static u64 ata_tf_to_lba(struct ata_taskfile *tf) 1074 { 1075 u64 sectors = 0; 1076 1077 sectors |= (tf->device & 0x0f) << 24; 1078 sectors |= (tf->lbah & 0xff) << 16; 1079 sectors |= (tf->lbam & 0xff) << 8; 1080 sectors |= (tf->lbal & 0xff); 1081 1082 return ++sectors; 1083 } 1084 1085 /** 1086 * ata_read_native_max_address - Read native max address 1087 * @dev: target device 1088 * @max_sectors: out parameter for the result native max address 1089 * 1090 * Perform an LBA48 or LBA28 native size query upon the device in 1091 * question. 1092 * 1093 * RETURNS: 1094 * 0 on success, -EACCES if command is aborted by the drive. 1095 * -EIO on other errors. 1096 */ 1097 static int ata_read_native_max_address(struct ata_device *dev, u64 *max_sectors) 1098 { 1099 unsigned int err_mask; 1100 struct ata_taskfile tf; 1101 int lba48 = ata_id_has_lba48(dev->id); 1102 1103 ata_tf_init(dev, &tf); 1104 1105 /* always clear all address registers */ 1106 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR; 1107 1108 if (lba48) { 1109 tf.command = ATA_CMD_READ_NATIVE_MAX_EXT; 1110 tf.flags |= ATA_TFLAG_LBA48; 1111 } else 1112 tf.command = ATA_CMD_READ_NATIVE_MAX; 1113 1114 tf.protocol |= ATA_PROT_NODATA; 1115 tf.device |= ATA_LBA; 1116 1117 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); 1118 if (err_mask) { 1119 ata_dev_printk(dev, KERN_WARNING, "failed to read native " 1120 "max address (err_mask=0x%x)\n", err_mask); 1121 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED)) 1122 return -EACCES; 1123 return -EIO; 1124 } 1125 1126 if (lba48) 1127 *max_sectors = ata_tf_to_lba48(&tf); 1128 else 1129 *max_sectors = ata_tf_to_lba(&tf); 1130 if (dev->horkage & ATA_HORKAGE_HPA_SIZE) 1131 (*max_sectors)--; 1132 return 0; 1133 } 1134 1135 /** 1136 * ata_set_max_sectors - Set max sectors 1137 * @dev: target device 1138 * @new_sectors: new max sectors value to set for the device 1139 * 1140 * Set max sectors of @dev to @new_sectors. 1141 * 1142 * RETURNS: 1143 * 0 on success, -EACCES if command is aborted or denied (due to 1144 * previous non-volatile SET_MAX) by the drive. -EIO on other 1145 * errors. 1146 */ 1147 static int ata_set_max_sectors(struct ata_device *dev, u64 new_sectors) 1148 { 1149 unsigned int err_mask; 1150 struct ata_taskfile tf; 1151 int lba48 = ata_id_has_lba48(dev->id); 1152 1153 new_sectors--; 1154 1155 ata_tf_init(dev, &tf); 1156 1157 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR; 1158 1159 if (lba48) { 1160 tf.command = ATA_CMD_SET_MAX_EXT; 1161 tf.flags |= ATA_TFLAG_LBA48; 1162 1163 tf.hob_lbal = (new_sectors >> 24) & 0xff; 1164 tf.hob_lbam = (new_sectors >> 32) & 0xff; 1165 tf.hob_lbah = (new_sectors >> 40) & 0xff; 1166 } else { 1167 tf.command = ATA_CMD_SET_MAX; 1168 1169 tf.device |= (new_sectors >> 24) & 0xf; 1170 } 1171 1172 tf.protocol |= ATA_PROT_NODATA; 1173 tf.device |= ATA_LBA; 1174 1175 tf.lbal = (new_sectors >> 0) & 0xff; 1176 tf.lbam = (new_sectors >> 8) & 0xff; 1177 tf.lbah = (new_sectors >> 16) & 0xff; 1178 1179 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); 1180 if (err_mask) { 1181 ata_dev_printk(dev, KERN_WARNING, "failed to set " 1182 "max address (err_mask=0x%x)\n", err_mask); 1183 if (err_mask == AC_ERR_DEV && 1184 (tf.feature & (ATA_ABORTED | ATA_IDNF))) 1185 return -EACCES; 1186 return -EIO; 1187 } 1188 1189 return 0; 1190 } 1191 1192 /** 1193 * ata_hpa_resize - Resize a device with an HPA set 1194 * @dev: Device to resize 1195 * 1196 * Read the size of an LBA28 or LBA48 disk with HPA features and resize 1197 * it if required to the full size of the media. The caller must check 1198 * the drive has the HPA feature set enabled. 1199 * 1200 * RETURNS: 1201 * 0 on success, -errno on failure. 1202 */ 1203 static int ata_hpa_resize(struct ata_device *dev) 1204 { 1205 struct ata_eh_context *ehc = &dev->link->eh_context; 1206 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO; 1207 u64 sectors = ata_id_n_sectors(dev->id); 1208 u64 native_sectors; 1209 int rc; 1210 1211 /* do we need to do it? */ 1212 if (dev->class != ATA_DEV_ATA || 1213 !ata_id_has_lba(dev->id) || !ata_id_hpa_enabled(dev->id) || 1214 (dev->horkage & ATA_HORKAGE_BROKEN_HPA)) 1215 return 0; 1216 1217 /* read native max address */ 1218 rc = ata_read_native_max_address(dev, &native_sectors); 1219 if (rc) { 1220 /* If HPA isn't going to be unlocked, skip HPA 1221 * resizing from the next try. 1222 */ 1223 if (!ata_ignore_hpa) { 1224 ata_dev_printk(dev, KERN_WARNING, "HPA support seems " 1225 "broken, will skip HPA handling\n"); 1226 dev->horkage |= ATA_HORKAGE_BROKEN_HPA; 1227 1228 /* we can continue if device aborted the command */ 1229 if (rc == -EACCES) 1230 rc = 0; 1231 } 1232 1233 return rc; 1234 } 1235 1236 /* nothing to do? */ 1237 if (native_sectors <= sectors || !ata_ignore_hpa) { 1238 if (!print_info || native_sectors == sectors) 1239 return 0; 1240 1241 if (native_sectors > sectors) 1242 ata_dev_printk(dev, KERN_INFO, 1243 "HPA detected: current %llu, native %llu\n", 1244 (unsigned long long)sectors, 1245 (unsigned long long)native_sectors); 1246 else if (native_sectors < sectors) 1247 ata_dev_printk(dev, KERN_WARNING, 1248 "native sectors (%llu) is smaller than " 1249 "sectors (%llu)\n", 1250 (unsigned long long)native_sectors, 1251 (unsigned long long)sectors); 1252 return 0; 1253 } 1254 1255 /* let's unlock HPA */ 1256 rc = ata_set_max_sectors(dev, native_sectors); 1257 if (rc == -EACCES) { 1258 /* if device aborted the command, skip HPA resizing */ 1259 ata_dev_printk(dev, KERN_WARNING, "device aborted resize " 1260 "(%llu -> %llu), skipping HPA handling\n", 1261 (unsigned long long)sectors, 1262 (unsigned long long)native_sectors); 1263 dev->horkage |= ATA_HORKAGE_BROKEN_HPA; 1264 return 0; 1265 } else if (rc) 1266 return rc; 1267 1268 /* re-read IDENTIFY data */ 1269 rc = ata_dev_reread_id(dev, 0); 1270 if (rc) { 1271 ata_dev_printk(dev, KERN_ERR, "failed to re-read IDENTIFY " 1272 "data after HPA resizing\n"); 1273 return rc; 1274 } 1275 1276 if (print_info) { 1277 u64 new_sectors = ata_id_n_sectors(dev->id); 1278 ata_dev_printk(dev, KERN_INFO, 1279 "HPA unlocked: %llu -> %llu, native %llu\n", 1280 (unsigned long long)sectors, 1281 (unsigned long long)new_sectors, 1282 (unsigned long long)native_sectors); 1283 } 1284 1285 return 0; 1286 } 1287 1288 /** 1289 * ata_id_to_dma_mode - Identify DMA mode from id block 1290 * @dev: device to identify 1291 * @unknown: mode to assume if we cannot tell 1292 * 1293 * Set up the timing values for the device based upon the identify 1294 * reported values for the DMA mode. This function is used by drivers 1295 * which rely upon firmware configured modes, but wish to report the 1296 * mode correctly when possible. 1297 * 1298 * In addition we emit similarly formatted messages to the default 1299 * ata_dev_set_mode handler, in order to provide consistency of 1300 * presentation. 1301 */ 1302 1303 void ata_id_to_dma_mode(struct ata_device *dev, u8 unknown) 1304 { 1305 unsigned int mask; 1306 u8 mode; 1307 1308 /* Pack the DMA modes */ 1309 mask = ((dev->id[63] >> 8) << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA; 1310 if (dev->id[53] & 0x04) 1311 mask |= ((dev->id[88] >> 8) << ATA_SHIFT_UDMA) & ATA_MASK_UDMA; 1312 1313 /* Select the mode in use */ 1314 mode = ata_xfer_mask2mode(mask); 1315 1316 if (mode != 0) { 1317 ata_dev_printk(dev, KERN_INFO, "configured for %s\n", 1318 ata_mode_string(mask)); 1319 } else { 1320 /* SWDMA perhaps ? */ 1321 mode = unknown; 1322 ata_dev_printk(dev, KERN_INFO, "configured for DMA\n"); 1323 } 1324 1325 /* Configure the device reporting */ 1326 dev->xfer_mode = mode; 1327 dev->xfer_shift = ata_xfer_mode2shift(mode); 1328 } 1329 1330 /** 1331 * ata_noop_dev_select - Select device 0/1 on ATA bus 1332 * @ap: ATA channel to manipulate 1333 * @device: ATA device (numbered from zero) to select 1334 * 1335 * This function performs no actual function. 1336 * 1337 * May be used as the dev_select() entry in ata_port_operations. 1338 * 1339 * LOCKING: 1340 * caller. 1341 */ 1342 void ata_noop_dev_select(struct ata_port *ap, unsigned int device) 1343 { 1344 } 1345 1346 1347 /** 1348 * ata_std_dev_select - Select device 0/1 on ATA bus 1349 * @ap: ATA channel to manipulate 1350 * @device: ATA device (numbered from zero) to select 1351 * 1352 * Use the method defined in the ATA specification to 1353 * make either device 0, or device 1, active on the 1354 * ATA channel. Works with both PIO and MMIO. 1355 * 1356 * May be used as the dev_select() entry in ata_port_operations. 1357 * 1358 * LOCKING: 1359 * caller. 1360 */ 1361 1362 void ata_std_dev_select(struct ata_port *ap, unsigned int device) 1363 { 1364 u8 tmp; 1365 1366 if (device == 0) 1367 tmp = ATA_DEVICE_OBS; 1368 else 1369 tmp = ATA_DEVICE_OBS | ATA_DEV1; 1370 1371 iowrite8(tmp, ap->ioaddr.device_addr); 1372 ata_pause(ap); /* needed; also flushes, for mmio */ 1373 } 1374 1375 /** 1376 * ata_dev_select - Select device 0/1 on ATA bus 1377 * @ap: ATA channel to manipulate 1378 * @device: ATA device (numbered from zero) to select 1379 * @wait: non-zero to wait for Status register BSY bit to clear 1380 * @can_sleep: non-zero if context allows sleeping 1381 * 1382 * Use the method defined in the ATA specification to 1383 * make either device 0, or device 1, active on the 1384 * ATA channel. 1385 * 1386 * This is a high-level version of ata_std_dev_select(), 1387 * which additionally provides the services of inserting 1388 * the proper pauses and status polling, where needed. 1389 * 1390 * LOCKING: 1391 * caller. 1392 */ 1393 1394 void ata_dev_select(struct ata_port *ap, unsigned int device, 1395 unsigned int wait, unsigned int can_sleep) 1396 { 1397 if (ata_msg_probe(ap)) 1398 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, " 1399 "device %u, wait %u\n", device, wait); 1400 1401 if (wait) 1402 ata_wait_idle(ap); 1403 1404 ap->ops->dev_select(ap, device); 1405 1406 if (wait) { 1407 if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI) 1408 msleep(150); 1409 ata_wait_idle(ap); 1410 } 1411 } 1412 1413 /** 1414 * ata_dump_id - IDENTIFY DEVICE info debugging output 1415 * @id: IDENTIFY DEVICE page to dump 1416 * 1417 * Dump selected 16-bit words from the given IDENTIFY DEVICE 1418 * page. 1419 * 1420 * LOCKING: 1421 * caller. 1422 */ 1423 1424 static inline void ata_dump_id(const u16 *id) 1425 { 1426 DPRINTK("49==0x%04x " 1427 "53==0x%04x " 1428 "63==0x%04x " 1429 "64==0x%04x " 1430 "75==0x%04x \n", 1431 id[49], 1432 id[53], 1433 id[63], 1434 id[64], 1435 id[75]); 1436 DPRINTK("80==0x%04x " 1437 "81==0x%04x " 1438 "82==0x%04x " 1439 "83==0x%04x " 1440 "84==0x%04x \n", 1441 id[80], 1442 id[81], 1443 id[82], 1444 id[83], 1445 id[84]); 1446 DPRINTK("88==0x%04x " 1447 "93==0x%04x\n", 1448 id[88], 1449 id[93]); 1450 } 1451 1452 /** 1453 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data 1454 * @id: IDENTIFY data to compute xfer mask from 1455 * 1456 * Compute the xfermask for this device. This is not as trivial 1457 * as it seems if we must consider early devices correctly. 1458 * 1459 * FIXME: pre IDE drive timing (do we care ?). 1460 * 1461 * LOCKING: 1462 * None. 1463 * 1464 * RETURNS: 1465 * Computed xfermask 1466 */ 1467 static unsigned int ata_id_xfermask(const u16 *id) 1468 { 1469 unsigned int pio_mask, mwdma_mask, udma_mask; 1470 1471 /* Usual case. Word 53 indicates word 64 is valid */ 1472 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) { 1473 pio_mask = id[ATA_ID_PIO_MODES] & 0x03; 1474 pio_mask <<= 3; 1475 pio_mask |= 0x7; 1476 } else { 1477 /* If word 64 isn't valid then Word 51 high byte holds 1478 * the PIO timing number for the maximum. Turn it into 1479 * a mask. 1480 */ 1481 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF; 1482 if (mode < 5) /* Valid PIO range */ 1483 pio_mask = (2 << mode) - 1; 1484 else 1485 pio_mask = 1; 1486 1487 /* But wait.. there's more. Design your standards by 1488 * committee and you too can get a free iordy field to 1489 * process. However its the speeds not the modes that 1490 * are supported... Note drivers using the timing API 1491 * will get this right anyway 1492 */ 1493 } 1494 1495 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07; 1496 1497 if (ata_id_is_cfa(id)) { 1498 /* 1499 * Process compact flash extended modes 1500 */ 1501 int pio = id[163] & 0x7; 1502 int dma = (id[163] >> 3) & 7; 1503 1504 if (pio) 1505 pio_mask |= (1 << 5); 1506 if (pio > 1) 1507 pio_mask |= (1 << 6); 1508 if (dma) 1509 mwdma_mask |= (1 << 3); 1510 if (dma > 1) 1511 mwdma_mask |= (1 << 4); 1512 } 1513 1514 udma_mask = 0; 1515 if (id[ATA_ID_FIELD_VALID] & (1 << 2)) 1516 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff; 1517 1518 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); 1519 } 1520 1521 /** 1522 * ata_port_queue_task - Queue port_task 1523 * @ap: The ata_port to queue port_task for 1524 * @fn: workqueue function to be scheduled 1525 * @data: data for @fn to use 1526 * @delay: delay time for workqueue function 1527 * 1528 * Schedule @fn(@data) for execution after @delay jiffies using 1529 * port_task. There is one port_task per port and it's the 1530 * user(low level driver)'s responsibility to make sure that only 1531 * one task is active at any given time. 1532 * 1533 * libata core layer takes care of synchronization between 1534 * port_task and EH. ata_port_queue_task() may be ignored for EH 1535 * synchronization. 1536 * 1537 * LOCKING: 1538 * Inherited from caller. 1539 */ 1540 void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data, 1541 unsigned long delay) 1542 { 1543 PREPARE_DELAYED_WORK(&ap->port_task, fn); 1544 ap->port_task_data = data; 1545 1546 /* may fail if ata_port_flush_task() in progress */ 1547 queue_delayed_work(ata_wq, &ap->port_task, delay); 1548 } 1549 1550 /** 1551 * ata_port_flush_task - Flush port_task 1552 * @ap: The ata_port to flush port_task for 1553 * 1554 * After this function completes, port_task is guranteed not to 1555 * be running or scheduled. 1556 * 1557 * LOCKING: 1558 * Kernel thread context (may sleep) 1559 */ 1560 void ata_port_flush_task(struct ata_port *ap) 1561 { 1562 DPRINTK("ENTER\n"); 1563 1564 cancel_rearming_delayed_work(&ap->port_task); 1565 1566 if (ata_msg_ctl(ap)) 1567 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__); 1568 } 1569 1570 static void ata_qc_complete_internal(struct ata_queued_cmd *qc) 1571 { 1572 struct completion *waiting = qc->private_data; 1573 1574 complete(waiting); 1575 } 1576 1577 /** 1578 * ata_exec_internal_sg - execute libata internal command 1579 * @dev: Device to which the command is sent 1580 * @tf: Taskfile registers for the command and the result 1581 * @cdb: CDB for packet command 1582 * @dma_dir: Data tranfer direction of the command 1583 * @sgl: sg list for the data buffer of the command 1584 * @n_elem: Number of sg entries 1585 * @timeout: Timeout in msecs (0 for default) 1586 * 1587 * Executes libata internal command with timeout. @tf contains 1588 * command on entry and result on return. Timeout and error 1589 * conditions are reported via return value. No recovery action 1590 * is taken after a command times out. It's caller's duty to 1591 * clean up after timeout. 1592 * 1593 * LOCKING: 1594 * None. Should be called with kernel context, might sleep. 1595 * 1596 * RETURNS: 1597 * Zero on success, AC_ERR_* mask on failure 1598 */ 1599 unsigned ata_exec_internal_sg(struct ata_device *dev, 1600 struct ata_taskfile *tf, const u8 *cdb, 1601 int dma_dir, struct scatterlist *sgl, 1602 unsigned int n_elem, unsigned long timeout) 1603 { 1604 struct ata_link *link = dev->link; 1605 struct ata_port *ap = link->ap; 1606 u8 command = tf->command; 1607 struct ata_queued_cmd *qc; 1608 unsigned int tag, preempted_tag; 1609 u32 preempted_sactive, preempted_qc_active; 1610 int preempted_nr_active_links; 1611 DECLARE_COMPLETION_ONSTACK(wait); 1612 unsigned long flags; 1613 unsigned int err_mask; 1614 int rc; 1615 1616 spin_lock_irqsave(ap->lock, flags); 1617 1618 /* no internal command while frozen */ 1619 if (ap->pflags & ATA_PFLAG_FROZEN) { 1620 spin_unlock_irqrestore(ap->lock, flags); 1621 return AC_ERR_SYSTEM; 1622 } 1623 1624 /* initialize internal qc */ 1625 1626 /* XXX: Tag 0 is used for drivers with legacy EH as some 1627 * drivers choke if any other tag is given. This breaks 1628 * ata_tag_internal() test for those drivers. Don't use new 1629 * EH stuff without converting to it. 1630 */ 1631 if (ap->ops->error_handler) 1632 tag = ATA_TAG_INTERNAL; 1633 else 1634 tag = 0; 1635 1636 if (test_and_set_bit(tag, &ap->qc_allocated)) 1637 BUG(); 1638 qc = __ata_qc_from_tag(ap, tag); 1639 1640 qc->tag = tag; 1641 qc->scsicmd = NULL; 1642 qc->ap = ap; 1643 qc->dev = dev; 1644 ata_qc_reinit(qc); 1645 1646 preempted_tag = link->active_tag; 1647 preempted_sactive = link->sactive; 1648 preempted_qc_active = ap->qc_active; 1649 preempted_nr_active_links = ap->nr_active_links; 1650 link->active_tag = ATA_TAG_POISON; 1651 link->sactive = 0; 1652 ap->qc_active = 0; 1653 ap->nr_active_links = 0; 1654 1655 /* prepare & issue qc */ 1656 qc->tf = *tf; 1657 if (cdb) 1658 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN); 1659 qc->flags |= ATA_QCFLAG_RESULT_TF; 1660 qc->dma_dir = dma_dir; 1661 if (dma_dir != DMA_NONE) { 1662 unsigned int i, buflen = 0; 1663 struct scatterlist *sg; 1664 1665 for_each_sg(sgl, sg, n_elem, i) 1666 buflen += sg->length; 1667 1668 ata_sg_init(qc, sgl, n_elem); 1669 qc->nbytes = buflen; 1670 } 1671 1672 qc->private_data = &wait; 1673 qc->complete_fn = ata_qc_complete_internal; 1674 1675 ata_qc_issue(qc); 1676 1677 spin_unlock_irqrestore(ap->lock, flags); 1678 1679 if (!timeout) 1680 timeout = ata_probe_timeout * 1000 / HZ; 1681 1682 rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout)); 1683 1684 ata_port_flush_task(ap); 1685 1686 if (!rc) { 1687 spin_lock_irqsave(ap->lock, flags); 1688 1689 /* We're racing with irq here. If we lose, the 1690 * following test prevents us from completing the qc 1691 * twice. If we win, the port is frozen and will be 1692 * cleaned up by ->post_internal_cmd(). 1693 */ 1694 if (qc->flags & ATA_QCFLAG_ACTIVE) { 1695 qc->err_mask |= AC_ERR_TIMEOUT; 1696 1697 if (ap->ops->error_handler) 1698 ata_port_freeze(ap); 1699 else 1700 ata_qc_complete(qc); 1701 1702 if (ata_msg_warn(ap)) 1703 ata_dev_printk(dev, KERN_WARNING, 1704 "qc timeout (cmd 0x%x)\n", command); 1705 } 1706 1707 spin_unlock_irqrestore(ap->lock, flags); 1708 } 1709 1710 /* do post_internal_cmd */ 1711 if (ap->ops->post_internal_cmd) 1712 ap->ops->post_internal_cmd(qc); 1713 1714 /* perform minimal error analysis */ 1715 if (qc->flags & ATA_QCFLAG_FAILED) { 1716 if (qc->result_tf.command & (ATA_ERR | ATA_DF)) 1717 qc->err_mask |= AC_ERR_DEV; 1718 1719 if (!qc->err_mask) 1720 qc->err_mask |= AC_ERR_OTHER; 1721 1722 if (qc->err_mask & ~AC_ERR_OTHER) 1723 qc->err_mask &= ~AC_ERR_OTHER; 1724 } 1725 1726 /* finish up */ 1727 spin_lock_irqsave(ap->lock, flags); 1728 1729 *tf = qc->result_tf; 1730 err_mask = qc->err_mask; 1731 1732 ata_qc_free(qc); 1733 link->active_tag = preempted_tag; 1734 link->sactive = preempted_sactive; 1735 ap->qc_active = preempted_qc_active; 1736 ap->nr_active_links = preempted_nr_active_links; 1737 1738 /* XXX - Some LLDDs (sata_mv) disable port on command failure. 1739 * Until those drivers are fixed, we detect the condition 1740 * here, fail the command with AC_ERR_SYSTEM and reenable the 1741 * port. 1742 * 1743 * Note that this doesn't change any behavior as internal 1744 * command failure results in disabling the device in the 1745 * higher layer for LLDDs without new reset/EH callbacks. 1746 * 1747 * Kill the following code as soon as those drivers are fixed. 1748 */ 1749 if (ap->flags & ATA_FLAG_DISABLED) { 1750 err_mask |= AC_ERR_SYSTEM; 1751 ata_port_probe(ap); 1752 } 1753 1754 spin_unlock_irqrestore(ap->lock, flags); 1755 1756 return err_mask; 1757 } 1758 1759 /** 1760 * ata_exec_internal - execute libata internal command 1761 * @dev: Device to which the command is sent 1762 * @tf: Taskfile registers for the command and the result 1763 * @cdb: CDB for packet command 1764 * @dma_dir: Data tranfer direction of the command 1765 * @buf: Data buffer of the command 1766 * @buflen: Length of data buffer 1767 * @timeout: Timeout in msecs (0 for default) 1768 * 1769 * Wrapper around ata_exec_internal_sg() which takes simple 1770 * buffer instead of sg list. 1771 * 1772 * LOCKING: 1773 * None. Should be called with kernel context, might sleep. 1774 * 1775 * RETURNS: 1776 * Zero on success, AC_ERR_* mask on failure 1777 */ 1778 unsigned ata_exec_internal(struct ata_device *dev, 1779 struct ata_taskfile *tf, const u8 *cdb, 1780 int dma_dir, void *buf, unsigned int buflen, 1781 unsigned long timeout) 1782 { 1783 struct scatterlist *psg = NULL, sg; 1784 unsigned int n_elem = 0; 1785 1786 if (dma_dir != DMA_NONE) { 1787 WARN_ON(!buf); 1788 sg_init_one(&sg, buf, buflen); 1789 psg = &sg; 1790 n_elem++; 1791 } 1792 1793 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem, 1794 timeout); 1795 } 1796 1797 /** 1798 * ata_do_simple_cmd - execute simple internal command 1799 * @dev: Device to which the command is sent 1800 * @cmd: Opcode to execute 1801 * 1802 * Execute a 'simple' command, that only consists of the opcode 1803 * 'cmd' itself, without filling any other registers 1804 * 1805 * LOCKING: 1806 * Kernel thread context (may sleep). 1807 * 1808 * RETURNS: 1809 * Zero on success, AC_ERR_* mask on failure 1810 */ 1811 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd) 1812 { 1813 struct ata_taskfile tf; 1814 1815 ata_tf_init(dev, &tf); 1816 1817 tf.command = cmd; 1818 tf.flags |= ATA_TFLAG_DEVICE; 1819 tf.protocol = ATA_PROT_NODATA; 1820 1821 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); 1822 } 1823 1824 /** 1825 * ata_pio_need_iordy - check if iordy needed 1826 * @adev: ATA device 1827 * 1828 * Check if the current speed of the device requires IORDY. Used 1829 * by various controllers for chip configuration. 1830 */ 1831 1832 unsigned int ata_pio_need_iordy(const struct ata_device *adev) 1833 { 1834 /* Controller doesn't support IORDY. Probably a pointless check 1835 as the caller should know this */ 1836 if (adev->link->ap->flags & ATA_FLAG_NO_IORDY) 1837 return 0; 1838 /* PIO3 and higher it is mandatory */ 1839 if (adev->pio_mode > XFER_PIO_2) 1840 return 1; 1841 /* We turn it on when possible */ 1842 if (ata_id_has_iordy(adev->id)) 1843 return 1; 1844 return 0; 1845 } 1846 1847 /** 1848 * ata_pio_mask_no_iordy - Return the non IORDY mask 1849 * @adev: ATA device 1850 * 1851 * Compute the highest mode possible if we are not using iordy. Return 1852 * -1 if no iordy mode is available. 1853 */ 1854 1855 static u32 ata_pio_mask_no_iordy(const struct ata_device *adev) 1856 { 1857 /* If we have no drive specific rule, then PIO 2 is non IORDY */ 1858 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */ 1859 u16 pio = adev->id[ATA_ID_EIDE_PIO]; 1860 /* Is the speed faster than the drive allows non IORDY ? */ 1861 if (pio) { 1862 /* This is cycle times not frequency - watch the logic! */ 1863 if (pio > 240) /* PIO2 is 240nS per cycle */ 1864 return 3 << ATA_SHIFT_PIO; 1865 return 7 << ATA_SHIFT_PIO; 1866 } 1867 } 1868 return 3 << ATA_SHIFT_PIO; 1869 } 1870 1871 /** 1872 * ata_dev_read_id - Read ID data from the specified device 1873 * @dev: target device 1874 * @p_class: pointer to class of the target device (may be changed) 1875 * @flags: ATA_READID_* flags 1876 * @id: buffer to read IDENTIFY data into 1877 * 1878 * Read ID data from the specified device. ATA_CMD_ID_ATA is 1879 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI 1880 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS 1881 * for pre-ATA4 drives. 1882 * 1883 * FIXME: ATA_CMD_ID_ATA is optional for early drives and right 1884 * now we abort if we hit that case. 1885 * 1886 * LOCKING: 1887 * Kernel thread context (may sleep) 1888 * 1889 * RETURNS: 1890 * 0 on success, -errno otherwise. 1891 */ 1892 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class, 1893 unsigned int flags, u16 *id) 1894 { 1895 struct ata_port *ap = dev->link->ap; 1896 unsigned int class = *p_class; 1897 struct ata_taskfile tf; 1898 unsigned int err_mask = 0; 1899 const char *reason; 1900 int may_fallback = 1, tried_spinup = 0; 1901 int rc; 1902 1903 if (ata_msg_ctl(ap)) 1904 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__); 1905 1906 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */ 1907 retry: 1908 ata_tf_init(dev, &tf); 1909 1910 switch (class) { 1911 case ATA_DEV_ATA: 1912 tf.command = ATA_CMD_ID_ATA; 1913 break; 1914 case ATA_DEV_ATAPI: 1915 tf.command = ATA_CMD_ID_ATAPI; 1916 break; 1917 default: 1918 rc = -ENODEV; 1919 reason = "unsupported class"; 1920 goto err_out; 1921 } 1922 1923 tf.protocol = ATA_PROT_PIO; 1924 1925 /* Some devices choke if TF registers contain garbage. Make 1926 * sure those are properly initialized. 1927 */ 1928 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 1929 1930 /* Device presence detection is unreliable on some 1931 * controllers. Always poll IDENTIFY if available. 1932 */ 1933 tf.flags |= ATA_TFLAG_POLLING; 1934 1935 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE, 1936 id, sizeof(id[0]) * ATA_ID_WORDS, 0); 1937 if (err_mask) { 1938 if (err_mask & AC_ERR_NODEV_HINT) { 1939 DPRINTK("ata%u.%d: NODEV after polling detection\n", 1940 ap->print_id, dev->devno); 1941 return -ENOENT; 1942 } 1943 1944 /* Device or controller might have reported the wrong 1945 * device class. Give a shot at the other IDENTIFY if 1946 * the current one is aborted by the device. 1947 */ 1948 if (may_fallback && 1949 (err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) { 1950 may_fallback = 0; 1951 1952 if (class == ATA_DEV_ATA) 1953 class = ATA_DEV_ATAPI; 1954 else 1955 class = ATA_DEV_ATA; 1956 goto retry; 1957 } 1958 1959 rc = -EIO; 1960 reason = "I/O error"; 1961 goto err_out; 1962 } 1963 1964 /* Falling back doesn't make sense if ID data was read 1965 * successfully at least once. 1966 */ 1967 may_fallback = 0; 1968 1969 swap_buf_le16(id, ATA_ID_WORDS); 1970 1971 /* sanity check */ 1972 rc = -EINVAL; 1973 reason = "device reports invalid type"; 1974 1975 if (class == ATA_DEV_ATA) { 1976 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id)) 1977 goto err_out; 1978 } else { 1979 if (ata_id_is_ata(id)) 1980 goto err_out; 1981 } 1982 1983 if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) { 1984 tried_spinup = 1; 1985 /* 1986 * Drive powered-up in standby mode, and requires a specific 1987 * SET_FEATURES spin-up subcommand before it will accept 1988 * anything other than the original IDENTIFY command. 1989 */ 1990 err_mask = ata_dev_set_feature(dev, SETFEATURES_SPINUP, 0); 1991 if (err_mask && id[2] != 0x738c) { 1992 rc = -EIO; 1993 reason = "SPINUP failed"; 1994 goto err_out; 1995 } 1996 /* 1997 * If the drive initially returned incomplete IDENTIFY info, 1998 * we now must reissue the IDENTIFY command. 1999 */ 2000 if (id[2] == 0x37c8) 2001 goto retry; 2002 } 2003 2004 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) { 2005 /* 2006 * The exact sequence expected by certain pre-ATA4 drives is: 2007 * SRST RESET 2008 * IDENTIFY (optional in early ATA) 2009 * INITIALIZE DEVICE PARAMETERS (later IDE and ATA) 2010 * anything else.. 2011 * Some drives were very specific about that exact sequence. 2012 * 2013 * Note that ATA4 says lba is mandatory so the second check 2014 * shoud never trigger. 2015 */ 2016 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) { 2017 err_mask = ata_dev_init_params(dev, id[3], id[6]); 2018 if (err_mask) { 2019 rc = -EIO; 2020 reason = "INIT_DEV_PARAMS failed"; 2021 goto err_out; 2022 } 2023 2024 /* current CHS translation info (id[53-58]) might be 2025 * changed. reread the identify device info. 2026 */ 2027 flags &= ~ATA_READID_POSTRESET; 2028 goto retry; 2029 } 2030 } 2031 2032 *p_class = class; 2033 2034 return 0; 2035 2036 err_out: 2037 if (ata_msg_warn(ap)) 2038 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY " 2039 "(%s, err_mask=0x%x)\n", reason, err_mask); 2040 return rc; 2041 } 2042 2043 static inline u8 ata_dev_knobble(struct ata_device *dev) 2044 { 2045 struct ata_port *ap = dev->link->ap; 2046 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id))); 2047 } 2048 2049 static void ata_dev_config_ncq(struct ata_device *dev, 2050 char *desc, size_t desc_sz) 2051 { 2052 struct ata_port *ap = dev->link->ap; 2053 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id); 2054 2055 if (!ata_id_has_ncq(dev->id)) { 2056 desc[0] = '\0'; 2057 return; 2058 } 2059 if (dev->horkage & ATA_HORKAGE_NONCQ) { 2060 snprintf(desc, desc_sz, "NCQ (not used)"); 2061 return; 2062 } 2063 if (ap->flags & ATA_FLAG_NCQ) { 2064 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1); 2065 dev->flags |= ATA_DFLAG_NCQ; 2066 } 2067 2068 if (hdepth >= ddepth) 2069 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth); 2070 else 2071 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth); 2072 } 2073 2074 /** 2075 * ata_dev_configure - Configure the specified ATA/ATAPI device 2076 * @dev: Target device to configure 2077 * 2078 * Configure @dev according to @dev->id. Generic and low-level 2079 * driver specific fixups are also applied. 2080 * 2081 * LOCKING: 2082 * Kernel thread context (may sleep) 2083 * 2084 * RETURNS: 2085 * 0 on success, -errno otherwise 2086 */ 2087 int ata_dev_configure(struct ata_device *dev) 2088 { 2089 struct ata_port *ap = dev->link->ap; 2090 struct ata_eh_context *ehc = &dev->link->eh_context; 2091 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO; 2092 const u16 *id = dev->id; 2093 unsigned int xfer_mask; 2094 char revbuf[7]; /* XYZ-99\0 */ 2095 char fwrevbuf[ATA_ID_FW_REV_LEN+1]; 2096 char modelbuf[ATA_ID_PROD_LEN+1]; 2097 int rc; 2098 2099 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) { 2100 ata_dev_printk(dev, KERN_INFO, "%s: ENTER/EXIT -- nodev\n", 2101 __FUNCTION__); 2102 return 0; 2103 } 2104 2105 if (ata_msg_probe(ap)) 2106 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__); 2107 2108 /* set horkage */ 2109 dev->horkage |= ata_dev_blacklisted(dev); 2110 2111 /* let ACPI work its magic */ 2112 rc = ata_acpi_on_devcfg(dev); 2113 if (rc) 2114 return rc; 2115 2116 /* massage HPA, do it early as it might change IDENTIFY data */ 2117 rc = ata_hpa_resize(dev); 2118 if (rc) 2119 return rc; 2120 2121 /* print device capabilities */ 2122 if (ata_msg_probe(ap)) 2123 ata_dev_printk(dev, KERN_DEBUG, 2124 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x " 2125 "85:%04x 86:%04x 87:%04x 88:%04x\n", 2126 __FUNCTION__, 2127 id[49], id[82], id[83], id[84], 2128 id[85], id[86], id[87], id[88]); 2129 2130 /* initialize to-be-configured parameters */ 2131 dev->flags &= ~ATA_DFLAG_CFG_MASK; 2132 dev->max_sectors = 0; 2133 dev->cdb_len = 0; 2134 dev->n_sectors = 0; 2135 dev->cylinders = 0; 2136 dev->heads = 0; 2137 dev->sectors = 0; 2138 2139 /* 2140 * common ATA, ATAPI feature tests 2141 */ 2142 2143 /* find max transfer mode; for printk only */ 2144 xfer_mask = ata_id_xfermask(id); 2145 2146 if (ata_msg_probe(ap)) 2147 ata_dump_id(id); 2148 2149 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */ 2150 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV, 2151 sizeof(fwrevbuf)); 2152 2153 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD, 2154 sizeof(modelbuf)); 2155 2156 /* ATA-specific feature tests */ 2157 if (dev->class == ATA_DEV_ATA) { 2158 if (ata_id_is_cfa(id)) { 2159 if (id[162] & 1) /* CPRM may make this media unusable */ 2160 ata_dev_printk(dev, KERN_WARNING, 2161 "supports DRM functions and may " 2162 "not be fully accessable.\n"); 2163 snprintf(revbuf, 7, "CFA"); 2164 } else 2165 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id)); 2166 2167 dev->n_sectors = ata_id_n_sectors(id); 2168 2169 if (dev->id[59] & 0x100) 2170 dev->multi_count = dev->id[59] & 0xff; 2171 2172 if (ata_id_has_lba(id)) { 2173 const char *lba_desc; 2174 char ncq_desc[20]; 2175 2176 lba_desc = "LBA"; 2177 dev->flags |= ATA_DFLAG_LBA; 2178 if (ata_id_has_lba48(id)) { 2179 dev->flags |= ATA_DFLAG_LBA48; 2180 lba_desc = "LBA48"; 2181 2182 if (dev->n_sectors >= (1UL << 28) && 2183 ata_id_has_flush_ext(id)) 2184 dev->flags |= ATA_DFLAG_FLUSH_EXT; 2185 } 2186 2187 /* config NCQ */ 2188 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc)); 2189 2190 /* print device info to dmesg */ 2191 if (ata_msg_drv(ap) && print_info) { 2192 ata_dev_printk(dev, KERN_INFO, 2193 "%s: %s, %s, max %s\n", 2194 revbuf, modelbuf, fwrevbuf, 2195 ata_mode_string(xfer_mask)); 2196 ata_dev_printk(dev, KERN_INFO, 2197 "%Lu sectors, multi %u: %s %s\n", 2198 (unsigned long long)dev->n_sectors, 2199 dev->multi_count, lba_desc, ncq_desc); 2200 } 2201 } else { 2202 /* CHS */ 2203 2204 /* Default translation */ 2205 dev->cylinders = id[1]; 2206 dev->heads = id[3]; 2207 dev->sectors = id[6]; 2208 2209 if (ata_id_current_chs_valid(id)) { 2210 /* Current CHS translation is valid. */ 2211 dev->cylinders = id[54]; 2212 dev->heads = id[55]; 2213 dev->sectors = id[56]; 2214 } 2215 2216 /* print device info to dmesg */ 2217 if (ata_msg_drv(ap) && print_info) { 2218 ata_dev_printk(dev, KERN_INFO, 2219 "%s: %s, %s, max %s\n", 2220 revbuf, modelbuf, fwrevbuf, 2221 ata_mode_string(xfer_mask)); 2222 ata_dev_printk(dev, KERN_INFO, 2223 "%Lu sectors, multi %u, CHS %u/%u/%u\n", 2224 (unsigned long long)dev->n_sectors, 2225 dev->multi_count, dev->cylinders, 2226 dev->heads, dev->sectors); 2227 } 2228 } 2229 2230 dev->cdb_len = 16; 2231 } 2232 2233 /* ATAPI-specific feature tests */ 2234 else if (dev->class == ATA_DEV_ATAPI) { 2235 const char *cdb_intr_string = ""; 2236 const char *atapi_an_string = ""; 2237 u32 sntf; 2238 2239 rc = atapi_cdb_len(id); 2240 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { 2241 if (ata_msg_warn(ap)) 2242 ata_dev_printk(dev, KERN_WARNING, 2243 "unsupported CDB len\n"); 2244 rc = -EINVAL; 2245 goto err_out_nosup; 2246 } 2247 dev->cdb_len = (unsigned int) rc; 2248 2249 /* Enable ATAPI AN if both the host and device have 2250 * the support. If PMP is attached, SNTF is required 2251 * to enable ATAPI AN to discern between PHY status 2252 * changed notifications and ATAPI ANs. 2253 */ 2254 if ((ap->flags & ATA_FLAG_AN) && ata_id_has_atapi_AN(id) && 2255 (!ap->nr_pmp_links || 2256 sata_scr_read(&ap->link, SCR_NOTIFICATION, &sntf) == 0)) { 2257 unsigned int err_mask; 2258 2259 /* issue SET feature command to turn this on */ 2260 err_mask = ata_dev_set_feature(dev, 2261 SETFEATURES_SATA_ENABLE, SATA_AN); 2262 if (err_mask) 2263 ata_dev_printk(dev, KERN_ERR, 2264 "failed to enable ATAPI AN " 2265 "(err_mask=0x%x)\n", err_mask); 2266 else { 2267 dev->flags |= ATA_DFLAG_AN; 2268 atapi_an_string = ", ATAPI AN"; 2269 } 2270 } 2271 2272 if (ata_id_cdb_intr(dev->id)) { 2273 dev->flags |= ATA_DFLAG_CDB_INTR; 2274 cdb_intr_string = ", CDB intr"; 2275 } 2276 2277 /* print device info to dmesg */ 2278 if (ata_msg_drv(ap) && print_info) 2279 ata_dev_printk(dev, KERN_INFO, 2280 "ATAPI: %s, %s, max %s%s%s\n", 2281 modelbuf, fwrevbuf, 2282 ata_mode_string(xfer_mask), 2283 cdb_intr_string, atapi_an_string); 2284 } 2285 2286 /* determine max_sectors */ 2287 dev->max_sectors = ATA_MAX_SECTORS; 2288 if (dev->flags & ATA_DFLAG_LBA48) 2289 dev->max_sectors = ATA_MAX_SECTORS_LBA48; 2290 2291 if (!(dev->horkage & ATA_HORKAGE_IPM)) { 2292 if (ata_id_has_hipm(dev->id)) 2293 dev->flags |= ATA_DFLAG_HIPM; 2294 if (ata_id_has_dipm(dev->id)) 2295 dev->flags |= ATA_DFLAG_DIPM; 2296 } 2297 2298 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) { 2299 /* Let the user know. We don't want to disallow opens for 2300 rescue purposes, or in case the vendor is just a blithering 2301 idiot */ 2302 if (print_info) { 2303 ata_dev_printk(dev, KERN_WARNING, 2304 "Drive reports diagnostics failure. This may indicate a drive\n"); 2305 ata_dev_printk(dev, KERN_WARNING, 2306 "fault or invalid emulation. Contact drive vendor for information.\n"); 2307 } 2308 } 2309 2310 /* limit bridge transfers to udma5, 200 sectors */ 2311 if (ata_dev_knobble(dev)) { 2312 if (ata_msg_drv(ap) && print_info) 2313 ata_dev_printk(dev, KERN_INFO, 2314 "applying bridge limits\n"); 2315 dev->udma_mask &= ATA_UDMA5; 2316 dev->max_sectors = ATA_MAX_SECTORS; 2317 } 2318 2319 if ((dev->class == ATA_DEV_ATAPI) && 2320 (atapi_command_packet_set(id) == TYPE_TAPE)) { 2321 dev->max_sectors = ATA_MAX_SECTORS_TAPE; 2322 dev->horkage |= ATA_HORKAGE_STUCK_ERR; 2323 } 2324 2325 if (dev->horkage & ATA_HORKAGE_MAX_SEC_128) 2326 dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128, 2327 dev->max_sectors); 2328 2329 if (ata_dev_blacklisted(dev) & ATA_HORKAGE_IPM) { 2330 dev->horkage |= ATA_HORKAGE_IPM; 2331 2332 /* reset link pm_policy for this port to no pm */ 2333 ap->pm_policy = MAX_PERFORMANCE; 2334 } 2335 2336 if (ap->ops->dev_config) 2337 ap->ops->dev_config(dev); 2338 2339 if (ata_msg_probe(ap)) 2340 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n", 2341 __FUNCTION__, ata_chk_status(ap)); 2342 return 0; 2343 2344 err_out_nosup: 2345 if (ata_msg_probe(ap)) 2346 ata_dev_printk(dev, KERN_DEBUG, 2347 "%s: EXIT, err\n", __FUNCTION__); 2348 return rc; 2349 } 2350 2351 /** 2352 * ata_cable_40wire - return 40 wire cable type 2353 * @ap: port 2354 * 2355 * Helper method for drivers which want to hardwire 40 wire cable 2356 * detection. 2357 */ 2358 2359 int ata_cable_40wire(struct ata_port *ap) 2360 { 2361 return ATA_CBL_PATA40; 2362 } 2363 2364 /** 2365 * ata_cable_80wire - return 80 wire cable type 2366 * @ap: port 2367 * 2368 * Helper method for drivers which want to hardwire 80 wire cable 2369 * detection. 2370 */ 2371 2372 int ata_cable_80wire(struct ata_port *ap) 2373 { 2374 return ATA_CBL_PATA80; 2375 } 2376 2377 /** 2378 * ata_cable_unknown - return unknown PATA cable. 2379 * @ap: port 2380 * 2381 * Helper method for drivers which have no PATA cable detection. 2382 */ 2383 2384 int ata_cable_unknown(struct ata_port *ap) 2385 { 2386 return ATA_CBL_PATA_UNK; 2387 } 2388 2389 /** 2390 * ata_cable_sata - return SATA cable type 2391 * @ap: port 2392 * 2393 * Helper method for drivers which have SATA cables 2394 */ 2395 2396 int ata_cable_sata(struct ata_port *ap) 2397 { 2398 return ATA_CBL_SATA; 2399 } 2400 2401 /** 2402 * ata_bus_probe - Reset and probe ATA bus 2403 * @ap: Bus to probe 2404 * 2405 * Master ATA bus probing function. Initiates a hardware-dependent 2406 * bus reset, then attempts to identify any devices found on 2407 * the bus. 2408 * 2409 * LOCKING: 2410 * PCI/etc. bus probe sem. 2411 * 2412 * RETURNS: 2413 * Zero on success, negative errno otherwise. 2414 */ 2415 2416 int ata_bus_probe(struct ata_port *ap) 2417 { 2418 unsigned int classes[ATA_MAX_DEVICES]; 2419 int tries[ATA_MAX_DEVICES]; 2420 int rc; 2421 struct ata_device *dev; 2422 2423 ata_port_probe(ap); 2424 2425 ata_link_for_each_dev(dev, &ap->link) 2426 tries[dev->devno] = ATA_PROBE_MAX_TRIES; 2427 2428 retry: 2429 ata_link_for_each_dev(dev, &ap->link) { 2430 /* If we issue an SRST then an ATA drive (not ATAPI) 2431 * may change configuration and be in PIO0 timing. If 2432 * we do a hard reset (or are coming from power on) 2433 * this is true for ATA or ATAPI. Until we've set a 2434 * suitable controller mode we should not touch the 2435 * bus as we may be talking too fast. 2436 */ 2437 dev->pio_mode = XFER_PIO_0; 2438 2439 /* If the controller has a pio mode setup function 2440 * then use it to set the chipset to rights. Don't 2441 * touch the DMA setup as that will be dealt with when 2442 * configuring devices. 2443 */ 2444 if (ap->ops->set_piomode) 2445 ap->ops->set_piomode(ap, dev); 2446 } 2447 2448 /* reset and determine device classes */ 2449 ap->ops->phy_reset(ap); 2450 2451 ata_link_for_each_dev(dev, &ap->link) { 2452 if (!(ap->flags & ATA_FLAG_DISABLED) && 2453 dev->class != ATA_DEV_UNKNOWN) 2454 classes[dev->devno] = dev->class; 2455 else 2456 classes[dev->devno] = ATA_DEV_NONE; 2457 2458 dev->class = ATA_DEV_UNKNOWN; 2459 } 2460 2461 ata_port_probe(ap); 2462 2463 /* read IDENTIFY page and configure devices. We have to do the identify 2464 specific sequence bass-ackwards so that PDIAG- is released by 2465 the slave device */ 2466 2467 ata_link_for_each_dev(dev, &ap->link) { 2468 if (tries[dev->devno]) 2469 dev->class = classes[dev->devno]; 2470 2471 if (!ata_dev_enabled(dev)) 2472 continue; 2473 2474 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET, 2475 dev->id); 2476 if (rc) 2477 goto fail; 2478 } 2479 2480 /* Now ask for the cable type as PDIAG- should have been released */ 2481 if (ap->ops->cable_detect) 2482 ap->cbl = ap->ops->cable_detect(ap); 2483 2484 /* We may have SATA bridge glue hiding here irrespective of the 2485 reported cable types and sensed types */ 2486 ata_link_for_each_dev(dev, &ap->link) { 2487 if (!ata_dev_enabled(dev)) 2488 continue; 2489 /* SATA drives indicate we have a bridge. We don't know which 2490 end of the link the bridge is which is a problem */ 2491 if (ata_id_is_sata(dev->id)) 2492 ap->cbl = ATA_CBL_SATA; 2493 } 2494 2495 /* After the identify sequence we can now set up the devices. We do 2496 this in the normal order so that the user doesn't get confused */ 2497 2498 ata_link_for_each_dev(dev, &ap->link) { 2499 if (!ata_dev_enabled(dev)) 2500 continue; 2501 2502 ap->link.eh_context.i.flags |= ATA_EHI_PRINTINFO; 2503 rc = ata_dev_configure(dev); 2504 ap->link.eh_context.i.flags &= ~ATA_EHI_PRINTINFO; 2505 if (rc) 2506 goto fail; 2507 } 2508 2509 /* configure transfer mode */ 2510 rc = ata_set_mode(&ap->link, &dev); 2511 if (rc) 2512 goto fail; 2513 2514 ata_link_for_each_dev(dev, &ap->link) 2515 if (ata_dev_enabled(dev)) 2516 return 0; 2517 2518 /* no device present, disable port */ 2519 ata_port_disable(ap); 2520 return -ENODEV; 2521 2522 fail: 2523 tries[dev->devno]--; 2524 2525 switch (rc) { 2526 case -EINVAL: 2527 /* eeek, something went very wrong, give up */ 2528 tries[dev->devno] = 0; 2529 break; 2530 2531 case -ENODEV: 2532 /* give it just one more chance */ 2533 tries[dev->devno] = min(tries[dev->devno], 1); 2534 case -EIO: 2535 if (tries[dev->devno] == 1) { 2536 /* This is the last chance, better to slow 2537 * down than lose it. 2538 */ 2539 sata_down_spd_limit(&ap->link); 2540 ata_down_xfermask_limit(dev, ATA_DNXFER_PIO); 2541 } 2542 } 2543 2544 if (!tries[dev->devno]) 2545 ata_dev_disable(dev); 2546 2547 goto retry; 2548 } 2549 2550 /** 2551 * ata_port_probe - Mark port as enabled 2552 * @ap: Port for which we indicate enablement 2553 * 2554 * Modify @ap data structure such that the system 2555 * thinks that the entire port is enabled. 2556 * 2557 * LOCKING: host lock, or some other form of 2558 * serialization. 2559 */ 2560 2561 void ata_port_probe(struct ata_port *ap) 2562 { 2563 ap->flags &= ~ATA_FLAG_DISABLED; 2564 } 2565 2566 /** 2567 * sata_print_link_status - Print SATA link status 2568 * @link: SATA link to printk link status about 2569 * 2570 * This function prints link speed and status of a SATA link. 2571 * 2572 * LOCKING: 2573 * None. 2574 */ 2575 void sata_print_link_status(struct ata_link *link) 2576 { 2577 u32 sstatus, scontrol, tmp; 2578 2579 if (sata_scr_read(link, SCR_STATUS, &sstatus)) 2580 return; 2581 sata_scr_read(link, SCR_CONTROL, &scontrol); 2582 2583 if (ata_link_online(link)) { 2584 tmp = (sstatus >> 4) & 0xf; 2585 ata_link_printk(link, KERN_INFO, 2586 "SATA link up %s (SStatus %X SControl %X)\n", 2587 sata_spd_string(tmp), sstatus, scontrol); 2588 } else { 2589 ata_link_printk(link, KERN_INFO, 2590 "SATA link down (SStatus %X SControl %X)\n", 2591 sstatus, scontrol); 2592 } 2593 } 2594 2595 /** 2596 * ata_dev_pair - return other device on cable 2597 * @adev: device 2598 * 2599 * Obtain the other device on the same cable, or if none is 2600 * present NULL is returned 2601 */ 2602 2603 struct ata_device *ata_dev_pair(struct ata_device *adev) 2604 { 2605 struct ata_link *link = adev->link; 2606 struct ata_device *pair = &link->device[1 - adev->devno]; 2607 if (!ata_dev_enabled(pair)) 2608 return NULL; 2609 return pair; 2610 } 2611 2612 /** 2613 * ata_port_disable - Disable port. 2614 * @ap: Port to be disabled. 2615 * 2616 * Modify @ap data structure such that the system 2617 * thinks that the entire port is disabled, and should 2618 * never attempt to probe or communicate with devices 2619 * on this port. 2620 * 2621 * LOCKING: host lock, or some other form of 2622 * serialization. 2623 */ 2624 2625 void ata_port_disable(struct ata_port *ap) 2626 { 2627 ap->link.device[0].class = ATA_DEV_NONE; 2628 ap->link.device[1].class = ATA_DEV_NONE; 2629 ap->flags |= ATA_FLAG_DISABLED; 2630 } 2631 2632 /** 2633 * sata_down_spd_limit - adjust SATA spd limit downward 2634 * @link: Link to adjust SATA spd limit for 2635 * 2636 * Adjust SATA spd limit of @link downward. Note that this 2637 * function only adjusts the limit. The change must be applied 2638 * using sata_set_spd(). 2639 * 2640 * LOCKING: 2641 * Inherited from caller. 2642 * 2643 * RETURNS: 2644 * 0 on success, negative errno on failure 2645 */ 2646 int sata_down_spd_limit(struct ata_link *link) 2647 { 2648 u32 sstatus, spd, mask; 2649 int rc, highbit; 2650 2651 if (!sata_scr_valid(link)) 2652 return -EOPNOTSUPP; 2653 2654 /* If SCR can be read, use it to determine the current SPD. 2655 * If not, use cached value in link->sata_spd. 2656 */ 2657 rc = sata_scr_read(link, SCR_STATUS, &sstatus); 2658 if (rc == 0) 2659 spd = (sstatus >> 4) & 0xf; 2660 else 2661 spd = link->sata_spd; 2662 2663 mask = link->sata_spd_limit; 2664 if (mask <= 1) 2665 return -EINVAL; 2666 2667 /* unconditionally mask off the highest bit */ 2668 highbit = fls(mask) - 1; 2669 mask &= ~(1 << highbit); 2670 2671 /* Mask off all speeds higher than or equal to the current 2672 * one. Force 1.5Gbps if current SPD is not available. 2673 */ 2674 if (spd > 1) 2675 mask &= (1 << (spd - 1)) - 1; 2676 else 2677 mask &= 1; 2678 2679 /* were we already at the bottom? */ 2680 if (!mask) 2681 return -EINVAL; 2682 2683 link->sata_spd_limit = mask; 2684 2685 ata_link_printk(link, KERN_WARNING, "limiting SATA link speed to %s\n", 2686 sata_spd_string(fls(mask))); 2687 2688 return 0; 2689 } 2690 2691 static int __sata_set_spd_needed(struct ata_link *link, u32 *scontrol) 2692 { 2693 struct ata_link *host_link = &link->ap->link; 2694 u32 limit, target, spd; 2695 2696 limit = link->sata_spd_limit; 2697 2698 /* Don't configure downstream link faster than upstream link. 2699 * It doesn't speed up anything and some PMPs choke on such 2700 * configuration. 2701 */ 2702 if (!ata_is_host_link(link) && host_link->sata_spd) 2703 limit &= (1 << host_link->sata_spd) - 1; 2704 2705 if (limit == UINT_MAX) 2706 target = 0; 2707 else 2708 target = fls(limit); 2709 2710 spd = (*scontrol >> 4) & 0xf; 2711 *scontrol = (*scontrol & ~0xf0) | ((target & 0xf) << 4); 2712 2713 return spd != target; 2714 } 2715 2716 /** 2717 * sata_set_spd_needed - is SATA spd configuration needed 2718 * @link: Link in question 2719 * 2720 * Test whether the spd limit in SControl matches 2721 * @link->sata_spd_limit. This function is used to determine 2722 * whether hardreset is necessary to apply SATA spd 2723 * configuration. 2724 * 2725 * LOCKING: 2726 * Inherited from caller. 2727 * 2728 * RETURNS: 2729 * 1 if SATA spd configuration is needed, 0 otherwise. 2730 */ 2731 int sata_set_spd_needed(struct ata_link *link) 2732 { 2733 u32 scontrol; 2734 2735 if (sata_scr_read(link, SCR_CONTROL, &scontrol)) 2736 return 1; 2737 2738 return __sata_set_spd_needed(link, &scontrol); 2739 } 2740 2741 /** 2742 * sata_set_spd - set SATA spd according to spd limit 2743 * @link: Link to set SATA spd for 2744 * 2745 * Set SATA spd of @link according to sata_spd_limit. 2746 * 2747 * LOCKING: 2748 * Inherited from caller. 2749 * 2750 * RETURNS: 2751 * 0 if spd doesn't need to be changed, 1 if spd has been 2752 * changed. Negative errno if SCR registers are inaccessible. 2753 */ 2754 int sata_set_spd(struct ata_link *link) 2755 { 2756 u32 scontrol; 2757 int rc; 2758 2759 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) 2760 return rc; 2761 2762 if (!__sata_set_spd_needed(link, &scontrol)) 2763 return 0; 2764 2765 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol))) 2766 return rc; 2767 2768 return 1; 2769 } 2770 2771 /* 2772 * This mode timing computation functionality is ported over from 2773 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik 2774 */ 2775 /* 2776 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds). 2777 * These were taken from ATA/ATAPI-6 standard, rev 0a, except 2778 * for UDMA6, which is currently supported only by Maxtor drives. 2779 * 2780 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0. 2781 */ 2782 2783 static const struct ata_timing ata_timing[] = { 2784 2785 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 }, 2786 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 }, 2787 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 }, 2788 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 }, 2789 2790 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 }, 2791 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 }, 2792 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 }, 2793 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 }, 2794 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 }, 2795 2796 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */ 2797 2798 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 }, 2799 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 }, 2800 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 }, 2801 2802 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 }, 2803 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 }, 2804 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 }, 2805 2806 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 }, 2807 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 }, 2808 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 }, 2809 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 }, 2810 2811 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 }, 2812 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 }, 2813 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 }, 2814 2815 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */ 2816 2817 { 0xFF } 2818 }; 2819 2820 #define ENOUGH(v, unit) (((v)-1)/(unit)+1) 2821 #define EZ(v, unit) ((v)?ENOUGH(v, unit):0) 2822 2823 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT) 2824 { 2825 q->setup = EZ(t->setup * 1000, T); 2826 q->act8b = EZ(t->act8b * 1000, T); 2827 q->rec8b = EZ(t->rec8b * 1000, T); 2828 q->cyc8b = EZ(t->cyc8b * 1000, T); 2829 q->active = EZ(t->active * 1000, T); 2830 q->recover = EZ(t->recover * 1000, T); 2831 q->cycle = EZ(t->cycle * 1000, T); 2832 q->udma = EZ(t->udma * 1000, UT); 2833 } 2834 2835 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b, 2836 struct ata_timing *m, unsigned int what) 2837 { 2838 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup); 2839 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b); 2840 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b); 2841 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b); 2842 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active); 2843 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover); 2844 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle); 2845 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma); 2846 } 2847 2848 static const struct ata_timing *ata_timing_find_mode(unsigned short speed) 2849 { 2850 const struct ata_timing *t; 2851 2852 for (t = ata_timing; t->mode != speed; t++) 2853 if (t->mode == 0xFF) 2854 return NULL; 2855 return t; 2856 } 2857 2858 int ata_timing_compute(struct ata_device *adev, unsigned short speed, 2859 struct ata_timing *t, int T, int UT) 2860 { 2861 const struct ata_timing *s; 2862 struct ata_timing p; 2863 2864 /* 2865 * Find the mode. 2866 */ 2867 2868 if (!(s = ata_timing_find_mode(speed))) 2869 return -EINVAL; 2870 2871 memcpy(t, s, sizeof(*s)); 2872 2873 /* 2874 * If the drive is an EIDE drive, it can tell us it needs extended 2875 * PIO/MW_DMA cycle timing. 2876 */ 2877 2878 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ 2879 memset(&p, 0, sizeof(p)); 2880 if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) { 2881 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO]; 2882 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY]; 2883 } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) { 2884 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN]; 2885 } 2886 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B); 2887 } 2888 2889 /* 2890 * Convert the timing to bus clock counts. 2891 */ 2892 2893 ata_timing_quantize(t, t, T, UT); 2894 2895 /* 2896 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, 2897 * S.M.A.R.T * and some other commands. We have to ensure that the 2898 * DMA cycle timing is slower/equal than the fastest PIO timing. 2899 */ 2900 2901 if (speed > XFER_PIO_6) { 2902 ata_timing_compute(adev, adev->pio_mode, &p, T, UT); 2903 ata_timing_merge(&p, t, t, ATA_TIMING_ALL); 2904 } 2905 2906 /* 2907 * Lengthen active & recovery time so that cycle time is correct. 2908 */ 2909 2910 if (t->act8b + t->rec8b < t->cyc8b) { 2911 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; 2912 t->rec8b = t->cyc8b - t->act8b; 2913 } 2914 2915 if (t->active + t->recover < t->cycle) { 2916 t->active += (t->cycle - (t->active + t->recover)) / 2; 2917 t->recover = t->cycle - t->active; 2918 } 2919 2920 /* In a few cases quantisation may produce enough errors to 2921 leave t->cycle too low for the sum of active and recovery 2922 if so we must correct this */ 2923 if (t->active + t->recover > t->cycle) 2924 t->cycle = t->active + t->recover; 2925 2926 return 0; 2927 } 2928 2929 /** 2930 * ata_down_xfermask_limit - adjust dev xfer masks downward 2931 * @dev: Device to adjust xfer masks 2932 * @sel: ATA_DNXFER_* selector 2933 * 2934 * Adjust xfer masks of @dev downward. Note that this function 2935 * does not apply the change. Invoking ata_set_mode() afterwards 2936 * will apply the limit. 2937 * 2938 * LOCKING: 2939 * Inherited from caller. 2940 * 2941 * RETURNS: 2942 * 0 on success, negative errno on failure 2943 */ 2944 int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel) 2945 { 2946 char buf[32]; 2947 unsigned int orig_mask, xfer_mask; 2948 unsigned int pio_mask, mwdma_mask, udma_mask; 2949 int quiet, highbit; 2950 2951 quiet = !!(sel & ATA_DNXFER_QUIET); 2952 sel &= ~ATA_DNXFER_QUIET; 2953 2954 xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask, 2955 dev->mwdma_mask, 2956 dev->udma_mask); 2957 ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask); 2958 2959 switch (sel) { 2960 case ATA_DNXFER_PIO: 2961 highbit = fls(pio_mask) - 1; 2962 pio_mask &= ~(1 << highbit); 2963 break; 2964 2965 case ATA_DNXFER_DMA: 2966 if (udma_mask) { 2967 highbit = fls(udma_mask) - 1; 2968 udma_mask &= ~(1 << highbit); 2969 if (!udma_mask) 2970 return -ENOENT; 2971 } else if (mwdma_mask) { 2972 highbit = fls(mwdma_mask) - 1; 2973 mwdma_mask &= ~(1 << highbit); 2974 if (!mwdma_mask) 2975 return -ENOENT; 2976 } 2977 break; 2978 2979 case ATA_DNXFER_40C: 2980 udma_mask &= ATA_UDMA_MASK_40C; 2981 break; 2982 2983 case ATA_DNXFER_FORCE_PIO0: 2984 pio_mask &= 1; 2985 case ATA_DNXFER_FORCE_PIO: 2986 mwdma_mask = 0; 2987 udma_mask = 0; 2988 break; 2989 2990 default: 2991 BUG(); 2992 } 2993 2994 xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); 2995 2996 if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask) 2997 return -ENOENT; 2998 2999 if (!quiet) { 3000 if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA)) 3001 snprintf(buf, sizeof(buf), "%s:%s", 3002 ata_mode_string(xfer_mask), 3003 ata_mode_string(xfer_mask & ATA_MASK_PIO)); 3004 else 3005 snprintf(buf, sizeof(buf), "%s", 3006 ata_mode_string(xfer_mask)); 3007 3008 ata_dev_printk(dev, KERN_WARNING, 3009 "limiting speed to %s\n", buf); 3010 } 3011 3012 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask, 3013 &dev->udma_mask); 3014 3015 return 0; 3016 } 3017 3018 static int ata_dev_set_mode(struct ata_device *dev) 3019 { 3020 struct ata_eh_context *ehc = &dev->link->eh_context; 3021 unsigned int err_mask; 3022 int rc; 3023 3024 dev->flags &= ~ATA_DFLAG_PIO; 3025 if (dev->xfer_shift == ATA_SHIFT_PIO) 3026 dev->flags |= ATA_DFLAG_PIO; 3027 3028 err_mask = ata_dev_set_xfermode(dev); 3029 3030 /* Old CFA may refuse this command, which is just fine */ 3031 if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id)) 3032 err_mask &= ~AC_ERR_DEV; 3033 3034 /* Some very old devices and some bad newer ones fail any kind of 3035 SET_XFERMODE request but support PIO0-2 timings and no IORDY */ 3036 if (dev->xfer_shift == ATA_SHIFT_PIO && !ata_id_has_iordy(dev->id) && 3037 dev->pio_mode <= XFER_PIO_2) 3038 err_mask &= ~AC_ERR_DEV; 3039 3040 /* Early MWDMA devices do DMA but don't allow DMA mode setting. 3041 Don't fail an MWDMA0 set IFF the device indicates it is in MWDMA0 */ 3042 if (dev->xfer_shift == ATA_SHIFT_MWDMA && 3043 dev->dma_mode == XFER_MW_DMA_0 && 3044 (dev->id[63] >> 8) & 1) 3045 err_mask &= ~AC_ERR_DEV; 3046 3047 if (err_mask) { 3048 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode " 3049 "(err_mask=0x%x)\n", err_mask); 3050 return -EIO; 3051 } 3052 3053 ehc->i.flags |= ATA_EHI_POST_SETMODE; 3054 rc = ata_dev_revalidate(dev, ATA_DEV_UNKNOWN, 0); 3055 ehc->i.flags &= ~ATA_EHI_POST_SETMODE; 3056 if (rc) 3057 return rc; 3058 3059 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n", 3060 dev->xfer_shift, (int)dev->xfer_mode); 3061 3062 ata_dev_printk(dev, KERN_INFO, "configured for %s\n", 3063 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode))); 3064 return 0; 3065 } 3066 3067 /** 3068 * ata_do_set_mode - Program timings and issue SET FEATURES - XFER 3069 * @link: link on which timings will be programmed 3070 * @r_failed_dev: out paramter for failed device 3071 * 3072 * Standard implementation of the function used to tune and set 3073 * ATA device disk transfer mode (PIO3, UDMA6, etc.). If 3074 * ata_dev_set_mode() fails, pointer to the failing device is 3075 * returned in @r_failed_dev. 3076 * 3077 * LOCKING: 3078 * PCI/etc. bus probe sem. 3079 * 3080 * RETURNS: 3081 * 0 on success, negative errno otherwise 3082 */ 3083 3084 int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev) 3085 { 3086 struct ata_port *ap = link->ap; 3087 struct ata_device *dev; 3088 int rc = 0, used_dma = 0, found = 0; 3089 3090 /* step 1: calculate xfer_mask */ 3091 ata_link_for_each_dev(dev, link) { 3092 unsigned int pio_mask, dma_mask; 3093 unsigned int mode_mask; 3094 3095 if (!ata_dev_enabled(dev)) 3096 continue; 3097 3098 mode_mask = ATA_DMA_MASK_ATA; 3099 if (dev->class == ATA_DEV_ATAPI) 3100 mode_mask = ATA_DMA_MASK_ATAPI; 3101 else if (ata_id_is_cfa(dev->id)) 3102 mode_mask = ATA_DMA_MASK_CFA; 3103 3104 ata_dev_xfermask(dev); 3105 3106 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0); 3107 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask); 3108 3109 if (libata_dma_mask & mode_mask) 3110 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask); 3111 else 3112 dma_mask = 0; 3113 3114 dev->pio_mode = ata_xfer_mask2mode(pio_mask); 3115 dev->dma_mode = ata_xfer_mask2mode(dma_mask); 3116 3117 found = 1; 3118 if (dev->dma_mode) 3119 used_dma = 1; 3120 } 3121 if (!found) 3122 goto out; 3123 3124 /* step 2: always set host PIO timings */ 3125 ata_link_for_each_dev(dev, link) { 3126 if (!ata_dev_enabled(dev)) 3127 continue; 3128 3129 if (!dev->pio_mode) { 3130 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n"); 3131 rc = -EINVAL; 3132 goto out; 3133 } 3134 3135 dev->xfer_mode = dev->pio_mode; 3136 dev->xfer_shift = ATA_SHIFT_PIO; 3137 if (ap->ops->set_piomode) 3138 ap->ops->set_piomode(ap, dev); 3139 } 3140 3141 /* step 3: set host DMA timings */ 3142 ata_link_for_each_dev(dev, link) { 3143 if (!ata_dev_enabled(dev) || !dev->dma_mode) 3144 continue; 3145 3146 dev->xfer_mode = dev->dma_mode; 3147 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode); 3148 if (ap->ops->set_dmamode) 3149 ap->ops->set_dmamode(ap, dev); 3150 } 3151 3152 /* step 4: update devices' xfer mode */ 3153 ata_link_for_each_dev(dev, link) { 3154 /* don't update suspended devices' xfer mode */ 3155 if (!ata_dev_enabled(dev)) 3156 continue; 3157 3158 rc = ata_dev_set_mode(dev); 3159 if (rc) 3160 goto out; 3161 } 3162 3163 /* Record simplex status. If we selected DMA then the other 3164 * host channels are not permitted to do so. 3165 */ 3166 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX)) 3167 ap->host->simplex_claimed = ap; 3168 3169 out: 3170 if (rc) 3171 *r_failed_dev = dev; 3172 return rc; 3173 } 3174 3175 /** 3176 * ata_set_mode - Program timings and issue SET FEATURES - XFER 3177 * @link: link on which timings will be programmed 3178 * @r_failed_dev: out paramter for failed device 3179 * 3180 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If 3181 * ata_set_mode() fails, pointer to the failing device is 3182 * returned in @r_failed_dev. 3183 * 3184 * LOCKING: 3185 * PCI/etc. bus probe sem. 3186 * 3187 * RETURNS: 3188 * 0 on success, negative errno otherwise 3189 */ 3190 int ata_set_mode(struct ata_link *link, struct ata_device **r_failed_dev) 3191 { 3192 struct ata_port *ap = link->ap; 3193 3194 /* has private set_mode? */ 3195 if (ap->ops->set_mode) 3196 return ap->ops->set_mode(link, r_failed_dev); 3197 return ata_do_set_mode(link, r_failed_dev); 3198 } 3199 3200 /** 3201 * ata_tf_to_host - issue ATA taskfile to host controller 3202 * @ap: port to which command is being issued 3203 * @tf: ATA taskfile register set 3204 * 3205 * Issues ATA taskfile register set to ATA host controller, 3206 * with proper synchronization with interrupt handler and 3207 * other threads. 3208 * 3209 * LOCKING: 3210 * spin_lock_irqsave(host lock) 3211 */ 3212 3213 static inline void ata_tf_to_host(struct ata_port *ap, 3214 const struct ata_taskfile *tf) 3215 { 3216 ap->ops->tf_load(ap, tf); 3217 ap->ops->exec_command(ap, tf); 3218 } 3219 3220 /** 3221 * ata_busy_sleep - sleep until BSY clears, or timeout 3222 * @ap: port containing status register to be polled 3223 * @tmout_pat: impatience timeout 3224 * @tmout: overall timeout 3225 * 3226 * Sleep until ATA Status register bit BSY clears, 3227 * or a timeout occurs. 3228 * 3229 * LOCKING: 3230 * Kernel thread context (may sleep). 3231 * 3232 * RETURNS: 3233 * 0 on success, -errno otherwise. 3234 */ 3235 int ata_busy_sleep(struct ata_port *ap, 3236 unsigned long tmout_pat, unsigned long tmout) 3237 { 3238 unsigned long timer_start, timeout; 3239 u8 status; 3240 3241 status = ata_busy_wait(ap, ATA_BUSY, 300); 3242 timer_start = jiffies; 3243 timeout = timer_start + tmout_pat; 3244 while (status != 0xff && (status & ATA_BUSY) && 3245 time_before(jiffies, timeout)) { 3246 msleep(50); 3247 status = ata_busy_wait(ap, ATA_BUSY, 3); 3248 } 3249 3250 if (status != 0xff && (status & ATA_BUSY)) 3251 ata_port_printk(ap, KERN_WARNING, 3252 "port is slow to respond, please be patient " 3253 "(Status 0x%x)\n", status); 3254 3255 timeout = timer_start + tmout; 3256 while (status != 0xff && (status & ATA_BUSY) && 3257 time_before(jiffies, timeout)) { 3258 msleep(50); 3259 status = ata_chk_status(ap); 3260 } 3261 3262 if (status == 0xff) 3263 return -ENODEV; 3264 3265 if (status & ATA_BUSY) { 3266 ata_port_printk(ap, KERN_ERR, "port failed to respond " 3267 "(%lu secs, Status 0x%x)\n", 3268 tmout / HZ, status); 3269 return -EBUSY; 3270 } 3271 3272 return 0; 3273 } 3274 3275 /** 3276 * ata_wait_after_reset - wait before checking status after reset 3277 * @ap: port containing status register to be polled 3278 * @deadline: deadline jiffies for the operation 3279 * 3280 * After reset, we need to pause a while before reading status. 3281 * Also, certain combination of controller and device report 0xff 3282 * for some duration (e.g. until SATA PHY is up and running) 3283 * which is interpreted as empty port in ATA world. This 3284 * function also waits for such devices to get out of 0xff 3285 * status. 3286 * 3287 * LOCKING: 3288 * Kernel thread context (may sleep). 3289 */ 3290 void ata_wait_after_reset(struct ata_port *ap, unsigned long deadline) 3291 { 3292 unsigned long until = jiffies + ATA_TMOUT_FF_WAIT; 3293 3294 if (time_before(until, deadline)) 3295 deadline = until; 3296 3297 /* Spec mandates ">= 2ms" before checking status. We wait 3298 * 150ms, because that was the magic delay used for ATAPI 3299 * devices in Hale Landis's ATADRVR, for the period of time 3300 * between when the ATA command register is written, and then 3301 * status is checked. Because waiting for "a while" before 3302 * checking status is fine, post SRST, we perform this magic 3303 * delay here as well. 3304 * 3305 * Old drivers/ide uses the 2mS rule and then waits for ready. 3306 */ 3307 msleep(150); 3308 3309 /* Wait for 0xff to clear. Some SATA devices take a long time 3310 * to clear 0xff after reset. For example, HHD424020F7SV00 3311 * iVDR needs >= 800ms while. Quantum GoVault needs even more 3312 * than that. 3313 * 3314 * Note that some PATA controllers (pata_ali) explode if 3315 * status register is read more than once when there's no 3316 * device attached. 3317 */ 3318 if (ap->flags & ATA_FLAG_SATA) { 3319 while (1) { 3320 u8 status = ata_chk_status(ap); 3321 3322 if (status != 0xff || time_after(jiffies, deadline)) 3323 return; 3324 3325 msleep(50); 3326 } 3327 } 3328 } 3329 3330 /** 3331 * ata_wait_ready - sleep until BSY clears, or timeout 3332 * @ap: port containing status register to be polled 3333 * @deadline: deadline jiffies for the operation 3334 * 3335 * Sleep until ATA Status register bit BSY clears, or timeout 3336 * occurs. 3337 * 3338 * LOCKING: 3339 * Kernel thread context (may sleep). 3340 * 3341 * RETURNS: 3342 * 0 on success, -errno otherwise. 3343 */ 3344 int ata_wait_ready(struct ata_port *ap, unsigned long deadline) 3345 { 3346 unsigned long start = jiffies; 3347 int warned = 0; 3348 3349 while (1) { 3350 u8 status = ata_chk_status(ap); 3351 unsigned long now = jiffies; 3352 3353 if (!(status & ATA_BUSY)) 3354 return 0; 3355 if (!ata_link_online(&ap->link) && status == 0xff) 3356 return -ENODEV; 3357 if (time_after(now, deadline)) 3358 return -EBUSY; 3359 3360 if (!warned && time_after(now, start + 5 * HZ) && 3361 (deadline - now > 3 * HZ)) { 3362 ata_port_printk(ap, KERN_WARNING, 3363 "port is slow to respond, please be patient " 3364 "(Status 0x%x)\n", status); 3365 warned = 1; 3366 } 3367 3368 msleep(50); 3369 } 3370 } 3371 3372 static int ata_bus_post_reset(struct ata_port *ap, unsigned int devmask, 3373 unsigned long deadline) 3374 { 3375 struct ata_ioports *ioaddr = &ap->ioaddr; 3376 unsigned int dev0 = devmask & (1 << 0); 3377 unsigned int dev1 = devmask & (1 << 1); 3378 int rc, ret = 0; 3379 3380 /* if device 0 was found in ata_devchk, wait for its 3381 * BSY bit to clear 3382 */ 3383 if (dev0) { 3384 rc = ata_wait_ready(ap, deadline); 3385 if (rc) { 3386 if (rc != -ENODEV) 3387 return rc; 3388 ret = rc; 3389 } 3390 } 3391 3392 /* if device 1 was found in ata_devchk, wait for register 3393 * access briefly, then wait for BSY to clear. 3394 */ 3395 if (dev1) { 3396 int i; 3397 3398 ap->ops->dev_select(ap, 1); 3399 3400 /* Wait for register access. Some ATAPI devices fail 3401 * to set nsect/lbal after reset, so don't waste too 3402 * much time on it. We're gonna wait for !BSY anyway. 3403 */ 3404 for (i = 0; i < 2; i++) { 3405 u8 nsect, lbal; 3406 3407 nsect = ioread8(ioaddr->nsect_addr); 3408 lbal = ioread8(ioaddr->lbal_addr); 3409 if ((nsect == 1) && (lbal == 1)) 3410 break; 3411 msleep(50); /* give drive a breather */ 3412 } 3413 3414 rc = ata_wait_ready(ap, deadline); 3415 if (rc) { 3416 if (rc != -ENODEV) 3417 return rc; 3418 ret = rc; 3419 } 3420 } 3421 3422 /* is all this really necessary? */ 3423 ap->ops->dev_select(ap, 0); 3424 if (dev1) 3425 ap->ops->dev_select(ap, 1); 3426 if (dev0) 3427 ap->ops->dev_select(ap, 0); 3428 3429 return ret; 3430 } 3431 3432 static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask, 3433 unsigned long deadline) 3434 { 3435 struct ata_ioports *ioaddr = &ap->ioaddr; 3436 3437 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id); 3438 3439 /* software reset. causes dev0 to be selected */ 3440 iowrite8(ap->ctl, ioaddr->ctl_addr); 3441 udelay(20); /* FIXME: flush */ 3442 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr); 3443 udelay(20); /* FIXME: flush */ 3444 iowrite8(ap->ctl, ioaddr->ctl_addr); 3445 3446 /* wait a while before checking status */ 3447 ata_wait_after_reset(ap, deadline); 3448 3449 /* Before we perform post reset processing we want to see if 3450 * the bus shows 0xFF because the odd clown forgets the D7 3451 * pulldown resistor. 3452 */ 3453 if (ata_chk_status(ap) == 0xFF) 3454 return -ENODEV; 3455 3456 return ata_bus_post_reset(ap, devmask, deadline); 3457 } 3458 3459 /** 3460 * ata_bus_reset - reset host port and associated ATA channel 3461 * @ap: port to reset 3462 * 3463 * This is typically the first time we actually start issuing 3464 * commands to the ATA channel. We wait for BSY to clear, then 3465 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its 3466 * result. Determine what devices, if any, are on the channel 3467 * by looking at the device 0/1 error register. Look at the signature 3468 * stored in each device's taskfile registers, to determine if 3469 * the device is ATA or ATAPI. 3470 * 3471 * LOCKING: 3472 * PCI/etc. bus probe sem. 3473 * Obtains host lock. 3474 * 3475 * SIDE EFFECTS: 3476 * Sets ATA_FLAG_DISABLED if bus reset fails. 3477 */ 3478 3479 void ata_bus_reset(struct ata_port *ap) 3480 { 3481 struct ata_device *device = ap->link.device; 3482 struct ata_ioports *ioaddr = &ap->ioaddr; 3483 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; 3484 u8 err; 3485 unsigned int dev0, dev1 = 0, devmask = 0; 3486 int rc; 3487 3488 DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no); 3489 3490 /* determine if device 0/1 are present */ 3491 if (ap->flags & ATA_FLAG_SATA_RESET) 3492 dev0 = 1; 3493 else { 3494 dev0 = ata_devchk(ap, 0); 3495 if (slave_possible) 3496 dev1 = ata_devchk(ap, 1); 3497 } 3498 3499 if (dev0) 3500 devmask |= (1 << 0); 3501 if (dev1) 3502 devmask |= (1 << 1); 3503 3504 /* select device 0 again */ 3505 ap->ops->dev_select(ap, 0); 3506 3507 /* issue bus reset */ 3508 if (ap->flags & ATA_FLAG_SRST) { 3509 rc = ata_bus_softreset(ap, devmask, jiffies + 40 * HZ); 3510 if (rc && rc != -ENODEV) 3511 goto err_out; 3512 } 3513 3514 /* 3515 * determine by signature whether we have ATA or ATAPI devices 3516 */ 3517 device[0].class = ata_dev_try_classify(&device[0], dev0, &err); 3518 if ((slave_possible) && (err != 0x81)) 3519 device[1].class = ata_dev_try_classify(&device[1], dev1, &err); 3520 3521 /* is double-select really necessary? */ 3522 if (device[1].class != ATA_DEV_NONE) 3523 ap->ops->dev_select(ap, 1); 3524 if (device[0].class != ATA_DEV_NONE) 3525 ap->ops->dev_select(ap, 0); 3526 3527 /* if no devices were detected, disable this port */ 3528 if ((device[0].class == ATA_DEV_NONE) && 3529 (device[1].class == ATA_DEV_NONE)) 3530 goto err_out; 3531 3532 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { 3533 /* set up device control for ATA_FLAG_SATA_RESET */ 3534 iowrite8(ap->ctl, ioaddr->ctl_addr); 3535 } 3536 3537 DPRINTK("EXIT\n"); 3538 return; 3539 3540 err_out: 3541 ata_port_printk(ap, KERN_ERR, "disabling port\n"); 3542 ata_port_disable(ap); 3543 3544 DPRINTK("EXIT\n"); 3545 } 3546 3547 /** 3548 * sata_link_debounce - debounce SATA phy status 3549 * @link: ATA link to debounce SATA phy status for 3550 * @params: timing parameters { interval, duratinon, timeout } in msec 3551 * @deadline: deadline jiffies for the operation 3552 * 3553 * Make sure SStatus of @link reaches stable state, determined by 3554 * holding the same value where DET is not 1 for @duration polled 3555 * every @interval, before @timeout. Timeout constraints the 3556 * beginning of the stable state. Because DET gets stuck at 1 on 3557 * some controllers after hot unplugging, this functions waits 3558 * until timeout then returns 0 if DET is stable at 1. 3559 * 3560 * @timeout is further limited by @deadline. The sooner of the 3561 * two is used. 3562 * 3563 * LOCKING: 3564 * Kernel thread context (may sleep) 3565 * 3566 * RETURNS: 3567 * 0 on success, -errno on failure. 3568 */ 3569 int sata_link_debounce(struct ata_link *link, const unsigned long *params, 3570 unsigned long deadline) 3571 { 3572 unsigned long interval_msec = params[0]; 3573 unsigned long duration = msecs_to_jiffies(params[1]); 3574 unsigned long last_jiffies, t; 3575 u32 last, cur; 3576 int rc; 3577 3578 t = jiffies + msecs_to_jiffies(params[2]); 3579 if (time_before(t, deadline)) 3580 deadline = t; 3581 3582 if ((rc = sata_scr_read(link, SCR_STATUS, &cur))) 3583 return rc; 3584 cur &= 0xf; 3585 3586 last = cur; 3587 last_jiffies = jiffies; 3588 3589 while (1) { 3590 msleep(interval_msec); 3591 if ((rc = sata_scr_read(link, SCR_STATUS, &cur))) 3592 return rc; 3593 cur &= 0xf; 3594 3595 /* DET stable? */ 3596 if (cur == last) { 3597 if (cur == 1 && time_before(jiffies, deadline)) 3598 continue; 3599 if (time_after(jiffies, last_jiffies + duration)) 3600 return 0; 3601 continue; 3602 } 3603 3604 /* unstable, start over */ 3605 last = cur; 3606 last_jiffies = jiffies; 3607 3608 /* Check deadline. If debouncing failed, return 3609 * -EPIPE to tell upper layer to lower link speed. 3610 */ 3611 if (time_after(jiffies, deadline)) 3612 return -EPIPE; 3613 } 3614 } 3615 3616 /** 3617 * sata_link_resume - resume SATA link 3618 * @link: ATA link to resume SATA 3619 * @params: timing parameters { interval, duratinon, timeout } in msec 3620 * @deadline: deadline jiffies for the operation 3621 * 3622 * Resume SATA phy @link and debounce it. 3623 * 3624 * LOCKING: 3625 * Kernel thread context (may sleep) 3626 * 3627 * RETURNS: 3628 * 0 on success, -errno on failure. 3629 */ 3630 int sata_link_resume(struct ata_link *link, const unsigned long *params, 3631 unsigned long deadline) 3632 { 3633 u32 scontrol; 3634 int rc; 3635 3636 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) 3637 return rc; 3638 3639 scontrol = (scontrol & 0x0f0) | 0x300; 3640 3641 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol))) 3642 return rc; 3643 3644 /* Some PHYs react badly if SStatus is pounded immediately 3645 * after resuming. Delay 200ms before debouncing. 3646 */ 3647 msleep(200); 3648 3649 return sata_link_debounce(link, params, deadline); 3650 } 3651 3652 /** 3653 * ata_std_prereset - prepare for reset 3654 * @link: ATA link to be reset 3655 * @deadline: deadline jiffies for the operation 3656 * 3657 * @link is about to be reset. Initialize it. Failure from 3658 * prereset makes libata abort whole reset sequence and give up 3659 * that port, so prereset should be best-effort. It does its 3660 * best to prepare for reset sequence but if things go wrong, it 3661 * should just whine, not fail. 3662 * 3663 * LOCKING: 3664 * Kernel thread context (may sleep) 3665 * 3666 * RETURNS: 3667 * 0 on success, -errno otherwise. 3668 */ 3669 int ata_std_prereset(struct ata_link *link, unsigned long deadline) 3670 { 3671 struct ata_port *ap = link->ap; 3672 struct ata_eh_context *ehc = &link->eh_context; 3673 const unsigned long *timing = sata_ehc_deb_timing(ehc); 3674 int rc; 3675 3676 /* handle link resume */ 3677 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) && 3678 (link->flags & ATA_LFLAG_HRST_TO_RESUME)) 3679 ehc->i.action |= ATA_EH_HARDRESET; 3680 3681 /* Some PMPs don't work with only SRST, force hardreset if PMP 3682 * is supported. 3683 */ 3684 if (ap->flags & ATA_FLAG_PMP) 3685 ehc->i.action |= ATA_EH_HARDRESET; 3686 3687 /* if we're about to do hardreset, nothing more to do */ 3688 if (ehc->i.action & ATA_EH_HARDRESET) 3689 return 0; 3690 3691 /* if SATA, resume link */ 3692 if (ap->flags & ATA_FLAG_SATA) { 3693 rc = sata_link_resume(link, timing, deadline); 3694 /* whine about phy resume failure but proceed */ 3695 if (rc && rc != -EOPNOTSUPP) 3696 ata_link_printk(link, KERN_WARNING, "failed to resume " 3697 "link for reset (errno=%d)\n", rc); 3698 } 3699 3700 /* Wait for !BSY if the controller can wait for the first D2H 3701 * Reg FIS and we don't know that no device is attached. 3702 */ 3703 if (!(link->flags & ATA_LFLAG_SKIP_D2H_BSY) && !ata_link_offline(link)) { 3704 rc = ata_wait_ready(ap, deadline); 3705 if (rc && rc != -ENODEV) { 3706 ata_link_printk(link, KERN_WARNING, "device not ready " 3707 "(errno=%d), forcing hardreset\n", rc); 3708 ehc->i.action |= ATA_EH_HARDRESET; 3709 } 3710 } 3711 3712 return 0; 3713 } 3714 3715 /** 3716 * ata_std_softreset - reset host port via ATA SRST 3717 * @link: ATA link to reset 3718 * @classes: resulting classes of attached devices 3719 * @deadline: deadline jiffies for the operation 3720 * 3721 * Reset host port using ATA SRST. 3722 * 3723 * LOCKING: 3724 * Kernel thread context (may sleep) 3725 * 3726 * RETURNS: 3727 * 0 on success, -errno otherwise. 3728 */ 3729 int ata_std_softreset(struct ata_link *link, unsigned int *classes, 3730 unsigned long deadline) 3731 { 3732 struct ata_port *ap = link->ap; 3733 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; 3734 unsigned int devmask = 0; 3735 int rc; 3736 u8 err; 3737 3738 DPRINTK("ENTER\n"); 3739 3740 if (ata_link_offline(link)) { 3741 classes[0] = ATA_DEV_NONE; 3742 goto out; 3743 } 3744 3745 /* determine if device 0/1 are present */ 3746 if (ata_devchk(ap, 0)) 3747 devmask |= (1 << 0); 3748 if (slave_possible && ata_devchk(ap, 1)) 3749 devmask |= (1 << 1); 3750 3751 /* select device 0 again */ 3752 ap->ops->dev_select(ap, 0); 3753 3754 /* issue bus reset */ 3755 DPRINTK("about to softreset, devmask=%x\n", devmask); 3756 rc = ata_bus_softreset(ap, devmask, deadline); 3757 /* if link is occupied, -ENODEV too is an error */ 3758 if (rc && (rc != -ENODEV || sata_scr_valid(link))) { 3759 ata_link_printk(link, KERN_ERR, "SRST failed (errno=%d)\n", rc); 3760 return rc; 3761 } 3762 3763 /* determine by signature whether we have ATA or ATAPI devices */ 3764 classes[0] = ata_dev_try_classify(&link->device[0], 3765 devmask & (1 << 0), &err); 3766 if (slave_possible && err != 0x81) 3767 classes[1] = ata_dev_try_classify(&link->device[1], 3768 devmask & (1 << 1), &err); 3769 3770 out: 3771 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]); 3772 return 0; 3773 } 3774 3775 /** 3776 * sata_link_hardreset - reset link via SATA phy reset 3777 * @link: link to reset 3778 * @timing: timing parameters { interval, duratinon, timeout } in msec 3779 * @deadline: deadline jiffies for the operation 3780 * 3781 * SATA phy-reset @link using DET bits of SControl register. 3782 * 3783 * LOCKING: 3784 * Kernel thread context (may sleep) 3785 * 3786 * RETURNS: 3787 * 0 on success, -errno otherwise. 3788 */ 3789 int sata_link_hardreset(struct ata_link *link, const unsigned long *timing, 3790 unsigned long deadline) 3791 { 3792 u32 scontrol; 3793 int rc; 3794 3795 DPRINTK("ENTER\n"); 3796 3797 if (sata_set_spd_needed(link)) { 3798 /* SATA spec says nothing about how to reconfigure 3799 * spd. To be on the safe side, turn off phy during 3800 * reconfiguration. This works for at least ICH7 AHCI 3801 * and Sil3124. 3802 */ 3803 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) 3804 goto out; 3805 3806 scontrol = (scontrol & 0x0f0) | 0x304; 3807 3808 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol))) 3809 goto out; 3810 3811 sata_set_spd(link); 3812 } 3813 3814 /* issue phy wake/reset */ 3815 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) 3816 goto out; 3817 3818 scontrol = (scontrol & 0x0f0) | 0x301; 3819 3820 if ((rc = sata_scr_write_flush(link, SCR_CONTROL, scontrol))) 3821 goto out; 3822 3823 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1 3824 * 10.4.2 says at least 1 ms. 3825 */ 3826 msleep(1); 3827 3828 /* bring link back */ 3829 rc = sata_link_resume(link, timing, deadline); 3830 out: 3831 DPRINTK("EXIT, rc=%d\n", rc); 3832 return rc; 3833 } 3834 3835 /** 3836 * sata_std_hardreset - reset host port via SATA phy reset 3837 * @link: link to reset 3838 * @class: resulting class of attached device 3839 * @deadline: deadline jiffies for the operation 3840 * 3841 * SATA phy-reset host port using DET bits of SControl register, 3842 * wait for !BSY and classify the attached device. 3843 * 3844 * LOCKING: 3845 * Kernel thread context (may sleep) 3846 * 3847 * RETURNS: 3848 * 0 on success, -errno otherwise. 3849 */ 3850 int sata_std_hardreset(struct ata_link *link, unsigned int *class, 3851 unsigned long deadline) 3852 { 3853 struct ata_port *ap = link->ap; 3854 const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context); 3855 int rc; 3856 3857 DPRINTK("ENTER\n"); 3858 3859 /* do hardreset */ 3860 rc = sata_link_hardreset(link, timing, deadline); 3861 if (rc) { 3862 ata_link_printk(link, KERN_ERR, 3863 "COMRESET failed (errno=%d)\n", rc); 3864 return rc; 3865 } 3866 3867 /* TODO: phy layer with polling, timeouts, etc. */ 3868 if (ata_link_offline(link)) { 3869 *class = ATA_DEV_NONE; 3870 DPRINTK("EXIT, link offline\n"); 3871 return 0; 3872 } 3873 3874 /* wait a while before checking status */ 3875 ata_wait_after_reset(ap, deadline); 3876 3877 /* If PMP is supported, we have to do follow-up SRST. Note 3878 * that some PMPs don't send D2H Reg FIS after hardreset at 3879 * all if the first port is empty. Wait for it just for a 3880 * second and request follow-up SRST. 3881 */ 3882 if (ap->flags & ATA_FLAG_PMP) { 3883 ata_wait_ready(ap, jiffies + HZ); 3884 return -EAGAIN; 3885 } 3886 3887 rc = ata_wait_ready(ap, deadline); 3888 /* link occupied, -ENODEV too is an error */ 3889 if (rc) { 3890 ata_link_printk(link, KERN_ERR, 3891 "COMRESET failed (errno=%d)\n", rc); 3892 return rc; 3893 } 3894 3895 ap->ops->dev_select(ap, 0); /* probably unnecessary */ 3896 3897 *class = ata_dev_try_classify(link->device, 1, NULL); 3898 3899 DPRINTK("EXIT, class=%u\n", *class); 3900 return 0; 3901 } 3902 3903 /** 3904 * ata_std_postreset - standard postreset callback 3905 * @link: the target ata_link 3906 * @classes: classes of attached devices 3907 * 3908 * This function is invoked after a successful reset. Note that 3909 * the device might have been reset more than once using 3910 * different reset methods before postreset is invoked. 3911 * 3912 * LOCKING: 3913 * Kernel thread context (may sleep) 3914 */ 3915 void ata_std_postreset(struct ata_link *link, unsigned int *classes) 3916 { 3917 struct ata_port *ap = link->ap; 3918 u32 serror; 3919 3920 DPRINTK("ENTER\n"); 3921 3922 /* print link status */ 3923 sata_print_link_status(link); 3924 3925 /* clear SError */ 3926 if (sata_scr_read(link, SCR_ERROR, &serror) == 0) 3927 sata_scr_write(link, SCR_ERROR, serror); 3928 link->eh_info.serror = 0; 3929 3930 /* is double-select really necessary? */ 3931 if (classes[0] != ATA_DEV_NONE) 3932 ap->ops->dev_select(ap, 1); 3933 if (classes[1] != ATA_DEV_NONE) 3934 ap->ops->dev_select(ap, 0); 3935 3936 /* bail out if no device is present */ 3937 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { 3938 DPRINTK("EXIT, no device\n"); 3939 return; 3940 } 3941 3942 /* set up device control */ 3943 if (ap->ioaddr.ctl_addr) 3944 iowrite8(ap->ctl, ap->ioaddr.ctl_addr); 3945 3946 DPRINTK("EXIT\n"); 3947 } 3948 3949 /** 3950 * ata_dev_same_device - Determine whether new ID matches configured device 3951 * @dev: device to compare against 3952 * @new_class: class of the new device 3953 * @new_id: IDENTIFY page of the new device 3954 * 3955 * Compare @new_class and @new_id against @dev and determine 3956 * whether @dev is the device indicated by @new_class and 3957 * @new_id. 3958 * 3959 * LOCKING: 3960 * None. 3961 * 3962 * RETURNS: 3963 * 1 if @dev matches @new_class and @new_id, 0 otherwise. 3964 */ 3965 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class, 3966 const u16 *new_id) 3967 { 3968 const u16 *old_id = dev->id; 3969 unsigned char model[2][ATA_ID_PROD_LEN + 1]; 3970 unsigned char serial[2][ATA_ID_SERNO_LEN + 1]; 3971 3972 if (dev->class != new_class) { 3973 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n", 3974 dev->class, new_class); 3975 return 0; 3976 } 3977 3978 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0])); 3979 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1])); 3980 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0])); 3981 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1])); 3982 3983 if (strcmp(model[0], model[1])) { 3984 ata_dev_printk(dev, KERN_INFO, "model number mismatch " 3985 "'%s' != '%s'\n", model[0], model[1]); 3986 return 0; 3987 } 3988 3989 if (strcmp(serial[0], serial[1])) { 3990 ata_dev_printk(dev, KERN_INFO, "serial number mismatch " 3991 "'%s' != '%s'\n", serial[0], serial[1]); 3992 return 0; 3993 } 3994 3995 return 1; 3996 } 3997 3998 /** 3999 * ata_dev_reread_id - Re-read IDENTIFY data 4000 * @dev: target ATA device 4001 * @readid_flags: read ID flags 4002 * 4003 * Re-read IDENTIFY page and make sure @dev is still attached to 4004 * the port. 4005 * 4006 * LOCKING: 4007 * Kernel thread context (may sleep) 4008 * 4009 * RETURNS: 4010 * 0 on success, negative errno otherwise 4011 */ 4012 int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags) 4013 { 4014 unsigned int class = dev->class; 4015 u16 *id = (void *)dev->link->ap->sector_buf; 4016 int rc; 4017 4018 /* read ID data */ 4019 rc = ata_dev_read_id(dev, &class, readid_flags, id); 4020 if (rc) 4021 return rc; 4022 4023 /* is the device still there? */ 4024 if (!ata_dev_same_device(dev, class, id)) 4025 return -ENODEV; 4026 4027 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS); 4028 return 0; 4029 } 4030 4031 /** 4032 * ata_dev_revalidate - Revalidate ATA device 4033 * @dev: device to revalidate 4034 * @new_class: new class code 4035 * @readid_flags: read ID flags 4036 * 4037 * Re-read IDENTIFY page, make sure @dev is still attached to the 4038 * port and reconfigure it according to the new IDENTIFY page. 4039 * 4040 * LOCKING: 4041 * Kernel thread context (may sleep) 4042 * 4043 * RETURNS: 4044 * 0 on success, negative errno otherwise 4045 */ 4046 int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class, 4047 unsigned int readid_flags) 4048 { 4049 u64 n_sectors = dev->n_sectors; 4050 int rc; 4051 4052 if (!ata_dev_enabled(dev)) 4053 return -ENODEV; 4054 4055 /* fail early if !ATA && !ATAPI to avoid issuing [P]IDENTIFY to PMP */ 4056 if (ata_class_enabled(new_class) && 4057 new_class != ATA_DEV_ATA && new_class != ATA_DEV_ATAPI) { 4058 ata_dev_printk(dev, KERN_INFO, "class mismatch %u != %u\n", 4059 dev->class, new_class); 4060 rc = -ENODEV; 4061 goto fail; 4062 } 4063 4064 /* re-read ID */ 4065 rc = ata_dev_reread_id(dev, readid_flags); 4066 if (rc) 4067 goto fail; 4068 4069 /* configure device according to the new ID */ 4070 rc = ata_dev_configure(dev); 4071 if (rc) 4072 goto fail; 4073 4074 /* verify n_sectors hasn't changed */ 4075 if (dev->class == ATA_DEV_ATA && n_sectors && 4076 dev->n_sectors != n_sectors) { 4077 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch " 4078 "%llu != %llu\n", 4079 (unsigned long long)n_sectors, 4080 (unsigned long long)dev->n_sectors); 4081 4082 /* restore original n_sectors */ 4083 dev->n_sectors = n_sectors; 4084 4085 rc = -ENODEV; 4086 goto fail; 4087 } 4088 4089 return 0; 4090 4091 fail: 4092 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc); 4093 return rc; 4094 } 4095 4096 struct ata_blacklist_entry { 4097 const char *model_num; 4098 const char *model_rev; 4099 unsigned long horkage; 4100 }; 4101 4102 static const struct ata_blacklist_entry ata_device_blacklist [] = { 4103 /* Devices with DMA related problems under Linux */ 4104 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA }, 4105 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA }, 4106 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA }, 4107 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA }, 4108 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA }, 4109 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA }, 4110 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA }, 4111 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA }, 4112 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA }, 4113 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA }, 4114 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA }, 4115 { "CRD-84", NULL, ATA_HORKAGE_NODMA }, 4116 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA }, 4117 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA }, 4118 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA }, 4119 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA }, 4120 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA }, 4121 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA }, 4122 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA }, 4123 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA }, 4124 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA }, 4125 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA }, 4126 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA }, 4127 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA }, 4128 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA }, 4129 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA }, 4130 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA }, 4131 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA }, 4132 { "SAMSUNG CD-ROM SN-124", "N001", ATA_HORKAGE_NODMA }, 4133 { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA }, 4134 /* Odd clown on sil3726/4726 PMPs */ 4135 { "Config Disk", NULL, ATA_HORKAGE_NODMA | 4136 ATA_HORKAGE_SKIP_PM }, 4137 4138 /* Weird ATAPI devices */ 4139 { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 }, 4140 4141 /* Devices we expect to fail diagnostics */ 4142 4143 /* Devices where NCQ should be avoided */ 4144 /* NCQ is slow */ 4145 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ }, 4146 { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, }, 4147 /* http://thread.gmane.org/gmane.linux.ide/14907 */ 4148 { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ }, 4149 /* NCQ is broken */ 4150 { "Maxtor *", "BANC*", ATA_HORKAGE_NONCQ }, 4151 { "Maxtor 7V300F0", "VA111630", ATA_HORKAGE_NONCQ }, 4152 { "HITACHI HDS7250SASUN500G*", NULL, ATA_HORKAGE_NONCQ }, 4153 { "HITACHI HDS7225SBSUN250G*", NULL, ATA_HORKAGE_NONCQ }, 4154 { "ST380817AS", "3.42", ATA_HORKAGE_NONCQ }, 4155 { "ST3160023AS", "3.42", ATA_HORKAGE_NONCQ }, 4156 4157 /* Blacklist entries taken from Silicon Image 3124/3132 4158 Windows driver .inf file - also several Linux problem reports */ 4159 { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, }, 4160 { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, }, 4161 { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, }, 4162 4163 /* devices which puke on READ_NATIVE_MAX */ 4164 { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, }, 4165 { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA }, 4166 { "WDC WD2500JD-00HBB0", "WD-WMAL71490727", ATA_HORKAGE_BROKEN_HPA }, 4167 { "MAXTOR 6L080L4", "A93.0500", ATA_HORKAGE_BROKEN_HPA }, 4168 4169 /* Devices which report 1 sector over size HPA */ 4170 { "ST340823A", NULL, ATA_HORKAGE_HPA_SIZE, }, 4171 { "ST320413A", NULL, ATA_HORKAGE_HPA_SIZE, }, 4172 4173 /* Devices which get the IVB wrong */ 4174 { "QUANTUM FIREBALLlct10 05", "A03.0900", ATA_HORKAGE_IVB, }, 4175 { "TSSTcorp CDDVDW SH-S202J", "SB00", ATA_HORKAGE_IVB, }, 4176 { "TSSTcorp CDDVDW SH-S202J", "SB01", ATA_HORKAGE_IVB, }, 4177 { "TSSTcorp CDDVDW SH-S202N", "SB00", ATA_HORKAGE_IVB, }, 4178 { "TSSTcorp CDDVDW SH-S202N", "SB01", ATA_HORKAGE_IVB, }, 4179 4180 /* End Marker */ 4181 { } 4182 }; 4183 4184 static int strn_pattern_cmp(const char *patt, const char *name, int wildchar) 4185 { 4186 const char *p; 4187 int len; 4188 4189 /* 4190 * check for trailing wildcard: *\0 4191 */ 4192 p = strchr(patt, wildchar); 4193 if (p && ((*(p + 1)) == 0)) 4194 len = p - patt; 4195 else { 4196 len = strlen(name); 4197 if (!len) { 4198 if (!*patt) 4199 return 0; 4200 return -1; 4201 } 4202 } 4203 4204 return strncmp(patt, name, len); 4205 } 4206 4207 static unsigned long ata_dev_blacklisted(const struct ata_device *dev) 4208 { 4209 unsigned char model_num[ATA_ID_PROD_LEN + 1]; 4210 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1]; 4211 const struct ata_blacklist_entry *ad = ata_device_blacklist; 4212 4213 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num)); 4214 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev)); 4215 4216 while (ad->model_num) { 4217 if (!strn_pattern_cmp(ad->model_num, model_num, '*')) { 4218 if (ad->model_rev == NULL) 4219 return ad->horkage; 4220 if (!strn_pattern_cmp(ad->model_rev, model_rev, '*')) 4221 return ad->horkage; 4222 } 4223 ad++; 4224 } 4225 return 0; 4226 } 4227 4228 static int ata_dma_blacklisted(const struct ata_device *dev) 4229 { 4230 /* We don't support polling DMA. 4231 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO) 4232 * if the LLDD handles only interrupts in the HSM_ST_LAST state. 4233 */ 4234 if ((dev->link->ap->flags & ATA_FLAG_PIO_POLLING) && 4235 (dev->flags & ATA_DFLAG_CDB_INTR)) 4236 return 1; 4237 return (dev->horkage & ATA_HORKAGE_NODMA) ? 1 : 0; 4238 } 4239 4240 /** 4241 * ata_is_40wire - check drive side detection 4242 * @dev: device 4243 * 4244 * Perform drive side detection decoding, allowing for device vendors 4245 * who can't follow the documentation. 4246 */ 4247 4248 static int ata_is_40wire(struct ata_device *dev) 4249 { 4250 if (dev->horkage & ATA_HORKAGE_IVB) 4251 return ata_drive_40wire_relaxed(dev->id); 4252 return ata_drive_40wire(dev->id); 4253 } 4254 4255 /** 4256 * ata_dev_xfermask - Compute supported xfermask of the given device 4257 * @dev: Device to compute xfermask for 4258 * 4259 * Compute supported xfermask of @dev and store it in 4260 * dev->*_mask. This function is responsible for applying all 4261 * known limits including host controller limits, device 4262 * blacklist, etc... 4263 * 4264 * LOCKING: 4265 * None. 4266 */ 4267 static void ata_dev_xfermask(struct ata_device *dev) 4268 { 4269 struct ata_link *link = dev->link; 4270 struct ata_port *ap = link->ap; 4271 struct ata_host *host = ap->host; 4272 unsigned long xfer_mask; 4273 4274 /* controller modes available */ 4275 xfer_mask = ata_pack_xfermask(ap->pio_mask, 4276 ap->mwdma_mask, ap->udma_mask); 4277 4278 /* drive modes available */ 4279 xfer_mask &= ata_pack_xfermask(dev->pio_mask, 4280 dev->mwdma_mask, dev->udma_mask); 4281 xfer_mask &= ata_id_xfermask(dev->id); 4282 4283 /* 4284 * CFA Advanced TrueIDE timings are not allowed on a shared 4285 * cable 4286 */ 4287 if (ata_dev_pair(dev)) { 4288 /* No PIO5 or PIO6 */ 4289 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5)); 4290 /* No MWDMA3 or MWDMA 4 */ 4291 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3)); 4292 } 4293 4294 if (ata_dma_blacklisted(dev)) { 4295 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); 4296 ata_dev_printk(dev, KERN_WARNING, 4297 "device is on DMA blacklist, disabling DMA\n"); 4298 } 4299 4300 if ((host->flags & ATA_HOST_SIMPLEX) && 4301 host->simplex_claimed && host->simplex_claimed != ap) { 4302 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); 4303 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by " 4304 "other device, disabling DMA\n"); 4305 } 4306 4307 if (ap->flags & ATA_FLAG_NO_IORDY) 4308 xfer_mask &= ata_pio_mask_no_iordy(dev); 4309 4310 if (ap->ops->mode_filter) 4311 xfer_mask = ap->ops->mode_filter(dev, xfer_mask); 4312 4313 /* Apply cable rule here. Don't apply it early because when 4314 * we handle hot plug the cable type can itself change. 4315 * Check this last so that we know if the transfer rate was 4316 * solely limited by the cable. 4317 * Unknown or 80 wire cables reported host side are checked 4318 * drive side as well. Cases where we know a 40wire cable 4319 * is used safely for 80 are not checked here. 4320 */ 4321 if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA)) 4322 /* UDMA/44 or higher would be available */ 4323 if ((ap->cbl == ATA_CBL_PATA40) || 4324 (ata_is_40wire(dev) && 4325 (ap->cbl == ATA_CBL_PATA_UNK || 4326 ap->cbl == ATA_CBL_PATA80))) { 4327 ata_dev_printk(dev, KERN_WARNING, 4328 "limited to UDMA/33 due to 40-wire cable\n"); 4329 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA); 4330 } 4331 4332 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, 4333 &dev->mwdma_mask, &dev->udma_mask); 4334 } 4335 4336 /** 4337 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command 4338 * @dev: Device to which command will be sent 4339 * 4340 * Issue SET FEATURES - XFER MODE command to device @dev 4341 * on port @ap. 4342 * 4343 * LOCKING: 4344 * PCI/etc. bus probe sem. 4345 * 4346 * RETURNS: 4347 * 0 on success, AC_ERR_* mask otherwise. 4348 */ 4349 4350 static unsigned int ata_dev_set_xfermode(struct ata_device *dev) 4351 { 4352 struct ata_taskfile tf; 4353 unsigned int err_mask; 4354 4355 /* set up set-features taskfile */ 4356 DPRINTK("set features - xfer mode\n"); 4357 4358 /* Some controllers and ATAPI devices show flaky interrupt 4359 * behavior after setting xfer mode. Use polling instead. 4360 */ 4361 ata_tf_init(dev, &tf); 4362 tf.command = ATA_CMD_SET_FEATURES; 4363 tf.feature = SETFEATURES_XFER; 4364 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING; 4365 tf.protocol = ATA_PROT_NODATA; 4366 tf.nsect = dev->xfer_mode; 4367 4368 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); 4369 4370 DPRINTK("EXIT, err_mask=%x\n", err_mask); 4371 return err_mask; 4372 } 4373 /** 4374 * ata_dev_set_feature - Issue SET FEATURES - SATA FEATURES 4375 * @dev: Device to which command will be sent 4376 * @enable: Whether to enable or disable the feature 4377 * @feature: The sector count represents the feature to set 4378 * 4379 * Issue SET FEATURES - SATA FEATURES command to device @dev 4380 * on port @ap with sector count 4381 * 4382 * LOCKING: 4383 * PCI/etc. bus probe sem. 4384 * 4385 * RETURNS: 4386 * 0 on success, AC_ERR_* mask otherwise. 4387 */ 4388 static unsigned int ata_dev_set_feature(struct ata_device *dev, u8 enable, 4389 u8 feature) 4390 { 4391 struct ata_taskfile tf; 4392 unsigned int err_mask; 4393 4394 /* set up set-features taskfile */ 4395 DPRINTK("set features - SATA features\n"); 4396 4397 ata_tf_init(dev, &tf); 4398 tf.command = ATA_CMD_SET_FEATURES; 4399 tf.feature = enable; 4400 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 4401 tf.protocol = ATA_PROT_NODATA; 4402 tf.nsect = feature; 4403 4404 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); 4405 4406 DPRINTK("EXIT, err_mask=%x\n", err_mask); 4407 return err_mask; 4408 } 4409 4410 /** 4411 * ata_dev_init_params - Issue INIT DEV PARAMS command 4412 * @dev: Device to which command will be sent 4413 * @heads: Number of heads (taskfile parameter) 4414 * @sectors: Number of sectors (taskfile parameter) 4415 * 4416 * LOCKING: 4417 * Kernel thread context (may sleep) 4418 * 4419 * RETURNS: 4420 * 0 on success, AC_ERR_* mask otherwise. 4421 */ 4422 static unsigned int ata_dev_init_params(struct ata_device *dev, 4423 u16 heads, u16 sectors) 4424 { 4425 struct ata_taskfile tf; 4426 unsigned int err_mask; 4427 4428 /* Number of sectors per track 1-255. Number of heads 1-16 */ 4429 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16) 4430 return AC_ERR_INVALID; 4431 4432 /* set up init dev params taskfile */ 4433 DPRINTK("init dev params \n"); 4434 4435 ata_tf_init(dev, &tf); 4436 tf.command = ATA_CMD_INIT_DEV_PARAMS; 4437 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 4438 tf.protocol = ATA_PROT_NODATA; 4439 tf.nsect = sectors; 4440 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */ 4441 4442 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); 4443 /* A clean abort indicates an original or just out of spec drive 4444 and we should continue as we issue the setup based on the 4445 drive reported working geometry */ 4446 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED)) 4447 err_mask = 0; 4448 4449 DPRINTK("EXIT, err_mask=%x\n", err_mask); 4450 return err_mask; 4451 } 4452 4453 /** 4454 * ata_sg_clean - Unmap DMA memory associated with command 4455 * @qc: Command containing DMA memory to be released 4456 * 4457 * Unmap all mapped DMA memory associated with this command. 4458 * 4459 * LOCKING: 4460 * spin_lock_irqsave(host lock) 4461 */ 4462 void ata_sg_clean(struct ata_queued_cmd *qc) 4463 { 4464 struct ata_port *ap = qc->ap; 4465 struct scatterlist *sg = qc->__sg; 4466 int dir = qc->dma_dir; 4467 void *pad_buf = NULL; 4468 4469 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP)); 4470 WARN_ON(sg == NULL); 4471 4472 if (qc->flags & ATA_QCFLAG_SINGLE) 4473 WARN_ON(qc->n_elem > 1); 4474 4475 VPRINTK("unmapping %u sg elements\n", qc->n_elem); 4476 4477 /* if we padded the buffer out to 32-bit bound, and data 4478 * xfer direction is from-device, we must copy from the 4479 * pad buffer back into the supplied buffer 4480 */ 4481 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE)) 4482 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); 4483 4484 if (qc->flags & ATA_QCFLAG_SG) { 4485 if (qc->n_elem) 4486 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir); 4487 /* restore last sg */ 4488 sg_last(sg, qc->orig_n_elem)->length += qc->pad_len; 4489 if (pad_buf) { 4490 struct scatterlist *psg = &qc->pad_sgent; 4491 void *addr = kmap_atomic(sg_page(psg), KM_IRQ0); 4492 memcpy(addr + psg->offset, pad_buf, qc->pad_len); 4493 kunmap_atomic(addr, KM_IRQ0); 4494 } 4495 } else { 4496 if (qc->n_elem) 4497 dma_unmap_single(ap->dev, 4498 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]), 4499 dir); 4500 /* restore sg */ 4501 sg->length += qc->pad_len; 4502 if (pad_buf) 4503 memcpy(qc->buf_virt + sg->length - qc->pad_len, 4504 pad_buf, qc->pad_len); 4505 } 4506 4507 qc->flags &= ~ATA_QCFLAG_DMAMAP; 4508 qc->__sg = NULL; 4509 } 4510 4511 /** 4512 * ata_fill_sg - Fill PCI IDE PRD table 4513 * @qc: Metadata associated with taskfile to be transferred 4514 * 4515 * Fill PCI IDE PRD (scatter-gather) table with segments 4516 * associated with the current disk command. 4517 * 4518 * LOCKING: 4519 * spin_lock_irqsave(host lock) 4520 * 4521 */ 4522 static void ata_fill_sg(struct ata_queued_cmd *qc) 4523 { 4524 struct ata_port *ap = qc->ap; 4525 struct scatterlist *sg; 4526 unsigned int idx; 4527 4528 WARN_ON(qc->__sg == NULL); 4529 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); 4530 4531 idx = 0; 4532 ata_for_each_sg(sg, qc) { 4533 u32 addr, offset; 4534 u32 sg_len, len; 4535 4536 /* determine if physical DMA addr spans 64K boundary. 4537 * Note h/w doesn't support 64-bit, so we unconditionally 4538 * truncate dma_addr_t to u32. 4539 */ 4540 addr = (u32) sg_dma_address(sg); 4541 sg_len = sg_dma_len(sg); 4542 4543 while (sg_len) { 4544 offset = addr & 0xffff; 4545 len = sg_len; 4546 if ((offset + sg_len) > 0x10000) 4547 len = 0x10000 - offset; 4548 4549 ap->prd[idx].addr = cpu_to_le32(addr); 4550 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); 4551 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); 4552 4553 idx++; 4554 sg_len -= len; 4555 addr += len; 4556 } 4557 } 4558 4559 if (idx) 4560 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); 4561 } 4562 4563 /** 4564 * ata_fill_sg_dumb - Fill PCI IDE PRD table 4565 * @qc: Metadata associated with taskfile to be transferred 4566 * 4567 * Fill PCI IDE PRD (scatter-gather) table with segments 4568 * associated with the current disk command. Perform the fill 4569 * so that we avoid writing any length 64K records for 4570 * controllers that don't follow the spec. 4571 * 4572 * LOCKING: 4573 * spin_lock_irqsave(host lock) 4574 * 4575 */ 4576 static void ata_fill_sg_dumb(struct ata_queued_cmd *qc) 4577 { 4578 struct ata_port *ap = qc->ap; 4579 struct scatterlist *sg; 4580 unsigned int idx; 4581 4582 WARN_ON(qc->__sg == NULL); 4583 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); 4584 4585 idx = 0; 4586 ata_for_each_sg(sg, qc) { 4587 u32 addr, offset; 4588 u32 sg_len, len, blen; 4589 4590 /* determine if physical DMA addr spans 64K boundary. 4591 * Note h/w doesn't support 64-bit, so we unconditionally 4592 * truncate dma_addr_t to u32. 4593 */ 4594 addr = (u32) sg_dma_address(sg); 4595 sg_len = sg_dma_len(sg); 4596 4597 while (sg_len) { 4598 offset = addr & 0xffff; 4599 len = sg_len; 4600 if ((offset + sg_len) > 0x10000) 4601 len = 0x10000 - offset; 4602 4603 blen = len & 0xffff; 4604 ap->prd[idx].addr = cpu_to_le32(addr); 4605 if (blen == 0) { 4606 /* Some PATA chipsets like the CS5530 can't 4607 cope with 0x0000 meaning 64K as the spec says */ 4608 ap->prd[idx].flags_len = cpu_to_le32(0x8000); 4609 blen = 0x8000; 4610 ap->prd[++idx].addr = cpu_to_le32(addr + 0x8000); 4611 } 4612 ap->prd[idx].flags_len = cpu_to_le32(blen); 4613 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); 4614 4615 idx++; 4616 sg_len -= len; 4617 addr += len; 4618 } 4619 } 4620 4621 if (idx) 4622 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); 4623 } 4624 4625 /** 4626 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported 4627 * @qc: Metadata associated with taskfile to check 4628 * 4629 * Allow low-level driver to filter ATA PACKET commands, returning 4630 * a status indicating whether or not it is OK to use DMA for the 4631 * supplied PACKET command. 4632 * 4633 * LOCKING: 4634 * spin_lock_irqsave(host lock) 4635 * 4636 * RETURNS: 0 when ATAPI DMA can be used 4637 * nonzero otherwise 4638 */ 4639 int ata_check_atapi_dma(struct ata_queued_cmd *qc) 4640 { 4641 struct ata_port *ap = qc->ap; 4642 4643 /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a 4644 * few ATAPI devices choke on such DMA requests. 4645 */ 4646 if (unlikely(qc->nbytes & 15)) 4647 return 1; 4648 4649 if (ap->ops->check_atapi_dma) 4650 return ap->ops->check_atapi_dma(qc); 4651 4652 return 0; 4653 } 4654 4655 /** 4656 * atapi_qc_may_overflow - Check whether data transfer may overflow 4657 * @qc: ATA command in question 4658 * 4659 * ATAPI commands which transfer variable length data to host 4660 * might overflow due to application error or hardare bug. This 4661 * function checks whether overflow should be drained and ignored 4662 * for @qc. 4663 * 4664 * LOCKING: 4665 * None. 4666 * 4667 * RETURNS: 4668 * 1 if @qc may overflow; otherwise, 0. 4669 */ 4670 static int atapi_qc_may_overflow(struct ata_queued_cmd *qc) 4671 { 4672 if (qc->tf.protocol != ATA_PROT_ATAPI && 4673 qc->tf.protocol != ATA_PROT_ATAPI_DMA) 4674 return 0; 4675 4676 if (qc->tf.flags & ATA_TFLAG_WRITE) 4677 return 0; 4678 4679 switch (qc->cdb[0]) { 4680 case READ_10: 4681 case READ_12: 4682 case WRITE_10: 4683 case WRITE_12: 4684 case GPCMD_READ_CD: 4685 case GPCMD_READ_CD_MSF: 4686 return 0; 4687 } 4688 4689 return 1; 4690 } 4691 4692 /** 4693 * ata_std_qc_defer - Check whether a qc needs to be deferred 4694 * @qc: ATA command in question 4695 * 4696 * Non-NCQ commands cannot run with any other command, NCQ or 4697 * not. As upper layer only knows the queue depth, we are 4698 * responsible for maintaining exclusion. This function checks 4699 * whether a new command @qc can be issued. 4700 * 4701 * LOCKING: 4702 * spin_lock_irqsave(host lock) 4703 * 4704 * RETURNS: 4705 * ATA_DEFER_* if deferring is needed, 0 otherwise. 4706 */ 4707 int ata_std_qc_defer(struct ata_queued_cmd *qc) 4708 { 4709 struct ata_link *link = qc->dev->link; 4710 4711 if (qc->tf.protocol == ATA_PROT_NCQ) { 4712 if (!ata_tag_valid(link->active_tag)) 4713 return 0; 4714 } else { 4715 if (!ata_tag_valid(link->active_tag) && !link->sactive) 4716 return 0; 4717 } 4718 4719 return ATA_DEFER_LINK; 4720 } 4721 4722 /** 4723 * ata_qc_prep - Prepare taskfile for submission 4724 * @qc: Metadata associated with taskfile to be prepared 4725 * 4726 * Prepare ATA taskfile for submission. 4727 * 4728 * LOCKING: 4729 * spin_lock_irqsave(host lock) 4730 */ 4731 void ata_qc_prep(struct ata_queued_cmd *qc) 4732 { 4733 if (!(qc->flags & ATA_QCFLAG_DMAMAP)) 4734 return; 4735 4736 ata_fill_sg(qc); 4737 } 4738 4739 /** 4740 * ata_dumb_qc_prep - Prepare taskfile for submission 4741 * @qc: Metadata associated with taskfile to be prepared 4742 * 4743 * Prepare ATA taskfile for submission. 4744 * 4745 * LOCKING: 4746 * spin_lock_irqsave(host lock) 4747 */ 4748 void ata_dumb_qc_prep(struct ata_queued_cmd *qc) 4749 { 4750 if (!(qc->flags & ATA_QCFLAG_DMAMAP)) 4751 return; 4752 4753 ata_fill_sg_dumb(qc); 4754 } 4755 4756 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { } 4757 4758 /** 4759 * ata_sg_init_one - Associate command with memory buffer 4760 * @qc: Command to be associated 4761 * @buf: Memory buffer 4762 * @buflen: Length of memory buffer, in bytes. 4763 * 4764 * Initialize the data-related elements of queued_cmd @qc 4765 * to point to a single memory buffer, @buf of byte length @buflen. 4766 * 4767 * LOCKING: 4768 * spin_lock_irqsave(host lock) 4769 */ 4770 4771 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen) 4772 { 4773 qc->flags |= ATA_QCFLAG_SINGLE; 4774 4775 qc->__sg = &qc->sgent; 4776 qc->n_elem = 1; 4777 qc->orig_n_elem = 1; 4778 qc->buf_virt = buf; 4779 qc->nbytes = buflen; 4780 qc->cursg = qc->__sg; 4781 4782 sg_init_one(&qc->sgent, buf, buflen); 4783 } 4784 4785 /** 4786 * ata_sg_init - Associate command with scatter-gather table. 4787 * @qc: Command to be associated 4788 * @sg: Scatter-gather table. 4789 * @n_elem: Number of elements in s/g table. 4790 * 4791 * Initialize the data-related elements of queued_cmd @qc 4792 * to point to a scatter-gather table @sg, containing @n_elem 4793 * elements. 4794 * 4795 * LOCKING: 4796 * spin_lock_irqsave(host lock) 4797 */ 4798 4799 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, 4800 unsigned int n_elem) 4801 { 4802 qc->flags |= ATA_QCFLAG_SG; 4803 qc->__sg = sg; 4804 qc->n_elem = n_elem; 4805 qc->orig_n_elem = n_elem; 4806 qc->cursg = qc->__sg; 4807 } 4808 4809 /** 4810 * ata_sg_setup_one - DMA-map the memory buffer associated with a command. 4811 * @qc: Command with memory buffer to be mapped. 4812 * 4813 * DMA-map the memory buffer associated with queued_cmd @qc. 4814 * 4815 * LOCKING: 4816 * spin_lock_irqsave(host lock) 4817 * 4818 * RETURNS: 4819 * Zero on success, negative on error. 4820 */ 4821 4822 static int ata_sg_setup_one(struct ata_queued_cmd *qc) 4823 { 4824 struct ata_port *ap = qc->ap; 4825 int dir = qc->dma_dir; 4826 struct scatterlist *sg = qc->__sg; 4827 dma_addr_t dma_address; 4828 int trim_sg = 0; 4829 4830 /* we must lengthen transfers to end on a 32-bit boundary */ 4831 qc->pad_len = sg->length & 3; 4832 if (qc->pad_len) { 4833 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); 4834 struct scatterlist *psg = &qc->pad_sgent; 4835 4836 WARN_ON(qc->dev->class != ATA_DEV_ATAPI); 4837 4838 memset(pad_buf, 0, ATA_DMA_PAD_SZ); 4839 4840 if (qc->tf.flags & ATA_TFLAG_WRITE) 4841 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len, 4842 qc->pad_len); 4843 4844 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); 4845 sg_dma_len(psg) = ATA_DMA_PAD_SZ; 4846 /* trim sg */ 4847 sg->length -= qc->pad_len; 4848 if (sg->length == 0) 4849 trim_sg = 1; 4850 4851 DPRINTK("padding done, sg->length=%u pad_len=%u\n", 4852 sg->length, qc->pad_len); 4853 } 4854 4855 if (trim_sg) { 4856 qc->n_elem--; 4857 goto skip_map; 4858 } 4859 4860 dma_address = dma_map_single(ap->dev, qc->buf_virt, 4861 sg->length, dir); 4862 if (dma_mapping_error(dma_address)) { 4863 /* restore sg */ 4864 sg->length += qc->pad_len; 4865 return -1; 4866 } 4867 4868 sg_dma_address(sg) = dma_address; 4869 sg_dma_len(sg) = sg->length; 4870 4871 skip_map: 4872 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg), 4873 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); 4874 4875 return 0; 4876 } 4877 4878 /** 4879 * ata_sg_setup - DMA-map the scatter-gather table associated with a command. 4880 * @qc: Command with scatter-gather table to be mapped. 4881 * 4882 * DMA-map the scatter-gather table associated with queued_cmd @qc. 4883 * 4884 * LOCKING: 4885 * spin_lock_irqsave(host lock) 4886 * 4887 * RETURNS: 4888 * Zero on success, negative on error. 4889 * 4890 */ 4891 4892 static int ata_sg_setup(struct ata_queued_cmd *qc) 4893 { 4894 struct ata_port *ap = qc->ap; 4895 struct scatterlist *sg = qc->__sg; 4896 struct scatterlist *lsg = sg_last(qc->__sg, qc->n_elem); 4897 int n_elem, pre_n_elem, dir, trim_sg = 0; 4898 4899 VPRINTK("ENTER, ata%u\n", ap->print_id); 4900 WARN_ON(!(qc->flags & ATA_QCFLAG_SG)); 4901 4902 /* we must lengthen transfers to end on a 32-bit boundary */ 4903 qc->pad_len = lsg->length & 3; 4904 if (qc->pad_len) { 4905 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); 4906 struct scatterlist *psg = &qc->pad_sgent; 4907 unsigned int offset; 4908 4909 WARN_ON(qc->dev->class != ATA_DEV_ATAPI); 4910 4911 memset(pad_buf, 0, ATA_DMA_PAD_SZ); 4912 4913 /* 4914 * psg->page/offset are used to copy to-be-written 4915 * data in this function or read data in ata_sg_clean. 4916 */ 4917 offset = lsg->offset + lsg->length - qc->pad_len; 4918 sg_init_table(psg, 1); 4919 sg_set_page(psg, nth_page(sg_page(lsg), offset >> PAGE_SHIFT), 4920 qc->pad_len, offset_in_page(offset)); 4921 4922 if (qc->tf.flags & ATA_TFLAG_WRITE) { 4923 void *addr = kmap_atomic(sg_page(psg), KM_IRQ0); 4924 memcpy(pad_buf, addr + psg->offset, qc->pad_len); 4925 kunmap_atomic(addr, KM_IRQ0); 4926 } 4927 4928 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); 4929 sg_dma_len(psg) = ATA_DMA_PAD_SZ; 4930 /* trim last sg */ 4931 lsg->length -= qc->pad_len; 4932 if (lsg->length == 0) 4933 trim_sg = 1; 4934 4935 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n", 4936 qc->n_elem - 1, lsg->length, qc->pad_len); 4937 } 4938 4939 pre_n_elem = qc->n_elem; 4940 if (trim_sg && pre_n_elem) 4941 pre_n_elem--; 4942 4943 if (!pre_n_elem) { 4944 n_elem = 0; 4945 goto skip_map; 4946 } 4947 4948 dir = qc->dma_dir; 4949 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir); 4950 if (n_elem < 1) { 4951 /* restore last sg */ 4952 lsg->length += qc->pad_len; 4953 return -1; 4954 } 4955 4956 DPRINTK("%d sg elements mapped\n", n_elem); 4957 4958 skip_map: 4959 qc->n_elem = n_elem; 4960 4961 return 0; 4962 } 4963 4964 /** 4965 * swap_buf_le16 - swap halves of 16-bit words in place 4966 * @buf: Buffer to swap 4967 * @buf_words: Number of 16-bit words in buffer. 4968 * 4969 * Swap halves of 16-bit words if needed to convert from 4970 * little-endian byte order to native cpu byte order, or 4971 * vice-versa. 4972 * 4973 * LOCKING: 4974 * Inherited from caller. 4975 */ 4976 void swap_buf_le16(u16 *buf, unsigned int buf_words) 4977 { 4978 #ifdef __BIG_ENDIAN 4979 unsigned int i; 4980 4981 for (i = 0; i < buf_words; i++) 4982 buf[i] = le16_to_cpu(buf[i]); 4983 #endif /* __BIG_ENDIAN */ 4984 } 4985 4986 /** 4987 * ata_data_xfer - Transfer data by PIO 4988 * @adev: device to target 4989 * @buf: data buffer 4990 * @buflen: buffer length 4991 * @write_data: read/write 4992 * 4993 * Transfer data from/to the device data register by PIO. 4994 * 4995 * LOCKING: 4996 * Inherited from caller. 4997 */ 4998 void ata_data_xfer(struct ata_device *adev, unsigned char *buf, 4999 unsigned int buflen, int write_data) 5000 { 5001 struct ata_port *ap = adev->link->ap; 5002 unsigned int words = buflen >> 1; 5003 5004 /* Transfer multiple of 2 bytes */ 5005 if (write_data) 5006 iowrite16_rep(ap->ioaddr.data_addr, buf, words); 5007 else 5008 ioread16_rep(ap->ioaddr.data_addr, buf, words); 5009 5010 /* Transfer trailing 1 byte, if any. */ 5011 if (unlikely(buflen & 0x01)) { 5012 u16 align_buf[1] = { 0 }; 5013 unsigned char *trailing_buf = buf + buflen - 1; 5014 5015 if (write_data) { 5016 memcpy(align_buf, trailing_buf, 1); 5017 iowrite16(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); 5018 } else { 5019 align_buf[0] = cpu_to_le16(ioread16(ap->ioaddr.data_addr)); 5020 memcpy(trailing_buf, align_buf, 1); 5021 } 5022 } 5023 } 5024 5025 /** 5026 * ata_data_xfer_noirq - Transfer data by PIO 5027 * @adev: device to target 5028 * @buf: data buffer 5029 * @buflen: buffer length 5030 * @write_data: read/write 5031 * 5032 * Transfer data from/to the device data register by PIO. Do the 5033 * transfer with interrupts disabled. 5034 * 5035 * LOCKING: 5036 * Inherited from caller. 5037 */ 5038 void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf, 5039 unsigned int buflen, int write_data) 5040 { 5041 unsigned long flags; 5042 local_irq_save(flags); 5043 ata_data_xfer(adev, buf, buflen, write_data); 5044 local_irq_restore(flags); 5045 } 5046 5047 5048 /** 5049 * ata_pio_sector - Transfer a sector of data. 5050 * @qc: Command on going 5051 * 5052 * Transfer qc->sect_size bytes of data from/to the ATA device. 5053 * 5054 * LOCKING: 5055 * Inherited from caller. 5056 */ 5057 5058 static void ata_pio_sector(struct ata_queued_cmd *qc) 5059 { 5060 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); 5061 struct ata_port *ap = qc->ap; 5062 struct page *page; 5063 unsigned int offset; 5064 unsigned char *buf; 5065 5066 if (qc->curbytes == qc->nbytes - qc->sect_size) 5067 ap->hsm_task_state = HSM_ST_LAST; 5068 5069 page = sg_page(qc->cursg); 5070 offset = qc->cursg->offset + qc->cursg_ofs; 5071 5072 /* get the current page and offset */ 5073 page = nth_page(page, (offset >> PAGE_SHIFT)); 5074 offset %= PAGE_SIZE; 5075 5076 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); 5077 5078 if (PageHighMem(page)) { 5079 unsigned long flags; 5080 5081 /* FIXME: use a bounce buffer */ 5082 local_irq_save(flags); 5083 buf = kmap_atomic(page, KM_IRQ0); 5084 5085 /* do the actual data transfer */ 5086 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write); 5087 5088 kunmap_atomic(buf, KM_IRQ0); 5089 local_irq_restore(flags); 5090 } else { 5091 buf = page_address(page); 5092 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write); 5093 } 5094 5095 qc->curbytes += qc->sect_size; 5096 qc->cursg_ofs += qc->sect_size; 5097 5098 if (qc->cursg_ofs == qc->cursg->length) { 5099 qc->cursg = sg_next(qc->cursg); 5100 qc->cursg_ofs = 0; 5101 } 5102 } 5103 5104 /** 5105 * ata_pio_sectors - Transfer one or many sectors. 5106 * @qc: Command on going 5107 * 5108 * Transfer one or many sectors of data from/to the 5109 * ATA device for the DRQ request. 5110 * 5111 * LOCKING: 5112 * Inherited from caller. 5113 */ 5114 5115 static void ata_pio_sectors(struct ata_queued_cmd *qc) 5116 { 5117 if (is_multi_taskfile(&qc->tf)) { 5118 /* READ/WRITE MULTIPLE */ 5119 unsigned int nsect; 5120 5121 WARN_ON(qc->dev->multi_count == 0); 5122 5123 nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size, 5124 qc->dev->multi_count); 5125 while (nsect--) 5126 ata_pio_sector(qc); 5127 } else 5128 ata_pio_sector(qc); 5129 5130 ata_altstatus(qc->ap); /* flush */ 5131 } 5132 5133 /** 5134 * atapi_send_cdb - Write CDB bytes to hardware 5135 * @ap: Port to which ATAPI device is attached. 5136 * @qc: Taskfile currently active 5137 * 5138 * When device has indicated its readiness to accept 5139 * a CDB, this function is called. Send the CDB. 5140 * 5141 * LOCKING: 5142 * caller. 5143 */ 5144 5145 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc) 5146 { 5147 /* send SCSI cdb */ 5148 DPRINTK("send cdb\n"); 5149 WARN_ON(qc->dev->cdb_len < 12); 5150 5151 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1); 5152 ata_altstatus(ap); /* flush */ 5153 5154 switch (qc->tf.protocol) { 5155 case ATA_PROT_ATAPI: 5156 ap->hsm_task_state = HSM_ST; 5157 break; 5158 case ATA_PROT_ATAPI_NODATA: 5159 ap->hsm_task_state = HSM_ST_LAST; 5160 break; 5161 case ATA_PROT_ATAPI_DMA: 5162 ap->hsm_task_state = HSM_ST_LAST; 5163 /* initiate bmdma */ 5164 ap->ops->bmdma_start(qc); 5165 break; 5166 } 5167 } 5168 5169 /** 5170 * __atapi_pio_bytes - Transfer data from/to the ATAPI device. 5171 * @qc: Command on going 5172 * @bytes: number of bytes 5173 * 5174 * Transfer Transfer data from/to the ATAPI device. 5175 * 5176 * LOCKING: 5177 * Inherited from caller. 5178 * 5179 */ 5180 static int __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) 5181 { 5182 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); 5183 struct ata_port *ap = qc->ap; 5184 struct ata_eh_info *ehi = &qc->dev->link->eh_info; 5185 struct scatterlist *sg; 5186 struct page *page; 5187 unsigned char *buf; 5188 unsigned int offset, count; 5189 5190 next_sg: 5191 sg = qc->cursg; 5192 if (unlikely(!sg)) { 5193 /* 5194 * The end of qc->sg is reached and the device expects 5195 * more data to transfer. In order not to overrun qc->sg 5196 * and fulfill length specified in the byte count register, 5197 * - for read case, discard trailing data from the device 5198 * - for write case, padding zero data to the device 5199 */ 5200 u16 pad_buf[1] = { 0 }; 5201 unsigned int i; 5202 5203 if (bytes > qc->curbytes - qc->nbytes + ATAPI_MAX_DRAIN) { 5204 ata_ehi_push_desc(ehi, "too much trailing data " 5205 "buf=%u cur=%u bytes=%u", 5206 qc->nbytes, qc->curbytes, bytes); 5207 return -1; 5208 } 5209 5210 /* overflow is exptected for misc ATAPI commands */ 5211 if (bytes && !atapi_qc_may_overflow(qc)) 5212 ata_dev_printk(qc->dev, KERN_WARNING, "ATAPI %u bytes " 5213 "trailing data (cdb=%02x nbytes=%u)\n", 5214 bytes, qc->cdb[0], qc->nbytes); 5215 5216 for (i = 0; i < (bytes + 1) / 2; i++) 5217 ap->ops->data_xfer(qc->dev, (unsigned char *)pad_buf, 2, do_write); 5218 5219 qc->curbytes += bytes; 5220 5221 return 0; 5222 } 5223 5224 page = sg_page(sg); 5225 offset = sg->offset + qc->cursg_ofs; 5226 5227 /* get the current page and offset */ 5228 page = nth_page(page, (offset >> PAGE_SHIFT)); 5229 offset %= PAGE_SIZE; 5230 5231 /* don't overrun current sg */ 5232 count = min(sg->length - qc->cursg_ofs, bytes); 5233 5234 /* don't cross page boundaries */ 5235 count = min(count, (unsigned int)PAGE_SIZE - offset); 5236 5237 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); 5238 5239 if (PageHighMem(page)) { 5240 unsigned long flags; 5241 5242 /* FIXME: use bounce buffer */ 5243 local_irq_save(flags); 5244 buf = kmap_atomic(page, KM_IRQ0); 5245 5246 /* do the actual data transfer */ 5247 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); 5248 5249 kunmap_atomic(buf, KM_IRQ0); 5250 local_irq_restore(flags); 5251 } else { 5252 buf = page_address(page); 5253 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); 5254 } 5255 5256 bytes -= count; 5257 if ((count & 1) && bytes) 5258 bytes--; 5259 qc->curbytes += count; 5260 qc->cursg_ofs += count; 5261 5262 if (qc->cursg_ofs == sg->length) { 5263 qc->cursg = sg_next(qc->cursg); 5264 qc->cursg_ofs = 0; 5265 } 5266 5267 if (bytes) 5268 goto next_sg; 5269 5270 return 0; 5271 } 5272 5273 /** 5274 * atapi_pio_bytes - Transfer data from/to the ATAPI device. 5275 * @qc: Command on going 5276 * 5277 * Transfer Transfer data from/to the ATAPI device. 5278 * 5279 * LOCKING: 5280 * Inherited from caller. 5281 */ 5282 5283 static void atapi_pio_bytes(struct ata_queued_cmd *qc) 5284 { 5285 struct ata_port *ap = qc->ap; 5286 struct ata_device *dev = qc->dev; 5287 unsigned int ireason, bc_lo, bc_hi, bytes; 5288 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; 5289 5290 /* Abuse qc->result_tf for temp storage of intermediate TF 5291 * here to save some kernel stack usage. 5292 * For normal completion, qc->result_tf is not relevant. For 5293 * error, qc->result_tf is later overwritten by ata_qc_complete(). 5294 * So, the correctness of qc->result_tf is not affected. 5295 */ 5296 ap->ops->tf_read(ap, &qc->result_tf); 5297 ireason = qc->result_tf.nsect; 5298 bc_lo = qc->result_tf.lbam; 5299 bc_hi = qc->result_tf.lbah; 5300 bytes = (bc_hi << 8) | bc_lo; 5301 5302 /* shall be cleared to zero, indicating xfer of data */ 5303 if (ireason & (1 << 0)) 5304 goto err_out; 5305 5306 /* make sure transfer direction matches expected */ 5307 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; 5308 if (do_write != i_write) 5309 goto err_out; 5310 5311 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes); 5312 5313 if (__atapi_pio_bytes(qc, bytes)) 5314 goto err_out; 5315 ata_altstatus(ap); /* flush */ 5316 5317 return; 5318 5319 err_out: 5320 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n"); 5321 qc->err_mask |= AC_ERR_HSM; 5322 ap->hsm_task_state = HSM_ST_ERR; 5323 } 5324 5325 /** 5326 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue. 5327 * @ap: the target ata_port 5328 * @qc: qc on going 5329 * 5330 * RETURNS: 5331 * 1 if ok in workqueue, 0 otherwise. 5332 */ 5333 5334 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc) 5335 { 5336 if (qc->tf.flags & ATA_TFLAG_POLLING) 5337 return 1; 5338 5339 if (ap->hsm_task_state == HSM_ST_FIRST) { 5340 if (qc->tf.protocol == ATA_PROT_PIO && 5341 (qc->tf.flags & ATA_TFLAG_WRITE)) 5342 return 1; 5343 5344 if (is_atapi_taskfile(&qc->tf) && 5345 !(qc->dev->flags & ATA_DFLAG_CDB_INTR)) 5346 return 1; 5347 } 5348 5349 return 0; 5350 } 5351 5352 /** 5353 * ata_hsm_qc_complete - finish a qc running on standard HSM 5354 * @qc: Command to complete 5355 * @in_wq: 1 if called from workqueue, 0 otherwise 5356 * 5357 * Finish @qc which is running on standard HSM. 5358 * 5359 * LOCKING: 5360 * If @in_wq is zero, spin_lock_irqsave(host lock). 5361 * Otherwise, none on entry and grabs host lock. 5362 */ 5363 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq) 5364 { 5365 struct ata_port *ap = qc->ap; 5366 unsigned long flags; 5367 5368 if (ap->ops->error_handler) { 5369 if (in_wq) { 5370 spin_lock_irqsave(ap->lock, flags); 5371 5372 /* EH might have kicked in while host lock is 5373 * released. 5374 */ 5375 qc = ata_qc_from_tag(ap, qc->tag); 5376 if (qc) { 5377 if (likely(!(qc->err_mask & AC_ERR_HSM))) { 5378 ap->ops->irq_on(ap); 5379 ata_qc_complete(qc); 5380 } else 5381 ata_port_freeze(ap); 5382 } 5383 5384 spin_unlock_irqrestore(ap->lock, flags); 5385 } else { 5386 if (likely(!(qc->err_mask & AC_ERR_HSM))) 5387 ata_qc_complete(qc); 5388 else 5389 ata_port_freeze(ap); 5390 } 5391 } else { 5392 if (in_wq) { 5393 spin_lock_irqsave(ap->lock, flags); 5394 ap->ops->irq_on(ap); 5395 ata_qc_complete(qc); 5396 spin_unlock_irqrestore(ap->lock, flags); 5397 } else 5398 ata_qc_complete(qc); 5399 } 5400 } 5401 5402 /** 5403 * ata_hsm_move - move the HSM to the next state. 5404 * @ap: the target ata_port 5405 * @qc: qc on going 5406 * @status: current device status 5407 * @in_wq: 1 if called from workqueue, 0 otherwise 5408 * 5409 * RETURNS: 5410 * 1 when poll next status needed, 0 otherwise. 5411 */ 5412 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc, 5413 u8 status, int in_wq) 5414 { 5415 unsigned long flags = 0; 5416 int poll_next; 5417 5418 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0); 5419 5420 /* Make sure ata_qc_issue_prot() does not throw things 5421 * like DMA polling into the workqueue. Notice that 5422 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING). 5423 */ 5424 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc)); 5425 5426 fsm_start: 5427 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n", 5428 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status); 5429 5430 switch (ap->hsm_task_state) { 5431 case HSM_ST_FIRST: 5432 /* Send first data block or PACKET CDB */ 5433 5434 /* If polling, we will stay in the work queue after 5435 * sending the data. Otherwise, interrupt handler 5436 * takes over after sending the data. 5437 */ 5438 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING); 5439 5440 /* check device status */ 5441 if (unlikely((status & ATA_DRQ) == 0)) { 5442 /* handle BSY=0, DRQ=0 as error */ 5443 if (likely(status & (ATA_ERR | ATA_DF))) 5444 /* device stops HSM for abort/error */ 5445 qc->err_mask |= AC_ERR_DEV; 5446 else 5447 /* HSM violation. Let EH handle this */ 5448 qc->err_mask |= AC_ERR_HSM; 5449 5450 ap->hsm_task_state = HSM_ST_ERR; 5451 goto fsm_start; 5452 } 5453 5454 /* Device should not ask for data transfer (DRQ=1) 5455 * when it finds something wrong. 5456 * We ignore DRQ here and stop the HSM by 5457 * changing hsm_task_state to HSM_ST_ERR and 5458 * let the EH abort the command or reset the device. 5459 */ 5460 if (unlikely(status & (ATA_ERR | ATA_DF))) { 5461 /* Some ATAPI tape drives forget to clear the ERR bit 5462 * when doing the next command (mostly request sense). 5463 * We ignore ERR here to workaround and proceed sending 5464 * the CDB. 5465 */ 5466 if (!(qc->dev->horkage & ATA_HORKAGE_STUCK_ERR)) { 5467 ata_port_printk(ap, KERN_WARNING, 5468 "DRQ=1 with device error, " 5469 "dev_stat 0x%X\n", status); 5470 qc->err_mask |= AC_ERR_HSM; 5471 ap->hsm_task_state = HSM_ST_ERR; 5472 goto fsm_start; 5473 } 5474 } 5475 5476 /* Send the CDB (atapi) or the first data block (ata pio out). 5477 * During the state transition, interrupt handler shouldn't 5478 * be invoked before the data transfer is complete and 5479 * hsm_task_state is changed. Hence, the following locking. 5480 */ 5481 if (in_wq) 5482 spin_lock_irqsave(ap->lock, flags); 5483 5484 if (qc->tf.protocol == ATA_PROT_PIO) { 5485 /* PIO data out protocol. 5486 * send first data block. 5487 */ 5488 5489 /* ata_pio_sectors() might change the state 5490 * to HSM_ST_LAST. so, the state is changed here 5491 * before ata_pio_sectors(). 5492 */ 5493 ap->hsm_task_state = HSM_ST; 5494 ata_pio_sectors(qc); 5495 } else 5496 /* send CDB */ 5497 atapi_send_cdb(ap, qc); 5498 5499 if (in_wq) 5500 spin_unlock_irqrestore(ap->lock, flags); 5501 5502 /* if polling, ata_pio_task() handles the rest. 5503 * otherwise, interrupt handler takes over from here. 5504 */ 5505 break; 5506 5507 case HSM_ST: 5508 /* complete command or read/write the data register */ 5509 if (qc->tf.protocol == ATA_PROT_ATAPI) { 5510 /* ATAPI PIO protocol */ 5511 if ((status & ATA_DRQ) == 0) { 5512 /* No more data to transfer or device error. 5513 * Device error will be tagged in HSM_ST_LAST. 5514 */ 5515 ap->hsm_task_state = HSM_ST_LAST; 5516 goto fsm_start; 5517 } 5518 5519 /* Device should not ask for data transfer (DRQ=1) 5520 * when it finds something wrong. 5521 * We ignore DRQ here and stop the HSM by 5522 * changing hsm_task_state to HSM_ST_ERR and 5523 * let the EH abort the command or reset the device. 5524 */ 5525 if (unlikely(status & (ATA_ERR | ATA_DF))) { 5526 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with " 5527 "device error, dev_stat 0x%X\n", 5528 status); 5529 qc->err_mask |= AC_ERR_HSM; 5530 ap->hsm_task_state = HSM_ST_ERR; 5531 goto fsm_start; 5532 } 5533 5534 atapi_pio_bytes(qc); 5535 5536 if (unlikely(ap->hsm_task_state == HSM_ST_ERR)) 5537 /* bad ireason reported by device */ 5538 goto fsm_start; 5539 5540 } else { 5541 /* ATA PIO protocol */ 5542 if (unlikely((status & ATA_DRQ) == 0)) { 5543 /* handle BSY=0, DRQ=0 as error */ 5544 if (likely(status & (ATA_ERR | ATA_DF))) 5545 /* device stops HSM for abort/error */ 5546 qc->err_mask |= AC_ERR_DEV; 5547 else 5548 /* HSM violation. Let EH handle this. 5549 * Phantom devices also trigger this 5550 * condition. Mark hint. 5551 */ 5552 qc->err_mask |= AC_ERR_HSM | 5553 AC_ERR_NODEV_HINT; 5554 5555 ap->hsm_task_state = HSM_ST_ERR; 5556 goto fsm_start; 5557 } 5558 5559 /* For PIO reads, some devices may ask for 5560 * data transfer (DRQ=1) alone with ERR=1. 5561 * We respect DRQ here and transfer one 5562 * block of junk data before changing the 5563 * hsm_task_state to HSM_ST_ERR. 5564 * 5565 * For PIO writes, ERR=1 DRQ=1 doesn't make 5566 * sense since the data block has been 5567 * transferred to the device. 5568 */ 5569 if (unlikely(status & (ATA_ERR | ATA_DF))) { 5570 /* data might be corrputed */ 5571 qc->err_mask |= AC_ERR_DEV; 5572 5573 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) { 5574 ata_pio_sectors(qc); 5575 status = ata_wait_idle(ap); 5576 } 5577 5578 if (status & (ATA_BUSY | ATA_DRQ)) 5579 qc->err_mask |= AC_ERR_HSM; 5580 5581 /* ata_pio_sectors() might change the 5582 * state to HSM_ST_LAST. so, the state 5583 * is changed after ata_pio_sectors(). 5584 */ 5585 ap->hsm_task_state = HSM_ST_ERR; 5586 goto fsm_start; 5587 } 5588 5589 ata_pio_sectors(qc); 5590 5591 if (ap->hsm_task_state == HSM_ST_LAST && 5592 (!(qc->tf.flags & ATA_TFLAG_WRITE))) { 5593 /* all data read */ 5594 status = ata_wait_idle(ap); 5595 goto fsm_start; 5596 } 5597 } 5598 5599 poll_next = 1; 5600 break; 5601 5602 case HSM_ST_LAST: 5603 if (unlikely(!ata_ok(status))) { 5604 qc->err_mask |= __ac_err_mask(status); 5605 ap->hsm_task_state = HSM_ST_ERR; 5606 goto fsm_start; 5607 } 5608 5609 /* no more data to transfer */ 5610 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n", 5611 ap->print_id, qc->dev->devno, status); 5612 5613 WARN_ON(qc->err_mask); 5614 5615 ap->hsm_task_state = HSM_ST_IDLE; 5616 5617 /* complete taskfile transaction */ 5618 ata_hsm_qc_complete(qc, in_wq); 5619 5620 poll_next = 0; 5621 break; 5622 5623 case HSM_ST_ERR: 5624 /* make sure qc->err_mask is available to 5625 * know what's wrong and recover 5626 */ 5627 WARN_ON(qc->err_mask == 0); 5628 5629 ap->hsm_task_state = HSM_ST_IDLE; 5630 5631 /* complete taskfile transaction */ 5632 ata_hsm_qc_complete(qc, in_wq); 5633 5634 poll_next = 0; 5635 break; 5636 default: 5637 poll_next = 0; 5638 BUG(); 5639 } 5640 5641 return poll_next; 5642 } 5643 5644 static void ata_pio_task(struct work_struct *work) 5645 { 5646 struct ata_port *ap = 5647 container_of(work, struct ata_port, port_task.work); 5648 struct ata_queued_cmd *qc = ap->port_task_data; 5649 u8 status; 5650 int poll_next; 5651 5652 fsm_start: 5653 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE); 5654 5655 /* 5656 * This is purely heuristic. This is a fast path. 5657 * Sometimes when we enter, BSY will be cleared in 5658 * a chk-status or two. If not, the drive is probably seeking 5659 * or something. Snooze for a couple msecs, then 5660 * chk-status again. If still busy, queue delayed work. 5661 */ 5662 status = ata_busy_wait(ap, ATA_BUSY, 5); 5663 if (status & ATA_BUSY) { 5664 msleep(2); 5665 status = ata_busy_wait(ap, ATA_BUSY, 10); 5666 if (status & ATA_BUSY) { 5667 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE); 5668 return; 5669 } 5670 } 5671 5672 /* move the HSM */ 5673 poll_next = ata_hsm_move(ap, qc, status, 1); 5674 5675 /* another command or interrupt handler 5676 * may be running at this point. 5677 */ 5678 if (poll_next) 5679 goto fsm_start; 5680 } 5681 5682 /** 5683 * ata_qc_new - Request an available ATA command, for queueing 5684 * @ap: Port associated with device @dev 5685 * @dev: Device from whom we request an available command structure 5686 * 5687 * LOCKING: 5688 * None. 5689 */ 5690 5691 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) 5692 { 5693 struct ata_queued_cmd *qc = NULL; 5694 unsigned int i; 5695 5696 /* no command while frozen */ 5697 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN)) 5698 return NULL; 5699 5700 /* the last tag is reserved for internal command. */ 5701 for (i = 0; i < ATA_MAX_QUEUE - 1; i++) 5702 if (!test_and_set_bit(i, &ap->qc_allocated)) { 5703 qc = __ata_qc_from_tag(ap, i); 5704 break; 5705 } 5706 5707 if (qc) 5708 qc->tag = i; 5709 5710 return qc; 5711 } 5712 5713 /** 5714 * ata_qc_new_init - Request an available ATA command, and initialize it 5715 * @dev: Device from whom we request an available command structure 5716 * 5717 * LOCKING: 5718 * None. 5719 */ 5720 5721 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev) 5722 { 5723 struct ata_port *ap = dev->link->ap; 5724 struct ata_queued_cmd *qc; 5725 5726 qc = ata_qc_new(ap); 5727 if (qc) { 5728 qc->scsicmd = NULL; 5729 qc->ap = ap; 5730 qc->dev = dev; 5731 5732 ata_qc_reinit(qc); 5733 } 5734 5735 return qc; 5736 } 5737 5738 /** 5739 * ata_qc_free - free unused ata_queued_cmd 5740 * @qc: Command to complete 5741 * 5742 * Designed to free unused ata_queued_cmd object 5743 * in case something prevents using it. 5744 * 5745 * LOCKING: 5746 * spin_lock_irqsave(host lock) 5747 */ 5748 void ata_qc_free(struct ata_queued_cmd *qc) 5749 { 5750 struct ata_port *ap = qc->ap; 5751 unsigned int tag; 5752 5753 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ 5754 5755 qc->flags = 0; 5756 tag = qc->tag; 5757 if (likely(ata_tag_valid(tag))) { 5758 qc->tag = ATA_TAG_POISON; 5759 clear_bit(tag, &ap->qc_allocated); 5760 } 5761 } 5762 5763 void __ata_qc_complete(struct ata_queued_cmd *qc) 5764 { 5765 struct ata_port *ap = qc->ap; 5766 struct ata_link *link = qc->dev->link; 5767 5768 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ 5769 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE)); 5770 5771 if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) 5772 ata_sg_clean(qc); 5773 5774 /* command should be marked inactive atomically with qc completion */ 5775 if (qc->tf.protocol == ATA_PROT_NCQ) { 5776 link->sactive &= ~(1 << qc->tag); 5777 if (!link->sactive) 5778 ap->nr_active_links--; 5779 } else { 5780 link->active_tag = ATA_TAG_POISON; 5781 ap->nr_active_links--; 5782 } 5783 5784 /* clear exclusive status */ 5785 if (unlikely(qc->flags & ATA_QCFLAG_CLEAR_EXCL && 5786 ap->excl_link == link)) 5787 ap->excl_link = NULL; 5788 5789 /* atapi: mark qc as inactive to prevent the interrupt handler 5790 * from completing the command twice later, before the error handler 5791 * is called. (when rc != 0 and atapi request sense is needed) 5792 */ 5793 qc->flags &= ~ATA_QCFLAG_ACTIVE; 5794 ap->qc_active &= ~(1 << qc->tag); 5795 5796 /* call completion callback */ 5797 qc->complete_fn(qc); 5798 } 5799 5800 static void fill_result_tf(struct ata_queued_cmd *qc) 5801 { 5802 struct ata_port *ap = qc->ap; 5803 5804 qc->result_tf.flags = qc->tf.flags; 5805 ap->ops->tf_read(ap, &qc->result_tf); 5806 } 5807 5808 /** 5809 * ata_qc_complete - Complete an active ATA command 5810 * @qc: Command to complete 5811 * @err_mask: ATA Status register contents 5812 * 5813 * Indicate to the mid and upper layers that an ATA 5814 * command has completed, with either an ok or not-ok status. 5815 * 5816 * LOCKING: 5817 * spin_lock_irqsave(host lock) 5818 */ 5819 void ata_qc_complete(struct ata_queued_cmd *qc) 5820 { 5821 struct ata_port *ap = qc->ap; 5822 5823 /* XXX: New EH and old EH use different mechanisms to 5824 * synchronize EH with regular execution path. 5825 * 5826 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED. 5827 * Normal execution path is responsible for not accessing a 5828 * failed qc. libata core enforces the rule by returning NULL 5829 * from ata_qc_from_tag() for failed qcs. 5830 * 5831 * Old EH depends on ata_qc_complete() nullifying completion 5832 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does 5833 * not synchronize with interrupt handler. Only PIO task is 5834 * taken care of. 5835 */ 5836 if (ap->ops->error_handler) { 5837 struct ata_device *dev = qc->dev; 5838 struct ata_eh_info *ehi = &dev->link->eh_info; 5839 5840 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN); 5841 5842 if (unlikely(qc->err_mask)) 5843 qc->flags |= ATA_QCFLAG_FAILED; 5844 5845 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) { 5846 if (!ata_tag_internal(qc->tag)) { 5847 /* always fill result TF for failed qc */ 5848 fill_result_tf(qc); 5849 ata_qc_schedule_eh(qc); 5850 return; 5851 } 5852 } 5853 5854 /* read result TF if requested */ 5855 if (qc->flags & ATA_QCFLAG_RESULT_TF) 5856 fill_result_tf(qc); 5857 5858 /* Some commands need post-processing after successful 5859 * completion. 5860 */ 5861 switch (qc->tf.command) { 5862 case ATA_CMD_SET_FEATURES: 5863 if (qc->tf.feature != SETFEATURES_WC_ON && 5864 qc->tf.feature != SETFEATURES_WC_OFF) 5865 break; 5866 /* fall through */ 5867 case ATA_CMD_INIT_DEV_PARAMS: /* CHS translation changed */ 5868 case ATA_CMD_SET_MULTI: /* multi_count changed */ 5869 /* revalidate device */ 5870 ehi->dev_action[dev->devno] |= ATA_EH_REVALIDATE; 5871 ata_port_schedule_eh(ap); 5872 break; 5873 5874 case ATA_CMD_SLEEP: 5875 dev->flags |= ATA_DFLAG_SLEEPING; 5876 break; 5877 } 5878 5879 __ata_qc_complete(qc); 5880 } else { 5881 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED) 5882 return; 5883 5884 /* read result TF if failed or requested */ 5885 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF) 5886 fill_result_tf(qc); 5887 5888 __ata_qc_complete(qc); 5889 } 5890 } 5891 5892 /** 5893 * ata_qc_complete_multiple - Complete multiple qcs successfully 5894 * @ap: port in question 5895 * @qc_active: new qc_active mask 5896 * @finish_qc: LLDD callback invoked before completing a qc 5897 * 5898 * Complete in-flight commands. This functions is meant to be 5899 * called from low-level driver's interrupt routine to complete 5900 * requests normally. ap->qc_active and @qc_active is compared 5901 * and commands are completed accordingly. 5902 * 5903 * LOCKING: 5904 * spin_lock_irqsave(host lock) 5905 * 5906 * RETURNS: 5907 * Number of completed commands on success, -errno otherwise. 5908 */ 5909 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active, 5910 void (*finish_qc)(struct ata_queued_cmd *)) 5911 { 5912 int nr_done = 0; 5913 u32 done_mask; 5914 int i; 5915 5916 done_mask = ap->qc_active ^ qc_active; 5917 5918 if (unlikely(done_mask & qc_active)) { 5919 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition " 5920 "(%08x->%08x)\n", ap->qc_active, qc_active); 5921 return -EINVAL; 5922 } 5923 5924 for (i = 0; i < ATA_MAX_QUEUE; i++) { 5925 struct ata_queued_cmd *qc; 5926 5927 if (!(done_mask & (1 << i))) 5928 continue; 5929 5930 if ((qc = ata_qc_from_tag(ap, i))) { 5931 if (finish_qc) 5932 finish_qc(qc); 5933 ata_qc_complete(qc); 5934 nr_done++; 5935 } 5936 } 5937 5938 return nr_done; 5939 } 5940 5941 static inline int ata_should_dma_map(struct ata_queued_cmd *qc) 5942 { 5943 struct ata_port *ap = qc->ap; 5944 5945 switch (qc->tf.protocol) { 5946 case ATA_PROT_NCQ: 5947 case ATA_PROT_DMA: 5948 case ATA_PROT_ATAPI_DMA: 5949 return 1; 5950 5951 case ATA_PROT_ATAPI: 5952 case ATA_PROT_PIO: 5953 if (ap->flags & ATA_FLAG_PIO_DMA) 5954 return 1; 5955 5956 /* fall through */ 5957 5958 default: 5959 return 0; 5960 } 5961 5962 /* never reached */ 5963 } 5964 5965 /** 5966 * ata_qc_issue - issue taskfile to device 5967 * @qc: command to issue to device 5968 * 5969 * Prepare an ATA command to submission to device. 5970 * This includes mapping the data into a DMA-able 5971 * area, filling in the S/G table, and finally 5972 * writing the taskfile to hardware, starting the command. 5973 * 5974 * LOCKING: 5975 * spin_lock_irqsave(host lock) 5976 */ 5977 void ata_qc_issue(struct ata_queued_cmd *qc) 5978 { 5979 struct ata_port *ap = qc->ap; 5980 struct ata_link *link = qc->dev->link; 5981 5982 /* Make sure only one non-NCQ command is outstanding. The 5983 * check is skipped for old EH because it reuses active qc to 5984 * request ATAPI sense. 5985 */ 5986 WARN_ON(ap->ops->error_handler && ata_tag_valid(link->active_tag)); 5987 5988 if (qc->tf.protocol == ATA_PROT_NCQ) { 5989 WARN_ON(link->sactive & (1 << qc->tag)); 5990 5991 if (!link->sactive) 5992 ap->nr_active_links++; 5993 link->sactive |= 1 << qc->tag; 5994 } else { 5995 WARN_ON(link->sactive); 5996 5997 ap->nr_active_links++; 5998 link->active_tag = qc->tag; 5999 } 6000 6001 qc->flags |= ATA_QCFLAG_ACTIVE; 6002 ap->qc_active |= 1 << qc->tag; 6003 6004 if (ata_should_dma_map(qc)) { 6005 if (qc->flags & ATA_QCFLAG_SG) { 6006 if (ata_sg_setup(qc)) 6007 goto sg_err; 6008 } else if (qc->flags & ATA_QCFLAG_SINGLE) { 6009 if (ata_sg_setup_one(qc)) 6010 goto sg_err; 6011 } 6012 } else { 6013 qc->flags &= ~ATA_QCFLAG_DMAMAP; 6014 } 6015 6016 /* if device is sleeping, schedule softreset and abort the link */ 6017 if (unlikely(qc->dev->flags & ATA_DFLAG_SLEEPING)) { 6018 link->eh_info.action |= ATA_EH_SOFTRESET; 6019 ata_ehi_push_desc(&link->eh_info, "waking up from sleep"); 6020 ata_link_abort(link); 6021 return; 6022 } 6023 6024 ap->ops->qc_prep(qc); 6025 6026 qc->err_mask |= ap->ops->qc_issue(qc); 6027 if (unlikely(qc->err_mask)) 6028 goto err; 6029 return; 6030 6031 sg_err: 6032 qc->flags &= ~ATA_QCFLAG_DMAMAP; 6033 qc->err_mask |= AC_ERR_SYSTEM; 6034 err: 6035 ata_qc_complete(qc); 6036 } 6037 6038 /** 6039 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner 6040 * @qc: command to issue to device 6041 * 6042 * Using various libata functions and hooks, this function 6043 * starts an ATA command. ATA commands are grouped into 6044 * classes called "protocols", and issuing each type of protocol 6045 * is slightly different. 6046 * 6047 * May be used as the qc_issue() entry in ata_port_operations. 6048 * 6049 * LOCKING: 6050 * spin_lock_irqsave(host lock) 6051 * 6052 * RETURNS: 6053 * Zero on success, AC_ERR_* mask on failure 6054 */ 6055 6056 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc) 6057 { 6058 struct ata_port *ap = qc->ap; 6059 6060 /* Use polling pio if the LLD doesn't handle 6061 * interrupt driven pio and atapi CDB interrupt. 6062 */ 6063 if (ap->flags & ATA_FLAG_PIO_POLLING) { 6064 switch (qc->tf.protocol) { 6065 case ATA_PROT_PIO: 6066 case ATA_PROT_NODATA: 6067 case ATA_PROT_ATAPI: 6068 case ATA_PROT_ATAPI_NODATA: 6069 qc->tf.flags |= ATA_TFLAG_POLLING; 6070 break; 6071 case ATA_PROT_ATAPI_DMA: 6072 if (qc->dev->flags & ATA_DFLAG_CDB_INTR) 6073 /* see ata_dma_blacklisted() */ 6074 BUG(); 6075 break; 6076 default: 6077 break; 6078 } 6079 } 6080 6081 /* select the device */ 6082 ata_dev_select(ap, qc->dev->devno, 1, 0); 6083 6084 /* start the command */ 6085 switch (qc->tf.protocol) { 6086 case ATA_PROT_NODATA: 6087 if (qc->tf.flags & ATA_TFLAG_POLLING) 6088 ata_qc_set_polling(qc); 6089 6090 ata_tf_to_host(ap, &qc->tf); 6091 ap->hsm_task_state = HSM_ST_LAST; 6092 6093 if (qc->tf.flags & ATA_TFLAG_POLLING) 6094 ata_port_queue_task(ap, ata_pio_task, qc, 0); 6095 6096 break; 6097 6098 case ATA_PROT_DMA: 6099 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); 6100 6101 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ 6102 ap->ops->bmdma_setup(qc); /* set up bmdma */ 6103 ap->ops->bmdma_start(qc); /* initiate bmdma */ 6104 ap->hsm_task_state = HSM_ST_LAST; 6105 break; 6106 6107 case ATA_PROT_PIO: 6108 if (qc->tf.flags & ATA_TFLAG_POLLING) 6109 ata_qc_set_polling(qc); 6110 6111 ata_tf_to_host(ap, &qc->tf); 6112 6113 if (qc->tf.flags & ATA_TFLAG_WRITE) { 6114 /* PIO data out protocol */ 6115 ap->hsm_task_state = HSM_ST_FIRST; 6116 ata_port_queue_task(ap, ata_pio_task, qc, 0); 6117 6118 /* always send first data block using 6119 * the ata_pio_task() codepath. 6120 */ 6121 } else { 6122 /* PIO data in protocol */ 6123 ap->hsm_task_state = HSM_ST; 6124 6125 if (qc->tf.flags & ATA_TFLAG_POLLING) 6126 ata_port_queue_task(ap, ata_pio_task, qc, 0); 6127 6128 /* if polling, ata_pio_task() handles the rest. 6129 * otherwise, interrupt handler takes over from here. 6130 */ 6131 } 6132 6133 break; 6134 6135 case ATA_PROT_ATAPI: 6136 case ATA_PROT_ATAPI_NODATA: 6137 if (qc->tf.flags & ATA_TFLAG_POLLING) 6138 ata_qc_set_polling(qc); 6139 6140 ata_tf_to_host(ap, &qc->tf); 6141 6142 ap->hsm_task_state = HSM_ST_FIRST; 6143 6144 /* send cdb by polling if no cdb interrupt */ 6145 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) || 6146 (qc->tf.flags & ATA_TFLAG_POLLING)) 6147 ata_port_queue_task(ap, ata_pio_task, qc, 0); 6148 break; 6149 6150 case ATA_PROT_ATAPI_DMA: 6151 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); 6152 6153 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ 6154 ap->ops->bmdma_setup(qc); /* set up bmdma */ 6155 ap->hsm_task_state = HSM_ST_FIRST; 6156 6157 /* send cdb by polling if no cdb interrupt */ 6158 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) 6159 ata_port_queue_task(ap, ata_pio_task, qc, 0); 6160 break; 6161 6162 default: 6163 WARN_ON(1); 6164 return AC_ERR_SYSTEM; 6165 } 6166 6167 return 0; 6168 } 6169 6170 /** 6171 * ata_host_intr - Handle host interrupt for given (port, task) 6172 * @ap: Port on which interrupt arrived (possibly...) 6173 * @qc: Taskfile currently active in engine 6174 * 6175 * Handle host interrupt for given queued command. Currently, 6176 * only DMA interrupts are handled. All other commands are 6177 * handled via polling with interrupts disabled (nIEN bit). 6178 * 6179 * LOCKING: 6180 * spin_lock_irqsave(host lock) 6181 * 6182 * RETURNS: 6183 * One if interrupt was handled, zero if not (shared irq). 6184 */ 6185 6186 inline unsigned int ata_host_intr(struct ata_port *ap, 6187 struct ata_queued_cmd *qc) 6188 { 6189 struct ata_eh_info *ehi = &ap->link.eh_info; 6190 u8 status, host_stat = 0; 6191 6192 VPRINTK("ata%u: protocol %d task_state %d\n", 6193 ap->print_id, qc->tf.protocol, ap->hsm_task_state); 6194 6195 /* Check whether we are expecting interrupt in this state */ 6196 switch (ap->hsm_task_state) { 6197 case HSM_ST_FIRST: 6198 /* Some pre-ATAPI-4 devices assert INTRQ 6199 * at this state when ready to receive CDB. 6200 */ 6201 6202 /* Check the ATA_DFLAG_CDB_INTR flag is enough here. 6203 * The flag was turned on only for atapi devices. 6204 * No need to check is_atapi_taskfile(&qc->tf) again. 6205 */ 6206 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) 6207 goto idle_irq; 6208 break; 6209 case HSM_ST_LAST: 6210 if (qc->tf.protocol == ATA_PROT_DMA || 6211 qc->tf.protocol == ATA_PROT_ATAPI_DMA) { 6212 /* check status of DMA engine */ 6213 host_stat = ap->ops->bmdma_status(ap); 6214 VPRINTK("ata%u: host_stat 0x%X\n", 6215 ap->print_id, host_stat); 6216 6217 /* if it's not our irq... */ 6218 if (!(host_stat & ATA_DMA_INTR)) 6219 goto idle_irq; 6220 6221 /* before we do anything else, clear DMA-Start bit */ 6222 ap->ops->bmdma_stop(qc); 6223 6224 if (unlikely(host_stat & ATA_DMA_ERR)) { 6225 /* error when transfering data to/from memory */ 6226 qc->err_mask |= AC_ERR_HOST_BUS; 6227 ap->hsm_task_state = HSM_ST_ERR; 6228 } 6229 } 6230 break; 6231 case HSM_ST: 6232 break; 6233 default: 6234 goto idle_irq; 6235 } 6236 6237 /* check altstatus */ 6238 status = ata_altstatus(ap); 6239 if (status & ATA_BUSY) 6240 goto idle_irq; 6241 6242 /* check main status, clearing INTRQ */ 6243 status = ata_chk_status(ap); 6244 if (unlikely(status & ATA_BUSY)) 6245 goto idle_irq; 6246 6247 /* ack bmdma irq events */ 6248 ap->ops->irq_clear(ap); 6249 6250 ata_hsm_move(ap, qc, status, 0); 6251 6252 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA || 6253 qc->tf.protocol == ATA_PROT_ATAPI_DMA)) 6254 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat); 6255 6256 return 1; /* irq handled */ 6257 6258 idle_irq: 6259 ap->stats.idle_irq++; 6260 6261 #ifdef ATA_IRQ_TRAP 6262 if ((ap->stats.idle_irq % 1000) == 0) { 6263 ata_chk_status(ap); 6264 ap->ops->irq_clear(ap); 6265 ata_port_printk(ap, KERN_WARNING, "irq trap\n"); 6266 return 1; 6267 } 6268 #endif 6269 return 0; /* irq not handled */ 6270 } 6271 6272 /** 6273 * ata_interrupt - Default ATA host interrupt handler 6274 * @irq: irq line (unused) 6275 * @dev_instance: pointer to our ata_host information structure 6276 * 6277 * Default interrupt handler for PCI IDE devices. Calls 6278 * ata_host_intr() for each port that is not disabled. 6279 * 6280 * LOCKING: 6281 * Obtains host lock during operation. 6282 * 6283 * RETURNS: 6284 * IRQ_NONE or IRQ_HANDLED. 6285 */ 6286 6287 irqreturn_t ata_interrupt(int irq, void *dev_instance) 6288 { 6289 struct ata_host *host = dev_instance; 6290 unsigned int i; 6291 unsigned int handled = 0; 6292 unsigned long flags; 6293 6294 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ 6295 spin_lock_irqsave(&host->lock, flags); 6296 6297 for (i = 0; i < host->n_ports; i++) { 6298 struct ata_port *ap; 6299 6300 ap = host->ports[i]; 6301 if (ap && 6302 !(ap->flags & ATA_FLAG_DISABLED)) { 6303 struct ata_queued_cmd *qc; 6304 6305 qc = ata_qc_from_tag(ap, ap->link.active_tag); 6306 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && 6307 (qc->flags & ATA_QCFLAG_ACTIVE)) 6308 handled |= ata_host_intr(ap, qc); 6309 } 6310 } 6311 6312 spin_unlock_irqrestore(&host->lock, flags); 6313 6314 return IRQ_RETVAL(handled); 6315 } 6316 6317 /** 6318 * sata_scr_valid - test whether SCRs are accessible 6319 * @link: ATA link to test SCR accessibility for 6320 * 6321 * Test whether SCRs are accessible for @link. 6322 * 6323 * LOCKING: 6324 * None. 6325 * 6326 * RETURNS: 6327 * 1 if SCRs are accessible, 0 otherwise. 6328 */ 6329 int sata_scr_valid(struct ata_link *link) 6330 { 6331 struct ata_port *ap = link->ap; 6332 6333 return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read; 6334 } 6335 6336 /** 6337 * sata_scr_read - read SCR register of the specified port 6338 * @link: ATA link to read SCR for 6339 * @reg: SCR to read 6340 * @val: Place to store read value 6341 * 6342 * Read SCR register @reg of @link into *@val. This function is 6343 * guaranteed to succeed if @link is ap->link, the cable type of 6344 * the port is SATA and the port implements ->scr_read. 6345 * 6346 * LOCKING: 6347 * None if @link is ap->link. Kernel thread context otherwise. 6348 * 6349 * RETURNS: 6350 * 0 on success, negative errno on failure. 6351 */ 6352 int sata_scr_read(struct ata_link *link, int reg, u32 *val) 6353 { 6354 if (ata_is_host_link(link)) { 6355 struct ata_port *ap = link->ap; 6356 6357 if (sata_scr_valid(link)) 6358 return ap->ops->scr_read(ap, reg, val); 6359 return -EOPNOTSUPP; 6360 } 6361 6362 return sata_pmp_scr_read(link, reg, val); 6363 } 6364 6365 /** 6366 * sata_scr_write - write SCR register of the specified port 6367 * @link: ATA link to write SCR for 6368 * @reg: SCR to write 6369 * @val: value to write 6370 * 6371 * Write @val to SCR register @reg of @link. This function is 6372 * guaranteed to succeed if @link is ap->link, the cable type of 6373 * the port is SATA and the port implements ->scr_read. 6374 * 6375 * LOCKING: 6376 * None if @link is ap->link. Kernel thread context otherwise. 6377 * 6378 * RETURNS: 6379 * 0 on success, negative errno on failure. 6380 */ 6381 int sata_scr_write(struct ata_link *link, int reg, u32 val) 6382 { 6383 if (ata_is_host_link(link)) { 6384 struct ata_port *ap = link->ap; 6385 6386 if (sata_scr_valid(link)) 6387 return ap->ops->scr_write(ap, reg, val); 6388 return -EOPNOTSUPP; 6389 } 6390 6391 return sata_pmp_scr_write(link, reg, val); 6392 } 6393 6394 /** 6395 * sata_scr_write_flush - write SCR register of the specified port and flush 6396 * @link: ATA link to write SCR for 6397 * @reg: SCR to write 6398 * @val: value to write 6399 * 6400 * This function is identical to sata_scr_write() except that this 6401 * function performs flush after writing to the register. 6402 * 6403 * LOCKING: 6404 * None if @link is ap->link. Kernel thread context otherwise. 6405 * 6406 * RETURNS: 6407 * 0 on success, negative errno on failure. 6408 */ 6409 int sata_scr_write_flush(struct ata_link *link, int reg, u32 val) 6410 { 6411 if (ata_is_host_link(link)) { 6412 struct ata_port *ap = link->ap; 6413 int rc; 6414 6415 if (sata_scr_valid(link)) { 6416 rc = ap->ops->scr_write(ap, reg, val); 6417 if (rc == 0) 6418 rc = ap->ops->scr_read(ap, reg, &val); 6419 return rc; 6420 } 6421 return -EOPNOTSUPP; 6422 } 6423 6424 return sata_pmp_scr_write(link, reg, val); 6425 } 6426 6427 /** 6428 * ata_link_online - test whether the given link is online 6429 * @link: ATA link to test 6430 * 6431 * Test whether @link is online. Note that this function returns 6432 * 0 if online status of @link cannot be obtained, so 6433 * ata_link_online(link) != !ata_link_offline(link). 6434 * 6435 * LOCKING: 6436 * None. 6437 * 6438 * RETURNS: 6439 * 1 if the port online status is available and online. 6440 */ 6441 int ata_link_online(struct ata_link *link) 6442 { 6443 u32 sstatus; 6444 6445 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 && 6446 (sstatus & 0xf) == 0x3) 6447 return 1; 6448 return 0; 6449 } 6450 6451 /** 6452 * ata_link_offline - test whether the given link is offline 6453 * @link: ATA link to test 6454 * 6455 * Test whether @link is offline. Note that this function 6456 * returns 0 if offline status of @link cannot be obtained, so 6457 * ata_link_online(link) != !ata_link_offline(link). 6458 * 6459 * LOCKING: 6460 * None. 6461 * 6462 * RETURNS: 6463 * 1 if the port offline status is available and offline. 6464 */ 6465 int ata_link_offline(struct ata_link *link) 6466 { 6467 u32 sstatus; 6468 6469 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 && 6470 (sstatus & 0xf) != 0x3) 6471 return 1; 6472 return 0; 6473 } 6474 6475 int ata_flush_cache(struct ata_device *dev) 6476 { 6477 unsigned int err_mask; 6478 u8 cmd; 6479 6480 if (!ata_try_flush_cache(dev)) 6481 return 0; 6482 6483 if (dev->flags & ATA_DFLAG_FLUSH_EXT) 6484 cmd = ATA_CMD_FLUSH_EXT; 6485 else 6486 cmd = ATA_CMD_FLUSH; 6487 6488 /* This is wrong. On a failed flush we get back the LBA of the lost 6489 sector and we should (assuming it wasn't aborted as unknown) issue 6490 a further flush command to continue the writeback until it 6491 does not error */ 6492 err_mask = ata_do_simple_cmd(dev, cmd); 6493 if (err_mask) { 6494 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n"); 6495 return -EIO; 6496 } 6497 6498 return 0; 6499 } 6500 6501 #ifdef CONFIG_PM 6502 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg, 6503 unsigned int action, unsigned int ehi_flags, 6504 int wait) 6505 { 6506 unsigned long flags; 6507 int i, rc; 6508 6509 for (i = 0; i < host->n_ports; i++) { 6510 struct ata_port *ap = host->ports[i]; 6511 struct ata_link *link; 6512 6513 /* Previous resume operation might still be in 6514 * progress. Wait for PM_PENDING to clear. 6515 */ 6516 if (ap->pflags & ATA_PFLAG_PM_PENDING) { 6517 ata_port_wait_eh(ap); 6518 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); 6519 } 6520 6521 /* request PM ops to EH */ 6522 spin_lock_irqsave(ap->lock, flags); 6523 6524 ap->pm_mesg = mesg; 6525 if (wait) { 6526 rc = 0; 6527 ap->pm_result = &rc; 6528 } 6529 6530 ap->pflags |= ATA_PFLAG_PM_PENDING; 6531 __ata_port_for_each_link(link, ap) { 6532 link->eh_info.action |= action; 6533 link->eh_info.flags |= ehi_flags; 6534 } 6535 6536 ata_port_schedule_eh(ap); 6537 6538 spin_unlock_irqrestore(ap->lock, flags); 6539 6540 /* wait and check result */ 6541 if (wait) { 6542 ata_port_wait_eh(ap); 6543 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); 6544 if (rc) 6545 return rc; 6546 } 6547 } 6548 6549 return 0; 6550 } 6551 6552 /** 6553 * ata_host_suspend - suspend host 6554 * @host: host to suspend 6555 * @mesg: PM message 6556 * 6557 * Suspend @host. Actual operation is performed by EH. This 6558 * function requests EH to perform PM operations and waits for EH 6559 * to finish. 6560 * 6561 * LOCKING: 6562 * Kernel thread context (may sleep). 6563 * 6564 * RETURNS: 6565 * 0 on success, -errno on failure. 6566 */ 6567 int ata_host_suspend(struct ata_host *host, pm_message_t mesg) 6568 { 6569 int rc; 6570 6571 /* 6572 * disable link pm on all ports before requesting 6573 * any pm activity 6574 */ 6575 ata_lpm_enable(host); 6576 6577 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1); 6578 if (rc == 0) 6579 host->dev->power.power_state = mesg; 6580 return rc; 6581 } 6582 6583 /** 6584 * ata_host_resume - resume host 6585 * @host: host to resume 6586 * 6587 * Resume @host. Actual operation is performed by EH. This 6588 * function requests EH to perform PM operations and returns. 6589 * Note that all resume operations are performed parallely. 6590 * 6591 * LOCKING: 6592 * Kernel thread context (may sleep). 6593 */ 6594 void ata_host_resume(struct ata_host *host) 6595 { 6596 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET, 6597 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0); 6598 host->dev->power.power_state = PMSG_ON; 6599 6600 /* reenable link pm */ 6601 ata_lpm_disable(host); 6602 } 6603 #endif 6604 6605 /** 6606 * ata_port_start - Set port up for dma. 6607 * @ap: Port to initialize 6608 * 6609 * Called just after data structures for each port are 6610 * initialized. Allocates space for PRD table. 6611 * 6612 * May be used as the port_start() entry in ata_port_operations. 6613 * 6614 * LOCKING: 6615 * Inherited from caller. 6616 */ 6617 int ata_port_start(struct ata_port *ap) 6618 { 6619 struct device *dev = ap->dev; 6620 int rc; 6621 6622 ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, 6623 GFP_KERNEL); 6624 if (!ap->prd) 6625 return -ENOMEM; 6626 6627 rc = ata_pad_alloc(ap, dev); 6628 if (rc) 6629 return rc; 6630 6631 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, 6632 (unsigned long long)ap->prd_dma); 6633 return 0; 6634 } 6635 6636 /** 6637 * ata_dev_init - Initialize an ata_device structure 6638 * @dev: Device structure to initialize 6639 * 6640 * Initialize @dev in preparation for probing. 6641 * 6642 * LOCKING: 6643 * Inherited from caller. 6644 */ 6645 void ata_dev_init(struct ata_device *dev) 6646 { 6647 struct ata_link *link = dev->link; 6648 struct ata_port *ap = link->ap; 6649 unsigned long flags; 6650 6651 /* SATA spd limit is bound to the first device */ 6652 link->sata_spd_limit = link->hw_sata_spd_limit; 6653 link->sata_spd = 0; 6654 6655 /* High bits of dev->flags are used to record warm plug 6656 * requests which occur asynchronously. Synchronize using 6657 * host lock. 6658 */ 6659 spin_lock_irqsave(ap->lock, flags); 6660 dev->flags &= ~ATA_DFLAG_INIT_MASK; 6661 dev->horkage = 0; 6662 spin_unlock_irqrestore(ap->lock, flags); 6663 6664 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0, 6665 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET); 6666 dev->pio_mask = UINT_MAX; 6667 dev->mwdma_mask = UINT_MAX; 6668 dev->udma_mask = UINT_MAX; 6669 } 6670 6671 /** 6672 * ata_link_init - Initialize an ata_link structure 6673 * @ap: ATA port link is attached to 6674 * @link: Link structure to initialize 6675 * @pmp: Port multiplier port number 6676 * 6677 * Initialize @link. 6678 * 6679 * LOCKING: 6680 * Kernel thread context (may sleep) 6681 */ 6682 void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp) 6683 { 6684 int i; 6685 6686 /* clear everything except for devices */ 6687 memset(link, 0, offsetof(struct ata_link, device[0])); 6688 6689 link->ap = ap; 6690 link->pmp = pmp; 6691 link->active_tag = ATA_TAG_POISON; 6692 link->hw_sata_spd_limit = UINT_MAX; 6693 6694 /* can't use iterator, ap isn't initialized yet */ 6695 for (i = 0; i < ATA_MAX_DEVICES; i++) { 6696 struct ata_device *dev = &link->device[i]; 6697 6698 dev->link = link; 6699 dev->devno = dev - link->device; 6700 ata_dev_init(dev); 6701 } 6702 } 6703 6704 /** 6705 * sata_link_init_spd - Initialize link->sata_spd_limit 6706 * @link: Link to configure sata_spd_limit for 6707 * 6708 * Initialize @link->[hw_]sata_spd_limit to the currently 6709 * configured value. 6710 * 6711 * LOCKING: 6712 * Kernel thread context (may sleep). 6713 * 6714 * RETURNS: 6715 * 0 on success, -errno on failure. 6716 */ 6717 int sata_link_init_spd(struct ata_link *link) 6718 { 6719 u32 scontrol, spd; 6720 int rc; 6721 6722 rc = sata_scr_read(link, SCR_CONTROL, &scontrol); 6723 if (rc) 6724 return rc; 6725 6726 spd = (scontrol >> 4) & 0xf; 6727 if (spd) 6728 link->hw_sata_spd_limit &= (1 << spd) - 1; 6729 6730 link->sata_spd_limit = link->hw_sata_spd_limit; 6731 6732 return 0; 6733 } 6734 6735 /** 6736 * ata_port_alloc - allocate and initialize basic ATA port resources 6737 * @host: ATA host this allocated port belongs to 6738 * 6739 * Allocate and initialize basic ATA port resources. 6740 * 6741 * RETURNS: 6742 * Allocate ATA port on success, NULL on failure. 6743 * 6744 * LOCKING: 6745 * Inherited from calling layer (may sleep). 6746 */ 6747 struct ata_port *ata_port_alloc(struct ata_host *host) 6748 { 6749 struct ata_port *ap; 6750 6751 DPRINTK("ENTER\n"); 6752 6753 ap = kzalloc(sizeof(*ap), GFP_KERNEL); 6754 if (!ap) 6755 return NULL; 6756 6757 ap->pflags |= ATA_PFLAG_INITIALIZING; 6758 ap->lock = &host->lock; 6759 ap->flags = ATA_FLAG_DISABLED; 6760 ap->print_id = -1; 6761 ap->ctl = ATA_DEVCTL_OBS; 6762 ap->host = host; 6763 ap->dev = host->dev; 6764 ap->last_ctl = 0xFF; 6765 6766 #if defined(ATA_VERBOSE_DEBUG) 6767 /* turn on all debugging levels */ 6768 ap->msg_enable = 0x00FF; 6769 #elif defined(ATA_DEBUG) 6770 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR; 6771 #else 6772 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN; 6773 #endif 6774 6775 INIT_DELAYED_WORK(&ap->port_task, NULL); 6776 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug); 6777 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan); 6778 INIT_LIST_HEAD(&ap->eh_done_q); 6779 init_waitqueue_head(&ap->eh_wait_q); 6780 init_timer_deferrable(&ap->fastdrain_timer); 6781 ap->fastdrain_timer.function = ata_eh_fastdrain_timerfn; 6782 ap->fastdrain_timer.data = (unsigned long)ap; 6783 6784 ap->cbl = ATA_CBL_NONE; 6785 6786 ata_link_init(ap, &ap->link, 0); 6787 6788 #ifdef ATA_IRQ_TRAP 6789 ap->stats.unhandled_irq = 1; 6790 ap->stats.idle_irq = 1; 6791 #endif 6792 return ap; 6793 } 6794 6795 static void ata_host_release(struct device *gendev, void *res) 6796 { 6797 struct ata_host *host = dev_get_drvdata(gendev); 6798 int i; 6799 6800 for (i = 0; i < host->n_ports; i++) { 6801 struct ata_port *ap = host->ports[i]; 6802 6803 if (!ap) 6804 continue; 6805 6806 if (ap->scsi_host) 6807 scsi_host_put(ap->scsi_host); 6808 6809 kfree(ap->pmp_link); 6810 kfree(ap); 6811 host->ports[i] = NULL; 6812 } 6813 6814 dev_set_drvdata(gendev, NULL); 6815 } 6816 6817 /** 6818 * ata_host_alloc - allocate and init basic ATA host resources 6819 * @dev: generic device this host is associated with 6820 * @max_ports: maximum number of ATA ports associated with this host 6821 * 6822 * Allocate and initialize basic ATA host resources. LLD calls 6823 * this function to allocate a host, initializes it fully and 6824 * attaches it using ata_host_register(). 6825 * 6826 * @max_ports ports are allocated and host->n_ports is 6827 * initialized to @max_ports. The caller is allowed to decrease 6828 * host->n_ports before calling ata_host_register(). The unused 6829 * ports will be automatically freed on registration. 6830 * 6831 * RETURNS: 6832 * Allocate ATA host on success, NULL on failure. 6833 * 6834 * LOCKING: 6835 * Inherited from calling layer (may sleep). 6836 */ 6837 struct ata_host *ata_host_alloc(struct device *dev, int max_ports) 6838 { 6839 struct ata_host *host; 6840 size_t sz; 6841 int i; 6842 6843 DPRINTK("ENTER\n"); 6844 6845 if (!devres_open_group(dev, NULL, GFP_KERNEL)) 6846 return NULL; 6847 6848 /* alloc a container for our list of ATA ports (buses) */ 6849 sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *); 6850 /* alloc a container for our list of ATA ports (buses) */ 6851 host = devres_alloc(ata_host_release, sz, GFP_KERNEL); 6852 if (!host) 6853 goto err_out; 6854 6855 devres_add(dev, host); 6856 dev_set_drvdata(dev, host); 6857 6858 spin_lock_init(&host->lock); 6859 host->dev = dev; 6860 host->n_ports = max_ports; 6861 6862 /* allocate ports bound to this host */ 6863 for (i = 0; i < max_ports; i++) { 6864 struct ata_port *ap; 6865 6866 ap = ata_port_alloc(host); 6867 if (!ap) 6868 goto err_out; 6869 6870 ap->port_no = i; 6871 host->ports[i] = ap; 6872 } 6873 6874 devres_remove_group(dev, NULL); 6875 return host; 6876 6877 err_out: 6878 devres_release_group(dev, NULL); 6879 return NULL; 6880 } 6881 6882 /** 6883 * ata_host_alloc_pinfo - alloc host and init with port_info array 6884 * @dev: generic device this host is associated with 6885 * @ppi: array of ATA port_info to initialize host with 6886 * @n_ports: number of ATA ports attached to this host 6887 * 6888 * Allocate ATA host and initialize with info from @ppi. If NULL 6889 * terminated, @ppi may contain fewer entries than @n_ports. The 6890 * last entry will be used for the remaining ports. 6891 * 6892 * RETURNS: 6893 * Allocate ATA host on success, NULL on failure. 6894 * 6895 * LOCKING: 6896 * Inherited from calling layer (may sleep). 6897 */ 6898 struct ata_host *ata_host_alloc_pinfo(struct device *dev, 6899 const struct ata_port_info * const * ppi, 6900 int n_ports) 6901 { 6902 const struct ata_port_info *pi; 6903 struct ata_host *host; 6904 int i, j; 6905 6906 host = ata_host_alloc(dev, n_ports); 6907 if (!host) 6908 return NULL; 6909 6910 for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) { 6911 struct ata_port *ap = host->ports[i]; 6912 6913 if (ppi[j]) 6914 pi = ppi[j++]; 6915 6916 ap->pio_mask = pi->pio_mask; 6917 ap->mwdma_mask = pi->mwdma_mask; 6918 ap->udma_mask = pi->udma_mask; 6919 ap->flags |= pi->flags; 6920 ap->link.flags |= pi->link_flags; 6921 ap->ops = pi->port_ops; 6922 6923 if (!host->ops && (pi->port_ops != &ata_dummy_port_ops)) 6924 host->ops = pi->port_ops; 6925 if (!host->private_data && pi->private_data) 6926 host->private_data = pi->private_data; 6927 } 6928 6929 return host; 6930 } 6931 6932 static void ata_host_stop(struct device *gendev, void *res) 6933 { 6934 struct ata_host *host = dev_get_drvdata(gendev); 6935 int i; 6936 6937 WARN_ON(!(host->flags & ATA_HOST_STARTED)); 6938 6939 for (i = 0; i < host->n_ports; i++) { 6940 struct ata_port *ap = host->ports[i]; 6941 6942 if (ap->ops->port_stop) 6943 ap->ops->port_stop(ap); 6944 } 6945 6946 if (host->ops->host_stop) 6947 host->ops->host_stop(host); 6948 } 6949 6950 /** 6951 * ata_host_start - start and freeze ports of an ATA host 6952 * @host: ATA host to start ports for 6953 * 6954 * Start and then freeze ports of @host. Started status is 6955 * recorded in host->flags, so this function can be called 6956 * multiple times. Ports are guaranteed to get started only 6957 * once. If host->ops isn't initialized yet, its set to the 6958 * first non-dummy port ops. 6959 * 6960 * LOCKING: 6961 * Inherited from calling layer (may sleep). 6962 * 6963 * RETURNS: 6964 * 0 if all ports are started successfully, -errno otherwise. 6965 */ 6966 int ata_host_start(struct ata_host *host) 6967 { 6968 int have_stop = 0; 6969 void *start_dr = NULL; 6970 int i, rc; 6971 6972 if (host->flags & ATA_HOST_STARTED) 6973 return 0; 6974 6975 for (i = 0; i < host->n_ports; i++) { 6976 struct ata_port *ap = host->ports[i]; 6977 6978 if (!host->ops && !ata_port_is_dummy(ap)) 6979 host->ops = ap->ops; 6980 6981 if (ap->ops->port_stop) 6982 have_stop = 1; 6983 } 6984 6985 if (host->ops->host_stop) 6986 have_stop = 1; 6987 6988 if (have_stop) { 6989 start_dr = devres_alloc(ata_host_stop, 0, GFP_KERNEL); 6990 if (!start_dr) 6991 return -ENOMEM; 6992 } 6993 6994 for (i = 0; i < host->n_ports; i++) { 6995 struct ata_port *ap = host->ports[i]; 6996 6997 if (ap->ops->port_start) { 6998 rc = ap->ops->port_start(ap); 6999 if (rc) { 7000 if (rc != -ENODEV) 7001 dev_printk(KERN_ERR, host->dev, 7002 "failed to start port %d " 7003 "(errno=%d)\n", i, rc); 7004 goto err_out; 7005 } 7006 } 7007 ata_eh_freeze_port(ap); 7008 } 7009 7010 if (start_dr) 7011 devres_add(host->dev, start_dr); 7012 host->flags |= ATA_HOST_STARTED; 7013 return 0; 7014 7015 err_out: 7016 while (--i >= 0) { 7017 struct ata_port *ap = host->ports[i]; 7018 7019 if (ap->ops->port_stop) 7020 ap->ops->port_stop(ap); 7021 } 7022 devres_free(start_dr); 7023 return rc; 7024 } 7025 7026 /** 7027 * ata_sas_host_init - Initialize a host struct 7028 * @host: host to initialize 7029 * @dev: device host is attached to 7030 * @flags: host flags 7031 * @ops: port_ops 7032 * 7033 * LOCKING: 7034 * PCI/etc. bus probe sem. 7035 * 7036 */ 7037 /* KILLME - the only user left is ipr */ 7038 void ata_host_init(struct ata_host *host, struct device *dev, 7039 unsigned long flags, const struct ata_port_operations *ops) 7040 { 7041 spin_lock_init(&host->lock); 7042 host->dev = dev; 7043 host->flags = flags; 7044 host->ops = ops; 7045 } 7046 7047 /** 7048 * ata_host_register - register initialized ATA host 7049 * @host: ATA host to register 7050 * @sht: template for SCSI host 7051 * 7052 * Register initialized ATA host. @host is allocated using 7053 * ata_host_alloc() and fully initialized by LLD. This function 7054 * starts ports, registers @host with ATA and SCSI layers and 7055 * probe registered devices. 7056 * 7057 * LOCKING: 7058 * Inherited from calling layer (may sleep). 7059 * 7060 * RETURNS: 7061 * 0 on success, -errno otherwise. 7062 */ 7063 int ata_host_register(struct ata_host *host, struct scsi_host_template *sht) 7064 { 7065 int i, rc; 7066 7067 /* host must have been started */ 7068 if (!(host->flags & ATA_HOST_STARTED)) { 7069 dev_printk(KERN_ERR, host->dev, 7070 "BUG: trying to register unstarted host\n"); 7071 WARN_ON(1); 7072 return -EINVAL; 7073 } 7074 7075 /* Blow away unused ports. This happens when LLD can't 7076 * determine the exact number of ports to allocate at 7077 * allocation time. 7078 */ 7079 for (i = host->n_ports; host->ports[i]; i++) 7080 kfree(host->ports[i]); 7081 7082 /* give ports names and add SCSI hosts */ 7083 for (i = 0; i < host->n_ports; i++) 7084 host->ports[i]->print_id = ata_print_id++; 7085 7086 rc = ata_scsi_add_hosts(host, sht); 7087 if (rc) 7088 return rc; 7089 7090 /* associate with ACPI nodes */ 7091 ata_acpi_associate(host); 7092 7093 /* set cable, sata_spd_limit and report */ 7094 for (i = 0; i < host->n_ports; i++) { 7095 struct ata_port *ap = host->ports[i]; 7096 unsigned long xfer_mask; 7097 7098 /* set SATA cable type if still unset */ 7099 if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA)) 7100 ap->cbl = ATA_CBL_SATA; 7101 7102 /* init sata_spd_limit to the current value */ 7103 sata_link_init_spd(&ap->link); 7104 7105 /* print per-port info to dmesg */ 7106 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask, 7107 ap->udma_mask); 7108 7109 if (!ata_port_is_dummy(ap)) { 7110 ata_port_printk(ap, KERN_INFO, 7111 "%cATA max %s %s\n", 7112 (ap->flags & ATA_FLAG_SATA) ? 'S' : 'P', 7113 ata_mode_string(xfer_mask), 7114 ap->link.eh_info.desc); 7115 ata_ehi_clear_desc(&ap->link.eh_info); 7116 } else 7117 ata_port_printk(ap, KERN_INFO, "DUMMY\n"); 7118 } 7119 7120 /* perform each probe synchronously */ 7121 DPRINTK("probe begin\n"); 7122 for (i = 0; i < host->n_ports; i++) { 7123 struct ata_port *ap = host->ports[i]; 7124 int rc; 7125 7126 /* probe */ 7127 if (ap->ops->error_handler) { 7128 struct ata_eh_info *ehi = &ap->link.eh_info; 7129 unsigned long flags; 7130 7131 ata_port_probe(ap); 7132 7133 /* kick EH for boot probing */ 7134 spin_lock_irqsave(ap->lock, flags); 7135 7136 ehi->probe_mask = 7137 (1 << ata_link_max_devices(&ap->link)) - 1; 7138 ehi->action |= ATA_EH_SOFTRESET; 7139 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET; 7140 7141 ap->pflags &= ~ATA_PFLAG_INITIALIZING; 7142 ap->pflags |= ATA_PFLAG_LOADING; 7143 ata_port_schedule_eh(ap); 7144 7145 spin_unlock_irqrestore(ap->lock, flags); 7146 7147 /* wait for EH to finish */ 7148 ata_port_wait_eh(ap); 7149 } else { 7150 DPRINTK("ata%u: bus probe begin\n", ap->print_id); 7151 rc = ata_bus_probe(ap); 7152 DPRINTK("ata%u: bus probe end\n", ap->print_id); 7153 7154 if (rc) { 7155 /* FIXME: do something useful here? 7156 * Current libata behavior will 7157 * tear down everything when 7158 * the module is removed 7159 * or the h/w is unplugged. 7160 */ 7161 } 7162 } 7163 } 7164 7165 /* probes are done, now scan each port's disk(s) */ 7166 DPRINTK("host probe begin\n"); 7167 for (i = 0; i < host->n_ports; i++) { 7168 struct ata_port *ap = host->ports[i]; 7169 7170 ata_scsi_scan_host(ap, 1); 7171 ata_lpm_schedule(ap, ap->pm_policy); 7172 } 7173 7174 return 0; 7175 } 7176 7177 /** 7178 * ata_host_activate - start host, request IRQ and register it 7179 * @host: target ATA host 7180 * @irq: IRQ to request 7181 * @irq_handler: irq_handler used when requesting IRQ 7182 * @irq_flags: irq_flags used when requesting IRQ 7183 * @sht: scsi_host_template to use when registering the host 7184 * 7185 * After allocating an ATA host and initializing it, most libata 7186 * LLDs perform three steps to activate the host - start host, 7187 * request IRQ and register it. This helper takes necessasry 7188 * arguments and performs the three steps in one go. 7189 * 7190 * An invalid IRQ skips the IRQ registration and expects the host to 7191 * have set polling mode on the port. In this case, @irq_handler 7192 * should be NULL. 7193 * 7194 * LOCKING: 7195 * Inherited from calling layer (may sleep). 7196 * 7197 * RETURNS: 7198 * 0 on success, -errno otherwise. 7199 */ 7200 int ata_host_activate(struct ata_host *host, int irq, 7201 irq_handler_t irq_handler, unsigned long irq_flags, 7202 struct scsi_host_template *sht) 7203 { 7204 int i, rc; 7205 7206 rc = ata_host_start(host); 7207 if (rc) 7208 return rc; 7209 7210 /* Special case for polling mode */ 7211 if (!irq) { 7212 WARN_ON(irq_handler); 7213 return ata_host_register(host, sht); 7214 } 7215 7216 rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags, 7217 dev_driver_string(host->dev), host); 7218 if (rc) 7219 return rc; 7220 7221 for (i = 0; i < host->n_ports; i++) 7222 ata_port_desc(host->ports[i], "irq %d", irq); 7223 7224 rc = ata_host_register(host, sht); 7225 /* if failed, just free the IRQ and leave ports alone */ 7226 if (rc) 7227 devm_free_irq(host->dev, irq, host); 7228 7229 return rc; 7230 } 7231 7232 /** 7233 * ata_port_detach - Detach ATA port in prepration of device removal 7234 * @ap: ATA port to be detached 7235 * 7236 * Detach all ATA devices and the associated SCSI devices of @ap; 7237 * then, remove the associated SCSI host. @ap is guaranteed to 7238 * be quiescent on return from this function. 7239 * 7240 * LOCKING: 7241 * Kernel thread context (may sleep). 7242 */ 7243 static void ata_port_detach(struct ata_port *ap) 7244 { 7245 unsigned long flags; 7246 struct ata_link *link; 7247 struct ata_device *dev; 7248 7249 if (!ap->ops->error_handler) 7250 goto skip_eh; 7251 7252 /* tell EH we're leaving & flush EH */ 7253 spin_lock_irqsave(ap->lock, flags); 7254 ap->pflags |= ATA_PFLAG_UNLOADING; 7255 spin_unlock_irqrestore(ap->lock, flags); 7256 7257 ata_port_wait_eh(ap); 7258 7259 /* EH is now guaranteed to see UNLOADING - EH context belongs 7260 * to us. Disable all existing devices. 7261 */ 7262 ata_port_for_each_link(link, ap) { 7263 ata_link_for_each_dev(dev, link) 7264 ata_dev_disable(dev); 7265 } 7266 7267 /* Final freeze & EH. All in-flight commands are aborted. EH 7268 * will be skipped and retrials will be terminated with bad 7269 * target. 7270 */ 7271 spin_lock_irqsave(ap->lock, flags); 7272 ata_port_freeze(ap); /* won't be thawed */ 7273 spin_unlock_irqrestore(ap->lock, flags); 7274 7275 ata_port_wait_eh(ap); 7276 cancel_rearming_delayed_work(&ap->hotplug_task); 7277 7278 skip_eh: 7279 /* remove the associated SCSI host */ 7280 scsi_remove_host(ap->scsi_host); 7281 } 7282 7283 /** 7284 * ata_host_detach - Detach all ports of an ATA host 7285 * @host: Host to detach 7286 * 7287 * Detach all ports of @host. 7288 * 7289 * LOCKING: 7290 * Kernel thread context (may sleep). 7291 */ 7292 void ata_host_detach(struct ata_host *host) 7293 { 7294 int i; 7295 7296 for (i = 0; i < host->n_ports; i++) 7297 ata_port_detach(host->ports[i]); 7298 7299 /* the host is dead now, dissociate ACPI */ 7300 ata_acpi_dissociate(host); 7301 } 7302 7303 /** 7304 * ata_std_ports - initialize ioaddr with standard port offsets. 7305 * @ioaddr: IO address structure to be initialized 7306 * 7307 * Utility function which initializes data_addr, error_addr, 7308 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, 7309 * device_addr, status_addr, and command_addr to standard offsets 7310 * relative to cmd_addr. 7311 * 7312 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. 7313 */ 7314 7315 void ata_std_ports(struct ata_ioports *ioaddr) 7316 { 7317 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; 7318 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; 7319 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; 7320 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; 7321 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; 7322 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; 7323 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; 7324 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; 7325 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; 7326 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; 7327 } 7328 7329 7330 #ifdef CONFIG_PCI 7331 7332 /** 7333 * ata_pci_remove_one - PCI layer callback for device removal 7334 * @pdev: PCI device that was removed 7335 * 7336 * PCI layer indicates to libata via this hook that hot-unplug or 7337 * module unload event has occurred. Detach all ports. Resource 7338 * release is handled via devres. 7339 * 7340 * LOCKING: 7341 * Inherited from PCI layer (may sleep). 7342 */ 7343 void ata_pci_remove_one(struct pci_dev *pdev) 7344 { 7345 struct device *dev = &pdev->dev; 7346 struct ata_host *host = dev_get_drvdata(dev); 7347 7348 ata_host_detach(host); 7349 } 7350 7351 /* move to PCI subsystem */ 7352 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits) 7353 { 7354 unsigned long tmp = 0; 7355 7356 switch (bits->width) { 7357 case 1: { 7358 u8 tmp8 = 0; 7359 pci_read_config_byte(pdev, bits->reg, &tmp8); 7360 tmp = tmp8; 7361 break; 7362 } 7363 case 2: { 7364 u16 tmp16 = 0; 7365 pci_read_config_word(pdev, bits->reg, &tmp16); 7366 tmp = tmp16; 7367 break; 7368 } 7369 case 4: { 7370 u32 tmp32 = 0; 7371 pci_read_config_dword(pdev, bits->reg, &tmp32); 7372 tmp = tmp32; 7373 break; 7374 } 7375 7376 default: 7377 return -EINVAL; 7378 } 7379 7380 tmp &= bits->mask; 7381 7382 return (tmp == bits->val) ? 1 : 0; 7383 } 7384 7385 #ifdef CONFIG_PM 7386 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg) 7387 { 7388 pci_save_state(pdev); 7389 pci_disable_device(pdev); 7390 7391 if (mesg.event == PM_EVENT_SUSPEND) 7392 pci_set_power_state(pdev, PCI_D3hot); 7393 } 7394 7395 int ata_pci_device_do_resume(struct pci_dev *pdev) 7396 { 7397 int rc; 7398 7399 pci_set_power_state(pdev, PCI_D0); 7400 pci_restore_state(pdev); 7401 7402 rc = pcim_enable_device(pdev); 7403 if (rc) { 7404 dev_printk(KERN_ERR, &pdev->dev, 7405 "failed to enable device after resume (%d)\n", rc); 7406 return rc; 7407 } 7408 7409 pci_set_master(pdev); 7410 return 0; 7411 } 7412 7413 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) 7414 { 7415 struct ata_host *host = dev_get_drvdata(&pdev->dev); 7416 int rc = 0; 7417 7418 rc = ata_host_suspend(host, mesg); 7419 if (rc) 7420 return rc; 7421 7422 ata_pci_device_do_suspend(pdev, mesg); 7423 7424 return 0; 7425 } 7426 7427 int ata_pci_device_resume(struct pci_dev *pdev) 7428 { 7429 struct ata_host *host = dev_get_drvdata(&pdev->dev); 7430 int rc; 7431 7432 rc = ata_pci_device_do_resume(pdev); 7433 if (rc == 0) 7434 ata_host_resume(host); 7435 return rc; 7436 } 7437 #endif /* CONFIG_PM */ 7438 7439 #endif /* CONFIG_PCI */ 7440 7441 7442 static int __init ata_init(void) 7443 { 7444 ata_probe_timeout *= HZ; 7445 ata_wq = create_workqueue("ata"); 7446 if (!ata_wq) 7447 return -ENOMEM; 7448 7449 ata_aux_wq = create_singlethread_workqueue("ata_aux"); 7450 if (!ata_aux_wq) { 7451 destroy_workqueue(ata_wq); 7452 return -ENOMEM; 7453 } 7454 7455 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); 7456 return 0; 7457 } 7458 7459 static void __exit ata_exit(void) 7460 { 7461 destroy_workqueue(ata_wq); 7462 destroy_workqueue(ata_aux_wq); 7463 } 7464 7465 subsys_initcall(ata_init); 7466 module_exit(ata_exit); 7467 7468 static unsigned long ratelimit_time; 7469 static DEFINE_SPINLOCK(ata_ratelimit_lock); 7470 7471 int ata_ratelimit(void) 7472 { 7473 int rc; 7474 unsigned long flags; 7475 7476 spin_lock_irqsave(&ata_ratelimit_lock, flags); 7477 7478 if (time_after(jiffies, ratelimit_time)) { 7479 rc = 1; 7480 ratelimit_time = jiffies + (HZ/5); 7481 } else 7482 rc = 0; 7483 7484 spin_unlock_irqrestore(&ata_ratelimit_lock, flags); 7485 7486 return rc; 7487 } 7488 7489 /** 7490 * ata_wait_register - wait until register value changes 7491 * @reg: IO-mapped register 7492 * @mask: Mask to apply to read register value 7493 * @val: Wait condition 7494 * @interval_msec: polling interval in milliseconds 7495 * @timeout_msec: timeout in milliseconds 7496 * 7497 * Waiting for some bits of register to change is a common 7498 * operation for ATA controllers. This function reads 32bit LE 7499 * IO-mapped register @reg and tests for the following condition. 7500 * 7501 * (*@reg & mask) != val 7502 * 7503 * If the condition is met, it returns; otherwise, the process is 7504 * repeated after @interval_msec until timeout. 7505 * 7506 * LOCKING: 7507 * Kernel thread context (may sleep) 7508 * 7509 * RETURNS: 7510 * The final register value. 7511 */ 7512 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, 7513 unsigned long interval_msec, 7514 unsigned long timeout_msec) 7515 { 7516 unsigned long timeout; 7517 u32 tmp; 7518 7519 tmp = ioread32(reg); 7520 7521 /* Calculate timeout _after_ the first read to make sure 7522 * preceding writes reach the controller before starting to 7523 * eat away the timeout. 7524 */ 7525 timeout = jiffies + (timeout_msec * HZ) / 1000; 7526 7527 while ((tmp & mask) == val && time_before(jiffies, timeout)) { 7528 msleep(interval_msec); 7529 tmp = ioread32(reg); 7530 } 7531 7532 return tmp; 7533 } 7534 7535 /* 7536 * Dummy port_ops 7537 */ 7538 static void ata_dummy_noret(struct ata_port *ap) { } 7539 static int ata_dummy_ret0(struct ata_port *ap) { return 0; } 7540 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { } 7541 7542 static u8 ata_dummy_check_status(struct ata_port *ap) 7543 { 7544 return ATA_DRDY; 7545 } 7546 7547 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc) 7548 { 7549 return AC_ERR_SYSTEM; 7550 } 7551 7552 const struct ata_port_operations ata_dummy_port_ops = { 7553 .check_status = ata_dummy_check_status, 7554 .check_altstatus = ata_dummy_check_status, 7555 .dev_select = ata_noop_dev_select, 7556 .qc_prep = ata_noop_qc_prep, 7557 .qc_issue = ata_dummy_qc_issue, 7558 .freeze = ata_dummy_noret, 7559 .thaw = ata_dummy_noret, 7560 .error_handler = ata_dummy_noret, 7561 .post_internal_cmd = ata_dummy_qc_noret, 7562 .irq_clear = ata_dummy_noret, 7563 .port_start = ata_dummy_ret0, 7564 .port_stop = ata_dummy_noret, 7565 }; 7566 7567 const struct ata_port_info ata_dummy_port_info = { 7568 .port_ops = &ata_dummy_port_ops, 7569 }; 7570 7571 /* 7572 * libata is essentially a library of internal helper functions for 7573 * low-level ATA host controller drivers. As such, the API/ABI is 7574 * likely to change as new drivers are added and updated. 7575 * Do not depend on ABI/API stability. 7576 */ 7577 EXPORT_SYMBOL_GPL(sata_deb_timing_normal); 7578 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug); 7579 EXPORT_SYMBOL_GPL(sata_deb_timing_long); 7580 EXPORT_SYMBOL_GPL(ata_dummy_port_ops); 7581 EXPORT_SYMBOL_GPL(ata_dummy_port_info); 7582 EXPORT_SYMBOL_GPL(ata_std_bios_param); 7583 EXPORT_SYMBOL_GPL(ata_std_ports); 7584 EXPORT_SYMBOL_GPL(ata_host_init); 7585 EXPORT_SYMBOL_GPL(ata_host_alloc); 7586 EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo); 7587 EXPORT_SYMBOL_GPL(ata_host_start); 7588 EXPORT_SYMBOL_GPL(ata_host_register); 7589 EXPORT_SYMBOL_GPL(ata_host_activate); 7590 EXPORT_SYMBOL_GPL(ata_host_detach); 7591 EXPORT_SYMBOL_GPL(ata_sg_init); 7592 EXPORT_SYMBOL_GPL(ata_sg_init_one); 7593 EXPORT_SYMBOL_GPL(ata_hsm_move); 7594 EXPORT_SYMBOL_GPL(ata_qc_complete); 7595 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple); 7596 EXPORT_SYMBOL_GPL(ata_qc_issue_prot); 7597 EXPORT_SYMBOL_GPL(ata_tf_load); 7598 EXPORT_SYMBOL_GPL(ata_tf_read); 7599 EXPORT_SYMBOL_GPL(ata_noop_dev_select); 7600 EXPORT_SYMBOL_GPL(ata_std_dev_select); 7601 EXPORT_SYMBOL_GPL(sata_print_link_status); 7602 EXPORT_SYMBOL_GPL(ata_tf_to_fis); 7603 EXPORT_SYMBOL_GPL(ata_tf_from_fis); 7604 EXPORT_SYMBOL_GPL(ata_check_status); 7605 EXPORT_SYMBOL_GPL(ata_altstatus); 7606 EXPORT_SYMBOL_GPL(ata_exec_command); 7607 EXPORT_SYMBOL_GPL(ata_port_start); 7608 EXPORT_SYMBOL_GPL(ata_sff_port_start); 7609 EXPORT_SYMBOL_GPL(ata_interrupt); 7610 EXPORT_SYMBOL_GPL(ata_do_set_mode); 7611 EXPORT_SYMBOL_GPL(ata_data_xfer); 7612 EXPORT_SYMBOL_GPL(ata_data_xfer_noirq); 7613 EXPORT_SYMBOL_GPL(ata_std_qc_defer); 7614 EXPORT_SYMBOL_GPL(ata_qc_prep); 7615 EXPORT_SYMBOL_GPL(ata_dumb_qc_prep); 7616 EXPORT_SYMBOL_GPL(ata_noop_qc_prep); 7617 EXPORT_SYMBOL_GPL(ata_bmdma_setup); 7618 EXPORT_SYMBOL_GPL(ata_bmdma_start); 7619 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); 7620 EXPORT_SYMBOL_GPL(ata_bmdma_status); 7621 EXPORT_SYMBOL_GPL(ata_bmdma_stop); 7622 EXPORT_SYMBOL_GPL(ata_bmdma_freeze); 7623 EXPORT_SYMBOL_GPL(ata_bmdma_thaw); 7624 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh); 7625 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler); 7626 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd); 7627 EXPORT_SYMBOL_GPL(ata_port_probe); 7628 EXPORT_SYMBOL_GPL(ata_dev_disable); 7629 EXPORT_SYMBOL_GPL(sata_set_spd); 7630 EXPORT_SYMBOL_GPL(sata_link_debounce); 7631 EXPORT_SYMBOL_GPL(sata_link_resume); 7632 EXPORT_SYMBOL_GPL(ata_bus_reset); 7633 EXPORT_SYMBOL_GPL(ata_std_prereset); 7634 EXPORT_SYMBOL_GPL(ata_std_softreset); 7635 EXPORT_SYMBOL_GPL(sata_link_hardreset); 7636 EXPORT_SYMBOL_GPL(sata_std_hardreset); 7637 EXPORT_SYMBOL_GPL(ata_std_postreset); 7638 EXPORT_SYMBOL_GPL(ata_dev_classify); 7639 EXPORT_SYMBOL_GPL(ata_dev_pair); 7640 EXPORT_SYMBOL_GPL(ata_port_disable); 7641 EXPORT_SYMBOL_GPL(ata_ratelimit); 7642 EXPORT_SYMBOL_GPL(ata_wait_register); 7643 EXPORT_SYMBOL_GPL(ata_busy_sleep); 7644 EXPORT_SYMBOL_GPL(ata_wait_after_reset); 7645 EXPORT_SYMBOL_GPL(ata_wait_ready); 7646 EXPORT_SYMBOL_GPL(ata_port_queue_task); 7647 EXPORT_SYMBOL_GPL(ata_scsi_ioctl); 7648 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); 7649 EXPORT_SYMBOL_GPL(ata_scsi_slave_config); 7650 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy); 7651 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth); 7652 EXPORT_SYMBOL_GPL(ata_host_intr); 7653 EXPORT_SYMBOL_GPL(sata_scr_valid); 7654 EXPORT_SYMBOL_GPL(sata_scr_read); 7655 EXPORT_SYMBOL_GPL(sata_scr_write); 7656 EXPORT_SYMBOL_GPL(sata_scr_write_flush); 7657 EXPORT_SYMBOL_GPL(ata_link_online); 7658 EXPORT_SYMBOL_GPL(ata_link_offline); 7659 #ifdef CONFIG_PM 7660 EXPORT_SYMBOL_GPL(ata_host_suspend); 7661 EXPORT_SYMBOL_GPL(ata_host_resume); 7662 #endif /* CONFIG_PM */ 7663 EXPORT_SYMBOL_GPL(ata_id_string); 7664 EXPORT_SYMBOL_GPL(ata_id_c_string); 7665 EXPORT_SYMBOL_GPL(ata_id_to_dma_mode); 7666 EXPORT_SYMBOL_GPL(ata_scsi_simulate); 7667 7668 EXPORT_SYMBOL_GPL(ata_pio_need_iordy); 7669 EXPORT_SYMBOL_GPL(ata_timing_compute); 7670 EXPORT_SYMBOL_GPL(ata_timing_merge); 7671 7672 #ifdef CONFIG_PCI 7673 EXPORT_SYMBOL_GPL(pci_test_config_bits); 7674 EXPORT_SYMBOL_GPL(ata_pci_init_sff_host); 7675 EXPORT_SYMBOL_GPL(ata_pci_init_bmdma); 7676 EXPORT_SYMBOL_GPL(ata_pci_prepare_sff_host); 7677 EXPORT_SYMBOL_GPL(ata_pci_init_one); 7678 EXPORT_SYMBOL_GPL(ata_pci_remove_one); 7679 #ifdef CONFIG_PM 7680 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend); 7681 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume); 7682 EXPORT_SYMBOL_GPL(ata_pci_device_suspend); 7683 EXPORT_SYMBOL_GPL(ata_pci_device_resume); 7684 #endif /* CONFIG_PM */ 7685 EXPORT_SYMBOL_GPL(ata_pci_default_filter); 7686 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex); 7687 #endif /* CONFIG_PCI */ 7688 7689 EXPORT_SYMBOL_GPL(sata_pmp_qc_defer_cmd_switch); 7690 EXPORT_SYMBOL_GPL(sata_pmp_std_prereset); 7691 EXPORT_SYMBOL_GPL(sata_pmp_std_hardreset); 7692 EXPORT_SYMBOL_GPL(sata_pmp_std_postreset); 7693 EXPORT_SYMBOL_GPL(sata_pmp_do_eh); 7694 7695 EXPORT_SYMBOL_GPL(__ata_ehi_push_desc); 7696 EXPORT_SYMBOL_GPL(ata_ehi_push_desc); 7697 EXPORT_SYMBOL_GPL(ata_ehi_clear_desc); 7698 EXPORT_SYMBOL_GPL(ata_port_desc); 7699 #ifdef CONFIG_PCI 7700 EXPORT_SYMBOL_GPL(ata_port_pbar_desc); 7701 #endif /* CONFIG_PCI */ 7702 EXPORT_SYMBOL_GPL(ata_port_schedule_eh); 7703 EXPORT_SYMBOL_GPL(ata_link_abort); 7704 EXPORT_SYMBOL_GPL(ata_port_abort); 7705 EXPORT_SYMBOL_GPL(ata_port_freeze); 7706 EXPORT_SYMBOL_GPL(sata_async_notification); 7707 EXPORT_SYMBOL_GPL(ata_eh_freeze_port); 7708 EXPORT_SYMBOL_GPL(ata_eh_thaw_port); 7709 EXPORT_SYMBOL_GPL(ata_eh_qc_complete); 7710 EXPORT_SYMBOL_GPL(ata_eh_qc_retry); 7711 EXPORT_SYMBOL_GPL(ata_do_eh); 7712 EXPORT_SYMBOL_GPL(ata_irq_on); 7713 EXPORT_SYMBOL_GPL(ata_dev_try_classify); 7714 7715 EXPORT_SYMBOL_GPL(ata_cable_40wire); 7716 EXPORT_SYMBOL_GPL(ata_cable_80wire); 7717 EXPORT_SYMBOL_GPL(ata_cable_unknown); 7718 EXPORT_SYMBOL_GPL(ata_cable_sata); 7719