1 /* 2 * libata-core.c - helper library for ATA 3 * 4 * Maintained by: Jeff Garzik <jgarzik@pobox.com> 5 * Please ALWAYS copy linux-ide@vger.kernel.org 6 * on emails. 7 * 8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved. 9 * Copyright 2003-2004 Jeff Garzik 10 * 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2, or (at your option) 15 * any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; see the file COPYING. If not, write to 24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 25 * 26 * 27 * libata documentation is available via 'make {ps|pdf}docs', 28 * as Documentation/DocBook/libata.* 29 * 30 * Hardware documentation available from http://www.t13.org/ and 31 * http://www.sata-io.org/ 32 * 33 */ 34 35 #include <linux/kernel.h> 36 #include <linux/module.h> 37 #include <linux/pci.h> 38 #include <linux/init.h> 39 #include <linux/list.h> 40 #include <linux/mm.h> 41 #include <linux/highmem.h> 42 #include <linux/spinlock.h> 43 #include <linux/blkdev.h> 44 #include <linux/delay.h> 45 #include <linux/timer.h> 46 #include <linux/interrupt.h> 47 #include <linux/completion.h> 48 #include <linux/suspend.h> 49 #include <linux/workqueue.h> 50 #include <linux/jiffies.h> 51 #include <linux/scatterlist.h> 52 #include <scsi/scsi.h> 53 #include <scsi/scsi_cmnd.h> 54 #include <scsi/scsi_host.h> 55 #include <linux/libata.h> 56 #include <asm/io.h> 57 #include <asm/semaphore.h> 58 #include <asm/byteorder.h> 59 60 #include "libata.h" 61 62 #define DRV_VERSION "2.21" /* must be exactly four chars */ 63 64 65 /* debounce timing parameters in msecs { interval, duration, timeout } */ 66 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 }; 67 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 }; 68 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 }; 69 70 static unsigned int ata_dev_init_params(struct ata_device *dev, 71 u16 heads, u16 sectors); 72 static unsigned int ata_dev_set_xfermode(struct ata_device *dev); 73 static void ata_dev_xfermask(struct ata_device *dev); 74 static unsigned long ata_dev_blacklisted(const struct ata_device *dev); 75 76 unsigned int ata_print_id = 1; 77 static struct workqueue_struct *ata_wq; 78 79 struct workqueue_struct *ata_aux_wq; 80 81 int atapi_enabled = 1; 82 module_param(atapi_enabled, int, 0444); 83 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); 84 85 int atapi_dmadir = 0; 86 module_param(atapi_dmadir, int, 0444); 87 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)"); 88 89 int libata_fua = 0; 90 module_param_named(fua, libata_fua, int, 0444); 91 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)"); 92 93 static int ata_ignore_hpa = 0; 94 module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644); 95 MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)"); 96 97 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ; 98 module_param(ata_probe_timeout, int, 0444); 99 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)"); 100 101 int libata_noacpi = 1; 102 module_param_named(noacpi, libata_noacpi, int, 0444); 103 MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in suspend/resume when set"); 104 105 MODULE_AUTHOR("Jeff Garzik"); 106 MODULE_DESCRIPTION("Library module for ATA devices"); 107 MODULE_LICENSE("GPL"); 108 MODULE_VERSION(DRV_VERSION); 109 110 111 /** 112 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure 113 * @tf: Taskfile to convert 114 * @pmp: Port multiplier port 115 * @is_cmd: This FIS is for command 116 * @fis: Buffer into which data will output 117 * 118 * Converts a standard ATA taskfile to a Serial ATA 119 * FIS structure (Register - Host to Device). 120 * 121 * LOCKING: 122 * Inherited from caller. 123 */ 124 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis) 125 { 126 fis[0] = 0x27; /* Register - Host to Device FIS */ 127 fis[1] = pmp & 0xf; /* Port multiplier number*/ 128 if (is_cmd) 129 fis[1] |= (1 << 7); /* bit 7 indicates Command FIS */ 130 131 fis[2] = tf->command; 132 fis[3] = tf->feature; 133 134 fis[4] = tf->lbal; 135 fis[5] = tf->lbam; 136 fis[6] = tf->lbah; 137 fis[7] = tf->device; 138 139 fis[8] = tf->hob_lbal; 140 fis[9] = tf->hob_lbam; 141 fis[10] = tf->hob_lbah; 142 fis[11] = tf->hob_feature; 143 144 fis[12] = tf->nsect; 145 fis[13] = tf->hob_nsect; 146 fis[14] = 0; 147 fis[15] = tf->ctl; 148 149 fis[16] = 0; 150 fis[17] = 0; 151 fis[18] = 0; 152 fis[19] = 0; 153 } 154 155 /** 156 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile 157 * @fis: Buffer from which data will be input 158 * @tf: Taskfile to output 159 * 160 * Converts a serial ATA FIS structure to a standard ATA taskfile. 161 * 162 * LOCKING: 163 * Inherited from caller. 164 */ 165 166 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf) 167 { 168 tf->command = fis[2]; /* status */ 169 tf->feature = fis[3]; /* error */ 170 171 tf->lbal = fis[4]; 172 tf->lbam = fis[5]; 173 tf->lbah = fis[6]; 174 tf->device = fis[7]; 175 176 tf->hob_lbal = fis[8]; 177 tf->hob_lbam = fis[9]; 178 tf->hob_lbah = fis[10]; 179 180 tf->nsect = fis[12]; 181 tf->hob_nsect = fis[13]; 182 } 183 184 static const u8 ata_rw_cmds[] = { 185 /* pio multi */ 186 ATA_CMD_READ_MULTI, 187 ATA_CMD_WRITE_MULTI, 188 ATA_CMD_READ_MULTI_EXT, 189 ATA_CMD_WRITE_MULTI_EXT, 190 0, 191 0, 192 0, 193 ATA_CMD_WRITE_MULTI_FUA_EXT, 194 /* pio */ 195 ATA_CMD_PIO_READ, 196 ATA_CMD_PIO_WRITE, 197 ATA_CMD_PIO_READ_EXT, 198 ATA_CMD_PIO_WRITE_EXT, 199 0, 200 0, 201 0, 202 0, 203 /* dma */ 204 ATA_CMD_READ, 205 ATA_CMD_WRITE, 206 ATA_CMD_READ_EXT, 207 ATA_CMD_WRITE_EXT, 208 0, 209 0, 210 0, 211 ATA_CMD_WRITE_FUA_EXT 212 }; 213 214 /** 215 * ata_rwcmd_protocol - set taskfile r/w commands and protocol 216 * @tf: command to examine and configure 217 * @dev: device tf belongs to 218 * 219 * Examine the device configuration and tf->flags to calculate 220 * the proper read/write commands and protocol to use. 221 * 222 * LOCKING: 223 * caller. 224 */ 225 static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev) 226 { 227 u8 cmd; 228 229 int index, fua, lba48, write; 230 231 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0; 232 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0; 233 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0; 234 235 if (dev->flags & ATA_DFLAG_PIO) { 236 tf->protocol = ATA_PROT_PIO; 237 index = dev->multi_count ? 0 : 8; 238 } else if (lba48 && (dev->ap->flags & ATA_FLAG_PIO_LBA48)) { 239 /* Unable to use DMA due to host limitation */ 240 tf->protocol = ATA_PROT_PIO; 241 index = dev->multi_count ? 0 : 8; 242 } else { 243 tf->protocol = ATA_PROT_DMA; 244 index = 16; 245 } 246 247 cmd = ata_rw_cmds[index + fua + lba48 + write]; 248 if (cmd) { 249 tf->command = cmd; 250 return 0; 251 } 252 return -1; 253 } 254 255 /** 256 * ata_tf_read_block - Read block address from ATA taskfile 257 * @tf: ATA taskfile of interest 258 * @dev: ATA device @tf belongs to 259 * 260 * LOCKING: 261 * None. 262 * 263 * Read block address from @tf. This function can handle all 264 * three address formats - LBA, LBA48 and CHS. tf->protocol and 265 * flags select the address format to use. 266 * 267 * RETURNS: 268 * Block address read from @tf. 269 */ 270 u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev) 271 { 272 u64 block = 0; 273 274 if (tf->flags & ATA_TFLAG_LBA) { 275 if (tf->flags & ATA_TFLAG_LBA48) { 276 block |= (u64)tf->hob_lbah << 40; 277 block |= (u64)tf->hob_lbam << 32; 278 block |= tf->hob_lbal << 24; 279 } else 280 block |= (tf->device & 0xf) << 24; 281 282 block |= tf->lbah << 16; 283 block |= tf->lbam << 8; 284 block |= tf->lbal; 285 } else { 286 u32 cyl, head, sect; 287 288 cyl = tf->lbam | (tf->lbah << 8); 289 head = tf->device & 0xf; 290 sect = tf->lbal; 291 292 block = (cyl * dev->heads + head) * dev->sectors + sect; 293 } 294 295 return block; 296 } 297 298 /** 299 * ata_build_rw_tf - Build ATA taskfile for given read/write request 300 * @tf: Target ATA taskfile 301 * @dev: ATA device @tf belongs to 302 * @block: Block address 303 * @n_block: Number of blocks 304 * @tf_flags: RW/FUA etc... 305 * @tag: tag 306 * 307 * LOCKING: 308 * None. 309 * 310 * Build ATA taskfile @tf for read/write request described by 311 * @block, @n_block, @tf_flags and @tag on @dev. 312 * 313 * RETURNS: 314 * 315 * 0 on success, -ERANGE if the request is too large for @dev, 316 * -EINVAL if the request is invalid. 317 */ 318 int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev, 319 u64 block, u32 n_block, unsigned int tf_flags, 320 unsigned int tag) 321 { 322 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 323 tf->flags |= tf_flags; 324 325 if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) { 326 /* yay, NCQ */ 327 if (!lba_48_ok(block, n_block)) 328 return -ERANGE; 329 330 tf->protocol = ATA_PROT_NCQ; 331 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48; 332 333 if (tf->flags & ATA_TFLAG_WRITE) 334 tf->command = ATA_CMD_FPDMA_WRITE; 335 else 336 tf->command = ATA_CMD_FPDMA_READ; 337 338 tf->nsect = tag << 3; 339 tf->hob_feature = (n_block >> 8) & 0xff; 340 tf->feature = n_block & 0xff; 341 342 tf->hob_lbah = (block >> 40) & 0xff; 343 tf->hob_lbam = (block >> 32) & 0xff; 344 tf->hob_lbal = (block >> 24) & 0xff; 345 tf->lbah = (block >> 16) & 0xff; 346 tf->lbam = (block >> 8) & 0xff; 347 tf->lbal = block & 0xff; 348 349 tf->device = 1 << 6; 350 if (tf->flags & ATA_TFLAG_FUA) 351 tf->device |= 1 << 7; 352 } else if (dev->flags & ATA_DFLAG_LBA) { 353 tf->flags |= ATA_TFLAG_LBA; 354 355 if (lba_28_ok(block, n_block)) { 356 /* use LBA28 */ 357 tf->device |= (block >> 24) & 0xf; 358 } else if (lba_48_ok(block, n_block)) { 359 if (!(dev->flags & ATA_DFLAG_LBA48)) 360 return -ERANGE; 361 362 /* use LBA48 */ 363 tf->flags |= ATA_TFLAG_LBA48; 364 365 tf->hob_nsect = (n_block >> 8) & 0xff; 366 367 tf->hob_lbah = (block >> 40) & 0xff; 368 tf->hob_lbam = (block >> 32) & 0xff; 369 tf->hob_lbal = (block >> 24) & 0xff; 370 } else 371 /* request too large even for LBA48 */ 372 return -ERANGE; 373 374 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0)) 375 return -EINVAL; 376 377 tf->nsect = n_block & 0xff; 378 379 tf->lbah = (block >> 16) & 0xff; 380 tf->lbam = (block >> 8) & 0xff; 381 tf->lbal = block & 0xff; 382 383 tf->device |= ATA_LBA; 384 } else { 385 /* CHS */ 386 u32 sect, head, cyl, track; 387 388 /* The request -may- be too large for CHS addressing. */ 389 if (!lba_28_ok(block, n_block)) 390 return -ERANGE; 391 392 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0)) 393 return -EINVAL; 394 395 /* Convert LBA to CHS */ 396 track = (u32)block / dev->sectors; 397 cyl = track / dev->heads; 398 head = track % dev->heads; 399 sect = (u32)block % dev->sectors + 1; 400 401 DPRINTK("block %u track %u cyl %u head %u sect %u\n", 402 (u32)block, track, cyl, head, sect); 403 404 /* Check whether the converted CHS can fit. 405 Cylinder: 0-65535 406 Head: 0-15 407 Sector: 1-255*/ 408 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect)) 409 return -ERANGE; 410 411 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */ 412 tf->lbal = sect; 413 tf->lbam = cyl; 414 tf->lbah = cyl >> 8; 415 tf->device |= head; 416 } 417 418 return 0; 419 } 420 421 /** 422 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask 423 * @pio_mask: pio_mask 424 * @mwdma_mask: mwdma_mask 425 * @udma_mask: udma_mask 426 * 427 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single 428 * unsigned int xfer_mask. 429 * 430 * LOCKING: 431 * None. 432 * 433 * RETURNS: 434 * Packed xfer_mask. 435 */ 436 static unsigned int ata_pack_xfermask(unsigned int pio_mask, 437 unsigned int mwdma_mask, 438 unsigned int udma_mask) 439 { 440 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) | 441 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) | 442 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA); 443 } 444 445 /** 446 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks 447 * @xfer_mask: xfer_mask to unpack 448 * @pio_mask: resulting pio_mask 449 * @mwdma_mask: resulting mwdma_mask 450 * @udma_mask: resulting udma_mask 451 * 452 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask. 453 * Any NULL distination masks will be ignored. 454 */ 455 static void ata_unpack_xfermask(unsigned int xfer_mask, 456 unsigned int *pio_mask, 457 unsigned int *mwdma_mask, 458 unsigned int *udma_mask) 459 { 460 if (pio_mask) 461 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO; 462 if (mwdma_mask) 463 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA; 464 if (udma_mask) 465 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA; 466 } 467 468 static const struct ata_xfer_ent { 469 int shift, bits; 470 u8 base; 471 } ata_xfer_tbl[] = { 472 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 }, 473 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 }, 474 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 }, 475 { -1, }, 476 }; 477 478 /** 479 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask 480 * @xfer_mask: xfer_mask of interest 481 * 482 * Return matching XFER_* value for @xfer_mask. Only the highest 483 * bit of @xfer_mask is considered. 484 * 485 * LOCKING: 486 * None. 487 * 488 * RETURNS: 489 * Matching XFER_* value, 0 if no match found. 490 */ 491 static u8 ata_xfer_mask2mode(unsigned int xfer_mask) 492 { 493 int highbit = fls(xfer_mask) - 1; 494 const struct ata_xfer_ent *ent; 495 496 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) 497 if (highbit >= ent->shift && highbit < ent->shift + ent->bits) 498 return ent->base + highbit - ent->shift; 499 return 0; 500 } 501 502 /** 503 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_* 504 * @xfer_mode: XFER_* of interest 505 * 506 * Return matching xfer_mask for @xfer_mode. 507 * 508 * LOCKING: 509 * None. 510 * 511 * RETURNS: 512 * Matching xfer_mask, 0 if no match found. 513 */ 514 static unsigned int ata_xfer_mode2mask(u8 xfer_mode) 515 { 516 const struct ata_xfer_ent *ent; 517 518 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) 519 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) 520 return 1 << (ent->shift + xfer_mode - ent->base); 521 return 0; 522 } 523 524 /** 525 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_* 526 * @xfer_mode: XFER_* of interest 527 * 528 * Return matching xfer_shift for @xfer_mode. 529 * 530 * LOCKING: 531 * None. 532 * 533 * RETURNS: 534 * Matching xfer_shift, -1 if no match found. 535 */ 536 static int ata_xfer_mode2shift(unsigned int xfer_mode) 537 { 538 const struct ata_xfer_ent *ent; 539 540 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) 541 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) 542 return ent->shift; 543 return -1; 544 } 545 546 /** 547 * ata_mode_string - convert xfer_mask to string 548 * @xfer_mask: mask of bits supported; only highest bit counts. 549 * 550 * Determine string which represents the highest speed 551 * (highest bit in @modemask). 552 * 553 * LOCKING: 554 * None. 555 * 556 * RETURNS: 557 * Constant C string representing highest speed listed in 558 * @mode_mask, or the constant C string "<n/a>". 559 */ 560 static const char *ata_mode_string(unsigned int xfer_mask) 561 { 562 static const char * const xfer_mode_str[] = { 563 "PIO0", 564 "PIO1", 565 "PIO2", 566 "PIO3", 567 "PIO4", 568 "PIO5", 569 "PIO6", 570 "MWDMA0", 571 "MWDMA1", 572 "MWDMA2", 573 "MWDMA3", 574 "MWDMA4", 575 "UDMA/16", 576 "UDMA/25", 577 "UDMA/33", 578 "UDMA/44", 579 "UDMA/66", 580 "UDMA/100", 581 "UDMA/133", 582 "UDMA7", 583 }; 584 int highbit; 585 586 highbit = fls(xfer_mask) - 1; 587 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str)) 588 return xfer_mode_str[highbit]; 589 return "<n/a>"; 590 } 591 592 static const char *sata_spd_string(unsigned int spd) 593 { 594 static const char * const spd_str[] = { 595 "1.5 Gbps", 596 "3.0 Gbps", 597 }; 598 599 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str)) 600 return "<unknown>"; 601 return spd_str[spd - 1]; 602 } 603 604 void ata_dev_disable(struct ata_device *dev) 605 { 606 if (ata_dev_enabled(dev)) { 607 if (ata_msg_drv(dev->ap)) 608 ata_dev_printk(dev, KERN_WARNING, "disabled\n"); 609 ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO0 | 610 ATA_DNXFER_QUIET); 611 dev->class++; 612 } 613 } 614 615 /** 616 * ata_devchk - PATA device presence detection 617 * @ap: ATA channel to examine 618 * @device: Device to examine (starting at zero) 619 * 620 * This technique was originally described in 621 * Hale Landis's ATADRVR (www.ata-atapi.com), and 622 * later found its way into the ATA/ATAPI spec. 623 * 624 * Write a pattern to the ATA shadow registers, 625 * and if a device is present, it will respond by 626 * correctly storing and echoing back the 627 * ATA shadow register contents. 628 * 629 * LOCKING: 630 * caller. 631 */ 632 633 static unsigned int ata_devchk(struct ata_port *ap, unsigned int device) 634 { 635 struct ata_ioports *ioaddr = &ap->ioaddr; 636 u8 nsect, lbal; 637 638 ap->ops->dev_select(ap, device); 639 640 iowrite8(0x55, ioaddr->nsect_addr); 641 iowrite8(0xaa, ioaddr->lbal_addr); 642 643 iowrite8(0xaa, ioaddr->nsect_addr); 644 iowrite8(0x55, ioaddr->lbal_addr); 645 646 iowrite8(0x55, ioaddr->nsect_addr); 647 iowrite8(0xaa, ioaddr->lbal_addr); 648 649 nsect = ioread8(ioaddr->nsect_addr); 650 lbal = ioread8(ioaddr->lbal_addr); 651 652 if ((nsect == 0x55) && (lbal == 0xaa)) 653 return 1; /* we found a device */ 654 655 return 0; /* nothing found */ 656 } 657 658 /** 659 * ata_dev_classify - determine device type based on ATA-spec signature 660 * @tf: ATA taskfile register set for device to be identified 661 * 662 * Determine from taskfile register contents whether a device is 663 * ATA or ATAPI, as per "Signature and persistence" section 664 * of ATA/PI spec (volume 1, sect 5.14). 665 * 666 * LOCKING: 667 * None. 668 * 669 * RETURNS: 670 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN 671 * the event of failure. 672 */ 673 674 unsigned int ata_dev_classify(const struct ata_taskfile *tf) 675 { 676 /* Apple's open source Darwin code hints that some devices only 677 * put a proper signature into the LBA mid/high registers, 678 * So, we only check those. It's sufficient for uniqueness. 679 */ 680 681 if (((tf->lbam == 0) && (tf->lbah == 0)) || 682 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) { 683 DPRINTK("found ATA device by sig\n"); 684 return ATA_DEV_ATA; 685 } 686 687 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) || 688 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) { 689 DPRINTK("found ATAPI device by sig\n"); 690 return ATA_DEV_ATAPI; 691 } 692 693 DPRINTK("unknown device\n"); 694 return ATA_DEV_UNKNOWN; 695 } 696 697 /** 698 * ata_dev_try_classify - Parse returned ATA device signature 699 * @ap: ATA channel to examine 700 * @device: Device to examine (starting at zero) 701 * @r_err: Value of error register on completion 702 * 703 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, 704 * an ATA/ATAPI-defined set of values is placed in the ATA 705 * shadow registers, indicating the results of device detection 706 * and diagnostics. 707 * 708 * Select the ATA device, and read the values from the ATA shadow 709 * registers. Then parse according to the Error register value, 710 * and the spec-defined values examined by ata_dev_classify(). 711 * 712 * LOCKING: 713 * caller. 714 * 715 * RETURNS: 716 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE. 717 */ 718 719 unsigned int 720 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err) 721 { 722 struct ata_taskfile tf; 723 unsigned int class; 724 u8 err; 725 726 ap->ops->dev_select(ap, device); 727 728 memset(&tf, 0, sizeof(tf)); 729 730 ap->ops->tf_read(ap, &tf); 731 err = tf.feature; 732 if (r_err) 733 *r_err = err; 734 735 /* see if device passed diags: if master then continue and warn later */ 736 if (err == 0 && device == 0) 737 /* diagnostic fail : do nothing _YET_ */ 738 ap->device[device].horkage |= ATA_HORKAGE_DIAGNOSTIC; 739 else if (err == 1) 740 /* do nothing */ ; 741 else if ((device == 0) && (err == 0x81)) 742 /* do nothing */ ; 743 else 744 return ATA_DEV_NONE; 745 746 /* determine if device is ATA or ATAPI */ 747 class = ata_dev_classify(&tf); 748 749 if (class == ATA_DEV_UNKNOWN) 750 return ATA_DEV_NONE; 751 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) 752 return ATA_DEV_NONE; 753 return class; 754 } 755 756 /** 757 * ata_id_string - Convert IDENTIFY DEVICE page into string 758 * @id: IDENTIFY DEVICE results we will examine 759 * @s: string into which data is output 760 * @ofs: offset into identify device page 761 * @len: length of string to return. must be an even number. 762 * 763 * The strings in the IDENTIFY DEVICE page are broken up into 764 * 16-bit chunks. Run through the string, and output each 765 * 8-bit chunk linearly, regardless of platform. 766 * 767 * LOCKING: 768 * caller. 769 */ 770 771 void ata_id_string(const u16 *id, unsigned char *s, 772 unsigned int ofs, unsigned int len) 773 { 774 unsigned int c; 775 776 while (len > 0) { 777 c = id[ofs] >> 8; 778 *s = c; 779 s++; 780 781 c = id[ofs] & 0xff; 782 *s = c; 783 s++; 784 785 ofs++; 786 len -= 2; 787 } 788 } 789 790 /** 791 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string 792 * @id: IDENTIFY DEVICE results we will examine 793 * @s: string into which data is output 794 * @ofs: offset into identify device page 795 * @len: length of string to return. must be an odd number. 796 * 797 * This function is identical to ata_id_string except that it 798 * trims trailing spaces and terminates the resulting string with 799 * null. @len must be actual maximum length (even number) + 1. 800 * 801 * LOCKING: 802 * caller. 803 */ 804 void ata_id_c_string(const u16 *id, unsigned char *s, 805 unsigned int ofs, unsigned int len) 806 { 807 unsigned char *p; 808 809 WARN_ON(!(len & 1)); 810 811 ata_id_string(id, s, ofs, len - 1); 812 813 p = s + strnlen(s, len - 1); 814 while (p > s && p[-1] == ' ') 815 p--; 816 *p = '\0'; 817 } 818 819 static u64 ata_tf_to_lba48(struct ata_taskfile *tf) 820 { 821 u64 sectors = 0; 822 823 sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40; 824 sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32; 825 sectors |= (tf->hob_lbal & 0xff) << 24; 826 sectors |= (tf->lbah & 0xff) << 16; 827 sectors |= (tf->lbam & 0xff) << 8; 828 sectors |= (tf->lbal & 0xff); 829 830 return ++sectors; 831 } 832 833 static u64 ata_tf_to_lba(struct ata_taskfile *tf) 834 { 835 u64 sectors = 0; 836 837 sectors |= (tf->device & 0x0f) << 24; 838 sectors |= (tf->lbah & 0xff) << 16; 839 sectors |= (tf->lbam & 0xff) << 8; 840 sectors |= (tf->lbal & 0xff); 841 842 return ++sectors; 843 } 844 845 /** 846 * ata_read_native_max_address_ext - LBA48 native max query 847 * @dev: Device to query 848 * 849 * Perform an LBA48 size query upon the device in question. Return the 850 * actual LBA48 size or zero if the command fails. 851 */ 852 853 static u64 ata_read_native_max_address_ext(struct ata_device *dev) 854 { 855 unsigned int err; 856 struct ata_taskfile tf; 857 858 ata_tf_init(dev, &tf); 859 860 tf.command = ATA_CMD_READ_NATIVE_MAX_EXT; 861 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_LBA48 | ATA_TFLAG_ISADDR; 862 tf.protocol |= ATA_PROT_NODATA; 863 tf.device |= 0x40; 864 865 err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); 866 if (err) 867 return 0; 868 869 return ata_tf_to_lba48(&tf); 870 } 871 872 /** 873 * ata_read_native_max_address - LBA28 native max query 874 * @dev: Device to query 875 * 876 * Performa an LBA28 size query upon the device in question. Return the 877 * actual LBA28 size or zero if the command fails. 878 */ 879 880 static u64 ata_read_native_max_address(struct ata_device *dev) 881 { 882 unsigned int err; 883 struct ata_taskfile tf; 884 885 ata_tf_init(dev, &tf); 886 887 tf.command = ATA_CMD_READ_NATIVE_MAX; 888 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR; 889 tf.protocol |= ATA_PROT_NODATA; 890 tf.device |= 0x40; 891 892 err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); 893 if (err) 894 return 0; 895 896 return ata_tf_to_lba(&tf); 897 } 898 899 /** 900 * ata_set_native_max_address_ext - LBA48 native max set 901 * @dev: Device to query 902 * @new_sectors: new max sectors value to set for the device 903 * 904 * Perform an LBA48 size set max upon the device in question. Return the 905 * actual LBA48 size or zero if the command fails. 906 */ 907 908 static u64 ata_set_native_max_address_ext(struct ata_device *dev, u64 new_sectors) 909 { 910 unsigned int err; 911 struct ata_taskfile tf; 912 913 new_sectors--; 914 915 ata_tf_init(dev, &tf); 916 917 tf.command = ATA_CMD_SET_MAX_EXT; 918 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_LBA48 | ATA_TFLAG_ISADDR; 919 tf.protocol |= ATA_PROT_NODATA; 920 tf.device |= 0x40; 921 922 tf.lbal = (new_sectors >> 0) & 0xff; 923 tf.lbam = (new_sectors >> 8) & 0xff; 924 tf.lbah = (new_sectors >> 16) & 0xff; 925 926 tf.hob_lbal = (new_sectors >> 24) & 0xff; 927 tf.hob_lbam = (new_sectors >> 32) & 0xff; 928 tf.hob_lbah = (new_sectors >> 40) & 0xff; 929 930 err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); 931 if (err) 932 return 0; 933 934 return ata_tf_to_lba48(&tf); 935 } 936 937 /** 938 * ata_set_native_max_address - LBA28 native max set 939 * @dev: Device to query 940 * @new_sectors: new max sectors value to set for the device 941 * 942 * Perform an LBA28 size set max upon the device in question. Return the 943 * actual LBA28 size or zero if the command fails. 944 */ 945 946 static u64 ata_set_native_max_address(struct ata_device *dev, u64 new_sectors) 947 { 948 unsigned int err; 949 struct ata_taskfile tf; 950 951 new_sectors--; 952 953 ata_tf_init(dev, &tf); 954 955 tf.command = ATA_CMD_SET_MAX; 956 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR; 957 tf.protocol |= ATA_PROT_NODATA; 958 959 tf.lbal = (new_sectors >> 0) & 0xff; 960 tf.lbam = (new_sectors >> 8) & 0xff; 961 tf.lbah = (new_sectors >> 16) & 0xff; 962 tf.device |= ((new_sectors >> 24) & 0x0f) | 0x40; 963 964 err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); 965 if (err) 966 return 0; 967 968 return ata_tf_to_lba(&tf); 969 } 970 971 /** 972 * ata_hpa_resize - Resize a device with an HPA set 973 * @dev: Device to resize 974 * 975 * Read the size of an LBA28 or LBA48 disk with HPA features and resize 976 * it if required to the full size of the media. The caller must check 977 * the drive has the HPA feature set enabled. 978 */ 979 980 static u64 ata_hpa_resize(struct ata_device *dev) 981 { 982 u64 sectors = dev->n_sectors; 983 u64 hpa_sectors; 984 985 if (ata_id_has_lba48(dev->id)) 986 hpa_sectors = ata_read_native_max_address_ext(dev); 987 else 988 hpa_sectors = ata_read_native_max_address(dev); 989 990 if (hpa_sectors > sectors) { 991 ata_dev_printk(dev, KERN_INFO, 992 "Host Protected Area detected:\n" 993 "\tcurrent size: %lld sectors\n" 994 "\tnative size: %lld sectors\n", 995 (long long)sectors, (long long)hpa_sectors); 996 997 if (ata_ignore_hpa) { 998 if (ata_id_has_lba48(dev->id)) 999 hpa_sectors = ata_set_native_max_address_ext(dev, hpa_sectors); 1000 else 1001 hpa_sectors = ata_set_native_max_address(dev, 1002 hpa_sectors); 1003 1004 if (hpa_sectors) { 1005 ata_dev_printk(dev, KERN_INFO, "native size " 1006 "increased to %lld sectors\n", 1007 (long long)hpa_sectors); 1008 return hpa_sectors; 1009 } 1010 } 1011 } else if (hpa_sectors < sectors) 1012 ata_dev_printk(dev, KERN_WARNING, "%s 1: hpa sectors (%lld) " 1013 "is smaller than sectors (%lld)\n", __FUNCTION__, 1014 (long long)hpa_sectors, (long long)sectors); 1015 1016 return sectors; 1017 } 1018 1019 static u64 ata_id_n_sectors(const u16 *id) 1020 { 1021 if (ata_id_has_lba(id)) { 1022 if (ata_id_has_lba48(id)) 1023 return ata_id_u64(id, 100); 1024 else 1025 return ata_id_u32(id, 60); 1026 } else { 1027 if (ata_id_current_chs_valid(id)) 1028 return ata_id_u32(id, 57); 1029 else 1030 return id[1] * id[3] * id[6]; 1031 } 1032 } 1033 1034 /** 1035 * ata_id_to_dma_mode - Identify DMA mode from id block 1036 * @dev: device to identify 1037 * @unknown: mode to assume if we cannot tell 1038 * 1039 * Set up the timing values for the device based upon the identify 1040 * reported values for the DMA mode. This function is used by drivers 1041 * which rely upon firmware configured modes, but wish to report the 1042 * mode correctly when possible. 1043 * 1044 * In addition we emit similarly formatted messages to the default 1045 * ata_dev_set_mode handler, in order to provide consistency of 1046 * presentation. 1047 */ 1048 1049 void ata_id_to_dma_mode(struct ata_device *dev, u8 unknown) 1050 { 1051 unsigned int mask; 1052 u8 mode; 1053 1054 /* Pack the DMA modes */ 1055 mask = ((dev->id[63] >> 8) << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA; 1056 if (dev->id[53] & 0x04) 1057 mask |= ((dev->id[88] >> 8) << ATA_SHIFT_UDMA) & ATA_MASK_UDMA; 1058 1059 /* Select the mode in use */ 1060 mode = ata_xfer_mask2mode(mask); 1061 1062 if (mode != 0) { 1063 ata_dev_printk(dev, KERN_INFO, "configured for %s\n", 1064 ata_mode_string(mask)); 1065 } else { 1066 /* SWDMA perhaps ? */ 1067 mode = unknown; 1068 ata_dev_printk(dev, KERN_INFO, "configured for DMA\n"); 1069 } 1070 1071 /* Configure the device reporting */ 1072 dev->xfer_mode = mode; 1073 dev->xfer_shift = ata_xfer_mode2shift(mode); 1074 } 1075 1076 /** 1077 * ata_noop_dev_select - Select device 0/1 on ATA bus 1078 * @ap: ATA channel to manipulate 1079 * @device: ATA device (numbered from zero) to select 1080 * 1081 * This function performs no actual function. 1082 * 1083 * May be used as the dev_select() entry in ata_port_operations. 1084 * 1085 * LOCKING: 1086 * caller. 1087 */ 1088 void ata_noop_dev_select (struct ata_port *ap, unsigned int device) 1089 { 1090 } 1091 1092 1093 /** 1094 * ata_std_dev_select - Select device 0/1 on ATA bus 1095 * @ap: ATA channel to manipulate 1096 * @device: ATA device (numbered from zero) to select 1097 * 1098 * Use the method defined in the ATA specification to 1099 * make either device 0, or device 1, active on the 1100 * ATA channel. Works with both PIO and MMIO. 1101 * 1102 * May be used as the dev_select() entry in ata_port_operations. 1103 * 1104 * LOCKING: 1105 * caller. 1106 */ 1107 1108 void ata_std_dev_select (struct ata_port *ap, unsigned int device) 1109 { 1110 u8 tmp; 1111 1112 if (device == 0) 1113 tmp = ATA_DEVICE_OBS; 1114 else 1115 tmp = ATA_DEVICE_OBS | ATA_DEV1; 1116 1117 iowrite8(tmp, ap->ioaddr.device_addr); 1118 ata_pause(ap); /* needed; also flushes, for mmio */ 1119 } 1120 1121 /** 1122 * ata_dev_select - Select device 0/1 on ATA bus 1123 * @ap: ATA channel to manipulate 1124 * @device: ATA device (numbered from zero) to select 1125 * @wait: non-zero to wait for Status register BSY bit to clear 1126 * @can_sleep: non-zero if context allows sleeping 1127 * 1128 * Use the method defined in the ATA specification to 1129 * make either device 0, or device 1, active on the 1130 * ATA channel. 1131 * 1132 * This is a high-level version of ata_std_dev_select(), 1133 * which additionally provides the services of inserting 1134 * the proper pauses and status polling, where needed. 1135 * 1136 * LOCKING: 1137 * caller. 1138 */ 1139 1140 void ata_dev_select(struct ata_port *ap, unsigned int device, 1141 unsigned int wait, unsigned int can_sleep) 1142 { 1143 if (ata_msg_probe(ap)) 1144 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, " 1145 "device %u, wait %u\n", device, wait); 1146 1147 if (wait) 1148 ata_wait_idle(ap); 1149 1150 ap->ops->dev_select(ap, device); 1151 1152 if (wait) { 1153 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI) 1154 msleep(150); 1155 ata_wait_idle(ap); 1156 } 1157 } 1158 1159 /** 1160 * ata_dump_id - IDENTIFY DEVICE info debugging output 1161 * @id: IDENTIFY DEVICE page to dump 1162 * 1163 * Dump selected 16-bit words from the given IDENTIFY DEVICE 1164 * page. 1165 * 1166 * LOCKING: 1167 * caller. 1168 */ 1169 1170 static inline void ata_dump_id(const u16 *id) 1171 { 1172 DPRINTK("49==0x%04x " 1173 "53==0x%04x " 1174 "63==0x%04x " 1175 "64==0x%04x " 1176 "75==0x%04x \n", 1177 id[49], 1178 id[53], 1179 id[63], 1180 id[64], 1181 id[75]); 1182 DPRINTK("80==0x%04x " 1183 "81==0x%04x " 1184 "82==0x%04x " 1185 "83==0x%04x " 1186 "84==0x%04x \n", 1187 id[80], 1188 id[81], 1189 id[82], 1190 id[83], 1191 id[84]); 1192 DPRINTK("88==0x%04x " 1193 "93==0x%04x\n", 1194 id[88], 1195 id[93]); 1196 } 1197 1198 /** 1199 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data 1200 * @id: IDENTIFY data to compute xfer mask from 1201 * 1202 * Compute the xfermask for this device. This is not as trivial 1203 * as it seems if we must consider early devices correctly. 1204 * 1205 * FIXME: pre IDE drive timing (do we care ?). 1206 * 1207 * LOCKING: 1208 * None. 1209 * 1210 * RETURNS: 1211 * Computed xfermask 1212 */ 1213 static unsigned int ata_id_xfermask(const u16 *id) 1214 { 1215 unsigned int pio_mask, mwdma_mask, udma_mask; 1216 1217 /* Usual case. Word 53 indicates word 64 is valid */ 1218 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) { 1219 pio_mask = id[ATA_ID_PIO_MODES] & 0x03; 1220 pio_mask <<= 3; 1221 pio_mask |= 0x7; 1222 } else { 1223 /* If word 64 isn't valid then Word 51 high byte holds 1224 * the PIO timing number for the maximum. Turn it into 1225 * a mask. 1226 */ 1227 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF; 1228 if (mode < 5) /* Valid PIO range */ 1229 pio_mask = (2 << mode) - 1; 1230 else 1231 pio_mask = 1; 1232 1233 /* But wait.. there's more. Design your standards by 1234 * committee and you too can get a free iordy field to 1235 * process. However its the speeds not the modes that 1236 * are supported... Note drivers using the timing API 1237 * will get this right anyway 1238 */ 1239 } 1240 1241 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07; 1242 1243 if (ata_id_is_cfa(id)) { 1244 /* 1245 * Process compact flash extended modes 1246 */ 1247 int pio = id[163] & 0x7; 1248 int dma = (id[163] >> 3) & 7; 1249 1250 if (pio) 1251 pio_mask |= (1 << 5); 1252 if (pio > 1) 1253 pio_mask |= (1 << 6); 1254 if (dma) 1255 mwdma_mask |= (1 << 3); 1256 if (dma > 1) 1257 mwdma_mask |= (1 << 4); 1258 } 1259 1260 udma_mask = 0; 1261 if (id[ATA_ID_FIELD_VALID] & (1 << 2)) 1262 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff; 1263 1264 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); 1265 } 1266 1267 /** 1268 * ata_port_queue_task - Queue port_task 1269 * @ap: The ata_port to queue port_task for 1270 * @fn: workqueue function to be scheduled 1271 * @data: data for @fn to use 1272 * @delay: delay time for workqueue function 1273 * 1274 * Schedule @fn(@data) for execution after @delay jiffies using 1275 * port_task. There is one port_task per port and it's the 1276 * user(low level driver)'s responsibility to make sure that only 1277 * one task is active at any given time. 1278 * 1279 * libata core layer takes care of synchronization between 1280 * port_task and EH. ata_port_queue_task() may be ignored for EH 1281 * synchronization. 1282 * 1283 * LOCKING: 1284 * Inherited from caller. 1285 */ 1286 void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data, 1287 unsigned long delay) 1288 { 1289 PREPARE_DELAYED_WORK(&ap->port_task, fn); 1290 ap->port_task_data = data; 1291 1292 /* may fail if ata_port_flush_task() in progress */ 1293 queue_delayed_work(ata_wq, &ap->port_task, delay); 1294 } 1295 1296 /** 1297 * ata_port_flush_task - Flush port_task 1298 * @ap: The ata_port to flush port_task for 1299 * 1300 * After this function completes, port_task is guranteed not to 1301 * be running or scheduled. 1302 * 1303 * LOCKING: 1304 * Kernel thread context (may sleep) 1305 */ 1306 void ata_port_flush_task(struct ata_port *ap) 1307 { 1308 DPRINTK("ENTER\n"); 1309 1310 cancel_rearming_delayed_work(&ap->port_task); 1311 1312 if (ata_msg_ctl(ap)) 1313 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__); 1314 } 1315 1316 static void ata_qc_complete_internal(struct ata_queued_cmd *qc) 1317 { 1318 struct completion *waiting = qc->private_data; 1319 1320 complete(waiting); 1321 } 1322 1323 /** 1324 * ata_exec_internal_sg - execute libata internal command 1325 * @dev: Device to which the command is sent 1326 * @tf: Taskfile registers for the command and the result 1327 * @cdb: CDB for packet command 1328 * @dma_dir: Data tranfer direction of the command 1329 * @sg: sg list for the data buffer of the command 1330 * @n_elem: Number of sg entries 1331 * 1332 * Executes libata internal command with timeout. @tf contains 1333 * command on entry and result on return. Timeout and error 1334 * conditions are reported via return value. No recovery action 1335 * is taken after a command times out. It's caller's duty to 1336 * clean up after timeout. 1337 * 1338 * LOCKING: 1339 * None. Should be called with kernel context, might sleep. 1340 * 1341 * RETURNS: 1342 * Zero on success, AC_ERR_* mask on failure 1343 */ 1344 unsigned ata_exec_internal_sg(struct ata_device *dev, 1345 struct ata_taskfile *tf, const u8 *cdb, 1346 int dma_dir, struct scatterlist *sg, 1347 unsigned int n_elem) 1348 { 1349 struct ata_port *ap = dev->ap; 1350 u8 command = tf->command; 1351 struct ata_queued_cmd *qc; 1352 unsigned int tag, preempted_tag; 1353 u32 preempted_sactive, preempted_qc_active; 1354 DECLARE_COMPLETION_ONSTACK(wait); 1355 unsigned long flags; 1356 unsigned int err_mask; 1357 int rc; 1358 1359 spin_lock_irqsave(ap->lock, flags); 1360 1361 /* no internal command while frozen */ 1362 if (ap->pflags & ATA_PFLAG_FROZEN) { 1363 spin_unlock_irqrestore(ap->lock, flags); 1364 return AC_ERR_SYSTEM; 1365 } 1366 1367 /* initialize internal qc */ 1368 1369 /* XXX: Tag 0 is used for drivers with legacy EH as some 1370 * drivers choke if any other tag is given. This breaks 1371 * ata_tag_internal() test for those drivers. Don't use new 1372 * EH stuff without converting to it. 1373 */ 1374 if (ap->ops->error_handler) 1375 tag = ATA_TAG_INTERNAL; 1376 else 1377 tag = 0; 1378 1379 if (test_and_set_bit(tag, &ap->qc_allocated)) 1380 BUG(); 1381 qc = __ata_qc_from_tag(ap, tag); 1382 1383 qc->tag = tag; 1384 qc->scsicmd = NULL; 1385 qc->ap = ap; 1386 qc->dev = dev; 1387 ata_qc_reinit(qc); 1388 1389 preempted_tag = ap->active_tag; 1390 preempted_sactive = ap->sactive; 1391 preempted_qc_active = ap->qc_active; 1392 ap->active_tag = ATA_TAG_POISON; 1393 ap->sactive = 0; 1394 ap->qc_active = 0; 1395 1396 /* prepare & issue qc */ 1397 qc->tf = *tf; 1398 if (cdb) 1399 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN); 1400 qc->flags |= ATA_QCFLAG_RESULT_TF; 1401 qc->dma_dir = dma_dir; 1402 if (dma_dir != DMA_NONE) { 1403 unsigned int i, buflen = 0; 1404 1405 for (i = 0; i < n_elem; i++) 1406 buflen += sg[i].length; 1407 1408 ata_sg_init(qc, sg, n_elem); 1409 qc->nbytes = buflen; 1410 } 1411 1412 qc->private_data = &wait; 1413 qc->complete_fn = ata_qc_complete_internal; 1414 1415 ata_qc_issue(qc); 1416 1417 spin_unlock_irqrestore(ap->lock, flags); 1418 1419 rc = wait_for_completion_timeout(&wait, ata_probe_timeout); 1420 1421 ata_port_flush_task(ap); 1422 1423 if (!rc) { 1424 spin_lock_irqsave(ap->lock, flags); 1425 1426 /* We're racing with irq here. If we lose, the 1427 * following test prevents us from completing the qc 1428 * twice. If we win, the port is frozen and will be 1429 * cleaned up by ->post_internal_cmd(). 1430 */ 1431 if (qc->flags & ATA_QCFLAG_ACTIVE) { 1432 qc->err_mask |= AC_ERR_TIMEOUT; 1433 1434 if (ap->ops->error_handler) 1435 ata_port_freeze(ap); 1436 else 1437 ata_qc_complete(qc); 1438 1439 if (ata_msg_warn(ap)) 1440 ata_dev_printk(dev, KERN_WARNING, 1441 "qc timeout (cmd 0x%x)\n", command); 1442 } 1443 1444 spin_unlock_irqrestore(ap->lock, flags); 1445 } 1446 1447 /* do post_internal_cmd */ 1448 if (ap->ops->post_internal_cmd) 1449 ap->ops->post_internal_cmd(qc); 1450 1451 /* perform minimal error analysis */ 1452 if (qc->flags & ATA_QCFLAG_FAILED) { 1453 if (qc->result_tf.command & (ATA_ERR | ATA_DF)) 1454 qc->err_mask |= AC_ERR_DEV; 1455 1456 if (!qc->err_mask) 1457 qc->err_mask |= AC_ERR_OTHER; 1458 1459 if (qc->err_mask & ~AC_ERR_OTHER) 1460 qc->err_mask &= ~AC_ERR_OTHER; 1461 } 1462 1463 /* finish up */ 1464 spin_lock_irqsave(ap->lock, flags); 1465 1466 *tf = qc->result_tf; 1467 err_mask = qc->err_mask; 1468 1469 ata_qc_free(qc); 1470 ap->active_tag = preempted_tag; 1471 ap->sactive = preempted_sactive; 1472 ap->qc_active = preempted_qc_active; 1473 1474 /* XXX - Some LLDDs (sata_mv) disable port on command failure. 1475 * Until those drivers are fixed, we detect the condition 1476 * here, fail the command with AC_ERR_SYSTEM and reenable the 1477 * port. 1478 * 1479 * Note that this doesn't change any behavior as internal 1480 * command failure results in disabling the device in the 1481 * higher layer for LLDDs without new reset/EH callbacks. 1482 * 1483 * Kill the following code as soon as those drivers are fixed. 1484 */ 1485 if (ap->flags & ATA_FLAG_DISABLED) { 1486 err_mask |= AC_ERR_SYSTEM; 1487 ata_port_probe(ap); 1488 } 1489 1490 spin_unlock_irqrestore(ap->lock, flags); 1491 1492 return err_mask; 1493 } 1494 1495 /** 1496 * ata_exec_internal - execute libata internal command 1497 * @dev: Device to which the command is sent 1498 * @tf: Taskfile registers for the command and the result 1499 * @cdb: CDB for packet command 1500 * @dma_dir: Data tranfer direction of the command 1501 * @buf: Data buffer of the command 1502 * @buflen: Length of data buffer 1503 * 1504 * Wrapper around ata_exec_internal_sg() which takes simple 1505 * buffer instead of sg list. 1506 * 1507 * LOCKING: 1508 * None. Should be called with kernel context, might sleep. 1509 * 1510 * RETURNS: 1511 * Zero on success, AC_ERR_* mask on failure 1512 */ 1513 unsigned ata_exec_internal(struct ata_device *dev, 1514 struct ata_taskfile *tf, const u8 *cdb, 1515 int dma_dir, void *buf, unsigned int buflen) 1516 { 1517 struct scatterlist *psg = NULL, sg; 1518 unsigned int n_elem = 0; 1519 1520 if (dma_dir != DMA_NONE) { 1521 WARN_ON(!buf); 1522 sg_init_one(&sg, buf, buflen); 1523 psg = &sg; 1524 n_elem++; 1525 } 1526 1527 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem); 1528 } 1529 1530 /** 1531 * ata_do_simple_cmd - execute simple internal command 1532 * @dev: Device to which the command is sent 1533 * @cmd: Opcode to execute 1534 * 1535 * Execute a 'simple' command, that only consists of the opcode 1536 * 'cmd' itself, without filling any other registers 1537 * 1538 * LOCKING: 1539 * Kernel thread context (may sleep). 1540 * 1541 * RETURNS: 1542 * Zero on success, AC_ERR_* mask on failure 1543 */ 1544 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd) 1545 { 1546 struct ata_taskfile tf; 1547 1548 ata_tf_init(dev, &tf); 1549 1550 tf.command = cmd; 1551 tf.flags |= ATA_TFLAG_DEVICE; 1552 tf.protocol = ATA_PROT_NODATA; 1553 1554 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); 1555 } 1556 1557 /** 1558 * ata_pio_need_iordy - check if iordy needed 1559 * @adev: ATA device 1560 * 1561 * Check if the current speed of the device requires IORDY. Used 1562 * by various controllers for chip configuration. 1563 */ 1564 1565 unsigned int ata_pio_need_iordy(const struct ata_device *adev) 1566 { 1567 /* Controller doesn't support IORDY. Probably a pointless check 1568 as the caller should know this */ 1569 if (adev->ap->flags & ATA_FLAG_NO_IORDY) 1570 return 0; 1571 /* PIO3 and higher it is mandatory */ 1572 if (adev->pio_mode > XFER_PIO_2) 1573 return 1; 1574 /* We turn it on when possible */ 1575 if (ata_id_has_iordy(adev->id)) 1576 return 1; 1577 return 0; 1578 } 1579 1580 /** 1581 * ata_pio_mask_no_iordy - Return the non IORDY mask 1582 * @adev: ATA device 1583 * 1584 * Compute the highest mode possible if we are not using iordy. Return 1585 * -1 if no iordy mode is available. 1586 */ 1587 1588 static u32 ata_pio_mask_no_iordy(const struct ata_device *adev) 1589 { 1590 /* If we have no drive specific rule, then PIO 2 is non IORDY */ 1591 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */ 1592 u16 pio = adev->id[ATA_ID_EIDE_PIO]; 1593 /* Is the speed faster than the drive allows non IORDY ? */ 1594 if (pio) { 1595 /* This is cycle times not frequency - watch the logic! */ 1596 if (pio > 240) /* PIO2 is 240nS per cycle */ 1597 return 3 << ATA_SHIFT_PIO; 1598 return 7 << ATA_SHIFT_PIO; 1599 } 1600 } 1601 return 3 << ATA_SHIFT_PIO; 1602 } 1603 1604 /** 1605 * ata_dev_read_id - Read ID data from the specified device 1606 * @dev: target device 1607 * @p_class: pointer to class of the target device (may be changed) 1608 * @flags: ATA_READID_* flags 1609 * @id: buffer to read IDENTIFY data into 1610 * 1611 * Read ID data from the specified device. ATA_CMD_ID_ATA is 1612 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI 1613 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS 1614 * for pre-ATA4 drives. 1615 * 1616 * LOCKING: 1617 * Kernel thread context (may sleep) 1618 * 1619 * RETURNS: 1620 * 0 on success, -errno otherwise. 1621 */ 1622 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class, 1623 unsigned int flags, u16 *id) 1624 { 1625 struct ata_port *ap = dev->ap; 1626 unsigned int class = *p_class; 1627 struct ata_taskfile tf; 1628 unsigned int err_mask = 0; 1629 const char *reason; 1630 int may_fallback = 1, tried_spinup = 0; 1631 int rc; 1632 1633 if (ata_msg_ctl(ap)) 1634 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__); 1635 1636 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */ 1637 retry: 1638 ata_tf_init(dev, &tf); 1639 1640 switch (class) { 1641 case ATA_DEV_ATA: 1642 tf.command = ATA_CMD_ID_ATA; 1643 break; 1644 case ATA_DEV_ATAPI: 1645 tf.command = ATA_CMD_ID_ATAPI; 1646 break; 1647 default: 1648 rc = -ENODEV; 1649 reason = "unsupported class"; 1650 goto err_out; 1651 } 1652 1653 tf.protocol = ATA_PROT_PIO; 1654 1655 /* Some devices choke if TF registers contain garbage. Make 1656 * sure those are properly initialized. 1657 */ 1658 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 1659 1660 /* Device presence detection is unreliable on some 1661 * controllers. Always poll IDENTIFY if available. 1662 */ 1663 tf.flags |= ATA_TFLAG_POLLING; 1664 1665 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE, 1666 id, sizeof(id[0]) * ATA_ID_WORDS); 1667 if (err_mask) { 1668 if (err_mask & AC_ERR_NODEV_HINT) { 1669 DPRINTK("ata%u.%d: NODEV after polling detection\n", 1670 ap->print_id, dev->devno); 1671 return -ENOENT; 1672 } 1673 1674 /* Device or controller might have reported the wrong 1675 * device class. Give a shot at the other IDENTIFY if 1676 * the current one is aborted by the device. 1677 */ 1678 if (may_fallback && 1679 (err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) { 1680 may_fallback = 0; 1681 1682 if (class == ATA_DEV_ATA) 1683 class = ATA_DEV_ATAPI; 1684 else 1685 class = ATA_DEV_ATA; 1686 goto retry; 1687 } 1688 1689 rc = -EIO; 1690 reason = "I/O error"; 1691 goto err_out; 1692 } 1693 1694 /* Falling back doesn't make sense if ID data was read 1695 * successfully at least once. 1696 */ 1697 may_fallback = 0; 1698 1699 swap_buf_le16(id, ATA_ID_WORDS); 1700 1701 /* sanity check */ 1702 rc = -EINVAL; 1703 reason = "device reports invalid type"; 1704 1705 if (class == ATA_DEV_ATA) { 1706 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id)) 1707 goto err_out; 1708 } else { 1709 if (ata_id_is_ata(id)) 1710 goto err_out; 1711 } 1712 1713 if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) { 1714 tried_spinup = 1; 1715 /* 1716 * Drive powered-up in standby mode, and requires a specific 1717 * SET_FEATURES spin-up subcommand before it will accept 1718 * anything other than the original IDENTIFY command. 1719 */ 1720 ata_tf_init(dev, &tf); 1721 tf.command = ATA_CMD_SET_FEATURES; 1722 tf.feature = SETFEATURES_SPINUP; 1723 tf.protocol = ATA_PROT_NODATA; 1724 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 1725 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); 1726 if (err_mask && id[2] != 0x738c) { 1727 rc = -EIO; 1728 reason = "SPINUP failed"; 1729 goto err_out; 1730 } 1731 /* 1732 * If the drive initially returned incomplete IDENTIFY info, 1733 * we now must reissue the IDENTIFY command. 1734 */ 1735 if (id[2] == 0x37c8) 1736 goto retry; 1737 } 1738 1739 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) { 1740 /* 1741 * The exact sequence expected by certain pre-ATA4 drives is: 1742 * SRST RESET 1743 * IDENTIFY 1744 * INITIALIZE DEVICE PARAMETERS 1745 * anything else.. 1746 * Some drives were very specific about that exact sequence. 1747 */ 1748 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) { 1749 err_mask = ata_dev_init_params(dev, id[3], id[6]); 1750 if (err_mask) { 1751 rc = -EIO; 1752 reason = "INIT_DEV_PARAMS failed"; 1753 goto err_out; 1754 } 1755 1756 /* current CHS translation info (id[53-58]) might be 1757 * changed. reread the identify device info. 1758 */ 1759 flags &= ~ATA_READID_POSTRESET; 1760 goto retry; 1761 } 1762 } 1763 1764 *p_class = class; 1765 1766 return 0; 1767 1768 err_out: 1769 if (ata_msg_warn(ap)) 1770 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY " 1771 "(%s, err_mask=0x%x)\n", reason, err_mask); 1772 return rc; 1773 } 1774 1775 static inline u8 ata_dev_knobble(struct ata_device *dev) 1776 { 1777 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id))); 1778 } 1779 1780 static void ata_dev_config_ncq(struct ata_device *dev, 1781 char *desc, size_t desc_sz) 1782 { 1783 struct ata_port *ap = dev->ap; 1784 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id); 1785 1786 if (!ata_id_has_ncq(dev->id)) { 1787 desc[0] = '\0'; 1788 return; 1789 } 1790 if (dev->horkage & ATA_HORKAGE_NONCQ) { 1791 snprintf(desc, desc_sz, "NCQ (not used)"); 1792 return; 1793 } 1794 if (ap->flags & ATA_FLAG_NCQ) { 1795 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1); 1796 dev->flags |= ATA_DFLAG_NCQ; 1797 } 1798 1799 if (hdepth >= ddepth) 1800 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth); 1801 else 1802 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth); 1803 } 1804 1805 /** 1806 * ata_dev_configure - Configure the specified ATA/ATAPI device 1807 * @dev: Target device to configure 1808 * 1809 * Configure @dev according to @dev->id. Generic and low-level 1810 * driver specific fixups are also applied. 1811 * 1812 * LOCKING: 1813 * Kernel thread context (may sleep) 1814 * 1815 * RETURNS: 1816 * 0 on success, -errno otherwise 1817 */ 1818 int ata_dev_configure(struct ata_device *dev) 1819 { 1820 struct ata_port *ap = dev->ap; 1821 struct ata_eh_context *ehc = &ap->eh_context; 1822 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO; 1823 const u16 *id = dev->id; 1824 unsigned int xfer_mask; 1825 char revbuf[7]; /* XYZ-99\0 */ 1826 char fwrevbuf[ATA_ID_FW_REV_LEN+1]; 1827 char modelbuf[ATA_ID_PROD_LEN+1]; 1828 int rc; 1829 1830 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) { 1831 ata_dev_printk(dev, KERN_INFO, "%s: ENTER/EXIT -- nodev\n", 1832 __FUNCTION__); 1833 return 0; 1834 } 1835 1836 if (ata_msg_probe(ap)) 1837 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__); 1838 1839 /* set horkage */ 1840 dev->horkage |= ata_dev_blacklisted(dev); 1841 1842 /* let ACPI work its magic */ 1843 rc = ata_acpi_on_devcfg(dev); 1844 if (rc) 1845 return rc; 1846 1847 /* print device capabilities */ 1848 if (ata_msg_probe(ap)) 1849 ata_dev_printk(dev, KERN_DEBUG, 1850 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x " 1851 "85:%04x 86:%04x 87:%04x 88:%04x\n", 1852 __FUNCTION__, 1853 id[49], id[82], id[83], id[84], 1854 id[85], id[86], id[87], id[88]); 1855 1856 /* initialize to-be-configured parameters */ 1857 dev->flags &= ~ATA_DFLAG_CFG_MASK; 1858 dev->max_sectors = 0; 1859 dev->cdb_len = 0; 1860 dev->n_sectors = 0; 1861 dev->cylinders = 0; 1862 dev->heads = 0; 1863 dev->sectors = 0; 1864 1865 /* 1866 * common ATA, ATAPI feature tests 1867 */ 1868 1869 /* find max transfer mode; for printk only */ 1870 xfer_mask = ata_id_xfermask(id); 1871 1872 if (ata_msg_probe(ap)) 1873 ata_dump_id(id); 1874 1875 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */ 1876 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV, 1877 sizeof(fwrevbuf)); 1878 1879 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD, 1880 sizeof(modelbuf)); 1881 1882 /* ATA-specific feature tests */ 1883 if (dev->class == ATA_DEV_ATA) { 1884 if (ata_id_is_cfa(id)) { 1885 if (id[162] & 1) /* CPRM may make this media unusable */ 1886 ata_dev_printk(dev, KERN_WARNING, 1887 "supports DRM functions and may " 1888 "not be fully accessable.\n"); 1889 snprintf(revbuf, 7, "CFA"); 1890 } 1891 else 1892 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id)); 1893 1894 dev->n_sectors = ata_id_n_sectors(id); 1895 1896 if (dev->id[59] & 0x100) 1897 dev->multi_count = dev->id[59] & 0xff; 1898 1899 if (ata_id_has_lba(id)) { 1900 const char *lba_desc; 1901 char ncq_desc[20]; 1902 1903 lba_desc = "LBA"; 1904 dev->flags |= ATA_DFLAG_LBA; 1905 if (ata_id_has_lba48(id)) { 1906 dev->flags |= ATA_DFLAG_LBA48; 1907 lba_desc = "LBA48"; 1908 1909 if (dev->n_sectors >= (1UL << 28) && 1910 ata_id_has_flush_ext(id)) 1911 dev->flags |= ATA_DFLAG_FLUSH_EXT; 1912 } 1913 1914 if (ata_id_hpa_enabled(dev->id)) 1915 dev->n_sectors = ata_hpa_resize(dev); 1916 1917 /* config NCQ */ 1918 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc)); 1919 1920 /* print device info to dmesg */ 1921 if (ata_msg_drv(ap) && print_info) { 1922 ata_dev_printk(dev, KERN_INFO, 1923 "%s: %s, %s, max %s\n", 1924 revbuf, modelbuf, fwrevbuf, 1925 ata_mode_string(xfer_mask)); 1926 ata_dev_printk(dev, KERN_INFO, 1927 "%Lu sectors, multi %u: %s %s\n", 1928 (unsigned long long)dev->n_sectors, 1929 dev->multi_count, lba_desc, ncq_desc); 1930 } 1931 } else { 1932 /* CHS */ 1933 1934 /* Default translation */ 1935 dev->cylinders = id[1]; 1936 dev->heads = id[3]; 1937 dev->sectors = id[6]; 1938 1939 if (ata_id_current_chs_valid(id)) { 1940 /* Current CHS translation is valid. */ 1941 dev->cylinders = id[54]; 1942 dev->heads = id[55]; 1943 dev->sectors = id[56]; 1944 } 1945 1946 /* print device info to dmesg */ 1947 if (ata_msg_drv(ap) && print_info) { 1948 ata_dev_printk(dev, KERN_INFO, 1949 "%s: %s, %s, max %s\n", 1950 revbuf, modelbuf, fwrevbuf, 1951 ata_mode_string(xfer_mask)); 1952 ata_dev_printk(dev, KERN_INFO, 1953 "%Lu sectors, multi %u, CHS %u/%u/%u\n", 1954 (unsigned long long)dev->n_sectors, 1955 dev->multi_count, dev->cylinders, 1956 dev->heads, dev->sectors); 1957 } 1958 } 1959 1960 dev->cdb_len = 16; 1961 } 1962 1963 /* ATAPI-specific feature tests */ 1964 else if (dev->class == ATA_DEV_ATAPI) { 1965 char *cdb_intr_string = ""; 1966 1967 rc = atapi_cdb_len(id); 1968 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { 1969 if (ata_msg_warn(ap)) 1970 ata_dev_printk(dev, KERN_WARNING, 1971 "unsupported CDB len\n"); 1972 rc = -EINVAL; 1973 goto err_out_nosup; 1974 } 1975 dev->cdb_len = (unsigned int) rc; 1976 1977 if (ata_id_cdb_intr(dev->id)) { 1978 dev->flags |= ATA_DFLAG_CDB_INTR; 1979 cdb_intr_string = ", CDB intr"; 1980 } 1981 1982 /* print device info to dmesg */ 1983 if (ata_msg_drv(ap) && print_info) 1984 ata_dev_printk(dev, KERN_INFO, 1985 "ATAPI: %s, %s, max %s%s\n", 1986 modelbuf, fwrevbuf, 1987 ata_mode_string(xfer_mask), 1988 cdb_intr_string); 1989 } 1990 1991 /* determine max_sectors */ 1992 dev->max_sectors = ATA_MAX_SECTORS; 1993 if (dev->flags & ATA_DFLAG_LBA48) 1994 dev->max_sectors = ATA_MAX_SECTORS_LBA48; 1995 1996 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) { 1997 /* Let the user know. We don't want to disallow opens for 1998 rescue purposes, or in case the vendor is just a blithering 1999 idiot */ 2000 if (print_info) { 2001 ata_dev_printk(dev, KERN_WARNING, 2002 "Drive reports diagnostics failure. This may indicate a drive\n"); 2003 ata_dev_printk(dev, KERN_WARNING, 2004 "fault or invalid emulation. Contact drive vendor for information.\n"); 2005 } 2006 } 2007 2008 /* limit bridge transfers to udma5, 200 sectors */ 2009 if (ata_dev_knobble(dev)) { 2010 if (ata_msg_drv(ap) && print_info) 2011 ata_dev_printk(dev, KERN_INFO, 2012 "applying bridge limits\n"); 2013 dev->udma_mask &= ATA_UDMA5; 2014 dev->max_sectors = ATA_MAX_SECTORS; 2015 } 2016 2017 if (dev->horkage & ATA_HORKAGE_MAX_SEC_128) 2018 dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128, 2019 dev->max_sectors); 2020 2021 if (ap->ops->dev_config) 2022 ap->ops->dev_config(dev); 2023 2024 if (ata_msg_probe(ap)) 2025 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n", 2026 __FUNCTION__, ata_chk_status(ap)); 2027 return 0; 2028 2029 err_out_nosup: 2030 if (ata_msg_probe(ap)) 2031 ata_dev_printk(dev, KERN_DEBUG, 2032 "%s: EXIT, err\n", __FUNCTION__); 2033 return rc; 2034 } 2035 2036 /** 2037 * ata_cable_40wire - return 40 wire cable type 2038 * @ap: port 2039 * 2040 * Helper method for drivers which want to hardwire 40 wire cable 2041 * detection. 2042 */ 2043 2044 int ata_cable_40wire(struct ata_port *ap) 2045 { 2046 return ATA_CBL_PATA40; 2047 } 2048 2049 /** 2050 * ata_cable_80wire - return 80 wire cable type 2051 * @ap: port 2052 * 2053 * Helper method for drivers which want to hardwire 80 wire cable 2054 * detection. 2055 */ 2056 2057 int ata_cable_80wire(struct ata_port *ap) 2058 { 2059 return ATA_CBL_PATA80; 2060 } 2061 2062 /** 2063 * ata_cable_unknown - return unknown PATA cable. 2064 * @ap: port 2065 * 2066 * Helper method for drivers which have no PATA cable detection. 2067 */ 2068 2069 int ata_cable_unknown(struct ata_port *ap) 2070 { 2071 return ATA_CBL_PATA_UNK; 2072 } 2073 2074 /** 2075 * ata_cable_sata - return SATA cable type 2076 * @ap: port 2077 * 2078 * Helper method for drivers which have SATA cables 2079 */ 2080 2081 int ata_cable_sata(struct ata_port *ap) 2082 { 2083 return ATA_CBL_SATA; 2084 } 2085 2086 /** 2087 * ata_bus_probe - Reset and probe ATA bus 2088 * @ap: Bus to probe 2089 * 2090 * Master ATA bus probing function. Initiates a hardware-dependent 2091 * bus reset, then attempts to identify any devices found on 2092 * the bus. 2093 * 2094 * LOCKING: 2095 * PCI/etc. bus probe sem. 2096 * 2097 * RETURNS: 2098 * Zero on success, negative errno otherwise. 2099 */ 2100 2101 int ata_bus_probe(struct ata_port *ap) 2102 { 2103 unsigned int classes[ATA_MAX_DEVICES]; 2104 int tries[ATA_MAX_DEVICES]; 2105 int i, rc; 2106 struct ata_device *dev; 2107 2108 ata_port_probe(ap); 2109 2110 for (i = 0; i < ATA_MAX_DEVICES; i++) 2111 tries[i] = ATA_PROBE_MAX_TRIES; 2112 2113 retry: 2114 /* reset and determine device classes */ 2115 ap->ops->phy_reset(ap); 2116 2117 for (i = 0; i < ATA_MAX_DEVICES; i++) { 2118 dev = &ap->device[i]; 2119 2120 if (!(ap->flags & ATA_FLAG_DISABLED) && 2121 dev->class != ATA_DEV_UNKNOWN) 2122 classes[dev->devno] = dev->class; 2123 else 2124 classes[dev->devno] = ATA_DEV_NONE; 2125 2126 dev->class = ATA_DEV_UNKNOWN; 2127 } 2128 2129 ata_port_probe(ap); 2130 2131 /* after the reset the device state is PIO 0 and the controller 2132 state is undefined. Record the mode */ 2133 2134 for (i = 0; i < ATA_MAX_DEVICES; i++) 2135 ap->device[i].pio_mode = XFER_PIO_0; 2136 2137 /* read IDENTIFY page and configure devices. We have to do the identify 2138 specific sequence bass-ackwards so that PDIAG- is released by 2139 the slave device */ 2140 2141 for (i = ATA_MAX_DEVICES - 1; i >= 0; i--) { 2142 dev = &ap->device[i]; 2143 2144 if (tries[i]) 2145 dev->class = classes[i]; 2146 2147 if (!ata_dev_enabled(dev)) 2148 continue; 2149 2150 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET, 2151 dev->id); 2152 if (rc) 2153 goto fail; 2154 } 2155 2156 /* Now ask for the cable type as PDIAG- should have been released */ 2157 if (ap->ops->cable_detect) 2158 ap->cbl = ap->ops->cable_detect(ap); 2159 2160 /* After the identify sequence we can now set up the devices. We do 2161 this in the normal order so that the user doesn't get confused */ 2162 2163 for(i = 0; i < ATA_MAX_DEVICES; i++) { 2164 dev = &ap->device[i]; 2165 if (!ata_dev_enabled(dev)) 2166 continue; 2167 2168 ap->eh_context.i.flags |= ATA_EHI_PRINTINFO; 2169 rc = ata_dev_configure(dev); 2170 ap->eh_context.i.flags &= ~ATA_EHI_PRINTINFO; 2171 if (rc) 2172 goto fail; 2173 } 2174 2175 /* configure transfer mode */ 2176 rc = ata_set_mode(ap, &dev); 2177 if (rc) 2178 goto fail; 2179 2180 for (i = 0; i < ATA_MAX_DEVICES; i++) 2181 if (ata_dev_enabled(&ap->device[i])) 2182 return 0; 2183 2184 /* no device present, disable port */ 2185 ata_port_disable(ap); 2186 ap->ops->port_disable(ap); 2187 return -ENODEV; 2188 2189 fail: 2190 tries[dev->devno]--; 2191 2192 switch (rc) { 2193 case -EINVAL: 2194 /* eeek, something went very wrong, give up */ 2195 tries[dev->devno] = 0; 2196 break; 2197 2198 case -ENODEV: 2199 /* give it just one more chance */ 2200 tries[dev->devno] = min(tries[dev->devno], 1); 2201 case -EIO: 2202 if (tries[dev->devno] == 1) { 2203 /* This is the last chance, better to slow 2204 * down than lose it. 2205 */ 2206 sata_down_spd_limit(ap); 2207 ata_down_xfermask_limit(dev, ATA_DNXFER_PIO); 2208 } 2209 } 2210 2211 if (!tries[dev->devno]) 2212 ata_dev_disable(dev); 2213 2214 goto retry; 2215 } 2216 2217 /** 2218 * ata_port_probe - Mark port as enabled 2219 * @ap: Port for which we indicate enablement 2220 * 2221 * Modify @ap data structure such that the system 2222 * thinks that the entire port is enabled. 2223 * 2224 * LOCKING: host lock, or some other form of 2225 * serialization. 2226 */ 2227 2228 void ata_port_probe(struct ata_port *ap) 2229 { 2230 ap->flags &= ~ATA_FLAG_DISABLED; 2231 } 2232 2233 /** 2234 * sata_print_link_status - Print SATA link status 2235 * @ap: SATA port to printk link status about 2236 * 2237 * This function prints link speed and status of a SATA link. 2238 * 2239 * LOCKING: 2240 * None. 2241 */ 2242 void sata_print_link_status(struct ata_port *ap) 2243 { 2244 u32 sstatus, scontrol, tmp; 2245 2246 if (sata_scr_read(ap, SCR_STATUS, &sstatus)) 2247 return; 2248 sata_scr_read(ap, SCR_CONTROL, &scontrol); 2249 2250 if (ata_port_online(ap)) { 2251 tmp = (sstatus >> 4) & 0xf; 2252 ata_port_printk(ap, KERN_INFO, 2253 "SATA link up %s (SStatus %X SControl %X)\n", 2254 sata_spd_string(tmp), sstatus, scontrol); 2255 } else { 2256 ata_port_printk(ap, KERN_INFO, 2257 "SATA link down (SStatus %X SControl %X)\n", 2258 sstatus, scontrol); 2259 } 2260 } 2261 2262 /** 2263 * __sata_phy_reset - Wake/reset a low-level SATA PHY 2264 * @ap: SATA port associated with target SATA PHY. 2265 * 2266 * This function issues commands to standard SATA Sxxx 2267 * PHY registers, to wake up the phy (and device), and 2268 * clear any reset condition. 2269 * 2270 * LOCKING: 2271 * PCI/etc. bus probe sem. 2272 * 2273 */ 2274 void __sata_phy_reset(struct ata_port *ap) 2275 { 2276 u32 sstatus; 2277 unsigned long timeout = jiffies + (HZ * 5); 2278 2279 if (ap->flags & ATA_FLAG_SATA_RESET) { 2280 /* issue phy wake/reset */ 2281 sata_scr_write_flush(ap, SCR_CONTROL, 0x301); 2282 /* Couldn't find anything in SATA I/II specs, but 2283 * AHCI-1.1 10.4.2 says at least 1 ms. */ 2284 mdelay(1); 2285 } 2286 /* phy wake/clear reset */ 2287 sata_scr_write_flush(ap, SCR_CONTROL, 0x300); 2288 2289 /* wait for phy to become ready, if necessary */ 2290 do { 2291 msleep(200); 2292 sata_scr_read(ap, SCR_STATUS, &sstatus); 2293 if ((sstatus & 0xf) != 1) 2294 break; 2295 } while (time_before(jiffies, timeout)); 2296 2297 /* print link status */ 2298 sata_print_link_status(ap); 2299 2300 /* TODO: phy layer with polling, timeouts, etc. */ 2301 if (!ata_port_offline(ap)) 2302 ata_port_probe(ap); 2303 else 2304 ata_port_disable(ap); 2305 2306 if (ap->flags & ATA_FLAG_DISABLED) 2307 return; 2308 2309 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { 2310 ata_port_disable(ap); 2311 return; 2312 } 2313 2314 ap->cbl = ATA_CBL_SATA; 2315 } 2316 2317 /** 2318 * sata_phy_reset - Reset SATA bus. 2319 * @ap: SATA port associated with target SATA PHY. 2320 * 2321 * This function resets the SATA bus, and then probes 2322 * the bus for devices. 2323 * 2324 * LOCKING: 2325 * PCI/etc. bus probe sem. 2326 * 2327 */ 2328 void sata_phy_reset(struct ata_port *ap) 2329 { 2330 __sata_phy_reset(ap); 2331 if (ap->flags & ATA_FLAG_DISABLED) 2332 return; 2333 ata_bus_reset(ap); 2334 } 2335 2336 /** 2337 * ata_dev_pair - return other device on cable 2338 * @adev: device 2339 * 2340 * Obtain the other device on the same cable, or if none is 2341 * present NULL is returned 2342 */ 2343 2344 struct ata_device *ata_dev_pair(struct ata_device *adev) 2345 { 2346 struct ata_port *ap = adev->ap; 2347 struct ata_device *pair = &ap->device[1 - adev->devno]; 2348 if (!ata_dev_enabled(pair)) 2349 return NULL; 2350 return pair; 2351 } 2352 2353 /** 2354 * ata_port_disable - Disable port. 2355 * @ap: Port to be disabled. 2356 * 2357 * Modify @ap data structure such that the system 2358 * thinks that the entire port is disabled, and should 2359 * never attempt to probe or communicate with devices 2360 * on this port. 2361 * 2362 * LOCKING: host lock, or some other form of 2363 * serialization. 2364 */ 2365 2366 void ata_port_disable(struct ata_port *ap) 2367 { 2368 ap->device[0].class = ATA_DEV_NONE; 2369 ap->device[1].class = ATA_DEV_NONE; 2370 ap->flags |= ATA_FLAG_DISABLED; 2371 } 2372 2373 /** 2374 * sata_down_spd_limit - adjust SATA spd limit downward 2375 * @ap: Port to adjust SATA spd limit for 2376 * 2377 * Adjust SATA spd limit of @ap downward. Note that this 2378 * function only adjusts the limit. The change must be applied 2379 * using sata_set_spd(). 2380 * 2381 * LOCKING: 2382 * Inherited from caller. 2383 * 2384 * RETURNS: 2385 * 0 on success, negative errno on failure 2386 */ 2387 int sata_down_spd_limit(struct ata_port *ap) 2388 { 2389 u32 sstatus, spd, mask; 2390 int rc, highbit; 2391 2392 if (!sata_scr_valid(ap)) 2393 return -EOPNOTSUPP; 2394 2395 /* If SCR can be read, use it to determine the current SPD. 2396 * If not, use cached value in ap->sata_spd. 2397 */ 2398 rc = sata_scr_read(ap, SCR_STATUS, &sstatus); 2399 if (rc == 0) 2400 spd = (sstatus >> 4) & 0xf; 2401 else 2402 spd = ap->sata_spd; 2403 2404 mask = ap->sata_spd_limit; 2405 if (mask <= 1) 2406 return -EINVAL; 2407 2408 /* unconditionally mask off the highest bit */ 2409 highbit = fls(mask) - 1; 2410 mask &= ~(1 << highbit); 2411 2412 /* Mask off all speeds higher than or equal to the current 2413 * one. Force 1.5Gbps if current SPD is not available. 2414 */ 2415 if (spd > 1) 2416 mask &= (1 << (spd - 1)) - 1; 2417 else 2418 mask &= 1; 2419 2420 /* were we already at the bottom? */ 2421 if (!mask) 2422 return -EINVAL; 2423 2424 ap->sata_spd_limit = mask; 2425 2426 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n", 2427 sata_spd_string(fls(mask))); 2428 2429 return 0; 2430 } 2431 2432 static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol) 2433 { 2434 u32 spd, limit; 2435 2436 if (ap->sata_spd_limit == UINT_MAX) 2437 limit = 0; 2438 else 2439 limit = fls(ap->sata_spd_limit); 2440 2441 spd = (*scontrol >> 4) & 0xf; 2442 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4); 2443 2444 return spd != limit; 2445 } 2446 2447 /** 2448 * sata_set_spd_needed - is SATA spd configuration needed 2449 * @ap: Port in question 2450 * 2451 * Test whether the spd limit in SControl matches 2452 * @ap->sata_spd_limit. This function is used to determine 2453 * whether hardreset is necessary to apply SATA spd 2454 * configuration. 2455 * 2456 * LOCKING: 2457 * Inherited from caller. 2458 * 2459 * RETURNS: 2460 * 1 if SATA spd configuration is needed, 0 otherwise. 2461 */ 2462 int sata_set_spd_needed(struct ata_port *ap) 2463 { 2464 u32 scontrol; 2465 2466 if (sata_scr_read(ap, SCR_CONTROL, &scontrol)) 2467 return 0; 2468 2469 return __sata_set_spd_needed(ap, &scontrol); 2470 } 2471 2472 /** 2473 * sata_set_spd - set SATA spd according to spd limit 2474 * @ap: Port to set SATA spd for 2475 * 2476 * Set SATA spd of @ap according to sata_spd_limit. 2477 * 2478 * LOCKING: 2479 * Inherited from caller. 2480 * 2481 * RETURNS: 2482 * 0 if spd doesn't need to be changed, 1 if spd has been 2483 * changed. Negative errno if SCR registers are inaccessible. 2484 */ 2485 int sata_set_spd(struct ata_port *ap) 2486 { 2487 u32 scontrol; 2488 int rc; 2489 2490 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) 2491 return rc; 2492 2493 if (!__sata_set_spd_needed(ap, &scontrol)) 2494 return 0; 2495 2496 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) 2497 return rc; 2498 2499 return 1; 2500 } 2501 2502 /* 2503 * This mode timing computation functionality is ported over from 2504 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik 2505 */ 2506 /* 2507 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds). 2508 * These were taken from ATA/ATAPI-6 standard, rev 0a, except 2509 * for UDMA6, which is currently supported only by Maxtor drives. 2510 * 2511 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0. 2512 */ 2513 2514 static const struct ata_timing ata_timing[] = { 2515 2516 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 }, 2517 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 }, 2518 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 }, 2519 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 }, 2520 2521 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 }, 2522 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 }, 2523 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 }, 2524 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 }, 2525 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 }, 2526 2527 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */ 2528 2529 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 }, 2530 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 }, 2531 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 }, 2532 2533 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 }, 2534 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 }, 2535 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 }, 2536 2537 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 }, 2538 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 }, 2539 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 }, 2540 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 }, 2541 2542 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 }, 2543 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 }, 2544 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 }, 2545 2546 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */ 2547 2548 { 0xFF } 2549 }; 2550 2551 #define ENOUGH(v,unit) (((v)-1)/(unit)+1) 2552 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0) 2553 2554 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT) 2555 { 2556 q->setup = EZ(t->setup * 1000, T); 2557 q->act8b = EZ(t->act8b * 1000, T); 2558 q->rec8b = EZ(t->rec8b * 1000, T); 2559 q->cyc8b = EZ(t->cyc8b * 1000, T); 2560 q->active = EZ(t->active * 1000, T); 2561 q->recover = EZ(t->recover * 1000, T); 2562 q->cycle = EZ(t->cycle * 1000, T); 2563 q->udma = EZ(t->udma * 1000, UT); 2564 } 2565 2566 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b, 2567 struct ata_timing *m, unsigned int what) 2568 { 2569 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup); 2570 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b); 2571 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b); 2572 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b); 2573 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active); 2574 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover); 2575 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle); 2576 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma); 2577 } 2578 2579 static const struct ata_timing* ata_timing_find_mode(unsigned short speed) 2580 { 2581 const struct ata_timing *t; 2582 2583 for (t = ata_timing; t->mode != speed; t++) 2584 if (t->mode == 0xFF) 2585 return NULL; 2586 return t; 2587 } 2588 2589 int ata_timing_compute(struct ata_device *adev, unsigned short speed, 2590 struct ata_timing *t, int T, int UT) 2591 { 2592 const struct ata_timing *s; 2593 struct ata_timing p; 2594 2595 /* 2596 * Find the mode. 2597 */ 2598 2599 if (!(s = ata_timing_find_mode(speed))) 2600 return -EINVAL; 2601 2602 memcpy(t, s, sizeof(*s)); 2603 2604 /* 2605 * If the drive is an EIDE drive, it can tell us it needs extended 2606 * PIO/MW_DMA cycle timing. 2607 */ 2608 2609 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ 2610 memset(&p, 0, sizeof(p)); 2611 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) { 2612 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO]; 2613 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY]; 2614 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) { 2615 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN]; 2616 } 2617 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B); 2618 } 2619 2620 /* 2621 * Convert the timing to bus clock counts. 2622 */ 2623 2624 ata_timing_quantize(t, t, T, UT); 2625 2626 /* 2627 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, 2628 * S.M.A.R.T * and some other commands. We have to ensure that the 2629 * DMA cycle timing is slower/equal than the fastest PIO timing. 2630 */ 2631 2632 if (speed > XFER_PIO_6) { 2633 ata_timing_compute(adev, adev->pio_mode, &p, T, UT); 2634 ata_timing_merge(&p, t, t, ATA_TIMING_ALL); 2635 } 2636 2637 /* 2638 * Lengthen active & recovery time so that cycle time is correct. 2639 */ 2640 2641 if (t->act8b + t->rec8b < t->cyc8b) { 2642 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; 2643 t->rec8b = t->cyc8b - t->act8b; 2644 } 2645 2646 if (t->active + t->recover < t->cycle) { 2647 t->active += (t->cycle - (t->active + t->recover)) / 2; 2648 t->recover = t->cycle - t->active; 2649 } 2650 2651 /* In a few cases quantisation may produce enough errors to 2652 leave t->cycle too low for the sum of active and recovery 2653 if so we must correct this */ 2654 if (t->active + t->recover > t->cycle) 2655 t->cycle = t->active + t->recover; 2656 2657 return 0; 2658 } 2659 2660 /** 2661 * ata_down_xfermask_limit - adjust dev xfer masks downward 2662 * @dev: Device to adjust xfer masks 2663 * @sel: ATA_DNXFER_* selector 2664 * 2665 * Adjust xfer masks of @dev downward. Note that this function 2666 * does not apply the change. Invoking ata_set_mode() afterwards 2667 * will apply the limit. 2668 * 2669 * LOCKING: 2670 * Inherited from caller. 2671 * 2672 * RETURNS: 2673 * 0 on success, negative errno on failure 2674 */ 2675 int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel) 2676 { 2677 char buf[32]; 2678 unsigned int orig_mask, xfer_mask; 2679 unsigned int pio_mask, mwdma_mask, udma_mask; 2680 int quiet, highbit; 2681 2682 quiet = !!(sel & ATA_DNXFER_QUIET); 2683 sel &= ~ATA_DNXFER_QUIET; 2684 2685 xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask, 2686 dev->mwdma_mask, 2687 dev->udma_mask); 2688 ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask); 2689 2690 switch (sel) { 2691 case ATA_DNXFER_PIO: 2692 highbit = fls(pio_mask) - 1; 2693 pio_mask &= ~(1 << highbit); 2694 break; 2695 2696 case ATA_DNXFER_DMA: 2697 if (udma_mask) { 2698 highbit = fls(udma_mask) - 1; 2699 udma_mask &= ~(1 << highbit); 2700 if (!udma_mask) 2701 return -ENOENT; 2702 } else if (mwdma_mask) { 2703 highbit = fls(mwdma_mask) - 1; 2704 mwdma_mask &= ~(1 << highbit); 2705 if (!mwdma_mask) 2706 return -ENOENT; 2707 } 2708 break; 2709 2710 case ATA_DNXFER_40C: 2711 udma_mask &= ATA_UDMA_MASK_40C; 2712 break; 2713 2714 case ATA_DNXFER_FORCE_PIO0: 2715 pio_mask &= 1; 2716 case ATA_DNXFER_FORCE_PIO: 2717 mwdma_mask = 0; 2718 udma_mask = 0; 2719 break; 2720 2721 default: 2722 BUG(); 2723 } 2724 2725 xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); 2726 2727 if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask) 2728 return -ENOENT; 2729 2730 if (!quiet) { 2731 if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA)) 2732 snprintf(buf, sizeof(buf), "%s:%s", 2733 ata_mode_string(xfer_mask), 2734 ata_mode_string(xfer_mask & ATA_MASK_PIO)); 2735 else 2736 snprintf(buf, sizeof(buf), "%s", 2737 ata_mode_string(xfer_mask)); 2738 2739 ata_dev_printk(dev, KERN_WARNING, 2740 "limiting speed to %s\n", buf); 2741 } 2742 2743 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask, 2744 &dev->udma_mask); 2745 2746 return 0; 2747 } 2748 2749 static int ata_dev_set_mode(struct ata_device *dev) 2750 { 2751 struct ata_eh_context *ehc = &dev->ap->eh_context; 2752 unsigned int err_mask; 2753 int rc; 2754 2755 dev->flags &= ~ATA_DFLAG_PIO; 2756 if (dev->xfer_shift == ATA_SHIFT_PIO) 2757 dev->flags |= ATA_DFLAG_PIO; 2758 2759 err_mask = ata_dev_set_xfermode(dev); 2760 /* Old CFA may refuse this command, which is just fine */ 2761 if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id)) 2762 err_mask &= ~AC_ERR_DEV; 2763 2764 if (err_mask) { 2765 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode " 2766 "(err_mask=0x%x)\n", err_mask); 2767 return -EIO; 2768 } 2769 2770 ehc->i.flags |= ATA_EHI_POST_SETMODE; 2771 rc = ata_dev_revalidate(dev, 0); 2772 ehc->i.flags &= ~ATA_EHI_POST_SETMODE; 2773 if (rc) 2774 return rc; 2775 2776 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n", 2777 dev->xfer_shift, (int)dev->xfer_mode); 2778 2779 ata_dev_printk(dev, KERN_INFO, "configured for %s\n", 2780 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode))); 2781 return 0; 2782 } 2783 2784 /** 2785 * ata_do_set_mode - Program timings and issue SET FEATURES - XFER 2786 * @ap: port on which timings will be programmed 2787 * @r_failed_dev: out paramter for failed device 2788 * 2789 * Standard implementation of the function used to tune and set 2790 * ATA device disk transfer mode (PIO3, UDMA6, etc.). If 2791 * ata_dev_set_mode() fails, pointer to the failing device is 2792 * returned in @r_failed_dev. 2793 * 2794 * LOCKING: 2795 * PCI/etc. bus probe sem. 2796 * 2797 * RETURNS: 2798 * 0 on success, negative errno otherwise 2799 */ 2800 2801 int ata_do_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev) 2802 { 2803 struct ata_device *dev; 2804 int i, rc = 0, used_dma = 0, found = 0; 2805 2806 2807 /* step 1: calculate xfer_mask */ 2808 for (i = 0; i < ATA_MAX_DEVICES; i++) { 2809 unsigned int pio_mask, dma_mask; 2810 2811 dev = &ap->device[i]; 2812 2813 if (!ata_dev_enabled(dev)) 2814 continue; 2815 2816 ata_dev_xfermask(dev); 2817 2818 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0); 2819 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask); 2820 dev->pio_mode = ata_xfer_mask2mode(pio_mask); 2821 dev->dma_mode = ata_xfer_mask2mode(dma_mask); 2822 2823 found = 1; 2824 if (dev->dma_mode) 2825 used_dma = 1; 2826 } 2827 if (!found) 2828 goto out; 2829 2830 /* step 2: always set host PIO timings */ 2831 for (i = 0; i < ATA_MAX_DEVICES; i++) { 2832 dev = &ap->device[i]; 2833 if (!ata_dev_enabled(dev)) 2834 continue; 2835 2836 if (!dev->pio_mode) { 2837 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n"); 2838 rc = -EINVAL; 2839 goto out; 2840 } 2841 2842 dev->xfer_mode = dev->pio_mode; 2843 dev->xfer_shift = ATA_SHIFT_PIO; 2844 if (ap->ops->set_piomode) 2845 ap->ops->set_piomode(ap, dev); 2846 } 2847 2848 /* step 3: set host DMA timings */ 2849 for (i = 0; i < ATA_MAX_DEVICES; i++) { 2850 dev = &ap->device[i]; 2851 2852 if (!ata_dev_enabled(dev) || !dev->dma_mode) 2853 continue; 2854 2855 dev->xfer_mode = dev->dma_mode; 2856 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode); 2857 if (ap->ops->set_dmamode) 2858 ap->ops->set_dmamode(ap, dev); 2859 } 2860 2861 /* step 4: update devices' xfer mode */ 2862 for (i = 0; i < ATA_MAX_DEVICES; i++) { 2863 dev = &ap->device[i]; 2864 2865 /* don't update suspended devices' xfer mode */ 2866 if (!ata_dev_enabled(dev)) 2867 continue; 2868 2869 rc = ata_dev_set_mode(dev); 2870 if (rc) 2871 goto out; 2872 } 2873 2874 /* Record simplex status. If we selected DMA then the other 2875 * host channels are not permitted to do so. 2876 */ 2877 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX)) 2878 ap->host->simplex_claimed = ap; 2879 2880 out: 2881 if (rc) 2882 *r_failed_dev = dev; 2883 return rc; 2884 } 2885 2886 /** 2887 * ata_set_mode - Program timings and issue SET FEATURES - XFER 2888 * @ap: port on which timings will be programmed 2889 * @r_failed_dev: out paramter for failed device 2890 * 2891 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If 2892 * ata_set_mode() fails, pointer to the failing device is 2893 * returned in @r_failed_dev. 2894 * 2895 * LOCKING: 2896 * PCI/etc. bus probe sem. 2897 * 2898 * RETURNS: 2899 * 0 on success, negative errno otherwise 2900 */ 2901 int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev) 2902 { 2903 /* has private set_mode? */ 2904 if (ap->ops->set_mode) 2905 return ap->ops->set_mode(ap, r_failed_dev); 2906 return ata_do_set_mode(ap, r_failed_dev); 2907 } 2908 2909 /** 2910 * ata_tf_to_host - issue ATA taskfile to host controller 2911 * @ap: port to which command is being issued 2912 * @tf: ATA taskfile register set 2913 * 2914 * Issues ATA taskfile register set to ATA host controller, 2915 * with proper synchronization with interrupt handler and 2916 * other threads. 2917 * 2918 * LOCKING: 2919 * spin_lock_irqsave(host lock) 2920 */ 2921 2922 static inline void ata_tf_to_host(struct ata_port *ap, 2923 const struct ata_taskfile *tf) 2924 { 2925 ap->ops->tf_load(ap, tf); 2926 ap->ops->exec_command(ap, tf); 2927 } 2928 2929 /** 2930 * ata_busy_sleep - sleep until BSY clears, or timeout 2931 * @ap: port containing status register to be polled 2932 * @tmout_pat: impatience timeout 2933 * @tmout: overall timeout 2934 * 2935 * Sleep until ATA Status register bit BSY clears, 2936 * or a timeout occurs. 2937 * 2938 * LOCKING: 2939 * Kernel thread context (may sleep). 2940 * 2941 * RETURNS: 2942 * 0 on success, -errno otherwise. 2943 */ 2944 int ata_busy_sleep(struct ata_port *ap, 2945 unsigned long tmout_pat, unsigned long tmout) 2946 { 2947 unsigned long timer_start, timeout; 2948 u8 status; 2949 2950 status = ata_busy_wait(ap, ATA_BUSY, 300); 2951 timer_start = jiffies; 2952 timeout = timer_start + tmout_pat; 2953 while (status != 0xff && (status & ATA_BUSY) && 2954 time_before(jiffies, timeout)) { 2955 msleep(50); 2956 status = ata_busy_wait(ap, ATA_BUSY, 3); 2957 } 2958 2959 if (status != 0xff && (status & ATA_BUSY)) 2960 ata_port_printk(ap, KERN_WARNING, 2961 "port is slow to respond, please be patient " 2962 "(Status 0x%x)\n", status); 2963 2964 timeout = timer_start + tmout; 2965 while (status != 0xff && (status & ATA_BUSY) && 2966 time_before(jiffies, timeout)) { 2967 msleep(50); 2968 status = ata_chk_status(ap); 2969 } 2970 2971 if (status == 0xff) 2972 return -ENODEV; 2973 2974 if (status & ATA_BUSY) { 2975 ata_port_printk(ap, KERN_ERR, "port failed to respond " 2976 "(%lu secs, Status 0x%x)\n", 2977 tmout / HZ, status); 2978 return -EBUSY; 2979 } 2980 2981 return 0; 2982 } 2983 2984 /** 2985 * ata_wait_ready - sleep until BSY clears, or timeout 2986 * @ap: port containing status register to be polled 2987 * @deadline: deadline jiffies for the operation 2988 * 2989 * Sleep until ATA Status register bit BSY clears, or timeout 2990 * occurs. 2991 * 2992 * LOCKING: 2993 * Kernel thread context (may sleep). 2994 * 2995 * RETURNS: 2996 * 0 on success, -errno otherwise. 2997 */ 2998 int ata_wait_ready(struct ata_port *ap, unsigned long deadline) 2999 { 3000 unsigned long start = jiffies; 3001 int warned = 0; 3002 3003 while (1) { 3004 u8 status = ata_chk_status(ap); 3005 unsigned long now = jiffies; 3006 3007 if (!(status & ATA_BUSY)) 3008 return 0; 3009 if (!ata_port_online(ap) && status == 0xff) 3010 return -ENODEV; 3011 if (time_after(now, deadline)) 3012 return -EBUSY; 3013 3014 if (!warned && time_after(now, start + 5 * HZ) && 3015 (deadline - now > 3 * HZ)) { 3016 ata_port_printk(ap, KERN_WARNING, 3017 "port is slow to respond, please be patient " 3018 "(Status 0x%x)\n", status); 3019 warned = 1; 3020 } 3021 3022 msleep(50); 3023 } 3024 } 3025 3026 static int ata_bus_post_reset(struct ata_port *ap, unsigned int devmask, 3027 unsigned long deadline) 3028 { 3029 struct ata_ioports *ioaddr = &ap->ioaddr; 3030 unsigned int dev0 = devmask & (1 << 0); 3031 unsigned int dev1 = devmask & (1 << 1); 3032 int rc, ret = 0; 3033 3034 /* if device 0 was found in ata_devchk, wait for its 3035 * BSY bit to clear 3036 */ 3037 if (dev0) { 3038 rc = ata_wait_ready(ap, deadline); 3039 if (rc) { 3040 if (rc != -ENODEV) 3041 return rc; 3042 ret = rc; 3043 } 3044 } 3045 3046 /* if device 1 was found in ata_devchk, wait for register 3047 * access briefly, then wait for BSY to clear. 3048 */ 3049 if (dev1) { 3050 int i; 3051 3052 ap->ops->dev_select(ap, 1); 3053 3054 /* Wait for register access. Some ATAPI devices fail 3055 * to set nsect/lbal after reset, so don't waste too 3056 * much time on it. We're gonna wait for !BSY anyway. 3057 */ 3058 for (i = 0; i < 2; i++) { 3059 u8 nsect, lbal; 3060 3061 nsect = ioread8(ioaddr->nsect_addr); 3062 lbal = ioread8(ioaddr->lbal_addr); 3063 if ((nsect == 1) && (lbal == 1)) 3064 break; 3065 msleep(50); /* give drive a breather */ 3066 } 3067 3068 rc = ata_wait_ready(ap, deadline); 3069 if (rc) { 3070 if (rc != -ENODEV) 3071 return rc; 3072 ret = rc; 3073 } 3074 } 3075 3076 /* is all this really necessary? */ 3077 ap->ops->dev_select(ap, 0); 3078 if (dev1) 3079 ap->ops->dev_select(ap, 1); 3080 if (dev0) 3081 ap->ops->dev_select(ap, 0); 3082 3083 return ret; 3084 } 3085 3086 static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask, 3087 unsigned long deadline) 3088 { 3089 struct ata_ioports *ioaddr = &ap->ioaddr; 3090 3091 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id); 3092 3093 /* software reset. causes dev0 to be selected */ 3094 iowrite8(ap->ctl, ioaddr->ctl_addr); 3095 udelay(20); /* FIXME: flush */ 3096 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr); 3097 udelay(20); /* FIXME: flush */ 3098 iowrite8(ap->ctl, ioaddr->ctl_addr); 3099 3100 /* spec mandates ">= 2ms" before checking status. 3101 * We wait 150ms, because that was the magic delay used for 3102 * ATAPI devices in Hale Landis's ATADRVR, for the period of time 3103 * between when the ATA command register is written, and then 3104 * status is checked. Because waiting for "a while" before 3105 * checking status is fine, post SRST, we perform this magic 3106 * delay here as well. 3107 * 3108 * Old drivers/ide uses the 2mS rule and then waits for ready 3109 */ 3110 msleep(150); 3111 3112 /* Before we perform post reset processing we want to see if 3113 * the bus shows 0xFF because the odd clown forgets the D7 3114 * pulldown resistor. 3115 */ 3116 if (ata_check_status(ap) == 0xFF) 3117 return -ENODEV; 3118 3119 return ata_bus_post_reset(ap, devmask, deadline); 3120 } 3121 3122 /** 3123 * ata_bus_reset - reset host port and associated ATA channel 3124 * @ap: port to reset 3125 * 3126 * This is typically the first time we actually start issuing 3127 * commands to the ATA channel. We wait for BSY to clear, then 3128 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its 3129 * result. Determine what devices, if any, are on the channel 3130 * by looking at the device 0/1 error register. Look at the signature 3131 * stored in each device's taskfile registers, to determine if 3132 * the device is ATA or ATAPI. 3133 * 3134 * LOCKING: 3135 * PCI/etc. bus probe sem. 3136 * Obtains host lock. 3137 * 3138 * SIDE EFFECTS: 3139 * Sets ATA_FLAG_DISABLED if bus reset fails. 3140 */ 3141 3142 void ata_bus_reset(struct ata_port *ap) 3143 { 3144 struct ata_ioports *ioaddr = &ap->ioaddr; 3145 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; 3146 u8 err; 3147 unsigned int dev0, dev1 = 0, devmask = 0; 3148 int rc; 3149 3150 DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no); 3151 3152 /* determine if device 0/1 are present */ 3153 if (ap->flags & ATA_FLAG_SATA_RESET) 3154 dev0 = 1; 3155 else { 3156 dev0 = ata_devchk(ap, 0); 3157 if (slave_possible) 3158 dev1 = ata_devchk(ap, 1); 3159 } 3160 3161 if (dev0) 3162 devmask |= (1 << 0); 3163 if (dev1) 3164 devmask |= (1 << 1); 3165 3166 /* select device 0 again */ 3167 ap->ops->dev_select(ap, 0); 3168 3169 /* issue bus reset */ 3170 if (ap->flags & ATA_FLAG_SRST) { 3171 rc = ata_bus_softreset(ap, devmask, jiffies + 40 * HZ); 3172 if (rc && rc != -ENODEV) 3173 goto err_out; 3174 } 3175 3176 /* 3177 * determine by signature whether we have ATA or ATAPI devices 3178 */ 3179 ap->device[0].class = ata_dev_try_classify(ap, 0, &err); 3180 if ((slave_possible) && (err != 0x81)) 3181 ap->device[1].class = ata_dev_try_classify(ap, 1, &err); 3182 3183 /* is double-select really necessary? */ 3184 if (ap->device[1].class != ATA_DEV_NONE) 3185 ap->ops->dev_select(ap, 1); 3186 if (ap->device[0].class != ATA_DEV_NONE) 3187 ap->ops->dev_select(ap, 0); 3188 3189 /* if no devices were detected, disable this port */ 3190 if ((ap->device[0].class == ATA_DEV_NONE) && 3191 (ap->device[1].class == ATA_DEV_NONE)) 3192 goto err_out; 3193 3194 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { 3195 /* set up device control for ATA_FLAG_SATA_RESET */ 3196 iowrite8(ap->ctl, ioaddr->ctl_addr); 3197 } 3198 3199 DPRINTK("EXIT\n"); 3200 return; 3201 3202 err_out: 3203 ata_port_printk(ap, KERN_ERR, "disabling port\n"); 3204 ap->ops->port_disable(ap); 3205 3206 DPRINTK("EXIT\n"); 3207 } 3208 3209 /** 3210 * sata_phy_debounce - debounce SATA phy status 3211 * @ap: ATA port to debounce SATA phy status for 3212 * @params: timing parameters { interval, duratinon, timeout } in msec 3213 * @deadline: deadline jiffies for the operation 3214 * 3215 * Make sure SStatus of @ap reaches stable state, determined by 3216 * holding the same value where DET is not 1 for @duration polled 3217 * every @interval, before @timeout. Timeout constraints the 3218 * beginning of the stable state. Because DET gets stuck at 1 on 3219 * some controllers after hot unplugging, this functions waits 3220 * until timeout then returns 0 if DET is stable at 1. 3221 * 3222 * @timeout is further limited by @deadline. The sooner of the 3223 * two is used. 3224 * 3225 * LOCKING: 3226 * Kernel thread context (may sleep) 3227 * 3228 * RETURNS: 3229 * 0 on success, -errno on failure. 3230 */ 3231 int sata_phy_debounce(struct ata_port *ap, const unsigned long *params, 3232 unsigned long deadline) 3233 { 3234 unsigned long interval_msec = params[0]; 3235 unsigned long duration = msecs_to_jiffies(params[1]); 3236 unsigned long last_jiffies, t; 3237 u32 last, cur; 3238 int rc; 3239 3240 t = jiffies + msecs_to_jiffies(params[2]); 3241 if (time_before(t, deadline)) 3242 deadline = t; 3243 3244 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur))) 3245 return rc; 3246 cur &= 0xf; 3247 3248 last = cur; 3249 last_jiffies = jiffies; 3250 3251 while (1) { 3252 msleep(interval_msec); 3253 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur))) 3254 return rc; 3255 cur &= 0xf; 3256 3257 /* DET stable? */ 3258 if (cur == last) { 3259 if (cur == 1 && time_before(jiffies, deadline)) 3260 continue; 3261 if (time_after(jiffies, last_jiffies + duration)) 3262 return 0; 3263 continue; 3264 } 3265 3266 /* unstable, start over */ 3267 last = cur; 3268 last_jiffies = jiffies; 3269 3270 /* Check deadline. If debouncing failed, return 3271 * -EPIPE to tell upper layer to lower link speed. 3272 */ 3273 if (time_after(jiffies, deadline)) 3274 return -EPIPE; 3275 } 3276 } 3277 3278 /** 3279 * sata_phy_resume - resume SATA phy 3280 * @ap: ATA port to resume SATA phy for 3281 * @params: timing parameters { interval, duratinon, timeout } in msec 3282 * @deadline: deadline jiffies for the operation 3283 * 3284 * Resume SATA phy of @ap and debounce it. 3285 * 3286 * LOCKING: 3287 * Kernel thread context (may sleep) 3288 * 3289 * RETURNS: 3290 * 0 on success, -errno on failure. 3291 */ 3292 int sata_phy_resume(struct ata_port *ap, const unsigned long *params, 3293 unsigned long deadline) 3294 { 3295 u32 scontrol; 3296 int rc; 3297 3298 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) 3299 return rc; 3300 3301 scontrol = (scontrol & 0x0f0) | 0x300; 3302 3303 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) 3304 return rc; 3305 3306 /* Some PHYs react badly if SStatus is pounded immediately 3307 * after resuming. Delay 200ms before debouncing. 3308 */ 3309 msleep(200); 3310 3311 return sata_phy_debounce(ap, params, deadline); 3312 } 3313 3314 /** 3315 * ata_std_prereset - prepare for reset 3316 * @ap: ATA port to be reset 3317 * @deadline: deadline jiffies for the operation 3318 * 3319 * @ap is about to be reset. Initialize it. Failure from 3320 * prereset makes libata abort whole reset sequence and give up 3321 * that port, so prereset should be best-effort. It does its 3322 * best to prepare for reset sequence but if things go wrong, it 3323 * should just whine, not fail. 3324 * 3325 * LOCKING: 3326 * Kernel thread context (may sleep) 3327 * 3328 * RETURNS: 3329 * 0 on success, -errno otherwise. 3330 */ 3331 int ata_std_prereset(struct ata_port *ap, unsigned long deadline) 3332 { 3333 struct ata_eh_context *ehc = &ap->eh_context; 3334 const unsigned long *timing = sata_ehc_deb_timing(ehc); 3335 int rc; 3336 3337 /* handle link resume */ 3338 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) && 3339 (ap->flags & ATA_FLAG_HRST_TO_RESUME)) 3340 ehc->i.action |= ATA_EH_HARDRESET; 3341 3342 /* if we're about to do hardreset, nothing more to do */ 3343 if (ehc->i.action & ATA_EH_HARDRESET) 3344 return 0; 3345 3346 /* if SATA, resume phy */ 3347 if (ap->flags & ATA_FLAG_SATA) { 3348 rc = sata_phy_resume(ap, timing, deadline); 3349 /* whine about phy resume failure but proceed */ 3350 if (rc && rc != -EOPNOTSUPP) 3351 ata_port_printk(ap, KERN_WARNING, "failed to resume " 3352 "link for reset (errno=%d)\n", rc); 3353 } 3354 3355 /* Wait for !BSY if the controller can wait for the first D2H 3356 * Reg FIS and we don't know that no device is attached. 3357 */ 3358 if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap)) { 3359 rc = ata_wait_ready(ap, deadline); 3360 if (rc && rc != -ENODEV) { 3361 ata_port_printk(ap, KERN_WARNING, "device not ready " 3362 "(errno=%d), forcing hardreset\n", rc); 3363 ehc->i.action |= ATA_EH_HARDRESET; 3364 } 3365 } 3366 3367 return 0; 3368 } 3369 3370 /** 3371 * ata_std_softreset - reset host port via ATA SRST 3372 * @ap: port to reset 3373 * @classes: resulting classes of attached devices 3374 * @deadline: deadline jiffies for the operation 3375 * 3376 * Reset host port using ATA SRST. 3377 * 3378 * LOCKING: 3379 * Kernel thread context (may sleep) 3380 * 3381 * RETURNS: 3382 * 0 on success, -errno otherwise. 3383 */ 3384 int ata_std_softreset(struct ata_port *ap, unsigned int *classes, 3385 unsigned long deadline) 3386 { 3387 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; 3388 unsigned int devmask = 0; 3389 int rc; 3390 u8 err; 3391 3392 DPRINTK("ENTER\n"); 3393 3394 if (ata_port_offline(ap)) { 3395 classes[0] = ATA_DEV_NONE; 3396 goto out; 3397 } 3398 3399 /* determine if device 0/1 are present */ 3400 if (ata_devchk(ap, 0)) 3401 devmask |= (1 << 0); 3402 if (slave_possible && ata_devchk(ap, 1)) 3403 devmask |= (1 << 1); 3404 3405 /* select device 0 again */ 3406 ap->ops->dev_select(ap, 0); 3407 3408 /* issue bus reset */ 3409 DPRINTK("about to softreset, devmask=%x\n", devmask); 3410 rc = ata_bus_softreset(ap, devmask, deadline); 3411 /* if link is occupied, -ENODEV too is an error */ 3412 if (rc && (rc != -ENODEV || sata_scr_valid(ap))) { 3413 ata_port_printk(ap, KERN_ERR, "SRST failed (errno=%d)\n", rc); 3414 return rc; 3415 } 3416 3417 /* determine by signature whether we have ATA or ATAPI devices */ 3418 classes[0] = ata_dev_try_classify(ap, 0, &err); 3419 if (slave_possible && err != 0x81) 3420 classes[1] = ata_dev_try_classify(ap, 1, &err); 3421 3422 out: 3423 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]); 3424 return 0; 3425 } 3426 3427 /** 3428 * sata_port_hardreset - reset port via SATA phy reset 3429 * @ap: port to reset 3430 * @timing: timing parameters { interval, duratinon, timeout } in msec 3431 * @deadline: deadline jiffies for the operation 3432 * 3433 * SATA phy-reset host port using DET bits of SControl register. 3434 * 3435 * LOCKING: 3436 * Kernel thread context (may sleep) 3437 * 3438 * RETURNS: 3439 * 0 on success, -errno otherwise. 3440 */ 3441 int sata_port_hardreset(struct ata_port *ap, const unsigned long *timing, 3442 unsigned long deadline) 3443 { 3444 u32 scontrol; 3445 int rc; 3446 3447 DPRINTK("ENTER\n"); 3448 3449 if (sata_set_spd_needed(ap)) { 3450 /* SATA spec says nothing about how to reconfigure 3451 * spd. To be on the safe side, turn off phy during 3452 * reconfiguration. This works for at least ICH7 AHCI 3453 * and Sil3124. 3454 */ 3455 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) 3456 goto out; 3457 3458 scontrol = (scontrol & 0x0f0) | 0x304; 3459 3460 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) 3461 goto out; 3462 3463 sata_set_spd(ap); 3464 } 3465 3466 /* issue phy wake/reset */ 3467 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) 3468 goto out; 3469 3470 scontrol = (scontrol & 0x0f0) | 0x301; 3471 3472 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol))) 3473 goto out; 3474 3475 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1 3476 * 10.4.2 says at least 1 ms. 3477 */ 3478 msleep(1); 3479 3480 /* bring phy back */ 3481 rc = sata_phy_resume(ap, timing, deadline); 3482 out: 3483 DPRINTK("EXIT, rc=%d\n", rc); 3484 return rc; 3485 } 3486 3487 /** 3488 * sata_std_hardreset - reset host port via SATA phy reset 3489 * @ap: port to reset 3490 * @class: resulting class of attached device 3491 * @deadline: deadline jiffies for the operation 3492 * 3493 * SATA phy-reset host port using DET bits of SControl register, 3494 * wait for !BSY and classify the attached device. 3495 * 3496 * LOCKING: 3497 * Kernel thread context (may sleep) 3498 * 3499 * RETURNS: 3500 * 0 on success, -errno otherwise. 3501 */ 3502 int sata_std_hardreset(struct ata_port *ap, unsigned int *class, 3503 unsigned long deadline) 3504 { 3505 const unsigned long *timing = sata_ehc_deb_timing(&ap->eh_context); 3506 int rc; 3507 3508 DPRINTK("ENTER\n"); 3509 3510 /* do hardreset */ 3511 rc = sata_port_hardreset(ap, timing, deadline); 3512 if (rc) { 3513 ata_port_printk(ap, KERN_ERR, 3514 "COMRESET failed (errno=%d)\n", rc); 3515 return rc; 3516 } 3517 3518 /* TODO: phy layer with polling, timeouts, etc. */ 3519 if (ata_port_offline(ap)) { 3520 *class = ATA_DEV_NONE; 3521 DPRINTK("EXIT, link offline\n"); 3522 return 0; 3523 } 3524 3525 /* wait a while before checking status, see SRST for more info */ 3526 msleep(150); 3527 3528 rc = ata_wait_ready(ap, deadline); 3529 /* link occupied, -ENODEV too is an error */ 3530 if (rc) { 3531 ata_port_printk(ap, KERN_ERR, 3532 "COMRESET failed (errno=%d)\n", rc); 3533 return rc; 3534 } 3535 3536 ap->ops->dev_select(ap, 0); /* probably unnecessary */ 3537 3538 *class = ata_dev_try_classify(ap, 0, NULL); 3539 3540 DPRINTK("EXIT, class=%u\n", *class); 3541 return 0; 3542 } 3543 3544 /** 3545 * ata_std_postreset - standard postreset callback 3546 * @ap: the target ata_port 3547 * @classes: classes of attached devices 3548 * 3549 * This function is invoked after a successful reset. Note that 3550 * the device might have been reset more than once using 3551 * different reset methods before postreset is invoked. 3552 * 3553 * LOCKING: 3554 * Kernel thread context (may sleep) 3555 */ 3556 void ata_std_postreset(struct ata_port *ap, unsigned int *classes) 3557 { 3558 u32 serror; 3559 3560 DPRINTK("ENTER\n"); 3561 3562 /* print link status */ 3563 sata_print_link_status(ap); 3564 3565 /* clear SError */ 3566 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0) 3567 sata_scr_write(ap, SCR_ERROR, serror); 3568 3569 /* is double-select really necessary? */ 3570 if (classes[0] != ATA_DEV_NONE) 3571 ap->ops->dev_select(ap, 1); 3572 if (classes[1] != ATA_DEV_NONE) 3573 ap->ops->dev_select(ap, 0); 3574 3575 /* bail out if no device is present */ 3576 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { 3577 DPRINTK("EXIT, no device\n"); 3578 return; 3579 } 3580 3581 /* set up device control */ 3582 if (ap->ioaddr.ctl_addr) 3583 iowrite8(ap->ctl, ap->ioaddr.ctl_addr); 3584 3585 DPRINTK("EXIT\n"); 3586 } 3587 3588 /** 3589 * ata_dev_same_device - Determine whether new ID matches configured device 3590 * @dev: device to compare against 3591 * @new_class: class of the new device 3592 * @new_id: IDENTIFY page of the new device 3593 * 3594 * Compare @new_class and @new_id against @dev and determine 3595 * whether @dev is the device indicated by @new_class and 3596 * @new_id. 3597 * 3598 * LOCKING: 3599 * None. 3600 * 3601 * RETURNS: 3602 * 1 if @dev matches @new_class and @new_id, 0 otherwise. 3603 */ 3604 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class, 3605 const u16 *new_id) 3606 { 3607 const u16 *old_id = dev->id; 3608 unsigned char model[2][ATA_ID_PROD_LEN + 1]; 3609 unsigned char serial[2][ATA_ID_SERNO_LEN + 1]; 3610 3611 if (dev->class != new_class) { 3612 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n", 3613 dev->class, new_class); 3614 return 0; 3615 } 3616 3617 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0])); 3618 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1])); 3619 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0])); 3620 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1])); 3621 3622 if (strcmp(model[0], model[1])) { 3623 ata_dev_printk(dev, KERN_INFO, "model number mismatch " 3624 "'%s' != '%s'\n", model[0], model[1]); 3625 return 0; 3626 } 3627 3628 if (strcmp(serial[0], serial[1])) { 3629 ata_dev_printk(dev, KERN_INFO, "serial number mismatch " 3630 "'%s' != '%s'\n", serial[0], serial[1]); 3631 return 0; 3632 } 3633 3634 return 1; 3635 } 3636 3637 /** 3638 * ata_dev_reread_id - Re-read IDENTIFY data 3639 * @dev: target ATA device 3640 * @readid_flags: read ID flags 3641 * 3642 * Re-read IDENTIFY page and make sure @dev is still attached to 3643 * the port. 3644 * 3645 * LOCKING: 3646 * Kernel thread context (may sleep) 3647 * 3648 * RETURNS: 3649 * 0 on success, negative errno otherwise 3650 */ 3651 int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags) 3652 { 3653 unsigned int class = dev->class; 3654 u16 *id = (void *)dev->ap->sector_buf; 3655 int rc; 3656 3657 /* read ID data */ 3658 rc = ata_dev_read_id(dev, &class, readid_flags, id); 3659 if (rc) 3660 return rc; 3661 3662 /* is the device still there? */ 3663 if (!ata_dev_same_device(dev, class, id)) 3664 return -ENODEV; 3665 3666 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS); 3667 return 0; 3668 } 3669 3670 /** 3671 * ata_dev_revalidate - Revalidate ATA device 3672 * @dev: device to revalidate 3673 * @readid_flags: read ID flags 3674 * 3675 * Re-read IDENTIFY page, make sure @dev is still attached to the 3676 * port and reconfigure it according to the new IDENTIFY page. 3677 * 3678 * LOCKING: 3679 * Kernel thread context (may sleep) 3680 * 3681 * RETURNS: 3682 * 0 on success, negative errno otherwise 3683 */ 3684 int ata_dev_revalidate(struct ata_device *dev, unsigned int readid_flags) 3685 { 3686 u64 n_sectors = dev->n_sectors; 3687 int rc; 3688 3689 if (!ata_dev_enabled(dev)) 3690 return -ENODEV; 3691 3692 /* re-read ID */ 3693 rc = ata_dev_reread_id(dev, readid_flags); 3694 if (rc) 3695 goto fail; 3696 3697 /* configure device according to the new ID */ 3698 rc = ata_dev_configure(dev); 3699 if (rc) 3700 goto fail; 3701 3702 /* verify n_sectors hasn't changed */ 3703 if (dev->class == ATA_DEV_ATA && dev->n_sectors != n_sectors) { 3704 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch " 3705 "%llu != %llu\n", 3706 (unsigned long long)n_sectors, 3707 (unsigned long long)dev->n_sectors); 3708 rc = -ENODEV; 3709 goto fail; 3710 } 3711 3712 return 0; 3713 3714 fail: 3715 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc); 3716 return rc; 3717 } 3718 3719 struct ata_blacklist_entry { 3720 const char *model_num; 3721 const char *model_rev; 3722 unsigned long horkage; 3723 }; 3724 3725 static const struct ata_blacklist_entry ata_device_blacklist [] = { 3726 /* Devices with DMA related problems under Linux */ 3727 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA }, 3728 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA }, 3729 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA }, 3730 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA }, 3731 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA }, 3732 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA }, 3733 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA }, 3734 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA }, 3735 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA }, 3736 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA }, 3737 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA }, 3738 { "CRD-84", NULL, ATA_HORKAGE_NODMA }, 3739 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA }, 3740 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA }, 3741 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA }, 3742 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA }, 3743 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA }, 3744 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA }, 3745 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA }, 3746 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA }, 3747 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA }, 3748 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA }, 3749 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA }, 3750 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA }, 3751 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA }, 3752 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA }, 3753 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA }, 3754 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA }, 3755 { "SAMSUNG CD-ROM SN-124","N001", ATA_HORKAGE_NODMA }, 3756 { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA }, 3757 { "IOMEGA ZIP 250 ATAPI", NULL, ATA_HORKAGE_NODMA }, /* temporary fix */ 3758 { "IOMEGA ZIP 250 ATAPI Floppy", 3759 NULL, ATA_HORKAGE_NODMA }, 3760 3761 /* Weird ATAPI devices */ 3762 { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 }, 3763 3764 /* Devices we expect to fail diagnostics */ 3765 3766 /* Devices where NCQ should be avoided */ 3767 /* NCQ is slow */ 3768 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ }, 3769 /* http://thread.gmane.org/gmane.linux.ide/14907 */ 3770 { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ }, 3771 /* NCQ is broken */ 3772 { "Maxtor 6L250S0", "BANC1G10", ATA_HORKAGE_NONCQ }, 3773 { "Maxtor 6B200M0", "BANC1BM0", ATA_HORKAGE_NONCQ }, 3774 { "Maxtor 6B200M0", "BANC1B10", ATA_HORKAGE_NONCQ }, 3775 { "HITACHI HDS7250SASUN500G 0621KTAWSD", "K2AOAJ0AHITACHI", 3776 ATA_HORKAGE_NONCQ }, 3777 /* NCQ hard hangs device under heavier load, needs hard power cycle */ 3778 { "Maxtor 6B250S0", "BANC1B70", ATA_HORKAGE_NONCQ }, 3779 /* Blacklist entries taken from Silicon Image 3124/3132 3780 Windows driver .inf file - also several Linux problem reports */ 3781 { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, }, 3782 { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, }, 3783 { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, }, 3784 /* Drives which do spurious command completion */ 3785 { "HTS541680J9SA00", "SB2IC7EP", ATA_HORKAGE_NONCQ, }, 3786 { "HTS541612J9SA00", "SBDIC7JP", ATA_HORKAGE_NONCQ, }, 3787 { "Hitachi HTS541616J9SA00", "SB4OC70P", ATA_HORKAGE_NONCQ, }, 3788 { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, }, 3789 { "FUJITSU MHV2080BH", "00840028", ATA_HORKAGE_NONCQ, }, 3790 { "ST9160821AS", "3.CLF", ATA_HORKAGE_NONCQ, }, 3791 { "SAMSUNG HD401LJ", "ZZ100-15", ATA_HORKAGE_NONCQ, }, 3792 3793 /* Devices with NCQ limits */ 3794 3795 /* End Marker */ 3796 { } 3797 }; 3798 3799 static unsigned long ata_dev_blacklisted(const struct ata_device *dev) 3800 { 3801 unsigned char model_num[ATA_ID_PROD_LEN + 1]; 3802 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1]; 3803 const struct ata_blacklist_entry *ad = ata_device_blacklist; 3804 3805 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num)); 3806 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev)); 3807 3808 while (ad->model_num) { 3809 if (!strcmp(ad->model_num, model_num)) { 3810 if (ad->model_rev == NULL) 3811 return ad->horkage; 3812 if (!strcmp(ad->model_rev, model_rev)) 3813 return ad->horkage; 3814 } 3815 ad++; 3816 } 3817 return 0; 3818 } 3819 3820 static int ata_dma_blacklisted(const struct ata_device *dev) 3821 { 3822 /* We don't support polling DMA. 3823 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO) 3824 * if the LLDD handles only interrupts in the HSM_ST_LAST state. 3825 */ 3826 if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) && 3827 (dev->flags & ATA_DFLAG_CDB_INTR)) 3828 return 1; 3829 return (dev->horkage & ATA_HORKAGE_NODMA) ? 1 : 0; 3830 } 3831 3832 /** 3833 * ata_dev_xfermask - Compute supported xfermask of the given device 3834 * @dev: Device to compute xfermask for 3835 * 3836 * Compute supported xfermask of @dev and store it in 3837 * dev->*_mask. This function is responsible for applying all 3838 * known limits including host controller limits, device 3839 * blacklist, etc... 3840 * 3841 * LOCKING: 3842 * None. 3843 */ 3844 static void ata_dev_xfermask(struct ata_device *dev) 3845 { 3846 struct ata_port *ap = dev->ap; 3847 struct ata_host *host = ap->host; 3848 unsigned long xfer_mask; 3849 3850 /* controller modes available */ 3851 xfer_mask = ata_pack_xfermask(ap->pio_mask, 3852 ap->mwdma_mask, ap->udma_mask); 3853 3854 /* drive modes available */ 3855 xfer_mask &= ata_pack_xfermask(dev->pio_mask, 3856 dev->mwdma_mask, dev->udma_mask); 3857 xfer_mask &= ata_id_xfermask(dev->id); 3858 3859 /* 3860 * CFA Advanced TrueIDE timings are not allowed on a shared 3861 * cable 3862 */ 3863 if (ata_dev_pair(dev)) { 3864 /* No PIO5 or PIO6 */ 3865 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5)); 3866 /* No MWDMA3 or MWDMA 4 */ 3867 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3)); 3868 } 3869 3870 if (ata_dma_blacklisted(dev)) { 3871 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); 3872 ata_dev_printk(dev, KERN_WARNING, 3873 "device is on DMA blacklist, disabling DMA\n"); 3874 } 3875 3876 if ((host->flags & ATA_HOST_SIMPLEX) && 3877 host->simplex_claimed && host->simplex_claimed != ap) { 3878 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); 3879 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by " 3880 "other device, disabling DMA\n"); 3881 } 3882 3883 if (ap->flags & ATA_FLAG_NO_IORDY) 3884 xfer_mask &= ata_pio_mask_no_iordy(dev); 3885 3886 if (ap->ops->mode_filter) 3887 xfer_mask = ap->ops->mode_filter(dev, xfer_mask); 3888 3889 /* Apply cable rule here. Don't apply it early because when 3890 * we handle hot plug the cable type can itself change. 3891 * Check this last so that we know if the transfer rate was 3892 * solely limited by the cable. 3893 * Unknown or 80 wire cables reported host side are checked 3894 * drive side as well. Cases where we know a 40wire cable 3895 * is used safely for 80 are not checked here. 3896 */ 3897 if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA)) 3898 /* UDMA/44 or higher would be available */ 3899 if((ap->cbl == ATA_CBL_PATA40) || 3900 (ata_drive_40wire(dev->id) && 3901 (ap->cbl == ATA_CBL_PATA_UNK || 3902 ap->cbl == ATA_CBL_PATA80))) { 3903 ata_dev_printk(dev, KERN_WARNING, 3904 "limited to UDMA/33 due to 40-wire cable\n"); 3905 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA); 3906 } 3907 3908 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, 3909 &dev->mwdma_mask, &dev->udma_mask); 3910 } 3911 3912 /** 3913 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command 3914 * @dev: Device to which command will be sent 3915 * 3916 * Issue SET FEATURES - XFER MODE command to device @dev 3917 * on port @ap. 3918 * 3919 * LOCKING: 3920 * PCI/etc. bus probe sem. 3921 * 3922 * RETURNS: 3923 * 0 on success, AC_ERR_* mask otherwise. 3924 */ 3925 3926 static unsigned int ata_dev_set_xfermode(struct ata_device *dev) 3927 { 3928 struct ata_taskfile tf; 3929 unsigned int err_mask; 3930 3931 /* set up set-features taskfile */ 3932 DPRINTK("set features - xfer mode\n"); 3933 3934 /* Some controllers and ATAPI devices show flaky interrupt 3935 * behavior after setting xfer mode. Use polling instead. 3936 */ 3937 ata_tf_init(dev, &tf); 3938 tf.command = ATA_CMD_SET_FEATURES; 3939 tf.feature = SETFEATURES_XFER; 3940 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING; 3941 tf.protocol = ATA_PROT_NODATA; 3942 tf.nsect = dev->xfer_mode; 3943 3944 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); 3945 3946 DPRINTK("EXIT, err_mask=%x\n", err_mask); 3947 return err_mask; 3948 } 3949 3950 /** 3951 * ata_dev_init_params - Issue INIT DEV PARAMS command 3952 * @dev: Device to which command will be sent 3953 * @heads: Number of heads (taskfile parameter) 3954 * @sectors: Number of sectors (taskfile parameter) 3955 * 3956 * LOCKING: 3957 * Kernel thread context (may sleep) 3958 * 3959 * RETURNS: 3960 * 0 on success, AC_ERR_* mask otherwise. 3961 */ 3962 static unsigned int ata_dev_init_params(struct ata_device *dev, 3963 u16 heads, u16 sectors) 3964 { 3965 struct ata_taskfile tf; 3966 unsigned int err_mask; 3967 3968 /* Number of sectors per track 1-255. Number of heads 1-16 */ 3969 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16) 3970 return AC_ERR_INVALID; 3971 3972 /* set up init dev params taskfile */ 3973 DPRINTK("init dev params \n"); 3974 3975 ata_tf_init(dev, &tf); 3976 tf.command = ATA_CMD_INIT_DEV_PARAMS; 3977 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 3978 tf.protocol = ATA_PROT_NODATA; 3979 tf.nsect = sectors; 3980 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */ 3981 3982 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); 3983 3984 DPRINTK("EXIT, err_mask=%x\n", err_mask); 3985 return err_mask; 3986 } 3987 3988 /** 3989 * ata_sg_clean - Unmap DMA memory associated with command 3990 * @qc: Command containing DMA memory to be released 3991 * 3992 * Unmap all mapped DMA memory associated with this command. 3993 * 3994 * LOCKING: 3995 * spin_lock_irqsave(host lock) 3996 */ 3997 void ata_sg_clean(struct ata_queued_cmd *qc) 3998 { 3999 struct ata_port *ap = qc->ap; 4000 struct scatterlist *sg = qc->__sg; 4001 int dir = qc->dma_dir; 4002 void *pad_buf = NULL; 4003 4004 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP)); 4005 WARN_ON(sg == NULL); 4006 4007 if (qc->flags & ATA_QCFLAG_SINGLE) 4008 WARN_ON(qc->n_elem > 1); 4009 4010 VPRINTK("unmapping %u sg elements\n", qc->n_elem); 4011 4012 /* if we padded the buffer out to 32-bit bound, and data 4013 * xfer direction is from-device, we must copy from the 4014 * pad buffer back into the supplied buffer 4015 */ 4016 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE)) 4017 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); 4018 4019 if (qc->flags & ATA_QCFLAG_SG) { 4020 if (qc->n_elem) 4021 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir); 4022 /* restore last sg */ 4023 sg[qc->orig_n_elem - 1].length += qc->pad_len; 4024 if (pad_buf) { 4025 struct scatterlist *psg = &qc->pad_sgent; 4026 void *addr = kmap_atomic(psg->page, KM_IRQ0); 4027 memcpy(addr + psg->offset, pad_buf, qc->pad_len); 4028 kunmap_atomic(addr, KM_IRQ0); 4029 } 4030 } else { 4031 if (qc->n_elem) 4032 dma_unmap_single(ap->dev, 4033 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]), 4034 dir); 4035 /* restore sg */ 4036 sg->length += qc->pad_len; 4037 if (pad_buf) 4038 memcpy(qc->buf_virt + sg->length - qc->pad_len, 4039 pad_buf, qc->pad_len); 4040 } 4041 4042 qc->flags &= ~ATA_QCFLAG_DMAMAP; 4043 qc->__sg = NULL; 4044 } 4045 4046 /** 4047 * ata_fill_sg - Fill PCI IDE PRD table 4048 * @qc: Metadata associated with taskfile to be transferred 4049 * 4050 * Fill PCI IDE PRD (scatter-gather) table with segments 4051 * associated with the current disk command. 4052 * 4053 * LOCKING: 4054 * spin_lock_irqsave(host lock) 4055 * 4056 */ 4057 static void ata_fill_sg(struct ata_queued_cmd *qc) 4058 { 4059 struct ata_port *ap = qc->ap; 4060 struct scatterlist *sg; 4061 unsigned int idx; 4062 4063 WARN_ON(qc->__sg == NULL); 4064 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); 4065 4066 idx = 0; 4067 ata_for_each_sg(sg, qc) { 4068 u32 addr, offset; 4069 u32 sg_len, len; 4070 4071 /* determine if physical DMA addr spans 64K boundary. 4072 * Note h/w doesn't support 64-bit, so we unconditionally 4073 * truncate dma_addr_t to u32. 4074 */ 4075 addr = (u32) sg_dma_address(sg); 4076 sg_len = sg_dma_len(sg); 4077 4078 while (sg_len) { 4079 offset = addr & 0xffff; 4080 len = sg_len; 4081 if ((offset + sg_len) > 0x10000) 4082 len = 0x10000 - offset; 4083 4084 ap->prd[idx].addr = cpu_to_le32(addr); 4085 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); 4086 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); 4087 4088 idx++; 4089 sg_len -= len; 4090 addr += len; 4091 } 4092 } 4093 4094 if (idx) 4095 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); 4096 } 4097 4098 /** 4099 * ata_fill_sg_dumb - Fill PCI IDE PRD table 4100 * @qc: Metadata associated with taskfile to be transferred 4101 * 4102 * Fill PCI IDE PRD (scatter-gather) table with segments 4103 * associated with the current disk command. Perform the fill 4104 * so that we avoid writing any length 64K records for 4105 * controllers that don't follow the spec. 4106 * 4107 * LOCKING: 4108 * spin_lock_irqsave(host lock) 4109 * 4110 */ 4111 static void ata_fill_sg_dumb(struct ata_queued_cmd *qc) 4112 { 4113 struct ata_port *ap = qc->ap; 4114 struct scatterlist *sg; 4115 unsigned int idx; 4116 4117 WARN_ON(qc->__sg == NULL); 4118 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); 4119 4120 idx = 0; 4121 ata_for_each_sg(sg, qc) { 4122 u32 addr, offset; 4123 u32 sg_len, len, blen; 4124 4125 /* determine if physical DMA addr spans 64K boundary. 4126 * Note h/w doesn't support 64-bit, so we unconditionally 4127 * truncate dma_addr_t to u32. 4128 */ 4129 addr = (u32) sg_dma_address(sg); 4130 sg_len = sg_dma_len(sg); 4131 4132 while (sg_len) { 4133 offset = addr & 0xffff; 4134 len = sg_len; 4135 if ((offset + sg_len) > 0x10000) 4136 len = 0x10000 - offset; 4137 4138 blen = len & 0xffff; 4139 ap->prd[idx].addr = cpu_to_le32(addr); 4140 if (blen == 0) { 4141 /* Some PATA chipsets like the CS5530 can't 4142 cope with 0x0000 meaning 64K as the spec says */ 4143 ap->prd[idx].flags_len = cpu_to_le32(0x8000); 4144 blen = 0x8000; 4145 ap->prd[++idx].addr = cpu_to_le32(addr + 0x8000); 4146 } 4147 ap->prd[idx].flags_len = cpu_to_le32(blen); 4148 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); 4149 4150 idx++; 4151 sg_len -= len; 4152 addr += len; 4153 } 4154 } 4155 4156 if (idx) 4157 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); 4158 } 4159 4160 /** 4161 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported 4162 * @qc: Metadata associated with taskfile to check 4163 * 4164 * Allow low-level driver to filter ATA PACKET commands, returning 4165 * a status indicating whether or not it is OK to use DMA for the 4166 * supplied PACKET command. 4167 * 4168 * LOCKING: 4169 * spin_lock_irqsave(host lock) 4170 * 4171 * RETURNS: 0 when ATAPI DMA can be used 4172 * nonzero otherwise 4173 */ 4174 int ata_check_atapi_dma(struct ata_queued_cmd *qc) 4175 { 4176 struct ata_port *ap = qc->ap; 4177 4178 /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a 4179 * few ATAPI devices choke on such DMA requests. 4180 */ 4181 if (unlikely(qc->nbytes & 15)) 4182 return 1; 4183 4184 if (ap->ops->check_atapi_dma) 4185 return ap->ops->check_atapi_dma(qc); 4186 4187 return 0; 4188 } 4189 4190 /** 4191 * ata_qc_prep - Prepare taskfile for submission 4192 * @qc: Metadata associated with taskfile to be prepared 4193 * 4194 * Prepare ATA taskfile for submission. 4195 * 4196 * LOCKING: 4197 * spin_lock_irqsave(host lock) 4198 */ 4199 void ata_qc_prep(struct ata_queued_cmd *qc) 4200 { 4201 if (!(qc->flags & ATA_QCFLAG_DMAMAP)) 4202 return; 4203 4204 ata_fill_sg(qc); 4205 } 4206 4207 /** 4208 * ata_dumb_qc_prep - Prepare taskfile for submission 4209 * @qc: Metadata associated with taskfile to be prepared 4210 * 4211 * Prepare ATA taskfile for submission. 4212 * 4213 * LOCKING: 4214 * spin_lock_irqsave(host lock) 4215 */ 4216 void ata_dumb_qc_prep(struct ata_queued_cmd *qc) 4217 { 4218 if (!(qc->flags & ATA_QCFLAG_DMAMAP)) 4219 return; 4220 4221 ata_fill_sg_dumb(qc); 4222 } 4223 4224 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { } 4225 4226 /** 4227 * ata_sg_init_one - Associate command with memory buffer 4228 * @qc: Command to be associated 4229 * @buf: Memory buffer 4230 * @buflen: Length of memory buffer, in bytes. 4231 * 4232 * Initialize the data-related elements of queued_cmd @qc 4233 * to point to a single memory buffer, @buf of byte length @buflen. 4234 * 4235 * LOCKING: 4236 * spin_lock_irqsave(host lock) 4237 */ 4238 4239 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen) 4240 { 4241 qc->flags |= ATA_QCFLAG_SINGLE; 4242 4243 qc->__sg = &qc->sgent; 4244 qc->n_elem = 1; 4245 qc->orig_n_elem = 1; 4246 qc->buf_virt = buf; 4247 qc->nbytes = buflen; 4248 4249 sg_init_one(&qc->sgent, buf, buflen); 4250 } 4251 4252 /** 4253 * ata_sg_init - Associate command with scatter-gather table. 4254 * @qc: Command to be associated 4255 * @sg: Scatter-gather table. 4256 * @n_elem: Number of elements in s/g table. 4257 * 4258 * Initialize the data-related elements of queued_cmd @qc 4259 * to point to a scatter-gather table @sg, containing @n_elem 4260 * elements. 4261 * 4262 * LOCKING: 4263 * spin_lock_irqsave(host lock) 4264 */ 4265 4266 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, 4267 unsigned int n_elem) 4268 { 4269 qc->flags |= ATA_QCFLAG_SG; 4270 qc->__sg = sg; 4271 qc->n_elem = n_elem; 4272 qc->orig_n_elem = n_elem; 4273 } 4274 4275 /** 4276 * ata_sg_setup_one - DMA-map the memory buffer associated with a command. 4277 * @qc: Command with memory buffer to be mapped. 4278 * 4279 * DMA-map the memory buffer associated with queued_cmd @qc. 4280 * 4281 * LOCKING: 4282 * spin_lock_irqsave(host lock) 4283 * 4284 * RETURNS: 4285 * Zero on success, negative on error. 4286 */ 4287 4288 static int ata_sg_setup_one(struct ata_queued_cmd *qc) 4289 { 4290 struct ata_port *ap = qc->ap; 4291 int dir = qc->dma_dir; 4292 struct scatterlist *sg = qc->__sg; 4293 dma_addr_t dma_address; 4294 int trim_sg = 0; 4295 4296 /* we must lengthen transfers to end on a 32-bit boundary */ 4297 qc->pad_len = sg->length & 3; 4298 if (qc->pad_len) { 4299 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); 4300 struct scatterlist *psg = &qc->pad_sgent; 4301 4302 WARN_ON(qc->dev->class != ATA_DEV_ATAPI); 4303 4304 memset(pad_buf, 0, ATA_DMA_PAD_SZ); 4305 4306 if (qc->tf.flags & ATA_TFLAG_WRITE) 4307 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len, 4308 qc->pad_len); 4309 4310 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); 4311 sg_dma_len(psg) = ATA_DMA_PAD_SZ; 4312 /* trim sg */ 4313 sg->length -= qc->pad_len; 4314 if (sg->length == 0) 4315 trim_sg = 1; 4316 4317 DPRINTK("padding done, sg->length=%u pad_len=%u\n", 4318 sg->length, qc->pad_len); 4319 } 4320 4321 if (trim_sg) { 4322 qc->n_elem--; 4323 goto skip_map; 4324 } 4325 4326 dma_address = dma_map_single(ap->dev, qc->buf_virt, 4327 sg->length, dir); 4328 if (dma_mapping_error(dma_address)) { 4329 /* restore sg */ 4330 sg->length += qc->pad_len; 4331 return -1; 4332 } 4333 4334 sg_dma_address(sg) = dma_address; 4335 sg_dma_len(sg) = sg->length; 4336 4337 skip_map: 4338 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg), 4339 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); 4340 4341 return 0; 4342 } 4343 4344 /** 4345 * ata_sg_setup - DMA-map the scatter-gather table associated with a command. 4346 * @qc: Command with scatter-gather table to be mapped. 4347 * 4348 * DMA-map the scatter-gather table associated with queued_cmd @qc. 4349 * 4350 * LOCKING: 4351 * spin_lock_irqsave(host lock) 4352 * 4353 * RETURNS: 4354 * Zero on success, negative on error. 4355 * 4356 */ 4357 4358 static int ata_sg_setup(struct ata_queued_cmd *qc) 4359 { 4360 struct ata_port *ap = qc->ap; 4361 struct scatterlist *sg = qc->__sg; 4362 struct scatterlist *lsg = &sg[qc->n_elem - 1]; 4363 int n_elem, pre_n_elem, dir, trim_sg = 0; 4364 4365 VPRINTK("ENTER, ata%u\n", ap->print_id); 4366 WARN_ON(!(qc->flags & ATA_QCFLAG_SG)); 4367 4368 /* we must lengthen transfers to end on a 32-bit boundary */ 4369 qc->pad_len = lsg->length & 3; 4370 if (qc->pad_len) { 4371 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); 4372 struct scatterlist *psg = &qc->pad_sgent; 4373 unsigned int offset; 4374 4375 WARN_ON(qc->dev->class != ATA_DEV_ATAPI); 4376 4377 memset(pad_buf, 0, ATA_DMA_PAD_SZ); 4378 4379 /* 4380 * psg->page/offset are used to copy to-be-written 4381 * data in this function or read data in ata_sg_clean. 4382 */ 4383 offset = lsg->offset + lsg->length - qc->pad_len; 4384 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT); 4385 psg->offset = offset_in_page(offset); 4386 4387 if (qc->tf.flags & ATA_TFLAG_WRITE) { 4388 void *addr = kmap_atomic(psg->page, KM_IRQ0); 4389 memcpy(pad_buf, addr + psg->offset, qc->pad_len); 4390 kunmap_atomic(addr, KM_IRQ0); 4391 } 4392 4393 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); 4394 sg_dma_len(psg) = ATA_DMA_PAD_SZ; 4395 /* trim last sg */ 4396 lsg->length -= qc->pad_len; 4397 if (lsg->length == 0) 4398 trim_sg = 1; 4399 4400 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n", 4401 qc->n_elem - 1, lsg->length, qc->pad_len); 4402 } 4403 4404 pre_n_elem = qc->n_elem; 4405 if (trim_sg && pre_n_elem) 4406 pre_n_elem--; 4407 4408 if (!pre_n_elem) { 4409 n_elem = 0; 4410 goto skip_map; 4411 } 4412 4413 dir = qc->dma_dir; 4414 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir); 4415 if (n_elem < 1) { 4416 /* restore last sg */ 4417 lsg->length += qc->pad_len; 4418 return -1; 4419 } 4420 4421 DPRINTK("%d sg elements mapped\n", n_elem); 4422 4423 skip_map: 4424 qc->n_elem = n_elem; 4425 4426 return 0; 4427 } 4428 4429 /** 4430 * swap_buf_le16 - swap halves of 16-bit words in place 4431 * @buf: Buffer to swap 4432 * @buf_words: Number of 16-bit words in buffer. 4433 * 4434 * Swap halves of 16-bit words if needed to convert from 4435 * little-endian byte order to native cpu byte order, or 4436 * vice-versa. 4437 * 4438 * LOCKING: 4439 * Inherited from caller. 4440 */ 4441 void swap_buf_le16(u16 *buf, unsigned int buf_words) 4442 { 4443 #ifdef __BIG_ENDIAN 4444 unsigned int i; 4445 4446 for (i = 0; i < buf_words; i++) 4447 buf[i] = le16_to_cpu(buf[i]); 4448 #endif /* __BIG_ENDIAN */ 4449 } 4450 4451 /** 4452 * ata_data_xfer - Transfer data by PIO 4453 * @adev: device to target 4454 * @buf: data buffer 4455 * @buflen: buffer length 4456 * @write_data: read/write 4457 * 4458 * Transfer data from/to the device data register by PIO. 4459 * 4460 * LOCKING: 4461 * Inherited from caller. 4462 */ 4463 void ata_data_xfer(struct ata_device *adev, unsigned char *buf, 4464 unsigned int buflen, int write_data) 4465 { 4466 struct ata_port *ap = adev->ap; 4467 unsigned int words = buflen >> 1; 4468 4469 /* Transfer multiple of 2 bytes */ 4470 if (write_data) 4471 iowrite16_rep(ap->ioaddr.data_addr, buf, words); 4472 else 4473 ioread16_rep(ap->ioaddr.data_addr, buf, words); 4474 4475 /* Transfer trailing 1 byte, if any. */ 4476 if (unlikely(buflen & 0x01)) { 4477 u16 align_buf[1] = { 0 }; 4478 unsigned char *trailing_buf = buf + buflen - 1; 4479 4480 if (write_data) { 4481 memcpy(align_buf, trailing_buf, 1); 4482 iowrite16(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); 4483 } else { 4484 align_buf[0] = cpu_to_le16(ioread16(ap->ioaddr.data_addr)); 4485 memcpy(trailing_buf, align_buf, 1); 4486 } 4487 } 4488 } 4489 4490 /** 4491 * ata_data_xfer_noirq - Transfer data by PIO 4492 * @adev: device to target 4493 * @buf: data buffer 4494 * @buflen: buffer length 4495 * @write_data: read/write 4496 * 4497 * Transfer data from/to the device data register by PIO. Do the 4498 * transfer with interrupts disabled. 4499 * 4500 * LOCKING: 4501 * Inherited from caller. 4502 */ 4503 void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf, 4504 unsigned int buflen, int write_data) 4505 { 4506 unsigned long flags; 4507 local_irq_save(flags); 4508 ata_data_xfer(adev, buf, buflen, write_data); 4509 local_irq_restore(flags); 4510 } 4511 4512 4513 /** 4514 * ata_pio_sector - Transfer a sector of data. 4515 * @qc: Command on going 4516 * 4517 * Transfer qc->sect_size bytes of data from/to the ATA device. 4518 * 4519 * LOCKING: 4520 * Inherited from caller. 4521 */ 4522 4523 static void ata_pio_sector(struct ata_queued_cmd *qc) 4524 { 4525 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); 4526 struct scatterlist *sg = qc->__sg; 4527 struct ata_port *ap = qc->ap; 4528 struct page *page; 4529 unsigned int offset; 4530 unsigned char *buf; 4531 4532 if (qc->curbytes == qc->nbytes - qc->sect_size) 4533 ap->hsm_task_state = HSM_ST_LAST; 4534 4535 page = sg[qc->cursg].page; 4536 offset = sg[qc->cursg].offset + qc->cursg_ofs; 4537 4538 /* get the current page and offset */ 4539 page = nth_page(page, (offset >> PAGE_SHIFT)); 4540 offset %= PAGE_SIZE; 4541 4542 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); 4543 4544 if (PageHighMem(page)) { 4545 unsigned long flags; 4546 4547 /* FIXME: use a bounce buffer */ 4548 local_irq_save(flags); 4549 buf = kmap_atomic(page, KM_IRQ0); 4550 4551 /* do the actual data transfer */ 4552 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write); 4553 4554 kunmap_atomic(buf, KM_IRQ0); 4555 local_irq_restore(flags); 4556 } else { 4557 buf = page_address(page); 4558 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write); 4559 } 4560 4561 qc->curbytes += qc->sect_size; 4562 qc->cursg_ofs += qc->sect_size; 4563 4564 if (qc->cursg_ofs == (&sg[qc->cursg])->length) { 4565 qc->cursg++; 4566 qc->cursg_ofs = 0; 4567 } 4568 } 4569 4570 /** 4571 * ata_pio_sectors - Transfer one or many sectors. 4572 * @qc: Command on going 4573 * 4574 * Transfer one or many sectors of data from/to the 4575 * ATA device for the DRQ request. 4576 * 4577 * LOCKING: 4578 * Inherited from caller. 4579 */ 4580 4581 static void ata_pio_sectors(struct ata_queued_cmd *qc) 4582 { 4583 if (is_multi_taskfile(&qc->tf)) { 4584 /* READ/WRITE MULTIPLE */ 4585 unsigned int nsect; 4586 4587 WARN_ON(qc->dev->multi_count == 0); 4588 4589 nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size, 4590 qc->dev->multi_count); 4591 while (nsect--) 4592 ata_pio_sector(qc); 4593 } else 4594 ata_pio_sector(qc); 4595 } 4596 4597 /** 4598 * atapi_send_cdb - Write CDB bytes to hardware 4599 * @ap: Port to which ATAPI device is attached. 4600 * @qc: Taskfile currently active 4601 * 4602 * When device has indicated its readiness to accept 4603 * a CDB, this function is called. Send the CDB. 4604 * 4605 * LOCKING: 4606 * caller. 4607 */ 4608 4609 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc) 4610 { 4611 /* send SCSI cdb */ 4612 DPRINTK("send cdb\n"); 4613 WARN_ON(qc->dev->cdb_len < 12); 4614 4615 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1); 4616 ata_altstatus(ap); /* flush */ 4617 4618 switch (qc->tf.protocol) { 4619 case ATA_PROT_ATAPI: 4620 ap->hsm_task_state = HSM_ST; 4621 break; 4622 case ATA_PROT_ATAPI_NODATA: 4623 ap->hsm_task_state = HSM_ST_LAST; 4624 break; 4625 case ATA_PROT_ATAPI_DMA: 4626 ap->hsm_task_state = HSM_ST_LAST; 4627 /* initiate bmdma */ 4628 ap->ops->bmdma_start(qc); 4629 break; 4630 } 4631 } 4632 4633 /** 4634 * __atapi_pio_bytes - Transfer data from/to the ATAPI device. 4635 * @qc: Command on going 4636 * @bytes: number of bytes 4637 * 4638 * Transfer Transfer data from/to the ATAPI device. 4639 * 4640 * LOCKING: 4641 * Inherited from caller. 4642 * 4643 */ 4644 4645 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) 4646 { 4647 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); 4648 struct scatterlist *sg = qc->__sg; 4649 struct ata_port *ap = qc->ap; 4650 struct page *page; 4651 unsigned char *buf; 4652 unsigned int offset, count; 4653 4654 if (qc->curbytes + bytes >= qc->nbytes) 4655 ap->hsm_task_state = HSM_ST_LAST; 4656 4657 next_sg: 4658 if (unlikely(qc->cursg >= qc->n_elem)) { 4659 /* 4660 * The end of qc->sg is reached and the device expects 4661 * more data to transfer. In order not to overrun qc->sg 4662 * and fulfill length specified in the byte count register, 4663 * - for read case, discard trailing data from the device 4664 * - for write case, padding zero data to the device 4665 */ 4666 u16 pad_buf[1] = { 0 }; 4667 unsigned int words = bytes >> 1; 4668 unsigned int i; 4669 4670 if (words) /* warning if bytes > 1 */ 4671 ata_dev_printk(qc->dev, KERN_WARNING, 4672 "%u bytes trailing data\n", bytes); 4673 4674 for (i = 0; i < words; i++) 4675 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write); 4676 4677 ap->hsm_task_state = HSM_ST_LAST; 4678 return; 4679 } 4680 4681 sg = &qc->__sg[qc->cursg]; 4682 4683 page = sg->page; 4684 offset = sg->offset + qc->cursg_ofs; 4685 4686 /* get the current page and offset */ 4687 page = nth_page(page, (offset >> PAGE_SHIFT)); 4688 offset %= PAGE_SIZE; 4689 4690 /* don't overrun current sg */ 4691 count = min(sg->length - qc->cursg_ofs, bytes); 4692 4693 /* don't cross page boundaries */ 4694 count = min(count, (unsigned int)PAGE_SIZE - offset); 4695 4696 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); 4697 4698 if (PageHighMem(page)) { 4699 unsigned long flags; 4700 4701 /* FIXME: use bounce buffer */ 4702 local_irq_save(flags); 4703 buf = kmap_atomic(page, KM_IRQ0); 4704 4705 /* do the actual data transfer */ 4706 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); 4707 4708 kunmap_atomic(buf, KM_IRQ0); 4709 local_irq_restore(flags); 4710 } else { 4711 buf = page_address(page); 4712 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); 4713 } 4714 4715 bytes -= count; 4716 qc->curbytes += count; 4717 qc->cursg_ofs += count; 4718 4719 if (qc->cursg_ofs == sg->length) { 4720 qc->cursg++; 4721 qc->cursg_ofs = 0; 4722 } 4723 4724 if (bytes) 4725 goto next_sg; 4726 } 4727 4728 /** 4729 * atapi_pio_bytes - Transfer data from/to the ATAPI device. 4730 * @qc: Command on going 4731 * 4732 * Transfer Transfer data from/to the ATAPI device. 4733 * 4734 * LOCKING: 4735 * Inherited from caller. 4736 */ 4737 4738 static void atapi_pio_bytes(struct ata_queued_cmd *qc) 4739 { 4740 struct ata_port *ap = qc->ap; 4741 struct ata_device *dev = qc->dev; 4742 unsigned int ireason, bc_lo, bc_hi, bytes; 4743 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; 4744 4745 /* Abuse qc->result_tf for temp storage of intermediate TF 4746 * here to save some kernel stack usage. 4747 * For normal completion, qc->result_tf is not relevant. For 4748 * error, qc->result_tf is later overwritten by ata_qc_complete(). 4749 * So, the correctness of qc->result_tf is not affected. 4750 */ 4751 ap->ops->tf_read(ap, &qc->result_tf); 4752 ireason = qc->result_tf.nsect; 4753 bc_lo = qc->result_tf.lbam; 4754 bc_hi = qc->result_tf.lbah; 4755 bytes = (bc_hi << 8) | bc_lo; 4756 4757 /* shall be cleared to zero, indicating xfer of data */ 4758 if (ireason & (1 << 0)) 4759 goto err_out; 4760 4761 /* make sure transfer direction matches expected */ 4762 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; 4763 if (do_write != i_write) 4764 goto err_out; 4765 4766 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes); 4767 4768 __atapi_pio_bytes(qc, bytes); 4769 4770 return; 4771 4772 err_out: 4773 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n"); 4774 qc->err_mask |= AC_ERR_HSM; 4775 ap->hsm_task_state = HSM_ST_ERR; 4776 } 4777 4778 /** 4779 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue. 4780 * @ap: the target ata_port 4781 * @qc: qc on going 4782 * 4783 * RETURNS: 4784 * 1 if ok in workqueue, 0 otherwise. 4785 */ 4786 4787 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc) 4788 { 4789 if (qc->tf.flags & ATA_TFLAG_POLLING) 4790 return 1; 4791 4792 if (ap->hsm_task_state == HSM_ST_FIRST) { 4793 if (qc->tf.protocol == ATA_PROT_PIO && 4794 (qc->tf.flags & ATA_TFLAG_WRITE)) 4795 return 1; 4796 4797 if (is_atapi_taskfile(&qc->tf) && 4798 !(qc->dev->flags & ATA_DFLAG_CDB_INTR)) 4799 return 1; 4800 } 4801 4802 return 0; 4803 } 4804 4805 /** 4806 * ata_hsm_qc_complete - finish a qc running on standard HSM 4807 * @qc: Command to complete 4808 * @in_wq: 1 if called from workqueue, 0 otherwise 4809 * 4810 * Finish @qc which is running on standard HSM. 4811 * 4812 * LOCKING: 4813 * If @in_wq is zero, spin_lock_irqsave(host lock). 4814 * Otherwise, none on entry and grabs host lock. 4815 */ 4816 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq) 4817 { 4818 struct ata_port *ap = qc->ap; 4819 unsigned long flags; 4820 4821 if (ap->ops->error_handler) { 4822 if (in_wq) { 4823 spin_lock_irqsave(ap->lock, flags); 4824 4825 /* EH might have kicked in while host lock is 4826 * released. 4827 */ 4828 qc = ata_qc_from_tag(ap, qc->tag); 4829 if (qc) { 4830 if (likely(!(qc->err_mask & AC_ERR_HSM))) { 4831 ap->ops->irq_on(ap); 4832 ata_qc_complete(qc); 4833 } else 4834 ata_port_freeze(ap); 4835 } 4836 4837 spin_unlock_irqrestore(ap->lock, flags); 4838 } else { 4839 if (likely(!(qc->err_mask & AC_ERR_HSM))) 4840 ata_qc_complete(qc); 4841 else 4842 ata_port_freeze(ap); 4843 } 4844 } else { 4845 if (in_wq) { 4846 spin_lock_irqsave(ap->lock, flags); 4847 ap->ops->irq_on(ap); 4848 ata_qc_complete(qc); 4849 spin_unlock_irqrestore(ap->lock, flags); 4850 } else 4851 ata_qc_complete(qc); 4852 } 4853 } 4854 4855 /** 4856 * ata_hsm_move - move the HSM to the next state. 4857 * @ap: the target ata_port 4858 * @qc: qc on going 4859 * @status: current device status 4860 * @in_wq: 1 if called from workqueue, 0 otherwise 4861 * 4862 * RETURNS: 4863 * 1 when poll next status needed, 0 otherwise. 4864 */ 4865 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc, 4866 u8 status, int in_wq) 4867 { 4868 unsigned long flags = 0; 4869 int poll_next; 4870 4871 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0); 4872 4873 /* Make sure ata_qc_issue_prot() does not throw things 4874 * like DMA polling into the workqueue. Notice that 4875 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING). 4876 */ 4877 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc)); 4878 4879 fsm_start: 4880 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n", 4881 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status); 4882 4883 switch (ap->hsm_task_state) { 4884 case HSM_ST_FIRST: 4885 /* Send first data block or PACKET CDB */ 4886 4887 /* If polling, we will stay in the work queue after 4888 * sending the data. Otherwise, interrupt handler 4889 * takes over after sending the data. 4890 */ 4891 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING); 4892 4893 /* check device status */ 4894 if (unlikely((status & ATA_DRQ) == 0)) { 4895 /* handle BSY=0, DRQ=0 as error */ 4896 if (likely(status & (ATA_ERR | ATA_DF))) 4897 /* device stops HSM for abort/error */ 4898 qc->err_mask |= AC_ERR_DEV; 4899 else 4900 /* HSM violation. Let EH handle this */ 4901 qc->err_mask |= AC_ERR_HSM; 4902 4903 ap->hsm_task_state = HSM_ST_ERR; 4904 goto fsm_start; 4905 } 4906 4907 /* Device should not ask for data transfer (DRQ=1) 4908 * when it finds something wrong. 4909 * We ignore DRQ here and stop the HSM by 4910 * changing hsm_task_state to HSM_ST_ERR and 4911 * let the EH abort the command or reset the device. 4912 */ 4913 if (unlikely(status & (ATA_ERR | ATA_DF))) { 4914 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with device " 4915 "error, dev_stat 0x%X\n", status); 4916 qc->err_mask |= AC_ERR_HSM; 4917 ap->hsm_task_state = HSM_ST_ERR; 4918 goto fsm_start; 4919 } 4920 4921 /* Send the CDB (atapi) or the first data block (ata pio out). 4922 * During the state transition, interrupt handler shouldn't 4923 * be invoked before the data transfer is complete and 4924 * hsm_task_state is changed. Hence, the following locking. 4925 */ 4926 if (in_wq) 4927 spin_lock_irqsave(ap->lock, flags); 4928 4929 if (qc->tf.protocol == ATA_PROT_PIO) { 4930 /* PIO data out protocol. 4931 * send first data block. 4932 */ 4933 4934 /* ata_pio_sectors() might change the state 4935 * to HSM_ST_LAST. so, the state is changed here 4936 * before ata_pio_sectors(). 4937 */ 4938 ap->hsm_task_state = HSM_ST; 4939 ata_pio_sectors(qc); 4940 ata_altstatus(ap); /* flush */ 4941 } else 4942 /* send CDB */ 4943 atapi_send_cdb(ap, qc); 4944 4945 if (in_wq) 4946 spin_unlock_irqrestore(ap->lock, flags); 4947 4948 /* if polling, ata_pio_task() handles the rest. 4949 * otherwise, interrupt handler takes over from here. 4950 */ 4951 break; 4952 4953 case HSM_ST: 4954 /* complete command or read/write the data register */ 4955 if (qc->tf.protocol == ATA_PROT_ATAPI) { 4956 /* ATAPI PIO protocol */ 4957 if ((status & ATA_DRQ) == 0) { 4958 /* No more data to transfer or device error. 4959 * Device error will be tagged in HSM_ST_LAST. 4960 */ 4961 ap->hsm_task_state = HSM_ST_LAST; 4962 goto fsm_start; 4963 } 4964 4965 /* Device should not ask for data transfer (DRQ=1) 4966 * when it finds something wrong. 4967 * We ignore DRQ here and stop the HSM by 4968 * changing hsm_task_state to HSM_ST_ERR and 4969 * let the EH abort the command or reset the device. 4970 */ 4971 if (unlikely(status & (ATA_ERR | ATA_DF))) { 4972 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with " 4973 "device error, dev_stat 0x%X\n", 4974 status); 4975 qc->err_mask |= AC_ERR_HSM; 4976 ap->hsm_task_state = HSM_ST_ERR; 4977 goto fsm_start; 4978 } 4979 4980 atapi_pio_bytes(qc); 4981 4982 if (unlikely(ap->hsm_task_state == HSM_ST_ERR)) 4983 /* bad ireason reported by device */ 4984 goto fsm_start; 4985 4986 } else { 4987 /* ATA PIO protocol */ 4988 if (unlikely((status & ATA_DRQ) == 0)) { 4989 /* handle BSY=0, DRQ=0 as error */ 4990 if (likely(status & (ATA_ERR | ATA_DF))) 4991 /* device stops HSM for abort/error */ 4992 qc->err_mask |= AC_ERR_DEV; 4993 else 4994 /* HSM violation. Let EH handle this. 4995 * Phantom devices also trigger this 4996 * condition. Mark hint. 4997 */ 4998 qc->err_mask |= AC_ERR_HSM | 4999 AC_ERR_NODEV_HINT; 5000 5001 ap->hsm_task_state = HSM_ST_ERR; 5002 goto fsm_start; 5003 } 5004 5005 /* For PIO reads, some devices may ask for 5006 * data transfer (DRQ=1) alone with ERR=1. 5007 * We respect DRQ here and transfer one 5008 * block of junk data before changing the 5009 * hsm_task_state to HSM_ST_ERR. 5010 * 5011 * For PIO writes, ERR=1 DRQ=1 doesn't make 5012 * sense since the data block has been 5013 * transferred to the device. 5014 */ 5015 if (unlikely(status & (ATA_ERR | ATA_DF))) { 5016 /* data might be corrputed */ 5017 qc->err_mask |= AC_ERR_DEV; 5018 5019 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) { 5020 ata_pio_sectors(qc); 5021 ata_altstatus(ap); 5022 status = ata_wait_idle(ap); 5023 } 5024 5025 if (status & (ATA_BUSY | ATA_DRQ)) 5026 qc->err_mask |= AC_ERR_HSM; 5027 5028 /* ata_pio_sectors() might change the 5029 * state to HSM_ST_LAST. so, the state 5030 * is changed after ata_pio_sectors(). 5031 */ 5032 ap->hsm_task_state = HSM_ST_ERR; 5033 goto fsm_start; 5034 } 5035 5036 ata_pio_sectors(qc); 5037 5038 if (ap->hsm_task_state == HSM_ST_LAST && 5039 (!(qc->tf.flags & ATA_TFLAG_WRITE))) { 5040 /* all data read */ 5041 ata_altstatus(ap); 5042 status = ata_wait_idle(ap); 5043 goto fsm_start; 5044 } 5045 } 5046 5047 ata_altstatus(ap); /* flush */ 5048 poll_next = 1; 5049 break; 5050 5051 case HSM_ST_LAST: 5052 if (unlikely(!ata_ok(status))) { 5053 qc->err_mask |= __ac_err_mask(status); 5054 ap->hsm_task_state = HSM_ST_ERR; 5055 goto fsm_start; 5056 } 5057 5058 /* no more data to transfer */ 5059 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n", 5060 ap->print_id, qc->dev->devno, status); 5061 5062 WARN_ON(qc->err_mask); 5063 5064 ap->hsm_task_state = HSM_ST_IDLE; 5065 5066 /* complete taskfile transaction */ 5067 ata_hsm_qc_complete(qc, in_wq); 5068 5069 poll_next = 0; 5070 break; 5071 5072 case HSM_ST_ERR: 5073 /* make sure qc->err_mask is available to 5074 * know what's wrong and recover 5075 */ 5076 WARN_ON(qc->err_mask == 0); 5077 5078 ap->hsm_task_state = HSM_ST_IDLE; 5079 5080 /* complete taskfile transaction */ 5081 ata_hsm_qc_complete(qc, in_wq); 5082 5083 poll_next = 0; 5084 break; 5085 default: 5086 poll_next = 0; 5087 BUG(); 5088 } 5089 5090 return poll_next; 5091 } 5092 5093 static void ata_pio_task(struct work_struct *work) 5094 { 5095 struct ata_port *ap = 5096 container_of(work, struct ata_port, port_task.work); 5097 struct ata_queued_cmd *qc = ap->port_task_data; 5098 u8 status; 5099 int poll_next; 5100 5101 fsm_start: 5102 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE); 5103 5104 /* 5105 * This is purely heuristic. This is a fast path. 5106 * Sometimes when we enter, BSY will be cleared in 5107 * a chk-status or two. If not, the drive is probably seeking 5108 * or something. Snooze for a couple msecs, then 5109 * chk-status again. If still busy, queue delayed work. 5110 */ 5111 status = ata_busy_wait(ap, ATA_BUSY, 5); 5112 if (status & ATA_BUSY) { 5113 msleep(2); 5114 status = ata_busy_wait(ap, ATA_BUSY, 10); 5115 if (status & ATA_BUSY) { 5116 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE); 5117 return; 5118 } 5119 } 5120 5121 /* move the HSM */ 5122 poll_next = ata_hsm_move(ap, qc, status, 1); 5123 5124 /* another command or interrupt handler 5125 * may be running at this point. 5126 */ 5127 if (poll_next) 5128 goto fsm_start; 5129 } 5130 5131 /** 5132 * ata_qc_new - Request an available ATA command, for queueing 5133 * @ap: Port associated with device @dev 5134 * @dev: Device from whom we request an available command structure 5135 * 5136 * LOCKING: 5137 * None. 5138 */ 5139 5140 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) 5141 { 5142 struct ata_queued_cmd *qc = NULL; 5143 unsigned int i; 5144 5145 /* no command while frozen */ 5146 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN)) 5147 return NULL; 5148 5149 /* the last tag is reserved for internal command. */ 5150 for (i = 0; i < ATA_MAX_QUEUE - 1; i++) 5151 if (!test_and_set_bit(i, &ap->qc_allocated)) { 5152 qc = __ata_qc_from_tag(ap, i); 5153 break; 5154 } 5155 5156 if (qc) 5157 qc->tag = i; 5158 5159 return qc; 5160 } 5161 5162 /** 5163 * ata_qc_new_init - Request an available ATA command, and initialize it 5164 * @dev: Device from whom we request an available command structure 5165 * 5166 * LOCKING: 5167 * None. 5168 */ 5169 5170 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev) 5171 { 5172 struct ata_port *ap = dev->ap; 5173 struct ata_queued_cmd *qc; 5174 5175 qc = ata_qc_new(ap); 5176 if (qc) { 5177 qc->scsicmd = NULL; 5178 qc->ap = ap; 5179 qc->dev = dev; 5180 5181 ata_qc_reinit(qc); 5182 } 5183 5184 return qc; 5185 } 5186 5187 /** 5188 * ata_qc_free - free unused ata_queued_cmd 5189 * @qc: Command to complete 5190 * 5191 * Designed to free unused ata_queued_cmd object 5192 * in case something prevents using it. 5193 * 5194 * LOCKING: 5195 * spin_lock_irqsave(host lock) 5196 */ 5197 void ata_qc_free(struct ata_queued_cmd *qc) 5198 { 5199 struct ata_port *ap = qc->ap; 5200 unsigned int tag; 5201 5202 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ 5203 5204 qc->flags = 0; 5205 tag = qc->tag; 5206 if (likely(ata_tag_valid(tag))) { 5207 qc->tag = ATA_TAG_POISON; 5208 clear_bit(tag, &ap->qc_allocated); 5209 } 5210 } 5211 5212 void __ata_qc_complete(struct ata_queued_cmd *qc) 5213 { 5214 struct ata_port *ap = qc->ap; 5215 5216 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ 5217 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE)); 5218 5219 if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) 5220 ata_sg_clean(qc); 5221 5222 /* command should be marked inactive atomically with qc completion */ 5223 if (qc->tf.protocol == ATA_PROT_NCQ) 5224 ap->sactive &= ~(1 << qc->tag); 5225 else 5226 ap->active_tag = ATA_TAG_POISON; 5227 5228 /* atapi: mark qc as inactive to prevent the interrupt handler 5229 * from completing the command twice later, before the error handler 5230 * is called. (when rc != 0 and atapi request sense is needed) 5231 */ 5232 qc->flags &= ~ATA_QCFLAG_ACTIVE; 5233 ap->qc_active &= ~(1 << qc->tag); 5234 5235 /* call completion callback */ 5236 qc->complete_fn(qc); 5237 } 5238 5239 static void fill_result_tf(struct ata_queued_cmd *qc) 5240 { 5241 struct ata_port *ap = qc->ap; 5242 5243 qc->result_tf.flags = qc->tf.flags; 5244 ap->ops->tf_read(ap, &qc->result_tf); 5245 } 5246 5247 /** 5248 * ata_qc_complete - Complete an active ATA command 5249 * @qc: Command to complete 5250 * @err_mask: ATA Status register contents 5251 * 5252 * Indicate to the mid and upper layers that an ATA 5253 * command has completed, with either an ok or not-ok status. 5254 * 5255 * LOCKING: 5256 * spin_lock_irqsave(host lock) 5257 */ 5258 void ata_qc_complete(struct ata_queued_cmd *qc) 5259 { 5260 struct ata_port *ap = qc->ap; 5261 5262 /* XXX: New EH and old EH use different mechanisms to 5263 * synchronize EH with regular execution path. 5264 * 5265 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED. 5266 * Normal execution path is responsible for not accessing a 5267 * failed qc. libata core enforces the rule by returning NULL 5268 * from ata_qc_from_tag() for failed qcs. 5269 * 5270 * Old EH depends on ata_qc_complete() nullifying completion 5271 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does 5272 * not synchronize with interrupt handler. Only PIO task is 5273 * taken care of. 5274 */ 5275 if (ap->ops->error_handler) { 5276 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN); 5277 5278 if (unlikely(qc->err_mask)) 5279 qc->flags |= ATA_QCFLAG_FAILED; 5280 5281 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) { 5282 if (!ata_tag_internal(qc->tag)) { 5283 /* always fill result TF for failed qc */ 5284 fill_result_tf(qc); 5285 ata_qc_schedule_eh(qc); 5286 return; 5287 } 5288 } 5289 5290 /* read result TF if requested */ 5291 if (qc->flags & ATA_QCFLAG_RESULT_TF) 5292 fill_result_tf(qc); 5293 5294 __ata_qc_complete(qc); 5295 } else { 5296 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED) 5297 return; 5298 5299 /* read result TF if failed or requested */ 5300 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF) 5301 fill_result_tf(qc); 5302 5303 __ata_qc_complete(qc); 5304 } 5305 } 5306 5307 /** 5308 * ata_qc_complete_multiple - Complete multiple qcs successfully 5309 * @ap: port in question 5310 * @qc_active: new qc_active mask 5311 * @finish_qc: LLDD callback invoked before completing a qc 5312 * 5313 * Complete in-flight commands. This functions is meant to be 5314 * called from low-level driver's interrupt routine to complete 5315 * requests normally. ap->qc_active and @qc_active is compared 5316 * and commands are completed accordingly. 5317 * 5318 * LOCKING: 5319 * spin_lock_irqsave(host lock) 5320 * 5321 * RETURNS: 5322 * Number of completed commands on success, -errno otherwise. 5323 */ 5324 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active, 5325 void (*finish_qc)(struct ata_queued_cmd *)) 5326 { 5327 int nr_done = 0; 5328 u32 done_mask; 5329 int i; 5330 5331 done_mask = ap->qc_active ^ qc_active; 5332 5333 if (unlikely(done_mask & qc_active)) { 5334 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition " 5335 "(%08x->%08x)\n", ap->qc_active, qc_active); 5336 return -EINVAL; 5337 } 5338 5339 for (i = 0; i < ATA_MAX_QUEUE; i++) { 5340 struct ata_queued_cmd *qc; 5341 5342 if (!(done_mask & (1 << i))) 5343 continue; 5344 5345 if ((qc = ata_qc_from_tag(ap, i))) { 5346 if (finish_qc) 5347 finish_qc(qc); 5348 ata_qc_complete(qc); 5349 nr_done++; 5350 } 5351 } 5352 5353 return nr_done; 5354 } 5355 5356 static inline int ata_should_dma_map(struct ata_queued_cmd *qc) 5357 { 5358 struct ata_port *ap = qc->ap; 5359 5360 switch (qc->tf.protocol) { 5361 case ATA_PROT_NCQ: 5362 case ATA_PROT_DMA: 5363 case ATA_PROT_ATAPI_DMA: 5364 return 1; 5365 5366 case ATA_PROT_ATAPI: 5367 case ATA_PROT_PIO: 5368 if (ap->flags & ATA_FLAG_PIO_DMA) 5369 return 1; 5370 5371 /* fall through */ 5372 5373 default: 5374 return 0; 5375 } 5376 5377 /* never reached */ 5378 } 5379 5380 /** 5381 * ata_qc_issue - issue taskfile to device 5382 * @qc: command to issue to device 5383 * 5384 * Prepare an ATA command to submission to device. 5385 * This includes mapping the data into a DMA-able 5386 * area, filling in the S/G table, and finally 5387 * writing the taskfile to hardware, starting the command. 5388 * 5389 * LOCKING: 5390 * spin_lock_irqsave(host lock) 5391 */ 5392 void ata_qc_issue(struct ata_queued_cmd *qc) 5393 { 5394 struct ata_port *ap = qc->ap; 5395 5396 /* Make sure only one non-NCQ command is outstanding. The 5397 * check is skipped for old EH because it reuses active qc to 5398 * request ATAPI sense. 5399 */ 5400 WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag)); 5401 5402 if (qc->tf.protocol == ATA_PROT_NCQ) { 5403 WARN_ON(ap->sactive & (1 << qc->tag)); 5404 ap->sactive |= 1 << qc->tag; 5405 } else { 5406 WARN_ON(ap->sactive); 5407 ap->active_tag = qc->tag; 5408 } 5409 5410 qc->flags |= ATA_QCFLAG_ACTIVE; 5411 ap->qc_active |= 1 << qc->tag; 5412 5413 if (ata_should_dma_map(qc)) { 5414 if (qc->flags & ATA_QCFLAG_SG) { 5415 if (ata_sg_setup(qc)) 5416 goto sg_err; 5417 } else if (qc->flags & ATA_QCFLAG_SINGLE) { 5418 if (ata_sg_setup_one(qc)) 5419 goto sg_err; 5420 } 5421 } else { 5422 qc->flags &= ~ATA_QCFLAG_DMAMAP; 5423 } 5424 5425 ap->ops->qc_prep(qc); 5426 5427 qc->err_mask |= ap->ops->qc_issue(qc); 5428 if (unlikely(qc->err_mask)) 5429 goto err; 5430 return; 5431 5432 sg_err: 5433 qc->flags &= ~ATA_QCFLAG_DMAMAP; 5434 qc->err_mask |= AC_ERR_SYSTEM; 5435 err: 5436 ata_qc_complete(qc); 5437 } 5438 5439 /** 5440 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner 5441 * @qc: command to issue to device 5442 * 5443 * Using various libata functions and hooks, this function 5444 * starts an ATA command. ATA commands are grouped into 5445 * classes called "protocols", and issuing each type of protocol 5446 * is slightly different. 5447 * 5448 * May be used as the qc_issue() entry in ata_port_operations. 5449 * 5450 * LOCKING: 5451 * spin_lock_irqsave(host lock) 5452 * 5453 * RETURNS: 5454 * Zero on success, AC_ERR_* mask on failure 5455 */ 5456 5457 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc) 5458 { 5459 struct ata_port *ap = qc->ap; 5460 5461 /* Use polling pio if the LLD doesn't handle 5462 * interrupt driven pio and atapi CDB interrupt. 5463 */ 5464 if (ap->flags & ATA_FLAG_PIO_POLLING) { 5465 switch (qc->tf.protocol) { 5466 case ATA_PROT_PIO: 5467 case ATA_PROT_NODATA: 5468 case ATA_PROT_ATAPI: 5469 case ATA_PROT_ATAPI_NODATA: 5470 qc->tf.flags |= ATA_TFLAG_POLLING; 5471 break; 5472 case ATA_PROT_ATAPI_DMA: 5473 if (qc->dev->flags & ATA_DFLAG_CDB_INTR) 5474 /* see ata_dma_blacklisted() */ 5475 BUG(); 5476 break; 5477 default: 5478 break; 5479 } 5480 } 5481 5482 /* select the device */ 5483 ata_dev_select(ap, qc->dev->devno, 1, 0); 5484 5485 /* start the command */ 5486 switch (qc->tf.protocol) { 5487 case ATA_PROT_NODATA: 5488 if (qc->tf.flags & ATA_TFLAG_POLLING) 5489 ata_qc_set_polling(qc); 5490 5491 ata_tf_to_host(ap, &qc->tf); 5492 ap->hsm_task_state = HSM_ST_LAST; 5493 5494 if (qc->tf.flags & ATA_TFLAG_POLLING) 5495 ata_port_queue_task(ap, ata_pio_task, qc, 0); 5496 5497 break; 5498 5499 case ATA_PROT_DMA: 5500 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); 5501 5502 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ 5503 ap->ops->bmdma_setup(qc); /* set up bmdma */ 5504 ap->ops->bmdma_start(qc); /* initiate bmdma */ 5505 ap->hsm_task_state = HSM_ST_LAST; 5506 break; 5507 5508 case ATA_PROT_PIO: 5509 if (qc->tf.flags & ATA_TFLAG_POLLING) 5510 ata_qc_set_polling(qc); 5511 5512 ata_tf_to_host(ap, &qc->tf); 5513 5514 if (qc->tf.flags & ATA_TFLAG_WRITE) { 5515 /* PIO data out protocol */ 5516 ap->hsm_task_state = HSM_ST_FIRST; 5517 ata_port_queue_task(ap, ata_pio_task, qc, 0); 5518 5519 /* always send first data block using 5520 * the ata_pio_task() codepath. 5521 */ 5522 } else { 5523 /* PIO data in protocol */ 5524 ap->hsm_task_state = HSM_ST; 5525 5526 if (qc->tf.flags & ATA_TFLAG_POLLING) 5527 ata_port_queue_task(ap, ata_pio_task, qc, 0); 5528 5529 /* if polling, ata_pio_task() handles the rest. 5530 * otherwise, interrupt handler takes over from here. 5531 */ 5532 } 5533 5534 break; 5535 5536 case ATA_PROT_ATAPI: 5537 case ATA_PROT_ATAPI_NODATA: 5538 if (qc->tf.flags & ATA_TFLAG_POLLING) 5539 ata_qc_set_polling(qc); 5540 5541 ata_tf_to_host(ap, &qc->tf); 5542 5543 ap->hsm_task_state = HSM_ST_FIRST; 5544 5545 /* send cdb by polling if no cdb interrupt */ 5546 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) || 5547 (qc->tf.flags & ATA_TFLAG_POLLING)) 5548 ata_port_queue_task(ap, ata_pio_task, qc, 0); 5549 break; 5550 5551 case ATA_PROT_ATAPI_DMA: 5552 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); 5553 5554 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ 5555 ap->ops->bmdma_setup(qc); /* set up bmdma */ 5556 ap->hsm_task_state = HSM_ST_FIRST; 5557 5558 /* send cdb by polling if no cdb interrupt */ 5559 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) 5560 ata_port_queue_task(ap, ata_pio_task, qc, 0); 5561 break; 5562 5563 default: 5564 WARN_ON(1); 5565 return AC_ERR_SYSTEM; 5566 } 5567 5568 return 0; 5569 } 5570 5571 /** 5572 * ata_host_intr - Handle host interrupt for given (port, task) 5573 * @ap: Port on which interrupt arrived (possibly...) 5574 * @qc: Taskfile currently active in engine 5575 * 5576 * Handle host interrupt for given queued command. Currently, 5577 * only DMA interrupts are handled. All other commands are 5578 * handled via polling with interrupts disabled (nIEN bit). 5579 * 5580 * LOCKING: 5581 * spin_lock_irqsave(host lock) 5582 * 5583 * RETURNS: 5584 * One if interrupt was handled, zero if not (shared irq). 5585 */ 5586 5587 inline unsigned int ata_host_intr (struct ata_port *ap, 5588 struct ata_queued_cmd *qc) 5589 { 5590 struct ata_eh_info *ehi = &ap->eh_info; 5591 u8 status, host_stat = 0; 5592 5593 VPRINTK("ata%u: protocol %d task_state %d\n", 5594 ap->print_id, qc->tf.protocol, ap->hsm_task_state); 5595 5596 /* Check whether we are expecting interrupt in this state */ 5597 switch (ap->hsm_task_state) { 5598 case HSM_ST_FIRST: 5599 /* Some pre-ATAPI-4 devices assert INTRQ 5600 * at this state when ready to receive CDB. 5601 */ 5602 5603 /* Check the ATA_DFLAG_CDB_INTR flag is enough here. 5604 * The flag was turned on only for atapi devices. 5605 * No need to check is_atapi_taskfile(&qc->tf) again. 5606 */ 5607 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) 5608 goto idle_irq; 5609 break; 5610 case HSM_ST_LAST: 5611 if (qc->tf.protocol == ATA_PROT_DMA || 5612 qc->tf.protocol == ATA_PROT_ATAPI_DMA) { 5613 /* check status of DMA engine */ 5614 host_stat = ap->ops->bmdma_status(ap); 5615 VPRINTK("ata%u: host_stat 0x%X\n", 5616 ap->print_id, host_stat); 5617 5618 /* if it's not our irq... */ 5619 if (!(host_stat & ATA_DMA_INTR)) 5620 goto idle_irq; 5621 5622 /* before we do anything else, clear DMA-Start bit */ 5623 ap->ops->bmdma_stop(qc); 5624 5625 if (unlikely(host_stat & ATA_DMA_ERR)) { 5626 /* error when transfering data to/from memory */ 5627 qc->err_mask |= AC_ERR_HOST_BUS; 5628 ap->hsm_task_state = HSM_ST_ERR; 5629 } 5630 } 5631 break; 5632 case HSM_ST: 5633 break; 5634 default: 5635 goto idle_irq; 5636 } 5637 5638 /* check altstatus */ 5639 status = ata_altstatus(ap); 5640 if (status & ATA_BUSY) 5641 goto idle_irq; 5642 5643 /* check main status, clearing INTRQ */ 5644 status = ata_chk_status(ap); 5645 if (unlikely(status & ATA_BUSY)) 5646 goto idle_irq; 5647 5648 /* ack bmdma irq events */ 5649 ap->ops->irq_clear(ap); 5650 5651 ata_hsm_move(ap, qc, status, 0); 5652 5653 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA || 5654 qc->tf.protocol == ATA_PROT_ATAPI_DMA)) 5655 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat); 5656 5657 return 1; /* irq handled */ 5658 5659 idle_irq: 5660 ap->stats.idle_irq++; 5661 5662 #ifdef ATA_IRQ_TRAP 5663 if ((ap->stats.idle_irq % 1000) == 0) { 5664 ap->ops->irq_ack(ap, 0); /* debug trap */ 5665 ata_port_printk(ap, KERN_WARNING, "irq trap\n"); 5666 return 1; 5667 } 5668 #endif 5669 return 0; /* irq not handled */ 5670 } 5671 5672 /** 5673 * ata_interrupt - Default ATA host interrupt handler 5674 * @irq: irq line (unused) 5675 * @dev_instance: pointer to our ata_host information structure 5676 * 5677 * Default interrupt handler for PCI IDE devices. Calls 5678 * ata_host_intr() for each port that is not disabled. 5679 * 5680 * LOCKING: 5681 * Obtains host lock during operation. 5682 * 5683 * RETURNS: 5684 * IRQ_NONE or IRQ_HANDLED. 5685 */ 5686 5687 irqreturn_t ata_interrupt (int irq, void *dev_instance) 5688 { 5689 struct ata_host *host = dev_instance; 5690 unsigned int i; 5691 unsigned int handled = 0; 5692 unsigned long flags; 5693 5694 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ 5695 spin_lock_irqsave(&host->lock, flags); 5696 5697 for (i = 0; i < host->n_ports; i++) { 5698 struct ata_port *ap; 5699 5700 ap = host->ports[i]; 5701 if (ap && 5702 !(ap->flags & ATA_FLAG_DISABLED)) { 5703 struct ata_queued_cmd *qc; 5704 5705 qc = ata_qc_from_tag(ap, ap->active_tag); 5706 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && 5707 (qc->flags & ATA_QCFLAG_ACTIVE)) 5708 handled |= ata_host_intr(ap, qc); 5709 } 5710 } 5711 5712 spin_unlock_irqrestore(&host->lock, flags); 5713 5714 return IRQ_RETVAL(handled); 5715 } 5716 5717 /** 5718 * sata_scr_valid - test whether SCRs are accessible 5719 * @ap: ATA port to test SCR accessibility for 5720 * 5721 * Test whether SCRs are accessible for @ap. 5722 * 5723 * LOCKING: 5724 * None. 5725 * 5726 * RETURNS: 5727 * 1 if SCRs are accessible, 0 otherwise. 5728 */ 5729 int sata_scr_valid(struct ata_port *ap) 5730 { 5731 return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read; 5732 } 5733 5734 /** 5735 * sata_scr_read - read SCR register of the specified port 5736 * @ap: ATA port to read SCR for 5737 * @reg: SCR to read 5738 * @val: Place to store read value 5739 * 5740 * Read SCR register @reg of @ap into *@val. This function is 5741 * guaranteed to succeed if the cable type of the port is SATA 5742 * and the port implements ->scr_read. 5743 * 5744 * LOCKING: 5745 * None. 5746 * 5747 * RETURNS: 5748 * 0 on success, negative errno on failure. 5749 */ 5750 int sata_scr_read(struct ata_port *ap, int reg, u32 *val) 5751 { 5752 if (sata_scr_valid(ap)) 5753 return ap->ops->scr_read(ap, reg, val); 5754 return -EOPNOTSUPP; 5755 } 5756 5757 /** 5758 * sata_scr_write - write SCR register of the specified port 5759 * @ap: ATA port to write SCR for 5760 * @reg: SCR to write 5761 * @val: value to write 5762 * 5763 * Write @val to SCR register @reg of @ap. This function is 5764 * guaranteed to succeed if the cable type of the port is SATA 5765 * and the port implements ->scr_read. 5766 * 5767 * LOCKING: 5768 * None. 5769 * 5770 * RETURNS: 5771 * 0 on success, negative errno on failure. 5772 */ 5773 int sata_scr_write(struct ata_port *ap, int reg, u32 val) 5774 { 5775 if (sata_scr_valid(ap)) 5776 return ap->ops->scr_write(ap, reg, val); 5777 return -EOPNOTSUPP; 5778 } 5779 5780 /** 5781 * sata_scr_write_flush - write SCR register of the specified port and flush 5782 * @ap: ATA port to write SCR for 5783 * @reg: SCR to write 5784 * @val: value to write 5785 * 5786 * This function is identical to sata_scr_write() except that this 5787 * function performs flush after writing to the register. 5788 * 5789 * LOCKING: 5790 * None. 5791 * 5792 * RETURNS: 5793 * 0 on success, negative errno on failure. 5794 */ 5795 int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val) 5796 { 5797 int rc; 5798 5799 if (sata_scr_valid(ap)) { 5800 rc = ap->ops->scr_write(ap, reg, val); 5801 if (rc == 0) 5802 rc = ap->ops->scr_read(ap, reg, &val); 5803 return rc; 5804 } 5805 return -EOPNOTSUPP; 5806 } 5807 5808 /** 5809 * ata_port_online - test whether the given port is online 5810 * @ap: ATA port to test 5811 * 5812 * Test whether @ap is online. Note that this function returns 0 5813 * if online status of @ap cannot be obtained, so 5814 * ata_port_online(ap) != !ata_port_offline(ap). 5815 * 5816 * LOCKING: 5817 * None. 5818 * 5819 * RETURNS: 5820 * 1 if the port online status is available and online. 5821 */ 5822 int ata_port_online(struct ata_port *ap) 5823 { 5824 u32 sstatus; 5825 5826 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3) 5827 return 1; 5828 return 0; 5829 } 5830 5831 /** 5832 * ata_port_offline - test whether the given port is offline 5833 * @ap: ATA port to test 5834 * 5835 * Test whether @ap is offline. Note that this function returns 5836 * 0 if offline status of @ap cannot be obtained, so 5837 * ata_port_online(ap) != !ata_port_offline(ap). 5838 * 5839 * LOCKING: 5840 * None. 5841 * 5842 * RETURNS: 5843 * 1 if the port offline status is available and offline. 5844 */ 5845 int ata_port_offline(struct ata_port *ap) 5846 { 5847 u32 sstatus; 5848 5849 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3) 5850 return 1; 5851 return 0; 5852 } 5853 5854 int ata_flush_cache(struct ata_device *dev) 5855 { 5856 unsigned int err_mask; 5857 u8 cmd; 5858 5859 if (!ata_try_flush_cache(dev)) 5860 return 0; 5861 5862 if (dev->flags & ATA_DFLAG_FLUSH_EXT) 5863 cmd = ATA_CMD_FLUSH_EXT; 5864 else 5865 cmd = ATA_CMD_FLUSH; 5866 5867 err_mask = ata_do_simple_cmd(dev, cmd); 5868 if (err_mask) { 5869 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n"); 5870 return -EIO; 5871 } 5872 5873 return 0; 5874 } 5875 5876 #ifdef CONFIG_PM 5877 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg, 5878 unsigned int action, unsigned int ehi_flags, 5879 int wait) 5880 { 5881 unsigned long flags; 5882 int i, rc; 5883 5884 for (i = 0; i < host->n_ports; i++) { 5885 struct ata_port *ap = host->ports[i]; 5886 5887 /* Previous resume operation might still be in 5888 * progress. Wait for PM_PENDING to clear. 5889 */ 5890 if (ap->pflags & ATA_PFLAG_PM_PENDING) { 5891 ata_port_wait_eh(ap); 5892 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); 5893 } 5894 5895 /* request PM ops to EH */ 5896 spin_lock_irqsave(ap->lock, flags); 5897 5898 ap->pm_mesg = mesg; 5899 if (wait) { 5900 rc = 0; 5901 ap->pm_result = &rc; 5902 } 5903 5904 ap->pflags |= ATA_PFLAG_PM_PENDING; 5905 ap->eh_info.action |= action; 5906 ap->eh_info.flags |= ehi_flags; 5907 5908 ata_port_schedule_eh(ap); 5909 5910 spin_unlock_irqrestore(ap->lock, flags); 5911 5912 /* wait and check result */ 5913 if (wait) { 5914 ata_port_wait_eh(ap); 5915 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); 5916 if (rc) 5917 return rc; 5918 } 5919 } 5920 5921 return 0; 5922 } 5923 5924 /** 5925 * ata_host_suspend - suspend host 5926 * @host: host to suspend 5927 * @mesg: PM message 5928 * 5929 * Suspend @host. Actual operation is performed by EH. This 5930 * function requests EH to perform PM operations and waits for EH 5931 * to finish. 5932 * 5933 * LOCKING: 5934 * Kernel thread context (may sleep). 5935 * 5936 * RETURNS: 5937 * 0 on success, -errno on failure. 5938 */ 5939 int ata_host_suspend(struct ata_host *host, pm_message_t mesg) 5940 { 5941 int rc; 5942 5943 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1); 5944 if (rc == 0) 5945 host->dev->power.power_state = mesg; 5946 return rc; 5947 } 5948 5949 /** 5950 * ata_host_resume - resume host 5951 * @host: host to resume 5952 * 5953 * Resume @host. Actual operation is performed by EH. This 5954 * function requests EH to perform PM operations and returns. 5955 * Note that all resume operations are performed parallely. 5956 * 5957 * LOCKING: 5958 * Kernel thread context (may sleep). 5959 */ 5960 void ata_host_resume(struct ata_host *host) 5961 { 5962 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET, 5963 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0); 5964 host->dev->power.power_state = PMSG_ON; 5965 } 5966 #endif 5967 5968 /** 5969 * ata_port_start - Set port up for dma. 5970 * @ap: Port to initialize 5971 * 5972 * Called just after data structures for each port are 5973 * initialized. Allocates space for PRD table. 5974 * 5975 * May be used as the port_start() entry in ata_port_operations. 5976 * 5977 * LOCKING: 5978 * Inherited from caller. 5979 */ 5980 int ata_port_start(struct ata_port *ap) 5981 { 5982 struct device *dev = ap->dev; 5983 int rc; 5984 5985 ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, 5986 GFP_KERNEL); 5987 if (!ap->prd) 5988 return -ENOMEM; 5989 5990 rc = ata_pad_alloc(ap, dev); 5991 if (rc) 5992 return rc; 5993 5994 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, 5995 (unsigned long long)ap->prd_dma); 5996 return 0; 5997 } 5998 5999 /** 6000 * ata_dev_init - Initialize an ata_device structure 6001 * @dev: Device structure to initialize 6002 * 6003 * Initialize @dev in preparation for probing. 6004 * 6005 * LOCKING: 6006 * Inherited from caller. 6007 */ 6008 void ata_dev_init(struct ata_device *dev) 6009 { 6010 struct ata_port *ap = dev->ap; 6011 unsigned long flags; 6012 6013 /* SATA spd limit is bound to the first device */ 6014 ap->sata_spd_limit = ap->hw_sata_spd_limit; 6015 ap->sata_spd = 0; 6016 6017 /* High bits of dev->flags are used to record warm plug 6018 * requests which occur asynchronously. Synchronize using 6019 * host lock. 6020 */ 6021 spin_lock_irqsave(ap->lock, flags); 6022 dev->flags &= ~ATA_DFLAG_INIT_MASK; 6023 spin_unlock_irqrestore(ap->lock, flags); 6024 6025 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0, 6026 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET); 6027 dev->pio_mask = UINT_MAX; 6028 dev->mwdma_mask = UINT_MAX; 6029 dev->udma_mask = UINT_MAX; 6030 } 6031 6032 /** 6033 * ata_port_alloc - allocate and initialize basic ATA port resources 6034 * @host: ATA host this allocated port belongs to 6035 * 6036 * Allocate and initialize basic ATA port resources. 6037 * 6038 * RETURNS: 6039 * Allocate ATA port on success, NULL on failure. 6040 * 6041 * LOCKING: 6042 * Inherited from calling layer (may sleep). 6043 */ 6044 struct ata_port *ata_port_alloc(struct ata_host *host) 6045 { 6046 struct ata_port *ap; 6047 unsigned int i; 6048 6049 DPRINTK("ENTER\n"); 6050 6051 ap = kzalloc(sizeof(*ap), GFP_KERNEL); 6052 if (!ap) 6053 return NULL; 6054 6055 ap->pflags |= ATA_PFLAG_INITIALIZING; 6056 ap->lock = &host->lock; 6057 ap->flags = ATA_FLAG_DISABLED; 6058 ap->print_id = -1; 6059 ap->ctl = ATA_DEVCTL_OBS; 6060 ap->host = host; 6061 ap->dev = host->dev; 6062 6063 ap->hw_sata_spd_limit = UINT_MAX; 6064 ap->active_tag = ATA_TAG_POISON; 6065 ap->last_ctl = 0xFF; 6066 6067 #if defined(ATA_VERBOSE_DEBUG) 6068 /* turn on all debugging levels */ 6069 ap->msg_enable = 0x00FF; 6070 #elif defined(ATA_DEBUG) 6071 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR; 6072 #else 6073 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN; 6074 #endif 6075 6076 INIT_DELAYED_WORK(&ap->port_task, NULL); 6077 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug); 6078 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan); 6079 INIT_LIST_HEAD(&ap->eh_done_q); 6080 init_waitqueue_head(&ap->eh_wait_q); 6081 init_timer_deferrable(&ap->fastdrain_timer); 6082 ap->fastdrain_timer.function = ata_eh_fastdrain_timerfn; 6083 ap->fastdrain_timer.data = (unsigned long)ap; 6084 6085 ap->cbl = ATA_CBL_NONE; 6086 6087 for (i = 0; i < ATA_MAX_DEVICES; i++) { 6088 struct ata_device *dev = &ap->device[i]; 6089 dev->ap = ap; 6090 dev->devno = i; 6091 ata_dev_init(dev); 6092 } 6093 6094 #ifdef ATA_IRQ_TRAP 6095 ap->stats.unhandled_irq = 1; 6096 ap->stats.idle_irq = 1; 6097 #endif 6098 return ap; 6099 } 6100 6101 static void ata_host_release(struct device *gendev, void *res) 6102 { 6103 struct ata_host *host = dev_get_drvdata(gendev); 6104 int i; 6105 6106 for (i = 0; i < host->n_ports; i++) { 6107 struct ata_port *ap = host->ports[i]; 6108 6109 if (!ap) 6110 continue; 6111 6112 if ((host->flags & ATA_HOST_STARTED) && ap->ops->port_stop) 6113 ap->ops->port_stop(ap); 6114 } 6115 6116 if ((host->flags & ATA_HOST_STARTED) && host->ops->host_stop) 6117 host->ops->host_stop(host); 6118 6119 for (i = 0; i < host->n_ports; i++) { 6120 struct ata_port *ap = host->ports[i]; 6121 6122 if (!ap) 6123 continue; 6124 6125 if (ap->scsi_host) 6126 scsi_host_put(ap->scsi_host); 6127 6128 kfree(ap); 6129 host->ports[i] = NULL; 6130 } 6131 6132 dev_set_drvdata(gendev, NULL); 6133 } 6134 6135 /** 6136 * ata_host_alloc - allocate and init basic ATA host resources 6137 * @dev: generic device this host is associated with 6138 * @max_ports: maximum number of ATA ports associated with this host 6139 * 6140 * Allocate and initialize basic ATA host resources. LLD calls 6141 * this function to allocate a host, initializes it fully and 6142 * attaches it using ata_host_register(). 6143 * 6144 * @max_ports ports are allocated and host->n_ports is 6145 * initialized to @max_ports. The caller is allowed to decrease 6146 * host->n_ports before calling ata_host_register(). The unused 6147 * ports will be automatically freed on registration. 6148 * 6149 * RETURNS: 6150 * Allocate ATA host on success, NULL on failure. 6151 * 6152 * LOCKING: 6153 * Inherited from calling layer (may sleep). 6154 */ 6155 struct ata_host *ata_host_alloc(struct device *dev, int max_ports) 6156 { 6157 struct ata_host *host; 6158 size_t sz; 6159 int i; 6160 6161 DPRINTK("ENTER\n"); 6162 6163 if (!devres_open_group(dev, NULL, GFP_KERNEL)) 6164 return NULL; 6165 6166 /* alloc a container for our list of ATA ports (buses) */ 6167 sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *); 6168 /* alloc a container for our list of ATA ports (buses) */ 6169 host = devres_alloc(ata_host_release, sz, GFP_KERNEL); 6170 if (!host) 6171 goto err_out; 6172 6173 devres_add(dev, host); 6174 dev_set_drvdata(dev, host); 6175 6176 spin_lock_init(&host->lock); 6177 host->dev = dev; 6178 host->n_ports = max_ports; 6179 6180 /* allocate ports bound to this host */ 6181 for (i = 0; i < max_ports; i++) { 6182 struct ata_port *ap; 6183 6184 ap = ata_port_alloc(host); 6185 if (!ap) 6186 goto err_out; 6187 6188 ap->port_no = i; 6189 host->ports[i] = ap; 6190 } 6191 6192 devres_remove_group(dev, NULL); 6193 return host; 6194 6195 err_out: 6196 devres_release_group(dev, NULL); 6197 return NULL; 6198 } 6199 6200 /** 6201 * ata_host_alloc_pinfo - alloc host and init with port_info array 6202 * @dev: generic device this host is associated with 6203 * @ppi: array of ATA port_info to initialize host with 6204 * @n_ports: number of ATA ports attached to this host 6205 * 6206 * Allocate ATA host and initialize with info from @ppi. If NULL 6207 * terminated, @ppi may contain fewer entries than @n_ports. The 6208 * last entry will be used for the remaining ports. 6209 * 6210 * RETURNS: 6211 * Allocate ATA host on success, NULL on failure. 6212 * 6213 * LOCKING: 6214 * Inherited from calling layer (may sleep). 6215 */ 6216 struct ata_host *ata_host_alloc_pinfo(struct device *dev, 6217 const struct ata_port_info * const * ppi, 6218 int n_ports) 6219 { 6220 const struct ata_port_info *pi; 6221 struct ata_host *host; 6222 int i, j; 6223 6224 host = ata_host_alloc(dev, n_ports); 6225 if (!host) 6226 return NULL; 6227 6228 for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) { 6229 struct ata_port *ap = host->ports[i]; 6230 6231 if (ppi[j]) 6232 pi = ppi[j++]; 6233 6234 ap->pio_mask = pi->pio_mask; 6235 ap->mwdma_mask = pi->mwdma_mask; 6236 ap->udma_mask = pi->udma_mask; 6237 ap->flags |= pi->flags; 6238 ap->ops = pi->port_ops; 6239 6240 if (!host->ops && (pi->port_ops != &ata_dummy_port_ops)) 6241 host->ops = pi->port_ops; 6242 if (!host->private_data && pi->private_data) 6243 host->private_data = pi->private_data; 6244 } 6245 6246 return host; 6247 } 6248 6249 /** 6250 * ata_host_start - start and freeze ports of an ATA host 6251 * @host: ATA host to start ports for 6252 * 6253 * Start and then freeze ports of @host. Started status is 6254 * recorded in host->flags, so this function can be called 6255 * multiple times. Ports are guaranteed to get started only 6256 * once. If host->ops isn't initialized yet, its set to the 6257 * first non-dummy port ops. 6258 * 6259 * LOCKING: 6260 * Inherited from calling layer (may sleep). 6261 * 6262 * RETURNS: 6263 * 0 if all ports are started successfully, -errno otherwise. 6264 */ 6265 int ata_host_start(struct ata_host *host) 6266 { 6267 int i, rc; 6268 6269 if (host->flags & ATA_HOST_STARTED) 6270 return 0; 6271 6272 for (i = 0; i < host->n_ports; i++) { 6273 struct ata_port *ap = host->ports[i]; 6274 6275 if (!host->ops && !ata_port_is_dummy(ap)) 6276 host->ops = ap->ops; 6277 6278 if (ap->ops->port_start) { 6279 rc = ap->ops->port_start(ap); 6280 if (rc) { 6281 ata_port_printk(ap, KERN_ERR, "failed to " 6282 "start port (errno=%d)\n", rc); 6283 goto err_out; 6284 } 6285 } 6286 6287 ata_eh_freeze_port(ap); 6288 } 6289 6290 host->flags |= ATA_HOST_STARTED; 6291 return 0; 6292 6293 err_out: 6294 while (--i >= 0) { 6295 struct ata_port *ap = host->ports[i]; 6296 6297 if (ap->ops->port_stop) 6298 ap->ops->port_stop(ap); 6299 } 6300 return rc; 6301 } 6302 6303 /** 6304 * ata_sas_host_init - Initialize a host struct 6305 * @host: host to initialize 6306 * @dev: device host is attached to 6307 * @flags: host flags 6308 * @ops: port_ops 6309 * 6310 * LOCKING: 6311 * PCI/etc. bus probe sem. 6312 * 6313 */ 6314 /* KILLME - the only user left is ipr */ 6315 void ata_host_init(struct ata_host *host, struct device *dev, 6316 unsigned long flags, const struct ata_port_operations *ops) 6317 { 6318 spin_lock_init(&host->lock); 6319 host->dev = dev; 6320 host->flags = flags; 6321 host->ops = ops; 6322 } 6323 6324 /** 6325 * ata_host_register - register initialized ATA host 6326 * @host: ATA host to register 6327 * @sht: template for SCSI host 6328 * 6329 * Register initialized ATA host. @host is allocated using 6330 * ata_host_alloc() and fully initialized by LLD. This function 6331 * starts ports, registers @host with ATA and SCSI layers and 6332 * probe registered devices. 6333 * 6334 * LOCKING: 6335 * Inherited from calling layer (may sleep). 6336 * 6337 * RETURNS: 6338 * 0 on success, -errno otherwise. 6339 */ 6340 int ata_host_register(struct ata_host *host, struct scsi_host_template *sht) 6341 { 6342 int i, rc; 6343 6344 /* host must have been started */ 6345 if (!(host->flags & ATA_HOST_STARTED)) { 6346 dev_printk(KERN_ERR, host->dev, 6347 "BUG: trying to register unstarted host\n"); 6348 WARN_ON(1); 6349 return -EINVAL; 6350 } 6351 6352 /* Blow away unused ports. This happens when LLD can't 6353 * determine the exact number of ports to allocate at 6354 * allocation time. 6355 */ 6356 for (i = host->n_ports; host->ports[i]; i++) 6357 kfree(host->ports[i]); 6358 6359 /* give ports names and add SCSI hosts */ 6360 for (i = 0; i < host->n_ports; i++) 6361 host->ports[i]->print_id = ata_print_id++; 6362 6363 rc = ata_scsi_add_hosts(host, sht); 6364 if (rc) 6365 return rc; 6366 6367 /* associate with ACPI nodes */ 6368 ata_acpi_associate(host); 6369 6370 /* set cable, sata_spd_limit and report */ 6371 for (i = 0; i < host->n_ports; i++) { 6372 struct ata_port *ap = host->ports[i]; 6373 int irq_line; 6374 u32 scontrol; 6375 unsigned long xfer_mask; 6376 6377 /* set SATA cable type if still unset */ 6378 if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA)) 6379 ap->cbl = ATA_CBL_SATA; 6380 6381 /* init sata_spd_limit to the current value */ 6382 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) { 6383 int spd = (scontrol >> 4) & 0xf; 6384 if (spd) 6385 ap->hw_sata_spd_limit &= (1 << spd) - 1; 6386 } 6387 ap->sata_spd_limit = ap->hw_sata_spd_limit; 6388 6389 /* report the secondary IRQ for second channel legacy */ 6390 irq_line = host->irq; 6391 if (i == 1 && host->irq2) 6392 irq_line = host->irq2; 6393 6394 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask, 6395 ap->udma_mask); 6396 6397 /* print per-port info to dmesg */ 6398 if (!ata_port_is_dummy(ap)) 6399 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%p " 6400 "ctl 0x%p bmdma 0x%p irq %d\n", 6401 (ap->flags & ATA_FLAG_SATA) ? 'S' : 'P', 6402 ata_mode_string(xfer_mask), 6403 ap->ioaddr.cmd_addr, 6404 ap->ioaddr.ctl_addr, 6405 ap->ioaddr.bmdma_addr, 6406 irq_line); 6407 else 6408 ata_port_printk(ap, KERN_INFO, "DUMMY\n"); 6409 } 6410 6411 /* perform each probe synchronously */ 6412 DPRINTK("probe begin\n"); 6413 for (i = 0; i < host->n_ports; i++) { 6414 struct ata_port *ap = host->ports[i]; 6415 int rc; 6416 6417 /* probe */ 6418 if (ap->ops->error_handler) { 6419 struct ata_eh_info *ehi = &ap->eh_info; 6420 unsigned long flags; 6421 6422 ata_port_probe(ap); 6423 6424 /* kick EH for boot probing */ 6425 spin_lock_irqsave(ap->lock, flags); 6426 6427 ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1; 6428 ehi->action |= ATA_EH_SOFTRESET; 6429 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET; 6430 6431 ap->pflags &= ~ATA_PFLAG_INITIALIZING; 6432 ap->pflags |= ATA_PFLAG_LOADING; 6433 ata_port_schedule_eh(ap); 6434 6435 spin_unlock_irqrestore(ap->lock, flags); 6436 6437 /* wait for EH to finish */ 6438 ata_port_wait_eh(ap); 6439 } else { 6440 DPRINTK("ata%u: bus probe begin\n", ap->print_id); 6441 rc = ata_bus_probe(ap); 6442 DPRINTK("ata%u: bus probe end\n", ap->print_id); 6443 6444 if (rc) { 6445 /* FIXME: do something useful here? 6446 * Current libata behavior will 6447 * tear down everything when 6448 * the module is removed 6449 * or the h/w is unplugged. 6450 */ 6451 } 6452 } 6453 } 6454 6455 /* probes are done, now scan each port's disk(s) */ 6456 DPRINTK("host probe begin\n"); 6457 for (i = 0; i < host->n_ports; i++) { 6458 struct ata_port *ap = host->ports[i]; 6459 6460 ata_scsi_scan_host(ap, 1); 6461 } 6462 6463 return 0; 6464 } 6465 6466 /** 6467 * ata_host_activate - start host, request IRQ and register it 6468 * @host: target ATA host 6469 * @irq: IRQ to request 6470 * @irq_handler: irq_handler used when requesting IRQ 6471 * @irq_flags: irq_flags used when requesting IRQ 6472 * @sht: scsi_host_template to use when registering the host 6473 * 6474 * After allocating an ATA host and initializing it, most libata 6475 * LLDs perform three steps to activate the host - start host, 6476 * request IRQ and register it. This helper takes necessasry 6477 * arguments and performs the three steps in one go. 6478 * 6479 * LOCKING: 6480 * Inherited from calling layer (may sleep). 6481 * 6482 * RETURNS: 6483 * 0 on success, -errno otherwise. 6484 */ 6485 int ata_host_activate(struct ata_host *host, int irq, 6486 irq_handler_t irq_handler, unsigned long irq_flags, 6487 struct scsi_host_template *sht) 6488 { 6489 int rc; 6490 6491 rc = ata_host_start(host); 6492 if (rc) 6493 return rc; 6494 6495 rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags, 6496 dev_driver_string(host->dev), host); 6497 if (rc) 6498 return rc; 6499 6500 /* Used to print device info at probe */ 6501 host->irq = irq; 6502 6503 rc = ata_host_register(host, sht); 6504 /* if failed, just free the IRQ and leave ports alone */ 6505 if (rc) 6506 devm_free_irq(host->dev, irq, host); 6507 6508 return rc; 6509 } 6510 6511 /** 6512 * ata_port_detach - Detach ATA port in prepration of device removal 6513 * @ap: ATA port to be detached 6514 * 6515 * Detach all ATA devices and the associated SCSI devices of @ap; 6516 * then, remove the associated SCSI host. @ap is guaranteed to 6517 * be quiescent on return from this function. 6518 * 6519 * LOCKING: 6520 * Kernel thread context (may sleep). 6521 */ 6522 void ata_port_detach(struct ata_port *ap) 6523 { 6524 unsigned long flags; 6525 int i; 6526 6527 if (!ap->ops->error_handler) 6528 goto skip_eh; 6529 6530 /* tell EH we're leaving & flush EH */ 6531 spin_lock_irqsave(ap->lock, flags); 6532 ap->pflags |= ATA_PFLAG_UNLOADING; 6533 spin_unlock_irqrestore(ap->lock, flags); 6534 6535 ata_port_wait_eh(ap); 6536 6537 /* EH is now guaranteed to see UNLOADING, so no new device 6538 * will be attached. Disable all existing devices. 6539 */ 6540 spin_lock_irqsave(ap->lock, flags); 6541 6542 for (i = 0; i < ATA_MAX_DEVICES; i++) 6543 ata_dev_disable(&ap->device[i]); 6544 6545 spin_unlock_irqrestore(ap->lock, flags); 6546 6547 /* Final freeze & EH. All in-flight commands are aborted. EH 6548 * will be skipped and retrials will be terminated with bad 6549 * target. 6550 */ 6551 spin_lock_irqsave(ap->lock, flags); 6552 ata_port_freeze(ap); /* won't be thawed */ 6553 spin_unlock_irqrestore(ap->lock, flags); 6554 6555 ata_port_wait_eh(ap); 6556 cancel_rearming_delayed_work(&ap->hotplug_task); 6557 6558 skip_eh: 6559 /* remove the associated SCSI host */ 6560 scsi_remove_host(ap->scsi_host); 6561 } 6562 6563 /** 6564 * ata_host_detach - Detach all ports of an ATA host 6565 * @host: Host to detach 6566 * 6567 * Detach all ports of @host. 6568 * 6569 * LOCKING: 6570 * Kernel thread context (may sleep). 6571 */ 6572 void ata_host_detach(struct ata_host *host) 6573 { 6574 int i; 6575 6576 for (i = 0; i < host->n_ports; i++) 6577 ata_port_detach(host->ports[i]); 6578 } 6579 6580 /** 6581 * ata_std_ports - initialize ioaddr with standard port offsets. 6582 * @ioaddr: IO address structure to be initialized 6583 * 6584 * Utility function which initializes data_addr, error_addr, 6585 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, 6586 * device_addr, status_addr, and command_addr to standard offsets 6587 * relative to cmd_addr. 6588 * 6589 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. 6590 */ 6591 6592 void ata_std_ports(struct ata_ioports *ioaddr) 6593 { 6594 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; 6595 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; 6596 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; 6597 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; 6598 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; 6599 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; 6600 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; 6601 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; 6602 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; 6603 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; 6604 } 6605 6606 6607 #ifdef CONFIG_PCI 6608 6609 /** 6610 * ata_pci_remove_one - PCI layer callback for device removal 6611 * @pdev: PCI device that was removed 6612 * 6613 * PCI layer indicates to libata via this hook that hot-unplug or 6614 * module unload event has occurred. Detach all ports. Resource 6615 * release is handled via devres. 6616 * 6617 * LOCKING: 6618 * Inherited from PCI layer (may sleep). 6619 */ 6620 void ata_pci_remove_one(struct pci_dev *pdev) 6621 { 6622 struct device *dev = pci_dev_to_dev(pdev); 6623 struct ata_host *host = dev_get_drvdata(dev); 6624 6625 ata_host_detach(host); 6626 } 6627 6628 /* move to PCI subsystem */ 6629 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits) 6630 { 6631 unsigned long tmp = 0; 6632 6633 switch (bits->width) { 6634 case 1: { 6635 u8 tmp8 = 0; 6636 pci_read_config_byte(pdev, bits->reg, &tmp8); 6637 tmp = tmp8; 6638 break; 6639 } 6640 case 2: { 6641 u16 tmp16 = 0; 6642 pci_read_config_word(pdev, bits->reg, &tmp16); 6643 tmp = tmp16; 6644 break; 6645 } 6646 case 4: { 6647 u32 tmp32 = 0; 6648 pci_read_config_dword(pdev, bits->reg, &tmp32); 6649 tmp = tmp32; 6650 break; 6651 } 6652 6653 default: 6654 return -EINVAL; 6655 } 6656 6657 tmp &= bits->mask; 6658 6659 return (tmp == bits->val) ? 1 : 0; 6660 } 6661 6662 #ifdef CONFIG_PM 6663 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg) 6664 { 6665 pci_save_state(pdev); 6666 pci_disable_device(pdev); 6667 6668 if (mesg.event == PM_EVENT_SUSPEND) 6669 pci_set_power_state(pdev, PCI_D3hot); 6670 } 6671 6672 int ata_pci_device_do_resume(struct pci_dev *pdev) 6673 { 6674 int rc; 6675 6676 pci_set_power_state(pdev, PCI_D0); 6677 pci_restore_state(pdev); 6678 6679 rc = pcim_enable_device(pdev); 6680 if (rc) { 6681 dev_printk(KERN_ERR, &pdev->dev, 6682 "failed to enable device after resume (%d)\n", rc); 6683 return rc; 6684 } 6685 6686 pci_set_master(pdev); 6687 return 0; 6688 } 6689 6690 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) 6691 { 6692 struct ata_host *host = dev_get_drvdata(&pdev->dev); 6693 int rc = 0; 6694 6695 rc = ata_host_suspend(host, mesg); 6696 if (rc) 6697 return rc; 6698 6699 ata_pci_device_do_suspend(pdev, mesg); 6700 6701 return 0; 6702 } 6703 6704 int ata_pci_device_resume(struct pci_dev *pdev) 6705 { 6706 struct ata_host *host = dev_get_drvdata(&pdev->dev); 6707 int rc; 6708 6709 rc = ata_pci_device_do_resume(pdev); 6710 if (rc == 0) 6711 ata_host_resume(host); 6712 return rc; 6713 } 6714 #endif /* CONFIG_PM */ 6715 6716 #endif /* CONFIG_PCI */ 6717 6718 6719 static int __init ata_init(void) 6720 { 6721 ata_probe_timeout *= HZ; 6722 ata_wq = create_workqueue("ata"); 6723 if (!ata_wq) 6724 return -ENOMEM; 6725 6726 ata_aux_wq = create_singlethread_workqueue("ata_aux"); 6727 if (!ata_aux_wq) { 6728 destroy_workqueue(ata_wq); 6729 return -ENOMEM; 6730 } 6731 6732 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); 6733 return 0; 6734 } 6735 6736 static void __exit ata_exit(void) 6737 { 6738 destroy_workqueue(ata_wq); 6739 destroy_workqueue(ata_aux_wq); 6740 } 6741 6742 subsys_initcall(ata_init); 6743 module_exit(ata_exit); 6744 6745 static unsigned long ratelimit_time; 6746 static DEFINE_SPINLOCK(ata_ratelimit_lock); 6747 6748 int ata_ratelimit(void) 6749 { 6750 int rc; 6751 unsigned long flags; 6752 6753 spin_lock_irqsave(&ata_ratelimit_lock, flags); 6754 6755 if (time_after(jiffies, ratelimit_time)) { 6756 rc = 1; 6757 ratelimit_time = jiffies + (HZ/5); 6758 } else 6759 rc = 0; 6760 6761 spin_unlock_irqrestore(&ata_ratelimit_lock, flags); 6762 6763 return rc; 6764 } 6765 6766 /** 6767 * ata_wait_register - wait until register value changes 6768 * @reg: IO-mapped register 6769 * @mask: Mask to apply to read register value 6770 * @val: Wait condition 6771 * @interval_msec: polling interval in milliseconds 6772 * @timeout_msec: timeout in milliseconds 6773 * 6774 * Waiting for some bits of register to change is a common 6775 * operation for ATA controllers. This function reads 32bit LE 6776 * IO-mapped register @reg and tests for the following condition. 6777 * 6778 * (*@reg & mask) != val 6779 * 6780 * If the condition is met, it returns; otherwise, the process is 6781 * repeated after @interval_msec until timeout. 6782 * 6783 * LOCKING: 6784 * Kernel thread context (may sleep) 6785 * 6786 * RETURNS: 6787 * The final register value. 6788 */ 6789 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, 6790 unsigned long interval_msec, 6791 unsigned long timeout_msec) 6792 { 6793 unsigned long timeout; 6794 u32 tmp; 6795 6796 tmp = ioread32(reg); 6797 6798 /* Calculate timeout _after_ the first read to make sure 6799 * preceding writes reach the controller before starting to 6800 * eat away the timeout. 6801 */ 6802 timeout = jiffies + (timeout_msec * HZ) / 1000; 6803 6804 while ((tmp & mask) == val && time_before(jiffies, timeout)) { 6805 msleep(interval_msec); 6806 tmp = ioread32(reg); 6807 } 6808 6809 return tmp; 6810 } 6811 6812 /* 6813 * Dummy port_ops 6814 */ 6815 static void ata_dummy_noret(struct ata_port *ap) { } 6816 static int ata_dummy_ret0(struct ata_port *ap) { return 0; } 6817 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { } 6818 6819 static u8 ata_dummy_check_status(struct ata_port *ap) 6820 { 6821 return ATA_DRDY; 6822 } 6823 6824 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc) 6825 { 6826 return AC_ERR_SYSTEM; 6827 } 6828 6829 const struct ata_port_operations ata_dummy_port_ops = { 6830 .port_disable = ata_port_disable, 6831 .check_status = ata_dummy_check_status, 6832 .check_altstatus = ata_dummy_check_status, 6833 .dev_select = ata_noop_dev_select, 6834 .qc_prep = ata_noop_qc_prep, 6835 .qc_issue = ata_dummy_qc_issue, 6836 .freeze = ata_dummy_noret, 6837 .thaw = ata_dummy_noret, 6838 .error_handler = ata_dummy_noret, 6839 .post_internal_cmd = ata_dummy_qc_noret, 6840 .irq_clear = ata_dummy_noret, 6841 .port_start = ata_dummy_ret0, 6842 .port_stop = ata_dummy_noret, 6843 }; 6844 6845 const struct ata_port_info ata_dummy_port_info = { 6846 .port_ops = &ata_dummy_port_ops, 6847 }; 6848 6849 /* 6850 * libata is essentially a library of internal helper functions for 6851 * low-level ATA host controller drivers. As such, the API/ABI is 6852 * likely to change as new drivers are added and updated. 6853 * Do not depend on ABI/API stability. 6854 */ 6855 6856 EXPORT_SYMBOL_GPL(sata_deb_timing_normal); 6857 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug); 6858 EXPORT_SYMBOL_GPL(sata_deb_timing_long); 6859 EXPORT_SYMBOL_GPL(ata_dummy_port_ops); 6860 EXPORT_SYMBOL_GPL(ata_dummy_port_info); 6861 EXPORT_SYMBOL_GPL(ata_std_bios_param); 6862 EXPORT_SYMBOL_GPL(ata_std_ports); 6863 EXPORT_SYMBOL_GPL(ata_host_init); 6864 EXPORT_SYMBOL_GPL(ata_host_alloc); 6865 EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo); 6866 EXPORT_SYMBOL_GPL(ata_host_start); 6867 EXPORT_SYMBOL_GPL(ata_host_register); 6868 EXPORT_SYMBOL_GPL(ata_host_activate); 6869 EXPORT_SYMBOL_GPL(ata_host_detach); 6870 EXPORT_SYMBOL_GPL(ata_sg_init); 6871 EXPORT_SYMBOL_GPL(ata_sg_init_one); 6872 EXPORT_SYMBOL_GPL(ata_hsm_move); 6873 EXPORT_SYMBOL_GPL(ata_qc_complete); 6874 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple); 6875 EXPORT_SYMBOL_GPL(ata_qc_issue_prot); 6876 EXPORT_SYMBOL_GPL(ata_tf_load); 6877 EXPORT_SYMBOL_GPL(ata_tf_read); 6878 EXPORT_SYMBOL_GPL(ata_noop_dev_select); 6879 EXPORT_SYMBOL_GPL(ata_std_dev_select); 6880 EXPORT_SYMBOL_GPL(sata_print_link_status); 6881 EXPORT_SYMBOL_GPL(ata_tf_to_fis); 6882 EXPORT_SYMBOL_GPL(ata_tf_from_fis); 6883 EXPORT_SYMBOL_GPL(ata_check_status); 6884 EXPORT_SYMBOL_GPL(ata_altstatus); 6885 EXPORT_SYMBOL_GPL(ata_exec_command); 6886 EXPORT_SYMBOL_GPL(ata_port_start); 6887 EXPORT_SYMBOL_GPL(ata_sff_port_start); 6888 EXPORT_SYMBOL_GPL(ata_interrupt); 6889 EXPORT_SYMBOL_GPL(ata_do_set_mode); 6890 EXPORT_SYMBOL_GPL(ata_data_xfer); 6891 EXPORT_SYMBOL_GPL(ata_data_xfer_noirq); 6892 EXPORT_SYMBOL_GPL(ata_qc_prep); 6893 EXPORT_SYMBOL_GPL(ata_dumb_qc_prep); 6894 EXPORT_SYMBOL_GPL(ata_noop_qc_prep); 6895 EXPORT_SYMBOL_GPL(ata_bmdma_setup); 6896 EXPORT_SYMBOL_GPL(ata_bmdma_start); 6897 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); 6898 EXPORT_SYMBOL_GPL(ata_bmdma_status); 6899 EXPORT_SYMBOL_GPL(ata_bmdma_stop); 6900 EXPORT_SYMBOL_GPL(ata_bmdma_freeze); 6901 EXPORT_SYMBOL_GPL(ata_bmdma_thaw); 6902 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh); 6903 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler); 6904 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd); 6905 EXPORT_SYMBOL_GPL(ata_port_probe); 6906 EXPORT_SYMBOL_GPL(ata_dev_disable); 6907 EXPORT_SYMBOL_GPL(sata_set_spd); 6908 EXPORT_SYMBOL_GPL(sata_phy_debounce); 6909 EXPORT_SYMBOL_GPL(sata_phy_resume); 6910 EXPORT_SYMBOL_GPL(sata_phy_reset); 6911 EXPORT_SYMBOL_GPL(__sata_phy_reset); 6912 EXPORT_SYMBOL_GPL(ata_bus_reset); 6913 EXPORT_SYMBOL_GPL(ata_std_prereset); 6914 EXPORT_SYMBOL_GPL(ata_std_softreset); 6915 EXPORT_SYMBOL_GPL(sata_port_hardreset); 6916 EXPORT_SYMBOL_GPL(sata_std_hardreset); 6917 EXPORT_SYMBOL_GPL(ata_std_postreset); 6918 EXPORT_SYMBOL_GPL(ata_dev_classify); 6919 EXPORT_SYMBOL_GPL(ata_dev_pair); 6920 EXPORT_SYMBOL_GPL(ata_port_disable); 6921 EXPORT_SYMBOL_GPL(ata_ratelimit); 6922 EXPORT_SYMBOL_GPL(ata_wait_register); 6923 EXPORT_SYMBOL_GPL(ata_busy_sleep); 6924 EXPORT_SYMBOL_GPL(ata_wait_ready); 6925 EXPORT_SYMBOL_GPL(ata_port_queue_task); 6926 EXPORT_SYMBOL_GPL(ata_scsi_ioctl); 6927 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); 6928 EXPORT_SYMBOL_GPL(ata_scsi_slave_config); 6929 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy); 6930 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth); 6931 EXPORT_SYMBOL_GPL(ata_host_intr); 6932 EXPORT_SYMBOL_GPL(sata_scr_valid); 6933 EXPORT_SYMBOL_GPL(sata_scr_read); 6934 EXPORT_SYMBOL_GPL(sata_scr_write); 6935 EXPORT_SYMBOL_GPL(sata_scr_write_flush); 6936 EXPORT_SYMBOL_GPL(ata_port_online); 6937 EXPORT_SYMBOL_GPL(ata_port_offline); 6938 #ifdef CONFIG_PM 6939 EXPORT_SYMBOL_GPL(ata_host_suspend); 6940 EXPORT_SYMBOL_GPL(ata_host_resume); 6941 #endif /* CONFIG_PM */ 6942 EXPORT_SYMBOL_GPL(ata_id_string); 6943 EXPORT_SYMBOL_GPL(ata_id_c_string); 6944 EXPORT_SYMBOL_GPL(ata_id_to_dma_mode); 6945 EXPORT_SYMBOL_GPL(ata_scsi_simulate); 6946 6947 EXPORT_SYMBOL_GPL(ata_pio_need_iordy); 6948 EXPORT_SYMBOL_GPL(ata_timing_compute); 6949 EXPORT_SYMBOL_GPL(ata_timing_merge); 6950 6951 #ifdef CONFIG_PCI 6952 EXPORT_SYMBOL_GPL(pci_test_config_bits); 6953 EXPORT_SYMBOL_GPL(ata_pci_init_sff_host); 6954 EXPORT_SYMBOL_GPL(ata_pci_init_bmdma); 6955 EXPORT_SYMBOL_GPL(ata_pci_prepare_sff_host); 6956 EXPORT_SYMBOL_GPL(ata_pci_init_one); 6957 EXPORT_SYMBOL_GPL(ata_pci_remove_one); 6958 #ifdef CONFIG_PM 6959 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend); 6960 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume); 6961 EXPORT_SYMBOL_GPL(ata_pci_device_suspend); 6962 EXPORT_SYMBOL_GPL(ata_pci_device_resume); 6963 #endif /* CONFIG_PM */ 6964 EXPORT_SYMBOL_GPL(ata_pci_default_filter); 6965 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex); 6966 #endif /* CONFIG_PCI */ 6967 6968 EXPORT_SYMBOL_GPL(__ata_ehi_push_desc); 6969 EXPORT_SYMBOL_GPL(ata_ehi_push_desc); 6970 EXPORT_SYMBOL_GPL(ata_ehi_clear_desc); 6971 EXPORT_SYMBOL_GPL(ata_eng_timeout); 6972 EXPORT_SYMBOL_GPL(ata_port_schedule_eh); 6973 EXPORT_SYMBOL_GPL(ata_port_abort); 6974 EXPORT_SYMBOL_GPL(ata_port_freeze); 6975 EXPORT_SYMBOL_GPL(ata_eh_freeze_port); 6976 EXPORT_SYMBOL_GPL(ata_eh_thaw_port); 6977 EXPORT_SYMBOL_GPL(ata_eh_qc_complete); 6978 EXPORT_SYMBOL_GPL(ata_eh_qc_retry); 6979 EXPORT_SYMBOL_GPL(ata_do_eh); 6980 EXPORT_SYMBOL_GPL(ata_irq_on); 6981 EXPORT_SYMBOL_GPL(ata_dummy_irq_on); 6982 EXPORT_SYMBOL_GPL(ata_irq_ack); 6983 EXPORT_SYMBOL_GPL(ata_dummy_irq_ack); 6984 EXPORT_SYMBOL_GPL(ata_dev_try_classify); 6985 6986 EXPORT_SYMBOL_GPL(ata_cable_40wire); 6987 EXPORT_SYMBOL_GPL(ata_cable_80wire); 6988 EXPORT_SYMBOL_GPL(ata_cable_unknown); 6989 EXPORT_SYMBOL_GPL(ata_cable_sata); 6990