1 /* 2 * processor_idle - idle state submodule to the ACPI processor driver 3 * 4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> 5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> 6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de> 7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> 8 * - Added processor hotplug support 9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> 10 * - Added support for C3 on SMP 11 * 12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 13 * 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License as published by 16 * the Free Software Foundation; either version 2 of the License, or (at 17 * your option) any later version. 18 * 19 * This program is distributed in the hope that it will be useful, but 20 * WITHOUT ANY WARRANTY; without even the implied warranty of 21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 22 * General Public License for more details. 23 * 24 * You should have received a copy of the GNU General Public License along 25 * with this program; if not, write to the Free Software Foundation, Inc., 26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. 27 * 28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 29 */ 30 31 #include <linux/kernel.h> 32 #include <linux/module.h> 33 #include <linux/init.h> 34 #include <linux/cpufreq.h> 35 #include <linux/proc_fs.h> 36 #include <linux/seq_file.h> 37 #include <linux/acpi.h> 38 #include <linux/dmi.h> 39 #include <linux/moduleparam.h> 40 #include <linux/sched.h> /* need_resched() */ 41 #include <linux/latency.h> 42 #include <linux/clockchips.h> 43 44 /* 45 * Include the apic definitions for x86 to have the APIC timer related defines 46 * available also for UP (on SMP it gets magically included via linux/smp.h). 47 * asm/acpi.h is not an option, as it would require more include magic. Also 48 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera. 49 */ 50 #ifdef CONFIG_X86 51 #include <asm/apic.h> 52 #endif 53 54 /* 55 * Include the apic definitions for x86 to have the APIC timer related defines 56 * available also for UP (on SMP it gets magically included via linux/smp.h). 57 */ 58 #ifdef CONFIG_X86 59 #include <asm/apic.h> 60 #endif 61 62 #include <asm/io.h> 63 #include <asm/uaccess.h> 64 65 #include <acpi/acpi_bus.h> 66 #include <acpi/processor.h> 67 68 #define ACPI_PROCESSOR_COMPONENT 0x01000000 69 #define ACPI_PROCESSOR_CLASS "processor" 70 #define _COMPONENT ACPI_PROCESSOR_COMPONENT 71 ACPI_MODULE_NAME("processor_idle"); 72 #define ACPI_PROCESSOR_FILE_POWER "power" 73 #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000) 74 #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */ 75 #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */ 76 static void (*pm_idle_save) (void) __read_mostly; 77 module_param(max_cstate, uint, 0644); 78 79 static unsigned int nocst __read_mostly; 80 module_param(nocst, uint, 0000); 81 82 /* 83 * bm_history -- bit-mask with a bit per jiffy of bus-master activity 84 * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms 85 * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms 86 * 100 HZ: 0x0000000F: 4 jiffies = 40ms 87 * reduce history for more aggressive entry into C3 88 */ 89 static unsigned int bm_history __read_mostly = 90 (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1)); 91 module_param(bm_history, uint, 0644); 92 /* -------------------------------------------------------------------------- 93 Power Management 94 -------------------------------------------------------------------------- */ 95 96 /* 97 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. 98 * For now disable this. Probably a bug somewhere else. 99 * 100 * To skip this limit, boot/load with a large max_cstate limit. 101 */ 102 static int set_max_cstate(struct dmi_system_id *id) 103 { 104 if (max_cstate > ACPI_PROCESSOR_MAX_POWER) 105 return 0; 106 107 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate." 108 " Override with \"processor.max_cstate=%d\"\n", id->ident, 109 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); 110 111 max_cstate = (long)id->driver_data; 112 113 return 0; 114 } 115 116 /* Actually this shouldn't be __cpuinitdata, would be better to fix the 117 callers to only run once -AK */ 118 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = { 119 { set_max_cstate, "IBM ThinkPad R40e", { 120 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), 121 DMI_MATCH(DMI_BIOS_VERSION,"1SET70WW")}, (void *)1}, 122 { set_max_cstate, "IBM ThinkPad R40e", { 123 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), 124 DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1}, 125 { set_max_cstate, "IBM ThinkPad R40e", { 126 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), 127 DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1}, 128 { set_max_cstate, "IBM ThinkPad R40e", { 129 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), 130 DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1}, 131 { set_max_cstate, "IBM ThinkPad R40e", { 132 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), 133 DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1}, 134 { set_max_cstate, "IBM ThinkPad R40e", { 135 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), 136 DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1}, 137 { set_max_cstate, "IBM ThinkPad R40e", { 138 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), 139 DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1}, 140 { set_max_cstate, "IBM ThinkPad R40e", { 141 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), 142 DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1}, 143 { set_max_cstate, "IBM ThinkPad R40e", { 144 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), 145 DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1}, 146 { set_max_cstate, "IBM ThinkPad R40e", { 147 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), 148 DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1}, 149 { set_max_cstate, "IBM ThinkPad R40e", { 150 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), 151 DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1}, 152 { set_max_cstate, "IBM ThinkPad R40e", { 153 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), 154 DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1}, 155 { set_max_cstate, "IBM ThinkPad R40e", { 156 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), 157 DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1}, 158 { set_max_cstate, "IBM ThinkPad R40e", { 159 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), 160 DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1}, 161 { set_max_cstate, "IBM ThinkPad R40e", { 162 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), 163 DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1}, 164 { set_max_cstate, "IBM ThinkPad R40e", { 165 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), 166 DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1}, 167 { set_max_cstate, "Medion 41700", { 168 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), 169 DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1}, 170 { set_max_cstate, "Clevo 5600D", { 171 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), 172 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, 173 (void *)2}, 174 {}, 175 }; 176 177 static inline u32 ticks_elapsed(u32 t1, u32 t2) 178 { 179 if (t2 >= t1) 180 return (t2 - t1); 181 else if (!(acpi_gbl_FADT.flags & ACPI_FADT_32BIT_TIMER)) 182 return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF); 183 else 184 return ((0xFFFFFFFF - t1) + t2); 185 } 186 187 static void 188 acpi_processor_power_activate(struct acpi_processor *pr, 189 struct acpi_processor_cx *new) 190 { 191 struct acpi_processor_cx *old; 192 193 if (!pr || !new) 194 return; 195 196 old = pr->power.state; 197 198 if (old) 199 old->promotion.count = 0; 200 new->demotion.count = 0; 201 202 /* Cleanup from old state. */ 203 if (old) { 204 switch (old->type) { 205 case ACPI_STATE_C3: 206 /* Disable bus master reload */ 207 if (new->type != ACPI_STATE_C3 && pr->flags.bm_check) 208 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0); 209 break; 210 } 211 } 212 213 /* Prepare to use new state. */ 214 switch (new->type) { 215 case ACPI_STATE_C3: 216 /* Enable bus master reload */ 217 if (old->type != ACPI_STATE_C3 && pr->flags.bm_check) 218 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1); 219 break; 220 } 221 222 pr->power.state = new; 223 224 return; 225 } 226 227 static void acpi_safe_halt(void) 228 { 229 current_thread_info()->status &= ~TS_POLLING; 230 /* 231 * TS_POLLING-cleared state must be visible before we 232 * test NEED_RESCHED: 233 */ 234 smp_mb(); 235 if (!need_resched()) 236 safe_halt(); 237 current_thread_info()->status |= TS_POLLING; 238 } 239 240 static atomic_t c3_cpu_count; 241 242 /* Common C-state entry for C2, C3, .. */ 243 static void acpi_cstate_enter(struct acpi_processor_cx *cstate) 244 { 245 if (cstate->space_id == ACPI_CSTATE_FFH) { 246 /* Call into architectural FFH based C-state */ 247 acpi_processor_ffh_cstate_enter(cstate); 248 } else { 249 int unused; 250 /* IO port based C-state */ 251 inb(cstate->address); 252 /* Dummy wait op - must do something useless after P_LVL2 read 253 because chipsets cannot guarantee that STPCLK# signal 254 gets asserted in time to freeze execution properly. */ 255 unused = inl(acpi_gbl_FADT.xpm_timer_block.address); 256 } 257 } 258 259 #ifdef ARCH_APICTIMER_STOPS_ON_C3 260 261 /* 262 * Some BIOS implementations switch to C3 in the published C2 state. 263 * This seems to be a common problem on AMD boxen, but other vendors 264 * are affected too. We pick the most conservative approach: we assume 265 * that the local APIC stops in both C2 and C3. 266 */ 267 static void acpi_timer_check_state(int state, struct acpi_processor *pr, 268 struct acpi_processor_cx *cx) 269 { 270 struct acpi_processor_power *pwr = &pr->power; 271 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2; 272 273 /* 274 * Check, if one of the previous states already marked the lapic 275 * unstable 276 */ 277 if (pwr->timer_broadcast_on_state < state) 278 return; 279 280 if (cx->type >= type) 281 pr->power.timer_broadcast_on_state = state; 282 } 283 284 static void acpi_propagate_timer_broadcast(struct acpi_processor *pr) 285 { 286 #ifdef CONFIG_GENERIC_CLOCKEVENTS 287 unsigned long reason; 288 289 reason = pr->power.timer_broadcast_on_state < INT_MAX ? 290 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF; 291 292 clockevents_notify(reason, &pr->id); 293 #else 294 cpumask_t mask = cpumask_of_cpu(pr->id); 295 296 if (pr->power.timer_broadcast_on_state < INT_MAX) 297 on_each_cpu(switch_APIC_timer_to_ipi, &mask, 1, 1); 298 else 299 on_each_cpu(switch_ipi_to_APIC_timer, &mask, 1, 1); 300 #endif 301 } 302 303 /* Power(C) State timer broadcast control */ 304 static void acpi_state_timer_broadcast(struct acpi_processor *pr, 305 struct acpi_processor_cx *cx, 306 int broadcast) 307 { 308 #ifdef CONFIG_GENERIC_CLOCKEVENTS 309 310 int state = cx - pr->power.states; 311 312 if (state >= pr->power.timer_broadcast_on_state) { 313 unsigned long reason; 314 315 reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER : 316 CLOCK_EVT_NOTIFY_BROADCAST_EXIT; 317 clockevents_notify(reason, &pr->id); 318 } 319 #endif 320 } 321 322 #else 323 324 static void acpi_timer_check_state(int state, struct acpi_processor *pr, 325 struct acpi_processor_cx *cstate) { } 326 static void acpi_propagate_timer_broadcast(struct acpi_processor *pr) { } 327 static void acpi_state_timer_broadcast(struct acpi_processor *pr, 328 struct acpi_processor_cx *cx, 329 int broadcast) 330 { 331 } 332 333 #endif 334 335 static void acpi_processor_idle(void) 336 { 337 struct acpi_processor *pr = NULL; 338 struct acpi_processor_cx *cx = NULL; 339 struct acpi_processor_cx *next_state = NULL; 340 int sleep_ticks = 0; 341 u32 t1, t2 = 0; 342 343 pr = processors[smp_processor_id()]; 344 if (!pr) 345 return; 346 347 /* 348 * Interrupts must be disabled during bus mastering calculations and 349 * for C2/C3 transitions. 350 */ 351 local_irq_disable(); 352 353 /* 354 * Check whether we truly need to go idle, or should 355 * reschedule: 356 */ 357 if (unlikely(need_resched())) { 358 local_irq_enable(); 359 return; 360 } 361 362 cx = pr->power.state; 363 if (!cx) { 364 if (pm_idle_save) 365 pm_idle_save(); 366 else 367 acpi_safe_halt(); 368 return; 369 } 370 371 /* 372 * Check BM Activity 373 * ----------------- 374 * Check for bus mastering activity (if required), record, and check 375 * for demotion. 376 */ 377 if (pr->flags.bm_check) { 378 u32 bm_status = 0; 379 unsigned long diff = jiffies - pr->power.bm_check_timestamp; 380 381 if (diff > 31) 382 diff = 31; 383 384 pr->power.bm_activity <<= diff; 385 386 acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status); 387 if (bm_status) { 388 pr->power.bm_activity |= 0x1; 389 acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, 1); 390 } 391 /* 392 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect 393 * the true state of bus mastering activity; forcing us to 394 * manually check the BMIDEA bit of each IDE channel. 395 */ 396 else if (errata.piix4.bmisx) { 397 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) 398 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) 399 pr->power.bm_activity |= 0x1; 400 } 401 402 pr->power.bm_check_timestamp = jiffies; 403 404 /* 405 * If bus mastering is or was active this jiffy, demote 406 * to avoid a faulty transition. Note that the processor 407 * won't enter a low-power state during this call (to this 408 * function) but should upon the next. 409 * 410 * TBD: A better policy might be to fallback to the demotion 411 * state (use it for this quantum only) istead of 412 * demoting -- and rely on duration as our sole demotion 413 * qualification. This may, however, introduce DMA 414 * issues (e.g. floppy DMA transfer overrun/underrun). 415 */ 416 if ((pr->power.bm_activity & 0x1) && 417 cx->demotion.threshold.bm) { 418 local_irq_enable(); 419 next_state = cx->demotion.state; 420 goto end; 421 } 422 } 423 424 #ifdef CONFIG_HOTPLUG_CPU 425 /* 426 * Check for P_LVL2_UP flag before entering C2 and above on 427 * an SMP system. We do it here instead of doing it at _CST/P_LVL 428 * detection phase, to work cleanly with logical CPU hotplug. 429 */ 430 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) && 431 !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) 432 cx = &pr->power.states[ACPI_STATE_C1]; 433 #endif 434 435 /* 436 * Sleep: 437 * ------ 438 * Invoke the current Cx state to put the processor to sleep. 439 */ 440 if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) { 441 current_thread_info()->status &= ~TS_POLLING; 442 /* 443 * TS_POLLING-cleared state must be visible before we 444 * test NEED_RESCHED: 445 */ 446 smp_mb(); 447 if (need_resched()) { 448 current_thread_info()->status |= TS_POLLING; 449 local_irq_enable(); 450 return; 451 } 452 } 453 454 switch (cx->type) { 455 456 case ACPI_STATE_C1: 457 /* 458 * Invoke C1. 459 * Use the appropriate idle routine, the one that would 460 * be used without acpi C-states. 461 */ 462 if (pm_idle_save) 463 pm_idle_save(); 464 else 465 acpi_safe_halt(); 466 467 /* 468 * TBD: Can't get time duration while in C1, as resumes 469 * go to an ISR rather than here. Need to instrument 470 * base interrupt handler. 471 */ 472 sleep_ticks = 0xFFFFFFFF; 473 break; 474 475 case ACPI_STATE_C2: 476 /* Get start time (ticks) */ 477 t1 = inl(acpi_gbl_FADT.xpm_timer_block.address); 478 /* Invoke C2 */ 479 acpi_state_timer_broadcast(pr, cx, 1); 480 acpi_cstate_enter(cx); 481 /* Get end time (ticks) */ 482 t2 = inl(acpi_gbl_FADT.xpm_timer_block.address); 483 484 #ifdef CONFIG_GENERIC_TIME 485 /* TSC halts in C2, so notify users */ 486 mark_tsc_unstable(); 487 #endif 488 /* Re-enable interrupts */ 489 local_irq_enable(); 490 current_thread_info()->status |= TS_POLLING; 491 /* Compute time (ticks) that we were actually asleep */ 492 sleep_ticks = 493 ticks_elapsed(t1, t2) - cx->latency_ticks - C2_OVERHEAD; 494 acpi_state_timer_broadcast(pr, cx, 0); 495 break; 496 497 case ACPI_STATE_C3: 498 499 if (pr->flags.bm_check) { 500 if (atomic_inc_return(&c3_cpu_count) == 501 num_online_cpus()) { 502 /* 503 * All CPUs are trying to go to C3 504 * Disable bus master arbitration 505 */ 506 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1); 507 } 508 } else { 509 /* SMP with no shared cache... Invalidate cache */ 510 ACPI_FLUSH_CPU_CACHE(); 511 } 512 513 /* Get start time (ticks) */ 514 t1 = inl(acpi_gbl_FADT.xpm_timer_block.address); 515 /* Invoke C3 */ 516 acpi_state_timer_broadcast(pr, cx, 1); 517 acpi_cstate_enter(cx); 518 /* Get end time (ticks) */ 519 t2 = inl(acpi_gbl_FADT.xpm_timer_block.address); 520 if (pr->flags.bm_check) { 521 /* Enable bus master arbitration */ 522 atomic_dec(&c3_cpu_count); 523 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0); 524 } 525 526 #ifdef CONFIG_GENERIC_TIME 527 /* TSC halts in C3, so notify users */ 528 mark_tsc_unstable(); 529 #endif 530 /* Re-enable interrupts */ 531 local_irq_enable(); 532 current_thread_info()->status |= TS_POLLING; 533 /* Compute time (ticks) that we were actually asleep */ 534 sleep_ticks = 535 ticks_elapsed(t1, t2) - cx->latency_ticks - C3_OVERHEAD; 536 acpi_state_timer_broadcast(pr, cx, 0); 537 break; 538 539 default: 540 local_irq_enable(); 541 return; 542 } 543 cx->usage++; 544 if ((cx->type != ACPI_STATE_C1) && (sleep_ticks > 0)) 545 cx->time += sleep_ticks; 546 547 next_state = pr->power.state; 548 549 #ifdef CONFIG_HOTPLUG_CPU 550 /* Don't do promotion/demotion */ 551 if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) && 552 !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) { 553 next_state = cx; 554 goto end; 555 } 556 #endif 557 558 /* 559 * Promotion? 560 * ---------- 561 * Track the number of longs (time asleep is greater than threshold) 562 * and promote when the count threshold is reached. Note that bus 563 * mastering activity may prevent promotions. 564 * Do not promote above max_cstate. 565 */ 566 if (cx->promotion.state && 567 ((cx->promotion.state - pr->power.states) <= max_cstate)) { 568 if (sleep_ticks > cx->promotion.threshold.ticks && 569 cx->promotion.state->latency <= system_latency_constraint()) { 570 cx->promotion.count++; 571 cx->demotion.count = 0; 572 if (cx->promotion.count >= 573 cx->promotion.threshold.count) { 574 if (pr->flags.bm_check) { 575 if (! 576 (pr->power.bm_activity & cx-> 577 promotion.threshold.bm)) { 578 next_state = 579 cx->promotion.state; 580 goto end; 581 } 582 } else { 583 next_state = cx->promotion.state; 584 goto end; 585 } 586 } 587 } 588 } 589 590 /* 591 * Demotion? 592 * --------- 593 * Track the number of shorts (time asleep is less than time threshold) 594 * and demote when the usage threshold is reached. 595 */ 596 if (cx->demotion.state) { 597 if (sleep_ticks < cx->demotion.threshold.ticks) { 598 cx->demotion.count++; 599 cx->promotion.count = 0; 600 if (cx->demotion.count >= cx->demotion.threshold.count) { 601 next_state = cx->demotion.state; 602 goto end; 603 } 604 } 605 } 606 607 end: 608 /* 609 * Demote if current state exceeds max_cstate 610 * or if the latency of the current state is unacceptable 611 */ 612 if ((pr->power.state - pr->power.states) > max_cstate || 613 pr->power.state->latency > system_latency_constraint()) { 614 if (cx->demotion.state) 615 next_state = cx->demotion.state; 616 } 617 618 /* 619 * New Cx State? 620 * ------------- 621 * If we're going to start using a new Cx state we must clean up 622 * from the previous and prepare to use the new. 623 */ 624 if (next_state != pr->power.state) 625 acpi_processor_power_activate(pr, next_state); 626 } 627 628 static int acpi_processor_set_power_policy(struct acpi_processor *pr) 629 { 630 unsigned int i; 631 unsigned int state_is_set = 0; 632 struct acpi_processor_cx *lower = NULL; 633 struct acpi_processor_cx *higher = NULL; 634 struct acpi_processor_cx *cx; 635 636 637 if (!pr) 638 return -EINVAL; 639 640 /* 641 * This function sets the default Cx state policy (OS idle handler). 642 * Our scheme is to promote quickly to C2 but more conservatively 643 * to C3. We're favoring C2 for its characteristics of low latency 644 * (quick response), good power savings, and ability to allow bus 645 * mastering activity. Note that the Cx state policy is completely 646 * customizable and can be altered dynamically. 647 */ 648 649 /* startup state */ 650 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { 651 cx = &pr->power.states[i]; 652 if (!cx->valid) 653 continue; 654 655 if (!state_is_set) 656 pr->power.state = cx; 657 state_is_set++; 658 break; 659 } 660 661 if (!state_is_set) 662 return -ENODEV; 663 664 /* demotion */ 665 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { 666 cx = &pr->power.states[i]; 667 if (!cx->valid) 668 continue; 669 670 if (lower) { 671 cx->demotion.state = lower; 672 cx->demotion.threshold.ticks = cx->latency_ticks; 673 cx->demotion.threshold.count = 1; 674 if (cx->type == ACPI_STATE_C3) 675 cx->demotion.threshold.bm = bm_history; 676 } 677 678 lower = cx; 679 } 680 681 /* promotion */ 682 for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) { 683 cx = &pr->power.states[i]; 684 if (!cx->valid) 685 continue; 686 687 if (higher) { 688 cx->promotion.state = higher; 689 cx->promotion.threshold.ticks = cx->latency_ticks; 690 if (cx->type >= ACPI_STATE_C2) 691 cx->promotion.threshold.count = 4; 692 else 693 cx->promotion.threshold.count = 10; 694 if (higher->type == ACPI_STATE_C3) 695 cx->promotion.threshold.bm = bm_history; 696 } 697 698 higher = cx; 699 } 700 701 return 0; 702 } 703 704 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) 705 { 706 707 if (!pr) 708 return -EINVAL; 709 710 if (!pr->pblk) 711 return -ENODEV; 712 713 /* if info is obtained from pblk/fadt, type equals state */ 714 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; 715 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; 716 717 #ifndef CONFIG_HOTPLUG_CPU 718 /* 719 * Check for P_LVL2_UP flag before entering C2 and above on 720 * an SMP system. 721 */ 722 if ((num_online_cpus() > 1) && 723 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) 724 return -ENODEV; 725 #endif 726 727 /* determine C2 and C3 address from pblk */ 728 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; 729 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; 730 731 /* determine latencies from FADT */ 732 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency; 733 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency; 734 735 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 736 "lvl2[0x%08x] lvl3[0x%08x]\n", 737 pr->power.states[ACPI_STATE_C2].address, 738 pr->power.states[ACPI_STATE_C3].address)); 739 740 return 0; 741 } 742 743 static int acpi_processor_get_power_info_default(struct acpi_processor *pr) 744 { 745 if (!pr->power.states[ACPI_STATE_C1].valid) { 746 /* set the first C-State to C1 */ 747 /* all processors need to support C1 */ 748 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; 749 pr->power.states[ACPI_STATE_C1].valid = 1; 750 } 751 /* the C0 state only exists as a filler in our array */ 752 pr->power.states[ACPI_STATE_C0].valid = 1; 753 return 0; 754 } 755 756 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) 757 { 758 acpi_status status = 0; 759 acpi_integer count; 760 int current_count; 761 int i; 762 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; 763 union acpi_object *cst; 764 765 766 if (nocst) 767 return -ENODEV; 768 769 current_count = 0; 770 771 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer); 772 if (ACPI_FAILURE(status)) { 773 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n")); 774 return -ENODEV; 775 } 776 777 cst = buffer.pointer; 778 779 /* There must be at least 2 elements */ 780 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) { 781 printk(KERN_ERR PREFIX "not enough elements in _CST\n"); 782 status = -EFAULT; 783 goto end; 784 } 785 786 count = cst->package.elements[0].integer.value; 787 788 /* Validate number of power states. */ 789 if (count < 1 || count != cst->package.count - 1) { 790 printk(KERN_ERR PREFIX "count given by _CST is not valid\n"); 791 status = -EFAULT; 792 goto end; 793 } 794 795 /* Tell driver that at least _CST is supported. */ 796 pr->flags.has_cst = 1; 797 798 for (i = 1; i <= count; i++) { 799 union acpi_object *element; 800 union acpi_object *obj; 801 struct acpi_power_register *reg; 802 struct acpi_processor_cx cx; 803 804 memset(&cx, 0, sizeof(cx)); 805 806 element = &(cst->package.elements[i]); 807 if (element->type != ACPI_TYPE_PACKAGE) 808 continue; 809 810 if (element->package.count != 4) 811 continue; 812 813 obj = &(element->package.elements[0]); 814 815 if (obj->type != ACPI_TYPE_BUFFER) 816 continue; 817 818 reg = (struct acpi_power_register *)obj->buffer.pointer; 819 820 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && 821 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) 822 continue; 823 824 /* There should be an easy way to extract an integer... */ 825 obj = &(element->package.elements[1]); 826 if (obj->type != ACPI_TYPE_INTEGER) 827 continue; 828 829 cx.type = obj->integer.value; 830 /* 831 * Some buggy BIOSes won't list C1 in _CST - 832 * Let acpi_processor_get_power_info_default() handle them later 833 */ 834 if (i == 1 && cx.type != ACPI_STATE_C1) 835 current_count++; 836 837 cx.address = reg->address; 838 cx.index = current_count + 1; 839 840 cx.space_id = ACPI_CSTATE_SYSTEMIO; 841 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) { 842 if (acpi_processor_ffh_cstate_probe 843 (pr->id, &cx, reg) == 0) { 844 cx.space_id = ACPI_CSTATE_FFH; 845 } else if (cx.type != ACPI_STATE_C1) { 846 /* 847 * C1 is a special case where FIXED_HARDWARE 848 * can be handled in non-MWAIT way as well. 849 * In that case, save this _CST entry info. 850 * That is, we retain space_id of SYSTEM_IO for 851 * halt based C1. 852 * Otherwise, ignore this info and continue. 853 */ 854 continue; 855 } 856 } 857 858 obj = &(element->package.elements[2]); 859 if (obj->type != ACPI_TYPE_INTEGER) 860 continue; 861 862 cx.latency = obj->integer.value; 863 864 obj = &(element->package.elements[3]); 865 if (obj->type != ACPI_TYPE_INTEGER) 866 continue; 867 868 cx.power = obj->integer.value; 869 870 current_count++; 871 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx)); 872 873 /* 874 * We support total ACPI_PROCESSOR_MAX_POWER - 1 875 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1) 876 */ 877 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) { 878 printk(KERN_WARNING 879 "Limiting number of power states to max (%d)\n", 880 ACPI_PROCESSOR_MAX_POWER); 881 printk(KERN_WARNING 882 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); 883 break; 884 } 885 } 886 887 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n", 888 current_count)); 889 890 /* Validate number of power states discovered */ 891 if (current_count < 2) 892 status = -EFAULT; 893 894 end: 895 kfree(buffer.pointer); 896 897 return status; 898 } 899 900 static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx) 901 { 902 903 if (!cx->address) 904 return; 905 906 /* 907 * C2 latency must be less than or equal to 100 908 * microseconds. 909 */ 910 else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { 911 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 912 "latency too large [%d]\n", cx->latency)); 913 return; 914 } 915 916 /* 917 * Otherwise we've met all of our C2 requirements. 918 * Normalize the C2 latency to expidite policy 919 */ 920 cx->valid = 1; 921 cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency); 922 923 return; 924 } 925 926 static void acpi_processor_power_verify_c3(struct acpi_processor *pr, 927 struct acpi_processor_cx *cx) 928 { 929 static int bm_check_flag; 930 931 932 if (!cx->address) 933 return; 934 935 /* 936 * C3 latency must be less than or equal to 1000 937 * microseconds. 938 */ 939 else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { 940 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 941 "latency too large [%d]\n", cx->latency)); 942 return; 943 } 944 945 /* 946 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) 947 * DMA transfers are used by any ISA device to avoid livelock. 948 * Note that we could disable Type-F DMA (as recommended by 949 * the erratum), but this is known to disrupt certain ISA 950 * devices thus we take the conservative approach. 951 */ 952 else if (errata.piix4.fdma) { 953 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 954 "C3 not supported on PIIX4 with Type-F DMA\n")); 955 return; 956 } 957 958 /* All the logic here assumes flags.bm_check is same across all CPUs */ 959 if (!bm_check_flag) { 960 /* Determine whether bm_check is needed based on CPU */ 961 acpi_processor_power_init_bm_check(&(pr->flags), pr->id); 962 bm_check_flag = pr->flags.bm_check; 963 } else { 964 pr->flags.bm_check = bm_check_flag; 965 } 966 967 if (pr->flags.bm_check) { 968 /* bus mastering control is necessary */ 969 if (!pr->flags.bm_control) { 970 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 971 "C3 support requires bus mastering control\n")); 972 return; 973 } 974 } else { 975 /* 976 * WBINVD should be set in fadt, for C3 state to be 977 * supported on when bm_check is not required. 978 */ 979 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) { 980 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 981 "Cache invalidation should work properly" 982 " for C3 to be enabled on SMP systems\n")); 983 return; 984 } 985 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0); 986 } 987 988 /* 989 * Otherwise we've met all of our C3 requirements. 990 * Normalize the C3 latency to expidite policy. Enable 991 * checking of bus mastering status (bm_check) so we can 992 * use this in our C3 policy 993 */ 994 cx->valid = 1; 995 cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency); 996 997 return; 998 } 999 1000 static int acpi_processor_power_verify(struct acpi_processor *pr) 1001 { 1002 unsigned int i; 1003 unsigned int working = 0; 1004 1005 pr->power.timer_broadcast_on_state = INT_MAX; 1006 1007 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { 1008 struct acpi_processor_cx *cx = &pr->power.states[i]; 1009 1010 switch (cx->type) { 1011 case ACPI_STATE_C1: 1012 cx->valid = 1; 1013 break; 1014 1015 case ACPI_STATE_C2: 1016 acpi_processor_power_verify_c2(cx); 1017 if (cx->valid) 1018 acpi_timer_check_state(i, pr, cx); 1019 break; 1020 1021 case ACPI_STATE_C3: 1022 acpi_processor_power_verify_c3(pr, cx); 1023 if (cx->valid) 1024 acpi_timer_check_state(i, pr, cx); 1025 break; 1026 } 1027 1028 if (cx->valid) 1029 working++; 1030 } 1031 1032 acpi_propagate_timer_broadcast(pr); 1033 1034 return (working); 1035 } 1036 1037 static int acpi_processor_get_power_info(struct acpi_processor *pr) 1038 { 1039 unsigned int i; 1040 int result; 1041 1042 1043 /* NOTE: the idle thread may not be running while calling 1044 * this function */ 1045 1046 /* Zero initialize all the C-states info. */ 1047 memset(pr->power.states, 0, sizeof(pr->power.states)); 1048 1049 result = acpi_processor_get_power_info_cst(pr); 1050 if (result == -ENODEV) 1051 result = acpi_processor_get_power_info_fadt(pr); 1052 1053 if (result) 1054 return result; 1055 1056 acpi_processor_get_power_info_default(pr); 1057 1058 pr->power.count = acpi_processor_power_verify(pr); 1059 1060 /* 1061 * Set Default Policy 1062 * ------------------ 1063 * Now that we know which states are supported, set the default 1064 * policy. Note that this policy can be changed dynamically 1065 * (e.g. encourage deeper sleeps to conserve battery life when 1066 * not on AC). 1067 */ 1068 result = acpi_processor_set_power_policy(pr); 1069 if (result) 1070 return result; 1071 1072 /* 1073 * if one state of type C2 or C3 is available, mark this 1074 * CPU as being "idle manageable" 1075 */ 1076 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { 1077 if (pr->power.states[i].valid) { 1078 pr->power.count = i; 1079 if (pr->power.states[i].type >= ACPI_STATE_C2) 1080 pr->flags.power = 1; 1081 } 1082 } 1083 1084 return 0; 1085 } 1086 1087 int acpi_processor_cst_has_changed(struct acpi_processor *pr) 1088 { 1089 int result = 0; 1090 1091 1092 if (!pr) 1093 return -EINVAL; 1094 1095 if (nocst) { 1096 return -ENODEV; 1097 } 1098 1099 if (!pr->flags.power_setup_done) 1100 return -ENODEV; 1101 1102 /* Fall back to the default idle loop */ 1103 pm_idle = pm_idle_save; 1104 synchronize_sched(); /* Relies on interrupts forcing exit from idle. */ 1105 1106 pr->flags.power = 0; 1107 result = acpi_processor_get_power_info(pr); 1108 if ((pr->flags.power == 1) && (pr->flags.power_setup_done)) 1109 pm_idle = acpi_processor_idle; 1110 1111 return result; 1112 } 1113 1114 /* proc interface */ 1115 1116 static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset) 1117 { 1118 struct acpi_processor *pr = seq->private; 1119 unsigned int i; 1120 1121 1122 if (!pr) 1123 goto end; 1124 1125 seq_printf(seq, "active state: C%zd\n" 1126 "max_cstate: C%d\n" 1127 "bus master activity: %08x\n" 1128 "maximum allowed latency: %d usec\n", 1129 pr->power.state ? pr->power.state - pr->power.states : 0, 1130 max_cstate, (unsigned)pr->power.bm_activity, 1131 system_latency_constraint()); 1132 1133 seq_puts(seq, "states:\n"); 1134 1135 for (i = 1; i <= pr->power.count; i++) { 1136 seq_printf(seq, " %cC%d: ", 1137 (&pr->power.states[i] == 1138 pr->power.state ? '*' : ' '), i); 1139 1140 if (!pr->power.states[i].valid) { 1141 seq_puts(seq, "<not supported>\n"); 1142 continue; 1143 } 1144 1145 switch (pr->power.states[i].type) { 1146 case ACPI_STATE_C1: 1147 seq_printf(seq, "type[C1] "); 1148 break; 1149 case ACPI_STATE_C2: 1150 seq_printf(seq, "type[C2] "); 1151 break; 1152 case ACPI_STATE_C3: 1153 seq_printf(seq, "type[C3] "); 1154 break; 1155 default: 1156 seq_printf(seq, "type[--] "); 1157 break; 1158 } 1159 1160 if (pr->power.states[i].promotion.state) 1161 seq_printf(seq, "promotion[C%zd] ", 1162 (pr->power.states[i].promotion.state - 1163 pr->power.states)); 1164 else 1165 seq_puts(seq, "promotion[--] "); 1166 1167 if (pr->power.states[i].demotion.state) 1168 seq_printf(seq, "demotion[C%zd] ", 1169 (pr->power.states[i].demotion.state - 1170 pr->power.states)); 1171 else 1172 seq_puts(seq, "demotion[--] "); 1173 1174 seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n", 1175 pr->power.states[i].latency, 1176 pr->power.states[i].usage, 1177 (unsigned long long)pr->power.states[i].time); 1178 } 1179 1180 end: 1181 return 0; 1182 } 1183 1184 static int acpi_processor_power_open_fs(struct inode *inode, struct file *file) 1185 { 1186 return single_open(file, acpi_processor_power_seq_show, 1187 PDE(inode)->data); 1188 } 1189 1190 static const struct file_operations acpi_processor_power_fops = { 1191 .open = acpi_processor_power_open_fs, 1192 .read = seq_read, 1193 .llseek = seq_lseek, 1194 .release = single_release, 1195 }; 1196 1197 #ifdef CONFIG_SMP 1198 static void smp_callback(void *v) 1199 { 1200 /* we already woke the CPU up, nothing more to do */ 1201 } 1202 1203 /* 1204 * This function gets called when a part of the kernel has a new latency 1205 * requirement. This means we need to get all processors out of their C-state, 1206 * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that 1207 * wakes them all right up. 1208 */ 1209 static int acpi_processor_latency_notify(struct notifier_block *b, 1210 unsigned long l, void *v) 1211 { 1212 smp_call_function(smp_callback, NULL, 0, 1); 1213 return NOTIFY_OK; 1214 } 1215 1216 static struct notifier_block acpi_processor_latency_notifier = { 1217 .notifier_call = acpi_processor_latency_notify, 1218 }; 1219 #endif 1220 1221 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr, 1222 struct acpi_device *device) 1223 { 1224 acpi_status status = 0; 1225 static int first_run; 1226 struct proc_dir_entry *entry = NULL; 1227 unsigned int i; 1228 1229 1230 if (!first_run) { 1231 dmi_check_system(processor_power_dmi_table); 1232 if (max_cstate < ACPI_C_STATES_MAX) 1233 printk(KERN_NOTICE 1234 "ACPI: processor limited to max C-state %d\n", 1235 max_cstate); 1236 first_run++; 1237 #ifdef CONFIG_SMP 1238 register_latency_notifier(&acpi_processor_latency_notifier); 1239 #endif 1240 } 1241 1242 if (!pr) 1243 return -EINVAL; 1244 1245 if (acpi_gbl_FADT.cst_control && !nocst) { 1246 status = 1247 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8); 1248 if (ACPI_FAILURE(status)) { 1249 ACPI_EXCEPTION((AE_INFO, status, 1250 "Notifying BIOS of _CST ability failed")); 1251 } 1252 } 1253 1254 acpi_processor_get_power_info(pr); 1255 1256 /* 1257 * Install the idle handler if processor power management is supported. 1258 * Note that we use previously set idle handler will be used on 1259 * platforms that only support C1. 1260 */ 1261 if ((pr->flags.power) && (!boot_option_idle_override)) { 1262 printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id); 1263 for (i = 1; i <= pr->power.count; i++) 1264 if (pr->power.states[i].valid) 1265 printk(" C%d[C%d]", i, 1266 pr->power.states[i].type); 1267 printk(")\n"); 1268 1269 if (pr->id == 0) { 1270 pm_idle_save = pm_idle; 1271 pm_idle = acpi_processor_idle; 1272 } 1273 } 1274 1275 /* 'power' [R] */ 1276 entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER, 1277 S_IRUGO, acpi_device_dir(device)); 1278 if (!entry) 1279 return -EIO; 1280 else { 1281 entry->proc_fops = &acpi_processor_power_fops; 1282 entry->data = acpi_driver_data(device); 1283 entry->owner = THIS_MODULE; 1284 } 1285 1286 pr->flags.power_setup_done = 1; 1287 1288 return 0; 1289 } 1290 1291 int acpi_processor_power_exit(struct acpi_processor *pr, 1292 struct acpi_device *device) 1293 { 1294 1295 pr->flags.power_setup_done = 0; 1296 1297 if (acpi_device_dir(device)) 1298 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER, 1299 acpi_device_dir(device)); 1300 1301 /* Unregister the idle handler when processor #0 is removed. */ 1302 if (pr->id == 0) { 1303 pm_idle = pm_idle_save; 1304 1305 /* 1306 * We are about to unload the current idle thread pm callback 1307 * (pm_idle), Wait for all processors to update cached/local 1308 * copies of pm_idle before proceeding. 1309 */ 1310 cpu_idle_wait(); 1311 #ifdef CONFIG_SMP 1312 unregister_latency_notifier(&acpi_processor_latency_notifier); 1313 #endif 1314 } 1315 1316 return 0; 1317 } 1318