1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * processor_idle - idle state submodule to the ACPI processor driver 4 * 5 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> 6 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> 7 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de> 8 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> 9 * - Added processor hotplug support 10 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> 11 * - Added support for C3 on SMP 12 */ 13 #define pr_fmt(fmt) "ACPI: " fmt 14 15 #include <linux/module.h> 16 #include <linux/acpi.h> 17 #include <linux/dmi.h> 18 #include <linux/sched.h> /* need_resched() */ 19 #include <linux/tick.h> 20 #include <linux/cpuidle.h> 21 #include <linux/cpu.h> 22 #include <linux/minmax.h> 23 #include <linux/perf_event.h> 24 #include <acpi/processor.h> 25 #include <linux/context_tracking.h> 26 27 #include "internal.h" 28 29 /* 30 * Include the apic definitions for x86 to have the APIC timer related defines 31 * available also for UP (on SMP it gets magically included via linux/smp.h). 32 * asm/acpi.h is not an option, as it would require more include magic. Also 33 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera. 34 */ 35 #ifdef CONFIG_X86 36 #include <asm/apic.h> 37 #include <asm/cpu.h> 38 #endif 39 40 #define ACPI_IDLE_STATE_START (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX) ? 1 : 0) 41 42 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER; 43 module_param(max_cstate, uint, 0400); 44 static bool nocst __read_mostly; 45 module_param(nocst, bool, 0400); 46 static bool bm_check_disable __read_mostly; 47 module_param(bm_check_disable, bool, 0400); 48 49 static unsigned int latency_factor __read_mostly = 2; 50 module_param(latency_factor, uint, 0644); 51 52 static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device); 53 54 struct cpuidle_driver acpi_idle_driver = { 55 .name = "acpi_idle", 56 .owner = THIS_MODULE, 57 }; 58 59 #ifdef CONFIG_ACPI_PROCESSOR_CSTATE 60 void acpi_idle_rescan_dead_smt_siblings(void) 61 { 62 if (cpuidle_get_driver() == &acpi_idle_driver) 63 arch_cpu_rescan_dead_smt_siblings(); 64 } 65 66 static 67 DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], acpi_cstate); 68 69 static int disabled_by_idle_boot_param(void) 70 { 71 return boot_option_idle_override == IDLE_POLL || 72 boot_option_idle_override == IDLE_HALT; 73 } 74 75 /* 76 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. 77 * For now disable this. Probably a bug somewhere else. 78 * 79 * To skip this limit, boot/load with a large max_cstate limit. 80 */ 81 static int set_max_cstate(const struct dmi_system_id *id) 82 { 83 if (max_cstate > ACPI_PROCESSOR_MAX_POWER) 84 return 0; 85 86 pr_notice("%s detected - limiting to C%ld max_cstate." 87 " Override with \"processor.max_cstate=%d\"\n", id->ident, 88 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); 89 90 max_cstate = (long)id->driver_data; 91 92 return 0; 93 } 94 95 static const struct dmi_system_id processor_power_dmi_table[] = { 96 { set_max_cstate, "Clevo 5600D", { 97 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), 98 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, 99 (void *)2}, 100 { set_max_cstate, "Pavilion zv5000", { 101 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 102 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")}, 103 (void *)1}, 104 { set_max_cstate, "Asus L8400B", { 105 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."), 106 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")}, 107 (void *)1}, 108 {}, 109 }; 110 111 112 /* 113 * Callers should disable interrupts before the call and enable 114 * interrupts after return. 115 */ 116 static void __cpuidle acpi_safe_halt(void) 117 { 118 if (!tif_need_resched()) { 119 raw_safe_halt(); 120 raw_local_irq_disable(); 121 } 122 } 123 124 #ifdef ARCH_APICTIMER_STOPS_ON_C3 125 126 /* 127 * Some BIOS implementations switch to C3 in the published C2 state. 128 * This seems to be a common problem on AMD boxen, but other vendors 129 * are affected too. We pick the most conservative approach: we assume 130 * that the local APIC stops in both C2 and C3. 131 */ 132 static void lapic_timer_check_state(int state, struct acpi_processor *pr, 133 struct acpi_processor_cx *cx) 134 { 135 struct acpi_processor_power *pwr = &pr->power; 136 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2; 137 138 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT)) 139 return; 140 141 if (boot_cpu_has_bug(X86_BUG_AMD_APIC_C1E)) 142 type = ACPI_STATE_C1; 143 144 /* 145 * Check, if one of the previous states already marked the lapic 146 * unstable 147 */ 148 if (pwr->timer_broadcast_on_state < state) 149 return; 150 151 if (cx->type >= type) 152 pr->power.timer_broadcast_on_state = state; 153 } 154 155 static void __lapic_timer_propagate_broadcast(void *arg) 156 { 157 struct acpi_processor *pr = arg; 158 159 if (pr->power.timer_broadcast_on_state < INT_MAX) 160 tick_broadcast_enable(); 161 else 162 tick_broadcast_disable(); 163 } 164 165 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) 166 { 167 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast, 168 (void *)pr, 1); 169 } 170 171 /* Power(C) State timer broadcast control */ 172 static bool lapic_timer_needs_broadcast(struct acpi_processor *pr, 173 struct acpi_processor_cx *cx) 174 { 175 return cx - pr->power.states >= pr->power.timer_broadcast_on_state; 176 } 177 178 #else 179 180 static void lapic_timer_check_state(int state, struct acpi_processor *pr, 181 struct acpi_processor_cx *cstate) { } 182 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { } 183 184 static bool lapic_timer_needs_broadcast(struct acpi_processor *pr, 185 struct acpi_processor_cx *cx) 186 { 187 return false; 188 } 189 190 #endif 191 192 #if defined(CONFIG_X86) 193 static void tsc_check_state(int state) 194 { 195 switch (boot_cpu_data.x86_vendor) { 196 case X86_VENDOR_HYGON: 197 case X86_VENDOR_AMD: 198 case X86_VENDOR_INTEL: 199 case X86_VENDOR_CENTAUR: 200 case X86_VENDOR_ZHAOXIN: 201 /* 202 * AMD Fam10h TSC will tick in all 203 * C/P/S0/S1 states when this bit is set. 204 */ 205 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) 206 return; 207 fallthrough; 208 default: 209 /* TSC could halt in idle, so notify users */ 210 if (state > ACPI_STATE_C1) 211 mark_tsc_unstable("TSC halts in idle"); 212 } 213 } 214 #else 215 static void tsc_check_state(int state) { return; } 216 #endif 217 218 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) 219 { 220 221 if (!pr->pblk) 222 return -ENODEV; 223 224 /* if info is obtained from pblk/fadt, type equals state */ 225 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; 226 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; 227 228 #ifndef CONFIG_HOTPLUG_CPU 229 /* 230 * Check for P_LVL2_UP flag before entering C2 and above on 231 * an SMP system. 232 */ 233 if ((num_online_cpus() > 1) && 234 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) 235 return -ENODEV; 236 #endif 237 238 /* determine C2 and C3 address from pblk */ 239 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; 240 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; 241 242 /* determine latencies from FADT */ 243 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency; 244 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency; 245 246 /* 247 * FADT specified C2 latency must be less than or equal to 248 * 100 microseconds. 249 */ 250 if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { 251 acpi_handle_debug(pr->handle, "C2 latency too large [%d]\n", 252 acpi_gbl_FADT.c2_latency); 253 /* invalidate C2 */ 254 pr->power.states[ACPI_STATE_C2].address = 0; 255 } 256 257 /* 258 * FADT supplied C3 latency must be less than or equal to 259 * 1000 microseconds. 260 */ 261 if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { 262 acpi_handle_debug(pr->handle, "C3 latency too large [%d]\n", 263 acpi_gbl_FADT.c3_latency); 264 /* invalidate C3 */ 265 pr->power.states[ACPI_STATE_C3].address = 0; 266 } 267 268 acpi_handle_debug(pr->handle, "lvl2[0x%08x] lvl3[0x%08x]\n", 269 pr->power.states[ACPI_STATE_C2].address, 270 pr->power.states[ACPI_STATE_C3].address); 271 272 snprintf(pr->power.states[ACPI_STATE_C2].desc, 273 ACPI_CX_DESC_LEN, "ACPI P_LVL2 IOPORT 0x%x", 274 pr->power.states[ACPI_STATE_C2].address); 275 snprintf(pr->power.states[ACPI_STATE_C3].desc, 276 ACPI_CX_DESC_LEN, "ACPI P_LVL3 IOPORT 0x%x", 277 pr->power.states[ACPI_STATE_C3].address); 278 279 if (!pr->power.states[ACPI_STATE_C2].address && 280 !pr->power.states[ACPI_STATE_C3].address) 281 return -ENODEV; 282 283 return 0; 284 } 285 286 static int acpi_processor_get_power_info_default(struct acpi_processor *pr) 287 { 288 if (!pr->power.states[ACPI_STATE_C1].valid) { 289 /* set the first C-State to C1 */ 290 /* all processors need to support C1 */ 291 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; 292 pr->power.states[ACPI_STATE_C1].valid = 1; 293 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT; 294 295 snprintf(pr->power.states[ACPI_STATE_C1].desc, 296 ACPI_CX_DESC_LEN, "ACPI HLT"); 297 } 298 /* the C0 state only exists as a filler in our array */ 299 pr->power.states[ACPI_STATE_C0].valid = 1; 300 return 0; 301 } 302 303 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) 304 { 305 int ret; 306 307 if (nocst) 308 return -ENODEV; 309 310 ret = acpi_processor_evaluate_cst(pr->handle, pr->id, &pr->power); 311 if (ret) 312 return ret; 313 314 if (!pr->power.count) 315 return -EFAULT; 316 317 pr->flags.has_cst = 1; 318 return 0; 319 } 320 321 static void acpi_processor_power_verify_c3(struct acpi_processor *pr, 322 struct acpi_processor_cx *cx) 323 { 324 static int bm_check_flag = -1; 325 static int bm_control_flag = -1; 326 327 328 if (!cx->address) 329 return; 330 331 /* 332 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) 333 * DMA transfers are used by any ISA device to avoid livelock. 334 * Note that we could disable Type-F DMA (as recommended by 335 * the erratum), but this is known to disrupt certain ISA 336 * devices thus we take the conservative approach. 337 */ 338 if (errata.piix4.fdma) { 339 acpi_handle_debug(pr->handle, 340 "C3 not supported on PIIX4 with Type-F DMA\n"); 341 return; 342 } 343 344 /* All the logic here assumes flags.bm_check is same across all CPUs */ 345 if (bm_check_flag == -1) { 346 /* Determine whether bm_check is needed based on CPU */ 347 acpi_processor_power_init_bm_check(&(pr->flags), pr->id); 348 bm_check_flag = pr->flags.bm_check; 349 bm_control_flag = pr->flags.bm_control; 350 } else { 351 pr->flags.bm_check = bm_check_flag; 352 pr->flags.bm_control = bm_control_flag; 353 } 354 355 if (pr->flags.bm_check) { 356 if (!pr->flags.bm_control) { 357 if (pr->flags.has_cst != 1) { 358 /* bus mastering control is necessary */ 359 acpi_handle_debug(pr->handle, 360 "C3 support requires BM control\n"); 361 return; 362 } else { 363 /* Here we enter C3 without bus mastering */ 364 acpi_handle_debug(pr->handle, 365 "C3 support without BM control\n"); 366 } 367 } 368 } else { 369 /* 370 * WBINVD should be set in fadt, for C3 state to be 371 * supported on when bm_check is not required. 372 */ 373 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) { 374 acpi_handle_debug(pr->handle, 375 "Cache invalidation should work properly" 376 " for C3 to be enabled on SMP systems\n"); 377 return; 378 } 379 } 380 381 /* 382 * Otherwise we've met all of our C3 requirements. 383 * Normalize the C3 latency to expidite policy. Enable 384 * checking of bus mastering status (bm_check) so we can 385 * use this in our C3 policy 386 */ 387 cx->valid = 1; 388 389 /* 390 * On older chipsets, BM_RLD needs to be set 391 * in order for Bus Master activity to wake the 392 * system from C3. Newer chipsets handle DMA 393 * during C3 automatically and BM_RLD is a NOP. 394 * In either case, the proper way to 395 * handle BM_RLD is to set it and leave it set. 396 */ 397 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1); 398 } 399 400 static void acpi_cst_latency_sort(struct acpi_processor_cx *states, size_t length) 401 { 402 int i, j, k; 403 404 for (i = 1; i < length; i++) { 405 if (!states[i].valid) 406 continue; 407 408 for (j = i - 1, k = i; j >= 0; j--) { 409 if (!states[j].valid) 410 continue; 411 412 if (states[j].latency > states[k].latency) 413 swap(states[j].latency, states[k].latency); 414 415 k = j; 416 } 417 } 418 } 419 420 static int acpi_processor_power_verify(struct acpi_processor *pr) 421 { 422 unsigned int i; 423 unsigned int working = 0; 424 unsigned int last_latency = 0; 425 unsigned int last_type = 0; 426 bool buggy_latency = false; 427 428 pr->power.timer_broadcast_on_state = INT_MAX; 429 430 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 431 struct acpi_processor_cx *cx = &pr->power.states[i]; 432 433 switch (cx->type) { 434 case ACPI_STATE_C1: 435 cx->valid = 1; 436 break; 437 438 case ACPI_STATE_C2: 439 if (!cx->address) 440 break; 441 cx->valid = 1; 442 break; 443 444 case ACPI_STATE_C3: 445 acpi_processor_power_verify_c3(pr, cx); 446 break; 447 } 448 if (!cx->valid) 449 continue; 450 if (cx->type >= last_type && cx->latency < last_latency) 451 buggy_latency = true; 452 last_latency = cx->latency; 453 last_type = cx->type; 454 455 lapic_timer_check_state(i, pr, cx); 456 tsc_check_state(cx->type); 457 working++; 458 } 459 460 if (buggy_latency) { 461 pr_notice("FW issue: working around C-state latencies out of order\n"); 462 acpi_cst_latency_sort(&pr->power.states[1], max_cstate); 463 } 464 465 lapic_timer_propagate_broadcast(pr); 466 467 return working; 468 } 469 470 static int acpi_processor_get_cstate_info(struct acpi_processor *pr) 471 { 472 int result; 473 474 /* NOTE: the idle thread may not be running while calling 475 * this function */ 476 477 /* Zero initialize all the C-states info. */ 478 memset(pr->power.states, 0, sizeof(pr->power.states)); 479 480 result = acpi_processor_get_power_info_cst(pr); 481 if (result == -ENODEV) 482 result = acpi_processor_get_power_info_fadt(pr); 483 484 if (result) 485 return result; 486 487 acpi_processor_get_power_info_default(pr); 488 489 pr->power.count = acpi_processor_power_verify(pr); 490 pr->flags.power = 1; 491 492 return 0; 493 } 494 495 /** 496 * acpi_idle_bm_check - checks if bus master activity was detected 497 */ 498 static int acpi_idle_bm_check(void) 499 { 500 u32 bm_status = 0; 501 502 if (bm_check_disable) 503 return 0; 504 505 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status); 506 if (bm_status) 507 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1); 508 /* 509 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect 510 * the true state of bus mastering activity; forcing us to 511 * manually check the BMIDEA bit of each IDE channel. 512 */ 513 else if (errata.piix4.bmisx) { 514 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) 515 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) 516 bm_status = 1; 517 } 518 return bm_status; 519 } 520 521 static __cpuidle void io_idle(unsigned long addr) 522 { 523 /* IO port based C-state */ 524 inb(addr); 525 526 #ifdef CONFIG_X86 527 /* No delay is needed if we are in guest */ 528 if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) 529 return; 530 /* 531 * Modern (>=Nehalem) Intel systems use ACPI via intel_idle, 532 * not this code. Assume that any Intel systems using this 533 * are ancient and may need the dummy wait. This also assumes 534 * that the motivating chipset issue was Intel-only. 535 */ 536 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) 537 return; 538 #endif 539 /* 540 * Dummy wait op - must do something useless after P_LVL2 read 541 * because chipsets cannot guarantee that STPCLK# signal gets 542 * asserted in time to freeze execution properly 543 * 544 * This workaround has been in place since the original ACPI 545 * implementation was merged, circa 2002. 546 * 547 * If a profile is pointing to this instruction, please first 548 * consider moving your system to a more modern idle 549 * mechanism. 550 */ 551 inl(acpi_gbl_FADT.xpm_timer_block.address); 552 } 553 554 /** 555 * acpi_idle_do_entry - enter idle state using the appropriate method 556 * @cx: cstate data 557 * 558 * Caller disables interrupt before call and enables interrupt after return. 559 */ 560 static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx) 561 { 562 perf_lopwr_cb(true); 563 564 if (cx->entry_method == ACPI_CSTATE_FFH) { 565 /* Call into architectural FFH based C-state */ 566 acpi_processor_ffh_cstate_enter(cx); 567 } else if (cx->entry_method == ACPI_CSTATE_HALT) { 568 acpi_safe_halt(); 569 } else { 570 io_idle(cx->address); 571 } 572 573 perf_lopwr_cb(false); 574 } 575 576 /** 577 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining) 578 * @dev: the target CPU 579 * @index: the index of suggested state 580 */ 581 static void acpi_idle_play_dead(struct cpuidle_device *dev, int index) 582 { 583 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 584 585 ACPI_FLUSH_CPU_CACHE(); 586 587 while (1) { 588 589 if (cx->entry_method == ACPI_CSTATE_HALT) 590 raw_safe_halt(); 591 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) { 592 io_idle(cx->address); 593 } else if (cx->entry_method == ACPI_CSTATE_FFH) { 594 acpi_processor_ffh_play_dead(cx); 595 } else 596 return; 597 } 598 } 599 600 static __always_inline bool acpi_idle_fallback_to_c1(struct acpi_processor *pr) 601 { 602 return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst && 603 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED); 604 } 605 606 static int c3_cpu_count; 607 static DEFINE_RAW_SPINLOCK(c3_lock); 608 609 /** 610 * acpi_idle_enter_bm - enters C3 with proper BM handling 611 * @drv: cpuidle driver 612 * @pr: Target processor 613 * @cx: Target state context 614 * @index: index of target state 615 */ 616 static int __cpuidle acpi_idle_enter_bm(struct cpuidle_driver *drv, 617 struct acpi_processor *pr, 618 struct acpi_processor_cx *cx, 619 int index) 620 { 621 static struct acpi_processor_cx safe_cx = { 622 .entry_method = ACPI_CSTATE_HALT, 623 }; 624 625 /* 626 * disable bus master 627 * bm_check implies we need ARB_DIS 628 * bm_control implies whether we can do ARB_DIS 629 * 630 * That leaves a case where bm_check is set and bm_control is not set. 631 * In that case we cannot do much, we enter C3 without doing anything. 632 */ 633 bool dis_bm = pr->flags.bm_control; 634 635 instrumentation_begin(); 636 637 /* If we can skip BM, demote to a safe state. */ 638 if (!cx->bm_sts_skip && acpi_idle_bm_check()) { 639 dis_bm = false; 640 index = drv->safe_state_index; 641 if (index >= 0) { 642 cx = this_cpu_read(acpi_cstate[index]); 643 } else { 644 cx = &safe_cx; 645 index = -EBUSY; 646 } 647 } 648 649 if (dis_bm) { 650 raw_spin_lock(&c3_lock); 651 c3_cpu_count++; 652 /* Disable bus master arbitration when all CPUs are in C3 */ 653 if (c3_cpu_count == num_online_cpus()) 654 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1); 655 raw_spin_unlock(&c3_lock); 656 } 657 658 ct_cpuidle_enter(); 659 660 acpi_idle_do_entry(cx); 661 662 ct_cpuidle_exit(); 663 664 /* Re-enable bus master arbitration */ 665 if (dis_bm) { 666 raw_spin_lock(&c3_lock); 667 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0); 668 c3_cpu_count--; 669 raw_spin_unlock(&c3_lock); 670 } 671 672 instrumentation_end(); 673 674 return index; 675 } 676 677 static int __cpuidle acpi_idle_enter(struct cpuidle_device *dev, 678 struct cpuidle_driver *drv, int index) 679 { 680 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 681 struct acpi_processor *pr; 682 683 pr = __this_cpu_read(processors); 684 if (unlikely(!pr)) 685 return -EINVAL; 686 687 if (cx->type != ACPI_STATE_C1) { 688 if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check) 689 return acpi_idle_enter_bm(drv, pr, cx, index); 690 691 /* C2 to C1 demotion. */ 692 if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) { 693 index = ACPI_IDLE_STATE_START; 694 cx = per_cpu(acpi_cstate[index], dev->cpu); 695 } 696 } 697 698 if (cx->type == ACPI_STATE_C3) 699 ACPI_FLUSH_CPU_CACHE(); 700 701 acpi_idle_do_entry(cx); 702 703 return index; 704 } 705 706 static int __cpuidle acpi_idle_enter_s2idle(struct cpuidle_device *dev, 707 struct cpuidle_driver *drv, int index) 708 { 709 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 710 711 if (cx->type == ACPI_STATE_C3) { 712 struct acpi_processor *pr = __this_cpu_read(processors); 713 714 if (unlikely(!pr)) 715 return 0; 716 717 if (pr->flags.bm_check) { 718 u8 bm_sts_skip = cx->bm_sts_skip; 719 720 /* Don't check BM_STS, do an unconditional ARB_DIS for S2IDLE */ 721 cx->bm_sts_skip = 1; 722 acpi_idle_enter_bm(drv, pr, cx, index); 723 cx->bm_sts_skip = bm_sts_skip; 724 725 return 0; 726 } else { 727 ACPI_FLUSH_CPU_CACHE(); 728 } 729 } 730 acpi_idle_do_entry(cx); 731 732 return 0; 733 } 734 735 static void acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr, 736 struct cpuidle_device *dev) 737 { 738 int i, count = ACPI_IDLE_STATE_START; 739 struct acpi_processor_cx *cx; 740 741 if (max_cstate == 0) 742 max_cstate = 1; 743 744 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 745 cx = &pr->power.states[i]; 746 747 if (!cx->valid) 748 continue; 749 750 per_cpu(acpi_cstate[count], dev->cpu) = cx; 751 752 count++; 753 if (count == CPUIDLE_STATE_MAX) 754 break; 755 } 756 } 757 758 static void acpi_processor_setup_cstates(struct acpi_processor *pr) 759 { 760 int i, count; 761 struct acpi_processor_cx *cx; 762 struct cpuidle_state *state; 763 struct cpuidle_driver *drv = &acpi_idle_driver; 764 765 if (max_cstate == 0) 766 max_cstate = 1; 767 768 if (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX)) { 769 cpuidle_poll_state_init(drv); 770 count = 1; 771 } else { 772 count = 0; 773 } 774 775 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 776 cx = &pr->power.states[i]; 777 778 if (!cx->valid) 779 continue; 780 781 state = &drv->states[count]; 782 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i); 783 strscpy(state->desc, cx->desc, CPUIDLE_DESC_LEN); 784 state->exit_latency = cx->latency; 785 state->target_residency = cx->latency * latency_factor; 786 state->enter = acpi_idle_enter; 787 788 state->flags = 0; 789 790 state->enter_dead = acpi_idle_play_dead; 791 792 if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2) 793 drv->safe_state_index = count; 794 795 /* 796 * Halt-induced C1 is not good for ->enter_s2idle, because it 797 * re-enables interrupts on exit. Moreover, C1 is generally not 798 * particularly interesting from the suspend-to-idle angle, so 799 * avoid C1 and the situations in which we may need to fall back 800 * to it altogether. 801 */ 802 if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr)) 803 state->enter_s2idle = acpi_idle_enter_s2idle; 804 805 if (lapic_timer_needs_broadcast(pr, cx)) 806 state->flags |= CPUIDLE_FLAG_TIMER_STOP; 807 808 if (cx->type == ACPI_STATE_C3) { 809 state->flags |= CPUIDLE_FLAG_TLB_FLUSHED; 810 if (pr->flags.bm_check) 811 state->flags |= CPUIDLE_FLAG_RCU_IDLE; 812 } 813 814 count++; 815 if (count == CPUIDLE_STATE_MAX) 816 break; 817 } 818 819 drv->state_count = count; 820 } 821 822 static inline void acpi_processor_cstate_first_run_checks(void) 823 { 824 static int first_run; 825 826 if (first_run) 827 return; 828 dmi_check_system(processor_power_dmi_table); 829 max_cstate = acpi_processor_cstate_check(max_cstate); 830 if (max_cstate < ACPI_C_STATES_MAX) 831 pr_notice("processor limited to max C-state %d\n", max_cstate); 832 833 first_run++; 834 835 if (nocst) 836 return; 837 838 acpi_processor_claim_cst_control(); 839 } 840 #else 841 842 static inline int disabled_by_idle_boot_param(void) { return 0; } 843 static inline void acpi_processor_cstate_first_run_checks(void) { } 844 static int acpi_processor_get_cstate_info(struct acpi_processor *pr) 845 { 846 return -ENODEV; 847 } 848 849 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr, 850 struct cpuidle_device *dev) 851 { 852 return -EINVAL; 853 } 854 855 static int acpi_processor_setup_cstates(struct acpi_processor *pr) 856 { 857 return -EINVAL; 858 } 859 860 #endif /* CONFIG_ACPI_PROCESSOR_CSTATE */ 861 862 struct acpi_lpi_states_array { 863 unsigned int size; 864 unsigned int composite_states_size; 865 struct acpi_lpi_state *entries; 866 struct acpi_lpi_state *composite_states[ACPI_PROCESSOR_MAX_POWER]; 867 }; 868 869 static int obj_get_integer(union acpi_object *obj, u32 *value) 870 { 871 if (obj->type != ACPI_TYPE_INTEGER) 872 return -EINVAL; 873 874 *value = obj->integer.value; 875 return 0; 876 } 877 878 static int acpi_processor_evaluate_lpi(acpi_handle handle, 879 struct acpi_lpi_states_array *info) 880 { 881 acpi_status status; 882 int ret = 0; 883 int pkg_count, state_idx = 1, loop; 884 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; 885 union acpi_object *lpi_data; 886 struct acpi_lpi_state *lpi_state; 887 888 status = acpi_evaluate_object(handle, "_LPI", NULL, &buffer); 889 if (ACPI_FAILURE(status)) { 890 acpi_handle_debug(handle, "No _LPI, giving up\n"); 891 return -ENODEV; 892 } 893 894 lpi_data = buffer.pointer; 895 896 /* There must be at least 4 elements = 3 elements + 1 package */ 897 if (!lpi_data || lpi_data->type != ACPI_TYPE_PACKAGE || 898 lpi_data->package.count < 4) { 899 pr_debug("not enough elements in _LPI\n"); 900 ret = -ENODATA; 901 goto end; 902 } 903 904 pkg_count = lpi_data->package.elements[2].integer.value; 905 906 /* Validate number of power states. */ 907 if (pkg_count < 1 || pkg_count != lpi_data->package.count - 3) { 908 pr_debug("count given by _LPI is not valid\n"); 909 ret = -ENODATA; 910 goto end; 911 } 912 913 lpi_state = kcalloc(pkg_count, sizeof(*lpi_state), GFP_KERNEL); 914 if (!lpi_state) { 915 ret = -ENOMEM; 916 goto end; 917 } 918 919 info->size = pkg_count; 920 info->entries = lpi_state; 921 922 /* LPI States start at index 3 */ 923 for (loop = 3; state_idx <= pkg_count; loop++, state_idx++, lpi_state++) { 924 union acpi_object *element, *pkg_elem, *obj; 925 926 element = &lpi_data->package.elements[loop]; 927 if (element->type != ACPI_TYPE_PACKAGE || element->package.count < 7) 928 continue; 929 930 pkg_elem = element->package.elements; 931 932 obj = pkg_elem + 6; 933 if (obj->type == ACPI_TYPE_BUFFER) { 934 struct acpi_power_register *reg; 935 936 reg = (struct acpi_power_register *)obj->buffer.pointer; 937 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && 938 reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) 939 continue; 940 941 lpi_state->address = reg->address; 942 lpi_state->entry_method = 943 reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE ? 944 ACPI_CSTATE_FFH : ACPI_CSTATE_SYSTEMIO; 945 } else if (obj->type == ACPI_TYPE_INTEGER) { 946 lpi_state->entry_method = ACPI_CSTATE_INTEGER; 947 lpi_state->address = obj->integer.value; 948 } else { 949 continue; 950 } 951 952 /* elements[7,8] skipped for now i.e. Residency/Usage counter*/ 953 954 obj = pkg_elem + 9; 955 if (obj->type == ACPI_TYPE_STRING) 956 strscpy(lpi_state->desc, obj->string.pointer, 957 ACPI_CX_DESC_LEN); 958 959 lpi_state->index = state_idx; 960 if (obj_get_integer(pkg_elem + 0, &lpi_state->min_residency)) { 961 pr_debug("No min. residency found, assuming 10 us\n"); 962 lpi_state->min_residency = 10; 963 } 964 965 if (obj_get_integer(pkg_elem + 1, &lpi_state->wake_latency)) { 966 pr_debug("No wakeup residency found, assuming 10 us\n"); 967 lpi_state->wake_latency = 10; 968 } 969 970 if (obj_get_integer(pkg_elem + 2, &lpi_state->flags)) 971 lpi_state->flags = 0; 972 973 if (obj_get_integer(pkg_elem + 3, &lpi_state->arch_flags)) 974 lpi_state->arch_flags = 0; 975 976 if (obj_get_integer(pkg_elem + 4, &lpi_state->res_cnt_freq)) 977 lpi_state->res_cnt_freq = 1; 978 979 if (obj_get_integer(pkg_elem + 5, &lpi_state->enable_parent_state)) 980 lpi_state->enable_parent_state = 0; 981 } 982 983 acpi_handle_debug(handle, "Found %d power states\n", state_idx); 984 end: 985 kfree(buffer.pointer); 986 return ret; 987 } 988 989 /** 990 * combine_lpi_states - combine local and parent LPI states to form a composite LPI state 991 * 992 * @local: local LPI state 993 * @parent: parent LPI state 994 * @result: composite LPI state 995 */ 996 static bool combine_lpi_states(struct acpi_lpi_state *local, 997 struct acpi_lpi_state *parent, 998 struct acpi_lpi_state *result) 999 { 1000 if (parent->entry_method == ACPI_CSTATE_INTEGER) { 1001 if (!parent->address) /* 0 means autopromotable */ 1002 return false; 1003 result->address = local->address + parent->address; 1004 } else { 1005 result->address = parent->address; 1006 } 1007 1008 result->min_residency = max(local->min_residency, parent->min_residency); 1009 result->wake_latency = local->wake_latency + parent->wake_latency; 1010 result->enable_parent_state = parent->enable_parent_state; 1011 result->entry_method = local->entry_method; 1012 1013 result->flags = parent->flags; 1014 result->arch_flags = parent->arch_flags; 1015 result->index = parent->index; 1016 1017 strscpy(result->desc, local->desc, ACPI_CX_DESC_LEN); 1018 strlcat(result->desc, "+", ACPI_CX_DESC_LEN); 1019 strlcat(result->desc, parent->desc, ACPI_CX_DESC_LEN); 1020 return true; 1021 } 1022 1023 #define ACPI_LPI_STATE_FLAGS_ENABLED BIT(0) 1024 1025 static void stash_composite_state(struct acpi_lpi_states_array *curr_level, 1026 struct acpi_lpi_state *t) 1027 { 1028 curr_level->composite_states[curr_level->composite_states_size++] = t; 1029 } 1030 1031 static unsigned int flatten_lpi_states(struct acpi_processor *pr, 1032 unsigned int flat_state_cnt, 1033 struct acpi_lpi_states_array *curr_level, 1034 struct acpi_lpi_states_array *prev_level) 1035 { 1036 int i, j, state_count = curr_level->size; 1037 struct acpi_lpi_state *p, *t = curr_level->entries; 1038 1039 curr_level->composite_states_size = 0; 1040 for (j = 0; j < state_count; j++, t++) { 1041 struct acpi_lpi_state *flpi; 1042 1043 if (!(t->flags & ACPI_LPI_STATE_FLAGS_ENABLED)) 1044 continue; 1045 1046 if (flat_state_cnt >= ACPI_PROCESSOR_MAX_POWER) { 1047 pr_warn("Limiting number of LPI states to max (%d)\n", 1048 ACPI_PROCESSOR_MAX_POWER); 1049 pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); 1050 break; 1051 } 1052 1053 flpi = &pr->power.lpi_states[flat_state_cnt]; 1054 1055 if (!prev_level) { /* leaf/processor node */ 1056 memcpy(flpi, t, sizeof(*t)); 1057 stash_composite_state(curr_level, flpi); 1058 flat_state_cnt++; 1059 continue; 1060 } 1061 1062 for (i = 0; i < prev_level->composite_states_size; i++) { 1063 p = prev_level->composite_states[i]; 1064 if (t->index <= p->enable_parent_state && 1065 combine_lpi_states(p, t, flpi)) { 1066 stash_composite_state(curr_level, flpi); 1067 flat_state_cnt++; 1068 flpi++; 1069 } 1070 } 1071 } 1072 1073 kfree(curr_level->entries); 1074 return flat_state_cnt; 1075 } 1076 1077 int __weak acpi_processor_ffh_lpi_probe(unsigned int cpu) 1078 { 1079 return -EOPNOTSUPP; 1080 } 1081 1082 static int acpi_processor_get_lpi_info(struct acpi_processor *pr) 1083 { 1084 int ret, i; 1085 acpi_status status; 1086 acpi_handle handle = pr->handle, pr_ahandle; 1087 struct acpi_device *d = NULL; 1088 struct acpi_lpi_states_array info[2], *tmp, *prev, *curr; 1089 unsigned int state_count; 1090 1091 /* make sure our architecture has support */ 1092 ret = acpi_processor_ffh_lpi_probe(pr->id); 1093 if (ret == -EOPNOTSUPP) 1094 return ret; 1095 1096 if (!osc_pc_lpi_support_confirmed) 1097 return -EOPNOTSUPP; 1098 1099 if (!acpi_has_method(handle, "_LPI")) 1100 return -EINVAL; 1101 1102 prev = &info[0]; 1103 curr = &info[1]; 1104 handle = pr->handle; 1105 ret = acpi_processor_evaluate_lpi(handle, prev); 1106 if (ret) 1107 return ret; 1108 state_count = flatten_lpi_states(pr, 0, prev, NULL); 1109 1110 status = acpi_get_parent(handle, &pr_ahandle); 1111 while (ACPI_SUCCESS(status)) { 1112 d = acpi_fetch_acpi_dev(pr_ahandle); 1113 if (!d) 1114 break; 1115 1116 handle = pr_ahandle; 1117 1118 if (strcmp(acpi_device_hid(d), ACPI_PROCESSOR_CONTAINER_HID)) 1119 break; 1120 1121 /* can be optional ? */ 1122 if (!acpi_has_method(handle, "_LPI")) 1123 break; 1124 1125 ret = acpi_processor_evaluate_lpi(handle, curr); 1126 if (ret) 1127 break; 1128 1129 /* flatten all the LPI states in this level of hierarchy */ 1130 state_count = flatten_lpi_states(pr, state_count, curr, prev); 1131 1132 tmp = prev, prev = curr, curr = tmp; 1133 1134 status = acpi_get_parent(handle, &pr_ahandle); 1135 } 1136 1137 /* reset the index after flattening */ 1138 for (i = 0; i < state_count; i++) 1139 pr->power.lpi_states[i].index = i; 1140 1141 pr->power.count = state_count; 1142 1143 /* Tell driver that _LPI is supported. */ 1144 pr->flags.has_lpi = 1; 1145 pr->flags.power = 1; 1146 1147 return 0; 1148 } 1149 1150 int __weak acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi) 1151 { 1152 return -ENODEV; 1153 } 1154 1155 /** 1156 * acpi_idle_lpi_enter - enters an ACPI any LPI state 1157 * @dev: the target CPU 1158 * @drv: cpuidle driver containing cpuidle state info 1159 * @index: index of target state 1160 * 1161 * Return: 0 for success or negative value for error 1162 */ 1163 static int acpi_idle_lpi_enter(struct cpuidle_device *dev, 1164 struct cpuidle_driver *drv, int index) 1165 { 1166 struct acpi_processor *pr; 1167 struct acpi_lpi_state *lpi; 1168 1169 pr = __this_cpu_read(processors); 1170 1171 if (unlikely(!pr)) 1172 return -EINVAL; 1173 1174 lpi = &pr->power.lpi_states[index]; 1175 if (lpi->entry_method == ACPI_CSTATE_FFH) 1176 return acpi_processor_ffh_lpi_enter(lpi); 1177 1178 return -EINVAL; 1179 } 1180 1181 static int acpi_processor_setup_lpi_states(struct acpi_processor *pr) 1182 { 1183 int i; 1184 struct acpi_lpi_state *lpi; 1185 struct cpuidle_state *state; 1186 struct cpuidle_driver *drv = &acpi_idle_driver; 1187 1188 if (!pr->flags.has_lpi) 1189 return -EOPNOTSUPP; 1190 1191 for (i = 0; i < pr->power.count && i < CPUIDLE_STATE_MAX; i++) { 1192 lpi = &pr->power.lpi_states[i]; 1193 1194 state = &drv->states[i]; 1195 snprintf(state->name, CPUIDLE_NAME_LEN, "LPI-%d", i); 1196 strscpy(state->desc, lpi->desc, CPUIDLE_DESC_LEN); 1197 state->exit_latency = lpi->wake_latency; 1198 state->target_residency = lpi->min_residency; 1199 state->flags |= arch_get_idle_state_flags(lpi->arch_flags); 1200 if (i != 0 && lpi->entry_method == ACPI_CSTATE_FFH) 1201 state->flags |= CPUIDLE_FLAG_RCU_IDLE; 1202 state->enter = acpi_idle_lpi_enter; 1203 drv->safe_state_index = i; 1204 } 1205 1206 drv->state_count = i; 1207 1208 return 0; 1209 } 1210 1211 /** 1212 * acpi_processor_setup_cpuidle_states- prepares and configures cpuidle 1213 * global state data i.e. idle routines 1214 * 1215 * @pr: the ACPI processor 1216 */ 1217 static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr) 1218 { 1219 int i; 1220 struct cpuidle_driver *drv = &acpi_idle_driver; 1221 1222 if (!pr->flags.power_setup_done || !pr->flags.power) 1223 return -EINVAL; 1224 1225 drv->safe_state_index = -1; 1226 for (i = ACPI_IDLE_STATE_START; i < CPUIDLE_STATE_MAX; i++) { 1227 drv->states[i].name[0] = '\0'; 1228 drv->states[i].desc[0] = '\0'; 1229 } 1230 1231 if (pr->flags.has_lpi) 1232 return acpi_processor_setup_lpi_states(pr); 1233 1234 acpi_processor_setup_cstates(pr); 1235 return 0; 1236 } 1237 1238 /** 1239 * acpi_processor_setup_cpuidle_dev - prepares and configures CPUIDLE 1240 * device i.e. per-cpu data 1241 * 1242 * @pr: the ACPI processor 1243 * @dev : the cpuidle device 1244 */ 1245 static int acpi_processor_setup_cpuidle_dev(struct acpi_processor *pr, 1246 struct cpuidle_device *dev) 1247 { 1248 if (!pr->flags.power_setup_done || !pr->flags.power || !dev) 1249 return -EINVAL; 1250 1251 dev->cpu = pr->id; 1252 if (pr->flags.has_lpi) 1253 return acpi_processor_ffh_lpi_probe(pr->id); 1254 1255 acpi_processor_setup_cpuidle_cx(pr, dev); 1256 return 0; 1257 } 1258 1259 static int acpi_processor_get_power_info(struct acpi_processor *pr) 1260 { 1261 int ret; 1262 1263 ret = acpi_processor_get_lpi_info(pr); 1264 if (ret) 1265 ret = acpi_processor_get_cstate_info(pr); 1266 1267 return ret; 1268 } 1269 1270 int acpi_processor_hotplug(struct acpi_processor *pr) 1271 { 1272 int ret = 0; 1273 struct cpuidle_device *dev; 1274 1275 if (disabled_by_idle_boot_param()) 1276 return 0; 1277 1278 if (!pr->flags.power_setup_done) 1279 return -ENODEV; 1280 1281 dev = per_cpu(acpi_cpuidle_device, pr->id); 1282 cpuidle_pause_and_lock(); 1283 cpuidle_disable_device(dev); 1284 ret = acpi_processor_get_power_info(pr); 1285 if (!ret && pr->flags.power) { 1286 acpi_processor_setup_cpuidle_dev(pr, dev); 1287 ret = cpuidle_enable_device(dev); 1288 } 1289 cpuidle_resume_and_unlock(); 1290 1291 return ret; 1292 } 1293 1294 int acpi_processor_power_state_has_changed(struct acpi_processor *pr) 1295 { 1296 int cpu; 1297 struct acpi_processor *_pr; 1298 struct cpuidle_device *dev; 1299 1300 if (disabled_by_idle_boot_param()) 1301 return 0; 1302 1303 if (!pr->flags.power_setup_done) 1304 return -ENODEV; 1305 1306 /* 1307 * FIXME: Design the ACPI notification to make it once per 1308 * system instead of once per-cpu. This condition is a hack 1309 * to make the code that updates C-States be called once. 1310 */ 1311 1312 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) { 1313 1314 /* Protect against cpu-hotplug */ 1315 cpus_read_lock(); 1316 cpuidle_pause_and_lock(); 1317 1318 /* Disable all cpuidle devices */ 1319 for_each_online_cpu(cpu) { 1320 _pr = per_cpu(processors, cpu); 1321 if (!_pr || !_pr->flags.power_setup_done) 1322 continue; 1323 dev = per_cpu(acpi_cpuidle_device, cpu); 1324 cpuidle_disable_device(dev); 1325 } 1326 1327 /* Populate Updated C-state information */ 1328 acpi_processor_get_power_info(pr); 1329 acpi_processor_setup_cpuidle_states(pr); 1330 1331 /* Enable all cpuidle devices */ 1332 for_each_online_cpu(cpu) { 1333 _pr = per_cpu(processors, cpu); 1334 if (!_pr || !_pr->flags.power_setup_done) 1335 continue; 1336 acpi_processor_get_power_info(_pr); 1337 if (_pr->flags.power) { 1338 dev = per_cpu(acpi_cpuidle_device, cpu); 1339 acpi_processor_setup_cpuidle_dev(_pr, dev); 1340 cpuidle_enable_device(dev); 1341 } 1342 } 1343 cpuidle_resume_and_unlock(); 1344 cpus_read_unlock(); 1345 } 1346 1347 return 0; 1348 } 1349 1350 static int acpi_processor_registered; 1351 1352 int acpi_processor_power_init(struct acpi_processor *pr) 1353 { 1354 int retval; 1355 struct cpuidle_device *dev; 1356 1357 if (disabled_by_idle_boot_param()) 1358 return 0; 1359 1360 acpi_processor_cstate_first_run_checks(); 1361 1362 if (!acpi_processor_get_power_info(pr)) 1363 pr->flags.power_setup_done = 1; 1364 1365 /* 1366 * Install the idle handler if processor power management is supported. 1367 * Note that we use previously set idle handler will be used on 1368 * platforms that only support C1. 1369 */ 1370 if (pr->flags.power) { 1371 /* Register acpi_idle_driver if not already registered */ 1372 if (!acpi_processor_registered) { 1373 acpi_processor_setup_cpuidle_states(pr); 1374 retval = cpuidle_register_driver(&acpi_idle_driver); 1375 if (retval) 1376 return retval; 1377 pr_debug("%s registered with cpuidle\n", 1378 acpi_idle_driver.name); 1379 } 1380 1381 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1382 if (!dev) 1383 return -ENOMEM; 1384 per_cpu(acpi_cpuidle_device, pr->id) = dev; 1385 1386 acpi_processor_setup_cpuidle_dev(pr, dev); 1387 1388 /* Register per-cpu cpuidle_device. Cpuidle driver 1389 * must already be registered before registering device 1390 */ 1391 retval = cpuidle_register_device(dev); 1392 if (retval) { 1393 if (acpi_processor_registered == 0) 1394 cpuidle_unregister_driver(&acpi_idle_driver); 1395 1396 per_cpu(acpi_cpuidle_device, pr->id) = NULL; 1397 kfree(dev); 1398 return retval; 1399 } 1400 acpi_processor_registered++; 1401 } 1402 return 0; 1403 } 1404 1405 int acpi_processor_power_exit(struct acpi_processor *pr) 1406 { 1407 struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id); 1408 1409 if (disabled_by_idle_boot_param()) 1410 return 0; 1411 1412 if (pr->flags.power) { 1413 cpuidle_unregister_device(dev); 1414 acpi_processor_registered--; 1415 if (acpi_processor_registered == 0) 1416 cpuidle_unregister_driver(&acpi_idle_driver); 1417 1418 kfree(dev); 1419 } 1420 1421 pr->flags.power_setup_done = 0; 1422 return 0; 1423 } 1424 1425 MODULE_IMPORT_NS("ACPI_PROCESSOR_IDLE"); 1426