1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * processor_idle - idle state submodule to the ACPI processor driver 4 * 5 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> 6 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> 7 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de> 8 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> 9 * - Added processor hotplug support 10 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> 11 * - Added support for C3 on SMP 12 */ 13 #define pr_fmt(fmt) "ACPI: " fmt 14 15 #include <linux/module.h> 16 #include <linux/acpi.h> 17 #include <linux/dmi.h> 18 #include <linux/sched.h> /* need_resched() */ 19 #include <linux/sort.h> 20 #include <linux/tick.h> 21 #include <linux/cpuidle.h> 22 #include <linux/cpu.h> 23 #include <linux/minmax.h> 24 #include <linux/perf_event.h> 25 #include <acpi/processor.h> 26 #include <linux/context_tracking.h> 27 28 /* 29 * Include the apic definitions for x86 to have the APIC timer related defines 30 * available also for UP (on SMP it gets magically included via linux/smp.h). 31 * asm/acpi.h is not an option, as it would require more include magic. Also 32 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera. 33 */ 34 #ifdef CONFIG_X86 35 #include <asm/apic.h> 36 #include <asm/cpu.h> 37 #endif 38 39 #define ACPI_IDLE_STATE_START (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX) ? 1 : 0) 40 41 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER; 42 module_param(max_cstate, uint, 0400); 43 static bool nocst __read_mostly; 44 module_param(nocst, bool, 0400); 45 static bool bm_check_disable __read_mostly; 46 module_param(bm_check_disable, bool, 0400); 47 48 static unsigned int latency_factor __read_mostly = 2; 49 module_param(latency_factor, uint, 0644); 50 51 static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device); 52 53 struct cpuidle_driver acpi_idle_driver = { 54 .name = "acpi_idle", 55 .owner = THIS_MODULE, 56 }; 57 58 #ifdef CONFIG_ACPI_PROCESSOR_CSTATE 59 static 60 DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], acpi_cstate); 61 62 static int disabled_by_idle_boot_param(void) 63 { 64 return boot_option_idle_override == IDLE_POLL || 65 boot_option_idle_override == IDLE_HALT; 66 } 67 68 /* 69 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. 70 * For now disable this. Probably a bug somewhere else. 71 * 72 * To skip this limit, boot/load with a large max_cstate limit. 73 */ 74 static int set_max_cstate(const struct dmi_system_id *id) 75 { 76 if (max_cstate > ACPI_PROCESSOR_MAX_POWER) 77 return 0; 78 79 pr_notice("%s detected - limiting to C%ld max_cstate." 80 " Override with \"processor.max_cstate=%d\"\n", id->ident, 81 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); 82 83 max_cstate = (long)id->driver_data; 84 85 return 0; 86 } 87 88 static const struct dmi_system_id processor_power_dmi_table[] = { 89 { set_max_cstate, "Clevo 5600D", { 90 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), 91 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, 92 (void *)2}, 93 { set_max_cstate, "Pavilion zv5000", { 94 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 95 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")}, 96 (void *)1}, 97 { set_max_cstate, "Asus L8400B", { 98 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."), 99 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")}, 100 (void *)1}, 101 {}, 102 }; 103 104 105 /* 106 * Callers should disable interrupts before the call and enable 107 * interrupts after return. 108 */ 109 static void __cpuidle acpi_safe_halt(void) 110 { 111 if (!tif_need_resched()) { 112 raw_safe_halt(); 113 raw_local_irq_disable(); 114 } 115 } 116 117 #ifdef ARCH_APICTIMER_STOPS_ON_C3 118 119 /* 120 * Some BIOS implementations switch to C3 in the published C2 state. 121 * This seems to be a common problem on AMD boxen, but other vendors 122 * are affected too. We pick the most conservative approach: we assume 123 * that the local APIC stops in both C2 and C3. 124 */ 125 static void lapic_timer_check_state(int state, struct acpi_processor *pr, 126 struct acpi_processor_cx *cx) 127 { 128 struct acpi_processor_power *pwr = &pr->power; 129 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2; 130 131 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT)) 132 return; 133 134 if (boot_cpu_has_bug(X86_BUG_AMD_APIC_C1E)) 135 type = ACPI_STATE_C1; 136 137 /* 138 * Check, if one of the previous states already marked the lapic 139 * unstable 140 */ 141 if (pwr->timer_broadcast_on_state < state) 142 return; 143 144 if (cx->type >= type) 145 pr->power.timer_broadcast_on_state = state; 146 } 147 148 static void __lapic_timer_propagate_broadcast(void *arg) 149 { 150 struct acpi_processor *pr = arg; 151 152 if (pr->power.timer_broadcast_on_state < INT_MAX) 153 tick_broadcast_enable(); 154 else 155 tick_broadcast_disable(); 156 } 157 158 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) 159 { 160 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast, 161 (void *)pr, 1); 162 } 163 164 /* Power(C) State timer broadcast control */ 165 static bool lapic_timer_needs_broadcast(struct acpi_processor *pr, 166 struct acpi_processor_cx *cx) 167 { 168 return cx - pr->power.states >= pr->power.timer_broadcast_on_state; 169 } 170 171 #else 172 173 static void lapic_timer_check_state(int state, struct acpi_processor *pr, 174 struct acpi_processor_cx *cstate) { } 175 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { } 176 177 static bool lapic_timer_needs_broadcast(struct acpi_processor *pr, 178 struct acpi_processor_cx *cx) 179 { 180 return false; 181 } 182 183 #endif 184 185 #if defined(CONFIG_X86) 186 static void tsc_check_state(int state) 187 { 188 switch (boot_cpu_data.x86_vendor) { 189 case X86_VENDOR_HYGON: 190 case X86_VENDOR_AMD: 191 case X86_VENDOR_INTEL: 192 case X86_VENDOR_CENTAUR: 193 case X86_VENDOR_ZHAOXIN: 194 /* 195 * AMD Fam10h TSC will tick in all 196 * C/P/S0/S1 states when this bit is set. 197 */ 198 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) 199 return; 200 fallthrough; 201 default: 202 /* TSC could halt in idle, so notify users */ 203 if (state > ACPI_STATE_C1) 204 mark_tsc_unstable("TSC halts in idle"); 205 } 206 } 207 #else 208 static void tsc_check_state(int state) { return; } 209 #endif 210 211 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) 212 { 213 214 if (!pr->pblk) 215 return -ENODEV; 216 217 /* if info is obtained from pblk/fadt, type equals state */ 218 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; 219 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; 220 221 #ifndef CONFIG_HOTPLUG_CPU 222 /* 223 * Check for P_LVL2_UP flag before entering C2 and above on 224 * an SMP system. 225 */ 226 if ((num_online_cpus() > 1) && 227 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) 228 return -ENODEV; 229 #endif 230 231 /* determine C2 and C3 address from pblk */ 232 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; 233 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; 234 235 /* determine latencies from FADT */ 236 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency; 237 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency; 238 239 /* 240 * FADT specified C2 latency must be less than or equal to 241 * 100 microseconds. 242 */ 243 if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { 244 acpi_handle_debug(pr->handle, "C2 latency too large [%d]\n", 245 acpi_gbl_FADT.c2_latency); 246 /* invalidate C2 */ 247 pr->power.states[ACPI_STATE_C2].address = 0; 248 } 249 250 /* 251 * FADT supplied C3 latency must be less than or equal to 252 * 1000 microseconds. 253 */ 254 if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { 255 acpi_handle_debug(pr->handle, "C3 latency too large [%d]\n", 256 acpi_gbl_FADT.c3_latency); 257 /* invalidate C3 */ 258 pr->power.states[ACPI_STATE_C3].address = 0; 259 } 260 261 acpi_handle_debug(pr->handle, "lvl2[0x%08x] lvl3[0x%08x]\n", 262 pr->power.states[ACPI_STATE_C2].address, 263 pr->power.states[ACPI_STATE_C3].address); 264 265 snprintf(pr->power.states[ACPI_STATE_C2].desc, 266 ACPI_CX_DESC_LEN, "ACPI P_LVL2 IOPORT 0x%x", 267 pr->power.states[ACPI_STATE_C2].address); 268 snprintf(pr->power.states[ACPI_STATE_C3].desc, 269 ACPI_CX_DESC_LEN, "ACPI P_LVL3 IOPORT 0x%x", 270 pr->power.states[ACPI_STATE_C3].address); 271 272 return 0; 273 } 274 275 static int acpi_processor_get_power_info_default(struct acpi_processor *pr) 276 { 277 if (!pr->power.states[ACPI_STATE_C1].valid) { 278 /* set the first C-State to C1 */ 279 /* all processors need to support C1 */ 280 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; 281 pr->power.states[ACPI_STATE_C1].valid = 1; 282 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT; 283 284 snprintf(pr->power.states[ACPI_STATE_C1].desc, 285 ACPI_CX_DESC_LEN, "ACPI HLT"); 286 } 287 /* the C0 state only exists as a filler in our array */ 288 pr->power.states[ACPI_STATE_C0].valid = 1; 289 return 0; 290 } 291 292 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) 293 { 294 int ret; 295 296 if (nocst) 297 return -ENODEV; 298 299 ret = acpi_processor_evaluate_cst(pr->handle, pr->id, &pr->power); 300 if (ret) 301 return ret; 302 303 if (!pr->power.count) 304 return -EFAULT; 305 306 pr->flags.has_cst = 1; 307 return 0; 308 } 309 310 static void acpi_processor_power_verify_c3(struct acpi_processor *pr, 311 struct acpi_processor_cx *cx) 312 { 313 static int bm_check_flag = -1; 314 static int bm_control_flag = -1; 315 316 317 if (!cx->address) 318 return; 319 320 /* 321 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) 322 * DMA transfers are used by any ISA device to avoid livelock. 323 * Note that we could disable Type-F DMA (as recommended by 324 * the erratum), but this is known to disrupt certain ISA 325 * devices thus we take the conservative approach. 326 */ 327 if (errata.piix4.fdma) { 328 acpi_handle_debug(pr->handle, 329 "C3 not supported on PIIX4 with Type-F DMA\n"); 330 return; 331 } 332 333 /* All the logic here assumes flags.bm_check is same across all CPUs */ 334 if (bm_check_flag == -1) { 335 /* Determine whether bm_check is needed based on CPU */ 336 acpi_processor_power_init_bm_check(&(pr->flags), pr->id); 337 bm_check_flag = pr->flags.bm_check; 338 bm_control_flag = pr->flags.bm_control; 339 } else { 340 pr->flags.bm_check = bm_check_flag; 341 pr->flags.bm_control = bm_control_flag; 342 } 343 344 if (pr->flags.bm_check) { 345 if (!pr->flags.bm_control) { 346 if (pr->flags.has_cst != 1) { 347 /* bus mastering control is necessary */ 348 acpi_handle_debug(pr->handle, 349 "C3 support requires BM control\n"); 350 return; 351 } else { 352 /* Here we enter C3 without bus mastering */ 353 acpi_handle_debug(pr->handle, 354 "C3 support without BM control\n"); 355 } 356 } 357 } else { 358 /* 359 * WBINVD should be set in fadt, for C3 state to be 360 * supported on when bm_check is not required. 361 */ 362 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) { 363 acpi_handle_debug(pr->handle, 364 "Cache invalidation should work properly" 365 " for C3 to be enabled on SMP systems\n"); 366 return; 367 } 368 } 369 370 /* 371 * Otherwise we've met all of our C3 requirements. 372 * Normalize the C3 latency to expidite policy. Enable 373 * checking of bus mastering status (bm_check) so we can 374 * use this in our C3 policy 375 */ 376 cx->valid = 1; 377 378 /* 379 * On older chipsets, BM_RLD needs to be set 380 * in order for Bus Master activity to wake the 381 * system from C3. Newer chipsets handle DMA 382 * during C3 automatically and BM_RLD is a NOP. 383 * In either case, the proper way to 384 * handle BM_RLD is to set it and leave it set. 385 */ 386 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1); 387 } 388 389 static int acpi_cst_latency_cmp(const void *a, const void *b) 390 { 391 const struct acpi_processor_cx *x = a, *y = b; 392 393 if (!(x->valid && y->valid)) 394 return 0; 395 if (x->latency > y->latency) 396 return 1; 397 if (x->latency < y->latency) 398 return -1; 399 return 0; 400 } 401 static void acpi_cst_latency_swap(void *a, void *b, int n) 402 { 403 struct acpi_processor_cx *x = a, *y = b; 404 405 if (!(x->valid && y->valid)) 406 return; 407 swap(x->latency, y->latency); 408 } 409 410 static int acpi_processor_power_verify(struct acpi_processor *pr) 411 { 412 unsigned int i; 413 unsigned int working = 0; 414 unsigned int last_latency = 0; 415 unsigned int last_type = 0; 416 bool buggy_latency = false; 417 418 pr->power.timer_broadcast_on_state = INT_MAX; 419 420 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 421 struct acpi_processor_cx *cx = &pr->power.states[i]; 422 423 switch (cx->type) { 424 case ACPI_STATE_C1: 425 cx->valid = 1; 426 break; 427 428 case ACPI_STATE_C2: 429 if (!cx->address) 430 break; 431 cx->valid = 1; 432 break; 433 434 case ACPI_STATE_C3: 435 acpi_processor_power_verify_c3(pr, cx); 436 break; 437 } 438 if (!cx->valid) 439 continue; 440 if (cx->type >= last_type && cx->latency < last_latency) 441 buggy_latency = true; 442 last_latency = cx->latency; 443 last_type = cx->type; 444 445 lapic_timer_check_state(i, pr, cx); 446 tsc_check_state(cx->type); 447 working++; 448 } 449 450 if (buggy_latency) { 451 pr_notice("FW issue: working around C-state latencies out of order\n"); 452 sort(&pr->power.states[1], max_cstate, 453 sizeof(struct acpi_processor_cx), 454 acpi_cst_latency_cmp, 455 acpi_cst_latency_swap); 456 } 457 458 lapic_timer_propagate_broadcast(pr); 459 460 return working; 461 } 462 463 static int acpi_processor_get_cstate_info(struct acpi_processor *pr) 464 { 465 unsigned int i; 466 int result; 467 468 469 /* NOTE: the idle thread may not be running while calling 470 * this function */ 471 472 /* Zero initialize all the C-states info. */ 473 memset(pr->power.states, 0, sizeof(pr->power.states)); 474 475 result = acpi_processor_get_power_info_cst(pr); 476 if (result == -ENODEV) 477 result = acpi_processor_get_power_info_fadt(pr); 478 479 if (result) 480 return result; 481 482 acpi_processor_get_power_info_default(pr); 483 484 pr->power.count = acpi_processor_power_verify(pr); 485 486 /* 487 * if one state of type C2 or C3 is available, mark this 488 * CPU as being "idle manageable" 489 */ 490 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { 491 if (pr->power.states[i].valid) { 492 pr->power.count = i; 493 pr->flags.power = 1; 494 } 495 } 496 497 return 0; 498 } 499 500 /** 501 * acpi_idle_bm_check - checks if bus master activity was detected 502 */ 503 static int acpi_idle_bm_check(void) 504 { 505 u32 bm_status = 0; 506 507 if (bm_check_disable) 508 return 0; 509 510 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status); 511 if (bm_status) 512 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1); 513 /* 514 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect 515 * the true state of bus mastering activity; forcing us to 516 * manually check the BMIDEA bit of each IDE channel. 517 */ 518 else if (errata.piix4.bmisx) { 519 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) 520 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) 521 bm_status = 1; 522 } 523 return bm_status; 524 } 525 526 static __cpuidle void io_idle(unsigned long addr) 527 { 528 /* IO port based C-state */ 529 inb(addr); 530 531 #ifdef CONFIG_X86 532 /* No delay is needed if we are in guest */ 533 if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) 534 return; 535 /* 536 * Modern (>=Nehalem) Intel systems use ACPI via intel_idle, 537 * not this code. Assume that any Intel systems using this 538 * are ancient and may need the dummy wait. This also assumes 539 * that the motivating chipset issue was Intel-only. 540 */ 541 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) 542 return; 543 #endif 544 /* 545 * Dummy wait op - must do something useless after P_LVL2 read 546 * because chipsets cannot guarantee that STPCLK# signal gets 547 * asserted in time to freeze execution properly 548 * 549 * This workaround has been in place since the original ACPI 550 * implementation was merged, circa 2002. 551 * 552 * If a profile is pointing to this instruction, please first 553 * consider moving your system to a more modern idle 554 * mechanism. 555 */ 556 inl(acpi_gbl_FADT.xpm_timer_block.address); 557 } 558 559 /** 560 * acpi_idle_do_entry - enter idle state using the appropriate method 561 * @cx: cstate data 562 * 563 * Caller disables interrupt before call and enables interrupt after return. 564 */ 565 static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx) 566 { 567 perf_lopwr_cb(true); 568 569 if (cx->entry_method == ACPI_CSTATE_FFH) { 570 /* Call into architectural FFH based C-state */ 571 acpi_processor_ffh_cstate_enter(cx); 572 } else if (cx->entry_method == ACPI_CSTATE_HALT) { 573 acpi_safe_halt(); 574 } else { 575 io_idle(cx->address); 576 } 577 578 perf_lopwr_cb(false); 579 } 580 581 /** 582 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining) 583 * @dev: the target CPU 584 * @index: the index of suggested state 585 */ 586 static int acpi_idle_play_dead(struct cpuidle_device *dev, int index) 587 { 588 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 589 590 ACPI_FLUSH_CPU_CACHE(); 591 592 while (1) { 593 594 if (cx->entry_method == ACPI_CSTATE_HALT) 595 safe_halt(); 596 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) { 597 io_idle(cx->address); 598 } else 599 return -ENODEV; 600 601 #if defined(CONFIG_X86) && defined(CONFIG_HOTPLUG_CPU) 602 cond_wakeup_cpu0(); 603 #endif 604 } 605 606 /* Never reached */ 607 return 0; 608 } 609 610 static __always_inline bool acpi_idle_fallback_to_c1(struct acpi_processor *pr) 611 { 612 return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst && 613 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED); 614 } 615 616 static int c3_cpu_count; 617 static DEFINE_RAW_SPINLOCK(c3_lock); 618 619 /** 620 * acpi_idle_enter_bm - enters C3 with proper BM handling 621 * @drv: cpuidle driver 622 * @pr: Target processor 623 * @cx: Target state context 624 * @index: index of target state 625 */ 626 static int __cpuidle acpi_idle_enter_bm(struct cpuidle_driver *drv, 627 struct acpi_processor *pr, 628 struct acpi_processor_cx *cx, 629 int index) 630 { 631 static struct acpi_processor_cx safe_cx = { 632 .entry_method = ACPI_CSTATE_HALT, 633 }; 634 635 /* 636 * disable bus master 637 * bm_check implies we need ARB_DIS 638 * bm_control implies whether we can do ARB_DIS 639 * 640 * That leaves a case where bm_check is set and bm_control is not set. 641 * In that case we cannot do much, we enter C3 without doing anything. 642 */ 643 bool dis_bm = pr->flags.bm_control; 644 645 instrumentation_begin(); 646 647 /* If we can skip BM, demote to a safe state. */ 648 if (!cx->bm_sts_skip && acpi_idle_bm_check()) { 649 dis_bm = false; 650 index = drv->safe_state_index; 651 if (index >= 0) { 652 cx = this_cpu_read(acpi_cstate[index]); 653 } else { 654 cx = &safe_cx; 655 index = -EBUSY; 656 } 657 } 658 659 if (dis_bm) { 660 raw_spin_lock(&c3_lock); 661 c3_cpu_count++; 662 /* Disable bus master arbitration when all CPUs are in C3 */ 663 if (c3_cpu_count == num_online_cpus()) 664 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1); 665 raw_spin_unlock(&c3_lock); 666 } 667 668 ct_cpuidle_enter(); 669 670 acpi_idle_do_entry(cx); 671 672 ct_cpuidle_exit(); 673 674 /* Re-enable bus master arbitration */ 675 if (dis_bm) { 676 raw_spin_lock(&c3_lock); 677 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0); 678 c3_cpu_count--; 679 raw_spin_unlock(&c3_lock); 680 } 681 682 instrumentation_end(); 683 684 return index; 685 } 686 687 static int __cpuidle acpi_idle_enter(struct cpuidle_device *dev, 688 struct cpuidle_driver *drv, int index) 689 { 690 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 691 struct acpi_processor *pr; 692 693 pr = __this_cpu_read(processors); 694 if (unlikely(!pr)) 695 return -EINVAL; 696 697 if (cx->type != ACPI_STATE_C1) { 698 if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check) 699 return acpi_idle_enter_bm(drv, pr, cx, index); 700 701 /* C2 to C1 demotion. */ 702 if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) { 703 index = ACPI_IDLE_STATE_START; 704 cx = per_cpu(acpi_cstate[index], dev->cpu); 705 } 706 } 707 708 if (cx->type == ACPI_STATE_C3) 709 ACPI_FLUSH_CPU_CACHE(); 710 711 acpi_idle_do_entry(cx); 712 713 return index; 714 } 715 716 static int __cpuidle acpi_idle_enter_s2idle(struct cpuidle_device *dev, 717 struct cpuidle_driver *drv, int index) 718 { 719 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 720 721 if (cx->type == ACPI_STATE_C3) { 722 struct acpi_processor *pr = __this_cpu_read(processors); 723 724 if (unlikely(!pr)) 725 return 0; 726 727 if (pr->flags.bm_check) { 728 u8 bm_sts_skip = cx->bm_sts_skip; 729 730 /* Don't check BM_STS, do an unconditional ARB_DIS for S2IDLE */ 731 cx->bm_sts_skip = 1; 732 acpi_idle_enter_bm(drv, pr, cx, index); 733 cx->bm_sts_skip = bm_sts_skip; 734 735 return 0; 736 } else { 737 ACPI_FLUSH_CPU_CACHE(); 738 } 739 } 740 acpi_idle_do_entry(cx); 741 742 return 0; 743 } 744 745 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr, 746 struct cpuidle_device *dev) 747 { 748 int i, count = ACPI_IDLE_STATE_START; 749 struct acpi_processor_cx *cx; 750 struct cpuidle_state *state; 751 752 if (max_cstate == 0) 753 max_cstate = 1; 754 755 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 756 state = &acpi_idle_driver.states[count]; 757 cx = &pr->power.states[i]; 758 759 if (!cx->valid) 760 continue; 761 762 per_cpu(acpi_cstate[count], dev->cpu) = cx; 763 764 if (lapic_timer_needs_broadcast(pr, cx)) 765 state->flags |= CPUIDLE_FLAG_TIMER_STOP; 766 767 if (cx->type == ACPI_STATE_C3) { 768 state->flags |= CPUIDLE_FLAG_TLB_FLUSHED; 769 if (pr->flags.bm_check) 770 state->flags |= CPUIDLE_FLAG_RCU_IDLE; 771 } 772 773 count++; 774 if (count == CPUIDLE_STATE_MAX) 775 break; 776 } 777 778 if (!count) 779 return -EINVAL; 780 781 return 0; 782 } 783 784 static int acpi_processor_setup_cstates(struct acpi_processor *pr) 785 { 786 int i, count; 787 struct acpi_processor_cx *cx; 788 struct cpuidle_state *state; 789 struct cpuidle_driver *drv = &acpi_idle_driver; 790 791 if (max_cstate == 0) 792 max_cstate = 1; 793 794 if (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX)) { 795 cpuidle_poll_state_init(drv); 796 count = 1; 797 } else { 798 count = 0; 799 } 800 801 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 802 cx = &pr->power.states[i]; 803 804 if (!cx->valid) 805 continue; 806 807 state = &drv->states[count]; 808 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i); 809 strscpy(state->desc, cx->desc, CPUIDLE_DESC_LEN); 810 state->exit_latency = cx->latency; 811 state->target_residency = cx->latency * latency_factor; 812 state->enter = acpi_idle_enter; 813 814 state->flags = 0; 815 if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2 || 816 cx->type == ACPI_STATE_C3) { 817 state->enter_dead = acpi_idle_play_dead; 818 if (cx->type != ACPI_STATE_C3) 819 drv->safe_state_index = count; 820 } 821 /* 822 * Halt-induced C1 is not good for ->enter_s2idle, because it 823 * re-enables interrupts on exit. Moreover, C1 is generally not 824 * particularly interesting from the suspend-to-idle angle, so 825 * avoid C1 and the situations in which we may need to fall back 826 * to it altogether. 827 */ 828 if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr)) 829 state->enter_s2idle = acpi_idle_enter_s2idle; 830 831 count++; 832 if (count == CPUIDLE_STATE_MAX) 833 break; 834 } 835 836 drv->state_count = count; 837 838 if (!count) 839 return -EINVAL; 840 841 return 0; 842 } 843 844 static inline void acpi_processor_cstate_first_run_checks(void) 845 { 846 static int first_run; 847 848 if (first_run) 849 return; 850 dmi_check_system(processor_power_dmi_table); 851 max_cstate = acpi_processor_cstate_check(max_cstate); 852 if (max_cstate < ACPI_C_STATES_MAX) 853 pr_notice("processor limited to max C-state %d\n", max_cstate); 854 855 first_run++; 856 857 if (nocst) 858 return; 859 860 acpi_processor_claim_cst_control(); 861 } 862 #else 863 864 static inline int disabled_by_idle_boot_param(void) { return 0; } 865 static inline void acpi_processor_cstate_first_run_checks(void) { } 866 static int acpi_processor_get_cstate_info(struct acpi_processor *pr) 867 { 868 return -ENODEV; 869 } 870 871 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr, 872 struct cpuidle_device *dev) 873 { 874 return -EINVAL; 875 } 876 877 static int acpi_processor_setup_cstates(struct acpi_processor *pr) 878 { 879 return -EINVAL; 880 } 881 882 #endif /* CONFIG_ACPI_PROCESSOR_CSTATE */ 883 884 struct acpi_lpi_states_array { 885 unsigned int size; 886 unsigned int composite_states_size; 887 struct acpi_lpi_state *entries; 888 struct acpi_lpi_state *composite_states[ACPI_PROCESSOR_MAX_POWER]; 889 }; 890 891 static int obj_get_integer(union acpi_object *obj, u32 *value) 892 { 893 if (obj->type != ACPI_TYPE_INTEGER) 894 return -EINVAL; 895 896 *value = obj->integer.value; 897 return 0; 898 } 899 900 static int acpi_processor_evaluate_lpi(acpi_handle handle, 901 struct acpi_lpi_states_array *info) 902 { 903 acpi_status status; 904 int ret = 0; 905 int pkg_count, state_idx = 1, loop; 906 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; 907 union acpi_object *lpi_data; 908 struct acpi_lpi_state *lpi_state; 909 910 status = acpi_evaluate_object(handle, "_LPI", NULL, &buffer); 911 if (ACPI_FAILURE(status)) { 912 acpi_handle_debug(handle, "No _LPI, giving up\n"); 913 return -ENODEV; 914 } 915 916 lpi_data = buffer.pointer; 917 918 /* There must be at least 4 elements = 3 elements + 1 package */ 919 if (!lpi_data || lpi_data->type != ACPI_TYPE_PACKAGE || 920 lpi_data->package.count < 4) { 921 pr_debug("not enough elements in _LPI\n"); 922 ret = -ENODATA; 923 goto end; 924 } 925 926 pkg_count = lpi_data->package.elements[2].integer.value; 927 928 /* Validate number of power states. */ 929 if (pkg_count < 1 || pkg_count != lpi_data->package.count - 3) { 930 pr_debug("count given by _LPI is not valid\n"); 931 ret = -ENODATA; 932 goto end; 933 } 934 935 lpi_state = kcalloc(pkg_count, sizeof(*lpi_state), GFP_KERNEL); 936 if (!lpi_state) { 937 ret = -ENOMEM; 938 goto end; 939 } 940 941 info->size = pkg_count; 942 info->entries = lpi_state; 943 944 /* LPI States start at index 3 */ 945 for (loop = 3; state_idx <= pkg_count; loop++, state_idx++, lpi_state++) { 946 union acpi_object *element, *pkg_elem, *obj; 947 948 element = &lpi_data->package.elements[loop]; 949 if (element->type != ACPI_TYPE_PACKAGE || element->package.count < 7) 950 continue; 951 952 pkg_elem = element->package.elements; 953 954 obj = pkg_elem + 6; 955 if (obj->type == ACPI_TYPE_BUFFER) { 956 struct acpi_power_register *reg; 957 958 reg = (struct acpi_power_register *)obj->buffer.pointer; 959 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && 960 reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) 961 continue; 962 963 lpi_state->address = reg->address; 964 lpi_state->entry_method = 965 reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE ? 966 ACPI_CSTATE_FFH : ACPI_CSTATE_SYSTEMIO; 967 } else if (obj->type == ACPI_TYPE_INTEGER) { 968 lpi_state->entry_method = ACPI_CSTATE_INTEGER; 969 lpi_state->address = obj->integer.value; 970 } else { 971 continue; 972 } 973 974 /* elements[7,8] skipped for now i.e. Residency/Usage counter*/ 975 976 obj = pkg_elem + 9; 977 if (obj->type == ACPI_TYPE_STRING) 978 strscpy(lpi_state->desc, obj->string.pointer, 979 ACPI_CX_DESC_LEN); 980 981 lpi_state->index = state_idx; 982 if (obj_get_integer(pkg_elem + 0, &lpi_state->min_residency)) { 983 pr_debug("No min. residency found, assuming 10 us\n"); 984 lpi_state->min_residency = 10; 985 } 986 987 if (obj_get_integer(pkg_elem + 1, &lpi_state->wake_latency)) { 988 pr_debug("No wakeup residency found, assuming 10 us\n"); 989 lpi_state->wake_latency = 10; 990 } 991 992 if (obj_get_integer(pkg_elem + 2, &lpi_state->flags)) 993 lpi_state->flags = 0; 994 995 if (obj_get_integer(pkg_elem + 3, &lpi_state->arch_flags)) 996 lpi_state->arch_flags = 0; 997 998 if (obj_get_integer(pkg_elem + 4, &lpi_state->res_cnt_freq)) 999 lpi_state->res_cnt_freq = 1; 1000 1001 if (obj_get_integer(pkg_elem + 5, &lpi_state->enable_parent_state)) 1002 lpi_state->enable_parent_state = 0; 1003 } 1004 1005 acpi_handle_debug(handle, "Found %d power states\n", state_idx); 1006 end: 1007 kfree(buffer.pointer); 1008 return ret; 1009 } 1010 1011 /* 1012 * flat_state_cnt - the number of composite LPI states after the process of flattening 1013 */ 1014 static int flat_state_cnt; 1015 1016 /** 1017 * combine_lpi_states - combine local and parent LPI states to form a composite LPI state 1018 * 1019 * @local: local LPI state 1020 * @parent: parent LPI state 1021 * @result: composite LPI state 1022 */ 1023 static bool combine_lpi_states(struct acpi_lpi_state *local, 1024 struct acpi_lpi_state *parent, 1025 struct acpi_lpi_state *result) 1026 { 1027 if (parent->entry_method == ACPI_CSTATE_INTEGER) { 1028 if (!parent->address) /* 0 means autopromotable */ 1029 return false; 1030 result->address = local->address + parent->address; 1031 } else { 1032 result->address = parent->address; 1033 } 1034 1035 result->min_residency = max(local->min_residency, parent->min_residency); 1036 result->wake_latency = local->wake_latency + parent->wake_latency; 1037 result->enable_parent_state = parent->enable_parent_state; 1038 result->entry_method = local->entry_method; 1039 1040 result->flags = parent->flags; 1041 result->arch_flags = parent->arch_flags; 1042 result->index = parent->index; 1043 1044 strscpy(result->desc, local->desc, ACPI_CX_DESC_LEN); 1045 strlcat(result->desc, "+", ACPI_CX_DESC_LEN); 1046 strlcat(result->desc, parent->desc, ACPI_CX_DESC_LEN); 1047 return true; 1048 } 1049 1050 #define ACPI_LPI_STATE_FLAGS_ENABLED BIT(0) 1051 1052 static void stash_composite_state(struct acpi_lpi_states_array *curr_level, 1053 struct acpi_lpi_state *t) 1054 { 1055 curr_level->composite_states[curr_level->composite_states_size++] = t; 1056 } 1057 1058 static int flatten_lpi_states(struct acpi_processor *pr, 1059 struct acpi_lpi_states_array *curr_level, 1060 struct acpi_lpi_states_array *prev_level) 1061 { 1062 int i, j, state_count = curr_level->size; 1063 struct acpi_lpi_state *p, *t = curr_level->entries; 1064 1065 curr_level->composite_states_size = 0; 1066 for (j = 0; j < state_count; j++, t++) { 1067 struct acpi_lpi_state *flpi; 1068 1069 if (!(t->flags & ACPI_LPI_STATE_FLAGS_ENABLED)) 1070 continue; 1071 1072 if (flat_state_cnt >= ACPI_PROCESSOR_MAX_POWER) { 1073 pr_warn("Limiting number of LPI states to max (%d)\n", 1074 ACPI_PROCESSOR_MAX_POWER); 1075 pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); 1076 break; 1077 } 1078 1079 flpi = &pr->power.lpi_states[flat_state_cnt]; 1080 1081 if (!prev_level) { /* leaf/processor node */ 1082 memcpy(flpi, t, sizeof(*t)); 1083 stash_composite_state(curr_level, flpi); 1084 flat_state_cnt++; 1085 continue; 1086 } 1087 1088 for (i = 0; i < prev_level->composite_states_size; i++) { 1089 p = prev_level->composite_states[i]; 1090 if (t->index <= p->enable_parent_state && 1091 combine_lpi_states(p, t, flpi)) { 1092 stash_composite_state(curr_level, flpi); 1093 flat_state_cnt++; 1094 flpi++; 1095 } 1096 } 1097 } 1098 1099 kfree(curr_level->entries); 1100 return 0; 1101 } 1102 1103 int __weak acpi_processor_ffh_lpi_probe(unsigned int cpu) 1104 { 1105 return -EOPNOTSUPP; 1106 } 1107 1108 static int acpi_processor_get_lpi_info(struct acpi_processor *pr) 1109 { 1110 int ret, i; 1111 acpi_status status; 1112 acpi_handle handle = pr->handle, pr_ahandle; 1113 struct acpi_device *d = NULL; 1114 struct acpi_lpi_states_array info[2], *tmp, *prev, *curr; 1115 1116 /* make sure our architecture has support */ 1117 ret = acpi_processor_ffh_lpi_probe(pr->id); 1118 if (ret == -EOPNOTSUPP) 1119 return ret; 1120 1121 if (!osc_pc_lpi_support_confirmed) 1122 return -EOPNOTSUPP; 1123 1124 if (!acpi_has_method(handle, "_LPI")) 1125 return -EINVAL; 1126 1127 flat_state_cnt = 0; 1128 prev = &info[0]; 1129 curr = &info[1]; 1130 handle = pr->handle; 1131 ret = acpi_processor_evaluate_lpi(handle, prev); 1132 if (ret) 1133 return ret; 1134 flatten_lpi_states(pr, prev, NULL); 1135 1136 status = acpi_get_parent(handle, &pr_ahandle); 1137 while (ACPI_SUCCESS(status)) { 1138 d = acpi_fetch_acpi_dev(pr_ahandle); 1139 if (!d) 1140 break; 1141 1142 handle = pr_ahandle; 1143 1144 if (strcmp(acpi_device_hid(d), ACPI_PROCESSOR_CONTAINER_HID)) 1145 break; 1146 1147 /* can be optional ? */ 1148 if (!acpi_has_method(handle, "_LPI")) 1149 break; 1150 1151 ret = acpi_processor_evaluate_lpi(handle, curr); 1152 if (ret) 1153 break; 1154 1155 /* flatten all the LPI states in this level of hierarchy */ 1156 flatten_lpi_states(pr, curr, prev); 1157 1158 tmp = prev, prev = curr, curr = tmp; 1159 1160 status = acpi_get_parent(handle, &pr_ahandle); 1161 } 1162 1163 pr->power.count = flat_state_cnt; 1164 /* reset the index after flattening */ 1165 for (i = 0; i < pr->power.count; i++) 1166 pr->power.lpi_states[i].index = i; 1167 1168 /* Tell driver that _LPI is supported. */ 1169 pr->flags.has_lpi = 1; 1170 pr->flags.power = 1; 1171 1172 return 0; 1173 } 1174 1175 int __weak acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi) 1176 { 1177 return -ENODEV; 1178 } 1179 1180 /** 1181 * acpi_idle_lpi_enter - enters an ACPI any LPI state 1182 * @dev: the target CPU 1183 * @drv: cpuidle driver containing cpuidle state info 1184 * @index: index of target state 1185 * 1186 * Return: 0 for success or negative value for error 1187 */ 1188 static int acpi_idle_lpi_enter(struct cpuidle_device *dev, 1189 struct cpuidle_driver *drv, int index) 1190 { 1191 struct acpi_processor *pr; 1192 struct acpi_lpi_state *lpi; 1193 1194 pr = __this_cpu_read(processors); 1195 1196 if (unlikely(!pr)) 1197 return -EINVAL; 1198 1199 lpi = &pr->power.lpi_states[index]; 1200 if (lpi->entry_method == ACPI_CSTATE_FFH) 1201 return acpi_processor_ffh_lpi_enter(lpi); 1202 1203 return -EINVAL; 1204 } 1205 1206 static int acpi_processor_setup_lpi_states(struct acpi_processor *pr) 1207 { 1208 int i; 1209 struct acpi_lpi_state *lpi; 1210 struct cpuidle_state *state; 1211 struct cpuidle_driver *drv = &acpi_idle_driver; 1212 1213 if (!pr->flags.has_lpi) 1214 return -EOPNOTSUPP; 1215 1216 for (i = 0; i < pr->power.count && i < CPUIDLE_STATE_MAX; i++) { 1217 lpi = &pr->power.lpi_states[i]; 1218 1219 state = &drv->states[i]; 1220 snprintf(state->name, CPUIDLE_NAME_LEN, "LPI-%d", i); 1221 strscpy(state->desc, lpi->desc, CPUIDLE_DESC_LEN); 1222 state->exit_latency = lpi->wake_latency; 1223 state->target_residency = lpi->min_residency; 1224 if (lpi->arch_flags) 1225 state->flags |= CPUIDLE_FLAG_TIMER_STOP; 1226 if (i != 0 && lpi->entry_method == ACPI_CSTATE_FFH) 1227 state->flags |= CPUIDLE_FLAG_RCU_IDLE; 1228 state->enter = acpi_idle_lpi_enter; 1229 drv->safe_state_index = i; 1230 } 1231 1232 drv->state_count = i; 1233 1234 return 0; 1235 } 1236 1237 /** 1238 * acpi_processor_setup_cpuidle_states- prepares and configures cpuidle 1239 * global state data i.e. idle routines 1240 * 1241 * @pr: the ACPI processor 1242 */ 1243 static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr) 1244 { 1245 int i; 1246 struct cpuidle_driver *drv = &acpi_idle_driver; 1247 1248 if (!pr->flags.power_setup_done || !pr->flags.power) 1249 return -EINVAL; 1250 1251 drv->safe_state_index = -1; 1252 for (i = ACPI_IDLE_STATE_START; i < CPUIDLE_STATE_MAX; i++) { 1253 drv->states[i].name[0] = '\0'; 1254 drv->states[i].desc[0] = '\0'; 1255 } 1256 1257 if (pr->flags.has_lpi) 1258 return acpi_processor_setup_lpi_states(pr); 1259 1260 return acpi_processor_setup_cstates(pr); 1261 } 1262 1263 /** 1264 * acpi_processor_setup_cpuidle_dev - prepares and configures CPUIDLE 1265 * device i.e. per-cpu data 1266 * 1267 * @pr: the ACPI processor 1268 * @dev : the cpuidle device 1269 */ 1270 static int acpi_processor_setup_cpuidle_dev(struct acpi_processor *pr, 1271 struct cpuidle_device *dev) 1272 { 1273 if (!pr->flags.power_setup_done || !pr->flags.power || !dev) 1274 return -EINVAL; 1275 1276 dev->cpu = pr->id; 1277 if (pr->flags.has_lpi) 1278 return acpi_processor_ffh_lpi_probe(pr->id); 1279 1280 return acpi_processor_setup_cpuidle_cx(pr, dev); 1281 } 1282 1283 static int acpi_processor_get_power_info(struct acpi_processor *pr) 1284 { 1285 int ret; 1286 1287 ret = acpi_processor_get_lpi_info(pr); 1288 if (ret) 1289 ret = acpi_processor_get_cstate_info(pr); 1290 1291 return ret; 1292 } 1293 1294 int acpi_processor_hotplug(struct acpi_processor *pr) 1295 { 1296 int ret = 0; 1297 struct cpuidle_device *dev; 1298 1299 if (disabled_by_idle_boot_param()) 1300 return 0; 1301 1302 if (!pr->flags.power_setup_done) 1303 return -ENODEV; 1304 1305 dev = per_cpu(acpi_cpuidle_device, pr->id); 1306 cpuidle_pause_and_lock(); 1307 cpuidle_disable_device(dev); 1308 ret = acpi_processor_get_power_info(pr); 1309 if (!ret && pr->flags.power) { 1310 acpi_processor_setup_cpuidle_dev(pr, dev); 1311 ret = cpuidle_enable_device(dev); 1312 } 1313 cpuidle_resume_and_unlock(); 1314 1315 return ret; 1316 } 1317 1318 int acpi_processor_power_state_has_changed(struct acpi_processor *pr) 1319 { 1320 int cpu; 1321 struct acpi_processor *_pr; 1322 struct cpuidle_device *dev; 1323 1324 if (disabled_by_idle_boot_param()) 1325 return 0; 1326 1327 if (!pr->flags.power_setup_done) 1328 return -ENODEV; 1329 1330 /* 1331 * FIXME: Design the ACPI notification to make it once per 1332 * system instead of once per-cpu. This condition is a hack 1333 * to make the code that updates C-States be called once. 1334 */ 1335 1336 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) { 1337 1338 /* Protect against cpu-hotplug */ 1339 cpus_read_lock(); 1340 cpuidle_pause_and_lock(); 1341 1342 /* Disable all cpuidle devices */ 1343 for_each_online_cpu(cpu) { 1344 _pr = per_cpu(processors, cpu); 1345 if (!_pr || !_pr->flags.power_setup_done) 1346 continue; 1347 dev = per_cpu(acpi_cpuidle_device, cpu); 1348 cpuidle_disable_device(dev); 1349 } 1350 1351 /* Populate Updated C-state information */ 1352 acpi_processor_get_power_info(pr); 1353 acpi_processor_setup_cpuidle_states(pr); 1354 1355 /* Enable all cpuidle devices */ 1356 for_each_online_cpu(cpu) { 1357 _pr = per_cpu(processors, cpu); 1358 if (!_pr || !_pr->flags.power_setup_done) 1359 continue; 1360 acpi_processor_get_power_info(_pr); 1361 if (_pr->flags.power) { 1362 dev = per_cpu(acpi_cpuidle_device, cpu); 1363 acpi_processor_setup_cpuidle_dev(_pr, dev); 1364 cpuidle_enable_device(dev); 1365 } 1366 } 1367 cpuidle_resume_and_unlock(); 1368 cpus_read_unlock(); 1369 } 1370 1371 return 0; 1372 } 1373 1374 static int acpi_processor_registered; 1375 1376 int acpi_processor_power_init(struct acpi_processor *pr) 1377 { 1378 int retval; 1379 struct cpuidle_device *dev; 1380 1381 if (disabled_by_idle_boot_param()) 1382 return 0; 1383 1384 acpi_processor_cstate_first_run_checks(); 1385 1386 if (!acpi_processor_get_power_info(pr)) 1387 pr->flags.power_setup_done = 1; 1388 1389 /* 1390 * Install the idle handler if processor power management is supported. 1391 * Note that we use previously set idle handler will be used on 1392 * platforms that only support C1. 1393 */ 1394 if (pr->flags.power) { 1395 /* Register acpi_idle_driver if not already registered */ 1396 if (!acpi_processor_registered) { 1397 acpi_processor_setup_cpuidle_states(pr); 1398 retval = cpuidle_register_driver(&acpi_idle_driver); 1399 if (retval) 1400 return retval; 1401 pr_debug("%s registered with cpuidle\n", 1402 acpi_idle_driver.name); 1403 } 1404 1405 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1406 if (!dev) 1407 return -ENOMEM; 1408 per_cpu(acpi_cpuidle_device, pr->id) = dev; 1409 1410 acpi_processor_setup_cpuidle_dev(pr, dev); 1411 1412 /* Register per-cpu cpuidle_device. Cpuidle driver 1413 * must already be registered before registering device 1414 */ 1415 retval = cpuidle_register_device(dev); 1416 if (retval) { 1417 if (acpi_processor_registered == 0) 1418 cpuidle_unregister_driver(&acpi_idle_driver); 1419 return retval; 1420 } 1421 acpi_processor_registered++; 1422 } 1423 return 0; 1424 } 1425 1426 int acpi_processor_power_exit(struct acpi_processor *pr) 1427 { 1428 struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id); 1429 1430 if (disabled_by_idle_boot_param()) 1431 return 0; 1432 1433 if (pr->flags.power) { 1434 cpuidle_unregister_device(dev); 1435 acpi_processor_registered--; 1436 if (acpi_processor_registered == 0) 1437 cpuidle_unregister_driver(&acpi_idle_driver); 1438 } 1439 1440 pr->flags.power_setup_done = 0; 1441 return 0; 1442 } 1443