1 /* 2 * pci_root.c - ACPI PCI Root Bridge Driver ($Revision: 40 $) 3 * 4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> 5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> 6 * 7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or (at 12 * your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, but 15 * WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 17 * General Public License for more details. 18 * 19 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 20 */ 21 22 #include <linux/kernel.h> 23 #include <linux/module.h> 24 #include <linux/init.h> 25 #include <linux/types.h> 26 #include <linux/mutex.h> 27 #include <linux/pm.h> 28 #include <linux/pm_runtime.h> 29 #include <linux/pci.h> 30 #include <linux/pci-acpi.h> 31 #include <linux/pci-aspm.h> 32 #include <linux/dmar.h> 33 #include <linux/acpi.h> 34 #include <linux/slab.h> 35 #include <linux/dmi.h> 36 #include <acpi/apei.h> /* for acpi_hest_init() */ 37 38 #include "internal.h" 39 40 #define _COMPONENT ACPI_PCI_COMPONENT 41 ACPI_MODULE_NAME("pci_root"); 42 #define ACPI_PCI_ROOT_CLASS "pci_bridge" 43 #define ACPI_PCI_ROOT_DEVICE_NAME "PCI Root Bridge" 44 static int acpi_pci_root_add(struct acpi_device *device, 45 const struct acpi_device_id *not_used); 46 static void acpi_pci_root_remove(struct acpi_device *device); 47 48 static int acpi_pci_root_scan_dependent(struct acpi_device *adev) 49 { 50 acpiphp_check_host_bridge(adev); 51 return 0; 52 } 53 54 #define ACPI_PCIE_REQ_SUPPORT (OSC_PCI_EXT_CONFIG_SUPPORT \ 55 | OSC_PCI_ASPM_SUPPORT \ 56 | OSC_PCI_CLOCK_PM_SUPPORT \ 57 | OSC_PCI_MSI_SUPPORT) 58 59 static const struct acpi_device_id root_device_ids[] = { 60 {"PNP0A03", 0}, 61 {"", 0}, 62 }; 63 64 static struct acpi_scan_handler pci_root_handler = { 65 .ids = root_device_ids, 66 .attach = acpi_pci_root_add, 67 .detach = acpi_pci_root_remove, 68 .hotplug = { 69 .enabled = true, 70 .scan_dependent = acpi_pci_root_scan_dependent, 71 }, 72 }; 73 74 static DEFINE_MUTEX(osc_lock); 75 76 /** 77 * acpi_is_root_bridge - determine whether an ACPI CA node is a PCI root bridge 78 * @handle - the ACPI CA node in question. 79 * 80 * Note: we could make this API take a struct acpi_device * instead, but 81 * for now, it's more convenient to operate on an acpi_handle. 82 */ 83 int acpi_is_root_bridge(acpi_handle handle) 84 { 85 int ret; 86 struct acpi_device *device; 87 88 ret = acpi_bus_get_device(handle, &device); 89 if (ret) 90 return 0; 91 92 ret = acpi_match_device_ids(device, root_device_ids); 93 if (ret) 94 return 0; 95 else 96 return 1; 97 } 98 EXPORT_SYMBOL_GPL(acpi_is_root_bridge); 99 100 static acpi_status 101 get_root_bridge_busnr_callback(struct acpi_resource *resource, void *data) 102 { 103 struct resource *res = data; 104 struct acpi_resource_address64 address; 105 acpi_status status; 106 107 status = acpi_resource_to_address64(resource, &address); 108 if (ACPI_FAILURE(status)) 109 return AE_OK; 110 111 if ((address.address.address_length > 0) && 112 (address.resource_type == ACPI_BUS_NUMBER_RANGE)) { 113 res->start = address.address.minimum; 114 res->end = address.address.minimum + address.address.address_length - 1; 115 } 116 117 return AE_OK; 118 } 119 120 static acpi_status try_get_root_bridge_busnr(acpi_handle handle, 121 struct resource *res) 122 { 123 acpi_status status; 124 125 res->start = -1; 126 status = 127 acpi_walk_resources(handle, METHOD_NAME__CRS, 128 get_root_bridge_busnr_callback, res); 129 if (ACPI_FAILURE(status)) 130 return status; 131 if (res->start == -1) 132 return AE_ERROR; 133 return AE_OK; 134 } 135 136 struct pci_osc_bit_struct { 137 u32 bit; 138 char *desc; 139 }; 140 141 static struct pci_osc_bit_struct pci_osc_support_bit[] = { 142 { OSC_PCI_EXT_CONFIG_SUPPORT, "ExtendedConfig" }, 143 { OSC_PCI_ASPM_SUPPORT, "ASPM" }, 144 { OSC_PCI_CLOCK_PM_SUPPORT, "ClockPM" }, 145 { OSC_PCI_SEGMENT_GROUPS_SUPPORT, "Segments" }, 146 { OSC_PCI_MSI_SUPPORT, "MSI" }, 147 }; 148 149 static struct pci_osc_bit_struct pci_osc_control_bit[] = { 150 { OSC_PCI_EXPRESS_NATIVE_HP_CONTROL, "PCIeHotplug" }, 151 { OSC_PCI_SHPC_NATIVE_HP_CONTROL, "SHPCHotplug" }, 152 { OSC_PCI_EXPRESS_PME_CONTROL, "PME" }, 153 { OSC_PCI_EXPRESS_AER_CONTROL, "AER" }, 154 { OSC_PCI_EXPRESS_CAPABILITY_CONTROL, "PCIeCapability" }, 155 }; 156 157 static void decode_osc_bits(struct acpi_pci_root *root, char *msg, u32 word, 158 struct pci_osc_bit_struct *table, int size) 159 { 160 char buf[80]; 161 int i, len = 0; 162 struct pci_osc_bit_struct *entry; 163 164 buf[0] = '\0'; 165 for (i = 0, entry = table; i < size; i++, entry++) 166 if (word & entry->bit) 167 len += snprintf(buf + len, sizeof(buf) - len, "%s%s", 168 len ? " " : "", entry->desc); 169 170 dev_info(&root->device->dev, "_OSC: %s [%s]\n", msg, buf); 171 } 172 173 static void decode_osc_support(struct acpi_pci_root *root, char *msg, u32 word) 174 { 175 decode_osc_bits(root, msg, word, pci_osc_support_bit, 176 ARRAY_SIZE(pci_osc_support_bit)); 177 } 178 179 static void decode_osc_control(struct acpi_pci_root *root, char *msg, u32 word) 180 { 181 decode_osc_bits(root, msg, word, pci_osc_control_bit, 182 ARRAY_SIZE(pci_osc_control_bit)); 183 } 184 185 static u8 pci_osc_uuid_str[] = "33DB4D5B-1FF7-401C-9657-7441C03DD766"; 186 187 static acpi_status acpi_pci_run_osc(acpi_handle handle, 188 const u32 *capbuf, u32 *retval) 189 { 190 struct acpi_osc_context context = { 191 .uuid_str = pci_osc_uuid_str, 192 .rev = 1, 193 .cap.length = 12, 194 .cap.pointer = (void *)capbuf, 195 }; 196 acpi_status status; 197 198 status = acpi_run_osc(handle, &context); 199 if (ACPI_SUCCESS(status)) { 200 *retval = *((u32 *)(context.ret.pointer + 8)); 201 kfree(context.ret.pointer); 202 } 203 return status; 204 } 205 206 static acpi_status acpi_pci_query_osc(struct acpi_pci_root *root, 207 u32 support, 208 u32 *control) 209 { 210 acpi_status status; 211 u32 result, capbuf[3]; 212 213 support &= OSC_PCI_SUPPORT_MASKS; 214 support |= root->osc_support_set; 215 216 capbuf[OSC_QUERY_DWORD] = OSC_QUERY_ENABLE; 217 capbuf[OSC_SUPPORT_DWORD] = support; 218 if (control) { 219 *control &= OSC_PCI_CONTROL_MASKS; 220 capbuf[OSC_CONTROL_DWORD] = *control | root->osc_control_set; 221 } else { 222 /* Run _OSC query only with existing controls. */ 223 capbuf[OSC_CONTROL_DWORD] = root->osc_control_set; 224 } 225 226 status = acpi_pci_run_osc(root->device->handle, capbuf, &result); 227 if (ACPI_SUCCESS(status)) { 228 root->osc_support_set = support; 229 if (control) 230 *control = result; 231 } 232 return status; 233 } 234 235 static acpi_status acpi_pci_osc_support(struct acpi_pci_root *root, u32 flags) 236 { 237 acpi_status status; 238 239 mutex_lock(&osc_lock); 240 status = acpi_pci_query_osc(root, flags, NULL); 241 mutex_unlock(&osc_lock); 242 return status; 243 } 244 245 struct acpi_pci_root *acpi_pci_find_root(acpi_handle handle) 246 { 247 struct acpi_pci_root *root; 248 struct acpi_device *device; 249 250 if (acpi_bus_get_device(handle, &device) || 251 acpi_match_device_ids(device, root_device_ids)) 252 return NULL; 253 254 root = acpi_driver_data(device); 255 256 return root; 257 } 258 EXPORT_SYMBOL_GPL(acpi_pci_find_root); 259 260 struct acpi_handle_node { 261 struct list_head node; 262 acpi_handle handle; 263 }; 264 265 /** 266 * acpi_get_pci_dev - convert ACPI CA handle to struct pci_dev 267 * @handle: the handle in question 268 * 269 * Given an ACPI CA handle, the desired PCI device is located in the 270 * list of PCI devices. 271 * 272 * If the device is found, its reference count is increased and this 273 * function returns a pointer to its data structure. The caller must 274 * decrement the reference count by calling pci_dev_put(). 275 * If no device is found, %NULL is returned. 276 */ 277 struct pci_dev *acpi_get_pci_dev(acpi_handle handle) 278 { 279 int dev, fn; 280 unsigned long long adr; 281 acpi_status status; 282 acpi_handle phandle; 283 struct pci_bus *pbus; 284 struct pci_dev *pdev = NULL; 285 struct acpi_handle_node *node, *tmp; 286 struct acpi_pci_root *root; 287 LIST_HEAD(device_list); 288 289 /* 290 * Walk up the ACPI CA namespace until we reach a PCI root bridge. 291 */ 292 phandle = handle; 293 while (!acpi_is_root_bridge(phandle)) { 294 node = kzalloc(sizeof(struct acpi_handle_node), GFP_KERNEL); 295 if (!node) 296 goto out; 297 298 INIT_LIST_HEAD(&node->node); 299 node->handle = phandle; 300 list_add(&node->node, &device_list); 301 302 status = acpi_get_parent(phandle, &phandle); 303 if (ACPI_FAILURE(status)) 304 goto out; 305 } 306 307 root = acpi_pci_find_root(phandle); 308 if (!root) 309 goto out; 310 311 pbus = root->bus; 312 313 /* 314 * Now, walk back down the PCI device tree until we return to our 315 * original handle. Assumes that everything between the PCI root 316 * bridge and the device we're looking for must be a P2P bridge. 317 */ 318 list_for_each_entry(node, &device_list, node) { 319 acpi_handle hnd = node->handle; 320 status = acpi_evaluate_integer(hnd, "_ADR", NULL, &adr); 321 if (ACPI_FAILURE(status)) 322 goto out; 323 dev = (adr >> 16) & 0xffff; 324 fn = adr & 0xffff; 325 326 pdev = pci_get_slot(pbus, PCI_DEVFN(dev, fn)); 327 if (!pdev || hnd == handle) 328 break; 329 330 pbus = pdev->subordinate; 331 pci_dev_put(pdev); 332 333 /* 334 * This function may be called for a non-PCI device that has a 335 * PCI parent (eg. a disk under a PCI SATA controller). In that 336 * case pdev->subordinate will be NULL for the parent. 337 */ 338 if (!pbus) { 339 dev_dbg(&pdev->dev, "Not a PCI-to-PCI bridge\n"); 340 pdev = NULL; 341 break; 342 } 343 } 344 out: 345 list_for_each_entry_safe(node, tmp, &device_list, node) 346 kfree(node); 347 348 return pdev; 349 } 350 EXPORT_SYMBOL_GPL(acpi_get_pci_dev); 351 352 /** 353 * acpi_pci_osc_control_set - Request control of PCI root _OSC features. 354 * @handle: ACPI handle of a PCI root bridge (or PCIe Root Complex). 355 * @mask: Mask of _OSC bits to request control of, place to store control mask. 356 * @req: Mask of _OSC bits the control of is essential to the caller. 357 * 358 * Run _OSC query for @mask and if that is successful, compare the returned 359 * mask of control bits with @req. If all of the @req bits are set in the 360 * returned mask, run _OSC request for it. 361 * 362 * The variable at the @mask address may be modified regardless of whether or 363 * not the function returns success. On success it will contain the mask of 364 * _OSC bits the BIOS has granted control of, but its contents are meaningless 365 * on failure. 366 **/ 367 acpi_status acpi_pci_osc_control_set(acpi_handle handle, u32 *mask, u32 req) 368 { 369 struct acpi_pci_root *root; 370 acpi_status status = AE_OK; 371 u32 ctrl, capbuf[3]; 372 373 if (!mask) 374 return AE_BAD_PARAMETER; 375 376 ctrl = *mask & OSC_PCI_CONTROL_MASKS; 377 if ((ctrl & req) != req) 378 return AE_TYPE; 379 380 root = acpi_pci_find_root(handle); 381 if (!root) 382 return AE_NOT_EXIST; 383 384 mutex_lock(&osc_lock); 385 386 *mask = ctrl | root->osc_control_set; 387 /* No need to evaluate _OSC if the control was already granted. */ 388 if ((root->osc_control_set & ctrl) == ctrl) 389 goto out; 390 391 /* Need to check the available controls bits before requesting them. */ 392 while (*mask) { 393 status = acpi_pci_query_osc(root, root->osc_support_set, mask); 394 if (ACPI_FAILURE(status)) 395 goto out; 396 if (ctrl == *mask) 397 break; 398 decode_osc_control(root, "platform does not support", 399 ctrl & ~(*mask)); 400 ctrl = *mask; 401 } 402 403 if ((ctrl & req) != req) { 404 decode_osc_control(root, "not requesting control; platform does not support", 405 req & ~(ctrl)); 406 status = AE_SUPPORT; 407 goto out; 408 } 409 410 capbuf[OSC_QUERY_DWORD] = 0; 411 capbuf[OSC_SUPPORT_DWORD] = root->osc_support_set; 412 capbuf[OSC_CONTROL_DWORD] = ctrl; 413 status = acpi_pci_run_osc(handle, capbuf, mask); 414 if (ACPI_SUCCESS(status)) 415 root->osc_control_set = *mask; 416 out: 417 mutex_unlock(&osc_lock); 418 return status; 419 } 420 EXPORT_SYMBOL(acpi_pci_osc_control_set); 421 422 static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm) 423 { 424 u32 support, control, requested; 425 acpi_status status; 426 struct acpi_device *device = root->device; 427 acpi_handle handle = device->handle; 428 429 /* 430 * Apple always return failure on _OSC calls when _OSI("Darwin") has 431 * been called successfully. We know the feature set supported by the 432 * platform, so avoid calling _OSC at all 433 */ 434 435 if (dmi_match(DMI_SYS_VENDOR, "Apple Inc.")) { 436 root->osc_control_set = ~OSC_PCI_EXPRESS_PME_CONTROL; 437 decode_osc_control(root, "OS assumes control of", 438 root->osc_control_set); 439 return; 440 } 441 442 /* 443 * All supported architectures that use ACPI have support for 444 * PCI domains, so we indicate this in _OSC support capabilities. 445 */ 446 support = OSC_PCI_SEGMENT_GROUPS_SUPPORT; 447 if (pci_ext_cfg_avail()) 448 support |= OSC_PCI_EXT_CONFIG_SUPPORT; 449 if (pcie_aspm_support_enabled()) 450 support |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT; 451 if (pci_msi_enabled()) 452 support |= OSC_PCI_MSI_SUPPORT; 453 454 decode_osc_support(root, "OS supports", support); 455 status = acpi_pci_osc_support(root, support); 456 if (ACPI_FAILURE(status)) { 457 dev_info(&device->dev, "_OSC failed (%s); disabling ASPM\n", 458 acpi_format_exception(status)); 459 *no_aspm = 1; 460 return; 461 } 462 463 if (pcie_ports_disabled) { 464 dev_info(&device->dev, "PCIe port services disabled; not requesting _OSC control\n"); 465 return; 466 } 467 468 if ((support & ACPI_PCIE_REQ_SUPPORT) != ACPI_PCIE_REQ_SUPPORT) { 469 decode_osc_support(root, "not requesting OS control; OS requires", 470 ACPI_PCIE_REQ_SUPPORT); 471 return; 472 } 473 474 control = OSC_PCI_EXPRESS_CAPABILITY_CONTROL 475 | OSC_PCI_EXPRESS_NATIVE_HP_CONTROL 476 | OSC_PCI_EXPRESS_PME_CONTROL; 477 478 if (pci_aer_available()) { 479 if (aer_acpi_firmware_first()) 480 dev_info(&device->dev, 481 "PCIe AER handled by firmware\n"); 482 else 483 control |= OSC_PCI_EXPRESS_AER_CONTROL; 484 } 485 486 requested = control; 487 status = acpi_pci_osc_control_set(handle, &control, 488 OSC_PCI_EXPRESS_CAPABILITY_CONTROL); 489 if (ACPI_SUCCESS(status)) { 490 decode_osc_control(root, "OS now controls", control); 491 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) { 492 /* 493 * We have ASPM control, but the FADT indicates that 494 * it's unsupported. Leave existing configuration 495 * intact and prevent the OS from touching it. 496 */ 497 dev_info(&device->dev, "FADT indicates ASPM is unsupported, using BIOS configuration\n"); 498 *no_aspm = 1; 499 } 500 } else { 501 decode_osc_control(root, "OS requested", requested); 502 decode_osc_control(root, "platform willing to grant", control); 503 dev_info(&device->dev, "_OSC failed (%s); disabling ASPM\n", 504 acpi_format_exception(status)); 505 506 /* 507 * We want to disable ASPM here, but aspm_disabled 508 * needs to remain in its state from boot so that we 509 * properly handle PCIe 1.1 devices. So we set this 510 * flag here, to defer the action until after the ACPI 511 * root scan. 512 */ 513 *no_aspm = 1; 514 } 515 } 516 517 static int acpi_pci_root_add(struct acpi_device *device, 518 const struct acpi_device_id *not_used) 519 { 520 unsigned long long segment, bus; 521 acpi_status status; 522 int result; 523 struct acpi_pci_root *root; 524 acpi_handle handle = device->handle; 525 int no_aspm = 0; 526 bool hotadd = system_state == SYSTEM_RUNNING; 527 528 root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL); 529 if (!root) 530 return -ENOMEM; 531 532 segment = 0; 533 status = acpi_evaluate_integer(handle, METHOD_NAME__SEG, NULL, 534 &segment); 535 if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) { 536 dev_err(&device->dev, "can't evaluate _SEG\n"); 537 result = -ENODEV; 538 goto end; 539 } 540 541 /* Check _CRS first, then _BBN. If no _BBN, default to zero. */ 542 root->secondary.flags = IORESOURCE_BUS; 543 status = try_get_root_bridge_busnr(handle, &root->secondary); 544 if (ACPI_FAILURE(status)) { 545 /* 546 * We need both the start and end of the downstream bus range 547 * to interpret _CBA (MMCONFIG base address), so it really is 548 * supposed to be in _CRS. If we don't find it there, all we 549 * can do is assume [_BBN-0xFF] or [0-0xFF]. 550 */ 551 root->secondary.end = 0xFF; 552 dev_warn(&device->dev, 553 FW_BUG "no secondary bus range in _CRS\n"); 554 status = acpi_evaluate_integer(handle, METHOD_NAME__BBN, 555 NULL, &bus); 556 if (ACPI_SUCCESS(status)) 557 root->secondary.start = bus; 558 else if (status == AE_NOT_FOUND) 559 root->secondary.start = 0; 560 else { 561 dev_err(&device->dev, "can't evaluate _BBN\n"); 562 result = -ENODEV; 563 goto end; 564 } 565 } 566 567 root->device = device; 568 root->segment = segment & 0xFFFF; 569 strcpy(acpi_device_name(device), ACPI_PCI_ROOT_DEVICE_NAME); 570 strcpy(acpi_device_class(device), ACPI_PCI_ROOT_CLASS); 571 device->driver_data = root; 572 573 if (hotadd && dmar_device_add(handle)) { 574 result = -ENXIO; 575 goto end; 576 } 577 578 pr_info(PREFIX "%s [%s] (domain %04x %pR)\n", 579 acpi_device_name(device), acpi_device_bid(device), 580 root->segment, &root->secondary); 581 582 root->mcfg_addr = acpi_pci_root_get_mcfg_addr(handle); 583 584 negotiate_os_control(root, &no_aspm); 585 586 /* 587 * TBD: Need PCI interface for enumeration/configuration of roots. 588 */ 589 590 /* 591 * Scan the Root Bridge 592 * -------------------- 593 * Must do this prior to any attempt to bind the root device, as the 594 * PCI namespace does not get created until this call is made (and 595 * thus the root bridge's pci_dev does not exist). 596 */ 597 root->bus = pci_acpi_scan_root(root); 598 if (!root->bus) { 599 dev_err(&device->dev, 600 "Bus %04x:%02x not present in PCI namespace\n", 601 root->segment, (unsigned int)root->secondary.start); 602 device->driver_data = NULL; 603 result = -ENODEV; 604 goto remove_dmar; 605 } 606 607 if (no_aspm) 608 pcie_no_aspm(); 609 610 pci_acpi_add_bus_pm_notifier(device); 611 device_set_wakeup_capable(root->bus->bridge, device->wakeup.flags.valid); 612 613 if (hotadd) { 614 pcibios_resource_survey_bus(root->bus); 615 pci_assign_unassigned_root_bus_resources(root->bus); 616 /* 617 * This is only called for the hotadd case. For the boot-time 618 * case, we need to wait until after PCI initialization in 619 * order to deal with IOAPICs mapped in on a PCI BAR. 620 * 621 * This is currently x86-specific, because acpi_ioapic_add() 622 * is an empty function without CONFIG_ACPI_HOTPLUG_IOAPIC. 623 * And CONFIG_ACPI_HOTPLUG_IOAPIC depends on CONFIG_X86_IO_APIC 624 * (see drivers/acpi/Kconfig). 625 */ 626 acpi_ioapic_add(root->device->handle); 627 } 628 629 pci_lock_rescan_remove(); 630 pci_bus_add_devices(root->bus); 631 pci_unlock_rescan_remove(); 632 return 1; 633 634 remove_dmar: 635 if (hotadd) 636 dmar_device_remove(handle); 637 end: 638 kfree(root); 639 return result; 640 } 641 642 static void acpi_pci_root_remove(struct acpi_device *device) 643 { 644 struct acpi_pci_root *root = acpi_driver_data(device); 645 646 pci_lock_rescan_remove(); 647 648 pci_stop_root_bus(root->bus); 649 650 pci_ioapic_remove(root); 651 device_set_wakeup_capable(root->bus->bridge, false); 652 pci_acpi_remove_bus_pm_notifier(device); 653 654 pci_remove_root_bus(root->bus); 655 WARN_ON(acpi_ioapic_remove(root)); 656 657 dmar_device_remove(device->handle); 658 659 pci_unlock_rescan_remove(); 660 661 kfree(root); 662 } 663 664 /* 665 * Following code to support acpi_pci_root_create() is copied from 666 * arch/x86/pci/acpi.c and modified so it could be reused by x86, IA64 667 * and ARM64. 668 */ 669 static void acpi_pci_root_validate_resources(struct device *dev, 670 struct list_head *resources, 671 unsigned long type) 672 { 673 LIST_HEAD(list); 674 struct resource *res1, *res2, *root = NULL; 675 struct resource_entry *tmp, *entry, *entry2; 676 677 BUG_ON((type & (IORESOURCE_MEM | IORESOURCE_IO)) == 0); 678 root = (type & IORESOURCE_MEM) ? &iomem_resource : &ioport_resource; 679 680 list_splice_init(resources, &list); 681 resource_list_for_each_entry_safe(entry, tmp, &list) { 682 bool free = false; 683 resource_size_t end; 684 685 res1 = entry->res; 686 if (!(res1->flags & type)) 687 goto next; 688 689 /* Exclude non-addressable range or non-addressable portion */ 690 end = min(res1->end, root->end); 691 if (end <= res1->start) { 692 dev_info(dev, "host bridge window %pR (ignored, not CPU addressable)\n", 693 res1); 694 free = true; 695 goto next; 696 } else if (res1->end != end) { 697 dev_info(dev, "host bridge window %pR ([%#llx-%#llx] ignored, not CPU addressable)\n", 698 res1, (unsigned long long)end + 1, 699 (unsigned long long)res1->end); 700 res1->end = end; 701 } 702 703 resource_list_for_each_entry(entry2, resources) { 704 res2 = entry2->res; 705 if (!(res2->flags & type)) 706 continue; 707 708 /* 709 * I don't like throwing away windows because then 710 * our resources no longer match the ACPI _CRS, but 711 * the kernel resource tree doesn't allow overlaps. 712 */ 713 if (resource_overlaps(res1, res2)) { 714 res2->start = min(res1->start, res2->start); 715 res2->end = max(res1->end, res2->end); 716 dev_info(dev, "host bridge window expanded to %pR; %pR ignored\n", 717 res2, res1); 718 free = true; 719 goto next; 720 } 721 } 722 723 next: 724 resource_list_del(entry); 725 if (free) 726 resource_list_free_entry(entry); 727 else 728 resource_list_add_tail(entry, resources); 729 } 730 } 731 732 static void acpi_pci_root_remap_iospace(struct resource_entry *entry) 733 { 734 #ifdef PCI_IOBASE 735 struct resource *res = entry->res; 736 resource_size_t cpu_addr = res->start; 737 resource_size_t pci_addr = cpu_addr - entry->offset; 738 resource_size_t length = resource_size(res); 739 unsigned long port; 740 741 if (pci_register_io_range(cpu_addr, length)) 742 goto err; 743 744 port = pci_address_to_pio(cpu_addr); 745 if (port == (unsigned long)-1) 746 goto err; 747 748 res->start = port; 749 res->end = port + length - 1; 750 entry->offset = port - pci_addr; 751 752 if (pci_remap_iospace(res, cpu_addr) < 0) 753 goto err; 754 755 pr_info("Remapped I/O %pa to %pR\n", &cpu_addr, res); 756 return; 757 err: 758 res->flags |= IORESOURCE_DISABLED; 759 #endif 760 } 761 762 int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info) 763 { 764 int ret; 765 struct list_head *list = &info->resources; 766 struct acpi_device *device = info->bridge; 767 struct resource_entry *entry, *tmp; 768 unsigned long flags; 769 770 flags = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT; 771 ret = acpi_dev_get_resources(device, list, 772 acpi_dev_filter_resource_type_cb, 773 (void *)flags); 774 if (ret < 0) 775 dev_warn(&device->dev, 776 "failed to parse _CRS method, error code %d\n", ret); 777 else if (ret == 0) 778 dev_dbg(&device->dev, 779 "no IO and memory resources present in _CRS\n"); 780 else { 781 resource_list_for_each_entry_safe(entry, tmp, list) { 782 if (entry->res->flags & IORESOURCE_IO) 783 acpi_pci_root_remap_iospace(entry); 784 785 if (entry->res->flags & IORESOURCE_DISABLED) 786 resource_list_destroy_entry(entry); 787 else 788 entry->res->name = info->name; 789 } 790 acpi_pci_root_validate_resources(&device->dev, list, 791 IORESOURCE_MEM); 792 acpi_pci_root_validate_resources(&device->dev, list, 793 IORESOURCE_IO); 794 } 795 796 return ret; 797 } 798 799 static void pci_acpi_root_add_resources(struct acpi_pci_root_info *info) 800 { 801 struct resource_entry *entry, *tmp; 802 struct resource *res, *conflict, *root = NULL; 803 804 resource_list_for_each_entry_safe(entry, tmp, &info->resources) { 805 res = entry->res; 806 if (res->flags & IORESOURCE_MEM) 807 root = &iomem_resource; 808 else if (res->flags & IORESOURCE_IO) 809 root = &ioport_resource; 810 else 811 continue; 812 813 /* 814 * Some legacy x86 host bridge drivers use iomem_resource and 815 * ioport_resource as default resource pool, skip it. 816 */ 817 if (res == root) 818 continue; 819 820 conflict = insert_resource_conflict(root, res); 821 if (conflict) { 822 dev_info(&info->bridge->dev, 823 "ignoring host bridge window %pR (conflicts with %s %pR)\n", 824 res, conflict->name, conflict); 825 resource_list_destroy_entry(entry); 826 } 827 } 828 } 829 830 static void __acpi_pci_root_release_info(struct acpi_pci_root_info *info) 831 { 832 struct resource *res; 833 struct resource_entry *entry, *tmp; 834 835 if (!info) 836 return; 837 838 resource_list_for_each_entry_safe(entry, tmp, &info->resources) { 839 res = entry->res; 840 if (res->parent && 841 (res->flags & (IORESOURCE_MEM | IORESOURCE_IO))) 842 release_resource(res); 843 resource_list_destroy_entry(entry); 844 } 845 846 info->ops->release_info(info); 847 } 848 849 static void acpi_pci_root_release_info(struct pci_host_bridge *bridge) 850 { 851 struct resource *res; 852 struct resource_entry *entry; 853 854 resource_list_for_each_entry(entry, &bridge->windows) { 855 res = entry->res; 856 if (res->flags & IORESOURCE_IO) 857 pci_unmap_iospace(res); 858 if (res->parent && 859 (res->flags & (IORESOURCE_MEM | IORESOURCE_IO))) 860 release_resource(res); 861 } 862 __acpi_pci_root_release_info(bridge->release_data); 863 } 864 865 struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root, 866 struct acpi_pci_root_ops *ops, 867 struct acpi_pci_root_info *info, 868 void *sysdata) 869 { 870 int ret, busnum = root->secondary.start; 871 struct acpi_device *device = root->device; 872 int node = acpi_get_node(device->handle); 873 struct pci_bus *bus; 874 875 info->root = root; 876 info->bridge = device; 877 info->ops = ops; 878 INIT_LIST_HEAD(&info->resources); 879 snprintf(info->name, sizeof(info->name), "PCI Bus %04x:%02x", 880 root->segment, busnum); 881 882 if (ops->init_info && ops->init_info(info)) 883 goto out_release_info; 884 if (ops->prepare_resources) 885 ret = ops->prepare_resources(info); 886 else 887 ret = acpi_pci_probe_root_resources(info); 888 if (ret < 0) 889 goto out_release_info; 890 891 pci_acpi_root_add_resources(info); 892 pci_add_resource(&info->resources, &root->secondary); 893 bus = pci_create_root_bus(NULL, busnum, ops->pci_ops, 894 sysdata, &info->resources); 895 if (!bus) 896 goto out_release_info; 897 898 pci_scan_child_bus(bus); 899 pci_set_host_bridge_release(to_pci_host_bridge(bus->bridge), 900 acpi_pci_root_release_info, info); 901 if (node != NUMA_NO_NODE) 902 dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node); 903 return bus; 904 905 out_release_info: 906 __acpi_pci_root_release_info(info); 907 return NULL; 908 } 909 910 void __init acpi_pci_root_init(void) 911 { 912 acpi_hest_init(); 913 if (acpi_pci_disabled) 914 return; 915 916 pci_acpi_crs_quirks(); 917 acpi_scan_add_handler_with_hotplug(&pci_root_handler, "pci_root"); 918 } 919