1 /* 2 * Copyright (C) 2016, Semihalf 3 * Author: Tomasz Nowicki <tn@semihalf.com> 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * This file implements early detection/parsing of I/O mapping 15 * reported to OS through firmware via I/O Remapping Table (IORT) 16 * IORT document number: ARM DEN 0049A 17 */ 18 19 #define pr_fmt(fmt) "ACPI: IORT: " fmt 20 21 #include <linux/acpi_iort.h> 22 #include <linux/iommu.h> 23 #include <linux/kernel.h> 24 #include <linux/list.h> 25 #include <linux/pci.h> 26 #include <linux/platform_device.h> 27 #include <linux/slab.h> 28 29 #define IORT_TYPE_MASK(type) (1 << (type)) 30 #define IORT_MSI_TYPE (1 << ACPI_IORT_NODE_ITS_GROUP) 31 #define IORT_IOMMU_TYPE ((1 << ACPI_IORT_NODE_SMMU) | \ 32 (1 << ACPI_IORT_NODE_SMMU_V3)) 33 34 struct iort_its_msi_chip { 35 struct list_head list; 36 struct fwnode_handle *fw_node; 37 phys_addr_t base_addr; 38 u32 translation_id; 39 }; 40 41 struct iort_fwnode { 42 struct list_head list; 43 struct acpi_iort_node *iort_node; 44 struct fwnode_handle *fwnode; 45 }; 46 static LIST_HEAD(iort_fwnode_list); 47 static DEFINE_SPINLOCK(iort_fwnode_lock); 48 49 /** 50 * iort_set_fwnode() - Create iort_fwnode and use it to register 51 * iommu data in the iort_fwnode_list 52 * 53 * @node: IORT table node associated with the IOMMU 54 * @fwnode: fwnode associated with the IORT node 55 * 56 * Returns: 0 on success 57 * <0 on failure 58 */ 59 static inline int iort_set_fwnode(struct acpi_iort_node *iort_node, 60 struct fwnode_handle *fwnode) 61 { 62 struct iort_fwnode *np; 63 64 np = kzalloc(sizeof(struct iort_fwnode), GFP_ATOMIC); 65 66 if (WARN_ON(!np)) 67 return -ENOMEM; 68 69 INIT_LIST_HEAD(&np->list); 70 np->iort_node = iort_node; 71 np->fwnode = fwnode; 72 73 spin_lock(&iort_fwnode_lock); 74 list_add_tail(&np->list, &iort_fwnode_list); 75 spin_unlock(&iort_fwnode_lock); 76 77 return 0; 78 } 79 80 /** 81 * iort_get_fwnode() - Retrieve fwnode associated with an IORT node 82 * 83 * @node: IORT table node to be looked-up 84 * 85 * Returns: fwnode_handle pointer on success, NULL on failure 86 */ 87 static inline struct fwnode_handle *iort_get_fwnode( 88 struct acpi_iort_node *node) 89 { 90 struct iort_fwnode *curr; 91 struct fwnode_handle *fwnode = NULL; 92 93 spin_lock(&iort_fwnode_lock); 94 list_for_each_entry(curr, &iort_fwnode_list, list) { 95 if (curr->iort_node == node) { 96 fwnode = curr->fwnode; 97 break; 98 } 99 } 100 spin_unlock(&iort_fwnode_lock); 101 102 return fwnode; 103 } 104 105 /** 106 * iort_delete_fwnode() - Delete fwnode associated with an IORT node 107 * 108 * @node: IORT table node associated with fwnode to delete 109 */ 110 static inline void iort_delete_fwnode(struct acpi_iort_node *node) 111 { 112 struct iort_fwnode *curr, *tmp; 113 114 spin_lock(&iort_fwnode_lock); 115 list_for_each_entry_safe(curr, tmp, &iort_fwnode_list, list) { 116 if (curr->iort_node == node) { 117 list_del(&curr->list); 118 kfree(curr); 119 break; 120 } 121 } 122 spin_unlock(&iort_fwnode_lock); 123 } 124 125 /** 126 * iort_get_iort_node() - Retrieve iort_node associated with an fwnode 127 * 128 * @fwnode: fwnode associated with device to be looked-up 129 * 130 * Returns: iort_node pointer on success, NULL on failure 131 */ 132 static inline struct acpi_iort_node *iort_get_iort_node( 133 struct fwnode_handle *fwnode) 134 { 135 struct iort_fwnode *curr; 136 struct acpi_iort_node *iort_node = NULL; 137 138 spin_lock(&iort_fwnode_lock); 139 list_for_each_entry(curr, &iort_fwnode_list, list) { 140 if (curr->fwnode == fwnode) { 141 iort_node = curr->iort_node; 142 break; 143 } 144 } 145 spin_unlock(&iort_fwnode_lock); 146 147 return iort_node; 148 } 149 150 typedef acpi_status (*iort_find_node_callback) 151 (struct acpi_iort_node *node, void *context); 152 153 /* Root pointer to the mapped IORT table */ 154 static struct acpi_table_header *iort_table; 155 156 static LIST_HEAD(iort_msi_chip_list); 157 static DEFINE_SPINLOCK(iort_msi_chip_lock); 158 159 /** 160 * iort_register_domain_token() - register domain token along with related 161 * ITS ID and base address to the list from where we can get it back later on. 162 * @trans_id: ITS ID. 163 * @base: ITS base address. 164 * @fw_node: Domain token. 165 * 166 * Returns: 0 on success, -ENOMEM if no memory when allocating list element 167 */ 168 int iort_register_domain_token(int trans_id, phys_addr_t base, 169 struct fwnode_handle *fw_node) 170 { 171 struct iort_its_msi_chip *its_msi_chip; 172 173 its_msi_chip = kzalloc(sizeof(*its_msi_chip), GFP_KERNEL); 174 if (!its_msi_chip) 175 return -ENOMEM; 176 177 its_msi_chip->fw_node = fw_node; 178 its_msi_chip->translation_id = trans_id; 179 its_msi_chip->base_addr = base; 180 181 spin_lock(&iort_msi_chip_lock); 182 list_add(&its_msi_chip->list, &iort_msi_chip_list); 183 spin_unlock(&iort_msi_chip_lock); 184 185 return 0; 186 } 187 188 /** 189 * iort_deregister_domain_token() - Deregister domain token based on ITS ID 190 * @trans_id: ITS ID. 191 * 192 * Returns: none. 193 */ 194 void iort_deregister_domain_token(int trans_id) 195 { 196 struct iort_its_msi_chip *its_msi_chip, *t; 197 198 spin_lock(&iort_msi_chip_lock); 199 list_for_each_entry_safe(its_msi_chip, t, &iort_msi_chip_list, list) { 200 if (its_msi_chip->translation_id == trans_id) { 201 list_del(&its_msi_chip->list); 202 kfree(its_msi_chip); 203 break; 204 } 205 } 206 spin_unlock(&iort_msi_chip_lock); 207 } 208 209 /** 210 * iort_find_domain_token() - Find domain token based on given ITS ID 211 * @trans_id: ITS ID. 212 * 213 * Returns: domain token when find on the list, NULL otherwise 214 */ 215 struct fwnode_handle *iort_find_domain_token(int trans_id) 216 { 217 struct fwnode_handle *fw_node = NULL; 218 struct iort_its_msi_chip *its_msi_chip; 219 220 spin_lock(&iort_msi_chip_lock); 221 list_for_each_entry(its_msi_chip, &iort_msi_chip_list, list) { 222 if (its_msi_chip->translation_id == trans_id) { 223 fw_node = its_msi_chip->fw_node; 224 break; 225 } 226 } 227 spin_unlock(&iort_msi_chip_lock); 228 229 return fw_node; 230 } 231 232 static struct acpi_iort_node *iort_scan_node(enum acpi_iort_node_type type, 233 iort_find_node_callback callback, 234 void *context) 235 { 236 struct acpi_iort_node *iort_node, *iort_end; 237 struct acpi_table_iort *iort; 238 int i; 239 240 if (!iort_table) 241 return NULL; 242 243 /* Get the first IORT node */ 244 iort = (struct acpi_table_iort *)iort_table; 245 iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort, 246 iort->node_offset); 247 iort_end = ACPI_ADD_PTR(struct acpi_iort_node, iort_table, 248 iort_table->length); 249 250 for (i = 0; i < iort->node_count; i++) { 251 if (WARN_TAINT(iort_node >= iort_end, TAINT_FIRMWARE_WORKAROUND, 252 "IORT node pointer overflows, bad table!\n")) 253 return NULL; 254 255 if (iort_node->type == type && 256 ACPI_SUCCESS(callback(iort_node, context))) 257 return iort_node; 258 259 iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort_node, 260 iort_node->length); 261 } 262 263 return NULL; 264 } 265 266 static acpi_status iort_match_node_callback(struct acpi_iort_node *node, 267 void *context) 268 { 269 struct device *dev = context; 270 acpi_status status = AE_NOT_FOUND; 271 272 if (node->type == ACPI_IORT_NODE_NAMED_COMPONENT) { 273 struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; 274 struct acpi_device *adev = to_acpi_device_node(dev->fwnode); 275 struct acpi_iort_named_component *ncomp; 276 277 if (!adev) 278 goto out; 279 280 status = acpi_get_name(adev->handle, ACPI_FULL_PATHNAME, &buf); 281 if (ACPI_FAILURE(status)) { 282 dev_warn(dev, "Can't get device full path name\n"); 283 goto out; 284 } 285 286 ncomp = (struct acpi_iort_named_component *)node->node_data; 287 status = !strcmp(ncomp->device_name, buf.pointer) ? 288 AE_OK : AE_NOT_FOUND; 289 acpi_os_free(buf.pointer); 290 } else if (node->type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX) { 291 struct acpi_iort_root_complex *pci_rc; 292 struct pci_bus *bus; 293 294 bus = to_pci_bus(dev); 295 pci_rc = (struct acpi_iort_root_complex *)node->node_data; 296 297 /* 298 * It is assumed that PCI segment numbers maps one-to-one 299 * with root complexes. Each segment number can represent only 300 * one root complex. 301 */ 302 status = pci_rc->pci_segment_number == pci_domain_nr(bus) ? 303 AE_OK : AE_NOT_FOUND; 304 } 305 out: 306 return status; 307 } 308 309 static int iort_id_map(struct acpi_iort_id_mapping *map, u8 type, u32 rid_in, 310 u32 *rid_out) 311 { 312 /* Single mapping does not care for input id */ 313 if (map->flags & ACPI_IORT_ID_SINGLE_MAPPING) { 314 if (type == ACPI_IORT_NODE_NAMED_COMPONENT || 315 type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX) { 316 *rid_out = map->output_base; 317 return 0; 318 } 319 320 pr_warn(FW_BUG "[map %p] SINGLE MAPPING flag not allowed for node type %d, skipping ID map\n", 321 map, type); 322 return -ENXIO; 323 } 324 325 if (rid_in < map->input_base || 326 (rid_in >= map->input_base + map->id_count)) 327 return -ENXIO; 328 329 *rid_out = map->output_base + (rid_in - map->input_base); 330 return 0; 331 } 332 333 static struct acpi_iort_node *iort_node_get_id(struct acpi_iort_node *node, 334 u32 *id_out, int index) 335 { 336 struct acpi_iort_node *parent; 337 struct acpi_iort_id_mapping *map; 338 339 if (!node->mapping_offset || !node->mapping_count || 340 index >= node->mapping_count) 341 return NULL; 342 343 map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, node, 344 node->mapping_offset + index * sizeof(*map)); 345 346 /* Firmware bug! */ 347 if (!map->output_reference) { 348 pr_err(FW_BUG "[node %p type %d] ID map has NULL parent reference\n", 349 node, node->type); 350 return NULL; 351 } 352 353 parent = ACPI_ADD_PTR(struct acpi_iort_node, iort_table, 354 map->output_reference); 355 356 if (map->flags & ACPI_IORT_ID_SINGLE_MAPPING) { 357 if (node->type == ACPI_IORT_NODE_NAMED_COMPONENT || 358 node->type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX || 359 node->type == ACPI_IORT_NODE_SMMU_V3 || 360 node->type == ACPI_IORT_NODE_PMCG) { 361 *id_out = map->output_base; 362 return parent; 363 } 364 } 365 366 return NULL; 367 } 368 369 static int iort_get_id_mapping_index(struct acpi_iort_node *node) 370 { 371 struct acpi_iort_smmu_v3 *smmu; 372 373 switch (node->type) { 374 case ACPI_IORT_NODE_SMMU_V3: 375 /* 376 * SMMUv3 dev ID mapping index was introduced in revision 1 377 * table, not available in revision 0 378 */ 379 if (node->revision < 1) 380 return -EINVAL; 381 382 smmu = (struct acpi_iort_smmu_v3 *)node->node_data; 383 /* 384 * ID mapping index is only ignored if all interrupts are 385 * GSIV based 386 */ 387 if (smmu->event_gsiv && smmu->pri_gsiv && smmu->gerr_gsiv 388 && smmu->sync_gsiv) 389 return -EINVAL; 390 391 if (smmu->id_mapping_index >= node->mapping_count) { 392 pr_err(FW_BUG "[node %p type %d] ID mapping index overflows valid mappings\n", 393 node, node->type); 394 return -EINVAL; 395 } 396 397 return smmu->id_mapping_index; 398 case ACPI_IORT_NODE_PMCG: 399 return 0; 400 default: 401 return -EINVAL; 402 } 403 } 404 405 static struct acpi_iort_node *iort_node_map_id(struct acpi_iort_node *node, 406 u32 id_in, u32 *id_out, 407 u8 type_mask) 408 { 409 u32 id = id_in; 410 411 /* Parse the ID mapping tree to find specified node type */ 412 while (node) { 413 struct acpi_iort_id_mapping *map; 414 int i, index; 415 416 if (IORT_TYPE_MASK(node->type) & type_mask) { 417 if (id_out) 418 *id_out = id; 419 return node; 420 } 421 422 if (!node->mapping_offset || !node->mapping_count) 423 goto fail_map; 424 425 map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, node, 426 node->mapping_offset); 427 428 /* Firmware bug! */ 429 if (!map->output_reference) { 430 pr_err(FW_BUG "[node %p type %d] ID map has NULL parent reference\n", 431 node, node->type); 432 goto fail_map; 433 } 434 435 /* 436 * Get the special ID mapping index (if any) and skip its 437 * associated ID map to prevent erroneous multi-stage 438 * IORT ID translations. 439 */ 440 index = iort_get_id_mapping_index(node); 441 442 /* Do the ID translation */ 443 for (i = 0; i < node->mapping_count; i++, map++) { 444 /* if it is special mapping index, skip it */ 445 if (i == index) 446 continue; 447 448 if (!iort_id_map(map, node->type, id, &id)) 449 break; 450 } 451 452 if (i == node->mapping_count) 453 goto fail_map; 454 455 node = ACPI_ADD_PTR(struct acpi_iort_node, iort_table, 456 map->output_reference); 457 } 458 459 fail_map: 460 /* Map input ID to output ID unchanged on mapping failure */ 461 if (id_out) 462 *id_out = id_in; 463 464 return NULL; 465 } 466 467 static struct acpi_iort_node *iort_node_map_platform_id( 468 struct acpi_iort_node *node, u32 *id_out, u8 type_mask, 469 int index) 470 { 471 struct acpi_iort_node *parent; 472 u32 id; 473 474 /* step 1: retrieve the initial dev id */ 475 parent = iort_node_get_id(node, &id, index); 476 if (!parent) 477 return NULL; 478 479 /* 480 * optional step 2: map the initial dev id if its parent is not 481 * the target type we want, map it again for the use cases such 482 * as NC (named component) -> SMMU -> ITS. If the type is matched, 483 * return the initial dev id and its parent pointer directly. 484 */ 485 if (!(IORT_TYPE_MASK(parent->type) & type_mask)) 486 parent = iort_node_map_id(parent, id, id_out, type_mask); 487 else 488 if (id_out) 489 *id_out = id; 490 491 return parent; 492 } 493 494 static struct acpi_iort_node *iort_find_dev_node(struct device *dev) 495 { 496 struct pci_bus *pbus; 497 498 if (!dev_is_pci(dev)) { 499 struct acpi_iort_node *node; 500 /* 501 * scan iort_fwnode_list to see if it's an iort platform 502 * device (such as SMMU, PMCG),its iort node already cached 503 * and associated with fwnode when iort platform devices 504 * were initialized. 505 */ 506 node = iort_get_iort_node(dev->fwnode); 507 if (node) 508 return node; 509 510 /* 511 * if not, then it should be a platform device defined in 512 * DSDT/SSDT (with Named Component node in IORT) 513 */ 514 return iort_scan_node(ACPI_IORT_NODE_NAMED_COMPONENT, 515 iort_match_node_callback, dev); 516 } 517 518 /* Find a PCI root bus */ 519 pbus = to_pci_dev(dev)->bus; 520 while (!pci_is_root_bus(pbus)) 521 pbus = pbus->parent; 522 523 return iort_scan_node(ACPI_IORT_NODE_PCI_ROOT_COMPLEX, 524 iort_match_node_callback, &pbus->dev); 525 } 526 527 /** 528 * iort_msi_map_rid() - Map a MSI requester ID for a device 529 * @dev: The device for which the mapping is to be done. 530 * @req_id: The device requester ID. 531 * 532 * Returns: mapped MSI RID on success, input requester ID otherwise 533 */ 534 u32 iort_msi_map_rid(struct device *dev, u32 req_id) 535 { 536 struct acpi_iort_node *node; 537 u32 dev_id; 538 539 node = iort_find_dev_node(dev); 540 if (!node) 541 return req_id; 542 543 iort_node_map_id(node, req_id, &dev_id, IORT_MSI_TYPE); 544 return dev_id; 545 } 546 547 /** 548 * iort_pmsi_get_dev_id() - Get the device id for a device 549 * @dev: The device for which the mapping is to be done. 550 * @dev_id: The device ID found. 551 * 552 * Returns: 0 for successful find a dev id, -ENODEV on error 553 */ 554 int iort_pmsi_get_dev_id(struct device *dev, u32 *dev_id) 555 { 556 int i, index; 557 struct acpi_iort_node *node; 558 559 node = iort_find_dev_node(dev); 560 if (!node) 561 return -ENODEV; 562 563 index = iort_get_id_mapping_index(node); 564 /* if there is a valid index, go get the dev_id directly */ 565 if (index >= 0) { 566 if (iort_node_get_id(node, dev_id, index)) 567 return 0; 568 } else { 569 for (i = 0; i < node->mapping_count; i++) { 570 if (iort_node_map_platform_id(node, dev_id, 571 IORT_MSI_TYPE, i)) 572 return 0; 573 } 574 } 575 576 return -ENODEV; 577 } 578 579 static int __maybe_unused iort_find_its_base(u32 its_id, phys_addr_t *base) 580 { 581 struct iort_its_msi_chip *its_msi_chip; 582 int ret = -ENODEV; 583 584 spin_lock(&iort_msi_chip_lock); 585 list_for_each_entry(its_msi_chip, &iort_msi_chip_list, list) { 586 if (its_msi_chip->translation_id == its_id) { 587 *base = its_msi_chip->base_addr; 588 ret = 0; 589 break; 590 } 591 } 592 spin_unlock(&iort_msi_chip_lock); 593 594 return ret; 595 } 596 597 /** 598 * iort_dev_find_its_id() - Find the ITS identifier for a device 599 * @dev: The device. 600 * @req_id: Device's requester ID 601 * @idx: Index of the ITS identifier list. 602 * @its_id: ITS identifier. 603 * 604 * Returns: 0 on success, appropriate error value otherwise 605 */ 606 static int iort_dev_find_its_id(struct device *dev, u32 req_id, 607 unsigned int idx, int *its_id) 608 { 609 struct acpi_iort_its_group *its; 610 struct acpi_iort_node *node; 611 612 node = iort_find_dev_node(dev); 613 if (!node) 614 return -ENXIO; 615 616 node = iort_node_map_id(node, req_id, NULL, IORT_MSI_TYPE); 617 if (!node) 618 return -ENXIO; 619 620 /* Move to ITS specific data */ 621 its = (struct acpi_iort_its_group *)node->node_data; 622 if (idx > its->its_count) { 623 dev_err(dev, "requested ITS ID index [%d] is greater than available [%d]\n", 624 idx, its->its_count); 625 return -ENXIO; 626 } 627 628 *its_id = its->identifiers[idx]; 629 return 0; 630 } 631 632 /** 633 * iort_get_device_domain() - Find MSI domain related to a device 634 * @dev: The device. 635 * @req_id: Requester ID for the device. 636 * 637 * Returns: the MSI domain for this device, NULL otherwise 638 */ 639 struct irq_domain *iort_get_device_domain(struct device *dev, u32 req_id) 640 { 641 struct fwnode_handle *handle; 642 int its_id; 643 644 if (iort_dev_find_its_id(dev, req_id, 0, &its_id)) 645 return NULL; 646 647 handle = iort_find_domain_token(its_id); 648 if (!handle) 649 return NULL; 650 651 return irq_find_matching_fwnode(handle, DOMAIN_BUS_PCI_MSI); 652 } 653 654 static void iort_set_device_domain(struct device *dev, 655 struct acpi_iort_node *node) 656 { 657 struct acpi_iort_its_group *its; 658 struct acpi_iort_node *msi_parent; 659 struct acpi_iort_id_mapping *map; 660 struct fwnode_handle *iort_fwnode; 661 struct irq_domain *domain; 662 int index; 663 664 index = iort_get_id_mapping_index(node); 665 if (index < 0) 666 return; 667 668 map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, node, 669 node->mapping_offset + index * sizeof(*map)); 670 671 /* Firmware bug! */ 672 if (!map->output_reference || 673 !(map->flags & ACPI_IORT_ID_SINGLE_MAPPING)) { 674 pr_err(FW_BUG "[node %p type %d] Invalid MSI mapping\n", 675 node, node->type); 676 return; 677 } 678 679 msi_parent = ACPI_ADD_PTR(struct acpi_iort_node, iort_table, 680 map->output_reference); 681 682 if (!msi_parent || msi_parent->type != ACPI_IORT_NODE_ITS_GROUP) 683 return; 684 685 /* Move to ITS specific data */ 686 its = (struct acpi_iort_its_group *)msi_parent->node_data; 687 688 iort_fwnode = iort_find_domain_token(its->identifiers[0]); 689 if (!iort_fwnode) 690 return; 691 692 domain = irq_find_matching_fwnode(iort_fwnode, DOMAIN_BUS_PLATFORM_MSI); 693 if (domain) 694 dev_set_msi_domain(dev, domain); 695 } 696 697 /** 698 * iort_get_platform_device_domain() - Find MSI domain related to a 699 * platform device 700 * @dev: the dev pointer associated with the platform device 701 * 702 * Returns: the MSI domain for this device, NULL otherwise 703 */ 704 static struct irq_domain *iort_get_platform_device_domain(struct device *dev) 705 { 706 struct acpi_iort_node *node, *msi_parent = NULL; 707 struct fwnode_handle *iort_fwnode; 708 struct acpi_iort_its_group *its; 709 int i; 710 711 /* find its associated iort node */ 712 node = iort_scan_node(ACPI_IORT_NODE_NAMED_COMPONENT, 713 iort_match_node_callback, dev); 714 if (!node) 715 return NULL; 716 717 /* then find its msi parent node */ 718 for (i = 0; i < node->mapping_count; i++) { 719 msi_parent = iort_node_map_platform_id(node, NULL, 720 IORT_MSI_TYPE, i); 721 if (msi_parent) 722 break; 723 } 724 725 if (!msi_parent) 726 return NULL; 727 728 /* Move to ITS specific data */ 729 its = (struct acpi_iort_its_group *)msi_parent->node_data; 730 731 iort_fwnode = iort_find_domain_token(its->identifiers[0]); 732 if (!iort_fwnode) 733 return NULL; 734 735 return irq_find_matching_fwnode(iort_fwnode, DOMAIN_BUS_PLATFORM_MSI); 736 } 737 738 void acpi_configure_pmsi_domain(struct device *dev) 739 { 740 struct irq_domain *msi_domain; 741 742 msi_domain = iort_get_platform_device_domain(dev); 743 if (msi_domain) 744 dev_set_msi_domain(dev, msi_domain); 745 } 746 747 static int __maybe_unused __get_pci_rid(struct pci_dev *pdev, u16 alias, 748 void *data) 749 { 750 u32 *rid = data; 751 752 *rid = alias; 753 return 0; 754 } 755 756 static int arm_smmu_iort_xlate(struct device *dev, u32 streamid, 757 struct fwnode_handle *fwnode, 758 const struct iommu_ops *ops) 759 { 760 int ret = iommu_fwspec_init(dev, fwnode, ops); 761 762 if (!ret) 763 ret = iommu_fwspec_add_ids(dev, &streamid, 1); 764 765 return ret; 766 } 767 768 static inline bool iort_iommu_driver_enabled(u8 type) 769 { 770 switch (type) { 771 case ACPI_IORT_NODE_SMMU_V3: 772 return IS_BUILTIN(CONFIG_ARM_SMMU_V3); 773 case ACPI_IORT_NODE_SMMU: 774 return IS_BUILTIN(CONFIG_ARM_SMMU); 775 default: 776 pr_warn("IORT node type %u does not describe an SMMU\n", type); 777 return false; 778 } 779 } 780 781 #ifdef CONFIG_IOMMU_API 782 static struct acpi_iort_node *iort_get_msi_resv_iommu(struct device *dev) 783 { 784 struct acpi_iort_node *iommu; 785 struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); 786 787 iommu = iort_get_iort_node(fwspec->iommu_fwnode); 788 789 if (iommu && (iommu->type == ACPI_IORT_NODE_SMMU_V3)) { 790 struct acpi_iort_smmu_v3 *smmu; 791 792 smmu = (struct acpi_iort_smmu_v3 *)iommu->node_data; 793 if (smmu->model == ACPI_IORT_SMMU_V3_HISILICON_HI161X) 794 return iommu; 795 } 796 797 return NULL; 798 } 799 800 static inline const struct iommu_ops *iort_fwspec_iommu_ops(struct device *dev) 801 { 802 struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); 803 804 return (fwspec && fwspec->ops) ? fwspec->ops : NULL; 805 } 806 807 static inline int iort_add_device_replay(const struct iommu_ops *ops, 808 struct device *dev) 809 { 810 int err = 0; 811 812 if (dev->bus && !device_iommu_mapped(dev)) 813 err = iommu_probe_device(dev); 814 815 return err; 816 } 817 818 /** 819 * iort_iommu_msi_get_resv_regions - Reserved region driver helper 820 * @dev: Device from iommu_get_resv_regions() 821 * @head: Reserved region list from iommu_get_resv_regions() 822 * 823 * Returns: Number of msi reserved regions on success (0 if platform 824 * doesn't require the reservation or no associated msi regions), 825 * appropriate error value otherwise. The ITS interrupt translation 826 * spaces (ITS_base + SZ_64K, SZ_64K) associated with the device 827 * are the msi reserved regions. 828 */ 829 int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head) 830 { 831 struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); 832 struct acpi_iort_its_group *its; 833 struct acpi_iort_node *iommu_node, *its_node = NULL; 834 int i, resv = 0; 835 836 iommu_node = iort_get_msi_resv_iommu(dev); 837 if (!iommu_node) 838 return 0; 839 840 /* 841 * Current logic to reserve ITS regions relies on HW topologies 842 * where a given PCI or named component maps its IDs to only one 843 * ITS group; if a PCI or named component can map its IDs to 844 * different ITS groups through IORT mappings this function has 845 * to be reworked to ensure we reserve regions for all ITS groups 846 * a given PCI or named component may map IDs to. 847 */ 848 849 for (i = 0; i < fwspec->num_ids; i++) { 850 its_node = iort_node_map_id(iommu_node, 851 fwspec->ids[i], 852 NULL, IORT_MSI_TYPE); 853 if (its_node) 854 break; 855 } 856 857 if (!its_node) 858 return 0; 859 860 /* Move to ITS specific data */ 861 its = (struct acpi_iort_its_group *)its_node->node_data; 862 863 for (i = 0; i < its->its_count; i++) { 864 phys_addr_t base; 865 866 if (!iort_find_its_base(its->identifiers[i], &base)) { 867 int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO; 868 struct iommu_resv_region *region; 869 870 region = iommu_alloc_resv_region(base + SZ_64K, SZ_64K, 871 prot, IOMMU_RESV_MSI); 872 if (region) { 873 list_add_tail(®ion->list, head); 874 resv++; 875 } 876 } 877 } 878 879 return (resv == its->its_count) ? resv : -ENODEV; 880 } 881 #else 882 static inline const struct iommu_ops *iort_fwspec_iommu_ops(struct device *dev) 883 { return NULL; } 884 static inline int iort_add_device_replay(const struct iommu_ops *ops, 885 struct device *dev) 886 { return 0; } 887 int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head) 888 { return 0; } 889 #endif 890 891 static int iort_iommu_xlate(struct device *dev, struct acpi_iort_node *node, 892 u32 streamid) 893 { 894 const struct iommu_ops *ops; 895 struct fwnode_handle *iort_fwnode; 896 897 if (!node) 898 return -ENODEV; 899 900 iort_fwnode = iort_get_fwnode(node); 901 if (!iort_fwnode) 902 return -ENODEV; 903 904 /* 905 * If the ops look-up fails, this means that either 906 * the SMMU drivers have not been probed yet or that 907 * the SMMU drivers are not built in the kernel; 908 * Depending on whether the SMMU drivers are built-in 909 * in the kernel or not, defer the IOMMU configuration 910 * or just abort it. 911 */ 912 ops = iommu_ops_from_fwnode(iort_fwnode); 913 if (!ops) 914 return iort_iommu_driver_enabled(node->type) ? 915 -EPROBE_DEFER : -ENODEV; 916 917 return arm_smmu_iort_xlate(dev, streamid, iort_fwnode, ops); 918 } 919 920 struct iort_pci_alias_info { 921 struct device *dev; 922 struct acpi_iort_node *node; 923 }; 924 925 static int iort_pci_iommu_init(struct pci_dev *pdev, u16 alias, void *data) 926 { 927 struct iort_pci_alias_info *info = data; 928 struct acpi_iort_node *parent; 929 u32 streamid; 930 931 parent = iort_node_map_id(info->node, alias, &streamid, 932 IORT_IOMMU_TYPE); 933 return iort_iommu_xlate(info->dev, parent, streamid); 934 } 935 936 static int nc_dma_get_range(struct device *dev, u64 *size) 937 { 938 struct acpi_iort_node *node; 939 struct acpi_iort_named_component *ncomp; 940 941 node = iort_scan_node(ACPI_IORT_NODE_NAMED_COMPONENT, 942 iort_match_node_callback, dev); 943 if (!node) 944 return -ENODEV; 945 946 ncomp = (struct acpi_iort_named_component *)node->node_data; 947 948 *size = ncomp->memory_address_limit >= 64 ? U64_MAX : 949 1ULL<<ncomp->memory_address_limit; 950 951 return 0; 952 } 953 954 static int rc_dma_get_range(struct device *dev, u64 *size) 955 { 956 struct acpi_iort_node *node; 957 struct acpi_iort_root_complex *rc; 958 struct pci_bus *pbus = to_pci_dev(dev)->bus; 959 960 node = iort_scan_node(ACPI_IORT_NODE_PCI_ROOT_COMPLEX, 961 iort_match_node_callback, &pbus->dev); 962 if (!node || node->revision < 1) 963 return -ENODEV; 964 965 rc = (struct acpi_iort_root_complex *)node->node_data; 966 967 *size = rc->memory_address_limit >= 64 ? U64_MAX : 968 1ULL<<rc->memory_address_limit; 969 970 return 0; 971 } 972 973 /** 974 * iort_dma_setup() - Set-up device DMA parameters. 975 * 976 * @dev: device to configure 977 * @dma_addr: device DMA address result pointer 978 * @size: DMA range size result pointer 979 */ 980 void iort_dma_setup(struct device *dev, u64 *dma_addr, u64 *dma_size) 981 { 982 u64 mask, dmaaddr = 0, size = 0, offset = 0; 983 int ret, msb; 984 985 /* 986 * If @dev is expected to be DMA-capable then the bus code that created 987 * it should have initialised its dma_mask pointer by this point. For 988 * now, we'll continue the legacy behaviour of coercing it to the 989 * coherent mask if not, but we'll no longer do so quietly. 990 */ 991 if (!dev->dma_mask) { 992 dev_warn(dev, "DMA mask not set\n"); 993 dev->dma_mask = &dev->coherent_dma_mask; 994 } 995 996 if (dev->coherent_dma_mask) 997 size = max(dev->coherent_dma_mask, dev->coherent_dma_mask + 1); 998 else 999 size = 1ULL << 32; 1000 1001 if (dev_is_pci(dev)) { 1002 ret = acpi_dma_get_range(dev, &dmaaddr, &offset, &size); 1003 if (ret == -ENODEV) 1004 ret = rc_dma_get_range(dev, &size); 1005 } else { 1006 ret = nc_dma_get_range(dev, &size); 1007 } 1008 1009 if (!ret) { 1010 msb = fls64(dmaaddr + size - 1); 1011 /* 1012 * Round-up to the power-of-two mask or set 1013 * the mask to the whole 64-bit address space 1014 * in case the DMA region covers the full 1015 * memory window. 1016 */ 1017 mask = msb == 64 ? U64_MAX : (1ULL << msb) - 1; 1018 /* 1019 * Limit coherent and dma mask based on size 1020 * retrieved from firmware. 1021 */ 1022 dev->bus_dma_mask = mask; 1023 dev->coherent_dma_mask = mask; 1024 *dev->dma_mask = mask; 1025 } 1026 1027 *dma_addr = dmaaddr; 1028 *dma_size = size; 1029 1030 dev->dma_pfn_offset = PFN_DOWN(offset); 1031 dev_dbg(dev, "dma_pfn_offset(%#08llx)\n", offset); 1032 } 1033 1034 /** 1035 * iort_iommu_configure - Set-up IOMMU configuration for a device. 1036 * 1037 * @dev: device to configure 1038 * 1039 * Returns: iommu_ops pointer on configuration success 1040 * NULL on configuration failure 1041 */ 1042 const struct iommu_ops *iort_iommu_configure(struct device *dev) 1043 { 1044 struct acpi_iort_node *node, *parent; 1045 const struct iommu_ops *ops; 1046 u32 streamid = 0; 1047 int err = -ENODEV; 1048 1049 /* 1050 * If we already translated the fwspec there 1051 * is nothing left to do, return the iommu_ops. 1052 */ 1053 ops = iort_fwspec_iommu_ops(dev); 1054 if (ops) 1055 return ops; 1056 1057 if (dev_is_pci(dev)) { 1058 struct pci_bus *bus = to_pci_dev(dev)->bus; 1059 struct iort_pci_alias_info info = { .dev = dev }; 1060 1061 node = iort_scan_node(ACPI_IORT_NODE_PCI_ROOT_COMPLEX, 1062 iort_match_node_callback, &bus->dev); 1063 if (!node) 1064 return NULL; 1065 1066 info.node = node; 1067 err = pci_for_each_dma_alias(to_pci_dev(dev), 1068 iort_pci_iommu_init, &info); 1069 } else { 1070 int i = 0; 1071 1072 node = iort_scan_node(ACPI_IORT_NODE_NAMED_COMPONENT, 1073 iort_match_node_callback, dev); 1074 if (!node) 1075 return NULL; 1076 1077 do { 1078 parent = iort_node_map_platform_id(node, &streamid, 1079 IORT_IOMMU_TYPE, 1080 i++); 1081 1082 if (parent) 1083 err = iort_iommu_xlate(dev, parent, streamid); 1084 } while (parent && !err); 1085 } 1086 1087 /* 1088 * If we have reason to believe the IOMMU driver missed the initial 1089 * add_device callback for dev, replay it to get things in order. 1090 */ 1091 if (!err) { 1092 ops = iort_fwspec_iommu_ops(dev); 1093 err = iort_add_device_replay(ops, dev); 1094 } 1095 1096 /* Ignore all other errors apart from EPROBE_DEFER */ 1097 if (err == -EPROBE_DEFER) { 1098 ops = ERR_PTR(err); 1099 } else if (err) { 1100 dev_dbg(dev, "Adding to IOMMU failed: %d\n", err); 1101 ops = NULL; 1102 } 1103 1104 return ops; 1105 } 1106 1107 static void __init acpi_iort_register_irq(int hwirq, const char *name, 1108 int trigger, 1109 struct resource *res) 1110 { 1111 int irq = acpi_register_gsi(NULL, hwirq, trigger, 1112 ACPI_ACTIVE_HIGH); 1113 1114 if (irq <= 0) { 1115 pr_err("could not register gsi hwirq %d name [%s]\n", hwirq, 1116 name); 1117 return; 1118 } 1119 1120 res->start = irq; 1121 res->end = irq; 1122 res->flags = IORESOURCE_IRQ; 1123 res->name = name; 1124 } 1125 1126 static int __init arm_smmu_v3_count_resources(struct acpi_iort_node *node) 1127 { 1128 struct acpi_iort_smmu_v3 *smmu; 1129 /* Always present mem resource */ 1130 int num_res = 1; 1131 1132 /* Retrieve SMMUv3 specific data */ 1133 smmu = (struct acpi_iort_smmu_v3 *)node->node_data; 1134 1135 if (smmu->event_gsiv) 1136 num_res++; 1137 1138 if (smmu->pri_gsiv) 1139 num_res++; 1140 1141 if (smmu->gerr_gsiv) 1142 num_res++; 1143 1144 if (smmu->sync_gsiv) 1145 num_res++; 1146 1147 return num_res; 1148 } 1149 1150 static bool arm_smmu_v3_is_combined_irq(struct acpi_iort_smmu_v3 *smmu) 1151 { 1152 /* 1153 * Cavium ThunderX2 implementation doesn't not support unique 1154 * irq line. Use single irq line for all the SMMUv3 interrupts. 1155 */ 1156 if (smmu->model != ACPI_IORT_SMMU_V3_CAVIUM_CN99XX) 1157 return false; 1158 1159 /* 1160 * ThunderX2 doesn't support MSIs from the SMMU, so we're checking 1161 * SPI numbers here. 1162 */ 1163 return smmu->event_gsiv == smmu->pri_gsiv && 1164 smmu->event_gsiv == smmu->gerr_gsiv && 1165 smmu->event_gsiv == smmu->sync_gsiv; 1166 } 1167 1168 static unsigned long arm_smmu_v3_resource_size(struct acpi_iort_smmu_v3 *smmu) 1169 { 1170 /* 1171 * Override the size, for Cavium ThunderX2 implementation 1172 * which doesn't support the page 1 SMMU register space. 1173 */ 1174 if (smmu->model == ACPI_IORT_SMMU_V3_CAVIUM_CN99XX) 1175 return SZ_64K; 1176 1177 return SZ_128K; 1178 } 1179 1180 static void __init arm_smmu_v3_init_resources(struct resource *res, 1181 struct acpi_iort_node *node) 1182 { 1183 struct acpi_iort_smmu_v3 *smmu; 1184 int num_res = 0; 1185 1186 /* Retrieve SMMUv3 specific data */ 1187 smmu = (struct acpi_iort_smmu_v3 *)node->node_data; 1188 1189 res[num_res].start = smmu->base_address; 1190 res[num_res].end = smmu->base_address + 1191 arm_smmu_v3_resource_size(smmu) - 1; 1192 res[num_res].flags = IORESOURCE_MEM; 1193 1194 num_res++; 1195 if (arm_smmu_v3_is_combined_irq(smmu)) { 1196 if (smmu->event_gsiv) 1197 acpi_iort_register_irq(smmu->event_gsiv, "combined", 1198 ACPI_EDGE_SENSITIVE, 1199 &res[num_res++]); 1200 } else { 1201 1202 if (smmu->event_gsiv) 1203 acpi_iort_register_irq(smmu->event_gsiv, "eventq", 1204 ACPI_EDGE_SENSITIVE, 1205 &res[num_res++]); 1206 1207 if (smmu->pri_gsiv) 1208 acpi_iort_register_irq(smmu->pri_gsiv, "priq", 1209 ACPI_EDGE_SENSITIVE, 1210 &res[num_res++]); 1211 1212 if (smmu->gerr_gsiv) 1213 acpi_iort_register_irq(smmu->gerr_gsiv, "gerror", 1214 ACPI_EDGE_SENSITIVE, 1215 &res[num_res++]); 1216 1217 if (smmu->sync_gsiv) 1218 acpi_iort_register_irq(smmu->sync_gsiv, "cmdq-sync", 1219 ACPI_EDGE_SENSITIVE, 1220 &res[num_res++]); 1221 } 1222 } 1223 1224 static void __init arm_smmu_v3_dma_configure(struct device *dev, 1225 struct acpi_iort_node *node) 1226 { 1227 struct acpi_iort_smmu_v3 *smmu; 1228 enum dev_dma_attr attr; 1229 1230 /* Retrieve SMMUv3 specific data */ 1231 smmu = (struct acpi_iort_smmu_v3 *)node->node_data; 1232 1233 attr = (smmu->flags & ACPI_IORT_SMMU_V3_COHACC_OVERRIDE) ? 1234 DEV_DMA_COHERENT : DEV_DMA_NON_COHERENT; 1235 1236 /* We expect the dma masks to be equivalent for all SMMUv3 set-ups */ 1237 dev->dma_mask = &dev->coherent_dma_mask; 1238 1239 /* Configure DMA for the page table walker */ 1240 acpi_dma_configure(dev, attr); 1241 } 1242 1243 #if defined(CONFIG_ACPI_NUMA) 1244 /* 1245 * set numa proximity domain for smmuv3 device 1246 */ 1247 static int __init arm_smmu_v3_set_proximity(struct device *dev, 1248 struct acpi_iort_node *node) 1249 { 1250 struct acpi_iort_smmu_v3 *smmu; 1251 1252 smmu = (struct acpi_iort_smmu_v3 *)node->node_data; 1253 if (smmu->flags & ACPI_IORT_SMMU_V3_PXM_VALID) { 1254 int node = acpi_map_pxm_to_node(smmu->pxm); 1255 1256 if (node != NUMA_NO_NODE && !node_online(node)) 1257 return -EINVAL; 1258 1259 set_dev_node(dev, node); 1260 pr_info("SMMU-v3[%llx] Mapped to Proximity domain %d\n", 1261 smmu->base_address, 1262 smmu->pxm); 1263 } 1264 return 0; 1265 } 1266 #else 1267 #define arm_smmu_v3_set_proximity NULL 1268 #endif 1269 1270 static int __init arm_smmu_count_resources(struct acpi_iort_node *node) 1271 { 1272 struct acpi_iort_smmu *smmu; 1273 1274 /* Retrieve SMMU specific data */ 1275 smmu = (struct acpi_iort_smmu *)node->node_data; 1276 1277 /* 1278 * Only consider the global fault interrupt and ignore the 1279 * configuration access interrupt. 1280 * 1281 * MMIO address and global fault interrupt resources are always 1282 * present so add them to the context interrupt count as a static 1283 * value. 1284 */ 1285 return smmu->context_interrupt_count + 2; 1286 } 1287 1288 static void __init arm_smmu_init_resources(struct resource *res, 1289 struct acpi_iort_node *node) 1290 { 1291 struct acpi_iort_smmu *smmu; 1292 int i, hw_irq, trigger, num_res = 0; 1293 u64 *ctx_irq, *glb_irq; 1294 1295 /* Retrieve SMMU specific data */ 1296 smmu = (struct acpi_iort_smmu *)node->node_data; 1297 1298 res[num_res].start = smmu->base_address; 1299 res[num_res].end = smmu->base_address + smmu->span - 1; 1300 res[num_res].flags = IORESOURCE_MEM; 1301 num_res++; 1302 1303 glb_irq = ACPI_ADD_PTR(u64, node, smmu->global_interrupt_offset); 1304 /* Global IRQs */ 1305 hw_irq = IORT_IRQ_MASK(glb_irq[0]); 1306 trigger = IORT_IRQ_TRIGGER_MASK(glb_irq[0]); 1307 1308 acpi_iort_register_irq(hw_irq, "arm-smmu-global", trigger, 1309 &res[num_res++]); 1310 1311 /* Context IRQs */ 1312 ctx_irq = ACPI_ADD_PTR(u64, node, smmu->context_interrupt_offset); 1313 for (i = 0; i < smmu->context_interrupt_count; i++) { 1314 hw_irq = IORT_IRQ_MASK(ctx_irq[i]); 1315 trigger = IORT_IRQ_TRIGGER_MASK(ctx_irq[i]); 1316 1317 acpi_iort_register_irq(hw_irq, "arm-smmu-context", trigger, 1318 &res[num_res++]); 1319 } 1320 } 1321 1322 static void __init arm_smmu_dma_configure(struct device *dev, 1323 struct acpi_iort_node *node) 1324 { 1325 struct acpi_iort_smmu *smmu; 1326 enum dev_dma_attr attr; 1327 1328 /* Retrieve SMMU specific data */ 1329 smmu = (struct acpi_iort_smmu *)node->node_data; 1330 1331 attr = (smmu->flags & ACPI_IORT_SMMU_COHERENT_WALK) ? 1332 DEV_DMA_COHERENT : DEV_DMA_NON_COHERENT; 1333 1334 /* We expect the dma masks to be equivalent for SMMU set-ups */ 1335 dev->dma_mask = &dev->coherent_dma_mask; 1336 1337 /* Configure DMA for the page table walker */ 1338 acpi_dma_configure(dev, attr); 1339 } 1340 1341 static int __init arm_smmu_v3_pmcg_count_resources(struct acpi_iort_node *node) 1342 { 1343 struct acpi_iort_pmcg *pmcg; 1344 1345 /* Retrieve PMCG specific data */ 1346 pmcg = (struct acpi_iort_pmcg *)node->node_data; 1347 1348 /* 1349 * There are always 2 memory resources. 1350 * If the overflow_gsiv is present then add that for a total of 3. 1351 */ 1352 return pmcg->overflow_gsiv ? 3 : 2; 1353 } 1354 1355 static void __init arm_smmu_v3_pmcg_init_resources(struct resource *res, 1356 struct acpi_iort_node *node) 1357 { 1358 struct acpi_iort_pmcg *pmcg; 1359 1360 /* Retrieve PMCG specific data */ 1361 pmcg = (struct acpi_iort_pmcg *)node->node_data; 1362 1363 res[0].start = pmcg->page0_base_address; 1364 res[0].end = pmcg->page0_base_address + SZ_4K - 1; 1365 res[0].flags = IORESOURCE_MEM; 1366 res[1].start = pmcg->page1_base_address; 1367 res[1].end = pmcg->page1_base_address + SZ_4K - 1; 1368 res[1].flags = IORESOURCE_MEM; 1369 1370 if (pmcg->overflow_gsiv) 1371 acpi_iort_register_irq(pmcg->overflow_gsiv, "overflow", 1372 ACPI_EDGE_SENSITIVE, &res[2]); 1373 } 1374 1375 static struct acpi_platform_list pmcg_plat_info[] __initdata = { 1376 /* HiSilicon Hip08 Platform */ 1377 {"HISI ", "HIP08 ", 0, ACPI_SIG_IORT, greater_than_or_equal, 1378 "Erratum #162001800", IORT_SMMU_V3_PMCG_HISI_HIP08}, 1379 { } 1380 }; 1381 1382 static int __init arm_smmu_v3_pmcg_add_platdata(struct platform_device *pdev) 1383 { 1384 u32 model; 1385 int idx; 1386 1387 idx = acpi_match_platform_list(pmcg_plat_info); 1388 if (idx >= 0) 1389 model = pmcg_plat_info[idx].data; 1390 else 1391 model = IORT_SMMU_V3_PMCG_GENERIC; 1392 1393 return platform_device_add_data(pdev, &model, sizeof(model)); 1394 } 1395 1396 struct iort_dev_config { 1397 const char *name; 1398 int (*dev_init)(struct acpi_iort_node *node); 1399 void (*dev_dma_configure)(struct device *dev, 1400 struct acpi_iort_node *node); 1401 int (*dev_count_resources)(struct acpi_iort_node *node); 1402 void (*dev_init_resources)(struct resource *res, 1403 struct acpi_iort_node *node); 1404 int (*dev_set_proximity)(struct device *dev, 1405 struct acpi_iort_node *node); 1406 int (*dev_add_platdata)(struct platform_device *pdev); 1407 }; 1408 1409 static const struct iort_dev_config iort_arm_smmu_v3_cfg __initconst = { 1410 .name = "arm-smmu-v3", 1411 .dev_dma_configure = arm_smmu_v3_dma_configure, 1412 .dev_count_resources = arm_smmu_v3_count_resources, 1413 .dev_init_resources = arm_smmu_v3_init_resources, 1414 .dev_set_proximity = arm_smmu_v3_set_proximity, 1415 }; 1416 1417 static const struct iort_dev_config iort_arm_smmu_cfg __initconst = { 1418 .name = "arm-smmu", 1419 .dev_dma_configure = arm_smmu_dma_configure, 1420 .dev_count_resources = arm_smmu_count_resources, 1421 .dev_init_resources = arm_smmu_init_resources, 1422 }; 1423 1424 static const struct iort_dev_config iort_arm_smmu_v3_pmcg_cfg __initconst = { 1425 .name = "arm-smmu-v3-pmcg", 1426 .dev_count_resources = arm_smmu_v3_pmcg_count_resources, 1427 .dev_init_resources = arm_smmu_v3_pmcg_init_resources, 1428 .dev_add_platdata = arm_smmu_v3_pmcg_add_platdata, 1429 }; 1430 1431 static __init const struct iort_dev_config *iort_get_dev_cfg( 1432 struct acpi_iort_node *node) 1433 { 1434 switch (node->type) { 1435 case ACPI_IORT_NODE_SMMU_V3: 1436 return &iort_arm_smmu_v3_cfg; 1437 case ACPI_IORT_NODE_SMMU: 1438 return &iort_arm_smmu_cfg; 1439 case ACPI_IORT_NODE_PMCG: 1440 return &iort_arm_smmu_v3_pmcg_cfg; 1441 default: 1442 return NULL; 1443 } 1444 } 1445 1446 /** 1447 * iort_add_platform_device() - Allocate a platform device for IORT node 1448 * @node: Pointer to device ACPI IORT node 1449 * 1450 * Returns: 0 on success, <0 failure 1451 */ 1452 static int __init iort_add_platform_device(struct acpi_iort_node *node, 1453 const struct iort_dev_config *ops) 1454 { 1455 struct fwnode_handle *fwnode; 1456 struct platform_device *pdev; 1457 struct resource *r; 1458 int ret, count; 1459 1460 pdev = platform_device_alloc(ops->name, PLATFORM_DEVID_AUTO); 1461 if (!pdev) 1462 return -ENOMEM; 1463 1464 if (ops->dev_set_proximity) { 1465 ret = ops->dev_set_proximity(&pdev->dev, node); 1466 if (ret) 1467 goto dev_put; 1468 } 1469 1470 count = ops->dev_count_resources(node); 1471 1472 r = kcalloc(count, sizeof(*r), GFP_KERNEL); 1473 if (!r) { 1474 ret = -ENOMEM; 1475 goto dev_put; 1476 } 1477 1478 ops->dev_init_resources(r, node); 1479 1480 ret = platform_device_add_resources(pdev, r, count); 1481 /* 1482 * Resources are duplicated in platform_device_add_resources, 1483 * free their allocated memory 1484 */ 1485 kfree(r); 1486 1487 if (ret) 1488 goto dev_put; 1489 1490 /* 1491 * Platform devices based on PMCG nodes uses platform_data to 1492 * pass the hardware model info to the driver. For others, add 1493 * a copy of IORT node pointer to platform_data to be used to 1494 * retrieve IORT data information. 1495 */ 1496 if (ops->dev_add_platdata) 1497 ret = ops->dev_add_platdata(pdev); 1498 else 1499 ret = platform_device_add_data(pdev, &node, sizeof(node)); 1500 1501 if (ret) 1502 goto dev_put; 1503 1504 fwnode = iort_get_fwnode(node); 1505 1506 if (!fwnode) { 1507 ret = -ENODEV; 1508 goto dev_put; 1509 } 1510 1511 pdev->dev.fwnode = fwnode; 1512 1513 if (ops->dev_dma_configure) 1514 ops->dev_dma_configure(&pdev->dev, node); 1515 1516 iort_set_device_domain(&pdev->dev, node); 1517 1518 ret = platform_device_add(pdev); 1519 if (ret) 1520 goto dma_deconfigure; 1521 1522 return 0; 1523 1524 dma_deconfigure: 1525 arch_teardown_dma_ops(&pdev->dev); 1526 dev_put: 1527 platform_device_put(pdev); 1528 1529 return ret; 1530 } 1531 1532 #ifdef CONFIG_PCI 1533 static void __init iort_enable_acs(struct acpi_iort_node *iort_node) 1534 { 1535 static bool acs_enabled __initdata; 1536 1537 if (acs_enabled) 1538 return; 1539 1540 if (iort_node->type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX) { 1541 struct acpi_iort_node *parent; 1542 struct acpi_iort_id_mapping *map; 1543 int i; 1544 1545 map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, iort_node, 1546 iort_node->mapping_offset); 1547 1548 for (i = 0; i < iort_node->mapping_count; i++, map++) { 1549 if (!map->output_reference) 1550 continue; 1551 1552 parent = ACPI_ADD_PTR(struct acpi_iort_node, 1553 iort_table, map->output_reference); 1554 /* 1555 * If we detect a RC->SMMU mapping, make sure 1556 * we enable ACS on the system. 1557 */ 1558 if ((parent->type == ACPI_IORT_NODE_SMMU) || 1559 (parent->type == ACPI_IORT_NODE_SMMU_V3)) { 1560 pci_request_acs(); 1561 acs_enabled = true; 1562 return; 1563 } 1564 } 1565 } 1566 } 1567 #else 1568 static inline void iort_enable_acs(struct acpi_iort_node *iort_node) { } 1569 #endif 1570 1571 static void __init iort_init_platform_devices(void) 1572 { 1573 struct acpi_iort_node *iort_node, *iort_end; 1574 struct acpi_table_iort *iort; 1575 struct fwnode_handle *fwnode; 1576 int i, ret; 1577 const struct iort_dev_config *ops; 1578 1579 /* 1580 * iort_table and iort both point to the start of IORT table, but 1581 * have different struct types 1582 */ 1583 iort = (struct acpi_table_iort *)iort_table; 1584 1585 /* Get the first IORT node */ 1586 iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort, 1587 iort->node_offset); 1588 iort_end = ACPI_ADD_PTR(struct acpi_iort_node, iort, 1589 iort_table->length); 1590 1591 for (i = 0; i < iort->node_count; i++) { 1592 if (iort_node >= iort_end) { 1593 pr_err("iort node pointer overflows, bad table\n"); 1594 return; 1595 } 1596 1597 iort_enable_acs(iort_node); 1598 1599 ops = iort_get_dev_cfg(iort_node); 1600 if (ops) { 1601 fwnode = acpi_alloc_fwnode_static(); 1602 if (!fwnode) 1603 return; 1604 1605 iort_set_fwnode(iort_node, fwnode); 1606 1607 ret = iort_add_platform_device(iort_node, ops); 1608 if (ret) { 1609 iort_delete_fwnode(iort_node); 1610 acpi_free_fwnode_static(fwnode); 1611 return; 1612 } 1613 } 1614 1615 iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort_node, 1616 iort_node->length); 1617 } 1618 } 1619 1620 void __init acpi_iort_init(void) 1621 { 1622 acpi_status status; 1623 1624 status = acpi_get_table(ACPI_SIG_IORT, 0, &iort_table); 1625 if (ACPI_FAILURE(status)) { 1626 if (status != AE_NOT_FOUND) { 1627 const char *msg = acpi_format_exception(status); 1628 1629 pr_err("Failed to get table, %s\n", msg); 1630 } 1631 1632 return; 1633 } 1634 1635 iort_init_platform_devices(); 1636 } 1637