1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright (c) 2020-2025, Intel Corporation. 4 */ 5 6 /** 7 * @addtogroup Jsm 8 * @{ 9 */ 10 11 /** 12 * @file 13 * @brief JSM shared definitions 14 */ 15 #ifndef VPU_JSM_API_H 16 #define VPU_JSM_API_H 17 18 /* 19 * Major version changes that break backward compatibility 20 */ 21 #define VPU_JSM_API_VER_MAJOR 3 22 23 /* 24 * Minor version changes when API backward compatibility is preserved. 25 */ 26 #define VPU_JSM_API_VER_MINOR 34 27 28 /* 29 * API header changed (field names, documentation, formatting) but API itself has not been changed 30 */ 31 #define VPU_JSM_API_VER_PATCH 0 32 33 /* 34 * Index in the API version table 35 */ 36 #define VPU_JSM_API_VER_INDEX 4 37 38 /* 39 * Number of Priority Bands for Hardware Scheduling 40 * Bands: Idle(0), Normal(1), Focus(2), RealTime(3) 41 */ 42 #define VPU_HWS_NUM_PRIORITY_BANDS 4 43 44 /* Max number of impacted contexts that can be dealt with the engine reset command */ 45 #define VPU_MAX_ENGINE_RESET_IMPACTED_CONTEXTS 3 46 47 /* 48 * Pack the API structures to enforce binary compatibility 49 * Align to 8 bytes for optimal performance 50 */ 51 #pragma pack(push, 8) 52 53 /* 54 * Engine indexes. 55 */ 56 #define VPU_ENGINE_COMPUTE 0 57 #define VPU_ENGINE_NB 1 58 59 /* 60 * VPU status values. 61 */ 62 #define VPU_JSM_STATUS_SUCCESS 0x0U 63 #define VPU_JSM_STATUS_PARSING_ERR 0x1U 64 #define VPU_JSM_STATUS_PROCESSING_ERR 0x2U 65 #define VPU_JSM_STATUS_PREEMPTED 0x3U 66 #define VPU_JSM_STATUS_ABORTED 0x4U 67 #define VPU_JSM_STATUS_USER_CTX_VIOL_ERR 0x5U 68 #define VPU_JSM_STATUS_GLOBAL_CTX_VIOL_ERR 0x6U 69 #define VPU_JSM_STATUS_MVNCI_WRONG_INPUT_FORMAT 0x7U 70 #define VPU_JSM_STATUS_MVNCI_UNSUPPORTED_NETWORK_ELEMENT 0x8U 71 #define VPU_JSM_STATUS_MVNCI_INVALID_HANDLE 0x9U 72 #define VPU_JSM_STATUS_MVNCI_OUT_OF_RESOURCES 0xAU 73 #define VPU_JSM_STATUS_MVNCI_NOT_IMPLEMENTED 0xBU 74 #define VPU_JSM_STATUS_MVNCI_INTERNAL_ERROR 0xCU 75 /* @deprecated (use VPU_JSM_STATUS_PREEMPTED_MID_COMMAND instead) */ 76 #define VPU_JSM_STATUS_PREEMPTED_MID_INFERENCE 0xDU 77 /* Job status returned when the job was preempted mid-command */ 78 #define VPU_JSM_STATUS_PREEMPTED_MID_COMMAND 0xDU 79 /* Range of status codes that require engine reset */ 80 #define VPU_JSM_STATUS_ENGINE_RESET_REQUIRED_MIN 0xEU 81 #define VPU_JSM_STATUS_MVNCI_CONTEXT_VIOLATION_HW 0xEU 82 #define VPU_JSM_STATUS_MVNCI_PREEMPTION_TIMED_OUT 0xFU 83 #define VPU_JSM_STATUS_ENGINE_RESET_REQUIRED_MAX 0x1FU 84 85 /* 86 * Host <-> VPU IPC channels. 87 * ASYNC commands use a high priority channel, other messages use low-priority ones. 88 */ 89 #define VPU_IPC_CHAN_ASYNC_CMD 0 90 #define VPU_IPC_CHAN_GEN_CMD 10 91 #define VPU_IPC_CHAN_JOB_RET 11 92 93 /* 94 * Job flags bit masks. 95 */ 96 enum { 97 /* 98 * Null submission mask. 99 * When set, batch buffer's commands are not processed but returned as 100 * successful immediately, except fences and timestamps. 101 * When cleared, batch buffer's commands are processed normally. 102 * Used for testing and profiling purposes. 103 */ 104 VPU_JOB_FLAGS_NULL_SUBMISSION_MASK = (1 << 0U), 105 /* 106 * Inline command mask. 107 * When set, the object in job queue is an inline command (see struct vpu_inline_cmd below). 108 * When cleared, the object in job queue is a job (see struct vpu_job_queue_entry below). 109 */ 110 VPU_JOB_FLAGS_INLINE_CMD_MASK = (1 << 1U), 111 /* 112 * VPU private data mask. 113 * Reserved for the VPU to store private data about the job (or inline command) 114 * while being processed. 115 */ 116 VPU_JOB_FLAGS_PRIVATE_DATA_MASK = 0xFFFF0000U 117 }; 118 119 /* 120 * Job queue flags bit masks. 121 */ 122 enum { 123 /* 124 * No job done notification mask. 125 * When set, indicates that no job done notification should be sent for any 126 * job from this queue. When cleared, indicates that job done notification 127 * should be sent for every job completed from this queue. 128 */ 129 VPU_JOB_QUEUE_FLAGS_NO_JOB_DONE_MASK = (1 << 0U), 130 /* 131 * Native fence usage mask. 132 * When set, indicates that job queue uses native fences (as inline commands 133 * in job queue). Such queues may also use legacy fences (as commands in batch buffers). 134 * When cleared, indicates the job queue only uses legacy fences. 135 * NOTES: 136 * 1. For queues using native fences, VPU expects that all jobs in the queue 137 * are immediately followed by an inline command object. This object is expected 138 * to be a fence signal command in most cases, but can also be a NOP in case the host 139 * does not need per-job fence signalling. Other inline commands objects can be 140 * inserted between "job and inline command" pairs. 141 * 2. Native fence queues are only supported on VPU 40xx onwards. 142 */ 143 VPU_JOB_QUEUE_FLAGS_USE_NATIVE_FENCE_MASK = (1 << 1U), 144 /* 145 * Enable turbo mode for testing NPU performance; not recommended for regular usage. 146 */ 147 VPU_JOB_QUEUE_FLAGS_TURBO_MODE = (1 << 2U), 148 /* 149 * Queue error detection mode flag 150 * For 'interactive' queues (this bit not set), the FW will identify queues that have not 151 * completed a job inside the TDR timeout as in error as part of engine reset sequence. 152 * For 'non-interactive' queues (this bit set), the FW will identify queues that have not 153 * progressed the heartbeat inside the non-interactive no-progress timeout as in error as 154 * part of engine reset sequence. Additionally, there is an upper limit applied to these 155 * queues: even if they progress the heartbeat, if they run longer than non-interactive 156 * timeout, then the FW will also identify them as in error. 157 */ 158 VPU_JOB_QUEUE_FLAGS_NON_INTERACTIVE = (1 << 3U) 159 }; 160 161 /* 162 * Max length (including trailing NULL char) of trace entity name (e.g., the 163 * name of a logging destination or a loggable HW component). 164 */ 165 #define VPU_TRACE_ENTITY_NAME_MAX_LEN 32 166 167 /* 168 * Max length (including trailing NULL char) of a dyndbg command. 169 * 170 * NOTE: 96 is used so that the size of 'struct vpu_ipc_msg' in the JSM API is 171 * 128 bytes (multiple of 64 bytes, the cache line size). 172 */ 173 #define VPU_DYNDBG_CMD_MAX_LEN 96 174 175 /* 176 * For HWS command queue scheduling, we can prioritise command queues inside the 177 * same process with a relative in-process priority. Valid values for relative 178 * priority are given below - max and min. 179 */ 180 #define VPU_HWS_COMMAND_QUEUE_MAX_IN_PROCESS_PRIORITY 7 181 #define VPU_HWS_COMMAND_QUEUE_MIN_IN_PROCESS_PRIORITY -7 182 183 /* 184 * For HWS priority scheduling, we can have multiple realtime priority bands. 185 * They are numbered 0 to a MAX. 186 */ 187 #define VPU_HWS_MAX_REALTIME_PRIORITY_LEVEL 31U 188 189 /* 190 * vpu_jsm_engine_reset_context flag definitions 191 */ 192 #define VPU_ENGINE_RESET_CONTEXT_FLAG_COLLATERAL_DAMAGE_MASK BIT(0) 193 #define VPU_ENGINE_RESET_CONTEXT_HANG_PRIMARY_CAUSE 0 194 #define VPU_ENGINE_RESET_CONTEXT_COLLATERAL_DAMAGE 1 195 196 /* 197 * Invalid command queue handle identifier. Applies to cmdq_id and cmdq_group 198 * in this API. 199 */ 200 #define VPU_HWS_INVALID_CMDQ_HANDLE 0ULL 201 202 /* 203 * Inline commands types. 204 */ 205 /* 206 * NOP. 207 * VPU does nothing other than consuming the inline command object. 208 */ 209 #define VPU_INLINE_CMD_TYPE_NOP 0x0 210 /* 211 * Fence wait. 212 * VPU waits for the fence current value to reach monitored value. 213 * Fence wait operations are executed upon job dispatching. While waiting for 214 * the fence to be satisfied, VPU blocks fetching of the next objects in the queue. 215 * Jobs present in the queue prior to the fence wait object may be processed 216 * concurrently. 217 */ 218 #define VPU_INLINE_CMD_TYPE_FENCE_WAIT 0x1 219 /* 220 * Fence signal. 221 * VPU sets the fence current value to the provided value. If new current value 222 * is equal to or higher than monitored value, VPU sends fence signalled notification 223 * to the host. Fence signal operations are executed upon completion of all the jobs 224 * present in the queue prior to them, and in-order relative to each other in the queue. 225 * But jobs in-between them may be processed concurrently and may complete out-of-order. 226 */ 227 #define VPU_INLINE_CMD_TYPE_FENCE_SIGNAL 0x2 228 229 /** 230 * Job scheduling priority bands for both hardware scheduling and OS scheduling. 231 */ 232 enum vpu_job_scheduling_priority_band { 233 VPU_JOB_SCHEDULING_PRIORITY_BAND_IDLE = 0, 234 VPU_JOB_SCHEDULING_PRIORITY_BAND_NORMAL = 1, 235 VPU_JOB_SCHEDULING_PRIORITY_BAND_FOCUS = 2, 236 VPU_JOB_SCHEDULING_PRIORITY_BAND_REALTIME = 3, 237 VPU_JOB_SCHEDULING_PRIORITY_BAND_COUNT = 4, 238 }; 239 240 /** 241 * Job format. 242 * Jobs defines the actual workloads to be executed by a given engine. 243 */ 244 struct vpu_job_queue_entry { 245 /** Address of VPU commands batch buffer */ 246 u64 batch_buf_addr; 247 /** Job ID */ 248 u32 job_id; 249 /** Flags bit field, see VPU_JOB_FLAGS_* above */ 250 u32 flags; 251 /** 252 * Doorbell ring timestamp taken by KMD from SoC's global system clock, in 253 * microseconds. NPU can convert this value to its own fixed clock's timebase, 254 * to match other profiling timestamps. 255 */ 256 u64 doorbell_timestamp; 257 /** Extra id for job tracking, used only in the firmware perf traces */ 258 u64 host_tracking_id; 259 /** Address of the primary preemption buffer to use for this job */ 260 u64 primary_preempt_buf_addr; 261 /** Size of the primary preemption buffer to use for this job */ 262 u32 primary_preempt_buf_size; 263 /** Size of secondary preemption buffer to use for this job */ 264 u32 secondary_preempt_buf_size; 265 /** Address of secondary preemption buffer to use for this job */ 266 u64 secondary_preempt_buf_addr; 267 u64 reserved_0; 268 }; 269 270 /** 271 * Inline command format. 272 * Inline commands are the commands executed at scheduler level (typically, 273 * synchronization directives). Inline command and job objects must be of 274 * the same size and have flags field at same offset. 275 */ 276 struct vpu_inline_cmd { 277 u64 reserved_0; 278 /** Inline command type, see VPU_INLINE_CMD_TYPE_* defines. */ 279 u32 type; 280 /** Flags bit field, see VPU_JOB_FLAGS_* above. */ 281 u32 flags; 282 /** Inline command payload. Depends on inline command type. */ 283 union payload { 284 /** Fence (wait and signal) commands' payload. */ 285 struct fence { 286 /** Fence object handle. */ 287 u64 fence_handle; 288 /** User VA of the current fence value. */ 289 u64 current_value_va; 290 /** User VA of the monitored fence value (read-only). */ 291 u64 monitored_value_va; 292 /** Value to wait for or write in fence location. */ 293 u64 value; 294 /** User VA of the log buffer in which to add log entry on completion. */ 295 u64 log_buffer_va; 296 /** NPU private data. */ 297 u64 npu_private_data; 298 } fence; 299 /** 300 * Other commands do not have a payload: 301 * Payload definition for future inline commands can be inserted here. 302 */ 303 u64 reserved_1[6]; 304 } payload; 305 }; 306 307 /** 308 * Job queue slots can be populated either with job objects or inline command objects. 309 */ 310 union vpu_jobq_slot { 311 struct vpu_job_queue_entry job; 312 struct vpu_inline_cmd inline_cmd; 313 }; 314 315 /** 316 * Job queue control registers. 317 */ 318 struct vpu_job_queue_header { 319 u32 engine_idx; 320 u32 head; 321 u32 tail; 322 u32 flags; 323 /** Set to 1 to indicate priority_band field is valid */ 324 u32 priority_band_valid; 325 /** 326 * Priority for the work of this job queue, valid only if the HWS is NOT used 327 * and the @ref priority_band_valid is set to 1. It is applied only during 328 * the @ref VPU_JSM_MSG_REGISTER_DB message processing. 329 * The device firmware might use the priority_band to optimize the power 330 * management logic, but it will not affect the order of jobs. 331 * Available priority bands: @see enum vpu_job_scheduling_priority_band 332 */ 333 u32 priority_band; 334 /** Inside realtime band assigns a further priority, limited to 0..31 range */ 335 u32 realtime_priority_level; 336 u32 reserved_0[9]; 337 }; 338 339 /* 340 * Job queue format. 341 */ 342 struct vpu_job_queue { 343 struct vpu_job_queue_header header; 344 union vpu_jobq_slot slot[]; 345 }; 346 347 /** 348 * Logging entity types. 349 * 350 * This enum defines the different types of entities involved in logging. 351 */ 352 enum vpu_trace_entity_type { 353 /** Logging destination (entity where logs can be stored / printed). */ 354 VPU_TRACE_ENTITY_TYPE_DESTINATION = 1, 355 /** Loggable HW component (HW entity that can be logged). */ 356 VPU_TRACE_ENTITY_TYPE_HW_COMPONENT = 2, 357 }; 358 359 /** 360 * HWS specific log buffer header details. 361 * Total size is 32 bytes. 362 */ 363 struct vpu_hws_log_buffer_header { 364 /** Written by VPU after adding a log entry. Initialised by host to 0. */ 365 u32 first_free_entry_index; 366 /** Incremented by VPU every time the VPU writes the 0th entry; initialised by host to 0. */ 367 u32 wraparound_count; 368 /** 369 * This is the number of buffers that can be stored in the log buffer provided by the host. 370 * It is written by host before passing buffer to VPU. VPU should consider it read-only. 371 */ 372 u64 num_of_entries; 373 u64 reserved[2]; 374 }; 375 376 /** 377 * HWS specific log buffer entry details. 378 * Total size is 32 bytes. 379 */ 380 struct vpu_hws_log_buffer_entry { 381 /** VPU timestamp must be an invariant timer tick (not impacted by DVFS) */ 382 u64 vpu_timestamp; 383 /** 384 * Operation type: 385 * 0 - context state change 386 * 1 - queue new work 387 * 2 - queue unwait sync object 388 * 3 - queue no more work 389 * 4 - queue wait sync object 390 */ 391 u32 operation_type; 392 u32 reserved; 393 /** Operation data depends on operation type */ 394 u64 operation_data[2]; 395 }; 396 397 /* Native fence log buffer types. */ 398 enum vpu_hws_native_fence_log_type { 399 VPU_HWS_NATIVE_FENCE_LOG_TYPE_WAITS = 1, 400 VPU_HWS_NATIVE_FENCE_LOG_TYPE_SIGNALS = 2 401 }; 402 403 /** HWS native fence log buffer header. */ 404 struct vpu_hws_native_fence_log_header { 405 union { 406 struct { 407 /** Index of the first free entry in buffer. */ 408 u32 first_free_entry_idx; 409 /** 410 * Incremented whenever the NPU wraps around the buffer and writes 411 * to the first entry again. 412 */ 413 u32 wraparound_count; 414 }; 415 /** Field allowing atomic update of both fields above. */ 416 u64 atomic_wraparound_and_entry_idx; 417 }; 418 /** Log buffer type, see enum vpu_hws_native_fence_log_type. */ 419 u64 type; 420 /** Allocated number of entries in the log buffer. */ 421 u64 entry_nb; 422 u64 reserved[2]; 423 }; 424 425 /** Native fence log operation types. */ 426 enum vpu_hws_native_fence_log_op { 427 VPU_HWS_NATIVE_FENCE_LOG_OP_SIGNAL_EXECUTED = 0, 428 VPU_HWS_NATIVE_FENCE_LOG_OP_WAIT_UNBLOCKED = 1 429 }; 430 431 /** HWS native fence log entry. */ 432 struct vpu_hws_native_fence_log_entry { 433 /** Newly signaled/unblocked fence value. */ 434 u64 fence_value; 435 /** Native fence object handle to which this operation belongs. */ 436 u64 fence_handle; 437 /** Operation type, see enum vpu_hws_native_fence_log_op. */ 438 u64 op_type; 439 u64 reserved_0; 440 /** 441 * VPU_HWS_NATIVE_FENCE_LOG_OP_WAIT_UNBLOCKED only: Timestamp at which fence 442 * wait was started (in NPU SysTime). 443 */ 444 u64 fence_wait_start_ts; 445 u64 reserved_1; 446 /** Timestamp at which fence operation was completed (in NPU SysTime). */ 447 u64 fence_end_ts; 448 }; 449 450 /** Native fence log buffer. */ 451 struct vpu_hws_native_fence_log_buffer { 452 struct vpu_hws_native_fence_log_header header; 453 struct vpu_hws_native_fence_log_entry entry[]; 454 }; 455 456 /* 457 * Host <-> VPU IPC messages types. 458 */ 459 enum vpu_ipc_msg_type { 460 /** Unsupported command */ 461 VPU_JSM_MSG_UNKNOWN = 0xFFFFFFFF, 462 463 /** IPC Host -> Device, base id for async commands */ 464 VPU_JSM_MSG_ASYNC_CMD = 0x1100, 465 /** 466 * Reset engine. The NPU cancels all the jobs currently executing on the target 467 * engine making the engine become idle and then does a HW reset, before returning 468 * to the host. 469 * @see struct vpu_ipc_msg_payload_engine_reset 470 */ 471 VPU_JSM_MSG_ENGINE_RESET = VPU_JSM_MSG_ASYNC_CMD, 472 /** 473 * Preempt engine. The NPU stops (preempts) all the jobs currently 474 * executing on the target engine making the engine become idle and ready to 475 * execute new jobs. 476 * NOTE: The NPU does not remove unstarted jobs (if any) from job queues of 477 * the target engine, but it stops processing them (until the queue doorbell 478 * is rung again); the host is responsible to reset the job queue, either 479 * after preemption or when resubmitting jobs to the queue. 480 * @see vpu_ipc_msg_payload_engine_preempt 481 */ 482 VPU_JSM_MSG_ENGINE_PREEMPT = 0x1101, 483 /** 484 * OS scheduling doorbell register command 485 * @see vpu_ipc_msg_payload_register_db 486 */ 487 VPU_JSM_MSG_REGISTER_DB = 0x1102, 488 /** 489 * OS scheduling doorbell unregister command 490 * @see vpu_ipc_msg_payload_unregister_db 491 */ 492 VPU_JSM_MSG_UNREGISTER_DB = 0x1103, 493 /** 494 * Query engine heartbeat. Heartbeat is expected to increase monotonically 495 * and increase while work is being progressed by NPU. 496 * @see vpu_ipc_msg_payload_query_engine_hb 497 */ 498 VPU_JSM_MSG_QUERY_ENGINE_HB = 0x1104, 499 VPU_JSM_MSG_GET_POWER_LEVEL_COUNT = 0x1105, 500 VPU_JSM_MSG_GET_POWER_LEVEL = 0x1106, 501 VPU_JSM_MSG_SET_POWER_LEVEL = 0x1107, 502 /* @deprecated */ 503 VPU_JSM_MSG_METRIC_STREAMER_OPEN = 0x1108, 504 /* @deprecated */ 505 VPU_JSM_MSG_METRIC_STREAMER_CLOSE = 0x1109, 506 /** Configure logging (used to modify configuration passed in boot params). */ 507 VPU_JSM_MSG_TRACE_SET_CONFIG = 0x110a, 508 /** Return current logging configuration. */ 509 VPU_JSM_MSG_TRACE_GET_CONFIG = 0x110b, 510 /** 511 * Get masks of destinations and HW components supported by the firmware 512 * (may vary between HW generations and FW compile 513 * time configurations) 514 */ 515 VPU_JSM_MSG_TRACE_GET_CAPABILITY = 0x110c, 516 /** Get the name of a destination or HW component. */ 517 VPU_JSM_MSG_TRACE_GET_NAME = 0x110d, 518 /** 519 * Release resource associated with host ssid . All jobs that belong to the host_ssid 520 * aborted and removed from internal scheduling queues. All doorbells assigned 521 * to the host_ssid are unregistered and any internal FW resources belonging to 522 * the host_ssid are released. 523 * @see vpu_ipc_msg_payload_ssid_release 524 */ 525 VPU_JSM_MSG_SSID_RELEASE = 0x110e, 526 /** 527 * Start collecting metric data. 528 * @see vpu_jsm_metric_streamer_start 529 */ 530 VPU_JSM_MSG_METRIC_STREAMER_START = 0x110f, 531 /** 532 * Stop collecting metric data. This command will return success if it is called 533 * for a metric stream that has already been stopped or was never started. 534 * @see vpu_jsm_metric_streamer_stop 535 */ 536 VPU_JSM_MSG_METRIC_STREAMER_STOP = 0x1110, 537 /** 538 * Update current and next buffer for metric data collection. This command can 539 * also be used to request information about the number of collected samples 540 * and the amount of data written to the buffer. 541 * @see vpu_jsm_metric_streamer_update 542 */ 543 VPU_JSM_MSG_METRIC_STREAMER_UPDATE = 0x1111, 544 /** 545 * Request description of selected metric groups and metric counters within 546 * each group. The VPU will write the description of groups and counters to 547 * the buffer specified in the command structure. 548 * @see vpu_jsm_metric_streamer_start 549 */ 550 VPU_JSM_MSG_METRIC_STREAMER_INFO = 0x1112, 551 /** 552 * Control command: Priority band setup 553 * @see vpu_ipc_msg_payload_hws_priority_band_setup 554 */ 555 VPU_JSM_MSG_SET_PRIORITY_BAND_SETUP = 0x1113, 556 /** 557 * Control command: Create command queue 558 * @see vpu_ipc_msg_payload_hws_create_cmdq 559 */ 560 VPU_JSM_MSG_CREATE_CMD_QUEUE = 0x1114, 561 /** 562 * Control command: Destroy command queue 563 * @see vpu_ipc_msg_payload_hws_destroy_cmdq 564 */ 565 VPU_JSM_MSG_DESTROY_CMD_QUEUE = 0x1115, 566 /** 567 * Control command: Set context scheduling properties 568 * @see vpu_ipc_msg_payload_hws_set_context_sched_properties 569 */ 570 VPU_JSM_MSG_SET_CONTEXT_SCHED_PROPERTIES = 0x1116, 571 /** 572 * Register a doorbell to notify VPU of new work. The doorbell may later be 573 * deallocated or reassigned to another context. 574 * @see vpu_jsm_hws_register_db 575 */ 576 VPU_JSM_MSG_HWS_REGISTER_DB = 0x1117, 577 /** 578 * Control command: Log buffer setting 579 * @see vpu_ipc_msg_payload_hws_set_scheduling_log 580 */ 581 VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG = 0x1118, 582 /** 583 * Control command: Suspend command queue. 584 * @see vpu_ipc_msg_payload_hws_suspend_cmdq 585 */ 586 VPU_JSM_MSG_HWS_SUSPEND_CMDQ = 0x1119, 587 /** 588 * Control command: Resume command queue 589 * @see vpu_ipc_msg_payload_hws_resume_cmdq 590 */ 591 VPU_JSM_MSG_HWS_RESUME_CMDQ = 0x111a, 592 /** 593 * Control command: Resume engine after reset 594 * @see vpu_ipc_msg_payload_hws_resume_engine 595 */ 596 VPU_JSM_MSG_HWS_ENGINE_RESUME = 0x111b, 597 /** 598 * Control command: Enable survivability/DCT mode 599 * @see vpu_ipc_msg_payload_pwr_dct_control 600 */ 601 VPU_JSM_MSG_DCT_ENABLE = 0x111c, 602 /** 603 * Control command: Disable survivability/DCT mode 604 * This command has no payload 605 */ 606 VPU_JSM_MSG_DCT_DISABLE = 0x111d, 607 /** 608 * Reserved command ID to ensure that the following command requests / 609 * responses have the same lower byte value. 610 */ 611 VPU_JSM_MSG_RESERVED_111E = 0x111e, 612 /** 613 * Control command: Configure VPU frequency scaling parameters. 614 * @see vpu_ipc_msg_payload_freq_config 615 */ 616 VPU_JSM_MSG_FREQ_CONFIG = 0x111f, 617 /** 618 * Dump VPU state. To be used for debug purposes only. 619 * This command has no payload. 620 * NOTE: Please introduce new ASYNC commands before this one. 621 */ 622 VPU_JSM_MSG_STATE_DUMP = 0x11FF, 623 624 /** IPC Host -> Device, base id for general commands */ 625 VPU_JSM_MSG_GENERAL_CMD = 0x1200, 626 /** Unsupported command */ 627 VPU_JSM_MSG_BLOB_DEINIT_DEPRECATED = VPU_JSM_MSG_GENERAL_CMD, 628 /** 629 * Control dyndbg behavior by executing a dyndbg command; equivalent to 630 * Linux command: 631 * @verbatim echo '<dyndbg_cmd>' > <debugfs>/dynamic_debug/control @endverbatim 632 * @see vpu_ipc_msg_payload_dyndbg_control 633 */ 634 VPU_JSM_MSG_DYNDBG_CONTROL = 0x1201, 635 /** 636 * Perform the save procedure for the D0i3 entry 637 */ 638 VPU_JSM_MSG_PWR_D0I3_ENTER = 0x1202, 639 640 /** 641 * IPC Device -> Host, Job completion 642 * @see struct vpu_ipc_msg_payload_job_done 643 */ 644 VPU_JSM_MSG_JOB_DONE = 0x2100, 645 /** 646 * IPC Device -> Host, Fence signalled 647 * @see vpu_ipc_msg_payload_native_fence_signalled 648 */ 649 VPU_JSM_MSG_NATIVE_FENCE_SIGNALLED = 0x2101, 650 651 /* IPC Device -> Host, Async command completion */ 652 VPU_JSM_MSG_ASYNC_CMD_DONE = 0x2200, 653 /** 654 * IPC Device -> Host, engine reset complete 655 * @see vpu_ipc_msg_payload_engine_reset_done 656 */ 657 VPU_JSM_MSG_ENGINE_RESET_DONE = VPU_JSM_MSG_ASYNC_CMD_DONE, 658 /** 659 * Preempt complete message 660 * @see vpu_ipc_msg_payload_engine_preempt_done 661 */ 662 VPU_JSM_MSG_ENGINE_PREEMPT_DONE = 0x2201, 663 VPU_JSM_MSG_REGISTER_DB_DONE = 0x2202, 664 VPU_JSM_MSG_UNREGISTER_DB_DONE = 0x2203, 665 /** 666 * Response to query engine heartbeat. 667 * @see vpu_ipc_msg_payload_query_engine_hb_done 668 */ 669 VPU_JSM_MSG_QUERY_ENGINE_HB_DONE = 0x2204, 670 VPU_JSM_MSG_GET_POWER_LEVEL_COUNT_DONE = 0x2205, 671 VPU_JSM_MSG_GET_POWER_LEVEL_DONE = 0x2206, 672 VPU_JSM_MSG_SET_POWER_LEVEL_DONE = 0x2207, 673 /* @deprecated */ 674 VPU_JSM_MSG_METRIC_STREAMER_OPEN_DONE = 0x2208, 675 /* @deprecated */ 676 VPU_JSM_MSG_METRIC_STREAMER_CLOSE_DONE = 0x2209, 677 /** Response to VPU_JSM_MSG_TRACE_SET_CONFIG. */ 678 VPU_JSM_MSG_TRACE_SET_CONFIG_RSP = 0x220a, 679 /** Response to VPU_JSM_MSG_TRACE_GET_CONFIG. */ 680 VPU_JSM_MSG_TRACE_GET_CONFIG_RSP = 0x220b, 681 /** Response to VPU_JSM_MSG_TRACE_GET_CAPABILITY. */ 682 VPU_JSM_MSG_TRACE_GET_CAPABILITY_RSP = 0x220c, 683 /** Response to VPU_JSM_MSG_TRACE_GET_NAME. */ 684 VPU_JSM_MSG_TRACE_GET_NAME_RSP = 0x220d, 685 /** 686 * Response to VPU_JSM_MSG_SSID_RELEASE. 687 * @see vpu_ipc_msg_payload_ssid_release 688 */ 689 VPU_JSM_MSG_SSID_RELEASE_DONE = 0x220e, 690 /** 691 * Response to VPU_JSM_MSG_METRIC_STREAMER_START. 692 * VPU will return an error result if metric collection cannot be started, 693 * e.g. when the specified metric mask is invalid. 694 * @see vpu_jsm_metric_streamer_done 695 */ 696 VPU_JSM_MSG_METRIC_STREAMER_START_DONE = 0x220f, 697 /** 698 * Response to VPU_JSM_MSG_METRIC_STREAMER_STOP. 699 * Returns information about collected metric data. 700 * @see vpu_jsm_metric_streamer_done 701 */ 702 VPU_JSM_MSG_METRIC_STREAMER_STOP_DONE = 0x2210, 703 /** 704 * Response to VPU_JSM_MSG_METRIC_STREAMER_UPDATE. 705 * Returns information about collected metric data. 706 * @see vpu_jsm_metric_streamer_done 707 */ 708 VPU_JSM_MSG_METRIC_STREAMER_UPDATE_DONE = 0x2211, 709 /** 710 * Response to VPU_JSM_MSG_METRIC_STREAMER_INFO. 711 * Returns a description of the metric groups and metric counters. 712 * @see vpu_jsm_metric_streamer_done 713 */ 714 VPU_JSM_MSG_METRIC_STREAMER_INFO_DONE = 0x2212, 715 /** 716 * Asynchronous event sent from the VPU to the host either when the current 717 * metric buffer is full or when the VPU has collected a multiple of 718 * @ref vpu_jsm_metric_streamer_start::notify_sample_count samples as indicated 719 * through the start command (VPU_JSM_MSG_METRIC_STREAMER_START). Returns 720 * information about collected metric data. 721 * @see vpu_jsm_metric_streamer_done 722 */ 723 VPU_JSM_MSG_METRIC_STREAMER_NOTIFICATION = 0x2213, 724 /** 725 * Response to control command: Priority band setup 726 * @see vpu_ipc_msg_payload_hws_priority_band_setup 727 */ 728 VPU_JSM_MSG_SET_PRIORITY_BAND_SETUP_RSP = 0x2214, 729 /** 730 * Response to control command: Create command queue 731 * @see vpu_ipc_msg_payload_hws_create_cmdq_rsp 732 */ 733 VPU_JSM_MSG_CREATE_CMD_QUEUE_RSP = 0x2215, 734 /** 735 * Response to control command: Destroy command queue 736 * @see vpu_ipc_msg_payload_hws_destroy_cmdq 737 */ 738 VPU_JSM_MSG_DESTROY_CMD_QUEUE_RSP = 0x2216, 739 /** 740 * Response to control command: Set context scheduling properties 741 * @see vpu_ipc_msg_payload_hws_set_context_sched_properties 742 */ 743 VPU_JSM_MSG_SET_CONTEXT_SCHED_PROPERTIES_RSP = 0x2217, 744 /** 745 * Response to control command: Log buffer setting 746 * @see vpu_ipc_msg_payload_hws_set_scheduling_log 747 */ 748 VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG_RSP = 0x2218, 749 /** 750 * IPC Device -> Host, HWS notify index entry of log buffer written 751 * @see vpu_ipc_msg_payload_hws_scheduling_log_notification 752 */ 753 VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION = 0x2219, 754 /** 755 * IPC Device -> Host, HWS completion of a context suspend request 756 * @see vpu_ipc_msg_payload_hws_suspend_cmdq 757 */ 758 VPU_JSM_MSG_HWS_SUSPEND_CMDQ_DONE = 0x221a, 759 /** 760 * Response to control command: Resume command queue 761 * @see vpu_ipc_msg_payload_hws_resume_cmdq 762 */ 763 VPU_JSM_MSG_HWS_RESUME_CMDQ_RSP = 0x221b, 764 /** 765 * Response to control command: Resume engine command response 766 * @see vpu_ipc_msg_payload_hws_resume_engine 767 */ 768 VPU_JSM_MSG_HWS_RESUME_ENGINE_DONE = 0x221c, 769 /** 770 * Response to control command: Enable survivability/DCT mode 771 * This command has no payload 772 */ 773 VPU_JSM_MSG_DCT_ENABLE_DONE = 0x221d, 774 /** 775 * Response to control command: Disable survivability/DCT mode 776 * This command has no payload 777 */ 778 VPU_JSM_MSG_DCT_DISABLE_DONE = 0x221e, 779 /** 780 * Response to control command: Configure VPU frequency scaling parameters. 781 * @see vpu_ipc_msg_payload_freq_config 782 */ 783 VPU_JSM_MSG_FREQ_CONFIG_RSP = 0x221f, 784 /** 785 * Response to state dump control command. 786 * This command has no payload. 787 * NOTE: Please introduce new ASYNC responses before this one. 788 */ 789 VPU_JSM_MSG_STATE_DUMP_RSP = 0x22FF, 790 791 /* IPC Device -> Host, General command completion */ 792 VPU_JSM_MSG_GENERAL_CMD_DONE = 0x2300, 793 VPU_JSM_MSG_BLOB_DEINIT_DONE = VPU_JSM_MSG_GENERAL_CMD_DONE, 794 /** Response to VPU_JSM_MSG_DYNDBG_CONTROL. */ 795 VPU_JSM_MSG_DYNDBG_CONTROL_RSP = 0x2301, 796 /** 797 * Acknowledgment of completion of the save procedure initiated by 798 * VPU_JSM_MSG_PWR_D0I3_ENTER 799 */ 800 VPU_JSM_MSG_PWR_D0I3_ENTER_DONE = 0x2302, 801 }; 802 803 enum vpu_ipc_msg_status { VPU_JSM_MSG_FREE, VPU_JSM_MSG_ALLOCATED }; 804 805 /** 806 * Engine reset request payload 807 * @see VPU_JSM_MSG_ENGINE_RESET 808 */ 809 struct vpu_ipc_msg_payload_engine_reset { 810 /** Engine to be reset. */ 811 u32 engine_idx; 812 /** Reserved */ 813 u32 reserved_0; 814 }; 815 816 /** 817 * Engine preemption request struct 818 * @see VPU_JSM_MSG_ENGINE_PREEMPT 819 */ 820 struct vpu_ipc_msg_payload_engine_preempt { 821 /** Engine to be preempted. */ 822 u32 engine_idx; 823 /** ID of the preemption request. */ 824 u32 preempt_id; 825 }; 826 827 /** 828 * Register doorbell command structure. 829 * This structure supports doorbell registration for only OS scheduling. 830 * @see VPU_JSM_MSG_REGISTER_DB 831 */ 832 struct vpu_ipc_msg_payload_register_db { 833 /** Index of the doorbell to register. */ 834 u32 db_idx; 835 /** Reserved */ 836 u32 reserved_0; 837 /** Virtual address in Global GTT pointing to the start of job queue. */ 838 u64 jobq_base; 839 /** Size of the job queue in bytes. */ 840 u32 jobq_size; 841 /** Host sub-stream ID for the context assigned to the doorbell. */ 842 u32 host_ssid; 843 }; 844 845 /** 846 * Unregister doorbell command structure. 847 * Request structure to unregister a doorbell for both HW and OS scheduling. 848 * @see VPU_JSM_MSG_UNREGISTER_DB 849 */ 850 struct vpu_ipc_msg_payload_unregister_db { 851 /** Index of the doorbell to unregister. */ 852 u32 db_idx; 853 /** Reserved */ 854 u32 reserved_0; 855 }; 856 857 /** 858 * Heartbeat request structure 859 * @see VPU_JSM_MSG_QUERY_ENGINE_HB 860 */ 861 struct vpu_ipc_msg_payload_query_engine_hb { 862 /** Engine to return heartbeat value. */ 863 u32 engine_idx; 864 /** Reserved */ 865 u32 reserved_0; 866 }; 867 868 struct vpu_ipc_msg_payload_power_level { 869 /** 870 * Requested power level. The power level value is in the 871 * range [0, power_level_count-1] where power_level_count 872 * is the number of available power levels as returned by 873 * the get power level count command. A power level of 0 874 * corresponds to the maximum possible power level, while 875 * power_level_count-1 corresponds to the minimum possible 876 * power level. Values outside of this range are not 877 * considered to be valid. 878 */ 879 u32 power_level; 880 /* Reserved */ 881 u32 reserved_0; 882 }; 883 884 /** 885 * Structure for requesting ssid release 886 * @see VPU_JSM_MSG_SSID_RELEASE 887 */ 888 struct vpu_ipc_msg_payload_ssid_release { 889 /** Host sub-stream ID for the context to be released. */ 890 u32 host_ssid; 891 /** Reserved */ 892 u32 reserved_0; 893 }; 894 895 /** 896 * @brief Metric streamer start command structure. 897 * This structure is also used with VPU_JSM_MSG_METRIC_STREAMER_INFO to request metric 898 * groups and metric counters description from the firmware. 899 * @see VPU_JSM_MSG_METRIC_STREAMER_START 900 * @see VPU_JSM_MSG_METRIC_STREAMER_INFO 901 */ 902 struct vpu_jsm_metric_streamer_start { 903 /** 904 * Bitmask to select the desired metric groups. 905 * A metric group can belong only to one metric streamer instance at a time. 906 * Since each metric streamer instance has a unique set of metric groups, it 907 * can also identify a metric streamer instance if more than one instance was 908 * started. If the VPU device does not support multiple metric streamer instances, 909 * then VPU_JSM_MSG_METRIC_STREAMER_START will return an error even if the second 910 * instance has different groups to the first. 911 */ 912 u64 metric_group_mask; 913 /** Sampling rate in nanoseconds. */ 914 u64 sampling_rate; 915 /** 916 * If > 0 the VPU will send a VPU_JSM_MSG_METRIC_STREAMER_NOTIFICATION message 917 * after every @ref notify_sample_count samples is collected or dropped by the VPU. 918 * If set to UINT_MAX the VPU will only generate a notification when the metric 919 * buffer is full. If set to 0 the VPU will never generate a notification. 920 */ 921 u32 notify_sample_count; 922 u32 reserved_0; 923 /** 924 * Address and size of the buffer where the VPU will write metric data. The 925 * VPU writes all counters from enabled metric groups one after another. If 926 * there is no space left to write data at the next sample period the VPU 927 * will switch to the next buffer (@ref next_buffer_addr) and will optionally 928 * send a notification to the host driver if @ref notify_sample_count is non-zero. 929 * If @ref next_buffer_addr is NULL the VPU will stop collecting metric data. 930 */ 931 u64 buffer_addr; 932 u64 buffer_size; 933 /** 934 * Address and size of the next buffer to write metric data to after the initial 935 * buffer is full. If the address is NULL the VPU will stop collecting metric 936 * data. 937 */ 938 u64 next_buffer_addr; 939 u64 next_buffer_size; 940 }; 941 942 /** 943 * @brief Metric streamer stop command structure. 944 * @see VPU_JSM_MSG_METRIC_STREAMER_STOP 945 */ 946 struct vpu_jsm_metric_streamer_stop { 947 /** Bitmask to select the desired metric groups. */ 948 u64 metric_group_mask; 949 }; 950 951 /** 952 * Provide VPU FW with buffers to write metric data. 953 * @see VPU_JSM_MSG_METRIC_STREAMER_UPDATE 954 */ 955 struct vpu_jsm_metric_streamer_update { 956 /** Metric group mask that identifies metric streamer instance. */ 957 u64 metric_group_mask; 958 /** 959 * Address and size of the buffer where the VPU will write metric data. 960 * This member dictates how the update operation should perform: 961 * 1. client needs information about the number of collected samples and the 962 * amount of data written to the current buffer 963 * 2. client wants to switch to a new buffer 964 * 965 * Case 1. is identified by the buffer address being 0 or the same as the 966 * currently used buffer address. In this case the buffer size is ignored and 967 * the size of the current buffer is unchanged. The VPU will return an update 968 * in the vpu_jsm_metric_streamer_done structure. The internal writing position 969 * into the buffer is not changed. 970 * 971 * Case 2. is identified by the address being non-zero and differs from the 972 * current buffer address. The VPU will immediately switch data collection to 973 * the new buffer. Then the VPU will return an update in the 974 * vpu_jsm_metric_streamer_done structure. 975 */ 976 u64 buffer_addr; 977 u64 buffer_size; 978 /** 979 * Address and size of the next buffer to write metric data after the initial 980 * buffer is full. If the address is NULL the VPU will stop collecting metric 981 * data but will continue to record dropped samples. 982 * 983 * Note that there is a hazard possible if both buffer_addr and the next_buffer_addr 984 * are non-zero in same update request. It is the host's responsibility to ensure 985 * that both addresses make sense even if the VPU just switched to writing samples 986 * from the current to the next buffer. 987 */ 988 u64 next_buffer_addr; 989 u64 next_buffer_size; 990 }; 991 992 /** 993 * Device -> host job completion message. 994 * @see VPU_JSM_MSG_JOB_DONE 995 */ 996 struct vpu_ipc_msg_payload_job_done { 997 /** Engine to which the job was submitted. */ 998 u32 engine_idx; 999 /** Index of the doorbell to which the job was submitted */ 1000 u32 db_idx; 1001 /** ID of the completed job */ 1002 u32 job_id; 1003 /** Status of the completed job */ 1004 u32 job_status; 1005 /** Host SSID */ 1006 u32 host_ssid; 1007 /** Zero Padding */ 1008 u32 reserved_0; 1009 /** Command queue id */ 1010 u64 cmdq_id; 1011 }; 1012 1013 /** 1014 * Notification message upon native fence signalling. 1015 * @see VPU_JSM_MSG_NATIVE_FENCE_SIGNALLED 1016 */ 1017 struct vpu_ipc_msg_payload_native_fence_signalled { 1018 /** Engine ID. */ 1019 u32 engine_idx; 1020 /** Host SSID. */ 1021 u32 host_ssid; 1022 /** CMDQ ID */ 1023 u64 cmdq_id; 1024 /** Fence object handle. */ 1025 u64 fence_handle; 1026 }; 1027 1028 /** 1029 * vpu_ipc_msg_payload_engine_reset_done will contain an array of this structure 1030 * which contains which queues caused reset if FW was able to detect any error. 1031 * @see vpu_ipc_msg_payload_engine_reset_done 1032 */ 1033 struct vpu_jsm_engine_reset_context { 1034 /** Host SSID */ 1035 u32 host_ssid; 1036 /** Zero Padding */ 1037 u32 reserved_0; 1038 /** Command queue id */ 1039 u64 cmdq_id; 1040 /** See VPU_ENGINE_RESET_CONTEXT_* defines */ 1041 u64 flags; 1042 }; 1043 1044 /** 1045 * Engine reset response. 1046 * @see VPU_JSM_MSG_ENGINE_RESET_DONE 1047 */ 1048 struct vpu_ipc_msg_payload_engine_reset_done { 1049 /** Engine ordinal */ 1050 u32 engine_idx; 1051 /** Number of impacted contexts */ 1052 u32 num_impacted_contexts; 1053 /** Array of impacted command queue ids and their flags */ 1054 struct vpu_jsm_engine_reset_context 1055 impacted_contexts[VPU_MAX_ENGINE_RESET_IMPACTED_CONTEXTS]; 1056 }; 1057 1058 /** 1059 * Preemption response struct 1060 * @see VPU_JSM_MSG_ENGINE_PREEMPT_DONE 1061 */ 1062 struct vpu_ipc_msg_payload_engine_preempt_done { 1063 /** Engine preempted. */ 1064 u32 engine_idx; 1065 /** ID of the preemption request. */ 1066 u32 preempt_id; 1067 }; 1068 1069 /** 1070 * Response structure for register doorbell command for both OS 1071 * and HW scheduling. 1072 * @see VPU_JSM_MSG_REGISTER_DB 1073 * @see VPU_JSM_MSG_HWS_REGISTER_DB 1074 */ 1075 struct vpu_ipc_msg_payload_register_db_done { 1076 /* Index of the registered doorbell. */ 1077 u32 db_idx; 1078 /* Reserved */ 1079 u32 reserved_0; 1080 }; 1081 1082 /** 1083 * Response structure for unregister doorbell command for both OS 1084 * and HW scheduling. 1085 * @see VPU_JSM_MSG_UNREGISTER_DB 1086 */ 1087 struct vpu_ipc_msg_payload_unregister_db_done { 1088 /* Index of the unregistered doorbell. */ 1089 u32 db_idx; 1090 /* Reserved */ 1091 u32 reserved_0; 1092 }; 1093 1094 /** 1095 * Structure for heartbeat response 1096 * @see VPU_JSM_MSG_QUERY_ENGINE_HB_DONE 1097 */ 1098 struct vpu_ipc_msg_payload_query_engine_hb_done { 1099 /** Engine returning heartbeat value. */ 1100 u32 engine_idx; 1101 /** Reserved */ 1102 u32 reserved_0; 1103 /** Heartbeat value. */ 1104 u64 heartbeat; 1105 }; 1106 1107 struct vpu_ipc_msg_payload_get_power_level_count_done { 1108 /** 1109 * Number of supported power levels. The maximum possible 1110 * value of power_level_count is 16 but this may vary across 1111 * implementations. 1112 */ 1113 u32 power_level_count; 1114 /* Reserved */ 1115 u32 reserved_0; 1116 /** 1117 * Power consumption limit for each supported power level in 1118 * [0-100%] range relative to power level 0. 1119 */ 1120 u8 power_limit[16]; 1121 }; 1122 1123 /** 1124 * HWS priority band setup request / response 1125 * @see VPU_JSM_MSG_SET_PRIORITY_BAND_SETUP 1126 */ 1127 struct vpu_ipc_msg_payload_hws_priority_band_setup { 1128 /* 1129 * Grace period in 100ns units when preempting another priority band for 1130 * this priority band 1131 */ 1132 u32 grace_period[VPU_HWS_NUM_PRIORITY_BANDS]; 1133 /* 1134 * Default quantum in 100ns units for scheduling across processes 1135 * within a priority band 1136 * Minimum value supported by NPU is 1ms (10000 in 100ns units). 1137 */ 1138 u32 process_quantum[VPU_HWS_NUM_PRIORITY_BANDS]; 1139 /* 1140 * Default grace period in 100ns units for processes that preempt each 1141 * other within a priority band 1142 */ 1143 u32 process_grace_period[VPU_HWS_NUM_PRIORITY_BANDS]; 1144 /* 1145 * For normal priority band, specifies the target VPU percentage 1146 * in situations when it's starved by the focus band. 1147 */ 1148 u32 normal_band_percentage; 1149 /* 1150 * TDR timeout value in milliseconds. Default value of 0 meaning no timeout. 1151 */ 1152 u32 tdr_timeout; 1153 /* Non-interactive queue timeout for no progress of heartbeat in milliseconds. 1154 * Default value of 0 meaning no timeout. 1155 */ 1156 u32 non_interactive_no_progress_timeout; 1157 /* 1158 * Non-interactive queue upper limit timeout value in milliseconds. Default 1159 * value of 0 meaning no timeout. 1160 */ 1161 u32 non_interactive_timeout; 1162 }; 1163 1164 /** 1165 * @brief HWS create command queue request. 1166 * Host will create a command queue via this command. 1167 * Note: Cmdq group is a handle of an object which 1168 * may contain one or more command queues. 1169 * @see VPU_JSM_MSG_CREATE_CMD_QUEUE 1170 */ 1171 struct vpu_ipc_msg_payload_hws_create_cmdq { 1172 /* Process id */ 1173 u64 process_id; 1174 /* Host SSID */ 1175 u32 host_ssid; 1176 /* Engine for which queue is being created */ 1177 u32 engine_idx; 1178 /* Cmdq group: only used for HWS logging of state changes */ 1179 u64 cmdq_group; 1180 /* Command queue id */ 1181 u64 cmdq_id; 1182 /* Command queue base */ 1183 u64 cmdq_base; 1184 /* Command queue size */ 1185 u32 cmdq_size; 1186 /* Zero padding */ 1187 u32 reserved_0; 1188 }; 1189 1190 /** 1191 * HWS create command queue response. 1192 * @see VPU_JSM_MSG_CREATE_CMD_QUEUE_RSP 1193 */ 1194 struct vpu_ipc_msg_payload_hws_create_cmdq_rsp { 1195 /** Process id */ 1196 u64 process_id; 1197 /** Host SSID */ 1198 u32 host_ssid; 1199 /** Engine for which queue is being created */ 1200 u32 engine_idx; 1201 /** Command queue group */ 1202 u64 cmdq_group; 1203 /** Command queue id */ 1204 u64 cmdq_id; 1205 }; 1206 1207 /** 1208 * HWS destroy command queue request / response 1209 * @see VPU_JSM_MSG_DESTROY_CMD_QUEUE 1210 * @see VPU_JSM_MSG_DESTROY_CMD_QUEUE_RSP 1211 */ 1212 struct vpu_ipc_msg_payload_hws_destroy_cmdq { 1213 /** Host SSID */ 1214 u32 host_ssid; 1215 /** Zero Padding */ 1216 u32 reserved; 1217 /** Command queue id */ 1218 u64 cmdq_id; 1219 }; 1220 1221 /** 1222 * HWS set context scheduling properties request / response 1223 * @see VPU_JSM_MSG_SET_CONTEXT_SCHED_PROPERTIES 1224 * @see VPU_JSM_MSG_SET_CONTEXT_SCHED_PROPERTIES_RSP 1225 */ 1226 struct vpu_ipc_msg_payload_hws_set_context_sched_properties { 1227 /** Host SSID */ 1228 u32 host_ssid; 1229 /** Zero Padding */ 1230 u32 reserved_0; 1231 /** Command queue id */ 1232 u64 cmdq_id; 1233 /** 1234 * Priority band to assign to work of this context. 1235 * Available priority bands: @see enum vpu_job_scheduling_priority_band 1236 */ 1237 u32 priority_band; 1238 /** Inside realtime band assigns a further priority */ 1239 u32 realtime_priority_level; 1240 /** Priority relative to other contexts in the same process */ 1241 s32 in_process_priority; 1242 /** Zero padding / Reserved */ 1243 u32 reserved_1; 1244 /** 1245 * Context quantum relative to other contexts of same priority in the same process 1246 * Minimum value supported by NPU is 1ms (10000 in 100ns units). 1247 */ 1248 u64 context_quantum; 1249 /** Grace period when preempting context of the same priority within the same process */ 1250 u64 grace_period_same_priority; 1251 /** Grace period when preempting context of a lower priority within the same process */ 1252 u64 grace_period_lower_priority; 1253 }; 1254 1255 /** 1256 * Register doorbell command structure. 1257 * This structure supports doorbell registration for both HW and OS scheduling. 1258 * Note: Queue base and size are added here so that the same structure can be used for 1259 * OS scheduling and HW scheduling. For OS scheduling, cmdq_id will be ignored 1260 * and cmdq_base and cmdq_size will be used. For HW scheduling, cmdq_base and cmdq_size will be 1261 * ignored and cmdq_id is used. 1262 * @see VPU_JSM_MSG_HWS_REGISTER_DB 1263 */ 1264 struct vpu_jsm_hws_register_db { 1265 /** Index of the doorbell to register. */ 1266 u32 db_id; 1267 /** Host sub-stream ID for the context assigned to the doorbell. */ 1268 u32 host_ssid; 1269 /** ID of the command queue associated with the doorbell. */ 1270 u64 cmdq_id; 1271 /** Virtual address pointing to the start of command queue. */ 1272 u64 cmdq_base; 1273 /** Size of the command queue in bytes. */ 1274 u64 cmdq_size; 1275 }; 1276 1277 /** 1278 * Structure to set another buffer to be used for scheduling-related logging. 1279 * The size of the logging buffer and the number of entries is defined as part of the 1280 * buffer itself as described next. 1281 * The log buffer received from the host is made up of; 1282 * - header: 32 bytes in size, as shown in @ref vpu_hws_log_buffer_header. 1283 * The header contains the number of log entries in the buffer. 1284 * - log entry: 0 to n-1, each log entry is 32 bytes in size, as shown in 1285 * @ref vpu_hws_log_buffer_entry. 1286 * The entry contains the VPU timestamp, operation type and data. 1287 * The host should provide the notify index value of log buffer to VPU. This is a 1288 * value defined within the log buffer and when written to will generate the 1289 * scheduling log notification. 1290 * The host should set engine_idx and vpu_log_buffer_va to 0 to disable logging 1291 * for a particular engine. 1292 * VPU will handle one log buffer for each of supported engines. 1293 * VPU should allow the logging to consume one host_ssid. 1294 * @see VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG 1295 * @see VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG_RSP 1296 * @see VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION 1297 */ 1298 struct vpu_ipc_msg_payload_hws_set_scheduling_log { 1299 /** Engine ordinal */ 1300 u32 engine_idx; 1301 /** Host SSID */ 1302 u32 host_ssid; 1303 /** 1304 * VPU log buffer virtual address. 1305 * Set to 0 to disable logging for this engine. 1306 */ 1307 u64 vpu_log_buffer_va; 1308 /** 1309 * Notify index of log buffer. VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION 1310 * is generated when an event log is written to this index. 1311 */ 1312 u64 notify_index; 1313 /** 1314 * Field is now deprecated, will be removed when KMD is updated to support removal 1315 */ 1316 u32 enable_extra_events; 1317 /** Zero Padding */ 1318 u32 reserved_0; 1319 }; 1320 1321 /** 1322 * The scheduling log notification is generated by VPU when it writes 1323 * an event into the log buffer at the notify_index. VPU notifies host with 1324 * VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION. This is an asynchronous 1325 * message from VPU to host. 1326 * @see VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION 1327 * @see VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG 1328 */ 1329 struct vpu_ipc_msg_payload_hws_scheduling_log_notification { 1330 /** Engine ordinal */ 1331 u32 engine_idx; 1332 /** Zero Padding */ 1333 u32 reserved_0; 1334 }; 1335 1336 /** 1337 * HWS suspend command queue request and done structure. 1338 * Host will request the suspend of contexts and VPU will; 1339 * - Suspend all work on this context 1340 * - Preempt any running work 1341 * - Asynchronously perform the above and return success immediately once 1342 * all items above are started successfully 1343 * - Notify the host of completion of these operations via 1344 * VPU_JSM_MSG_HWS_SUSPEND_CMDQ_DONE 1345 * - Reject any other context operations on a context with an in-flight 1346 * suspend request running 1347 * Same structure used when VPU notifies host of completion of a context suspend 1348 * request. The ids and suspend fence value reported in this command will match 1349 * the one in the request from the host to suspend the context. Once suspend is 1350 * complete, VPU will not access any data relating to this command queue until 1351 * it is resumed. 1352 * @see VPU_JSM_MSG_HWS_SUSPEND_CMDQ 1353 * @see VPU_JSM_MSG_HWS_SUSPEND_CMDQ_DONE 1354 */ 1355 struct vpu_ipc_msg_payload_hws_suspend_cmdq { 1356 /** Host SSID */ 1357 u32 host_ssid; 1358 /** Zero Padding */ 1359 u32 reserved_0; 1360 /** Command queue id */ 1361 u64 cmdq_id; 1362 /** 1363 * Suspend fence value - reported by the VPU suspend context 1364 * completed once suspend is complete. 1365 */ 1366 u64 suspend_fence_value; 1367 }; 1368 1369 /** 1370 * HWS Resume command queue request / response structure. 1371 * Host will request the resume of a context; 1372 * - VPU will resume all work on this context 1373 * - Scheduler will allow this context to be scheduled 1374 * @see VPU_JSM_MSG_HWS_RESUME_CMDQ 1375 * @see VPU_JSM_MSG_HWS_RESUME_CMDQ_RSP 1376 */ 1377 struct vpu_ipc_msg_payload_hws_resume_cmdq { 1378 /** Host SSID */ 1379 u32 host_ssid; 1380 /** Zero Padding */ 1381 u32 reserved_0; 1382 /** Command queue id */ 1383 u64 cmdq_id; 1384 }; 1385 1386 /** 1387 * HWS Resume engine request / response structure. 1388 * After a HWS engine reset, all scheduling is stopped on VPU until an engine resume. 1389 * Host shall send this command to resume scheduling of any valid queue. 1390 * @see VPU_JSM_MSG_HWS_ENGINE_RESUME 1391 * @see VPU_JSM_MSG_HWS_RESUME_ENGINE_DONE 1392 */ 1393 struct vpu_ipc_msg_payload_hws_resume_engine { 1394 /** Engine to be resumed */ 1395 u32 engine_idx; 1396 /** Reserved */ 1397 u32 reserved_0; 1398 }; 1399 1400 /** 1401 * Payload for VPU_JSM_MSG_TRACE_SET_CONFIG[_RSP] and 1402 * VPU_JSM_MSG_TRACE_GET_CONFIG_RSP messages. 1403 * 1404 * The payload is interpreted differently depending on the type of message: 1405 * 1406 * - For VPU_JSM_MSG_TRACE_SET_CONFIG, the payload specifies the desired 1407 * logging configuration to be set. 1408 * 1409 * - For VPU_JSM_MSG_TRACE_SET_CONFIG_RSP, the payload reports the logging 1410 * configuration that was set after a VPU_JSM_MSG_TRACE_SET_CONFIG request. 1411 * The host can compare this payload with the one it sent in the 1412 * VPU_JSM_MSG_TRACE_SET_CONFIG request to check whether or not the 1413 * configuration was set as desired. 1414 * 1415 * - VPU_JSM_MSG_TRACE_GET_CONFIG_RSP, the payload reports the current logging 1416 * configuration. 1417 */ 1418 struct vpu_ipc_msg_payload_trace_config { 1419 /** 1420 * Logging level (currently set or to be set); see 'mvLog_t' enum for 1421 * acceptable values. The specified logging level applies to all 1422 * destinations and HW components 1423 */ 1424 u32 trace_level; 1425 /** 1426 * Bitmask of logging destinations (currently enabled or to be enabled); 1427 * bitwise OR of values defined in logging_destination enum. 1428 */ 1429 u32 trace_destination_mask; 1430 /** 1431 * Bitmask of loggable HW components (currently enabled or to be enabled); 1432 * bitwise OR of values defined in loggable_hw_component enum. 1433 */ 1434 u64 trace_hw_component_mask; 1435 u64 reserved_0; /**< Reserved for future extensions. */ 1436 }; 1437 1438 /** 1439 * Payload for VPU_JSM_MSG_TRACE_GET_CAPABILITY_RSP messages. 1440 */ 1441 struct vpu_ipc_msg_payload_trace_capability_rsp { 1442 u32 trace_destination_mask; /**< Bitmask of supported logging destinations. */ 1443 u32 reserved_0; 1444 u64 trace_hw_component_mask; /**< Bitmask of supported loggable HW components. */ 1445 u64 reserved_1; /**< Reserved for future extensions. */ 1446 }; 1447 1448 /** 1449 * Payload for VPU_JSM_MSG_TRACE_GET_NAME requests. 1450 */ 1451 struct vpu_ipc_msg_payload_trace_get_name { 1452 /** 1453 * The type of the entity to query name for; see logging_entity_type for 1454 * possible values. 1455 */ 1456 u32 entity_type; 1457 u32 reserved_0; 1458 /** 1459 * The ID of the entity to query name for; possible values depends on the 1460 * entity type. 1461 */ 1462 u64 entity_id; 1463 }; 1464 1465 /** 1466 * Payload for VPU_JSM_MSG_TRACE_GET_NAME_RSP responses. 1467 */ 1468 struct vpu_ipc_msg_payload_trace_get_name_rsp { 1469 /** 1470 * The type of the entity whose name was queried; see logging_entity_type 1471 * for possible values. 1472 */ 1473 u32 entity_type; 1474 u32 reserved_0; 1475 /** 1476 * The ID of the entity whose name was queried; possible values depends on 1477 * the entity type. 1478 */ 1479 u64 entity_id; 1480 /** Reserved for future extensions. */ 1481 u64 reserved_1; 1482 /** The name of the entity. */ 1483 char entity_name[VPU_TRACE_ENTITY_NAME_MAX_LEN]; 1484 }; 1485 1486 /** 1487 * Data sent from the VPU to the host in all metric streamer response messages 1488 * and in asynchronous notification. 1489 * @see VPU_JSM_MSG_METRIC_STREAMER_START_DONE 1490 * @see VPU_JSM_MSG_METRIC_STREAMER_STOP_DONE 1491 * @see VPU_JSM_MSG_METRIC_STREAMER_UPDATE_DONE 1492 * @see VPU_JSM_MSG_METRIC_STREAMER_INFO_DONE 1493 * @see VPU_JSM_MSG_METRIC_STREAMER_NOTIFICATION 1494 */ 1495 struct vpu_jsm_metric_streamer_done { 1496 /** Metric group mask that identifies metric streamer instance. */ 1497 u64 metric_group_mask; 1498 /** 1499 * Size in bytes of single sample - total size of all enabled counters. 1500 * Some VPU implementations may align sample_size to more than 8 bytes. 1501 */ 1502 u32 sample_size; 1503 u32 reserved_0; 1504 /** 1505 * Number of samples collected since the metric streamer was started. 1506 * This will be 0 if the metric streamer was not started. 1507 */ 1508 u32 samples_collected; 1509 /** 1510 * Number of samples dropped since the metric streamer was started. This 1511 * is incremented every time the metric streamer is not able to write 1512 * collected samples because the current buffer is full and there is no 1513 * next buffer to switch to. 1514 */ 1515 u32 samples_dropped; 1516 /** Address of the buffer that contains the latest metric data. */ 1517 u64 buffer_addr; 1518 /** 1519 * Number of bytes written into the metric data buffer. In response to the 1520 * VPU_JSM_MSG_METRIC_STREAMER_INFO request this field contains the size of 1521 * all group and counter descriptors. The size is updated even if the buffer 1522 * in the request was NULL or too small to hold descriptors of all counters 1523 */ 1524 u64 bytes_written; 1525 }; 1526 1527 /** 1528 * Metric group description placed in the metric buffer after successful completion 1529 * of the VPU_JSM_MSG_METRIC_STREAMER_INFO command. This is followed by one or more 1530 * @ref vpu_jsm_metric_counter_descriptor records. 1531 * @see VPU_JSM_MSG_METRIC_STREAMER_INFO 1532 */ 1533 struct vpu_jsm_metric_group_descriptor { 1534 /** 1535 * Offset to the next metric group (8-byte aligned). If this offset is 0 this 1536 * is the last descriptor. The value of metric_info_size must be greater than 1537 * or equal to sizeof(struct vpu_jsm_metric_group_descriptor) + name_string_size 1538 * + description_string_size and must be 8-byte aligned. 1539 */ 1540 u32 next_metric_group_info_offset; 1541 /** 1542 * Offset to the first metric counter description record (8-byte aligned). 1543 * @see vpu_jsm_metric_counter_descriptor 1544 */ 1545 u32 next_metric_counter_info_offset; 1546 /** Index of the group. This corresponds to bit index in metric_group_mask. */ 1547 u32 group_id; 1548 /** Number of counters in the metric group. */ 1549 u32 num_counters; 1550 /** Data size for all counters, must be a multiple of 8 bytes.*/ 1551 u32 metric_group_data_size; 1552 /** 1553 * Metric group domain number. Cannot use multiple, simultaneous metric groups 1554 * from the same domain. 1555 */ 1556 u32 domain; 1557 /** 1558 * Counter name string size. The string must include a null termination character. 1559 * The FW may use a fixed size name or send a different name for each counter. 1560 * If the VPU uses fixed size strings, all characters from the end of the name 1561 * to the of the fixed size character array must be zeroed. 1562 */ 1563 u32 name_string_size; 1564 /** Counter description string size, @see name_string_size */ 1565 u32 description_string_size; 1566 u64 reserved_0; 1567 /** 1568 * Right after this structure, the VPU writes name and description of 1569 * the metric group. 1570 */ 1571 }; 1572 1573 /** 1574 * Metric counter description, placed in the buffer after vpu_jsm_metric_group_descriptor. 1575 * @see VPU_JSM_MSG_METRIC_STREAMER_INFO 1576 */ 1577 struct vpu_jsm_metric_counter_descriptor { 1578 /** 1579 * Offset to the next counter in a group (8-byte aligned). If this offset is 1580 * 0 this is the last counter in the group. 1581 */ 1582 u32 next_metric_counter_info_offset; 1583 /** 1584 * Offset to the counter data from the start of samples in this metric group. 1585 * Note that metric_data_offset % metric_data_size must be 0. 1586 */ 1587 u32 metric_data_offset; 1588 /** Size of the metric counter data in bytes. */ 1589 u32 metric_data_size; 1590 /** Metric type, see Level Zero API for definitions. */ 1591 u32 tier; 1592 /** Metric type, see set_metric_type_t for definitions. */ 1593 u32 metric_type; 1594 /** Metric type, see set_value_type_t for definitions. */ 1595 u32 metric_value_type; 1596 /** 1597 * Counter name string size. The string must include a null termination character. 1598 * The FW may use a fixed size name or send a different name for each counter. 1599 * If the VPU uses fixed size strings, all characters from the end of the name 1600 * to the of the fixed size character array must be zeroed. 1601 */ 1602 u32 name_string_size; 1603 /** Counter description string size, @see name_string_size */ 1604 u32 description_string_size; 1605 /** Counter component name string size, @see name_string_size */ 1606 u32 component_string_size; 1607 /** Counter string size, @see name_string_size */ 1608 u32 units_string_size; 1609 u64 reserved_0; 1610 /** 1611 * Right after this structure, the VPU writes name, description 1612 * component and unit strings. 1613 */ 1614 }; 1615 1616 /** 1617 * Payload for @ref VPU_JSM_MSG_DYNDBG_CONTROL requests. 1618 * 1619 * VPU_JSM_MSG_DYNDBG_CONTROL requests are used to control the VPU FW dynamic debug 1620 * feature, which allows developers to selectively enable/disable code to obtain 1621 * additional FW information. This is equivalent to the dynamic debug functionality 1622 * provided by Linux. The host can control dynamic debug behavior by sending dyndbg 1623 * commands, using the same syntax as for Linux dynamic debug commands. 1624 * 1625 * @see https://www.kernel.org/doc/html/latest/admin-guide/dynamic-debug-howto.html. 1626 * 1627 * NOTE: 1628 * As the dynamic debug feature uses MVLOG messages to provide information, the host 1629 * must first set the logging level to MVLOG_DEBUG, using the @ref VPU_JSM_MSG_TRACE_SET_CONFIG 1630 * command. 1631 */ 1632 struct vpu_ipc_msg_payload_dyndbg_control { 1633 /** 1634 * Dyndbg command to be executed. 1635 */ 1636 char dyndbg_cmd[VPU_DYNDBG_CMD_MAX_LEN]; 1637 }; 1638 1639 /** 1640 * Payload for VPU_JSM_MSG_PWR_D0I3_ENTER 1641 * 1642 * This is a bi-directional payload. 1643 */ 1644 struct vpu_ipc_msg_payload_pwr_d0i3_enter { 1645 /** 1646 * 0: VPU_JSM_MSG_PWR_D0I3_ENTER_DONE is not sent to the host driver 1647 * The driver will poll for D0i2 Idle state transitions. 1648 * 1: VPU_JSM_MSG_PWR_D0I3_ENTER_DONE is sent after VPU state save is complete 1649 */ 1650 u32 send_response; 1651 u32 reserved_0; 1652 }; 1653 1654 /** 1655 * Payload for @ref VPU_JSM_MSG_DCT_ENABLE message. 1656 * 1657 * Default values for DCT active/inactive times are 5.3ms and 30ms respectively, 1658 * corresponding to a 85% duty cycle. This payload allows the host to tune these 1659 * values according to application requirements. 1660 */ 1661 struct vpu_ipc_msg_payload_pwr_dct_control { 1662 /** Duty cycle active time in microseconds */ 1663 u32 dct_active_us; 1664 /** Duty cycle inactive time in microseconds */ 1665 u32 dct_inactive_us; 1666 }; 1667 1668 /** 1669 * Payload for @ref VPU_JSM_MSG_FREQ_CONFIG message. 1670 * 1671 * This payload allows the host to configure the VPU frequency scaling parameters. 1672 */ 1673 struct vpu_ipc_msg_payload_freq_config { 1674 /** Minimum frequency PLL ratio */ 1675 u32 min_freq_pll_ratio; 1676 /** Efficiency frequency PLL ratio */ 1677 u32 pn_freq_pll_ratio; 1678 /** Maximum frequency PLL ratio */ 1679 u32 max_freq_pll_ratio; 1680 /** Reserved for 64-bit alignment */ 1681 u32 reserved_0; 1682 }; 1683 1684 /* 1685 * Payloads union, used to define complete message format. 1686 */ 1687 union vpu_ipc_msg_payload { 1688 struct vpu_ipc_msg_payload_engine_reset engine_reset; 1689 struct vpu_ipc_msg_payload_engine_preempt engine_preempt; 1690 struct vpu_ipc_msg_payload_register_db register_db; 1691 struct vpu_ipc_msg_payload_unregister_db unregister_db; 1692 struct vpu_ipc_msg_payload_query_engine_hb query_engine_hb; 1693 struct vpu_ipc_msg_payload_power_level power_level; 1694 struct vpu_jsm_metric_streamer_start metric_streamer_start; 1695 struct vpu_jsm_metric_streamer_stop metric_streamer_stop; 1696 struct vpu_jsm_metric_streamer_update metric_streamer_update; 1697 struct vpu_ipc_msg_payload_ssid_release ssid_release; 1698 struct vpu_jsm_hws_register_db hws_register_db; 1699 struct vpu_ipc_msg_payload_job_done job_done; 1700 struct vpu_ipc_msg_payload_native_fence_signalled native_fence_signalled; 1701 struct vpu_ipc_msg_payload_engine_reset_done engine_reset_done; 1702 struct vpu_ipc_msg_payload_engine_preempt_done engine_preempt_done; 1703 struct vpu_ipc_msg_payload_register_db_done register_db_done; 1704 struct vpu_ipc_msg_payload_unregister_db_done unregister_db_done; 1705 struct vpu_ipc_msg_payload_query_engine_hb_done query_engine_hb_done; 1706 struct vpu_ipc_msg_payload_get_power_level_count_done get_power_level_count_done; 1707 struct vpu_jsm_metric_streamer_done metric_streamer_done; 1708 struct vpu_ipc_msg_payload_trace_config trace_config; 1709 struct vpu_ipc_msg_payload_trace_capability_rsp trace_capability; 1710 struct vpu_ipc_msg_payload_trace_get_name trace_get_name; 1711 struct vpu_ipc_msg_payload_trace_get_name_rsp trace_get_name_rsp; 1712 struct vpu_ipc_msg_payload_dyndbg_control dyndbg_control; 1713 struct vpu_ipc_msg_payload_hws_priority_band_setup hws_priority_band_setup; 1714 struct vpu_ipc_msg_payload_hws_create_cmdq hws_create_cmdq; 1715 struct vpu_ipc_msg_payload_hws_create_cmdq_rsp hws_create_cmdq_rsp; 1716 struct vpu_ipc_msg_payload_hws_destroy_cmdq hws_destroy_cmdq; 1717 struct vpu_ipc_msg_payload_hws_set_context_sched_properties 1718 hws_set_context_sched_properties; 1719 struct vpu_ipc_msg_payload_hws_set_scheduling_log hws_set_scheduling_log; 1720 struct vpu_ipc_msg_payload_hws_scheduling_log_notification hws_scheduling_log_notification; 1721 struct vpu_ipc_msg_payload_hws_suspend_cmdq hws_suspend_cmdq; 1722 struct vpu_ipc_msg_payload_hws_resume_cmdq hws_resume_cmdq; 1723 struct vpu_ipc_msg_payload_hws_resume_engine hws_resume_engine; 1724 struct vpu_ipc_msg_payload_pwr_d0i3_enter pwr_d0i3_enter; 1725 struct vpu_ipc_msg_payload_pwr_dct_control pwr_dct_control; 1726 struct vpu_ipc_msg_payload_freq_config freq_config; 1727 }; 1728 1729 /** 1730 * Host <-> NPU IPC message base structure. 1731 * 1732 * NOTE: All instances of this object must be aligned on a 64B boundary 1733 * to allow proper handling of VPU cache operations. 1734 */ 1735 struct vpu_jsm_msg { 1736 /** Reserved */ 1737 u64 reserved_0; 1738 /** Message type, see @ref vpu_ipc_msg_type. */ 1739 u32 type; 1740 /** Buffer status, see @ref vpu_ipc_msg_status. */ 1741 u32 status; 1742 /** 1743 * Request ID, provided by the host in a request message and passed 1744 * back by VPU in the response message. 1745 */ 1746 u32 request_id; 1747 /** Request return code set by the VPU, see VPU_JSM_STATUS_* defines. */ 1748 u32 result; 1749 u64 reserved_1; 1750 /** Message payload depending on message type, see vpu_ipc_msg_payload union. */ 1751 union vpu_ipc_msg_payload payload; 1752 }; 1753 1754 #pragma pack(pop) 1755 1756 #endif 1757 1758 ///@} 1759