1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright (c) 2020-2024, Intel Corporation. 4 */ 5 6 /** 7 * @file 8 * @brief JSM shared definitions 9 * 10 * @ingroup Jsm 11 * @brief JSM shared definitions 12 * @{ 13 */ 14 #ifndef VPU_JSM_API_H 15 #define VPU_JSM_API_H 16 17 /* 18 * Major version changes that break backward compatibility 19 */ 20 #define VPU_JSM_API_VER_MAJOR 3 21 22 /* 23 * Minor version changes when API backward compatibility is preserved. 24 */ 25 #define VPU_JSM_API_VER_MINOR 25 26 27 /* 28 * API header changed (field names, documentation, formatting) but API itself has not been changed 29 */ 30 #define VPU_JSM_API_VER_PATCH 0 31 32 /* 33 * Index in the API version table 34 */ 35 #define VPU_JSM_API_VER_INDEX 4 36 37 /* 38 * Number of Priority Bands for Hardware Scheduling 39 * Bands: Idle(0), Normal(1), Focus(2), RealTime(3) 40 */ 41 #define VPU_HWS_NUM_PRIORITY_BANDS 4 42 43 /* Max number of impacted contexts that can be dealt with the engine reset command */ 44 #define VPU_MAX_ENGINE_RESET_IMPACTED_CONTEXTS 3 45 46 /* 47 * Pack the API structures to enforce binary compatibility 48 * Align to 8 bytes for optimal performance 49 */ 50 #pragma pack(push, 8) 51 52 /* 53 * Engine indexes. 54 */ 55 #define VPU_ENGINE_COMPUTE 0 56 #define VPU_ENGINE_COPY 1 57 #define VPU_ENGINE_NB 2 58 59 /* 60 * VPU status values. 61 */ 62 #define VPU_JSM_STATUS_SUCCESS 0x0U 63 #define VPU_JSM_STATUS_PARSING_ERR 0x1U 64 #define VPU_JSM_STATUS_PROCESSING_ERR 0x2U 65 #define VPU_JSM_STATUS_PREEMPTED 0x3U 66 #define VPU_JSM_STATUS_ABORTED 0x4U 67 #define VPU_JSM_STATUS_USER_CTX_VIOL_ERR 0x5U 68 #define VPU_JSM_STATUS_GLOBAL_CTX_VIOL_ERR 0x6U 69 #define VPU_JSM_STATUS_MVNCI_WRONG_INPUT_FORMAT 0x7U 70 #define VPU_JSM_STATUS_MVNCI_UNSUPPORTED_NETWORK_ELEMENT 0x8U 71 #define VPU_JSM_STATUS_MVNCI_INVALID_HANDLE 0x9U 72 #define VPU_JSM_STATUS_MVNCI_OUT_OF_RESOURCES 0xAU 73 #define VPU_JSM_STATUS_MVNCI_NOT_IMPLEMENTED 0xBU 74 #define VPU_JSM_STATUS_MVNCI_INTERNAL_ERROR 0xCU 75 /* Job status returned when the job was preempted mid-inference */ 76 #define VPU_JSM_STATUS_PREEMPTED_MID_INFERENCE 0xDU 77 #define VPU_JSM_STATUS_MVNCI_CONTEXT_VIOLATION_HW 0xEU 78 79 /* 80 * Host <-> VPU IPC channels. 81 * ASYNC commands use a high priority channel, other messages use low-priority ones. 82 */ 83 #define VPU_IPC_CHAN_ASYNC_CMD 0 84 #define VPU_IPC_CHAN_GEN_CMD 10 85 #define VPU_IPC_CHAN_JOB_RET 11 86 87 /* 88 * Job flags bit masks. 89 */ 90 enum { 91 /* 92 * Null submission mask. 93 * When set, batch buffer's commands are not processed but returned as 94 * successful immediately, except fences and timestamps. 95 * When cleared, batch buffer's commands are processed normally. 96 * Used for testing and profiling purposes. 97 */ 98 VPU_JOB_FLAGS_NULL_SUBMISSION_MASK = (1 << 0U), 99 /* 100 * Inline command mask. 101 * When set, the object in job queue is an inline command (see struct vpu_inline_cmd below). 102 * When cleared, the object in job queue is a job (see struct vpu_job_queue_entry below). 103 */ 104 VPU_JOB_FLAGS_INLINE_CMD_MASK = (1 << 1U), 105 /* 106 * VPU private data mask. 107 * Reserved for the VPU to store private data about the job (or inline command) 108 * while being processed. 109 */ 110 VPU_JOB_FLAGS_PRIVATE_DATA_MASK = 0xFFFF0000U 111 }; 112 113 /* 114 * Job queue flags bit masks. 115 */ 116 enum { 117 /* 118 * No job done notification mask. 119 * When set, indicates that no job done notification should be sent for any 120 * job from this queue. When cleared, indicates that job done notification 121 * should be sent for every job completed from this queue. 122 */ 123 VPU_JOB_QUEUE_FLAGS_NO_JOB_DONE_MASK = (1 << 0U), 124 /* 125 * Native fence usage mask. 126 * When set, indicates that job queue uses native fences (as inline commands 127 * in job queue). Such queues may also use legacy fences (as commands in batch buffers). 128 * When cleared, indicates the job queue only uses legacy fences. 129 * NOTE: For queues using native fences, VPU expects that all jobs in the queue 130 * are immediately followed by an inline command object. This object is expected 131 * to be a fence signal command in most cases, but can also be a NOP in case the host 132 * does not need per-job fence signalling. Other inline commands objects can be 133 * inserted between "job and inline command" pairs. 134 */ 135 VPU_JOB_QUEUE_FLAGS_USE_NATIVE_FENCE_MASK = (1 << 1U), 136 137 /* 138 * Enable turbo mode for testing NPU performance; not recommended for regular usage. 139 */ 140 VPU_JOB_QUEUE_FLAGS_TURBO_MODE = (1 << 2U) 141 }; 142 143 /* 144 * Max length (including trailing NULL char) of trace entity name (e.g., the 145 * name of a logging destination or a loggable HW component). 146 */ 147 #define VPU_TRACE_ENTITY_NAME_MAX_LEN 32 148 149 /* 150 * Max length (including trailing NULL char) of a dyndbg command. 151 * 152 * NOTE: 96 is used so that the size of 'struct vpu_ipc_msg' in the JSM API is 153 * 128 bytes (multiple of 64 bytes, the cache line size). 154 */ 155 #define VPU_DYNDBG_CMD_MAX_LEN 96 156 157 /* 158 * For HWS command queue scheduling, we can prioritise command queues inside the 159 * same process with a relative in-process priority. Valid values for relative 160 * priority are given below - max and min. 161 */ 162 #define VPU_HWS_COMMAND_QUEUE_MAX_IN_PROCESS_PRIORITY 7 163 #define VPU_HWS_COMMAND_QUEUE_MIN_IN_PROCESS_PRIORITY -7 164 165 /* 166 * For HWS priority scheduling, we can have multiple realtime priority bands. 167 * They are numbered 0 to a MAX. 168 */ 169 #define VPU_HWS_MAX_REALTIME_PRIORITY_LEVEL 31U 170 171 /* 172 * vpu_jsm_engine_reset_context flag definitions 173 */ 174 #define VPU_ENGINE_RESET_CONTEXT_FLAG_COLLATERAL_DAMAGE_MASK BIT(0) 175 #define VPU_ENGINE_RESET_CONTEXT_HANG_PRIMARY_CAUSE 0 176 #define VPU_ENGINE_RESET_CONTEXT_COLLATERAL_DAMAGE 1 177 178 /* 179 * Invalid command queue handle identifier. Applies to cmdq_id and cmdq_group 180 * in this API. 181 */ 182 #define VPU_HWS_INVALID_CMDQ_HANDLE 0ULL 183 184 /* 185 * Inline commands types. 186 */ 187 /* 188 * NOP. 189 * VPU does nothing other than consuming the inline command object. 190 */ 191 #define VPU_INLINE_CMD_TYPE_NOP 0x0 192 /* 193 * Fence wait. 194 * VPU waits for the fence current value to reach monitored value. 195 * Fence wait operations are executed upon job dispatching. While waiting for 196 * the fence to be satisfied, VPU blocks fetching of the next objects in the queue. 197 * Jobs present in the queue prior to the fence wait object may be processed 198 * concurrently. 199 */ 200 #define VPU_INLINE_CMD_TYPE_FENCE_WAIT 0x1 201 /* 202 * Fence signal. 203 * VPU sets the fence current value to the provided value. If new current value 204 * is equal to or higher than monitored value, VPU sends fence signalled notification 205 * to the host. Fence signal operations are executed upon completion of all the jobs 206 * present in the queue prior to them, and in-order relative to each other in the queue. 207 * But jobs in-between them may be processed concurrently and may complete out-of-order. 208 */ 209 #define VPU_INLINE_CMD_TYPE_FENCE_SIGNAL 0x2 210 211 /* 212 * Job scheduling priority bands for both hardware scheduling and OS scheduling. 213 */ 214 enum vpu_job_scheduling_priority_band { 215 VPU_JOB_SCHEDULING_PRIORITY_BAND_IDLE = 0, 216 VPU_JOB_SCHEDULING_PRIORITY_BAND_NORMAL = 1, 217 VPU_JOB_SCHEDULING_PRIORITY_BAND_FOCUS = 2, 218 VPU_JOB_SCHEDULING_PRIORITY_BAND_REALTIME = 3, 219 VPU_JOB_SCHEDULING_PRIORITY_BAND_COUNT = 4, 220 }; 221 222 /* 223 * Job format. 224 * Jobs defines the actual workloads to be executed by a given engine. 225 */ 226 struct vpu_job_queue_entry { 227 /**< Address of VPU commands batch buffer */ 228 u64 batch_buf_addr; 229 /**< Job ID */ 230 u32 job_id; 231 /**< Flags bit field, see VPU_JOB_FLAGS_* above */ 232 u32 flags; 233 /** 234 * Doorbell ring timestamp taken by KMD from SoC's global system clock, in 235 * microseconds. NPU can convert this value to its own fixed clock's timebase, 236 * to match other profiling timestamps. 237 */ 238 u64 doorbell_timestamp; 239 /**< Extra id for job tracking, used only in the firmware perf traces */ 240 u64 host_tracking_id; 241 /**< Address of the primary preemption buffer to use for this job */ 242 u64 primary_preempt_buf_addr; 243 /**< Size of the primary preemption buffer to use for this job */ 244 u32 primary_preempt_buf_size; 245 /**< Size of secondary preemption buffer to use for this job */ 246 u32 secondary_preempt_buf_size; 247 /**< Address of secondary preemption buffer to use for this job */ 248 u64 secondary_preempt_buf_addr; 249 u64 reserved_0; 250 }; 251 252 /* 253 * Inline command format. 254 * Inline commands are the commands executed at scheduler level (typically, 255 * synchronization directives). Inline command and job objects must be of 256 * the same size and have flags field at same offset. 257 */ 258 struct vpu_inline_cmd { 259 u64 reserved_0; 260 /* Inline command type, see VPU_INLINE_CMD_TYPE_* defines. */ 261 u32 type; 262 /* Flags bit field, see VPU_JOB_FLAGS_* above. */ 263 u32 flags; 264 /* Inline command payload. Depends on inline command type. */ 265 union { 266 /* Fence (wait and signal) commands' payload. */ 267 struct { 268 /* Fence object handle. */ 269 u64 fence_handle; 270 /* User VA of the current fence value. */ 271 u64 current_value_va; 272 /* User VA of the monitored fence value (read-only). */ 273 u64 monitored_value_va; 274 /* Value to wait for or write in fence location. */ 275 u64 value; 276 /* User VA of the log buffer in which to add log entry on completion. */ 277 u64 log_buffer_va; 278 } fence; 279 /* Other commands do not have a payload. */ 280 /* Payload definition for future inline commands can be inserted here. */ 281 u64 reserved_1[6]; 282 } payload; 283 }; 284 285 /* 286 * Job queue slots can be populated either with job objects or inline command objects. 287 */ 288 union vpu_jobq_slot { 289 struct vpu_job_queue_entry job; 290 struct vpu_inline_cmd inline_cmd; 291 }; 292 293 /* 294 * Job queue control registers. 295 */ 296 struct vpu_job_queue_header { 297 u32 engine_idx; 298 u32 head; 299 u32 tail; 300 u32 flags; 301 /* Set to 1 to indicate priority_band field is valid */ 302 u32 priority_band_valid; 303 /* 304 * Priority for the work of this job queue, valid only if the HWS is NOT used 305 * and the `priority_band_valid` is set to 1. It is applied only during 306 * the VPU_JSM_MSG_REGISTER_DB message processing. 307 * The device firmware might use the `priority_band` to optimize the power 308 * management logic, but it will not affect the order of jobs. 309 * Available priority bands: @see enum vpu_job_scheduling_priority_band 310 */ 311 u32 priority_band; 312 /* Inside realtime band assigns a further priority, limited to 0..31 range */ 313 u32 realtime_priority_level; 314 u32 reserved_0[9]; 315 }; 316 317 /* 318 * Job queue format. 319 */ 320 struct vpu_job_queue { 321 struct vpu_job_queue_header header; 322 union vpu_jobq_slot slot[]; 323 }; 324 325 /** 326 * Logging entity types. 327 * 328 * This enum defines the different types of entities involved in logging. 329 */ 330 enum vpu_trace_entity_type { 331 /** Logging destination (entity where logs can be stored / printed). */ 332 VPU_TRACE_ENTITY_TYPE_DESTINATION = 1, 333 /** Loggable HW component (HW entity that can be logged). */ 334 VPU_TRACE_ENTITY_TYPE_HW_COMPONENT = 2, 335 }; 336 337 /* 338 * HWS specific log buffer header details. 339 * Total size is 32 bytes. 340 */ 341 struct vpu_hws_log_buffer_header { 342 /* Written by VPU after adding a log entry. Initialised by host to 0. */ 343 u32 first_free_entry_index; 344 /* Incremented by VPU every time the VPU writes the 0th entry; initialised by host to 0. */ 345 u32 wraparound_count; 346 /* 347 * This is the number of buffers that can be stored in the log buffer provided by the host. 348 * It is written by host before passing buffer to VPU. VPU should consider it read-only. 349 */ 350 u64 num_of_entries; 351 u64 reserved[2]; 352 }; 353 354 /* 355 * HWS specific log buffer entry details. 356 * Total size is 32 bytes. 357 */ 358 struct vpu_hws_log_buffer_entry { 359 /* VPU timestamp must be an invariant timer tick (not impacted by DVFS) */ 360 u64 vpu_timestamp; 361 /* 362 * Operation type: 363 * 0 - context state change 364 * 1 - queue new work 365 * 2 - queue unwait sync object 366 * 3 - queue no more work 367 * 4 - queue wait sync object 368 */ 369 u32 operation_type; 370 u32 reserved; 371 /* Operation data depends on operation type */ 372 u64 operation_data[2]; 373 }; 374 375 /* Native fence log buffer types. */ 376 enum vpu_hws_native_fence_log_type { 377 VPU_HWS_NATIVE_FENCE_LOG_TYPE_WAITS = 1, 378 VPU_HWS_NATIVE_FENCE_LOG_TYPE_SIGNALS = 2 379 }; 380 381 /* HWS native fence log buffer header. */ 382 struct vpu_hws_native_fence_log_header { 383 union { 384 struct { 385 /* Index of the first free entry in buffer. */ 386 u32 first_free_entry_idx; 387 /* Incremented each time NPU wraps around the buffer to write next entry. */ 388 u32 wraparound_count; 389 }; 390 /* Field allowing atomic update of both fields above. */ 391 u64 atomic_wraparound_and_entry_idx; 392 }; 393 /* Log buffer type, see enum vpu_hws_native_fence_log_type. */ 394 u64 type; 395 /* Allocated number of entries in the log buffer. */ 396 u64 entry_nb; 397 u64 reserved[2]; 398 }; 399 400 /* Native fence log operation types. */ 401 enum vpu_hws_native_fence_log_op { 402 VPU_HWS_NATIVE_FENCE_LOG_OP_SIGNAL_EXECUTED = 0, 403 VPU_HWS_NATIVE_FENCE_LOG_OP_WAIT_UNBLOCKED = 1 404 }; 405 406 /* HWS native fence log entry. */ 407 struct vpu_hws_native_fence_log_entry { 408 /* Newly signaled/unblocked fence value. */ 409 u64 fence_value; 410 /* Native fence object handle to which this operation belongs. */ 411 u64 fence_handle; 412 /* Operation type, see enum vpu_hws_native_fence_log_op. */ 413 u64 op_type; 414 u64 reserved_0; 415 /* 416 * VPU_HWS_NATIVE_FENCE_LOG_OP_WAIT_UNBLOCKED only: Timestamp at which fence 417 * wait was started (in NPU SysTime). 418 */ 419 u64 fence_wait_start_ts; 420 u64 reserved_1; 421 /* Timestamp at which fence operation was completed (in NPU SysTime). */ 422 u64 fence_end_ts; 423 }; 424 425 /* Native fence log buffer. */ 426 struct vpu_hws_native_fence_log_buffer { 427 struct vpu_hws_native_fence_log_header header; 428 struct vpu_hws_native_fence_log_entry entry[]; 429 }; 430 431 /* 432 * Host <-> VPU IPC messages types. 433 */ 434 enum vpu_ipc_msg_type { 435 VPU_JSM_MSG_UNKNOWN = 0xFFFFFFFF, 436 437 /* IPC Host -> Device, Async commands */ 438 VPU_JSM_MSG_ASYNC_CMD = 0x1100, 439 VPU_JSM_MSG_ENGINE_RESET = VPU_JSM_MSG_ASYNC_CMD, 440 /** 441 * Preempt engine. The NPU stops (preempts) all the jobs currently 442 * executing on the target engine making the engine become idle and ready to 443 * execute new jobs. 444 * NOTE: The NPU does not remove unstarted jobs (if any) from job queues of 445 * the target engine, but it stops processing them (until the queue doorbell 446 * is rung again); the host is responsible to reset the job queue, either 447 * after preemption or when resubmitting jobs to the queue. 448 */ 449 VPU_JSM_MSG_ENGINE_PREEMPT = 0x1101, 450 VPU_JSM_MSG_REGISTER_DB = 0x1102, 451 VPU_JSM_MSG_UNREGISTER_DB = 0x1103, 452 VPU_JSM_MSG_QUERY_ENGINE_HB = 0x1104, 453 VPU_JSM_MSG_GET_POWER_LEVEL_COUNT = 0x1105, 454 VPU_JSM_MSG_GET_POWER_LEVEL = 0x1106, 455 VPU_JSM_MSG_SET_POWER_LEVEL = 0x1107, 456 /* @deprecated */ 457 VPU_JSM_MSG_METRIC_STREAMER_OPEN = 0x1108, 458 /* @deprecated */ 459 VPU_JSM_MSG_METRIC_STREAMER_CLOSE = 0x1109, 460 /** Configure logging (used to modify configuration passed in boot params). */ 461 VPU_JSM_MSG_TRACE_SET_CONFIG = 0x110a, 462 /** Return current logging configuration. */ 463 VPU_JSM_MSG_TRACE_GET_CONFIG = 0x110b, 464 /** 465 * Get masks of destinations and HW components supported by the firmware 466 * (may vary between HW generations and FW compile 467 * time configurations) 468 */ 469 VPU_JSM_MSG_TRACE_GET_CAPABILITY = 0x110c, 470 /** Get the name of a destination or HW component. */ 471 VPU_JSM_MSG_TRACE_GET_NAME = 0x110d, 472 /** 473 * Release resource associated with host ssid . All jobs that belong to the host_ssid 474 * aborted and removed from internal scheduling queues. All doorbells assigned 475 * to the host_ssid are unregistered and any internal FW resources belonging to 476 * the host_ssid are released. 477 */ 478 VPU_JSM_MSG_SSID_RELEASE = 0x110e, 479 /** 480 * Start collecting metric data. 481 * @see vpu_jsm_metric_streamer_start 482 */ 483 VPU_JSM_MSG_METRIC_STREAMER_START = 0x110f, 484 /** 485 * Stop collecting metric data. This command will return success if it is called 486 * for a metric stream that has already been stopped or was never started. 487 * @see vpu_jsm_metric_streamer_stop 488 */ 489 VPU_JSM_MSG_METRIC_STREAMER_STOP = 0x1110, 490 /** 491 * Update current and next buffer for metric data collection. This command can 492 * also be used to request information about the number of collected samples 493 * and the amount of data written to the buffer. 494 * @see vpu_jsm_metric_streamer_update 495 */ 496 VPU_JSM_MSG_METRIC_STREAMER_UPDATE = 0x1111, 497 /** 498 * Request description of selected metric groups and metric counters within 499 * each group. The VPU will write the description of groups and counters to 500 * the buffer specified in the command structure. 501 * @see vpu_jsm_metric_streamer_start 502 */ 503 VPU_JSM_MSG_METRIC_STREAMER_INFO = 0x1112, 504 /** Control command: Priority band setup */ 505 VPU_JSM_MSG_SET_PRIORITY_BAND_SETUP = 0x1113, 506 /** Control command: Create command queue */ 507 VPU_JSM_MSG_CREATE_CMD_QUEUE = 0x1114, 508 /** Control command: Destroy command queue */ 509 VPU_JSM_MSG_DESTROY_CMD_QUEUE = 0x1115, 510 /** Control command: Set context scheduling properties */ 511 VPU_JSM_MSG_SET_CONTEXT_SCHED_PROPERTIES = 0x1116, 512 /* 513 * Register a doorbell to notify VPU of new work. The doorbell may later be 514 * deallocated or reassigned to another context. 515 */ 516 VPU_JSM_MSG_HWS_REGISTER_DB = 0x1117, 517 /** Control command: Log buffer setting */ 518 VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG = 0x1118, 519 /* Control command: Suspend command queue. */ 520 VPU_JSM_MSG_HWS_SUSPEND_CMDQ = 0x1119, 521 /* Control command: Resume command queue */ 522 VPU_JSM_MSG_HWS_RESUME_CMDQ = 0x111a, 523 /* Control command: Resume engine after reset */ 524 VPU_JSM_MSG_HWS_ENGINE_RESUME = 0x111b, 525 /* Control command: Enable survivability/DCT mode */ 526 VPU_JSM_MSG_DCT_ENABLE = 0x111c, 527 /* Control command: Disable survivability/DCT mode */ 528 VPU_JSM_MSG_DCT_DISABLE = 0x111d, 529 /** 530 * Dump VPU state. To be used for debug purposes only. 531 * NOTE: Please introduce new ASYNC commands before this one. * 532 */ 533 VPU_JSM_MSG_STATE_DUMP = 0x11FF, 534 535 /* IPC Host -> Device, General commands */ 536 VPU_JSM_MSG_GENERAL_CMD = 0x1200, 537 VPU_JSM_MSG_BLOB_DEINIT_DEPRECATED = VPU_JSM_MSG_GENERAL_CMD, 538 /** 539 * Control dyndbg behavior by executing a dyndbg command; equivalent to 540 * Linux command: `echo '<dyndbg_cmd>' > <debugfs>/dynamic_debug/control`. 541 */ 542 VPU_JSM_MSG_DYNDBG_CONTROL = 0x1201, 543 /** 544 * Perform the save procedure for the D0i3 entry 545 */ 546 VPU_JSM_MSG_PWR_D0I3_ENTER = 0x1202, 547 548 /* IPC Device -> Host, Job completion */ 549 VPU_JSM_MSG_JOB_DONE = 0x2100, 550 /* IPC Device -> Host, Fence signalled */ 551 VPU_JSM_MSG_NATIVE_FENCE_SIGNALLED = 0x2101, 552 553 /* IPC Device -> Host, Async command completion */ 554 VPU_JSM_MSG_ASYNC_CMD_DONE = 0x2200, 555 VPU_JSM_MSG_ENGINE_RESET_DONE = VPU_JSM_MSG_ASYNC_CMD_DONE, 556 VPU_JSM_MSG_ENGINE_PREEMPT_DONE = 0x2201, 557 VPU_JSM_MSG_REGISTER_DB_DONE = 0x2202, 558 VPU_JSM_MSG_UNREGISTER_DB_DONE = 0x2203, 559 VPU_JSM_MSG_QUERY_ENGINE_HB_DONE = 0x2204, 560 VPU_JSM_MSG_GET_POWER_LEVEL_COUNT_DONE = 0x2205, 561 VPU_JSM_MSG_GET_POWER_LEVEL_DONE = 0x2206, 562 VPU_JSM_MSG_SET_POWER_LEVEL_DONE = 0x2207, 563 /* @deprecated */ 564 VPU_JSM_MSG_METRIC_STREAMER_OPEN_DONE = 0x2208, 565 /* @deprecated */ 566 VPU_JSM_MSG_METRIC_STREAMER_CLOSE_DONE = 0x2209, 567 /** Response to VPU_JSM_MSG_TRACE_SET_CONFIG. */ 568 VPU_JSM_MSG_TRACE_SET_CONFIG_RSP = 0x220a, 569 /** Response to VPU_JSM_MSG_TRACE_GET_CONFIG. */ 570 VPU_JSM_MSG_TRACE_GET_CONFIG_RSP = 0x220b, 571 /** Response to VPU_JSM_MSG_TRACE_GET_CAPABILITY. */ 572 VPU_JSM_MSG_TRACE_GET_CAPABILITY_RSP = 0x220c, 573 /** Response to VPU_JSM_MSG_TRACE_GET_NAME. */ 574 VPU_JSM_MSG_TRACE_GET_NAME_RSP = 0x220d, 575 /** Response to VPU_JSM_MSG_SSID_RELEASE. */ 576 VPU_JSM_MSG_SSID_RELEASE_DONE = 0x220e, 577 /** 578 * Response to VPU_JSM_MSG_METRIC_STREAMER_START. 579 * VPU will return an error result if metric collection cannot be started, 580 * e.g. when the specified metric mask is invalid. 581 * @see vpu_jsm_metric_streamer_done 582 */ 583 VPU_JSM_MSG_METRIC_STREAMER_START_DONE = 0x220f, 584 /** 585 * Response to VPU_JSM_MSG_METRIC_STREAMER_STOP. 586 * Returns information about collected metric data. 587 * @see vpu_jsm_metric_streamer_done 588 */ 589 VPU_JSM_MSG_METRIC_STREAMER_STOP_DONE = 0x2210, 590 /** 591 * Response to VPU_JSM_MSG_METRIC_STREAMER_UPDATE. 592 * Returns information about collected metric data. 593 * @see vpu_jsm_metric_streamer_done 594 */ 595 VPU_JSM_MSG_METRIC_STREAMER_UPDATE_DONE = 0x2211, 596 /** 597 * Response to VPU_JSM_MSG_METRIC_STREAMER_INFO. 598 * Returns a description of the metric groups and metric counters. 599 * @see vpu_jsm_metric_streamer_done 600 */ 601 VPU_JSM_MSG_METRIC_STREAMER_INFO_DONE = 0x2212, 602 /** 603 * Asynchronous event sent from the VPU to the host either when the current 604 * metric buffer is full or when the VPU has collected a multiple of 605 * @notify_sample_count samples as indicated through the start command 606 * (VPU_JSM_MSG_METRIC_STREAMER_START). Returns information about collected 607 * metric data. 608 * @see vpu_jsm_metric_streamer_done 609 */ 610 VPU_JSM_MSG_METRIC_STREAMER_NOTIFICATION = 0x2213, 611 /** Response to control command: Priority band setup */ 612 VPU_JSM_MSG_SET_PRIORITY_BAND_SETUP_RSP = 0x2214, 613 /** Response to control command: Create command queue */ 614 VPU_JSM_MSG_CREATE_CMD_QUEUE_RSP = 0x2215, 615 /** Response to control command: Destroy command queue */ 616 VPU_JSM_MSG_DESTROY_CMD_QUEUE_RSP = 0x2216, 617 /** Response to control command: Set context scheduling properties */ 618 VPU_JSM_MSG_SET_CONTEXT_SCHED_PROPERTIES_RSP = 0x2217, 619 /** Response to control command: Log buffer setting */ 620 VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG_RSP = 0x2218, 621 /* IPC Device -> Host, HWS notify index entry of log buffer written */ 622 VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION = 0x2219, 623 /* IPC Device -> Host, HWS completion of a context suspend request */ 624 VPU_JSM_MSG_HWS_SUSPEND_CMDQ_DONE = 0x221a, 625 /* Response to control command: Resume command queue */ 626 VPU_JSM_MSG_HWS_RESUME_CMDQ_RSP = 0x221b, 627 /* Response to control command: Resume engine command response */ 628 VPU_JSM_MSG_HWS_RESUME_ENGINE_DONE = 0x221c, 629 /* Response to control command: Enable survivability/DCT mode */ 630 VPU_JSM_MSG_DCT_ENABLE_DONE = 0x221d, 631 /* Response to control command: Disable survivability/DCT mode */ 632 VPU_JSM_MSG_DCT_DISABLE_DONE = 0x221e, 633 /** 634 * Response to state dump control command. 635 * NOTE: Please introduce new ASYNC responses before this one. * 636 */ 637 VPU_JSM_MSG_STATE_DUMP_RSP = 0x22FF, 638 639 /* IPC Device -> Host, General command completion */ 640 VPU_JSM_MSG_GENERAL_CMD_DONE = 0x2300, 641 VPU_JSM_MSG_BLOB_DEINIT_DONE = VPU_JSM_MSG_GENERAL_CMD_DONE, 642 /** Response to VPU_JSM_MSG_DYNDBG_CONTROL. */ 643 VPU_JSM_MSG_DYNDBG_CONTROL_RSP = 0x2301, 644 /** 645 * Acknowledgment of completion of the save procedure initiated by 646 * VPU_JSM_MSG_PWR_D0I3_ENTER 647 */ 648 VPU_JSM_MSG_PWR_D0I3_ENTER_DONE = 0x2302, 649 }; 650 651 enum vpu_ipc_msg_status { VPU_JSM_MSG_FREE, VPU_JSM_MSG_ALLOCATED }; 652 653 /* 654 * Host <-> LRT IPC message payload definitions 655 */ 656 struct vpu_ipc_msg_payload_engine_reset { 657 /* Engine to be reset. */ 658 u32 engine_idx; 659 /* Reserved */ 660 u32 reserved_0; 661 }; 662 663 struct vpu_ipc_msg_payload_engine_preempt { 664 /* Engine to be preempted. */ 665 u32 engine_idx; 666 /* ID of the preemption request. */ 667 u32 preempt_id; 668 }; 669 670 /* 671 * @brief Register doorbell command structure. 672 * This structure supports doorbell registration for only OS scheduling. 673 * @see VPU_JSM_MSG_REGISTER_DB 674 */ 675 struct vpu_ipc_msg_payload_register_db { 676 /* Index of the doorbell to register. */ 677 u32 db_idx; 678 /* Reserved */ 679 u32 reserved_0; 680 /* Virtual address in Global GTT pointing to the start of job queue. */ 681 u64 jobq_base; 682 /* Size of the job queue in bytes. */ 683 u32 jobq_size; 684 /* Host sub-stream ID for the context assigned to the doorbell. */ 685 u32 host_ssid; 686 }; 687 688 /** 689 * @brief Unregister doorbell command structure. 690 * Request structure to unregister a doorbell for both HW and OS scheduling. 691 * @see VPU_JSM_MSG_UNREGISTER_DB 692 */ 693 struct vpu_ipc_msg_payload_unregister_db { 694 /* Index of the doorbell to unregister. */ 695 u32 db_idx; 696 /* Reserved */ 697 u32 reserved_0; 698 }; 699 700 struct vpu_ipc_msg_payload_query_engine_hb { 701 /* Engine to return heartbeat value. */ 702 u32 engine_idx; 703 /* Reserved */ 704 u32 reserved_0; 705 }; 706 707 struct vpu_ipc_msg_payload_power_level { 708 /** 709 * Requested power level. The power level value is in the 710 * range [0, power_level_count-1] where power_level_count 711 * is the number of available power levels as returned by 712 * the get power level count command. A power level of 0 713 * corresponds to the maximum possible power level, while 714 * power_level_count-1 corresponds to the minimum possible 715 * power level. Values outside of this range are not 716 * considered to be valid. 717 */ 718 u32 power_level; 719 /* Reserved */ 720 u32 reserved_0; 721 }; 722 723 struct vpu_ipc_msg_payload_ssid_release { 724 /* Host sub-stream ID for the context to be released. */ 725 u32 host_ssid; 726 /* Reserved */ 727 u32 reserved_0; 728 }; 729 730 /** 731 * @brief Metric streamer start command structure. 732 * This structure is also used with VPU_JSM_MSG_METRIC_STREAMER_INFO to request metric 733 * groups and metric counters description from the firmware. 734 * @see VPU_JSM_MSG_METRIC_STREAMER_START 735 * @see VPU_JSM_MSG_METRIC_STREAMER_INFO 736 */ 737 struct vpu_jsm_metric_streamer_start { 738 /** 739 * Bitmask to select the desired metric groups. 740 * A metric group can belong only to one metric streamer instance at a time. 741 * Since each metric streamer instance has a unique set of metric groups, it 742 * can also identify a metric streamer instance if more than one instance was 743 * started. If the VPU device does not support multiple metric streamer instances, 744 * then VPU_JSM_MSG_METRIC_STREAMER_START will return an error even if the second 745 * instance has different groups to the first. 746 */ 747 u64 metric_group_mask; 748 /** Sampling rate in nanoseconds. */ 749 u64 sampling_rate; 750 /** 751 * If > 0 the VPU will send a VPU_JSM_MSG_METRIC_STREAMER_NOTIFICATION message 752 * after every @notify_sample_count samples is collected or dropped by the VPU. 753 * If set to UINT_MAX the VPU will only generate a notification when the metric 754 * buffer is full. If set to 0 the VPU will never generate a notification. 755 */ 756 u32 notify_sample_count; 757 u32 reserved_0; 758 /** 759 * Address and size of the buffer where the VPU will write metric data. The 760 * VPU writes all counters from enabled metric groups one after another. If 761 * there is no space left to write data at the next sample period the VPU 762 * will switch to the next buffer (@see next_buffer_addr) and will optionally 763 * send a notification to the host driver if @notify_sample_count is non-zero. 764 * If @next_buffer_addr is NULL the VPU will stop collecting metric data. 765 */ 766 u64 buffer_addr; 767 u64 buffer_size; 768 /** 769 * Address and size of the next buffer to write metric data to after the initial 770 * buffer is full. If the address is NULL the VPU will stop collecting metric 771 * data. 772 */ 773 u64 next_buffer_addr; 774 u64 next_buffer_size; 775 }; 776 777 /** 778 * @brief Metric streamer stop command structure. 779 * @see VPU_JSM_MSG_METRIC_STREAMER_STOP 780 */ 781 struct vpu_jsm_metric_streamer_stop { 782 /** Bitmask to select the desired metric groups. */ 783 u64 metric_group_mask; 784 }; 785 786 /** 787 * Provide VPU FW with buffers to write metric data. 788 * @see VPU_JSM_MSG_METRIC_STREAMER_UPDATE 789 */ 790 struct vpu_jsm_metric_streamer_update { 791 /** Metric group mask that identifies metric streamer instance. */ 792 u64 metric_group_mask; 793 /** 794 * Address and size of the buffer where the VPU will write metric data. If 795 * the buffer address is 0 or same as the currently used buffer the VPU will 796 * continue writing metric data to the current buffer. In this case the 797 * buffer size is ignored and the size of the current buffer is unchanged. 798 * If the address is non-zero and differs from the current buffer address the 799 * VPU will immediately switch data collection to the new buffer. 800 */ 801 u64 buffer_addr; 802 u64 buffer_size; 803 /** 804 * Address and size of the next buffer to write metric data after the initial 805 * buffer is full. If the address is NULL the VPU will stop collecting metric 806 * data but will continue to record dropped samples. 807 * 808 * Note that there is a hazard possible if both buffer_addr and the next_buffer_addr 809 * are non-zero in same update request. It is the host's responsibility to ensure 810 * that both addresses make sense even if the VPU just switched to writing samples 811 * from the current to the next buffer. 812 */ 813 u64 next_buffer_addr; 814 u64 next_buffer_size; 815 }; 816 817 struct vpu_ipc_msg_payload_job_done { 818 /* Engine to which the job was submitted. */ 819 u32 engine_idx; 820 /* Index of the doorbell to which the job was submitted */ 821 u32 db_idx; 822 /* ID of the completed job */ 823 u32 job_id; 824 /* Status of the completed job */ 825 u32 job_status; 826 /* Host SSID */ 827 u32 host_ssid; 828 /* Zero Padding */ 829 u32 reserved_0; 830 /* Command queue id */ 831 u64 cmdq_id; 832 }; 833 834 /* 835 * Notification message upon native fence signalling. 836 * @see VPU_JSM_MSG_NATIVE_FENCE_SIGNALLED 837 */ 838 struct vpu_ipc_msg_payload_native_fence_signalled { 839 /* Engine ID. */ 840 u32 engine_idx; 841 /* Host SSID. */ 842 u32 host_ssid; 843 /* CMDQ ID */ 844 u64 cmdq_id; 845 /* Fence object handle. */ 846 u64 fence_handle; 847 }; 848 849 struct vpu_jsm_engine_reset_context { 850 /* Host SSID */ 851 u32 host_ssid; 852 /* Zero Padding */ 853 u32 reserved_0; 854 /* Command queue id */ 855 u64 cmdq_id; 856 /* See VPU_ENGINE_RESET_CONTEXT_* defines */ 857 u64 flags; 858 }; 859 860 struct vpu_ipc_msg_payload_engine_reset_done { 861 /* Engine ordinal */ 862 u32 engine_idx; 863 /* Number of impacted contexts */ 864 u32 num_impacted_contexts; 865 /* Array of impacted command queue ids and their flags */ 866 struct vpu_jsm_engine_reset_context 867 impacted_contexts[VPU_MAX_ENGINE_RESET_IMPACTED_CONTEXTS]; 868 }; 869 870 struct vpu_ipc_msg_payload_engine_preempt_done { 871 /* Engine preempted. */ 872 u32 engine_idx; 873 /* ID of the preemption request. */ 874 u32 preempt_id; 875 }; 876 877 /** 878 * Response structure for register doorbell command for both OS 879 * and HW scheduling. 880 * @see VPU_JSM_MSG_REGISTER_DB 881 * @see VPU_JSM_MSG_HWS_REGISTER_DB 882 */ 883 struct vpu_ipc_msg_payload_register_db_done { 884 /* Index of the registered doorbell. */ 885 u32 db_idx; 886 /* Reserved */ 887 u32 reserved_0; 888 }; 889 890 /** 891 * Response structure for unregister doorbell command for both OS 892 * and HW scheduling. 893 * @see VPU_JSM_MSG_UNREGISTER_DB 894 */ 895 struct vpu_ipc_msg_payload_unregister_db_done { 896 /* Index of the unregistered doorbell. */ 897 u32 db_idx; 898 /* Reserved */ 899 u32 reserved_0; 900 }; 901 902 struct vpu_ipc_msg_payload_query_engine_hb_done { 903 /* Engine returning heartbeat value. */ 904 u32 engine_idx; 905 /* Reserved */ 906 u32 reserved_0; 907 /* Heartbeat value. */ 908 u64 heartbeat; 909 }; 910 911 struct vpu_ipc_msg_payload_get_power_level_count_done { 912 /** 913 * Number of supported power levels. The maximum possible 914 * value of power_level_count is 16 but this may vary across 915 * implementations. 916 */ 917 u32 power_level_count; 918 /* Reserved */ 919 u32 reserved_0; 920 /** 921 * Power consumption limit for each supported power level in 922 * [0-100%] range relative to power level 0. 923 */ 924 u8 power_limit[16]; 925 }; 926 927 /* HWS priority band setup request / response */ 928 struct vpu_ipc_msg_payload_hws_priority_band_setup { 929 /* 930 * Grace period in 100ns units when preempting another priority band for 931 * this priority band 932 */ 933 u32 grace_period[VPU_HWS_NUM_PRIORITY_BANDS]; 934 /* 935 * Default quantum in 100ns units for scheduling across processes 936 * within a priority band 937 */ 938 u32 process_quantum[VPU_HWS_NUM_PRIORITY_BANDS]; 939 /* 940 * Default grace period in 100ns units for processes that preempt each 941 * other within a priority band 942 */ 943 u32 process_grace_period[VPU_HWS_NUM_PRIORITY_BANDS]; 944 /* 945 * For normal priority band, specifies the target VPU percentage 946 * in situations when it's starved by the focus band. 947 */ 948 u32 normal_band_percentage; 949 /* Reserved */ 950 u32 reserved_0; 951 }; 952 953 /* 954 * @brief HWS create command queue request. 955 * Host will create a command queue via this command. 956 * Note: Cmdq group is a handle of an object which 957 * may contain one or more command queues. 958 * @see VPU_JSM_MSG_CREATE_CMD_QUEUE 959 * @see VPU_JSM_MSG_CREATE_CMD_QUEUE_RSP 960 */ 961 struct vpu_ipc_msg_payload_hws_create_cmdq { 962 /* Process id */ 963 u64 process_id; 964 /* Host SSID */ 965 u32 host_ssid; 966 /* Engine for which queue is being created */ 967 u32 engine_idx; 968 /* Cmdq group: only used for HWS logging of state changes */ 969 u64 cmdq_group; 970 /* Command queue id */ 971 u64 cmdq_id; 972 /* Command queue base */ 973 u64 cmdq_base; 974 /* Command queue size */ 975 u32 cmdq_size; 976 /* Zero padding */ 977 u32 reserved_0; 978 }; 979 980 /* 981 * @brief HWS create command queue response. 982 * @see VPU_JSM_MSG_CREATE_CMD_QUEUE 983 * @see VPU_JSM_MSG_CREATE_CMD_QUEUE_RSP 984 */ 985 struct vpu_ipc_msg_payload_hws_create_cmdq_rsp { 986 /* Process id */ 987 u64 process_id; 988 /* Host SSID */ 989 u32 host_ssid; 990 /* Engine for which queue is being created */ 991 u32 engine_idx; 992 /* Command queue group */ 993 u64 cmdq_group; 994 /* Command queue id */ 995 u64 cmdq_id; 996 }; 997 998 /* HWS destroy command queue request / response */ 999 struct vpu_ipc_msg_payload_hws_destroy_cmdq { 1000 /* Host SSID */ 1001 u32 host_ssid; 1002 /* Zero Padding */ 1003 u32 reserved; 1004 /* Command queue id */ 1005 u64 cmdq_id; 1006 }; 1007 1008 /* HWS set context scheduling properties request / response */ 1009 struct vpu_ipc_msg_payload_hws_set_context_sched_properties { 1010 /* Host SSID */ 1011 u32 host_ssid; 1012 /* Zero Padding */ 1013 u32 reserved_0; 1014 /* Command queue id */ 1015 u64 cmdq_id; 1016 /* 1017 * Priority band to assign to work of this context. 1018 * Available priority bands: @see enum vpu_job_scheduling_priority_band 1019 */ 1020 u32 priority_band; 1021 /* Inside realtime band assigns a further priority */ 1022 u32 realtime_priority_level; 1023 /* Priority relative to other contexts in the same process */ 1024 s32 in_process_priority; 1025 /* Zero padding / Reserved */ 1026 u32 reserved_1; 1027 /* Context quantum relative to other contexts of same priority in the same process */ 1028 u64 context_quantum; 1029 /* Grace period when preempting context of the same priority within the same process */ 1030 u64 grace_period_same_priority; 1031 /* Grace period when preempting context of a lower priority within the same process */ 1032 u64 grace_period_lower_priority; 1033 }; 1034 1035 /* 1036 * @brief Register doorbell command structure. 1037 * This structure supports doorbell registration for both HW and OS scheduling. 1038 * Note: Queue base and size are added here so that the same structure can be used for 1039 * OS scheduling and HW scheduling. For OS scheduling, cmdq_id will be ignored 1040 * and cmdq_base and cmdq_size will be used. For HW scheduling, cmdq_base and cmdq_size will be 1041 * ignored and cmdq_id is used. 1042 * @see VPU_JSM_MSG_HWS_REGISTER_DB 1043 */ 1044 struct vpu_jsm_hws_register_db { 1045 /* Index of the doorbell to register. */ 1046 u32 db_id; 1047 /* Host sub-stream ID for the context assigned to the doorbell. */ 1048 u32 host_ssid; 1049 /* ID of the command queue associated with the doorbell. */ 1050 u64 cmdq_id; 1051 /* Virtual address pointing to the start of command queue. */ 1052 u64 cmdq_base; 1053 /* Size of the command queue in bytes. */ 1054 u64 cmdq_size; 1055 }; 1056 1057 /* 1058 * @brief Structure to set another buffer to be used for scheduling-related logging. 1059 * The size of the logging buffer and the number of entries is defined as part of the 1060 * buffer itself as described next. 1061 * The log buffer received from the host is made up of; 1062 * - header: 32 bytes in size, as shown in 'struct vpu_hws_log_buffer_header'. 1063 * The header contains the number of log entries in the buffer. 1064 * - log entry: 0 to n-1, each log entry is 32 bytes in size, as shown in 1065 * 'struct vpu_hws_log_buffer_entry'. 1066 * The entry contains the VPU timestamp, operation type and data. 1067 * The host should provide the notify index value of log buffer to VPU. This is a 1068 * value defined within the log buffer and when written to will generate the 1069 * scheduling log notification. 1070 * The host should set engine_idx and vpu_log_buffer_va to 0 to disable logging 1071 * for a particular engine. 1072 * VPU will handle one log buffer for each of supported engines. 1073 * VPU should allow the logging to consume one host_ssid. 1074 * @see VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG 1075 * @see VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG_RSP 1076 * @see VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION 1077 */ 1078 struct vpu_ipc_msg_payload_hws_set_scheduling_log { 1079 /* Engine ordinal */ 1080 u32 engine_idx; 1081 /* Host SSID */ 1082 u32 host_ssid; 1083 /* 1084 * VPU log buffer virtual address. 1085 * Set to 0 to disable logging for this engine. 1086 */ 1087 u64 vpu_log_buffer_va; 1088 /* 1089 * Notify index of log buffer. VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION 1090 * is generated when an event log is written to this index. 1091 */ 1092 u64 notify_index; 1093 /* 1094 * Field is now deprecated, will be removed when KMD is updated to support removal 1095 */ 1096 u32 enable_extra_events; 1097 /* Zero Padding */ 1098 u32 reserved_0; 1099 }; 1100 1101 /* 1102 * @brief The scheduling log notification is generated by VPU when it writes 1103 * an event into the log buffer at the notify_index. VPU notifies host with 1104 * VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION. This is an asynchronous 1105 * message from VPU to host. 1106 * @see VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION 1107 * @see VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG 1108 */ 1109 struct vpu_ipc_msg_payload_hws_scheduling_log_notification { 1110 /* Engine ordinal */ 1111 u32 engine_idx; 1112 /* Zero Padding */ 1113 u32 reserved_0; 1114 }; 1115 1116 /* 1117 * @brief HWS suspend command queue request and done structure. 1118 * Host will request the suspend of contexts and VPU will; 1119 * - Suspend all work on this context 1120 * - Preempt any running work 1121 * - Asynchronously perform the above and return success immediately once 1122 * all items above are started successfully 1123 * - Notify the host of completion of these operations via 1124 * VPU_JSM_MSG_HWS_SUSPEND_CMDQ_DONE 1125 * - Reject any other context operations on a context with an in-flight 1126 * suspend request running 1127 * Same structure used when VPU notifies host of completion of a context suspend 1128 * request. The ids and suspend fence value reported in this command will match 1129 * the one in the request from the host to suspend the context. Once suspend is 1130 * complete, VPU will not access any data relating to this command queue until 1131 * it is resumed. 1132 * @see VPU_JSM_MSG_HWS_SUSPEND_CMDQ 1133 * @see VPU_JSM_MSG_HWS_SUSPEND_CMDQ_DONE 1134 */ 1135 struct vpu_ipc_msg_payload_hws_suspend_cmdq { 1136 /* Host SSID */ 1137 u32 host_ssid; 1138 /* Zero Padding */ 1139 u32 reserved_0; 1140 /* Command queue id */ 1141 u64 cmdq_id; 1142 /* 1143 * Suspend fence value - reported by the VPU suspend context 1144 * completed once suspend is complete. 1145 */ 1146 u64 suspend_fence_value; 1147 }; 1148 1149 /* 1150 * @brief HWS Resume command queue request / response structure. 1151 * Host will request the resume of a context; 1152 * - VPU will resume all work on this context 1153 * - Scheduler will allow this context to be scheduled 1154 * @see VPU_JSM_MSG_HWS_RESUME_CMDQ 1155 * @see VPU_JSM_MSG_HWS_RESUME_CMDQ_RSP 1156 */ 1157 struct vpu_ipc_msg_payload_hws_resume_cmdq { 1158 /* Host SSID */ 1159 u32 host_ssid; 1160 /* Zero Padding */ 1161 u32 reserved_0; 1162 /* Command queue id */ 1163 u64 cmdq_id; 1164 }; 1165 1166 /* 1167 * @brief HWS Resume engine request / response structure. 1168 * After a HWS engine reset, all scheduling is stopped on VPU until a engine resume. 1169 * Host shall send this command to resume scheduling of any valid queue. 1170 * @see VPU_JSM_MSG_HWS_RESUME_ENGINE 1171 * @see VPU_JSM_MSG_HWS_RESUME_ENGINE_DONE 1172 */ 1173 struct vpu_ipc_msg_payload_hws_resume_engine { 1174 /* Engine to be resumed */ 1175 u32 engine_idx; 1176 /* Reserved */ 1177 u32 reserved_0; 1178 }; 1179 1180 /** 1181 * Payload for VPU_JSM_MSG_TRACE_SET_CONFIG[_RSP] and 1182 * VPU_JSM_MSG_TRACE_GET_CONFIG_RSP messages. 1183 * 1184 * The payload is interpreted differently depending on the type of message: 1185 * 1186 * - For VPU_JSM_MSG_TRACE_SET_CONFIG, the payload specifies the desired 1187 * logging configuration to be set. 1188 * 1189 * - For VPU_JSM_MSG_TRACE_SET_CONFIG_RSP, the payload reports the logging 1190 * configuration that was set after a VPU_JSM_MSG_TRACE_SET_CONFIG request. 1191 * The host can compare this payload with the one it sent in the 1192 * VPU_JSM_MSG_TRACE_SET_CONFIG request to check whether or not the 1193 * configuration was set as desired. 1194 * 1195 * - VPU_JSM_MSG_TRACE_GET_CONFIG_RSP, the payload reports the current logging 1196 * configuration. 1197 */ 1198 struct vpu_ipc_msg_payload_trace_config { 1199 /** 1200 * Logging level (currently set or to be set); see 'mvLog_t' enum for 1201 * acceptable values. The specified logging level applies to all 1202 * destinations and HW components 1203 */ 1204 u32 trace_level; 1205 /** 1206 * Bitmask of logging destinations (currently enabled or to be enabled); 1207 * bitwise OR of values defined in logging_destination enum. 1208 */ 1209 u32 trace_destination_mask; 1210 /** 1211 * Bitmask of loggable HW components (currently enabled or to be enabled); 1212 * bitwise OR of values defined in loggable_hw_component enum. 1213 */ 1214 u64 trace_hw_component_mask; 1215 u64 reserved_0; /**< Reserved for future extensions. */ 1216 }; 1217 1218 /** 1219 * Payload for VPU_JSM_MSG_TRACE_GET_CAPABILITY_RSP messages. 1220 */ 1221 struct vpu_ipc_msg_payload_trace_capability_rsp { 1222 u32 trace_destination_mask; /**< Bitmask of supported logging destinations. */ 1223 u32 reserved_0; 1224 u64 trace_hw_component_mask; /**< Bitmask of supported loggable HW components. */ 1225 u64 reserved_1; /**< Reserved for future extensions. */ 1226 }; 1227 1228 /** 1229 * Payload for VPU_JSM_MSG_TRACE_GET_NAME requests. 1230 */ 1231 struct vpu_ipc_msg_payload_trace_get_name { 1232 /** 1233 * The type of the entity to query name for; see logging_entity_type for 1234 * possible values. 1235 */ 1236 u32 entity_type; 1237 u32 reserved_0; 1238 /** 1239 * The ID of the entity to query name for; possible values depends on the 1240 * entity type. 1241 */ 1242 u64 entity_id; 1243 }; 1244 1245 /** 1246 * Payload for VPU_JSM_MSG_TRACE_GET_NAME_RSP responses. 1247 */ 1248 struct vpu_ipc_msg_payload_trace_get_name_rsp { 1249 /** 1250 * The type of the entity whose name was queried; see logging_entity_type 1251 * for possible values. 1252 */ 1253 u32 entity_type; 1254 u32 reserved_0; 1255 /** 1256 * The ID of the entity whose name was queried; possible values depends on 1257 * the entity type. 1258 */ 1259 u64 entity_id; 1260 /** Reserved for future extensions. */ 1261 u64 reserved_1; 1262 /** The name of the entity. */ 1263 char entity_name[VPU_TRACE_ENTITY_NAME_MAX_LEN]; 1264 }; 1265 1266 /** 1267 * Data sent from the VPU to the host in all metric streamer response messages 1268 * and in asynchronous notification. 1269 * @see VPU_JSM_MSG_METRIC_STREAMER_START_DONE 1270 * @see VPU_JSM_MSG_METRIC_STREAMER_STOP_DONE 1271 * @see VPU_JSM_MSG_METRIC_STREAMER_UPDATE_DONE 1272 * @see VPU_JSM_MSG_METRIC_STREAMER_INFO_DONE 1273 * @see VPU_JSM_MSG_METRIC_STREAMER_NOTIFICATION 1274 */ 1275 struct vpu_jsm_metric_streamer_done { 1276 /** Metric group mask that identifies metric streamer instance. */ 1277 u64 metric_group_mask; 1278 /** 1279 * Size in bytes of single sample - total size of all enabled counters. 1280 * Some VPU implementations may align sample_size to more than 8 bytes. 1281 */ 1282 u32 sample_size; 1283 u32 reserved_0; 1284 /** 1285 * Number of samples collected since the metric streamer was started. 1286 * This will be 0 if the metric streamer was not started. 1287 */ 1288 u32 samples_collected; 1289 /** 1290 * Number of samples dropped since the metric streamer was started. This 1291 * is incremented every time the metric streamer is not able to write 1292 * collected samples because the current buffer is full and there is no 1293 * next buffer to switch to. 1294 */ 1295 u32 samples_dropped; 1296 /** Address of the buffer that contains the latest metric data. */ 1297 u64 buffer_addr; 1298 /** 1299 * Number of bytes written into the metric data buffer. In response to the 1300 * VPU_JSM_MSG_METRIC_STREAMER_INFO request this field contains the size of 1301 * all group and counter descriptors. The size is updated even if the buffer 1302 * in the request was NULL or too small to hold descriptors of all counters 1303 */ 1304 u64 bytes_written; 1305 }; 1306 1307 /** 1308 * Metric group description placed in the metric buffer after successful completion 1309 * of the VPU_JSM_MSG_METRIC_STREAMER_INFO command. This is followed by one or more 1310 * @vpu_jsm_metric_counter_descriptor records. 1311 * @see VPU_JSM_MSG_METRIC_STREAMER_INFO 1312 */ 1313 struct vpu_jsm_metric_group_descriptor { 1314 /** 1315 * Offset to the next metric group (8-byte aligned). If this offset is 0 this 1316 * is the last descriptor. The value of metric_info_size must be greater than 1317 * or equal to sizeof(struct vpu_jsm_metric_group_descriptor) + name_string_size 1318 * + description_string_size and must be 8-byte aligned. 1319 */ 1320 u32 next_metric_group_info_offset; 1321 /** 1322 * Offset to the first metric counter description record (8-byte aligned). 1323 * @see vpu_jsm_metric_counter_descriptor 1324 */ 1325 u32 next_metric_counter_info_offset; 1326 /** Index of the group. This corresponds to bit index in metric_group_mask. */ 1327 u32 group_id; 1328 /** Number of counters in the metric group. */ 1329 u32 num_counters; 1330 /** Data size for all counters, must be a multiple of 8 bytes.*/ 1331 u32 metric_group_data_size; 1332 /** 1333 * Metric group domain number. Cannot use multiple, simultaneous metric groups 1334 * from the same domain. 1335 */ 1336 u32 domain; 1337 /** 1338 * Counter name string size. The string must include a null termination character. 1339 * The FW may use a fixed size name or send a different name for each counter. 1340 * If the VPU uses fixed size strings, all characters from the end of the name 1341 * to the of the fixed size character array must be zeroed. 1342 */ 1343 u32 name_string_size; 1344 /** Counter description string size, @see name_string_size */ 1345 u32 description_string_size; 1346 u64 reserved_0; 1347 /** 1348 * Right after this structure, the VPU writes name and description of 1349 * the metric group. 1350 */ 1351 }; 1352 1353 /** 1354 * Metric counter description, placed in the buffer after vpu_jsm_metric_group_descriptor. 1355 * @see VPU_JSM_MSG_METRIC_STREAMER_INFO 1356 */ 1357 struct vpu_jsm_metric_counter_descriptor { 1358 /** 1359 * Offset to the next counter in a group (8-byte aligned). If this offset is 1360 * 0 this is the last counter in the group. 1361 */ 1362 u32 next_metric_counter_info_offset; 1363 /** 1364 * Offset to the counter data from the start of samples in this metric group. 1365 * Note that metric_data_offset % metric_data_size must be 0. 1366 */ 1367 u32 metric_data_offset; 1368 /** Size of the metric counter data in bytes. */ 1369 u32 metric_data_size; 1370 /** Metric type, see Level Zero API for definitions. */ 1371 u32 tier; 1372 /** Metric type, see set_metric_type_t for definitions. */ 1373 u32 metric_type; 1374 /** Metric type, see set_value_type_t for definitions. */ 1375 u32 metric_value_type; 1376 /** 1377 * Counter name string size. The string must include a null termination character. 1378 * The FW may use a fixed size name or send a different name for each counter. 1379 * If the VPU uses fixed size strings, all characters from the end of the name 1380 * to the of the fixed size character array must be zeroed. 1381 */ 1382 u32 name_string_size; 1383 /** Counter description string size, @see name_string_size */ 1384 u32 description_string_size; 1385 /** Counter component name string size, @see name_string_size */ 1386 u32 component_string_size; 1387 /** Counter string size, @see name_string_size */ 1388 u32 units_string_size; 1389 u64 reserved_0; 1390 /** 1391 * Right after this structure, the VPU writes name, description 1392 * component and unit strings. 1393 */ 1394 }; 1395 1396 /** 1397 * Payload for VPU_JSM_MSG_DYNDBG_CONTROL requests. 1398 * 1399 * VPU_JSM_MSG_DYNDBG_CONTROL are used to control the VPU FW Dynamic Debug 1400 * feature, which allows developers to selectively enable / disable MVLOG_DEBUG 1401 * messages. This is equivalent to the Dynamic Debug functionality provided by 1402 * Linux 1403 * (https://www.kernel.org/doc/html/latest/admin-guide/dynamic-debug-howto.html) 1404 * The host can control Dynamic Debug behavior by sending dyndbg commands, which 1405 * have the same syntax as Linux 1406 * dyndbg commands. 1407 * 1408 * NOTE: in order for MVLOG_DEBUG messages to be actually printed, the host 1409 * still has to set the logging level to MVLOG_DEBUG, using the 1410 * VPU_JSM_MSG_TRACE_SET_CONFIG command. 1411 * 1412 * The host can see the current dynamic debug configuration by executing a 1413 * special 'show' command. The dyndbg configuration will be printed to the 1414 * configured logging destination using MVLOG_INFO logging level. 1415 */ 1416 struct vpu_ipc_msg_payload_dyndbg_control { 1417 /** 1418 * Dyndbg command (same format as Linux dyndbg); must be a NULL-terminated 1419 * string. 1420 */ 1421 char dyndbg_cmd[VPU_DYNDBG_CMD_MAX_LEN]; 1422 }; 1423 1424 /** 1425 * Payload for VPU_JSM_MSG_PWR_D0I3_ENTER 1426 * 1427 * This is a bi-directional payload. 1428 */ 1429 struct vpu_ipc_msg_payload_pwr_d0i3_enter { 1430 /** 1431 * 0: VPU_JSM_MSG_PWR_D0I3_ENTER_DONE is not sent to the host driver 1432 * The driver will poll for D0i2 Idle state transitions. 1433 * 1: VPU_JSM_MSG_PWR_D0I3_ENTER_DONE is sent after VPU state save is complete 1434 */ 1435 u32 send_response; 1436 u32 reserved_0; 1437 }; 1438 1439 /** 1440 * Payload for VPU_JSM_MSG_DCT_ENABLE message. 1441 * 1442 * Default values for DCT active/inactive times are 5.3ms and 30ms respectively, 1443 * corresponding to a 85% duty cycle. This payload allows the host to tune these 1444 * values according to application requirements. 1445 */ 1446 struct vpu_ipc_msg_payload_pwr_dct_control { 1447 /** Duty cycle active time in microseconds */ 1448 u32 dct_active_us; 1449 /** Duty cycle inactive time in microseconds */ 1450 u32 dct_inactive_us; 1451 }; 1452 1453 /* 1454 * Payloads union, used to define complete message format. 1455 */ 1456 union vpu_ipc_msg_payload { 1457 struct vpu_ipc_msg_payload_engine_reset engine_reset; 1458 struct vpu_ipc_msg_payload_engine_preempt engine_preempt; 1459 struct vpu_ipc_msg_payload_register_db register_db; 1460 struct vpu_ipc_msg_payload_unregister_db unregister_db; 1461 struct vpu_ipc_msg_payload_query_engine_hb query_engine_hb; 1462 struct vpu_ipc_msg_payload_power_level power_level; 1463 struct vpu_jsm_metric_streamer_start metric_streamer_start; 1464 struct vpu_jsm_metric_streamer_stop metric_streamer_stop; 1465 struct vpu_jsm_metric_streamer_update metric_streamer_update; 1466 struct vpu_ipc_msg_payload_ssid_release ssid_release; 1467 struct vpu_jsm_hws_register_db hws_register_db; 1468 struct vpu_ipc_msg_payload_job_done job_done; 1469 struct vpu_ipc_msg_payload_native_fence_signalled native_fence_signalled; 1470 struct vpu_ipc_msg_payload_engine_reset_done engine_reset_done; 1471 struct vpu_ipc_msg_payload_engine_preempt_done engine_preempt_done; 1472 struct vpu_ipc_msg_payload_register_db_done register_db_done; 1473 struct vpu_ipc_msg_payload_unregister_db_done unregister_db_done; 1474 struct vpu_ipc_msg_payload_query_engine_hb_done query_engine_hb_done; 1475 struct vpu_ipc_msg_payload_get_power_level_count_done get_power_level_count_done; 1476 struct vpu_jsm_metric_streamer_done metric_streamer_done; 1477 struct vpu_ipc_msg_payload_trace_config trace_config; 1478 struct vpu_ipc_msg_payload_trace_capability_rsp trace_capability; 1479 struct vpu_ipc_msg_payload_trace_get_name trace_get_name; 1480 struct vpu_ipc_msg_payload_trace_get_name_rsp trace_get_name_rsp; 1481 struct vpu_ipc_msg_payload_dyndbg_control dyndbg_control; 1482 struct vpu_ipc_msg_payload_hws_priority_band_setup hws_priority_band_setup; 1483 struct vpu_ipc_msg_payload_hws_create_cmdq hws_create_cmdq; 1484 struct vpu_ipc_msg_payload_hws_create_cmdq_rsp hws_create_cmdq_rsp; 1485 struct vpu_ipc_msg_payload_hws_destroy_cmdq hws_destroy_cmdq; 1486 struct vpu_ipc_msg_payload_hws_set_context_sched_properties 1487 hws_set_context_sched_properties; 1488 struct vpu_ipc_msg_payload_hws_set_scheduling_log hws_set_scheduling_log; 1489 struct vpu_ipc_msg_payload_hws_scheduling_log_notification hws_scheduling_log_notification; 1490 struct vpu_ipc_msg_payload_hws_suspend_cmdq hws_suspend_cmdq; 1491 struct vpu_ipc_msg_payload_hws_resume_cmdq hws_resume_cmdq; 1492 struct vpu_ipc_msg_payload_hws_resume_engine hws_resume_engine; 1493 struct vpu_ipc_msg_payload_pwr_d0i3_enter pwr_d0i3_enter; 1494 struct vpu_ipc_msg_payload_pwr_dct_control pwr_dct_control; 1495 }; 1496 1497 /* 1498 * Host <-> LRT IPC message base structure. 1499 * 1500 * NOTE: All instances of this object must be aligned on a 64B boundary 1501 * to allow proper handling of VPU cache operations. 1502 */ 1503 struct vpu_jsm_msg { 1504 /* Reserved */ 1505 u64 reserved_0; 1506 /* Message type, see vpu_ipc_msg_type enum. */ 1507 u32 type; 1508 /* Buffer status, see vpu_ipc_msg_status enum. */ 1509 u32 status; 1510 /* 1511 * Request ID, provided by the host in a request message and passed 1512 * back by VPU in the response message. 1513 */ 1514 u32 request_id; 1515 /* Request return code set by the VPU, see VPU_JSM_STATUS_* defines. */ 1516 u32 result; 1517 u64 reserved_1; 1518 /* Message payload depending on message type, see vpu_ipc_msg_payload union. */ 1519 union vpu_ipc_msg_payload payload; 1520 }; 1521 1522 #pragma pack(pop) 1523 1524 #endif 1525 1526 ///@} 1527