1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright (C) 2020-2023 Intel Corporation 4 */ 5 6 /** 7 * @file 8 * @brief JSM shared definitions 9 * 10 * @ingroup Jsm 11 * @brief JSM shared definitions 12 * @{ 13 */ 14 #ifndef VPU_JSM_API_H 15 #define VPU_JSM_API_H 16 17 /* 18 * Major version changes that break backward compatibility 19 */ 20 #define VPU_JSM_API_VER_MAJOR 3 21 22 /* 23 * Minor version changes when API backward compatibility is preserved. 24 */ 25 #define VPU_JSM_API_VER_MINOR 15 26 27 /* 28 * API header changed (field names, documentation, formatting) but API itself has not been changed 29 */ 30 #define VPU_JSM_API_VER_PATCH 0 31 32 /* 33 * Index in the API version table 34 */ 35 #define VPU_JSM_API_VER_INDEX 4 36 37 /* 38 * Number of Priority Bands for Hardware Scheduling 39 * Bands: RealTime, Focus, Normal, Idle 40 */ 41 #define VPU_HWS_NUM_PRIORITY_BANDS 4 42 43 /* Max number of impacted contexts that can be dealt with the engine reset command */ 44 #define VPU_MAX_ENGINE_RESET_IMPACTED_CONTEXTS 3 45 46 /** Pack the API structures for now, once alignment issues are fixed this can be removed */ 47 #pragma pack(push, 1) 48 49 /* 50 * Engine indexes. 51 */ 52 #define VPU_ENGINE_COMPUTE 0 53 #define VPU_ENGINE_COPY 1 54 #define VPU_ENGINE_NB 2 55 56 /* 57 * VPU status values. 58 */ 59 #define VPU_JSM_STATUS_SUCCESS 0x0U 60 #define VPU_JSM_STATUS_PARSING_ERR 0x1U 61 #define VPU_JSM_STATUS_PROCESSING_ERR 0x2U 62 #define VPU_JSM_STATUS_PREEMPTED 0x3U 63 #define VPU_JSM_STATUS_ABORTED 0x4U 64 #define VPU_JSM_STATUS_USER_CTX_VIOL_ERR 0x5U 65 #define VPU_JSM_STATUS_GLOBAL_CTX_VIOL_ERR 0x6U 66 #define VPU_JSM_STATUS_MVNCI_WRONG_INPUT_FORMAT 0x7U 67 #define VPU_JSM_STATUS_MVNCI_UNSUPPORTED_NETWORK_ELEMENT 0x8U 68 #define VPU_JSM_STATUS_MVNCI_INVALID_HANDLE 0x9U 69 #define VPU_JSM_STATUS_MVNCI_OUT_OF_RESOURCES 0xAU 70 #define VPU_JSM_STATUS_MVNCI_NOT_IMPLEMENTED 0xBU 71 #define VPU_JSM_STATUS_MVNCI_INTERNAL_ERROR 0xCU 72 /* Job status returned when the job was preempted mid-inference */ 73 #define VPU_JSM_STATUS_PREEMPTED_MID_INFERENCE 0xDU 74 75 /* 76 * Host <-> VPU IPC channels. 77 * ASYNC commands use a high priority channel, other messages use low-priority ones. 78 */ 79 #define VPU_IPC_CHAN_ASYNC_CMD 0 80 #define VPU_IPC_CHAN_GEN_CMD 10 81 #define VPU_IPC_CHAN_JOB_RET 11 82 83 /* 84 * Job flags bit masks. 85 */ 86 #define VPU_JOB_FLAGS_NULL_SUBMISSION_MASK 0x00000001 87 #define VPU_JOB_FLAGS_PRIVATE_DATA_MASK 0xFF000000 88 89 /* 90 * Sizes of the reserved areas in jobs, in bytes. 91 */ 92 #define VPU_JOB_RESERVED_BYTES 8 93 94 /* 95 * Sizes of the reserved areas in job queues, in bytes. 96 */ 97 #define VPU_JOB_QUEUE_RESERVED_BYTES 52 98 99 /* 100 * Max length (including trailing NULL char) of trace entity name (e.g., the 101 * name of a logging destination or a loggable HW component). 102 */ 103 #define VPU_TRACE_ENTITY_NAME_MAX_LEN 32 104 105 /* 106 * Max length (including trailing NULL char) of a dyndbg command. 107 * 108 * NOTE: 96 is used so that the size of 'struct vpu_ipc_msg' in the JSM API is 109 * 128 bytes (multiple of 64 bytes, the cache line size). 110 */ 111 #define VPU_DYNDBG_CMD_MAX_LEN 96 112 113 /* 114 * For HWS command queue scheduling, we can prioritise command queues inside the 115 * same process with a relative in-process priority. Valid values for relative 116 * priority are given below - max and min. 117 */ 118 #define VPU_HWS_COMMAND_QUEUE_MAX_IN_PROCESS_PRIORITY 7 119 #define VPU_HWS_COMMAND_QUEUE_MIN_IN_PROCESS_PRIORITY -7 120 121 /* 122 * For HWS priority scheduling, we can have multiple realtime priority bands. 123 * They are numbered 0 to a MAX. 124 */ 125 #define VPU_HWS_MAX_REALTIME_PRIORITY_LEVEL 31U 126 127 /* 128 * Job format. 129 */ 130 struct vpu_job_queue_entry { 131 u64 batch_buf_addr; /**< Address of VPU commands batch buffer */ 132 u32 job_id; /**< Job ID */ 133 u32 flags; /**< Flags bit field, see VPU_JOB_FLAGS_* above */ 134 u64 root_page_table_addr; /**< Address of root page table to use for this job */ 135 u64 root_page_table_update_counter; /**< Page tables update events counter */ 136 u64 primary_preempt_buf_addr; 137 /**< Address of the primary preemption buffer to use for this job */ 138 u32 primary_preempt_buf_size; 139 /**< Size of the primary preemption buffer to use for this job */ 140 u32 secondary_preempt_buf_size; 141 /**< Size of secondary preemption buffer to use for this job */ 142 u64 secondary_preempt_buf_addr; 143 /**< Address of secondary preemption buffer to use for this job */ 144 u8 reserved_0[VPU_JOB_RESERVED_BYTES]; 145 }; 146 147 /* 148 * Job queue control registers. 149 */ 150 struct vpu_job_queue_header { 151 u32 engine_idx; 152 u32 head; 153 u32 tail; 154 u8 reserved_0[VPU_JOB_QUEUE_RESERVED_BYTES]; 155 }; 156 157 /* 158 * Job queue format. 159 */ 160 struct vpu_job_queue { 161 struct vpu_job_queue_header header; 162 struct vpu_job_queue_entry job[]; 163 }; 164 165 /** 166 * Logging entity types. 167 * 168 * This enum defines the different types of entities involved in logging. 169 */ 170 enum vpu_trace_entity_type { 171 /** Logging destination (entity where logs can be stored / printed). */ 172 VPU_TRACE_ENTITY_TYPE_DESTINATION = 1, 173 /** Loggable HW component (HW entity that can be logged). */ 174 VPU_TRACE_ENTITY_TYPE_HW_COMPONENT = 2, 175 }; 176 177 /* 178 * HWS specific log buffer header details. 179 * Total size is 32 bytes. 180 */ 181 struct vpu_hws_log_buffer_header { 182 /* Written by VPU after adding a log entry. Initialised by host to 0. */ 183 u32 first_free_entry_index; 184 /* Incremented by VPU every time the VPU overwrites the 0th entry; 185 * initialised by host to 0. 186 */ 187 u32 wraparound_count; 188 /* 189 * This is the number of buffers that can be stored in the log buffer provided by the host. 190 * It is written by host before passing buffer to VPU. VPU should consider it read-only. 191 */ 192 u64 num_of_entries; 193 u64 reserved[2]; 194 }; 195 196 /* 197 * HWS specific log buffer entry details. 198 * Total size is 32 bytes. 199 */ 200 struct vpu_hws_log_buffer_entry { 201 /* VPU timestamp must be an invariant timer tick (not impacted by DVFS) */ 202 u64 vpu_timestamp; 203 /* 204 * Operation type: 205 * 0 - context state change 206 * 1 - queue new work 207 * 2 - queue unwait sync object 208 * 3 - queue no more work 209 * 4 - queue wait sync object 210 */ 211 u32 operation_type; 212 u32 reserved; 213 /* Operation data depends on operation type */ 214 u64 operation_data[2]; 215 }; 216 217 /* 218 * Host <-> VPU IPC messages types. 219 */ 220 enum vpu_ipc_msg_type { 221 VPU_JSM_MSG_UNKNOWN = 0xFFFFFFFF, 222 /* IPC Host -> Device, Async commands */ 223 VPU_JSM_MSG_ASYNC_CMD = 0x1100, 224 VPU_JSM_MSG_ENGINE_RESET = VPU_JSM_MSG_ASYNC_CMD, 225 VPU_JSM_MSG_ENGINE_PREEMPT = 0x1101, 226 VPU_JSM_MSG_REGISTER_DB = 0x1102, 227 VPU_JSM_MSG_UNREGISTER_DB = 0x1103, 228 VPU_JSM_MSG_QUERY_ENGINE_HB = 0x1104, 229 VPU_JSM_MSG_GET_POWER_LEVEL_COUNT = 0x1105, 230 VPU_JSM_MSG_GET_POWER_LEVEL = 0x1106, 231 VPU_JSM_MSG_SET_POWER_LEVEL = 0x1107, 232 /* @deprecated */ 233 VPU_JSM_MSG_METRIC_STREAMER_OPEN = 0x1108, 234 /* @deprecated */ 235 VPU_JSM_MSG_METRIC_STREAMER_CLOSE = 0x1109, 236 /** Configure logging (used to modify configuration passed in boot params). */ 237 VPU_JSM_MSG_TRACE_SET_CONFIG = 0x110a, 238 /** Return current logging configuration. */ 239 VPU_JSM_MSG_TRACE_GET_CONFIG = 0x110b, 240 /** 241 * Get masks of destinations and HW components supported by the firmware 242 * (may vary between HW generations and FW compile 243 * time configurations) 244 */ 245 VPU_JSM_MSG_TRACE_GET_CAPABILITY = 0x110c, 246 /** Get the name of a destination or HW component. */ 247 VPU_JSM_MSG_TRACE_GET_NAME = 0x110d, 248 /** 249 * Release resource associated with host ssid . All jobs that belong to the host_ssid 250 * aborted and removed from internal scheduling queues. All doorbells assigned 251 * to the host_ssid are unregistered and any internal FW resources belonging to 252 * the host_ssid are released. 253 */ 254 VPU_JSM_MSG_SSID_RELEASE = 0x110e, 255 /** 256 * Start collecting metric data. 257 * @see vpu_jsm_metric_streamer_start 258 */ 259 VPU_JSM_MSG_METRIC_STREAMER_START = 0x110f, 260 /** 261 * Stop collecting metric data. This command will return success if it is called 262 * for a metric stream that has already been stopped or was never started. 263 * @see vpu_jsm_metric_streamer_stop 264 */ 265 VPU_JSM_MSG_METRIC_STREAMER_STOP = 0x1110, 266 /** 267 * Update current and next buffer for metric data collection. This command can 268 * also be used to request information about the number of collected samples 269 * and the amount of data written to the buffer. 270 * @see vpu_jsm_metric_streamer_update 271 */ 272 VPU_JSM_MSG_METRIC_STREAMER_UPDATE = 0x1111, 273 /** 274 * Request description of selected metric groups and metric counters within 275 * each group. The VPU will write the description of groups and counters to 276 * the buffer specified in the command structure. 277 * @see vpu_jsm_metric_streamer_start 278 */ 279 VPU_JSM_MSG_METRIC_STREAMER_INFO = 0x1112, 280 /** Control command: Priority band setup */ 281 VPU_JSM_MSG_SET_PRIORITY_BAND_SETUP = 0x1113, 282 /** Control command: Create command queue */ 283 VPU_JSM_MSG_CREATE_CMD_QUEUE = 0x1114, 284 /** Control command: Destroy command queue */ 285 VPU_JSM_MSG_DESTROY_CMD_QUEUE = 0x1115, 286 /** Control command: Set context scheduling properties */ 287 VPU_JSM_MSG_SET_CONTEXT_SCHED_PROPERTIES = 0x1116, 288 /* 289 * Register a doorbell to notify VPU of new work. The doorbell may later be 290 * deallocated or reassigned to another context. 291 */ 292 VPU_JSM_MSG_HWS_REGISTER_DB = 0x1117, 293 /** Control command: Log buffer setting */ 294 VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG = 0x1118, 295 /* Control command: Suspend command queue. */ 296 VPU_JSM_MSG_HWS_SUSPEND_CMDQ = 0x1119, 297 /* Control command: Resume command queue */ 298 VPU_JSM_MSG_HWS_RESUME_CMDQ = 0x111a, 299 /* Control command: Resume engine after reset */ 300 VPU_JSM_MSG_HWS_ENGINE_RESUME = 0x111b, 301 /* Control command: Enable survivability/DCT mode */ 302 VPU_JSM_MSG_DCT_ENABLE = 0x111c, 303 /* Control command: Disable survivability/DCT mode */ 304 VPU_JSM_MSG_DCT_DISABLE = 0x111d, 305 /** 306 * Dump VPU state. To be used for debug purposes only. 307 * NOTE: Please introduce new ASYNC commands before this one. * 308 */ 309 VPU_JSM_MSG_STATE_DUMP = 0x11FF, 310 /* IPC Host -> Device, General commands */ 311 VPU_JSM_MSG_GENERAL_CMD = 0x1200, 312 VPU_JSM_MSG_BLOB_DEINIT = VPU_JSM_MSG_GENERAL_CMD, 313 /** 314 * Control dyndbg behavior by executing a dyndbg command; equivalent to 315 * Linux command: `echo '<dyndbg_cmd>' > <debugfs>/dynamic_debug/control`. 316 */ 317 VPU_JSM_MSG_DYNDBG_CONTROL = 0x1201, 318 /** 319 * Perform the save procedure for the D0i3 entry 320 */ 321 VPU_JSM_MSG_PWR_D0I3_ENTER = 0x1202, 322 /* IPC Device -> Host, Job completion */ 323 VPU_JSM_MSG_JOB_DONE = 0x2100, 324 /* IPC Device -> Host, Async command completion */ 325 VPU_JSM_MSG_ASYNC_CMD_DONE = 0x2200, 326 VPU_JSM_MSG_ENGINE_RESET_DONE = VPU_JSM_MSG_ASYNC_CMD_DONE, 327 VPU_JSM_MSG_ENGINE_PREEMPT_DONE = 0x2201, 328 VPU_JSM_MSG_REGISTER_DB_DONE = 0x2202, 329 VPU_JSM_MSG_UNREGISTER_DB_DONE = 0x2203, 330 VPU_JSM_MSG_QUERY_ENGINE_HB_DONE = 0x2204, 331 VPU_JSM_MSG_GET_POWER_LEVEL_COUNT_DONE = 0x2205, 332 VPU_JSM_MSG_GET_POWER_LEVEL_DONE = 0x2206, 333 VPU_JSM_MSG_SET_POWER_LEVEL_DONE = 0x2207, 334 /* @deprecated */ 335 VPU_JSM_MSG_METRIC_STREAMER_OPEN_DONE = 0x2208, 336 /* @deprecated */ 337 VPU_JSM_MSG_METRIC_STREAMER_CLOSE_DONE = 0x2209, 338 /** Response to VPU_JSM_MSG_TRACE_SET_CONFIG. */ 339 VPU_JSM_MSG_TRACE_SET_CONFIG_RSP = 0x220a, 340 /** Response to VPU_JSM_MSG_TRACE_GET_CONFIG. */ 341 VPU_JSM_MSG_TRACE_GET_CONFIG_RSP = 0x220b, 342 /** Response to VPU_JSM_MSG_TRACE_GET_CAPABILITY. */ 343 VPU_JSM_MSG_TRACE_GET_CAPABILITY_RSP = 0x220c, 344 /** Response to VPU_JSM_MSG_TRACE_GET_NAME. */ 345 VPU_JSM_MSG_TRACE_GET_NAME_RSP = 0x220d, 346 /** Response to VPU_JSM_MSG_SSID_RELEASE. */ 347 VPU_JSM_MSG_SSID_RELEASE_DONE = 0x220e, 348 /** 349 * Response to VPU_JSM_MSG_METRIC_STREAMER_START. 350 * VPU will return an error result if metric collection cannot be started, 351 * e.g. when the specified metric mask is invalid. 352 * @see vpu_jsm_metric_streamer_done 353 */ 354 VPU_JSM_MSG_METRIC_STREAMER_START_DONE = 0x220f, 355 /** 356 * Response to VPU_JSM_MSG_METRIC_STREAMER_STOP. 357 * Returns information about collected metric data. 358 * @see vpu_jsm_metric_streamer_done 359 */ 360 VPU_JSM_MSG_METRIC_STREAMER_STOP_DONE = 0x2210, 361 /** 362 * Response to VPU_JSM_MSG_METRIC_STREAMER_UPDATE. 363 * Returns information about collected metric data. 364 * @see vpu_jsm_metric_streamer_done 365 */ 366 VPU_JSM_MSG_METRIC_STREAMER_UPDATE_DONE = 0x2211, 367 /** 368 * Response to VPU_JSM_MSG_METRIC_STREAMER_INFO. 369 * Returns a description of the metric groups and metric counters. 370 * @see vpu_jsm_metric_streamer_done 371 */ 372 VPU_JSM_MSG_METRIC_STREAMER_INFO_DONE = 0x2212, 373 /** 374 * Asynchronous event sent from the VPU to the host either when the current 375 * metric buffer is full or when the VPU has collected a multiple of 376 * @notify_sample_count samples as indicated through the start command 377 * (VPU_JSM_MSG_METRIC_STREAMER_START). Returns information about collected 378 * metric data. 379 * @see vpu_jsm_metric_streamer_done 380 */ 381 VPU_JSM_MSG_METRIC_STREAMER_NOTIFICATION = 0x2213, 382 /** Response to control command: Priority band setup */ 383 VPU_JSM_MSG_SET_PRIORITY_BAND_SETUP_RSP = 0x2214, 384 /** Response to control command: Create command queue */ 385 VPU_JSM_MSG_CREATE_CMD_QUEUE_RSP = 0x2215, 386 /** Response to control command: Destroy command queue */ 387 VPU_JSM_MSG_DESTROY_CMD_QUEUE_RSP = 0x2216, 388 /** Response to control command: Set context scheduling properties */ 389 VPU_JSM_MSG_SET_CONTEXT_SCHED_PROPERTIES_RSP = 0x2217, 390 /** Response to control command: Log buffer setting */ 391 VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG_RSP = 0x2218, 392 /* IPC Device -> Host, HWS notify index entry of log buffer written */ 393 VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION = 0x2219, 394 /* IPC Device -> Host, HWS completion of a context suspend request */ 395 VPU_JSM_MSG_HWS_SUSPEND_CMDQ_DONE = 0x221a, 396 /* Response to control command: Resume command queue */ 397 VPU_JSM_MSG_HWS_RESUME_CMDQ_RSP = 0x221b, 398 /* Response to control command: Resume engine command response */ 399 VPU_JSM_MSG_HWS_RESUME_ENGINE_DONE = 0x221c, 400 /* Response to control command: Enable survivability/DCT mode */ 401 VPU_JSM_MSG_DCT_ENABLE_DONE = 0x221d, 402 /* Response to control command: Disable survivability/DCT mode */ 403 VPU_JSM_MSG_DCT_DISABLE_DONE = 0x221e, 404 /** 405 * Response to state dump control command. 406 * NOTE: Please introduce new ASYNC responses before this one. * 407 */ 408 VPU_JSM_MSG_STATE_DUMP_RSP = 0x22FF, 409 /* IPC Device -> Host, General command completion */ 410 VPU_JSM_MSG_GENERAL_CMD_DONE = 0x2300, 411 VPU_JSM_MSG_BLOB_DEINIT_DONE = VPU_JSM_MSG_GENERAL_CMD_DONE, 412 /** Response to VPU_JSM_MSG_DYNDBG_CONTROL. */ 413 VPU_JSM_MSG_DYNDBG_CONTROL_RSP = 0x2301, 414 /** 415 * Acknowledgment of completion of the save procedure initiated by 416 * VPU_JSM_MSG_PWR_D0I3_ENTER 417 */ 418 VPU_JSM_MSG_PWR_D0I3_ENTER_DONE = 0x2302, 419 }; 420 421 enum vpu_ipc_msg_status { VPU_JSM_MSG_FREE, VPU_JSM_MSG_ALLOCATED }; 422 423 /* 424 * Host <-> LRT IPC message payload definitions 425 */ 426 struct vpu_ipc_msg_payload_engine_reset { 427 /* Engine to be reset. */ 428 u32 engine_idx; 429 /* Reserved */ 430 u32 reserved_0; 431 }; 432 433 struct vpu_ipc_msg_payload_engine_preempt { 434 /* Engine to be preempted. */ 435 u32 engine_idx; 436 /* ID of the preemption request. */ 437 u32 preempt_id; 438 }; 439 440 /* 441 * @brief Register doorbell command structure. 442 * This structure supports doorbell registration for only OS scheduling. 443 * @see VPU_JSM_MSG_REGISTER_DB 444 */ 445 struct vpu_ipc_msg_payload_register_db { 446 /* Index of the doorbell to register. */ 447 u32 db_idx; 448 /* Reserved */ 449 u32 reserved_0; 450 /* Virtual address in Global GTT pointing to the start of job queue. */ 451 u64 jobq_base; 452 /* Size of the job queue in bytes. */ 453 u32 jobq_size; 454 /* Host sub-stream ID for the context assigned to the doorbell. */ 455 u32 host_ssid; 456 }; 457 458 /** 459 * @brief Unregister doorbell command structure. 460 * Request structure to unregister a doorbell for both HW and OS scheduling. 461 * @see VPU_JSM_MSG_UNREGISTER_DB 462 */ 463 struct vpu_ipc_msg_payload_unregister_db { 464 /* Index of the doorbell to unregister. */ 465 u32 db_idx; 466 /* Reserved */ 467 u32 reserved_0; 468 }; 469 470 struct vpu_ipc_msg_payload_query_engine_hb { 471 /* Engine to return heartbeat value. */ 472 u32 engine_idx; 473 /* Reserved */ 474 u32 reserved_0; 475 }; 476 477 struct vpu_ipc_msg_payload_power_level { 478 /** 479 * Requested power level. The power level value is in the 480 * range [0, power_level_count-1] where power_level_count 481 * is the number of available power levels as returned by 482 * the get power level count command. A power level of 0 483 * corresponds to the maximum possible power level, while 484 * power_level_count-1 corresponds to the minimum possible 485 * power level. Values outside of this range are not 486 * considered to be valid. 487 */ 488 u32 power_level; 489 /* Reserved */ 490 u32 reserved_0; 491 }; 492 493 struct vpu_ipc_msg_payload_ssid_release { 494 /* Host sub-stream ID for the context to be released. */ 495 u32 host_ssid; 496 /* Reserved */ 497 u32 reserved_0; 498 }; 499 500 /** 501 * @brief Metric streamer start command structure. 502 * This structure is also used with VPU_JSM_MSG_METRIC_STREAMER_INFO to request metric 503 * groups and metric counters description from the firmware. 504 * @see VPU_JSM_MSG_METRIC_STREAMER_START 505 * @see VPU_JSM_MSG_METRIC_STREAMER_INFO 506 */ 507 struct vpu_jsm_metric_streamer_start { 508 /** 509 * Bitmask to select the desired metric groups. 510 * A metric group can belong only to one metric streamer instance at a time. 511 * Since each metric streamer instance has a unique set of metric groups, it 512 * can also identify a metric streamer instance if more than one instance was 513 * started. If the VPU device does not support multiple metric streamer instances, 514 * then VPU_JSM_MSG_METRIC_STREAMER_START will return an error even if the second 515 * instance has different groups to the first. 516 */ 517 u64 metric_group_mask; 518 /** Sampling rate in nanoseconds. */ 519 u64 sampling_rate; 520 /** 521 * If > 0 the VPU will send a VPU_JSM_MSG_METRIC_STREAMER_NOTIFICATION message 522 * after every @notify_sample_count samples is collected or dropped by the VPU. 523 * If set to UINT_MAX the VPU will only generate a notification when the metric 524 * buffer is full. If set to 0 the VPU will never generate a notification. 525 */ 526 u32 notify_sample_count; 527 u32 reserved_0; 528 /** 529 * Address and size of the buffer where the VPU will write metric data. The 530 * VPU writes all counters from enabled metric groups one after another. If 531 * there is no space left to write data at the next sample period the VPU 532 * will switch to the next buffer (@see next_buffer_addr) and will optionally 533 * send a notification to the host driver if @notify_sample_count is non-zero. 534 * If @next_buffer_addr is NULL the VPU will stop collecting metric data. 535 */ 536 u64 buffer_addr; 537 u64 buffer_size; 538 /** 539 * Address and size of the next buffer to write metric data to after the initial 540 * buffer is full. If the address is NULL the VPU will stop collecting metric 541 * data. 542 */ 543 u64 next_buffer_addr; 544 u64 next_buffer_size; 545 }; 546 547 /** 548 * @brief Metric streamer stop command structure. 549 * @see VPU_JSM_MSG_METRIC_STREAMER_STOP 550 */ 551 struct vpu_jsm_metric_streamer_stop { 552 /** Bitmask to select the desired metric groups. */ 553 u64 metric_group_mask; 554 }; 555 556 /** 557 * Provide VPU FW with buffers to write metric data. 558 * @see VPU_JSM_MSG_METRIC_STREAMER_UPDATE 559 */ 560 struct vpu_jsm_metric_streamer_update { 561 /** Metric group mask that identifies metric streamer instance. */ 562 u64 metric_group_mask; 563 /** 564 * Address and size of the buffer where the VPU will write metric data. If 565 * the buffer address is 0 or same as the currently used buffer the VPU will 566 * continue writing metric data to the current buffer. In this case the 567 * buffer size is ignored and the size of the current buffer is unchanged. 568 * If the address is non-zero and differs from the current buffer address the 569 * VPU will immediately switch data collection to the new buffer. 570 */ 571 u64 buffer_addr; 572 u64 buffer_size; 573 /** 574 * Address and size of the next buffer to write metric data after the initial 575 * buffer is full. If the address is NULL the VPU will stop collecting metric 576 * data but will continue to record dropped samples. 577 * 578 * Note that there is a hazard possible if both buffer_addr and the next_buffer_addr 579 * are non-zero in same update request. It is the host's responsibility to ensure 580 * that both addresses make sense even if the VPU just switched to writing samples 581 * from the current to the next buffer. 582 */ 583 u64 next_buffer_addr; 584 u64 next_buffer_size; 585 }; 586 587 struct vpu_ipc_msg_payload_blob_deinit { 588 /* 64-bit unique ID for the blob to be de-initialized. */ 589 u64 blob_id; 590 }; 591 592 struct vpu_ipc_msg_payload_job_done { 593 /* Engine to which the job was submitted. */ 594 u32 engine_idx; 595 /* Index of the doorbell to which the job was submitted */ 596 u32 db_idx; 597 /* ID of the completed job */ 598 u32 job_id; 599 /* Status of the completed job */ 600 u32 job_status; 601 /* Host SSID */ 602 u32 host_ssid; 603 /* Zero Padding */ 604 u32 reserved_0; 605 /* Command queue id */ 606 u64 cmdq_id; 607 }; 608 609 struct vpu_jsm_engine_reset_context { 610 /* Host SSID */ 611 u32 host_ssid; 612 /* Zero Padding */ 613 u32 reserved_0; 614 /* Command queue id */ 615 u64 cmdq_id; 616 /* Flags: 0: cause of hang; 1: collateral damage of reset */ 617 u64 flags; 618 }; 619 620 struct vpu_ipc_msg_payload_engine_reset_done { 621 /* Engine ordinal */ 622 u32 engine_idx; 623 /* Number of impacted contexts */ 624 u32 num_impacted_contexts; 625 /* Array of impacted command queue ids and their flags */ 626 struct vpu_jsm_engine_reset_context 627 impacted_contexts[VPU_MAX_ENGINE_RESET_IMPACTED_CONTEXTS]; 628 }; 629 630 struct vpu_ipc_msg_payload_engine_preempt_done { 631 /* Engine preempted. */ 632 u32 engine_idx; 633 /* ID of the preemption request. */ 634 u32 preempt_id; 635 }; 636 637 /** 638 * Response structure for register doorbell command for both OS 639 * and HW scheduling. 640 * @see VPU_JSM_MSG_REGISTER_DB 641 * @see VPU_JSM_MSG_HWS_REGISTER_DB 642 */ 643 struct vpu_ipc_msg_payload_register_db_done { 644 /* Index of the registered doorbell. */ 645 u32 db_idx; 646 /* Reserved */ 647 u32 reserved_0; 648 }; 649 650 /** 651 * Response structure for unregister doorbell command for both OS 652 * and HW scheduling. 653 * @see VPU_JSM_MSG_UNREGISTER_DB 654 */ 655 struct vpu_ipc_msg_payload_unregister_db_done { 656 /* Index of the unregistered doorbell. */ 657 u32 db_idx; 658 /* Reserved */ 659 u32 reserved_0; 660 }; 661 662 struct vpu_ipc_msg_payload_query_engine_hb_done { 663 /* Engine returning heartbeat value. */ 664 u32 engine_idx; 665 /* Reserved */ 666 u32 reserved_0; 667 /* Heartbeat value. */ 668 u64 heartbeat; 669 }; 670 671 struct vpu_ipc_msg_payload_get_power_level_count_done { 672 /** 673 * Number of supported power levels. The maximum possible 674 * value of power_level_count is 16 but this may vary across 675 * implementations. 676 */ 677 u32 power_level_count; 678 /* Reserved */ 679 u32 reserved_0; 680 /** 681 * Power consumption limit for each supported power level in 682 * [0-100%] range relative to power level 0. 683 */ 684 u8 power_limit[16]; 685 }; 686 687 struct vpu_ipc_msg_payload_blob_deinit_done { 688 /* 64-bit unique ID for the blob de-initialized. */ 689 u64 blob_id; 690 }; 691 692 /* HWS priority band setup request / response */ 693 struct vpu_ipc_msg_payload_hws_priority_band_setup { 694 /* 695 * Grace period in 100ns units when preempting another priority band for 696 * this priority band 697 */ 698 u32 grace_period[VPU_HWS_NUM_PRIORITY_BANDS]; 699 /* 700 * Default quantum in 100ns units for scheduling across processes 701 * within a priority band 702 */ 703 u32 process_quantum[VPU_HWS_NUM_PRIORITY_BANDS]; 704 /* 705 * Default grace period in 100ns units for processes that preempt each 706 * other within a priority band 707 */ 708 u32 process_grace_period[VPU_HWS_NUM_PRIORITY_BANDS]; 709 /* 710 * For normal priority band, specifies the target VPU percentage 711 * in situations when it's starved by the focus band. 712 */ 713 u32 normal_band_percentage; 714 /* Reserved */ 715 u32 reserved_0; 716 }; 717 718 /* 719 * @brief HWS create command queue request. 720 * Host will create a command queue via this command. 721 * Note: Cmdq group is a handle of an object which 722 * may contain one or more command queues. 723 * @see VPU_JSM_MSG_CREATE_CMD_QUEUE 724 * @see VPU_JSM_MSG_CREATE_CMD_QUEUE_RSP 725 */ 726 struct vpu_ipc_msg_payload_hws_create_cmdq { 727 /* Process id */ 728 u64 process_id; 729 /* Host SSID */ 730 u32 host_ssid; 731 /* Engine for which queue is being created */ 732 u32 engine_idx; 733 /* 734 * Cmdq group may be set to 0 or equal to 735 * cmdq_id while each priority band contains 736 * only single engine instances. 737 */ 738 u64 cmdq_group; 739 /* Command queue id */ 740 u64 cmdq_id; 741 /* Command queue base */ 742 u64 cmdq_base; 743 /* Command queue size */ 744 u32 cmdq_size; 745 /* Zero padding */ 746 u32 reserved_0; 747 }; 748 749 /* 750 * @brief HWS create command queue response. 751 * @see VPU_JSM_MSG_CREATE_CMD_QUEUE 752 * @see VPU_JSM_MSG_CREATE_CMD_QUEUE_RSP 753 */ 754 struct vpu_ipc_msg_payload_hws_create_cmdq_rsp { 755 /* Process id */ 756 u64 process_id; 757 /* Host SSID */ 758 u32 host_ssid; 759 /* Engine for which queue is being created */ 760 u32 engine_idx; 761 /* Command queue group */ 762 u64 cmdq_group; 763 /* Command queue id */ 764 u64 cmdq_id; 765 }; 766 767 /* HWS destroy command queue request / response */ 768 struct vpu_ipc_msg_payload_hws_destroy_cmdq { 769 /* Host SSID */ 770 u32 host_ssid; 771 /* Zero Padding */ 772 u32 reserved; 773 /* Command queue id */ 774 u64 cmdq_id; 775 }; 776 777 /* HWS set context scheduling properties request / response */ 778 struct vpu_ipc_msg_payload_hws_set_context_sched_properties { 779 /* Host SSID */ 780 u32 host_ssid; 781 /* Zero Padding */ 782 u32 reserved_0; 783 /* Command queue id */ 784 u64 cmdq_id; 785 /* Priority band to assign to work of this context */ 786 u32 priority_band; 787 /* Inside realtime band assigns a further priority */ 788 u32 realtime_priority_level; 789 /* Priority relative to other contexts in the same process */ 790 s32 in_process_priority; 791 /* Zero padding / Reserved */ 792 u32 reserved_1; 793 /* Context quantum relative to other contexts of same priority in the same process */ 794 u64 context_quantum; 795 /* Grace period when preempting context of the same priority within the same process */ 796 u64 grace_period_same_priority; 797 /* Grace period when preempting context of a lower priority within the same process */ 798 u64 grace_period_lower_priority; 799 }; 800 801 /* 802 * @brief Register doorbell command structure. 803 * This structure supports doorbell registration for both HW and OS scheduling. 804 * Note: Queue base and size are added here so that the same structure can be used for 805 * OS scheduling and HW scheduling. For OS scheduling, cmdq_id will be ignored 806 * and cmdq_base and cmdq_size will be used. For HW scheduling, cmdq_base and cmdq_size will be 807 * ignored and cmdq_id is used. 808 * @see VPU_JSM_MSG_HWS_REGISTER_DB 809 */ 810 struct vpu_jsm_hws_register_db { 811 /* Index of the doorbell to register. */ 812 u32 db_id; 813 /* Host sub-stream ID for the context assigned to the doorbell. */ 814 u32 host_ssid; 815 /* ID of the command queue associated with the doorbell. */ 816 u64 cmdq_id; 817 /* Virtual address pointing to the start of command queue. */ 818 u64 cmdq_base; 819 /* Size of the command queue in bytes. */ 820 u64 cmdq_size; 821 }; 822 823 /* 824 * @brief Structure to set another buffer to be used for scheduling-related logging. 825 * The size of the logging buffer and the number of entries is defined as part of the 826 * buffer itself as described next. 827 * The log buffer received from the host is made up of; 828 * - header: 32 bytes in size, as shown in 'struct vpu_hws_log_buffer_header'. 829 * The header contains the number of log entries in the buffer. 830 * - log entry: 0 to n-1, each log entry is 32 bytes in size, as shown in 831 * 'struct vpu_hws_log_buffer_entry'. 832 * The entry contains the VPU timestamp, operation type and data. 833 * The host should provide the notify index value of log buffer to VPU. This is a 834 * value defined within the log buffer and when written to will generate the 835 * scheduling log notification. 836 * The host should set engine_idx and vpu_log_buffer_va to 0 to disable logging 837 * for a particular engine. 838 * VPU will handle one log buffer for each of supported engines. 839 * VPU should allow the logging to consume one host_ssid. 840 * @see VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG 841 * @see VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG_RSP 842 * @see VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION 843 */ 844 struct vpu_ipc_msg_payload_hws_set_scheduling_log { 845 /* Engine ordinal */ 846 u32 engine_idx; 847 /* Host SSID */ 848 u32 host_ssid; 849 /* 850 * VPU log buffer virtual address. 851 * Set to 0 to disable logging for this engine. 852 */ 853 u64 vpu_log_buffer_va; 854 /* 855 * Notify index of log buffer. VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION 856 * is generated when an event log is written to this index. 857 */ 858 u64 notify_index; 859 }; 860 861 /* 862 * @brief The scheduling log notification is generated by VPU when it writes 863 * an event into the log buffer at the notify_index. VPU notifies host with 864 * VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION. This is an asynchronous 865 * message from VPU to host. 866 * @see VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION 867 * @see VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG 868 */ 869 struct vpu_ipc_msg_payload_hws_scheduling_log_notification { 870 /* Engine ordinal */ 871 u32 engine_idx; 872 /* Zero Padding */ 873 u32 reserved_0; 874 }; 875 876 /* 877 * @brief HWS suspend command queue request and done structure. 878 * Host will request the suspend of contexts and VPU will; 879 * - Suspend all work on this context 880 * - Preempt any running work 881 * - Asynchronously perform the above and return success immediately once 882 * all items above are started successfully 883 * - Notify the host of completion of these operations via 884 * VPU_JSM_MSG_HWS_SUSPEND_CMDQ_DONE 885 * - Reject any other context operations on a context with an in-flight 886 * suspend request running 887 * Same structure used when VPU notifies host of completion of a context suspend 888 * request. The ids and suspend fence value reported in this command will match 889 * the one in the request from the host to suspend the context. Once suspend is 890 * complete, VPU will not access any data relating to this command queue until 891 * it is resumed. 892 * @see VPU_JSM_MSG_HWS_SUSPEND_CMDQ 893 * @see VPU_JSM_MSG_HWS_SUSPEND_CMDQ_DONE 894 */ 895 struct vpu_ipc_msg_payload_hws_suspend_cmdq { 896 /* Host SSID */ 897 u32 host_ssid; 898 /* Zero Padding */ 899 u32 reserved_0; 900 /* Command queue id */ 901 u64 cmdq_id; 902 /* 903 * Suspend fence value - reported by the VPU suspend context 904 * completed once suspend is complete. 905 */ 906 u64 suspend_fence_value; 907 }; 908 909 /* 910 * @brief HWS Resume command queue request / response structure. 911 * Host will request the resume of a context; 912 * - VPU will resume all work on this context 913 * - Scheduler will allow this context to be scheduled 914 * @see VPU_JSM_MSG_HWS_RESUME_CMDQ 915 * @see VPU_JSM_MSG_HWS_RESUME_CMDQ_RSP 916 */ 917 struct vpu_ipc_msg_payload_hws_resume_cmdq { 918 /* Host SSID */ 919 u32 host_ssid; 920 /* Zero Padding */ 921 u32 reserved_0; 922 /* Command queue id */ 923 u64 cmdq_id; 924 }; 925 926 /* 927 * @brief HWS Resume engine request / response structure. 928 * After a HWS engine reset, all scheduling is stopped on VPU until a engine resume. 929 * Host shall send this command to resume scheduling of any valid queue. 930 * @see VPU_JSM_MSG_HWS_RESUME_ENGINE 931 * @see VPU_JSM_MSG_HWS_RESUME_ENGINE_DONE 932 */ 933 struct vpu_ipc_msg_payload_hws_resume_engine { 934 /* Engine to be resumed */ 935 u32 engine_idx; 936 /* Reserved */ 937 u32 reserved_0; 938 }; 939 940 /** 941 * Payload for VPU_JSM_MSG_TRACE_SET_CONFIG[_RSP] and 942 * VPU_JSM_MSG_TRACE_GET_CONFIG_RSP messages. 943 * 944 * The payload is interpreted differently depending on the type of message: 945 * 946 * - For VPU_JSM_MSG_TRACE_SET_CONFIG, the payload specifies the desired 947 * logging configuration to be set. 948 * 949 * - For VPU_JSM_MSG_TRACE_SET_CONFIG_RSP, the payload reports the logging 950 * configuration that was set after a VPU_JSM_MSG_TRACE_SET_CONFIG request. 951 * The host can compare this payload with the one it sent in the 952 * VPU_JSM_MSG_TRACE_SET_CONFIG request to check whether or not the 953 * configuration was set as desired. 954 * 955 * - VPU_JSM_MSG_TRACE_GET_CONFIG_RSP, the payload reports the current logging 956 * configuration. 957 */ 958 struct vpu_ipc_msg_payload_trace_config { 959 /** 960 * Logging level (currently set or to be set); see 'mvLog_t' enum for 961 * acceptable values. The specified logging level applies to all 962 * destinations and HW components 963 */ 964 u32 trace_level; 965 /** 966 * Bitmask of logging destinations (currently enabled or to be enabled); 967 * bitwise OR of values defined in logging_destination enum. 968 */ 969 u32 trace_destination_mask; 970 /** 971 * Bitmask of loggable HW components (currently enabled or to be enabled); 972 * bitwise OR of values defined in loggable_hw_component enum. 973 */ 974 u64 trace_hw_component_mask; 975 u64 reserved_0; /**< Reserved for future extensions. */ 976 }; 977 978 /** 979 * Payload for VPU_JSM_MSG_TRACE_GET_CAPABILITY_RSP messages. 980 */ 981 struct vpu_ipc_msg_payload_trace_capability_rsp { 982 u32 trace_destination_mask; /**< Bitmask of supported logging destinations. */ 983 u32 reserved_0; 984 u64 trace_hw_component_mask; /**< Bitmask of supported loggable HW components. */ 985 u64 reserved_1; /**< Reserved for future extensions. */ 986 }; 987 988 /** 989 * Payload for VPU_JSM_MSG_TRACE_GET_NAME requests. 990 */ 991 struct vpu_ipc_msg_payload_trace_get_name { 992 /** 993 * The type of the entity to query name for; see logging_entity_type for 994 * possible values. 995 */ 996 u32 entity_type; 997 u32 reserved_0; 998 /** 999 * The ID of the entity to query name for; possible values depends on the 1000 * entity type. 1001 */ 1002 u64 entity_id; 1003 }; 1004 1005 /** 1006 * Payload for VPU_JSM_MSG_TRACE_GET_NAME_RSP responses. 1007 */ 1008 struct vpu_ipc_msg_payload_trace_get_name_rsp { 1009 /** 1010 * The type of the entity whose name was queried; see logging_entity_type 1011 * for possible values. 1012 */ 1013 u32 entity_type; 1014 u32 reserved_0; 1015 /** 1016 * The ID of the entity whose name was queried; possible values depends on 1017 * the entity type. 1018 */ 1019 u64 entity_id; 1020 /** Reserved for future extensions. */ 1021 u64 reserved_1; 1022 /** The name of the entity. */ 1023 char entity_name[VPU_TRACE_ENTITY_NAME_MAX_LEN]; 1024 }; 1025 1026 /** 1027 * Data sent from the VPU to the host in all metric streamer response messages 1028 * and in asynchronous notification. 1029 * @see VPU_JSM_MSG_METRIC_STREAMER_START_DONE 1030 * @see VPU_JSM_MSG_METRIC_STREAMER_STOP_DONE 1031 * @see VPU_JSM_MSG_METRIC_STREAMER_UPDATE_DONE 1032 * @see VPU_JSM_MSG_METRIC_STREAMER_INFO_DONE 1033 * @see VPU_JSM_MSG_METRIC_STREAMER_NOTIFICATION 1034 */ 1035 struct vpu_jsm_metric_streamer_done { 1036 /** Metric group mask that identifies metric streamer instance. */ 1037 u64 metric_group_mask; 1038 /** 1039 * Size in bytes of single sample - total size of all enabled counters. 1040 * Some VPU implementations may align sample_size to more than 8 bytes. 1041 */ 1042 u32 sample_size; 1043 u32 reserved_0; 1044 /** 1045 * Number of samples collected since the metric streamer was started. 1046 * This will be 0 if the metric streamer was not started. 1047 */ 1048 u32 samples_collected; 1049 /** 1050 * Number of samples dropped since the metric streamer was started. This 1051 * is incremented every time the metric streamer is not able to write 1052 * collected samples because the current buffer is full and there is no 1053 * next buffer to switch to. 1054 */ 1055 u32 samples_dropped; 1056 /** Address of the buffer that contains the latest metric data. */ 1057 u64 buffer_addr; 1058 /** 1059 * Number of bytes written into the metric data buffer. In response to the 1060 * VPU_JSM_MSG_METRIC_STREAMER_INFO request this field contains the size of 1061 * all group and counter descriptors. The size is updated even if the buffer 1062 * in the request was NULL or too small to hold descriptors of all counters 1063 */ 1064 u64 bytes_written; 1065 }; 1066 1067 /** 1068 * Metric group description placed in the metric buffer after successful completion 1069 * of the VPU_JSM_MSG_METRIC_STREAMER_INFO command. This is followed by one or more 1070 * @vpu_jsm_metric_counter_descriptor records. 1071 * @see VPU_JSM_MSG_METRIC_STREAMER_INFO 1072 */ 1073 struct vpu_jsm_metric_group_descriptor { 1074 /** 1075 * Offset to the next metric group (8-byte aligned). If this offset is 0 this 1076 * is the last descriptor. The value of metric_info_size must be greater than 1077 * or equal to sizeof(struct vpu_jsm_metric_group_descriptor) + name_string_size 1078 * + description_string_size and must be 8-byte aligned. 1079 */ 1080 u32 next_metric_group_info_offset; 1081 /** 1082 * Offset to the first metric counter description record (8-byte aligned). 1083 * @see vpu_jsm_metric_counter_descriptor 1084 */ 1085 u32 next_metric_counter_info_offset; 1086 /** Index of the group. This corresponds to bit index in metric_group_mask. */ 1087 u32 group_id; 1088 /** Number of counters in the metric group. */ 1089 u32 num_counters; 1090 /** Data size for all counters, must be a multiple of 8 bytes.*/ 1091 u32 metric_group_data_size; 1092 /** 1093 * Metric group domain number. Cannot use multiple, simultaneous metric groups 1094 * from the same domain. 1095 */ 1096 u32 domain; 1097 /** 1098 * Counter name string size. The string must include a null termination character. 1099 * The FW may use a fixed size name or send a different name for each counter. 1100 * If the VPU uses fixed size strings, all characters from the end of the name 1101 * to the of the fixed size character array must be zeroed. 1102 */ 1103 u32 name_string_size; 1104 /** Counter description string size, @see name_string_size */ 1105 u32 description_string_size; 1106 u64 reserved_0; 1107 /** 1108 * Right after this structure, the VPU writes name and description of 1109 * the metric group. 1110 */ 1111 }; 1112 1113 /** 1114 * Metric counter description, placed in the buffer after vpu_jsm_metric_group_descriptor. 1115 * @see VPU_JSM_MSG_METRIC_STREAMER_INFO 1116 */ 1117 struct vpu_jsm_metric_counter_descriptor { 1118 /** 1119 * Offset to the next counter in a group (8-byte aligned). If this offset is 1120 * 0 this is the last counter in the group. 1121 */ 1122 u32 next_metric_counter_info_offset; 1123 /** 1124 * Offset to the counter data from the start of samples in this metric group. 1125 * Note that metric_data_offset % metric_data_size must be 0. 1126 */ 1127 u32 metric_data_offset; 1128 /** Size of the metric counter data in bytes. */ 1129 u32 metric_data_size; 1130 /** Metric type, see Level Zero API for definitions. */ 1131 u32 tier; 1132 /** Metric type, see set_metric_type_t for definitions. */ 1133 u32 metric_type; 1134 /** Metric type, see set_value_type_t for definitions. */ 1135 u32 metric_value_type; 1136 /** 1137 * Counter name string size. The string must include a null termination character. 1138 * The FW may use a fixed size name or send a different name for each counter. 1139 * If the VPU uses fixed size strings, all characters from the end of the name 1140 * to the of the fixed size character array must be zeroed. 1141 */ 1142 u32 name_string_size; 1143 /** Counter description string size, @see name_string_size */ 1144 u32 description_string_size; 1145 /** Counter component name string size, @see name_string_size */ 1146 u32 component_string_size; 1147 /** Counter string size, @see name_string_size */ 1148 u32 units_string_size; 1149 u64 reserved_0; 1150 /** 1151 * Right after this structure, the VPU writes name, description 1152 * component and unit strings. 1153 */ 1154 }; 1155 1156 /** 1157 * Payload for VPU_JSM_MSG_DYNDBG_CONTROL requests. 1158 * 1159 * VPU_JSM_MSG_DYNDBG_CONTROL are used to control the VPU FW Dynamic Debug 1160 * feature, which allows developers to selectively enable / disable MVLOG_DEBUG 1161 * messages. This is equivalent to the Dynamic Debug functionality provided by 1162 * Linux 1163 * (https://www.kernel.org/doc/html/latest/admin-guide/dynamic-debug-howto.html) 1164 * The host can control Dynamic Debug behavior by sending dyndbg commands, which 1165 * have the same syntax as Linux 1166 * dyndbg commands. 1167 * 1168 * NOTE: in order for MVLOG_DEBUG messages to be actually printed, the host 1169 * still has to set the logging level to MVLOG_DEBUG, using the 1170 * VPU_JSM_MSG_TRACE_SET_CONFIG command. 1171 * 1172 * The host can see the current dynamic debug configuration by executing a 1173 * special 'show' command. The dyndbg configuration will be printed to the 1174 * configured logging destination using MVLOG_INFO logging level. 1175 */ 1176 struct vpu_ipc_msg_payload_dyndbg_control { 1177 /** 1178 * Dyndbg command (same format as Linux dyndbg); must be a NULL-terminated 1179 * string. 1180 */ 1181 char dyndbg_cmd[VPU_DYNDBG_CMD_MAX_LEN]; 1182 }; 1183 1184 /** 1185 * Payload for VPU_JSM_MSG_PWR_D0I3_ENTER 1186 * 1187 * This is a bi-directional payload. 1188 */ 1189 struct vpu_ipc_msg_payload_pwr_d0i3_enter { 1190 /** 1191 * 0: VPU_JSM_MSG_PWR_D0I3_ENTER_DONE is not sent to the host driver 1192 * The driver will poll for D0i2 Idle state transitions. 1193 * 1: VPU_JSM_MSG_PWR_D0I3_ENTER_DONE is sent after VPU state save is complete 1194 */ 1195 u32 send_response; 1196 u32 reserved_0; 1197 }; 1198 1199 /** 1200 * Payload for VPU_JSM_MSG_DCT_ENABLE message. 1201 * 1202 * Default values for DCT active/inactive times are 5.3ms and 30ms respectively, 1203 * corresponding to a 85% duty cycle. This payload allows the host to tune these 1204 * values according to application requirements. 1205 */ 1206 struct vpu_ipc_msg_payload_pwr_dct_control { 1207 /** Duty cycle active time in microseconds */ 1208 u32 dct_active_us; 1209 /** Duty cycle inactive time in microseconds */ 1210 u32 dct_inactive_us; 1211 }; 1212 1213 /* 1214 * Payloads union, used to define complete message format. 1215 */ 1216 union vpu_ipc_msg_payload { 1217 struct vpu_ipc_msg_payload_engine_reset engine_reset; 1218 struct vpu_ipc_msg_payload_engine_preempt engine_preempt; 1219 struct vpu_ipc_msg_payload_register_db register_db; 1220 struct vpu_ipc_msg_payload_unregister_db unregister_db; 1221 struct vpu_ipc_msg_payload_query_engine_hb query_engine_hb; 1222 struct vpu_ipc_msg_payload_power_level power_level; 1223 struct vpu_jsm_metric_streamer_start metric_streamer_start; 1224 struct vpu_jsm_metric_streamer_stop metric_streamer_stop; 1225 struct vpu_jsm_metric_streamer_update metric_streamer_update; 1226 struct vpu_ipc_msg_payload_blob_deinit blob_deinit; 1227 struct vpu_ipc_msg_payload_ssid_release ssid_release; 1228 struct vpu_jsm_hws_register_db hws_register_db; 1229 struct vpu_ipc_msg_payload_job_done job_done; 1230 struct vpu_ipc_msg_payload_engine_reset_done engine_reset_done; 1231 struct vpu_ipc_msg_payload_engine_preempt_done engine_preempt_done; 1232 struct vpu_ipc_msg_payload_register_db_done register_db_done; 1233 struct vpu_ipc_msg_payload_unregister_db_done unregister_db_done; 1234 struct vpu_ipc_msg_payload_query_engine_hb_done query_engine_hb_done; 1235 struct vpu_ipc_msg_payload_get_power_level_count_done get_power_level_count_done; 1236 struct vpu_jsm_metric_streamer_done metric_streamer_done; 1237 struct vpu_ipc_msg_payload_blob_deinit_done blob_deinit_done; 1238 struct vpu_ipc_msg_payload_trace_config trace_config; 1239 struct vpu_ipc_msg_payload_trace_capability_rsp trace_capability; 1240 struct vpu_ipc_msg_payload_trace_get_name trace_get_name; 1241 struct vpu_ipc_msg_payload_trace_get_name_rsp trace_get_name_rsp; 1242 struct vpu_ipc_msg_payload_dyndbg_control dyndbg_control; 1243 struct vpu_ipc_msg_payload_hws_priority_band_setup hws_priority_band_setup; 1244 struct vpu_ipc_msg_payload_hws_create_cmdq hws_create_cmdq; 1245 struct vpu_ipc_msg_payload_hws_create_cmdq_rsp hws_create_cmdq_rsp; 1246 struct vpu_ipc_msg_payload_hws_destroy_cmdq hws_destroy_cmdq; 1247 struct vpu_ipc_msg_payload_hws_set_context_sched_properties 1248 hws_set_context_sched_properties; 1249 struct vpu_ipc_msg_payload_hws_set_scheduling_log hws_set_scheduling_log; 1250 struct vpu_ipc_msg_payload_hws_scheduling_log_notification hws_scheduling_log_notification; 1251 struct vpu_ipc_msg_payload_hws_suspend_cmdq hws_suspend_cmdq; 1252 struct vpu_ipc_msg_payload_hws_resume_cmdq hws_resume_cmdq; 1253 struct vpu_ipc_msg_payload_hws_resume_engine hws_resume_engine; 1254 struct vpu_ipc_msg_payload_pwr_d0i3_enter pwr_d0i3_enter; 1255 struct vpu_ipc_msg_payload_pwr_dct_control pwr_dct_control; 1256 }; 1257 1258 /* 1259 * Host <-> LRT IPC message base structure. 1260 * 1261 * NOTE: All instances of this object must be aligned on a 64B boundary 1262 * to allow proper handling of VPU cache operations. 1263 */ 1264 struct vpu_jsm_msg { 1265 /* Reserved */ 1266 u64 reserved_0; 1267 /* Message type, see vpu_ipc_msg_type enum. */ 1268 u32 type; 1269 /* Buffer status, see vpu_ipc_msg_status enum. */ 1270 u32 status; 1271 /* 1272 * Request ID, provided by the host in a request message and passed 1273 * back by VPU in the response message. 1274 */ 1275 u32 request_id; 1276 /* Request return code set by the VPU, see VPU_JSM_STATUS_* defines. */ 1277 u32 result; 1278 u64 reserved_1; 1279 /* Message payload depending on message type, see vpu_ipc_msg_payload union. */ 1280 union vpu_ipc_msg_payload payload; 1281 }; 1282 1283 #pragma pack(pop) 1284 1285 #endif 1286 1287 ///@} 1288