xref: /linux/drivers/accel/ivpu/ivpu_hw.h (revision face6a3615a649456eb4549f6d474221d877d604) 
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (C) 2020-2025 Intel Corporation
4  */
5 
6 #ifndef __IVPU_HW_H__
7 #define __IVPU_HW_H__
8 
9 #include "ivpu_drv.h"
10 #include "ivpu_hw_btrs.h"
11 #include "ivpu_hw_ip.h"
12 
13 struct ivpu_addr_range {
14 	resource_size_t start;
15 	resource_size_t end;
16 };
17 
18 struct ivpu_hw_info {
19 	struct {
20 		bool (*btrs_irq_handler)(struct ivpu_device *vdev, int irq);
21 		bool (*ip_irq_handler)(struct ivpu_device *vdev, int irq);
22 	} irq;
23 	struct {
24 		struct ivpu_addr_range runtime;
25 		struct ivpu_addr_range global;
26 		struct ivpu_addr_range user;
27 		struct ivpu_addr_range shave;
28 		struct ivpu_addr_range dma;
29 	} ranges;
30 	struct {
31 		u8 min_ratio;
32 		u8 max_ratio;
33 		/*
34 		 * Pll ratio for the efficiency frequency. The VPU has optimum
35 		 * performance to power ratio at this frequency.
36 		 */
37 		u8 pn_ratio;
38 		u32 profiling_freq;
39 	} pll;
40 	struct {
41 		u32 grace_period[VPU_HWS_NUM_PRIORITY_BANDS];
42 		u32 process_quantum[VPU_HWS_NUM_PRIORITY_BANDS];
43 		u32 process_grace_period[VPU_HWS_NUM_PRIORITY_BANDS];
44 	} hws;
45 	u32 tile_fuse;
46 	u32 sku;
47 	u16 config;
48 	int dma_bits;
49 	ktime_t d0i3_entry_host_ts;
50 	u64 d0i3_entry_vpu_ts;
51 	atomic_t firewall_irq_counter;
52 };
53 
54 int ivpu_hw_init(struct ivpu_device *vdev);
55 int ivpu_hw_range_init(struct ivpu_device *vdev, struct ivpu_addr_range *range, u64 start,
56 		       u64 size);
57 int ivpu_hw_power_up(struct ivpu_device *vdev);
58 int ivpu_hw_power_down(struct ivpu_device *vdev);
59 int ivpu_hw_reset(struct ivpu_device *vdev);
60 int ivpu_hw_boot_fw(struct ivpu_device *vdev);
61 void ivpu_hw_profiling_freq_drive(struct ivpu_device *vdev, bool enable);
62 void ivpu_irq_handlers_init(struct ivpu_device *vdev);
63 void ivpu_hw_irq_enable(struct ivpu_device *vdev);
64 void ivpu_hw_irq_disable(struct ivpu_device *vdev);
65 irqreturn_t ivpu_hw_irq_handler(int irq, void *ptr);
66 bool ivpu_hw_uses_ecc_mca_signal(struct ivpu_device *vdev);
67 
68 static inline u32 ivpu_hw_btrs_irq_handler(struct ivpu_device *vdev, int irq)
69 {
70 	return vdev->hw->irq.btrs_irq_handler(vdev, irq);
71 }
72 
73 static inline u32 ivpu_hw_ip_irq_handler(struct ivpu_device *vdev, int irq)
74 {
75 	return vdev->hw->irq.ip_irq_handler(vdev, irq);
76 }
77 
78 static inline u64 ivpu_hw_range_size(const struct ivpu_addr_range *range)
79 {
80 	return range->end - range->start;
81 }
82 
83 static inline u32 ivpu_hw_dpu_max_freq_get(struct ivpu_device *vdev)
84 {
85 	return ivpu_hw_btrs_dpu_max_freq_get(vdev);
86 }
87 
88 static inline u32 ivpu_hw_dpu_freq_get(struct ivpu_device *vdev)
89 {
90 	return ivpu_hw_btrs_dpu_freq_get(vdev);
91 }
92 
93 static inline void ivpu_hw_irq_clear(struct ivpu_device *vdev)
94 {
95 	ivpu_hw_ip_irq_clear(vdev);
96 }
97 
98 static inline u32 ivpu_hw_profiling_freq_get(struct ivpu_device *vdev)
99 {
100 	return vdev->hw->pll.profiling_freq;
101 }
102 
103 static inline void ivpu_hw_diagnose_failure(struct ivpu_device *vdev)
104 {
105 	ivpu_hw_ip_diagnose_failure(vdev);
106 	ivpu_hw_btrs_diagnose_failure(vdev);
107 }
108 
109 static inline u32 ivpu_hw_telemetry_offset_get(struct ivpu_device *vdev)
110 {
111 	return ivpu_hw_btrs_telemetry_offset_get(vdev);
112 }
113 
114 static inline u32 ivpu_hw_telemetry_size_get(struct ivpu_device *vdev)
115 {
116 	return ivpu_hw_btrs_telemetry_size_get(vdev);
117 }
118 
119 static inline u32 ivpu_hw_telemetry_enable_get(struct ivpu_device *vdev)
120 {
121 	return ivpu_hw_btrs_telemetry_enable_get(vdev);
122 }
123 
124 static inline bool ivpu_hw_is_idle(struct ivpu_device *vdev)
125 {
126 	return ivpu_hw_btrs_is_idle(vdev);
127 }
128 
129 static inline int ivpu_hw_wait_for_idle(struct ivpu_device *vdev)
130 {
131 	return ivpu_hw_btrs_wait_for_idle(vdev);
132 }
133 
134 static inline void ivpu_hw_ipc_tx_set(struct ivpu_device *vdev, u32 vpu_addr)
135 {
136 	ivpu_hw_ip_ipc_tx_set(vdev, vpu_addr);
137 }
138 
139 static inline void ivpu_hw_db_set(struct ivpu_device *vdev, u32 db_id)
140 {
141 	ivpu_hw_ip_db_set(vdev, db_id);
142 }
143 
144 static inline u32 ivpu_hw_ipc_rx_addr_get(struct ivpu_device *vdev)
145 {
146 	return ivpu_hw_ip_ipc_rx_addr_get(vdev);
147 }
148 
149 static inline u32 ivpu_hw_ipc_rx_count_get(struct ivpu_device *vdev)
150 {
151 	return ivpu_hw_ip_ipc_rx_count_get(vdev);
152 }
153 
154 #endif /* __IVPU_HW_H__ */
155