xref: /linux/drivers/accel/ivpu/ivpu_hw.h (revision 4b660dbd9ee2059850fd30e0df420ca7a38a1856)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (C) 2020-2023 Intel Corporation
4  */
5 
6 #ifndef __IVPU_HW_H__
7 #define __IVPU_HW_H__
8 
9 #include "ivpu_drv.h"
10 
11 struct ivpu_hw_ops {
12 	int (*info_init)(struct ivpu_device *vdev);
13 	int (*power_up)(struct ivpu_device *vdev);
14 	int (*boot_fw)(struct ivpu_device *vdev);
15 	int (*power_down)(struct ivpu_device *vdev);
16 	int (*reset)(struct ivpu_device *vdev);
17 	bool (*is_idle)(struct ivpu_device *vdev);
18 	int (*wait_for_idle)(struct ivpu_device *vdev);
19 	void (*wdt_disable)(struct ivpu_device *vdev);
20 	void (*diagnose_failure)(struct ivpu_device *vdev);
21 	u32 (*profiling_freq_get)(struct ivpu_device *vdev);
22 	void (*profiling_freq_drive)(struct ivpu_device *vdev, bool enable);
23 	u32 (*reg_pll_freq_get)(struct ivpu_device *vdev);
24 	u32 (*reg_telemetry_offset_get)(struct ivpu_device *vdev);
25 	u32 (*reg_telemetry_size_get)(struct ivpu_device *vdev);
26 	u32 (*reg_telemetry_enable_get)(struct ivpu_device *vdev);
27 	void (*reg_db_set)(struct ivpu_device *vdev, u32 db_id);
28 	u32 (*reg_ipc_rx_addr_get)(struct ivpu_device *vdev);
29 	u32 (*reg_ipc_rx_count_get)(struct ivpu_device *vdev);
30 	void (*reg_ipc_tx_set)(struct ivpu_device *vdev, u32 vpu_addr);
31 	void (*irq_clear)(struct ivpu_device *vdev);
32 	void (*irq_enable)(struct ivpu_device *vdev);
33 	void (*irq_disable)(struct ivpu_device *vdev);
34 	irqreturn_t (*irq_handler)(int irq, void *ptr);
35 };
36 
37 struct ivpu_addr_range {
38 	resource_size_t start;
39 	resource_size_t end;
40 };
41 
42 struct ivpu_hw_info {
43 	const struct ivpu_hw_ops *ops;
44 	struct {
45 		struct ivpu_addr_range global;
46 		struct ivpu_addr_range user;
47 		struct ivpu_addr_range shave;
48 		struct ivpu_addr_range dma;
49 	} ranges;
50 	struct {
51 		u8 min_ratio;
52 		u8 max_ratio;
53 		/*
54 		 * Pll ratio for the efficiency frequency. The VPU has optimum
55 		 * performance to power ratio at this frequency.
56 		 */
57 		u8 pn_ratio;
58 		u32 profiling_freq;
59 	} pll;
60 	u32 tile_fuse;
61 	u32 sku;
62 	u16 config;
63 	int dma_bits;
64 	ktime_t d0i3_entry_host_ts;
65 	u64 d0i3_entry_vpu_ts;
66 };
67 
68 extern const struct ivpu_hw_ops ivpu_hw_37xx_ops;
69 extern const struct ivpu_hw_ops ivpu_hw_40xx_ops;
70 
71 static inline int ivpu_hw_info_init(struct ivpu_device *vdev)
72 {
73 	return vdev->hw->ops->info_init(vdev);
74 };
75 
76 static inline int ivpu_hw_power_up(struct ivpu_device *vdev)
77 {
78 	ivpu_dbg(vdev, PM, "HW power up\n");
79 
80 	return vdev->hw->ops->power_up(vdev);
81 };
82 
83 static inline int ivpu_hw_boot_fw(struct ivpu_device *vdev)
84 {
85 	return vdev->hw->ops->boot_fw(vdev);
86 };
87 
88 static inline bool ivpu_hw_is_idle(struct ivpu_device *vdev)
89 {
90 	return vdev->hw->ops->is_idle(vdev);
91 };
92 
93 static inline int ivpu_hw_wait_for_idle(struct ivpu_device *vdev)
94 {
95 	return vdev->hw->ops->wait_for_idle(vdev);
96 };
97 
98 static inline int ivpu_hw_power_down(struct ivpu_device *vdev)
99 {
100 	ivpu_dbg(vdev, PM, "HW power down\n");
101 
102 	return vdev->hw->ops->power_down(vdev);
103 };
104 
105 static inline int ivpu_hw_reset(struct ivpu_device *vdev)
106 {
107 	ivpu_dbg(vdev, PM, "HW reset\n");
108 
109 	return vdev->hw->ops->reset(vdev);
110 };
111 
112 static inline void ivpu_hw_wdt_disable(struct ivpu_device *vdev)
113 {
114 	vdev->hw->ops->wdt_disable(vdev);
115 };
116 
117 static inline u32 ivpu_hw_profiling_freq_get(struct ivpu_device *vdev)
118 {
119 	return vdev->hw->ops->profiling_freq_get(vdev);
120 };
121 
122 static inline void ivpu_hw_profiling_freq_drive(struct ivpu_device *vdev, bool enable)
123 {
124 	return vdev->hw->ops->profiling_freq_drive(vdev, enable);
125 };
126 
127 /* Register indirect accesses */
128 static inline u32 ivpu_hw_reg_pll_freq_get(struct ivpu_device *vdev)
129 {
130 	return vdev->hw->ops->reg_pll_freq_get(vdev);
131 };
132 
133 static inline u32 ivpu_hw_reg_telemetry_offset_get(struct ivpu_device *vdev)
134 {
135 	return vdev->hw->ops->reg_telemetry_offset_get(vdev);
136 };
137 
138 static inline u32 ivpu_hw_reg_telemetry_size_get(struct ivpu_device *vdev)
139 {
140 	return vdev->hw->ops->reg_telemetry_size_get(vdev);
141 };
142 
143 static inline u32 ivpu_hw_reg_telemetry_enable_get(struct ivpu_device *vdev)
144 {
145 	return vdev->hw->ops->reg_telemetry_enable_get(vdev);
146 };
147 
148 static inline void ivpu_hw_reg_db_set(struct ivpu_device *vdev, u32 db_id)
149 {
150 	vdev->hw->ops->reg_db_set(vdev, db_id);
151 };
152 
153 static inline u32 ivpu_hw_reg_ipc_rx_addr_get(struct ivpu_device *vdev)
154 {
155 	return vdev->hw->ops->reg_ipc_rx_addr_get(vdev);
156 };
157 
158 static inline u32 ivpu_hw_reg_ipc_rx_count_get(struct ivpu_device *vdev)
159 {
160 	return vdev->hw->ops->reg_ipc_rx_count_get(vdev);
161 };
162 
163 static inline void ivpu_hw_reg_ipc_tx_set(struct ivpu_device *vdev, u32 vpu_addr)
164 {
165 	vdev->hw->ops->reg_ipc_tx_set(vdev, vpu_addr);
166 };
167 
168 static inline void ivpu_hw_irq_clear(struct ivpu_device *vdev)
169 {
170 	vdev->hw->ops->irq_clear(vdev);
171 };
172 
173 static inline void ivpu_hw_irq_enable(struct ivpu_device *vdev)
174 {
175 	vdev->hw->ops->irq_enable(vdev);
176 };
177 
178 static inline void ivpu_hw_irq_disable(struct ivpu_device *vdev)
179 {
180 	vdev->hw->ops->irq_disable(vdev);
181 };
182 
183 static inline void ivpu_hw_init_range(struct ivpu_addr_range *range, u64 start, u64 size)
184 {
185 	range->start = start;
186 	range->end = start + size;
187 }
188 
189 static inline u64 ivpu_hw_range_size(const struct ivpu_addr_range *range)
190 {
191 	return range->end - range->start;
192 }
193 
194 static inline void ivpu_hw_diagnose_failure(struct ivpu_device *vdev)
195 {
196 	vdev->hw->ops->diagnose_failure(vdev);
197 }
198 
199 #endif /* __IVPU_HW_H__ */
200