1 /* SPDX-License-Identifier: GPL-2.0 2 * 3 * Copyright 2019-2020 HabanaLabs, Ltd. 4 * All Rights Reserved. 5 * 6 */ 7 8 #ifndef GAUDI_FW_IF_H 9 #define GAUDI_FW_IF_H 10 11 #define GAUDI_EVENT_QUEUE_MSI_IDX 8 12 #define GAUDI_NIC_PORT1_MSI_IDX 10 13 #define GAUDI_NIC_PORT3_MSI_IDX 12 14 #define GAUDI_NIC_PORT5_MSI_IDX 14 15 #define GAUDI_NIC_PORT7_MSI_IDX 16 16 #define GAUDI_NIC_PORT9_MSI_IDX 18 17 18 #define UBOOT_FW_OFFSET 0x100000 /* 1MB in SRAM */ 19 #define LINUX_FW_OFFSET 0x800000 /* 8MB in HBM */ 20 21 /* HBM thermal delta in [Deg] added to composite (CTemp) */ 22 #define HBM_TEMP_ADJUST_COEFF 6 23 24 enum gaudi_nic_axi_error { 25 RXB, 26 RXE, 27 TXS, 28 TXE, 29 QPC_RESP, 30 NON_AXI_ERR, 31 TMR, 32 }; 33 34 /* 35 * struct eq_nic_sei_event - describes an AXI error cause. 36 * @axi_error_cause: one of the events defined in enum gaudi_nic_axi_error. 37 * @id: can be either 0 or 1, to further describe unit with interrupt cause 38 * (i.e. TXE0 or TXE1). 39 * @pad[6]: padding structure to 64bit. 40 */ 41 struct eq_nic_sei_event { 42 __u8 axi_error_cause; 43 __u8 id; 44 __u8 pad[6]; 45 }; 46 47 struct gaudi_cold_rst_data { 48 union { 49 struct { 50 u32 spsram_init_done : 1; 51 u32 reserved : 31; 52 }; 53 __le32 data; 54 }; 55 }; 56 57 #define GAUDI_PLL_FREQ_LOW 200000000 /* 200 MHz */ 58 59 #endif /* GAUDI_FW_IF_H */ 60