1*e65e175bSOded Gabbay /* SPDX-License-Identifier: GPL-2.0 2*e65e175bSOded Gabbay * 3*e65e175bSOded Gabbay * Copyright 2019-2020 HabanaLabs, Ltd. 4*e65e175bSOded Gabbay * All Rights Reserved. 5*e65e175bSOded Gabbay * 6*e65e175bSOded Gabbay */ 7*e65e175bSOded Gabbay 8*e65e175bSOded Gabbay #ifndef GAUDI_FW_IF_H 9*e65e175bSOded Gabbay #define GAUDI_FW_IF_H 10*e65e175bSOded Gabbay 11*e65e175bSOded Gabbay #define GAUDI_EVENT_QUEUE_MSI_IDX 8 12*e65e175bSOded Gabbay #define GAUDI_NIC_PORT1_MSI_IDX 10 13*e65e175bSOded Gabbay #define GAUDI_NIC_PORT3_MSI_IDX 12 14*e65e175bSOded Gabbay #define GAUDI_NIC_PORT5_MSI_IDX 14 15*e65e175bSOded Gabbay #define GAUDI_NIC_PORT7_MSI_IDX 16 16*e65e175bSOded Gabbay #define GAUDI_NIC_PORT9_MSI_IDX 18 17*e65e175bSOded Gabbay 18*e65e175bSOded Gabbay #define UBOOT_FW_OFFSET 0x100000 /* 1MB in SRAM */ 19*e65e175bSOded Gabbay #define LINUX_FW_OFFSET 0x800000 /* 8MB in HBM */ 20*e65e175bSOded Gabbay 21*e65e175bSOded Gabbay /* HBM thermal delta in [Deg] added to composite (CTemp) */ 22*e65e175bSOded Gabbay #define HBM_TEMP_ADJUST_COEFF 6 23*e65e175bSOded Gabbay 24*e65e175bSOded Gabbay enum gaudi_nic_axi_error { 25*e65e175bSOded Gabbay RXB, 26*e65e175bSOded Gabbay RXE, 27*e65e175bSOded Gabbay TXS, 28*e65e175bSOded Gabbay TXE, 29*e65e175bSOded Gabbay QPC_RESP, 30*e65e175bSOded Gabbay NON_AXI_ERR, 31*e65e175bSOded Gabbay TMR, 32*e65e175bSOded Gabbay }; 33*e65e175bSOded Gabbay 34*e65e175bSOded Gabbay /* 35*e65e175bSOded Gabbay * struct eq_nic_sei_event - describes an AXI error cause. 36*e65e175bSOded Gabbay * @axi_error_cause: one of the events defined in enum gaudi_nic_axi_error. 37*e65e175bSOded Gabbay * @id: can be either 0 or 1, to further describe unit with interrupt cause 38*e65e175bSOded Gabbay * (i.e. TXE0 or TXE1). 39*e65e175bSOded Gabbay * @pad[6]: padding structure to 64bit. 40*e65e175bSOded Gabbay */ 41*e65e175bSOded Gabbay struct eq_nic_sei_event { 42*e65e175bSOded Gabbay __u8 axi_error_cause; 43*e65e175bSOded Gabbay __u8 id; 44*e65e175bSOded Gabbay __u8 pad[6]; 45*e65e175bSOded Gabbay }; 46*e65e175bSOded Gabbay 47*e65e175bSOded Gabbay struct gaudi_cold_rst_data { 48*e65e175bSOded Gabbay union { 49*e65e175bSOded Gabbay struct { 50*e65e175bSOded Gabbay u32 spsram_init_done : 1; 51*e65e175bSOded Gabbay u32 reserved : 31; 52*e65e175bSOded Gabbay }; 53*e65e175bSOded Gabbay __le32 data; 54*e65e175bSOded Gabbay }; 55*e65e175bSOded Gabbay }; 56*e65e175bSOded Gabbay 57*e65e175bSOded Gabbay #define GAUDI_PLL_FREQ_LOW 200000000 /* 200 MHz */ 58*e65e175bSOded Gabbay 59*e65e175bSOded Gabbay #endif /* GAUDI_FW_IF_H */ 60