xref: /linux/drivers/accel/amdxdna/amdxdna_pci_drv.h (revision f1f2a22b8683d7ac38821d4508d4549a2f0c0a0a)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (C) 2022-2024, Advanced Micro Devices, Inc.
4  */
5 
6 #ifndef _AMDXDNA_PCI_DRV_H_
7 #define _AMDXDNA_PCI_DRV_H_
8 
9 #include <linux/workqueue.h>
10 #include <linux/xarray.h>
11 
12 #define XDNA_INFO(xdna, fmt, args...)	drm_info(&(xdna)->ddev, fmt, ##args)
13 #define XDNA_WARN(xdna, fmt, args...)	drm_warn(&(xdna)->ddev, "%s: "fmt, __func__, ##args)
14 #define XDNA_ERR(xdna, fmt, args...)	drm_err(&(xdna)->ddev, "%s: "fmt, __func__, ##args)
15 #define XDNA_DBG(xdna, fmt, args...)	drm_dbg(&(xdna)->ddev, fmt, ##args)
16 #define XDNA_INFO_ONCE(xdna, fmt, args...) drm_info_once(&(xdna)->ddev, fmt, ##args)
17 
18 #define XDNA_MBZ_DBG(xdna, ptr, sz)					\
19 	({								\
20 		int __i;						\
21 		int __ret = 0;						\
22 		u8 *__ptr = (u8 *)(ptr);				\
23 		for (__i = 0; __i < (sz); __i++) {			\
24 			if (__ptr[__i]) {				\
25 				XDNA_DBG(xdna, "MBZ check failed");	\
26 				__ret = -EINVAL;			\
27 				break;					\
28 			}						\
29 		}							\
30 		__ret;							\
31 	})
32 
33 #define to_xdna_dev(drm_dev) \
34 	((struct amdxdna_dev *)container_of(drm_dev, struct amdxdna_dev, ddev))
35 
36 extern const struct drm_driver amdxdna_drm_drv;
37 
38 struct amdxdna_client;
39 struct amdxdna_dev;
40 struct amdxdna_drm_get_info;
41 struct amdxdna_drm_set_state;
42 struct amdxdna_gem_obj;
43 struct amdxdna_hwctx;
44 struct amdxdna_sched_job;
45 
46 /*
47  * struct amdxdna_dev_ops - Device hardware operation callbacks
48  */
49 struct amdxdna_dev_ops {
50 	int (*init)(struct amdxdna_dev *xdna);
51 	void (*fini)(struct amdxdna_dev *xdna);
52 	int (*resume)(struct amdxdna_dev *xdna);
53 	int (*suspend)(struct amdxdna_dev *xdna);
54 	int (*hwctx_init)(struct amdxdna_hwctx *hwctx);
55 	void (*hwctx_fini)(struct amdxdna_hwctx *hwctx);
56 	int (*hwctx_config)(struct amdxdna_hwctx *hwctx, u32 type, u64 value, void *buf, u32 size);
57 	void (*hmm_invalidate)(struct amdxdna_gem_obj *abo, unsigned long cur_seq);
58 	int (*cmd_submit)(struct amdxdna_hwctx *hwctx, struct amdxdna_sched_job *job, u64 *seq);
59 	int (*get_aie_info)(struct amdxdna_client *client, struct amdxdna_drm_get_info *args);
60 	int (*set_aie_state)(struct amdxdna_client *client, struct amdxdna_drm_set_state *args);
61 };
62 
63 /*
64  * struct amdxdna_dev_info - Device hardware information
65  * Record device static information, like reg, mbox, PSP, SMU bar index
66  */
67 struct amdxdna_dev_info {
68 	int				reg_bar;
69 	int				mbox_bar;
70 	int				sram_bar;
71 	int				psp_bar;
72 	int				smu_bar;
73 	int				device_type;
74 	int				first_col;
75 	u32				dev_mem_buf_shift;
76 	u64				dev_mem_base;
77 	size_t				dev_mem_size;
78 	char				*vbnv;
79 	const struct amdxdna_dev_priv	*dev_priv;
80 	const struct amdxdna_dev_ops	*ops;
81 };
82 
83 struct amdxdna_fw_ver {
84 	u32 major;
85 	u32 minor;
86 	u32 sub;
87 	u32 build;
88 };
89 
90 struct amdxdna_dev {
91 	struct drm_device		ddev;
92 	struct amdxdna_dev_hdl		*dev_handle;
93 	const struct amdxdna_dev_info	*dev_info;
94 	void				*xrs_hdl;
95 
96 	struct mutex			dev_lock; /* per device lock */
97 	struct list_head		client_list;
98 	struct amdxdna_fw_ver		fw_ver;
99 	struct rw_semaphore		notifier_lock; /* for mmu notifier*/
100 	struct workqueue_struct		*notifier_wq;
101 };
102 
103 /*
104  * struct amdxdna_device_id - PCI device info
105  */
106 struct amdxdna_device_id {
107 	unsigned short device;
108 	u8 revision;
109 	const struct amdxdna_dev_info *dev_info;
110 };
111 
112 /*
113  * struct amdxdna_client - amdxdna client
114  * A per fd data structure for managing context and other user process stuffs.
115  */
116 struct amdxdna_client {
117 	struct list_head		node;
118 	pid_t				pid;
119 	struct srcu_struct		hwctx_srcu;
120 	struct xarray			hwctx_xa;
121 	u32				next_hwctxid;
122 	struct amdxdna_dev		*xdna;
123 	struct drm_file			*filp;
124 
125 	struct mutex			mm_lock; /* protect memory related */
126 	struct amdxdna_gem_obj		*dev_heap;
127 
128 	struct iommu_sva		*sva;
129 	int				pasid;
130 };
131 
132 #define amdxdna_for_each_hwctx(client, hwctx_id, entry)		\
133 	xa_for_each(&(client)->hwctx_xa, hwctx_id, entry)
134 
135 /* Add device info below */
136 extern const struct amdxdna_dev_info dev_npu1_info;
137 extern const struct amdxdna_dev_info dev_npu2_info;
138 extern const struct amdxdna_dev_info dev_npu4_info;
139 extern const struct amdxdna_dev_info dev_npu5_info;
140 extern const struct amdxdna_dev_info dev_npu6_info;
141 
142 int amdxdna_sysfs_init(struct amdxdna_dev *xdna);
143 void amdxdna_sysfs_fini(struct amdxdna_dev *xdna);
144 
145 #endif /* _AMDXDNA_PCI_DRV_H_ */
146