1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2025, Advanced Micro Devices, Inc. 4 */ 5 6 #ifndef _AMDXDNA_ERROR_H_ 7 #define _AMDXDNA_ERROR_H_ 8 9 #include <linux/bitfield.h> 10 #include <linux/bits.h> 11 12 #define AMDXDNA_ERR_DRV_AIE 4 13 #define AMDXDNA_ERR_SEV_CRITICAL 3 14 #define AMDXDNA_ERR_CLASS_AIE 2 15 16 #define AMDXDNA_ERR_NUM_MASK GENMASK_U64(15, 0) 17 #define AMDXDNA_ERR_DRV_MASK GENMASK_U64(23, 16) 18 #define AMDXDNA_ERR_SEV_MASK GENMASK_U64(31, 24) 19 #define AMDXDNA_ERR_MOD_MASK GENMASK_U64(39, 32) 20 #define AMDXDNA_ERR_CLASS_MASK GENMASK_U64(47, 40) 21 22 enum amdxdna_error_num { 23 AMDXDNA_ERROR_NUM_AIE_SATURATION = 3, 24 AMDXDNA_ERROR_NUM_AIE_FP, 25 AMDXDNA_ERROR_NUM_AIE_STREAM, 26 AMDXDNA_ERROR_NUM_AIE_ACCESS, 27 AMDXDNA_ERROR_NUM_AIE_BUS, 28 AMDXDNA_ERROR_NUM_AIE_INSTRUCTION, 29 AMDXDNA_ERROR_NUM_AIE_ECC, 30 AMDXDNA_ERROR_NUM_AIE_LOCK, 31 AMDXDNA_ERROR_NUM_AIE_DMA, 32 AMDXDNA_ERROR_NUM_AIE_MEM_PARITY, 33 AMDXDNA_ERROR_NUM_UNKNOWN = 15, 34 }; 35 36 enum amdxdna_error_module { 37 AMDXDNA_ERROR_MODULE_AIE_CORE = 3, 38 AMDXDNA_ERROR_MODULE_AIE_MEMORY, 39 AMDXDNA_ERROR_MODULE_AIE_SHIM, 40 AMDXDNA_ERROR_MODULE_AIE_NOC, 41 AMDXDNA_ERROR_MODULE_AIE_PL, 42 AMDXDNA_ERROR_MODULE_UNKNOWN = 8, 43 }; 44 45 #define AMDXDNA_ERROR_ENCODE(err_num, err_mod) \ 46 (FIELD_PREP(AMDXDNA_ERR_NUM_MASK, err_num) | \ 47 FIELD_PREP_CONST(AMDXDNA_ERR_DRV_MASK, AMDXDNA_ERR_DRV_AIE) | \ 48 FIELD_PREP_CONST(AMDXDNA_ERR_SEV_MASK, AMDXDNA_ERR_SEV_CRITICAL) | \ 49 FIELD_PREP(AMDXDNA_ERR_MOD_MASK, err_mod) | \ 50 FIELD_PREP_CONST(AMDXDNA_ERR_CLASS_MASK, AMDXDNA_ERR_CLASS_AIE)) 51 52 #define AMDXDNA_EXTRA_ERR_COL_MASK GENMASK_U64(7, 0) 53 #define AMDXDNA_EXTRA_ERR_ROW_MASK GENMASK_U64(15, 8) 54 55 #define AMDXDNA_EXTRA_ERR_ENCODE(row, col) \ 56 (FIELD_PREP(AMDXDNA_EXTRA_ERR_COL_MASK, col) | \ 57 FIELD_PREP(AMDXDNA_EXTRA_ERR_ROW_MASK, row)) 58 59 #endif /* _AMDXDNA_ERROR_H_ */ 60