1be462c97SLizhi Hou /* SPDX-License-Identifier: GPL-2.0 */ 2be462c97SLizhi Hou /* 3be462c97SLizhi Hou * Copyright (C) 2022-2024, Advanced Micro Devices, Inc. 4be462c97SLizhi Hou */ 5be462c97SLizhi Hou 6be462c97SLizhi Hou #ifndef _AMDXDNA_CTX_H_ 7be462c97SLizhi Hou #define _AMDXDNA_CTX_H_ 8be462c97SLizhi Hou 9*ac49797cSLizhi Hou /* Exec buffer command header format */ 10*ac49797cSLizhi Hou #define AMDXDNA_CMD_STATE GENMASK(3, 0) 11*ac49797cSLizhi Hou #define AMDXDNA_CMD_EXTRA_CU_MASK GENMASK(11, 10) 12*ac49797cSLizhi Hou #define AMDXDNA_CMD_COUNT GENMASK(22, 12) 13*ac49797cSLizhi Hou #define AMDXDNA_CMD_OPCODE GENMASK(27, 23) 14*ac49797cSLizhi Hou struct amdxdna_cmd { 15*ac49797cSLizhi Hou u32 header; 16*ac49797cSLizhi Hou u32 data[]; 17*ac49797cSLizhi Hou }; 18*ac49797cSLizhi Hou 19be462c97SLizhi Hou struct amdxdna_hwctx { 20be462c97SLizhi Hou struct amdxdna_client *client; 21be462c97SLizhi Hou struct amdxdna_hwctx_priv *priv; 22be462c97SLizhi Hou char *name; 23be462c97SLizhi Hou 24be462c97SLizhi Hou u32 id; 25be462c97SLizhi Hou u32 max_opc; 26be462c97SLizhi Hou u32 num_tiles; 27be462c97SLizhi Hou u32 mem_size; 28be462c97SLizhi Hou u32 fw_ctx_id; 29be462c97SLizhi Hou u32 col_list_len; 30be462c97SLizhi Hou u32 *col_list; 31be462c97SLizhi Hou u32 start_col; 32be462c97SLizhi Hou u32 num_col; 33be462c97SLizhi Hou #define HWCTX_STAT_INIT 0 34be462c97SLizhi Hou #define HWCTX_STAT_READY 1 35be462c97SLizhi Hou #define HWCTX_STAT_STOP 2 36be462c97SLizhi Hou u32 status; 37be462c97SLizhi Hou u32 old_status; 38be462c97SLizhi Hou 39be462c97SLizhi Hou struct amdxdna_qos_info qos; 40be462c97SLizhi Hou struct amdxdna_hwctx_param_config_cu *cus; 41be462c97SLizhi Hou u32 syncobj_hdl; 42be462c97SLizhi Hou }; 43be462c97SLizhi Hou 44be462c97SLizhi Hou void amdxdna_hwctx_remove_all(struct amdxdna_client *client); 45be462c97SLizhi Hou int amdxdna_drm_create_hwctx_ioctl(struct drm_device *dev, void *data, struct drm_file *filp); 46be462c97SLizhi Hou int amdxdna_drm_config_hwctx_ioctl(struct drm_device *dev, void *data, struct drm_file *filp); 47be462c97SLizhi Hou int amdxdna_drm_destroy_hwctx_ioctl(struct drm_device *dev, void *data, struct drm_file *filp); 48be462c97SLizhi Hou 49be462c97SLizhi Hou #endif /* _AMDXDNA_CTX_H_ */ 50