1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2022-2024, Advanced Micro Devices, Inc. 4 */ 5 6 #ifndef _AIE2_MSG_PRIV_H_ 7 #define _AIE2_MSG_PRIV_H_ 8 9 enum aie2_msg_opcode { 10 MSG_OP_CREATE_CONTEXT = 0x2, 11 MSG_OP_DESTROY_CONTEXT = 0x3, 12 MSG_OP_GET_TELEMETRY = 0x4, 13 MSG_OP_SYNC_BO = 0x7, 14 MSG_OP_EXECUTE_BUFFER_CF = 0xC, 15 MSG_OP_QUERY_COL_STATUS = 0xD, 16 MSG_OP_QUERY_AIE_TILE_INFO = 0xE, 17 MSG_OP_QUERY_AIE_VERSION = 0xF, 18 MSG_OP_EXEC_DPU = 0x10, 19 MSG_OP_CONFIG_CU = 0x11, 20 MSG_OP_CHAIN_EXEC_BUFFER_CF = 0x12, 21 MSG_OP_CHAIN_EXEC_DPU = 0x13, 22 MSG_OP_CONFIG_DEBUG_BO = 0x14, 23 MSG_OP_CHAIN_EXEC_NPU = 0x18, 24 MSG_OP_MAX_XRT_OPCODE, 25 MSG_OP_SUSPEND = 0x101, 26 MSG_OP_RESUME = 0x102, 27 MSG_OP_ASSIGN_MGMT_PASID = 0x103, 28 MSG_OP_INVOKE_SELF_TEST = 0x104, 29 MSG_OP_MAP_HOST_BUFFER = 0x106, 30 MSG_OP_GET_FIRMWARE_VERSION = 0x108, 31 MSG_OP_SET_RUNTIME_CONFIG = 0x10A, 32 MSG_OP_GET_RUNTIME_CONFIG = 0x10B, 33 MSG_OP_REGISTER_ASYNC_EVENT_MSG = 0x10C, 34 MSG_OP_UPDATE_PROPERTY = 0x113, 35 MSG_OP_GET_APP_HEALTH = 0x114, 36 MSG_OP_ADD_HOST_BUFFER = 0x115, 37 MSG_OP_GET_DEV_REVISION = 0x117, 38 MSG_OP_MAX_DRV_OPCODE, 39 MSG_OP_GET_PROTOCOL_VERSION = 0x301, 40 MSG_OP_MAX_OPCODE 41 }; 42 43 enum aie2_msg_status { 44 AIE2_STATUS_SUCCESS = 0x0, 45 /* AIE Error codes */ 46 AIE2_STATUS_AIE_SATURATION_ERROR = 0x1000001, 47 AIE2_STATUS_AIE_FP_ERROR = 0x1000002, 48 AIE2_STATUS_AIE_STREAM_ERROR = 0x1000003, 49 AIE2_STATUS_AIE_ACCESS_ERROR = 0x1000004, 50 AIE2_STATUS_AIE_BUS_ERROR = 0x1000005, 51 AIE2_STATUS_AIE_INSTRUCTION_ERROR = 0x1000006, 52 AIE2_STATUS_AIE_ECC_ERROR = 0x1000007, 53 AIE2_STATUS_AIE_LOCK_ERROR = 0x1000008, 54 AIE2_STATUS_AIE_DMA_ERROR = 0x1000009, 55 AIE2_STATUS_AIE_MEM_PARITY_ERROR = 0x100000a, 56 AIE2_STATUS_AIE_PWR_CFG_ERROR = 0x100000b, 57 AIE2_STATUS_AIE_BACKTRACK_ERROR = 0x100000c, 58 AIE2_STATUS_MAX_AIE_STATUS_CODE, 59 /* MGMT ERT Error codes */ 60 AIE2_STATUS_MGMT_ERT_SELF_TEST_FAILURE = 0x2000001, 61 AIE2_STATUS_MGMT_ERT_HASH_MISMATCH, 62 AIE2_STATUS_MGMT_ERT_NOAVAIL, 63 AIE2_STATUS_MGMT_ERT_INVALID_PARAM, 64 AIE2_STATUS_MGMT_ERT_ENTER_SUSPEND_FAILURE, 65 AIE2_STATUS_MGMT_ERT_BUSY, 66 AIE2_STATUS_MGMT_ERT_APPLICATION_ACTIVE, 67 MAX_MGMT_ERT_STATUS_CODE, 68 /* APP ERT Error codes */ 69 AIE2_STATUS_APP_ERT_FIRST_ERROR = 0x3000001, 70 AIE2_STATUS_APP_INVALID_INSTR, 71 AIE2_STATUS_APP_LOAD_PDI_FAIL, 72 MAX_APP_ERT_STATUS_CODE, 73 /* NPU RTOS Error Codes */ 74 AIE2_STATUS_INVALID_INPUT_BUFFER = 0x4000001, 75 AIE2_STATUS_INVALID_COMMAND, 76 AIE2_STATUS_INVALID_PARAM, 77 AIE2_STATUS_INVALID_OPERATION = 0x4000006, 78 AIE2_STATUS_ASYNC_EVENT_MSGS_FULL, 79 AIE2_STATUS_MAX_RTOS_STATUS_CODE, 80 MAX_AIE2_STATUS_CODE 81 }; 82 83 struct assign_mgmt_pasid_req { 84 __u16 pasid; 85 __u16 reserved; 86 } __packed; 87 88 struct assign_mgmt_pasid_resp { 89 enum aie2_msg_status status; 90 } __packed; 91 92 struct map_host_buffer_req { 93 __u32 context_id; 94 __u64 buf_addr; 95 __u64 buf_size; 96 } __packed; 97 98 struct map_host_buffer_resp { 99 enum aie2_msg_status status; 100 } __packed; 101 102 #define MAX_CQ_PAIRS 2 103 struct cq_info { 104 __u32 head_addr; 105 __u32 tail_addr; 106 __u32 buf_addr; 107 __u32 buf_size; 108 }; 109 110 struct cq_pair { 111 struct cq_info x2i_q; 112 struct cq_info i2x_q; 113 }; 114 115 #define PRIORITY_REALTIME 1 116 #define PRIORITY_HIGH 2 117 #define PRIORITY_NORMAL 3 118 #define PRIORITY_LOW 4 119 120 struct create_ctx_req { 121 __u32 aie_type; 122 __u8 start_col; 123 __u8 num_col; 124 __u8 num_unused_col; 125 __u8 reserved; 126 __u8 num_cq_pairs_requested; 127 __u8 reserved1; 128 __u16 pasid; 129 __u32 pad[2]; 130 __u32 sec_comm_target_type; 131 __u32 context_priority; 132 } __packed; 133 134 struct create_ctx_resp { 135 enum aie2_msg_status status; 136 __u32 context_id; 137 __u16 msix_id; 138 __u8 num_cq_pairs_allocated; 139 __u8 reserved; 140 struct cq_pair cq_pair[MAX_CQ_PAIRS]; 141 } __packed; 142 143 struct destroy_ctx_req { 144 __u32 context_id; 145 } __packed; 146 147 struct destroy_ctx_resp { 148 enum aie2_msg_status status; 149 } __packed; 150 151 enum telemetry_type { 152 TELEMETRY_TYPE_DISABLED, 153 TELEMETRY_TYPE_HEALTH, 154 TELEMETRY_TYPE_ERROR_INFO, 155 TELEMETRY_TYPE_PROFILING, 156 TELEMETRY_TYPE_DEBUG, 157 MAX_TELEMETRY_TYPE 158 }; 159 160 struct get_telemetry_req { 161 enum telemetry_type type; 162 __u64 buf_addr; 163 __u32 buf_size; 164 } __packed; 165 166 struct get_telemetry_resp { 167 __u32 major; 168 __u32 minor; 169 __u32 size; 170 enum aie2_msg_status status; 171 } __packed; 172 173 struct execute_buffer_req { 174 __u32 cu_idx; 175 __u32 payload[19]; 176 } __packed; 177 178 struct exec_dpu_req { 179 __u64 inst_buf_addr; 180 __u32 inst_size; 181 __u32 inst_prop_cnt; 182 __u32 cu_idx; 183 __u32 payload[35]; 184 } __packed; 185 186 enum exec_npu_type { 187 EXEC_NPU_TYPE_NON_ELF = 0x1, 188 EXEC_NPU_TYPE_PARTIAL_ELF = 0x2, 189 EXEC_NPU_TYPE_PREEMPT = 0x3, 190 EXEC_NPU_TYPE_ELF = 0x4, 191 }; 192 193 union exec_req { 194 struct execute_buffer_req ebuf; 195 struct exec_dpu_req dpu_req; 196 }; 197 198 struct execute_buffer_resp { 199 enum aie2_msg_status status; 200 } __packed; 201 202 struct aie_tile_info { 203 __u32 size; 204 __u16 major; 205 __u16 minor; 206 __u16 cols; 207 __u16 rows; 208 __u16 core_rows; 209 __u16 mem_rows; 210 __u16 shim_rows; 211 __u16 core_row_start; 212 __u16 mem_row_start; 213 __u16 shim_row_start; 214 __u16 core_dma_channels; 215 __u16 mem_dma_channels; 216 __u16 shim_dma_channels; 217 __u16 core_locks; 218 __u16 mem_locks; 219 __u16 shim_locks; 220 __u16 core_events; 221 __u16 mem_events; 222 __u16 shim_events; 223 __u16 reserved; 224 }; 225 226 struct aie_tile_info_req { 227 __u32 reserved; 228 } __packed; 229 230 struct aie_tile_info_resp { 231 enum aie2_msg_status status; 232 struct aie_tile_info info; 233 } __packed; 234 235 struct aie_version_info_req { 236 __u32 reserved; 237 } __packed; 238 239 struct aie_version_info_resp { 240 enum aie2_msg_status status; 241 __u16 major; 242 __u16 minor; 243 } __packed; 244 245 struct aie_column_info_req { 246 __u64 dump_buff_addr; 247 __u32 dump_buff_size; 248 __u32 num_cols; 249 __u32 aie_bitmap; 250 } __packed; 251 252 struct aie_column_info_resp { 253 enum aie2_msg_status status; 254 __u32 size; 255 } __packed; 256 257 struct suspend_req { 258 __u32 place_holder; 259 } __packed; 260 261 struct suspend_resp { 262 enum aie2_msg_status status; 263 } __packed; 264 265 struct resume_req { 266 __u32 place_holder; 267 } __packed; 268 269 struct resume_resp { 270 enum aie2_msg_status status; 271 } __packed; 272 273 struct check_header_hash_req { 274 __u64 hash_high; 275 __u64 hash_low; 276 } __packed; 277 278 struct check_header_hash_resp { 279 enum aie2_msg_status status; 280 } __packed; 281 282 struct query_error_req { 283 __u64 buf_addr; 284 __u32 buf_size; 285 __u32 next_row; 286 __u32 next_column; 287 __u32 next_module; 288 } __packed; 289 290 struct query_error_resp { 291 enum aie2_msg_status status; 292 __u32 num_err; 293 __u32 has_next_err; 294 __u32 next_row; 295 __u32 next_column; 296 __u32 next_module; 297 } __packed; 298 299 struct protocol_version_req { 300 __u32 reserved; 301 } __packed; 302 303 struct protocol_version_resp { 304 enum aie2_msg_status status; 305 __u32 major; 306 __u32 minor; 307 } __packed; 308 309 struct firmware_version_req { 310 __u32 reserved; 311 } __packed; 312 313 struct firmware_version_resp { 314 enum aie2_msg_status status; 315 __u32 major; 316 __u32 minor; 317 __u32 sub; 318 __u32 build; 319 } __packed; 320 321 #define MAX_NUM_CUS 32 322 #define AIE2_MSG_CFG_CU_PDI_ADDR GENMASK(16, 0) 323 #define AIE2_MSG_CFG_CU_FUNC GENMASK(24, 17) 324 struct config_cu_req { 325 __u32 num_cus; 326 __u32 cfgs[MAX_NUM_CUS]; 327 } __packed; 328 329 struct config_cu_resp { 330 enum aie2_msg_status status; 331 } __packed; 332 333 struct set_runtime_cfg_req { 334 __u32 type; 335 __u64 value; 336 } __packed; 337 338 struct set_runtime_cfg_resp { 339 enum aie2_msg_status status; 340 } __packed; 341 342 struct get_runtime_cfg_req { 343 __u32 type; 344 } __packed; 345 346 struct get_runtime_cfg_resp { 347 enum aie2_msg_status status; 348 __u64 value; 349 } __packed; 350 351 enum async_event_type { 352 ASYNC_EVENT_TYPE_AIE_ERROR, 353 ASYNC_EVENT_TYPE_EXCEPTION, 354 MAX_ASYNC_EVENT_TYPE 355 }; 356 357 #define ASYNC_BUF_SIZE SZ_8K 358 struct async_event_msg_req { 359 __u64 buf_addr; 360 __u32 buf_size; 361 } __packed; 362 363 struct async_event_msg_resp { 364 enum aie2_msg_status status; 365 enum async_event_type type; 366 } __packed; 367 368 #define MAX_CHAIN_CMDBUF_SIZE SZ_4K 369 370 struct cmd_chain_slot_execbuf_cf { 371 __u32 cu_idx; 372 __u32 arg_cnt; 373 __u32 args[] __counted_by(arg_cnt); 374 }; 375 376 struct cmd_chain_slot_dpu { 377 __u64 inst_buf_addr; 378 __u32 inst_size; 379 __u32 inst_prop_cnt; 380 __u32 cu_idx; 381 __u32 arg_cnt; 382 #define MAX_DPU_ARGS_SIZE (34 * sizeof(__u32)) 383 __u32 args[] __counted_by(arg_cnt); 384 }; 385 386 #define MAX_NPU_ARGS_SIZE (26 * sizeof(__u32)) 387 #define AIE2_EXEC_BUFFER_KERNEL_OP_TXN 3 388 struct cmd_chain_slot_npu { 389 enum exec_npu_type type; 390 u64 inst_buf_addr; 391 u64 save_buf_addr; 392 u64 restore_buf_addr; 393 u32 inst_size; 394 u32 save_size; 395 u32 restore_size; 396 u32 inst_prop_cnt; 397 u32 cu_idx; 398 u32 arg_cnt; 399 u32 args[] __counted_by(arg_cnt); 400 } __packed; 401 402 struct cmd_chain_req { 403 __u64 buf_addr; 404 __u32 buf_size; 405 __u32 count; 406 } __packed; 407 408 struct cmd_chain_npu_req { 409 u32 flags; 410 u32 reserved; 411 u64 buf_addr; 412 u32 buf_size; 413 u32 count; 414 } __packed; 415 416 union exec_chain_req { 417 struct cmd_chain_npu_req npu_req; 418 struct cmd_chain_req req; 419 }; 420 421 struct cmd_chain_resp { 422 enum aie2_msg_status status; 423 __u32 fail_cmd_idx; 424 enum aie2_msg_status fail_cmd_status; 425 } __packed; 426 427 #define AIE2_MSG_SYNC_BO_SRC_TYPE GENMASK(3, 0) 428 #define AIE2_MSG_SYNC_BO_DST_TYPE GENMASK(7, 4) 429 struct sync_bo_req { 430 __u64 src_addr; 431 __u64 dst_addr; 432 __u32 size; 433 #define SYNC_BO_DEV_MEM 0 434 #define SYNC_BO_HOST_MEM 2 435 __u32 type; 436 } __packed; 437 438 struct sync_bo_resp { 439 enum aie2_msg_status status; 440 } __packed; 441 442 #define DEBUG_BO_UNREGISTER 0 443 #define DEBUG_BO_REGISTER 1 444 struct config_debug_bo_req { 445 __u64 offset; 446 __u64 size; 447 /* 448 * config operations. 449 * DEBUG_BO_REGISTER: Register debug buffer 450 * DEBUG_BO_UNREGISTER: Unregister debug buffer 451 */ 452 __u32 config; 453 } __packed; 454 455 struct config_debug_bo_resp { 456 enum aie2_msg_status status; 457 } __packed; 458 459 struct fatal_error_info { 460 __u32 fatal_type; /* Fatal error type */ 461 __u32 exception_type; /* Only valid if fatal_type is a specific value */ 462 __u32 exception_argument; /* Argument based on exception type */ 463 __u32 exception_pc; /* Program Counter at the time of the exception */ 464 __u32 app_module; /* Error module name */ 465 __u32 task_index; /* Index of the task in which the error occurred */ 466 __u32 reserved[127]; 467 }; 468 469 struct app_health_report { 470 __u16 major; 471 __u16 minor; 472 __u32 size; 473 __u32 context_id; 474 /* 475 * Program Counter (PC) of the last initiated DPU opcode, as reported by the ERT 476 * application. Before execution begins or after successful completion, the value is set 477 * to UINT_MAX. If execution halts prematurely due to an error, this field retains the 478 * opcode's PC value. 479 * Note: To optimize performance, the ERT may simplify certain aspects of reporting. 480 * Proper interpretation requires familiarity with the implementation details. 481 */ 482 __u32 dpu_pc; 483 /* 484 * Index of the last initiated TXN opcode. 485 * Before execution starts or after successful completion, the value is set to UINT_MAX. 486 * If execution halts prematurely due to an error, this field retains the opcode's ID. 487 * Note: To optimize performance, the ERT may simplify certain aspects of reporting. 488 * Proper interpretation requires familiarity with the implementation details. 489 */ 490 __u32 txn_op_id; 491 /* The PC of the context at the time of the report */ 492 __u32 ctx_pc; 493 struct fatal_error_info fatal_info; 494 /* Index of the most recently executed run list entry. */ 495 __u32 run_list_id; 496 }; 497 498 struct get_app_health_req { 499 __u32 context_id; 500 __u32 buf_size; 501 __u64 buf_addr; 502 } __packed; 503 504 struct get_app_health_resp { 505 enum aie2_msg_status status; 506 __u32 required_buffer_size; 507 __u32 reserved[7]; 508 } __packed; 509 510 struct update_property_req { 511 #define UPDATE_PROPERTY_TIME_QUOTA 0 512 __u32 type; 513 #define AIE2_UPDATE_PROPERTY_ALL_CTX 0xFF 514 __u8 context_id; 515 __u8 reserved[7]; 516 __u32 time_quota_us; 517 __u32 reserved1; 518 } __packed; 519 520 struct update_property_resp { 521 enum aie2_msg_status status; 522 } __packed; 523 524 enum aie2_dev_revision { 525 AIE2_DEV_REVISION_STXA = 1, 526 AIE2_DEV_REVISION_STXB, 527 AIE2_DEV_REVISION_KRK1, 528 AIE2_DEV_REVISION_KRK2, 529 AIE2_DEV_REVISION_HALO, 530 AIE2_DEV_REVISION_GPT1, 531 AIE2_DEV_REVISION_GPT2, 532 AIE2_DEV_REVISION_GPT3, 533 AIE2_DEV_REVISION_UNKN, 534 }; 535 536 struct get_dev_revision_req { 537 __u32 place_holder; 538 } __packed; 539 540 struct get_dev_revision_resp { 541 enum aie2_msg_status status; 542 enum aie2_dev_revision rev; 543 __u32 raw_fuse_data; 544 } __packed; 545 546 #endif /* _AIE2_MSG_PRIV_H_ */ 547