1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2022-2024, Advanced Micro Devices, Inc. 4 */ 5 6 #ifndef _AIE2_MSG_PRIV_H_ 7 #define _AIE2_MSG_PRIV_H_ 8 9 enum aie2_msg_opcode { 10 MSG_OP_CREATE_CONTEXT = 0x2, 11 MSG_OP_DESTROY_CONTEXT = 0x3, 12 MSG_OP_GET_TELEMETRY = 0x4, 13 MSG_OP_SYNC_BO = 0x7, 14 MSG_OP_EXECUTE_BUFFER_CF = 0xC, 15 MSG_OP_QUERY_COL_STATUS = 0xD, 16 MSG_OP_QUERY_AIE_TILE_INFO = 0xE, 17 MSG_OP_QUERY_AIE_VERSION = 0xF, 18 MSG_OP_EXEC_DPU = 0x10, 19 MSG_OP_CONFIG_CU = 0x11, 20 MSG_OP_CHAIN_EXEC_BUFFER_CF = 0x12, 21 MSG_OP_CHAIN_EXEC_DPU = 0x13, 22 MSG_OP_CONFIG_DEBUG_BO = 0x14, 23 MSG_OP_CHAIN_EXEC_NPU = 0x18, 24 MSG_OP_MAX_XRT_OPCODE, 25 MSG_OP_SUSPEND = 0x101, 26 MSG_OP_RESUME = 0x102, 27 MSG_OP_ASSIGN_MGMT_PASID = 0x103, 28 MSG_OP_INVOKE_SELF_TEST = 0x104, 29 MSG_OP_MAP_HOST_BUFFER = 0x106, 30 MSG_OP_GET_FIRMWARE_VERSION = 0x108, 31 MSG_OP_SET_RUNTIME_CONFIG = 0x10A, 32 MSG_OP_GET_RUNTIME_CONFIG = 0x10B, 33 MSG_OP_REGISTER_ASYNC_EVENT_MSG = 0x10C, 34 MSG_OP_MAX_DRV_OPCODE, 35 MSG_OP_GET_PROTOCOL_VERSION = 0x301, 36 MSG_OP_MAX_OPCODE 37 }; 38 39 enum aie2_msg_status { 40 AIE2_STATUS_SUCCESS = 0x0, 41 /* AIE Error codes */ 42 AIE2_STATUS_AIE_SATURATION_ERROR = 0x1000001, 43 AIE2_STATUS_AIE_FP_ERROR = 0x1000002, 44 AIE2_STATUS_AIE_STREAM_ERROR = 0x1000003, 45 AIE2_STATUS_AIE_ACCESS_ERROR = 0x1000004, 46 AIE2_STATUS_AIE_BUS_ERROR = 0x1000005, 47 AIE2_STATUS_AIE_INSTRUCTION_ERROR = 0x1000006, 48 AIE2_STATUS_AIE_ECC_ERROR = 0x1000007, 49 AIE2_STATUS_AIE_LOCK_ERROR = 0x1000008, 50 AIE2_STATUS_AIE_DMA_ERROR = 0x1000009, 51 AIE2_STATUS_AIE_MEM_PARITY_ERROR = 0x100000a, 52 AIE2_STATUS_AIE_PWR_CFG_ERROR = 0x100000b, 53 AIE2_STATUS_AIE_BACKTRACK_ERROR = 0x100000c, 54 AIE2_STATUS_MAX_AIE_STATUS_CODE, 55 /* MGMT ERT Error codes */ 56 AIE2_STATUS_MGMT_ERT_SELF_TEST_FAILURE = 0x2000001, 57 AIE2_STATUS_MGMT_ERT_HASH_MISMATCH, 58 AIE2_STATUS_MGMT_ERT_NOAVAIL, 59 AIE2_STATUS_MGMT_ERT_INVALID_PARAM, 60 AIE2_STATUS_MGMT_ERT_ENTER_SUSPEND_FAILURE, 61 AIE2_STATUS_MGMT_ERT_BUSY, 62 AIE2_STATUS_MGMT_ERT_APPLICATION_ACTIVE, 63 MAX_MGMT_ERT_STATUS_CODE, 64 /* APP ERT Error codes */ 65 AIE2_STATUS_APP_ERT_FIRST_ERROR = 0x3000001, 66 AIE2_STATUS_APP_INVALID_INSTR, 67 AIE2_STATUS_APP_LOAD_PDI_FAIL, 68 MAX_APP_ERT_STATUS_CODE, 69 /* NPU RTOS Error Codes */ 70 AIE2_STATUS_INVALID_INPUT_BUFFER = 0x4000001, 71 AIE2_STATUS_INVALID_COMMAND, 72 AIE2_STATUS_INVALID_PARAM, 73 AIE2_STATUS_INVALID_OPERATION = 0x4000006, 74 AIE2_STATUS_ASYNC_EVENT_MSGS_FULL, 75 AIE2_STATUS_MAX_RTOS_STATUS_CODE, 76 MAX_AIE2_STATUS_CODE 77 }; 78 79 struct assign_mgmt_pasid_req { 80 __u16 pasid; 81 __u16 reserved; 82 } __packed; 83 84 struct assign_mgmt_pasid_resp { 85 enum aie2_msg_status status; 86 } __packed; 87 88 struct map_host_buffer_req { 89 __u32 context_id; 90 __u64 buf_addr; 91 __u64 buf_size; 92 } __packed; 93 94 struct map_host_buffer_resp { 95 enum aie2_msg_status status; 96 } __packed; 97 98 #define MAX_CQ_PAIRS 2 99 struct cq_info { 100 __u32 head_addr; 101 __u32 tail_addr; 102 __u32 buf_addr; 103 __u32 buf_size; 104 }; 105 106 struct cq_pair { 107 struct cq_info x2i_q; 108 struct cq_info i2x_q; 109 }; 110 111 struct create_ctx_req { 112 __u32 aie_type; 113 __u8 start_col; 114 __u8 num_col; 115 __u16 reserved; 116 __u8 num_cq_pairs_requested; 117 __u8 reserved1; 118 __u16 pasid; 119 __u32 pad[2]; 120 __u32 sec_comm_target_type; 121 __u32 context_priority; 122 } __packed; 123 124 struct create_ctx_resp { 125 enum aie2_msg_status status; 126 __u32 context_id; 127 __u16 msix_id; 128 __u8 num_cq_pairs_allocated; 129 __u8 reserved; 130 struct cq_pair cq_pair[MAX_CQ_PAIRS]; 131 } __packed; 132 133 struct destroy_ctx_req { 134 __u32 context_id; 135 } __packed; 136 137 struct destroy_ctx_resp { 138 enum aie2_msg_status status; 139 } __packed; 140 141 enum telemetry_type { 142 TELEMETRY_TYPE_DISABLED, 143 TELEMETRY_TYPE_HEALTH, 144 TELEMETRY_TYPE_ERROR_INFO, 145 TELEMETRY_TYPE_PROFILING, 146 TELEMETRY_TYPE_DEBUG, 147 MAX_TELEMETRY_TYPE 148 }; 149 150 struct get_telemetry_req { 151 enum telemetry_type type; 152 __u64 buf_addr; 153 __u32 buf_size; 154 } __packed; 155 156 struct get_telemetry_resp { 157 __u32 major; 158 __u32 minor; 159 __u32 size; 160 enum aie2_msg_status status; 161 } __packed; 162 163 struct execute_buffer_req { 164 __u32 cu_idx; 165 __u32 payload[19]; 166 } __packed; 167 168 struct exec_dpu_req { 169 __u64 inst_buf_addr; 170 __u32 inst_size; 171 __u32 inst_prop_cnt; 172 __u32 cu_idx; 173 __u32 payload[35]; 174 } __packed; 175 176 enum exec_npu_type { 177 EXEC_NPU_TYPE_NON_ELF = 0x1, 178 EXEC_NPU_TYPE_PARTIAL_ELF = 0x2, 179 }; 180 181 union exec_req { 182 struct execute_buffer_req ebuf; 183 struct exec_dpu_req dpu_req; 184 }; 185 186 struct execute_buffer_resp { 187 enum aie2_msg_status status; 188 } __packed; 189 190 struct aie_tile_info { 191 __u32 size; 192 __u16 major; 193 __u16 minor; 194 __u16 cols; 195 __u16 rows; 196 __u16 core_rows; 197 __u16 mem_rows; 198 __u16 shim_rows; 199 __u16 core_row_start; 200 __u16 mem_row_start; 201 __u16 shim_row_start; 202 __u16 core_dma_channels; 203 __u16 mem_dma_channels; 204 __u16 shim_dma_channels; 205 __u16 core_locks; 206 __u16 mem_locks; 207 __u16 shim_locks; 208 __u16 core_events; 209 __u16 mem_events; 210 __u16 shim_events; 211 __u16 reserved; 212 }; 213 214 struct aie_tile_info_req { 215 __u32 reserved; 216 } __packed; 217 218 struct aie_tile_info_resp { 219 enum aie2_msg_status status; 220 struct aie_tile_info info; 221 } __packed; 222 223 struct aie_version_info_req { 224 __u32 reserved; 225 } __packed; 226 227 struct aie_version_info_resp { 228 enum aie2_msg_status status; 229 __u16 major; 230 __u16 minor; 231 } __packed; 232 233 struct aie_column_info_req { 234 __u64 dump_buff_addr; 235 __u32 dump_buff_size; 236 __u32 num_cols; 237 __u32 aie_bitmap; 238 } __packed; 239 240 struct aie_column_info_resp { 241 enum aie2_msg_status status; 242 __u32 size; 243 } __packed; 244 245 struct suspend_req { 246 __u32 place_holder; 247 } __packed; 248 249 struct suspend_resp { 250 enum aie2_msg_status status; 251 } __packed; 252 253 struct resume_req { 254 __u32 place_holder; 255 } __packed; 256 257 struct resume_resp { 258 enum aie2_msg_status status; 259 } __packed; 260 261 struct check_header_hash_req { 262 __u64 hash_high; 263 __u64 hash_low; 264 } __packed; 265 266 struct check_header_hash_resp { 267 enum aie2_msg_status status; 268 } __packed; 269 270 struct query_error_req { 271 __u64 buf_addr; 272 __u32 buf_size; 273 __u32 next_row; 274 __u32 next_column; 275 __u32 next_module; 276 } __packed; 277 278 struct query_error_resp { 279 enum aie2_msg_status status; 280 __u32 num_err; 281 __u32 has_next_err; 282 __u32 next_row; 283 __u32 next_column; 284 __u32 next_module; 285 } __packed; 286 287 struct protocol_version_req { 288 __u32 reserved; 289 } __packed; 290 291 struct protocol_version_resp { 292 enum aie2_msg_status status; 293 __u32 major; 294 __u32 minor; 295 } __packed; 296 297 struct firmware_version_req { 298 __u32 reserved; 299 } __packed; 300 301 struct firmware_version_resp { 302 enum aie2_msg_status status; 303 __u32 major; 304 __u32 minor; 305 __u32 sub; 306 __u32 build; 307 } __packed; 308 309 #define MAX_NUM_CUS 32 310 #define AIE2_MSG_CFG_CU_PDI_ADDR GENMASK(16, 0) 311 #define AIE2_MSG_CFG_CU_FUNC GENMASK(24, 17) 312 struct config_cu_req { 313 __u32 num_cus; 314 __u32 cfgs[MAX_NUM_CUS]; 315 } __packed; 316 317 struct config_cu_resp { 318 enum aie2_msg_status status; 319 } __packed; 320 321 struct set_runtime_cfg_req { 322 __u32 type; 323 __u64 value; 324 } __packed; 325 326 struct set_runtime_cfg_resp { 327 enum aie2_msg_status status; 328 } __packed; 329 330 struct get_runtime_cfg_req { 331 __u32 type; 332 } __packed; 333 334 struct get_runtime_cfg_resp { 335 enum aie2_msg_status status; 336 __u64 value; 337 } __packed; 338 339 enum async_event_type { 340 ASYNC_EVENT_TYPE_AIE_ERROR, 341 ASYNC_EVENT_TYPE_EXCEPTION, 342 MAX_ASYNC_EVENT_TYPE 343 }; 344 345 #define ASYNC_BUF_SIZE SZ_8K 346 struct async_event_msg_req { 347 __u64 buf_addr; 348 __u32 buf_size; 349 } __packed; 350 351 struct async_event_msg_resp { 352 enum aie2_msg_status status; 353 enum async_event_type type; 354 } __packed; 355 356 #define MAX_CHAIN_CMDBUF_SIZE SZ_4K 357 358 struct cmd_chain_slot_execbuf_cf { 359 __u32 cu_idx; 360 __u32 arg_cnt; 361 __u32 args[] __counted_by(arg_cnt); 362 }; 363 364 struct cmd_chain_slot_dpu { 365 __u64 inst_buf_addr; 366 __u32 inst_size; 367 __u32 inst_prop_cnt; 368 __u32 cu_idx; 369 __u32 arg_cnt; 370 #define MAX_DPU_ARGS_SIZE (34 * sizeof(__u32)) 371 __u32 args[] __counted_by(arg_cnt); 372 }; 373 374 #define MAX_NPU_ARGS_SIZE (26 * sizeof(__u32)) 375 struct cmd_chain_slot_npu { 376 enum exec_npu_type type; 377 u64 inst_buf_addr; 378 u64 save_buf_addr; 379 u64 restore_buf_addr; 380 u32 inst_size; 381 u32 save_size; 382 u32 restore_size; 383 u32 inst_prop_cnt; 384 u32 cu_idx; 385 u32 arg_cnt; 386 u32 args[] __counted_by(arg_cnt); 387 } __packed; 388 389 struct cmd_chain_req { 390 __u64 buf_addr; 391 __u32 buf_size; 392 __u32 count; 393 } __packed; 394 395 struct cmd_chain_npu_req { 396 u32 flags; 397 u32 reserved; 398 u64 buf_addr; 399 u32 buf_size; 400 u32 count; 401 } __packed; 402 403 union exec_chain_req { 404 struct cmd_chain_npu_req npu_req; 405 struct cmd_chain_req req; 406 }; 407 408 struct cmd_chain_resp { 409 enum aie2_msg_status status; 410 __u32 fail_cmd_idx; 411 enum aie2_msg_status fail_cmd_status; 412 } __packed; 413 414 #define AIE2_MSG_SYNC_BO_SRC_TYPE GENMASK(3, 0) 415 #define AIE2_MSG_SYNC_BO_DST_TYPE GENMASK(7, 4) 416 struct sync_bo_req { 417 __u64 src_addr; 418 __u64 dst_addr; 419 __u32 size; 420 #define SYNC_BO_DEV_MEM 0 421 #define SYNC_BO_HOST_MEM 2 422 __u32 type; 423 } __packed; 424 425 struct sync_bo_resp { 426 enum aie2_msg_status status; 427 } __packed; 428 429 #define DEBUG_BO_UNREGISTER 0 430 #define DEBUG_BO_REGISTER 1 431 struct config_debug_bo_req { 432 __u64 offset; 433 __u64 size; 434 /* 435 * config operations. 436 * DEBUG_BO_REGISTER: Register debug buffer 437 * DEBUG_BO_UNREGISTER: Unregister debug buffer 438 */ 439 __u32 config; 440 } __packed; 441 442 struct config_debug_bo_resp { 443 enum aie2_msg_status status; 444 } __packed; 445 #endif /* _AIE2_MSG_PRIV_H_ */ 446