1 /* 2 * copy offload engine support 3 * 4 * Copyright © 2006, Intel Corporation. 5 * 6 * Dan Williams <dan.j.williams@intel.com> 7 * 8 * with architecture considerations by: 9 * Neil Brown <neilb@suse.de> 10 * Jeff Garzik <jeff@garzik.org> 11 * 12 * This program is free software; you can redistribute it and/or modify it 13 * under the terms and conditions of the GNU General Public License, 14 * version 2, as published by the Free Software Foundation. 15 * 16 * This program is distributed in the hope it will be useful, but WITHOUT 17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 19 * more details. 20 * 21 * You should have received a copy of the GNU General Public License along with 22 * this program; if not, write to the Free Software Foundation, Inc., 23 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 24 * 25 */ 26 #include <linux/kernel.h> 27 #include <linux/highmem.h> 28 #include <linux/module.h> 29 #include <linux/mm.h> 30 #include <linux/dma-mapping.h> 31 #include <linux/async_tx.h> 32 33 /** 34 * async_memcpy - attempt to copy memory with a dma engine. 35 * @dest: destination page 36 * @src: src page 37 * @dest_offset: offset into 'dest' to start transaction 38 * @src_offset: offset into 'src' to start transaction 39 * @len: length in bytes 40 * @submit: submission / completion modifiers 41 * 42 * honored flags: ASYNC_TX_ACK 43 */ 44 struct dma_async_tx_descriptor * 45 async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset, 46 unsigned int src_offset, size_t len, 47 struct async_submit_ctl *submit) 48 { 49 struct dma_chan *chan = async_tx_find_channel(submit, DMA_MEMCPY, 50 &dest, 1, &src, 1, len); 51 struct dma_device *device = chan ? chan->device : NULL; 52 struct dma_async_tx_descriptor *tx = NULL; 53 struct dmaengine_unmap_data *unmap = NULL; 54 55 if (device) 56 unmap = dmaengine_get_unmap_data(device->dev, 2, GFP_NOIO); 57 58 if (unmap && is_dma_copy_aligned(device, src_offset, dest_offset, len)) { 59 unsigned long dma_prep_flags = 0; 60 61 if (submit->cb_fn) 62 dma_prep_flags |= DMA_PREP_INTERRUPT; 63 if (submit->flags & ASYNC_TX_FENCE) 64 dma_prep_flags |= DMA_PREP_FENCE; 65 66 unmap->to_cnt = 1; 67 unmap->addr[0] = dma_map_page(device->dev, src, src_offset, len, 68 DMA_TO_DEVICE); 69 unmap->from_cnt = 1; 70 unmap->addr[1] = dma_map_page(device->dev, dest, dest_offset, len, 71 DMA_FROM_DEVICE); 72 unmap->len = len; 73 74 tx = device->device_prep_dma_memcpy(chan, unmap->addr[1], 75 unmap->addr[0], len, 76 dma_prep_flags); 77 } 78 79 if (tx) { 80 pr_debug("%s: (async) len: %zu\n", __func__, len); 81 82 dma_set_unmap(tx, unmap); 83 async_tx_submit(chan, tx, submit); 84 } else { 85 void *dest_buf, *src_buf; 86 pr_debug("%s: (sync) len: %zu\n", __func__, len); 87 88 /* wait for any prerequisite operations */ 89 async_tx_quiesce(&submit->depend_tx); 90 91 dest_buf = kmap_atomic(dest) + dest_offset; 92 src_buf = kmap_atomic(src) + src_offset; 93 94 memcpy(dest_buf, src_buf, len); 95 96 kunmap_atomic(src_buf); 97 kunmap_atomic(dest_buf); 98 99 async_tx_sync_epilog(submit); 100 } 101 102 dmaengine_unmap_put(unmap); 103 104 return tx; 105 } 106 EXPORT_SYMBOL_GPL(async_memcpy); 107 108 MODULE_AUTHOR("Intel Corporation"); 109 MODULE_DESCRIPTION("asynchronous memcpy api"); 110 MODULE_LICENSE("GPL"); 111