1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * 4 * arch/xtensa/platform/xtavnet/setup.c 5 * 6 * ... 7 * 8 * Authors: Chris Zankel <chris@zankel.net> 9 * Joe Taylor <joe@tensilica.com> 10 * 11 * Copyright 2001 - 2006 Tensilica Inc. 12 */ 13 #include <linux/stddef.h> 14 #include <linux/kernel.h> 15 #include <linux/init.h> 16 #include <linux/io.h> 17 #include <linux/errno.h> 18 #include <linux/reboot.h> 19 #include <linux/kdev_t.h> 20 #include <linux/types.h> 21 #include <linux/major.h> 22 #include <linux/console.h> 23 #include <linux/delay.h> 24 #include <linux/of.h> 25 #include <linux/clk-provider.h> 26 #include <linux/of_address.h> 27 #include <linux/slab.h> 28 29 #include <asm/timex.h> 30 #include <asm/processor.h> 31 #include <asm/platform.h> 32 #include <asm/bootparam.h> 33 #include <platform/lcd.h> 34 #include <platform/hardware.h> 35 36 static int xtfpga_power_off(struct sys_off_data *unused) 37 { 38 lcd_disp_at_pos("POWEROFF", 0); 39 local_irq_disable(); 40 while (1) 41 cpu_relax(); 42 return NOTIFY_DONE; 43 } 44 45 static int xtfpga_restart(struct sys_off_data *unused) 46 { 47 /* Try software reset first. */ 48 WRITE_ONCE(*(u32 *)XTFPGA_SWRST_VADDR, 0xdead); 49 50 /* If software reset did not work, flush and reset the mmu, 51 * simulate a processor reset, and jump to the reset vector. 52 */ 53 cpu_reset(); 54 55 return NOTIFY_DONE; 56 } 57 58 #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT 59 60 void __init platform_calibrate_ccount(void) 61 { 62 ccount_freq = *(long *)XTFPGA_CLKFRQ_VADDR; 63 } 64 65 #endif 66 67 static void __init xtfpga_register_handlers(void) 68 { 69 register_sys_off_handler(SYS_OFF_MODE_RESTART, 70 SYS_OFF_PRIO_PLATFORM, 71 xtfpga_restart, NULL); 72 register_sys_off_handler(SYS_OFF_MODE_POWER_OFF, 73 SYS_OFF_PRIO_DEFAULT, 74 xtfpga_power_off, NULL); 75 } 76 77 #ifdef CONFIG_USE_OF 78 79 static void __init xtfpga_clk_setup(struct device_node *np) 80 { 81 void __iomem *base = of_iomap(np, 0); 82 struct clk *clk; 83 u32 freq; 84 85 if (!base) { 86 pr_err("%pOFn: invalid address\n", np); 87 return; 88 } 89 90 freq = __raw_readl(base); 91 iounmap(base); 92 clk = clk_register_fixed_rate(NULL, np->name, NULL, 0, freq); 93 94 if (IS_ERR(clk)) { 95 pr_err("%pOFn: clk registration failed\n", np); 96 return; 97 } 98 99 if (of_clk_add_provider(np, of_clk_src_simple_get, clk)) { 100 pr_err("%pOFn: clk provider registration failed\n", np); 101 return; 102 } 103 } 104 CLK_OF_DECLARE(xtfpga_clk, "cdns,xtfpga-clock", xtfpga_clk_setup); 105 106 #define MAC_LEN 6 107 static void __init update_local_mac(struct device_node *node) 108 { 109 struct property *newmac; 110 const u8* macaddr; 111 int prop_len; 112 113 macaddr = of_get_property(node, "local-mac-address", &prop_len); 114 if (macaddr == NULL || prop_len != MAC_LEN) 115 return; 116 117 newmac = kzalloc(sizeof(*newmac) + MAC_LEN, GFP_KERNEL); 118 if (newmac == NULL) 119 return; 120 121 newmac->value = newmac + 1; 122 newmac->length = MAC_LEN; 123 newmac->name = kstrdup("local-mac-address", GFP_KERNEL); 124 if (newmac->name == NULL) { 125 kfree(newmac); 126 return; 127 } 128 129 memcpy(newmac->value, macaddr, MAC_LEN); 130 ((u8*)newmac->value)[5] = (*(u32*)DIP_SWITCHES_VADDR) & 0x3f; 131 of_update_property(node, newmac); 132 } 133 134 static int __init machine_setup(void) 135 { 136 struct device_node *eth = NULL; 137 138 if ((eth = of_find_compatible_node(eth, NULL, "opencores,ethoc"))) 139 update_local_mac(eth); 140 of_node_put(eth); 141 142 xtfpga_register_handlers(); 143 144 return 0; 145 } 146 arch_initcall(machine_setup); 147 148 #else 149 150 #include <linux/serial_8250.h> 151 #include <linux/if.h> 152 #include <net/ethoc.h> 153 #include <linux/usb/c67x00.h> 154 155 /*---------------------------------------------------------------------------- 156 * Ethernet -- OpenCores Ethernet MAC (ethoc driver) 157 */ 158 159 static struct resource ethoc_res[] = { 160 [0] = { /* register space */ 161 .start = OETH_REGS_PADDR, 162 .end = OETH_REGS_PADDR + OETH_REGS_SIZE - 1, 163 .flags = IORESOURCE_MEM, 164 }, 165 [1] = { /* buffer space */ 166 .start = OETH_SRAMBUFF_PADDR, 167 .end = OETH_SRAMBUFF_PADDR + OETH_SRAMBUFF_SIZE - 1, 168 .flags = IORESOURCE_MEM, 169 }, 170 [2] = { /* IRQ number */ 171 .start = XTENSA_PIC_LINUX_IRQ(OETH_IRQ), 172 .end = XTENSA_PIC_LINUX_IRQ(OETH_IRQ), 173 .flags = IORESOURCE_IRQ, 174 }, 175 }; 176 177 static struct ethoc_platform_data ethoc_pdata = { 178 /* 179 * The MAC address for these boards is 00:50:c2:13:6f:xx. 180 * The last byte (here as zero) is read from the DIP switches on the 181 * board. 182 */ 183 .hwaddr = { 0x00, 0x50, 0xc2, 0x13, 0x6f, 0 }, 184 .phy_id = -1, 185 .big_endian = XCHAL_HAVE_BE, 186 }; 187 188 static struct platform_device ethoc_device = { 189 .name = "ethoc", 190 .id = -1, 191 .num_resources = ARRAY_SIZE(ethoc_res), 192 .resource = ethoc_res, 193 .dev = { 194 .platform_data = ðoc_pdata, 195 }, 196 }; 197 198 /*---------------------------------------------------------------------------- 199 * USB Host/Device -- Cypress CY7C67300 200 */ 201 202 static struct resource c67x00_res[] = { 203 [0] = { /* register space */ 204 .start = C67X00_PADDR, 205 .end = C67X00_PADDR + C67X00_SIZE - 1, 206 .flags = IORESOURCE_MEM, 207 }, 208 [1] = { /* IRQ number */ 209 .start = XTENSA_PIC_LINUX_IRQ(C67X00_IRQ), 210 .end = XTENSA_PIC_LINUX_IRQ(C67X00_IRQ), 211 .flags = IORESOURCE_IRQ, 212 }, 213 }; 214 215 static struct c67x00_platform_data c67x00_pdata = { 216 .sie_config = C67X00_SIE1_HOST | C67X00_SIE2_UNUSED, 217 .hpi_regstep = 4, 218 }; 219 220 static struct platform_device c67x00_device = { 221 .name = "c67x00", 222 .id = -1, 223 .num_resources = ARRAY_SIZE(c67x00_res), 224 .resource = c67x00_res, 225 .dev = { 226 .platform_data = &c67x00_pdata, 227 }, 228 }; 229 230 /*---------------------------------------------------------------------------- 231 * UART 232 */ 233 234 static struct resource serial_resource = { 235 .start = DUART16552_PADDR, 236 .end = DUART16552_PADDR + 0x1f, 237 .flags = IORESOURCE_MEM, 238 }; 239 240 static struct plat_serial8250_port serial_platform_data[] = { 241 [0] = { 242 .mapbase = DUART16552_PADDR, 243 .irq = XTENSA_PIC_LINUX_IRQ(DUART16552_INTNUM), 244 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | 245 UPF_IOREMAP, 246 .iotype = XCHAL_HAVE_BE ? UPIO_MEM32BE : UPIO_MEM32, 247 .regshift = 2, 248 .uartclk = 0, /* set in xtavnet_init() */ 249 }, 250 { }, 251 }; 252 253 static struct platform_device xtavnet_uart = { 254 .name = "serial8250", 255 .id = PLAT8250_DEV_PLATFORM, 256 .dev = { 257 .platform_data = serial_platform_data, 258 }, 259 .num_resources = 1, 260 .resource = &serial_resource, 261 }; 262 263 /* platform devices */ 264 static struct platform_device *platform_devices[] __initdata = { 265 ðoc_device, 266 &c67x00_device, 267 &xtavnet_uart, 268 }; 269 270 271 static int __init xtavnet_init(void) 272 { 273 /* Ethernet MAC address. */ 274 ethoc_pdata.hwaddr[5] = *(u32 *)DIP_SWITCHES_VADDR; 275 276 /* Clock rate varies among FPGA bitstreams; board specific FPGA register 277 * reports the actual clock rate. 278 */ 279 serial_platform_data[0].uartclk = *(long *)XTFPGA_CLKFRQ_VADDR; 280 281 282 /* register platform devices */ 283 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 284 285 /* ETHOC driver is a bit quiet; at least display Ethernet MAC, so user 286 * knows whether they set it correctly on the DIP switches. 287 */ 288 pr_info("XTFPGA: Ethernet MAC %pM\n", ethoc_pdata.hwaddr); 289 ethoc_pdata.eth_clkfreq = *(long *)XTFPGA_CLKFRQ_VADDR; 290 291 xtfpga_register_handlers(); 292 293 return 0; 294 } 295 296 /* 297 * Register to be done during do_initcalls(). 298 */ 299 arch_initcall(xtavnet_init); 300 301 #endif /* CONFIG_USE_OF */ 302