xref: /linux/arch/xtensa/platforms/iss/include/platform/simcall-gdbio.h (revision 8be98d2f2a0a262f8bf8a0bc1fdf522b3c7aab17)
1*6a8eb99eSMax Filippov /* SPDX-License-Identifier: GPL-2.0 */
2*6a8eb99eSMax Filippov /* Copyright (C) 2021 Cadence Design Systems Inc. */
3*6a8eb99eSMax Filippov 
4*6a8eb99eSMax Filippov #ifndef _XTENSA_PLATFORM_ISS_SIMCALL_GDBIO_H
5*6a8eb99eSMax Filippov #define _XTENSA_PLATFORM_ISS_SIMCALL_GDBIO_H
6*6a8eb99eSMax Filippov 
7*6a8eb99eSMax Filippov /*
8*6a8eb99eSMax Filippov  *  System call like services offered by the GDBIO host.
9*6a8eb99eSMax Filippov  */
10*6a8eb99eSMax Filippov 
11*6a8eb99eSMax Filippov #define SYS_open	-2
12*6a8eb99eSMax Filippov #define SYS_close	-3
13*6a8eb99eSMax Filippov #define SYS_read	-4
14*6a8eb99eSMax Filippov #define SYS_write	-5
15*6a8eb99eSMax Filippov #define SYS_lseek	-6
16*6a8eb99eSMax Filippov 
17*6a8eb99eSMax Filippov static int errno;
18*6a8eb99eSMax Filippov 
__simc(int a,int b,int c,int d)19*6a8eb99eSMax Filippov static inline int __simc(int a, int b, int c, int d)
20*6a8eb99eSMax Filippov {
21*6a8eb99eSMax Filippov 	register int a1 asm("a2") = a;
22*6a8eb99eSMax Filippov 	register int b1 asm("a6") = b;
23*6a8eb99eSMax Filippov 	register int c1 asm("a3") = c;
24*6a8eb99eSMax Filippov 	register int d1 asm("a4") = d;
25*6a8eb99eSMax Filippov 	__asm__ __volatile__ (
26*6a8eb99eSMax Filippov 			"break 1, 14\n"
27*6a8eb99eSMax Filippov 			: "+r"(a1), "+r"(c1)
28*6a8eb99eSMax Filippov 			: "r"(b1), "r"(d1)
29*6a8eb99eSMax Filippov 			: "memory");
30*6a8eb99eSMax Filippov 	errno = c1;
31*6a8eb99eSMax Filippov 	return a1;
32*6a8eb99eSMax Filippov }
33*6a8eb99eSMax Filippov 
34*6a8eb99eSMax Filippov #endif /* _XTENSA_PLATFORM_ISS_SIMCALL_GDBIO_H */
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